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-rw-r--r--include/asm-arm/arch-pxa/pxa2xx_spi.h24
1 files changed, 0 insertions, 24 deletions
diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h
index acc7ec7a84a1..3459fb26ce97 100644
--- a/include/asm-arm/arch-pxa/pxa2xx_spi.h
+++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h
@@ -22,32 +22,8 @@
22#define PXA2XX_CS_ASSERT (0x01) 22#define PXA2XX_CS_ASSERT (0x01)
23#define PXA2XX_CS_DEASSERT (0x02) 23#define PXA2XX_CS_DEASSERT (0x02)
24 24
25#if defined(CONFIG_PXA25x)
26#define CLOCK_SPEED_HZ 3686400
27#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
28#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
29#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
30#elif defined(CONFIG_PXA27x)
31#define CLOCK_SPEED_HZ 13000000
32#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
33#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
34#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
35#endif
36
37#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
38#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
39#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
40
41enum pxa_ssp_type {
42 SSP_UNDEFINED = 0,
43 PXA25x_SSP, /* pxa 210, 250, 255, 26x */
44 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
45 PXA27x_SSP,
46};
47
48/* device.platform_data for SSP controller devices */ 25/* device.platform_data for SSP controller devices */
49struct pxa2xx_spi_master { 26struct pxa2xx_spi_master {
50 enum pxa_ssp_type ssp_type;
51 u32 clock_enable; 27 u32 clock_enable;
52 u16 num_chipselect; 28 u16 num_chipselect;
53 u8 enable_dma; 29 u8 enable_dma;