diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-omap/dmtimer.h | 79 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/irqs.h | 12 |
2 files changed, 45 insertions, 46 deletions
diff --git a/include/asm-arm/arch-omap/dmtimer.h b/include/asm-arm/arch-omap/dmtimer.h index e6522e6a3834..5b58e3d62742 100644 --- a/include/asm-arm/arch-omap/dmtimer.h +++ b/include/asm-arm/arch-omap/dmtimer.h | |||
@@ -5,6 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005 Nokia Corporation |
7 | * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> | 7 | * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> |
8 | * PWM and clock framwork support by Timo Teras. | ||
8 | * | 9 | * |
9 | * This program is free software; you can redistribute it and/or modify it | 10 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | 11 | * under the terms of the GNU General Public License as published by the |
@@ -25,69 +26,55 @@ | |||
25 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 26 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
26 | */ | 27 | */ |
27 | 28 | ||
28 | #ifndef __ASM_ARCH_TIMER_H | 29 | #ifndef __ASM_ARCH_DMTIMER_H |
29 | #define __ASM_ARCH_TIMER_H | 30 | #define __ASM_ARCH_DMTIMER_H |
30 | |||
31 | #include <linux/list.h> | ||
32 | |||
33 | #define OMAP_TIMER_SRC_ARMXOR 0x00 | ||
34 | #define OMAP_TIMER_SRC_32_KHZ 0x01 | ||
35 | #define OMAP_TIMER_SRC_EXT_CLK 0x02 | ||
36 | |||
37 | /* timer control reg bits */ | ||
38 | #define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) | ||
39 | #define OMAP_TIMER_CTRL_PT (1 << 12) | ||
40 | #define OMAP_TIMER_CTRL_TRG_OVERFLOW (0x1 << 10) | ||
41 | #define OMAP_TIMER_CTRL_TRG_OFANDMATCH (0x2 << 10) | ||
42 | #define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) | ||
43 | #define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) | ||
44 | #define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) | ||
45 | #define OMAP_TIMER_CTRL_SCPWM (1 << 7) | ||
46 | #define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ | ||
47 | #define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ | ||
48 | #define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */ | ||
49 | #define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ | ||
50 | #define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ | ||
51 | 31 | ||
52 | /* timer interrupt enable bits */ | 32 | /* clock sources */ |
53 | #define OMAP_TIMER_INT_CAPTURE (1 << 2) | 33 | #define OMAP_TIMER_SRC_SYS_CLK 0x00 |
54 | #define OMAP_TIMER_INT_OVERFLOW (1 << 1) | 34 | #define OMAP_TIMER_SRC_32_KHZ 0x01 |
55 | #define OMAP_TIMER_INT_MATCH (1 << 0) | 35 | #define OMAP_TIMER_SRC_EXT_CLK 0x02 |
56 | 36 | ||
37 | /* timer interrupt enable bits */ | ||
38 | #define OMAP_TIMER_INT_CAPTURE (1 << 2) | ||
39 | #define OMAP_TIMER_INT_OVERFLOW (1 << 1) | ||
40 | #define OMAP_TIMER_INT_MATCH (1 << 0) | ||
57 | 41 | ||
58 | struct omap_dm_timer { | 42 | /* trigger types */ |
59 | struct list_head timer_list; | 43 | #define OMAP_TIMER_TRIGGER_NONE 0x00 |
44 | #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 | ||
45 | #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 | ||
60 | 46 | ||
61 | u32 base; | 47 | struct omap_dm_timer; |
62 | unsigned int irq; | 48 | struct clk; |
63 | }; | ||
64 | 49 | ||
65 | u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg); | 50 | int omap_dm_timer_init(void); |
66 | void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value); | ||
67 | 51 | ||
68 | struct omap_dm_timer * omap_dm_timer_request(void); | 52 | struct omap_dm_timer *omap_dm_timer_request(void); |
53 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); | ||
69 | void omap_dm_timer_free(struct omap_dm_timer *timer); | 54 | void omap_dm_timer_free(struct omap_dm_timer *timer); |
70 | void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); | ||
71 | 55 | ||
72 | void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); | 56 | int omap_dm_timer_get_irq(struct omap_dm_timer *timer); |
73 | void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value); | 57 | |
74 | void omap_dm_timer_enable_compare(struct omap_dm_timer *timer); | 58 | u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); |
75 | void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer); | 59 | struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer); |
76 | 60 | ||
77 | void omap_dm_timer_trigger(struct omap_dm_timer *timer); | 61 | void omap_dm_timer_trigger(struct omap_dm_timer *timer); |
78 | void omap_dm_timer_start(struct omap_dm_timer *timer); | 62 | void omap_dm_timer_start(struct omap_dm_timer *timer); |
79 | void omap_dm_timer_stop(struct omap_dm_timer *timer); | 63 | void omap_dm_timer_stop(struct omap_dm_timer *timer); |
80 | 64 | ||
81 | void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load); | 65 | void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); |
82 | void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match); | 66 | void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); |
67 | void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); | ||
68 | void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger); | ||
69 | void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); | ||
70 | |||
71 | void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); | ||
83 | 72 | ||
84 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); | 73 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); |
85 | void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); | 74 | void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); |
86 | |||
87 | unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); | 75 | unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); |
88 | void omap_dm_timer_reset_counter(struct omap_dm_timer *timer); | ||
89 | 76 | ||
90 | int omap_dm_timers_active(void); | 77 | int omap_dm_timers_active(void); |
91 | u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); | ||
92 | 78 | ||
93 | #endif /* __ASM_ARCH_TIMER_H */ | 79 | |
80 | #endif /* __ASM_ARCH_DMTIMER_H */ | ||
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 42098d99f302..46f2f06eae0c 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h | |||
@@ -242,6 +242,18 @@ | |||
242 | #define INT_24XX_GPIO_BANK2 30 | 242 | #define INT_24XX_GPIO_BANK2 30 |
243 | #define INT_24XX_GPIO_BANK3 31 | 243 | #define INT_24XX_GPIO_BANK3 31 |
244 | #define INT_24XX_GPIO_BANK4 32 | 244 | #define INT_24XX_GPIO_BANK4 32 |
245 | #define INT_24XX_GPTIMER1 37 | ||
246 | #define INT_24XX_GPTIMER2 38 | ||
247 | #define INT_24XX_GPTIMER3 39 | ||
248 | #define INT_24XX_GPTIMER4 40 | ||
249 | #define INT_24XX_GPTIMER5 41 | ||
250 | #define INT_24XX_GPTIMER6 42 | ||
251 | #define INT_24XX_GPTIMER7 43 | ||
252 | #define INT_24XX_GPTIMER8 44 | ||
253 | #define INT_24XX_GPTIMER9 45 | ||
254 | #define INT_24XX_GPTIMER10 46 | ||
255 | #define INT_24XX_GPTIMER11 47 | ||
256 | #define INT_24XX_GPTIMER12 48 | ||
245 | #define INT_24XX_MCBSP1_IRQ_TX 59 | 257 | #define INT_24XX_MCBSP1_IRQ_TX 59 |
246 | #define INT_24XX_MCBSP1_IRQ_RX 60 | 258 | #define INT_24XX_MCBSP1_IRQ_RX 60 |
247 | #define INT_24XX_MCBSP2_IRQ_TX 62 | 259 | #define INT_24XX_MCBSP2_IRQ_TX 62 |