diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc/atomic.h | 38 | ||||
-rw-r--r-- | include/asm-sparc64/bugs.h | 8 | ||||
-rw-r--r-- | include/asm-sparc64/cpudata.h | 24 | ||||
-rw-r--r-- | include/asm-sparc64/hypervisor.h | 643 | ||||
-rw-r--r-- | include/asm-sparc64/kdebug.h | 1 | ||||
-rw-r--r-- | include/asm-sparc64/mdesc.h | 39 | ||||
-rw-r--r-- | include/asm-sparc64/oplib.h | 7 | ||||
-rw-r--r-- | include/asm-sparc64/percpu.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/prom.h | 1 | ||||
-rw-r--r-- | include/asm-sparc64/smp.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/sstate.h | 13 | ||||
-rw-r--r-- | include/asm-sparc64/thread_info.h | 8 | ||||
-rw-r--r-- | include/asm-sparc64/topology.h | 3 | ||||
-rw-r--r-- | include/asm-sparc64/tsb.h | 2 | ||||
-rw-r--r-- | include/linux/timer.h | 6 |
15 files changed, 733 insertions, 68 deletions
diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 731fa56e0c37..bdca5416d8b0 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) |
4 | * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) | 4 | * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) |
5 | * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org) | ||
5 | * | 6 | * |
6 | * Additions by Keith M Wesolowski (wesolows@foobazco.org) based | 7 | * Additions by Keith M Wesolowski (wesolows@foobazco.org) based |
7 | * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. | 8 | * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. |
@@ -10,11 +11,48 @@ | |||
10 | #ifndef __ARCH_SPARC_ATOMIC__ | 11 | #ifndef __ARCH_SPARC_ATOMIC__ |
11 | #define __ARCH_SPARC_ATOMIC__ | 12 | #define __ARCH_SPARC_ATOMIC__ |
12 | 13 | ||
14 | #include <linux/types.h> | ||
13 | 15 | ||
14 | typedef struct { volatile int counter; } atomic_t; | 16 | typedef struct { volatile int counter; } atomic_t; |
15 | 17 | ||
16 | #ifdef __KERNEL__ | 18 | #ifdef __KERNEL__ |
17 | 19 | ||
20 | /* Emulate cmpxchg() the same way we emulate atomics, | ||
21 | * by hashing the object address and indexing into an array | ||
22 | * of spinlocks to get a bit of performance... | ||
23 | * | ||
24 | * See arch/sparc/lib/atomic32.c for implementation. | ||
25 | * | ||
26 | * Cribbed from <asm-parisc/atomic.h> | ||
27 | */ | ||
28 | #define __HAVE_ARCH_CMPXCHG 1 | ||
29 | |||
30 | /* bug catcher for when unsupported size is used - won't link */ | ||
31 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
32 | /* we only need to support cmpxchg of a u32 on sparc */ | ||
33 | extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); | ||
34 | |||
35 | /* don't worry...optimizer will get rid of most of this */ | ||
36 | static __inline__ unsigned long | ||
37 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) | ||
38 | { | ||
39 | switch(size) { | ||
40 | case 4: | ||
41 | return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_); | ||
42 | default: | ||
43 | __cmpxchg_called_with_bad_pointer(); | ||
44 | break; | ||
45 | } | ||
46 | return old; | ||
47 | } | ||
48 | |||
49 | #define cmpxchg(ptr,o,n) ({ \ | ||
50 | __typeof__(*(ptr)) _o_ = (o); \ | ||
51 | __typeof__(*(ptr)) _n_ = (n); \ | ||
52 | (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ | ||
53 | (unsigned long)_n_, sizeof(*(ptr))); \ | ||
54 | }) | ||
55 | |||
18 | #define ATOMIC_INIT(i) { (i) } | 56 | #define ATOMIC_INIT(i) { (i) } |
19 | 57 | ||
20 | extern int __atomic_add_return(int, atomic_t *); | 58 | extern int __atomic_add_return(int, atomic_t *); |
diff --git a/include/asm-sparc64/bugs.h b/include/asm-sparc64/bugs.h index 120422fdb02f..bf39d86c0c9e 100644 --- a/include/asm-sparc64/bugs.h +++ b/include/asm-sparc64/bugs.h | |||
@@ -1,9 +1,8 @@ | |||
1 | /* $Id: bugs.h,v 1.1 1996/12/26 13:25:20 davem Exp $ | 1 | /* bugs.h: Sparc64 probes for various bugs. |
2 | * include/asm-sparc64/bugs.h: Sparc probes for various bugs. | ||
3 | * | 2 | * |
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) |
5 | */ | 4 | */ |
6 | 5 | #include <asm/sstate.h> | |
7 | 6 | ||
8 | extern unsigned long loops_per_jiffy; | 7 | extern unsigned long loops_per_jiffy; |
9 | 8 | ||
@@ -12,4 +11,5 @@ static void __init check_bugs(void) | |||
12 | #ifndef CONFIG_SMP | 11 | #ifndef CONFIG_SMP |
13 | cpu_data(0).udelay_val = loops_per_jiffy; | 12 | cpu_data(0).udelay_val = loops_per_jiffy; |
14 | #endif | 13 | #endif |
14 | sstate_running(); | ||
15 | } | 15 | } |
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index e89922d6718c..03c385de7619 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h | |||
@@ -17,11 +17,11 @@ | |||
17 | typedef struct { | 17 | typedef struct { |
18 | /* Dcache line 1 */ | 18 | /* Dcache line 1 */ |
19 | unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ | 19 | unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ |
20 | unsigned int __pad0_1; | 20 | unsigned int __pad0; |
21 | unsigned int __pad0_2; | ||
22 | unsigned int __pad1; | ||
23 | unsigned long clock_tick; /* %tick's per second */ | 21 | unsigned long clock_tick; /* %tick's per second */ |
24 | unsigned long udelay_val; | 22 | unsigned long udelay_val; |
23 | unsigned int __pad1; | ||
24 | unsigned int __pad2; | ||
25 | 25 | ||
26 | /* Dcache line 2, rarely used */ | 26 | /* Dcache line 2, rarely used */ |
27 | unsigned int dcache_size; | 27 | unsigned int dcache_size; |
@@ -30,8 +30,8 @@ typedef struct { | |||
30 | unsigned int icache_line_size; | 30 | unsigned int icache_line_size; |
31 | unsigned int ecache_size; | 31 | unsigned int ecache_size; |
32 | unsigned int ecache_line_size; | 32 | unsigned int ecache_line_size; |
33 | int core_id; | ||
33 | unsigned int __pad3; | 34 | unsigned int __pad3; |
34 | unsigned int __pad4; | ||
35 | } cpuinfo_sparc; | 35 | } cpuinfo_sparc; |
36 | 36 | ||
37 | DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); | 37 | DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); |
@@ -76,12 +76,18 @@ struct trap_per_cpu { | |||
76 | 76 | ||
77 | /* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ | 77 | /* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ |
78 | unsigned int irq_worklist; | 78 | unsigned int irq_worklist; |
79 | unsigned int __pad1; | 79 | unsigned int cpu_mondo_qmask; |
80 | unsigned long __pad2[3]; | 80 | unsigned int dev_mondo_qmask; |
81 | unsigned int resum_qmask; | ||
82 | unsigned int nonresum_qmask; | ||
83 | unsigned int __pad2[3]; | ||
81 | } __attribute__((aligned(64))); | 84 | } __attribute__((aligned(64))); |
82 | extern struct trap_per_cpu trap_block[NR_CPUS]; | 85 | extern struct trap_per_cpu trap_block[NR_CPUS]; |
83 | extern void init_cur_cpu_trap(struct thread_info *); | 86 | extern void init_cur_cpu_trap(struct thread_info *); |
84 | extern void setup_tba(void); | 87 | extern void setup_tba(void); |
88 | extern int ncpus_probed; | ||
89 | |||
90 | extern unsigned long real_hard_smp_processor_id(void); | ||
85 | 91 | ||
86 | struct cpuid_patch_entry { | 92 | struct cpuid_patch_entry { |
87 | unsigned int addr; | 93 | unsigned int addr; |
@@ -122,6 +128,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
122 | #define TRAP_PER_CPU_TSB_HUGE 0xd0 | 128 | #define TRAP_PER_CPU_TSB_HUGE 0xd0 |
123 | #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 | 129 | #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 |
124 | #define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 | 130 | #define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 |
131 | #define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe4 | ||
132 | #define TRAP_PER_CPU_DEV_MONDO_QMASK 0xe8 | ||
133 | #define TRAP_PER_CPU_RESUM_QMASK 0xec | ||
134 | #define TRAP_PER_CPU_NONRESUM_QMASK 0xf0 | ||
125 | 135 | ||
126 | #define TRAP_BLOCK_SZ_SHIFT 8 | 136 | #define TRAP_BLOCK_SZ_SHIFT 8 |
127 | 137 | ||
@@ -192,7 +202,7 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
192 | * the calculations done by the macro mid-stream. | 202 | * the calculations done by the macro mid-stream. |
193 | */ | 203 | */ |
194 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ | 204 | #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ |
195 | ldub [THR + TI_CPU], REG1; \ | 205 | lduh [THR + TI_CPU], REG1; \ |
196 | sethi %hi(__per_cpu_shift), REG3; \ | 206 | sethi %hi(__per_cpu_shift), REG3; \ |
197 | sethi %hi(__per_cpu_base), REG2; \ | 207 | sethi %hi(__per_cpu_base), REG2; \ |
198 | ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ | 208 | ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ |
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h index a5558c87556d..5cdb1ff04838 100644 --- a/include/asm-sparc64/hypervisor.h +++ b/include/asm-sparc64/hypervisor.h | |||
@@ -73,6 +73,8 @@ | |||
73 | #define HV_ENOTSUPPORTED 13 /* Function not supported */ | 73 | #define HV_ENOTSUPPORTED 13 /* Function not supported */ |
74 | #define HV_ENOMAP 14 /* No mapping found */ | 74 | #define HV_ENOMAP 14 /* No mapping found */ |
75 | #define HV_ETOOMANY 15 /* Too many items specified */ | 75 | #define HV_ETOOMANY 15 /* Too many items specified */ |
76 | #define HV_ECHANNEL 16 /* Invalid LDC channel */ | ||
77 | #define HV_EBUSY 17 /* Resource busy */ | ||
76 | 78 | ||
77 | /* mach_exit() | 79 | /* mach_exit() |
78 | * TRAP: HV_FAST_TRAP | 80 | * TRAP: HV_FAST_TRAP |
@@ -95,6 +97,10 @@ | |||
95 | */ | 97 | */ |
96 | #define HV_FAST_MACH_EXIT 0x00 | 98 | #define HV_FAST_MACH_EXIT 0x00 |
97 | 99 | ||
100 | #ifndef __ASSEMBLY__ | ||
101 | extern void sun4v_mach_exit(unsigned long exit_core); | ||
102 | #endif | ||
103 | |||
98 | /* Domain services. */ | 104 | /* Domain services. */ |
99 | 105 | ||
100 | /* mach_desc() | 106 | /* mach_desc() |
@@ -120,7 +126,13 @@ | |||
120 | */ | 126 | */ |
121 | #define HV_FAST_MACH_DESC 0x01 | 127 | #define HV_FAST_MACH_DESC 0x01 |
122 | 128 | ||
123 | /* mach_exit() | 129 | #ifndef __ASSEMBLY__ |
130 | extern unsigned long sun4v_mach_desc(unsigned long buffer_pa, | ||
131 | unsigned long buf_len, | ||
132 | unsigned long *real_buf_len); | ||
133 | #endif | ||
134 | |||
135 | /* mach_sir() | ||
124 | * TRAP: HV_FAST_TRAP | 136 | * TRAP: HV_FAST_TRAP |
125 | * FUNCTION: HV_FAST_MACH_SIR | 137 | * FUNCTION: HV_FAST_MACH_SIR |
126 | * ERRORS: This service does not return. | 138 | * ERRORS: This service does not return. |
@@ -135,53 +147,66 @@ | |||
135 | */ | 147 | */ |
136 | #define HV_FAST_MACH_SIR 0x02 | 148 | #define HV_FAST_MACH_SIR 0x02 |
137 | 149 | ||
138 | /* mach_set_soft_state() | 150 | #ifndef __ASSEMBLY__ |
151 | extern void sun4v_mach_sir(void); | ||
152 | #endif | ||
153 | |||
154 | /* mach_set_watchdog() | ||
139 | * TRAP: HV_FAST_TRAP | 155 | * TRAP: HV_FAST_TRAP |
140 | * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE | 156 | * FUNCTION: HV_FAST_MACH_SET_WATCHDOG |
141 | * ARG0: software state | 157 | * ARG0: timeout in milliseconds |
142 | * ARG1: software state description pointer | ||
143 | * RET0: status | 158 | * RET0: status |
144 | * ERRORS: EINVAL software state not valid or software state | 159 | * RET1: time remaining in milliseconds |
145 | * description is not NULL terminated | ||
146 | * ENORADDR software state description pointer is not a | ||
147 | * valid real address | ||
148 | * EBADALIGNED software state description is not correctly | ||
149 | * aligned | ||
150 | * | 160 | * |
151 | * This allows the guest to report it's soft state to the hypervisor. There | 161 | * A guest uses this API to set a watchdog timer. Once the gues has set |
152 | * are two primary components to this state. The first part states whether | 162 | * the timer, it must call the timer service again either to disable or |
153 | * the guest software is running or not. The second containts optional | 163 | * postpone the expiration. If the timer expires before being reset or |
154 | * details specific to the software. | 164 | * disabled, then the hypervisor take a platform specific action leading |
165 | * to guest termination within a bounded time period. The platform action | ||
166 | * may include recovery actions such as reporting the expiration to a | ||
167 | * Service Processor, and/or automatically restarting the gues. | ||
155 | * | 168 | * |
156 | * The software state argument is defined below in HV_SOFT_STATE_*, and | 169 | * The 'timeout' parameter is specified in milliseconds, however the |
157 | * indicates whether the guest is operating normally or in a transitional | 170 | * implementated granularity is given by the 'watchdog-resolution' |
158 | * state. | 171 | * property in the 'platform' node of the guest's machine description. |
172 | * The largest allowed timeout value is specified by the | ||
173 | * 'watchdog-max-timeout' property of the 'platform' node. | ||
159 | * | 174 | * |
160 | * The software state description argument is a real address of a data buffer | 175 | * If the 'timeout' argument is not zero, the watchdog timer is set to |
161 | * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL | 176 | * expire after a minimum of 'timeout' milliseconds. |
162 | * terminated 7-bit ASCII string of up to 31 characters not including the | ||
163 | * NULL termination. | ||
164 | */ | ||
165 | #define HV_FAST_MACH_SET_SOFT_STATE 0x03 | ||
166 | #define HV_SOFT_STATE_NORMAL 0x01 | ||
167 | #define HV_SOFT_STATE_TRANSITION 0x02 | ||
168 | |||
169 | /* mach_get_soft_state() | ||
170 | * TRAP: HV_FAST_TRAP | ||
171 | * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE | ||
172 | * ARG0: software state description pointer | ||
173 | * RET0: status | ||
174 | * RET1: software state | ||
175 | * ERRORS: ENORADDR software state description pointer is not a | ||
176 | * valid real address | ||
177 | * EBADALIGNED software state description is not correctly | ||
178 | * aligned | ||
179 | * | 177 | * |
180 | * Retrieve the current value of the guest's software state. The rules | 178 | * If the 'timeout' argument is zero, the watchdog timer is disabled. |
181 | * for the software state pointer are the same as for mach_set_soft_state() | 179 | * |
182 | * above. | 180 | * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout' |
181 | * property, the hypervisor leaves the watchdog timer state unchanged, | ||
182 | * and returns a status of EINVAL. | ||
183 | * | ||
184 | * The 'time remaining' return value is valid regardless of whether the | ||
185 | * return status is EOK or EINVAL. A non-zero return value indicates the | ||
186 | * number of milliseconds that were remaining until the timer was to expire. | ||
187 | * If less than one millisecond remains, the return value is '1'. If the | ||
188 | * watchdog timer was disabled at the time of the call, the return value is | ||
189 | * zero. | ||
190 | * | ||
191 | * If the hypervisor cannot support the exact timeout value requested, but | ||
192 | * can support a larger timeout value, the hypervisor may round the actual | ||
193 | * timeout to a value larger than the requested timeout, consequently the | ||
194 | * 'time remaining' return value may be larger than the previously requested | ||
195 | * timeout value. | ||
196 | * | ||
197 | * Any guest OS debugger should be aware that the watchdog service may be in | ||
198 | * use. Consequently, it is recommended that the watchdog service is | ||
199 | * disabled upon debugger entry (e.g. reaching a breakpoint), and then | ||
200 | * re-enabled upon returning to normal execution. The API has been designed | ||
201 | * with this in mind, and the 'time remaining' result of the disable call may | ||
202 | * be used directly as the timeout argument of the re-enable call. | ||
183 | */ | 203 | */ |
184 | #define HV_FAST_MACH_GET_SOFT_STATE 0x04 | 204 | #define HV_FAST_MACH_SET_WATCHDOG 0x05 |
205 | |||
206 | #ifndef __ASSEMBLY__ | ||
207 | extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout, | ||
208 | unsigned long *orig_timeout); | ||
209 | #endif | ||
185 | 210 | ||
186 | /* CPU services. | 211 | /* CPU services. |
187 | * | 212 | * |
@@ -206,8 +231,8 @@ | |||
206 | * FUNCTION: HV_FAST_CPU_START | 231 | * FUNCTION: HV_FAST_CPU_START |
207 | * ARG0: CPU ID | 232 | * ARG0: CPU ID |
208 | * ARG1: PC | 233 | * ARG1: PC |
209 | * ARG1: RTBA | 234 | * ARG2: RTBA |
210 | * ARG1: target ARG0 | 235 | * ARG3: target ARG0 |
211 | * RET0: status | 236 | * RET0: status |
212 | * ERRORS: ENOCPU Invalid CPU ID | 237 | * ERRORS: ENOCPU Invalid CPU ID |
213 | * EINVAL Target CPU ID is not in the stopped state | 238 | * EINVAL Target CPU ID is not in the stopped state |
@@ -224,6 +249,13 @@ | |||
224 | */ | 249 | */ |
225 | #define HV_FAST_CPU_START 0x10 | 250 | #define HV_FAST_CPU_START 0x10 |
226 | 251 | ||
252 | #ifndef __ASSEMBLY__ | ||
253 | extern unsigned long sun4v_cpu_start(unsigned long cpuid, | ||
254 | unsigned long pc, | ||
255 | unsigned long rtba, | ||
256 | unsigned long arg0); | ||
257 | #endif | ||
258 | |||
227 | /* cpu_stop() | 259 | /* cpu_stop() |
228 | * TRAP: HV_FAST_TRAP | 260 | * TRAP: HV_FAST_TRAP |
229 | * FUNCTION: HV_FAST_CPU_STOP | 261 | * FUNCTION: HV_FAST_CPU_STOP |
@@ -245,6 +277,10 @@ | |||
245 | */ | 277 | */ |
246 | #define HV_FAST_CPU_STOP 0x11 | 278 | #define HV_FAST_CPU_STOP 0x11 |
247 | 279 | ||
280 | #ifndef __ASSEMBLY__ | ||
281 | extern unsigned long sun4v_cpu_stop(unsigned long cpuid); | ||
282 | #endif | ||
283 | |||
248 | /* cpu_yield() | 284 | /* cpu_yield() |
249 | * TRAP: HV_FAST_TRAP | 285 | * TRAP: HV_FAST_TRAP |
250 | * FUNCTION: HV_FAST_CPU_YIELD | 286 | * FUNCTION: HV_FAST_CPU_YIELD |
@@ -588,6 +624,11 @@ struct hv_fault_status { | |||
588 | */ | 624 | */ |
589 | #define HV_FAST_MMU_TSB_CTX0 0x20 | 625 | #define HV_FAST_MMU_TSB_CTX0 0x20 |
590 | 626 | ||
627 | #ifndef __ASSEMBLY__ | ||
628 | extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, | ||
629 | unsigned long tsb_desc_ra); | ||
630 | #endif | ||
631 | |||
591 | /* mmu_tsb_ctxnon0() | 632 | /* mmu_tsb_ctxnon0() |
592 | * TRAP: HV_FAST_TRAP | 633 | * TRAP: HV_FAST_TRAP |
593 | * FUNCTION: HV_FAST_MMU_TSB_CTXNON0 | 634 | * FUNCTION: HV_FAST_MMU_TSB_CTXNON0 |
@@ -694,6 +735,13 @@ struct hv_fault_status { | |||
694 | */ | 735 | */ |
695 | #define HV_FAST_MMU_MAP_PERM_ADDR 0x25 | 736 | #define HV_FAST_MMU_MAP_PERM_ADDR 0x25 |
696 | 737 | ||
738 | #ifndef __ASSEMBLY__ | ||
739 | extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr, | ||
740 | unsigned long set_to_zero, | ||
741 | unsigned long tte, | ||
742 | unsigned long flags); | ||
743 | #endif | ||
744 | |||
697 | /* mmu_fault_area_conf() | 745 | /* mmu_fault_area_conf() |
698 | * TRAP: HV_FAST_TRAP | 746 | * TRAP: HV_FAST_TRAP |
699 | * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF | 747 | * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF |
@@ -892,6 +940,10 @@ struct hv_fault_status { | |||
892 | */ | 940 | */ |
893 | #define HV_FAST_TOD_GET 0x50 | 941 | #define HV_FAST_TOD_GET 0x50 |
894 | 942 | ||
943 | #ifndef __ASSEMBLY__ | ||
944 | extern unsigned long sun4v_tod_get(unsigned long *time); | ||
945 | #endif | ||
946 | |||
895 | /* tod_set() | 947 | /* tod_set() |
896 | * TRAP: HV_FAST_TRAP | 948 | * TRAP: HV_FAST_TRAP |
897 | * FUNCTION: HV_FAST_TOD_SET | 949 | * FUNCTION: HV_FAST_TOD_SET |
@@ -905,6 +957,10 @@ struct hv_fault_status { | |||
905 | */ | 957 | */ |
906 | #define HV_FAST_TOD_SET 0x51 | 958 | #define HV_FAST_TOD_SET 0x51 |
907 | 959 | ||
960 | #ifndef __ASSEMBLY__ | ||
961 | extern unsigned long sun4v_tod_set(unsigned long time); | ||
962 | #endif | ||
963 | |||
908 | /* Console services */ | 964 | /* Console services */ |
909 | 965 | ||
910 | /* con_getchar() | 966 | /* con_getchar() |
@@ -988,6 +1044,59 @@ extern unsigned long sun4v_con_write(unsigned long buffer, | |||
988 | unsigned long *bytes_written); | 1044 | unsigned long *bytes_written); |
989 | #endif | 1045 | #endif |
990 | 1046 | ||
1047 | /* mach_set_soft_state() | ||
1048 | * TRAP: HV_FAST_TRAP | ||
1049 | * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE | ||
1050 | * ARG0: software state | ||
1051 | * ARG1: software state description pointer | ||
1052 | * RET0: status | ||
1053 | * ERRORS: EINVAL software state not valid or software state | ||
1054 | * description is not NULL terminated | ||
1055 | * ENORADDR software state description pointer is not a | ||
1056 | * valid real address | ||
1057 | * EBADALIGNED software state description is not correctly | ||
1058 | * aligned | ||
1059 | * | ||
1060 | * This allows the guest to report it's soft state to the hypervisor. There | ||
1061 | * are two primary components to this state. The first part states whether | ||
1062 | * the guest software is running or not. The second containts optional | ||
1063 | * details specific to the software. | ||
1064 | * | ||
1065 | * The software state argument is defined below in HV_SOFT_STATE_*, and | ||
1066 | * indicates whether the guest is operating normally or in a transitional | ||
1067 | * state. | ||
1068 | * | ||
1069 | * The software state description argument is a real address of a data buffer | ||
1070 | * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL | ||
1071 | * terminated 7-bit ASCII string of up to 31 characters not including the | ||
1072 | * NULL termination. | ||
1073 | */ | ||
1074 | #define HV_FAST_MACH_SET_SOFT_STATE 0x70 | ||
1075 | #define HV_SOFT_STATE_NORMAL 0x01 | ||
1076 | #define HV_SOFT_STATE_TRANSITION 0x02 | ||
1077 | |||
1078 | #ifndef __ASSEMBLY__ | ||
1079 | extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state, | ||
1080 | unsigned long msg_string_ra); | ||
1081 | #endif | ||
1082 | |||
1083 | /* mach_get_soft_state() | ||
1084 | * TRAP: HV_FAST_TRAP | ||
1085 | * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE | ||
1086 | * ARG0: software state description pointer | ||
1087 | * RET0: status | ||
1088 | * RET1: software state | ||
1089 | * ERRORS: ENORADDR software state description pointer is not a | ||
1090 | * valid real address | ||
1091 | * EBADALIGNED software state description is not correctly | ||
1092 | * aligned | ||
1093 | * | ||
1094 | * Retrieve the current value of the guest's software state. The rules | ||
1095 | * for the software state pointer are the same as for mach_set_soft_state() | ||
1096 | * above. | ||
1097 | */ | ||
1098 | #define HV_FAST_MACH_GET_SOFT_STATE 0x71 | ||
1099 | |||
991 | /* Trap trace services. | 1100 | /* Trap trace services. |
992 | * | 1101 | * |
993 | * The hypervisor provides a trap tracing capability for privileged | 1102 | * The hypervisor provides a trap tracing capability for privileged |
@@ -1379,6 +1488,113 @@ extern unsigned long sun4v_intr_gettarget(unsigned long sysino); | |||
1379 | extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); | 1488 | extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); |
1380 | #endif | 1489 | #endif |
1381 | 1490 | ||
1491 | /* vintr_get_cookie() | ||
1492 | * TRAP: HV_FAST_TRAP | ||
1493 | * FUNCTION: HV_FAST_VINTR_GET_COOKIE | ||
1494 | * ARG0: device handle | ||
1495 | * ARG1: device ino | ||
1496 | * RET0: status | ||
1497 | * RET1: cookie | ||
1498 | */ | ||
1499 | #define HV_FAST_VINTR_GET_COOKIE 0xa7 | ||
1500 | |||
1501 | /* vintr_set_cookie() | ||
1502 | * TRAP: HV_FAST_TRAP | ||
1503 | * FUNCTION: HV_FAST_VINTR_SET_COOKIE | ||
1504 | * ARG0: device handle | ||
1505 | * ARG1: device ino | ||
1506 | * ARG2: cookie | ||
1507 | * RET0: status | ||
1508 | */ | ||
1509 | #define HV_FAST_VINTR_SET_COOKIE 0xa8 | ||
1510 | |||
1511 | /* vintr_get_valid() | ||
1512 | * TRAP: HV_FAST_TRAP | ||
1513 | * FUNCTION: HV_FAST_VINTR_GET_VALID | ||
1514 | * ARG0: device handle | ||
1515 | * ARG1: device ino | ||
1516 | * RET0: status | ||
1517 | * RET1: valid state | ||
1518 | */ | ||
1519 | #define HV_FAST_VINTR_GET_VALID 0xa9 | ||
1520 | |||
1521 | /* vintr_set_valid() | ||
1522 | * TRAP: HV_FAST_TRAP | ||
1523 | * FUNCTION: HV_FAST_VINTR_SET_VALID | ||
1524 | * ARG0: device handle | ||
1525 | * ARG1: device ino | ||
1526 | * ARG2: valid state | ||
1527 | * RET0: status | ||
1528 | */ | ||
1529 | #define HV_FAST_VINTR_SET_VALID 0xaa | ||
1530 | |||
1531 | /* vintr_get_state() | ||
1532 | * TRAP: HV_FAST_TRAP | ||
1533 | * FUNCTION: HV_FAST_VINTR_GET_STATE | ||
1534 | * ARG0: device handle | ||
1535 | * ARG1: device ino | ||
1536 | * RET0: status | ||
1537 | * RET1: state | ||
1538 | */ | ||
1539 | #define HV_FAST_VINTR_GET_STATE 0xab | ||
1540 | |||
1541 | /* vintr_set_state() | ||
1542 | * TRAP: HV_FAST_TRAP | ||
1543 | * FUNCTION: HV_FAST_VINTR_SET_STATE | ||
1544 | * ARG0: device handle | ||
1545 | * ARG1: device ino | ||
1546 | * ARG2: state | ||
1547 | * RET0: status | ||
1548 | */ | ||
1549 | #define HV_FAST_VINTR_SET_STATE 0xac | ||
1550 | |||
1551 | /* vintr_get_target() | ||
1552 | * TRAP: HV_FAST_TRAP | ||
1553 | * FUNCTION: HV_FAST_VINTR_GET_TARGET | ||
1554 | * ARG0: device handle | ||
1555 | * ARG1: device ino | ||
1556 | * RET0: status | ||
1557 | * RET1: cpuid | ||
1558 | */ | ||
1559 | #define HV_FAST_VINTR_GET_TARGET 0xad | ||
1560 | |||
1561 | /* vintr_set_target() | ||
1562 | * TRAP: HV_FAST_TRAP | ||
1563 | * FUNCTION: HV_FAST_VINTR_SET_TARGET | ||
1564 | * ARG0: device handle | ||
1565 | * ARG1: device ino | ||
1566 | * ARG2: cpuid | ||
1567 | * RET0: status | ||
1568 | */ | ||
1569 | #define HV_FAST_VINTR_SET_TARGET 0xae | ||
1570 | |||
1571 | #ifndef __ASSEMBLY__ | ||
1572 | extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle, | ||
1573 | unsigned long dev_ino, | ||
1574 | unsigned long *cookie); | ||
1575 | extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle, | ||
1576 | unsigned long dev_ino, | ||
1577 | unsigned long cookie); | ||
1578 | extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle, | ||
1579 | unsigned long dev_ino, | ||
1580 | unsigned long *valid); | ||
1581 | extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle, | ||
1582 | unsigned long dev_ino, | ||
1583 | unsigned long valid); | ||
1584 | extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle, | ||
1585 | unsigned long dev_ino, | ||
1586 | unsigned long *state); | ||
1587 | extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle, | ||
1588 | unsigned long dev_ino, | ||
1589 | unsigned long state); | ||
1590 | extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle, | ||
1591 | unsigned long dev_ino, | ||
1592 | unsigned long *cpuid); | ||
1593 | extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, | ||
1594 | unsigned long dev_ino, | ||
1595 | unsigned long cpuid); | ||
1596 | #endif | ||
1597 | |||
1382 | /* PCI IO services. | 1598 | /* PCI IO services. |
1383 | * | 1599 | * |
1384 | * See the terminology descriptions in the device interrupt services | 1600 | * See the terminology descriptions in the device interrupt services |
@@ -2037,6 +2253,346 @@ extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cp | |||
2037 | */ | 2253 | */ |
2038 | #define HV_FAST_PCI_MSG_SETVALID 0xd3 | 2254 | #define HV_FAST_PCI_MSG_SETVALID 0xd3 |
2039 | 2255 | ||
2256 | /* Logical Domain Channel services. */ | ||
2257 | |||
2258 | #define LDC_CHANNEL_DOWN 0 | ||
2259 | #define LDC_CHANNEL_UP 1 | ||
2260 | #define LDC_CHANNEL_RESETTING 2 | ||
2261 | |||
2262 | /* ldc_tx_qconf() | ||
2263 | * TRAP: HV_FAST_TRAP | ||
2264 | * FUNCTION: HV_FAST_LDC_TX_QCONF | ||
2265 | * ARG0: channel ID | ||
2266 | * ARG1: real address base of queue | ||
2267 | * ARG2: num entries in queue | ||
2268 | * RET0: status | ||
2269 | * | ||
2270 | * Configure transmit queue for the LDC endpoint specified by the | ||
2271 | * given channel ID, to be placed at the given real address, and | ||
2272 | * be of the given num entries. Num entries must be a power of two. | ||
2273 | * The real address base of the queue must be aligned on the queue | ||
2274 | * size. Each queue entry is 64-bytes, so for example, a 32 entry | ||
2275 | * queue must be aligned on a 2048 byte real address boundary. | ||
2276 | * | ||
2277 | * Upon configuration of a valid transmit queue the head and tail | ||
2278 | * pointers are set to a hypervisor specific identical value indicating | ||
2279 | * that the queue initially is empty. | ||
2280 | * | ||
2281 | * The endpoint's transmit queue is un-configured if num entries is zero. | ||
2282 | * | ||
2283 | * The maximum number of entries for each queue for a specific cpu may be | ||
2284 | * determined from the machine description. A transmit queue may be | ||
2285 | * specified even in the event that the LDC is down (peer endpoint has no | ||
2286 | * receive queue specified). Transmission will begin as soon as the peer | ||
2287 | * endpoint defines a receive queue. | ||
2288 | * | ||
2289 | * It is recommended that a guest wait for a transmit queue to empty prior | ||
2290 | * to reconfiguring it, or un-configuring it. Re or un-configuring of a | ||
2291 | * non-empty transmit queue behaves exactly as defined above, however it | ||
2292 | * is undefined as to how many of the pending entries in the original queue | ||
2293 | * will be delivered prior to the re-configuration taking effect. | ||
2294 | * Furthermore, as the queue configuration causes a reset of the head and | ||
2295 | * tail pointers there is no way for a guest to determine how many entries | ||
2296 | * have been sent after the configuration operation. | ||
2297 | */ | ||
2298 | #define HV_FAST_LDC_TX_QCONF 0xe0 | ||
2299 | |||
2300 | /* ldc_tx_qinfo() | ||
2301 | * TRAP: HV_FAST_TRAP | ||
2302 | * FUNCTION: HV_FAST_LDC_TX_QINFO | ||
2303 | * ARG0: channel ID | ||
2304 | * RET0: status | ||
2305 | * RET1: real address base of queue | ||
2306 | * RET2: num entries in queue | ||
2307 | * | ||
2308 | * Return the configuration info for the transmit queue of LDC endpoint | ||
2309 | * defined by the given channel ID. The real address is the currently | ||
2310 | * defined real address base of the defined queue, and num entries is the | ||
2311 | * size of the queue in terms of number of entries. | ||
2312 | * | ||
2313 | * If the specified channel ID is a valid endpoint number, but no transmit | ||
2314 | * queue has been defined this service will return success, but with num | ||
2315 | * entries set to zero and the real address will have an undefined value. | ||
2316 | */ | ||
2317 | #define HV_FAST_LDC_TX_QINFO 0xe1 | ||
2318 | |||
2319 | /* ldc_tx_get_state() | ||
2320 | * TRAP: HV_FAST_TRAP | ||
2321 | * FUNCTION: HV_FAST_LDC_TX_GET_STATE | ||
2322 | * ARG0: channel ID | ||
2323 | * RET0: status | ||
2324 | * RET1: head offset | ||
2325 | * RET2: tail offset | ||
2326 | * RET3: channel state | ||
2327 | * | ||
2328 | * Return the transmit state, and the head and tail queue pointers, for | ||
2329 | * the transmit queue of the LDC endpoint defined by the given channel ID. | ||
2330 | * The head and tail values are the byte offset of the head and tail | ||
2331 | * positions of the transmit queue for the specified endpoint. | ||
2332 | */ | ||
2333 | #define HV_FAST_LDC_TX_GET_STATE 0xe2 | ||
2334 | |||
2335 | /* ldc_tx_set_qtail() | ||
2336 | * TRAP: HV_FAST_TRAP | ||
2337 | * FUNCTION: HV_FAST_LDC_TX_SET_QTAIL | ||
2338 | * ARG0: channel ID | ||
2339 | * ARG1: tail offset | ||
2340 | * RET0: status | ||
2341 | * | ||
2342 | * Update the tail pointer for the transmit queue associated with the LDC | ||
2343 | * endpoint defined by the given channel ID. The tail offset specified | ||
2344 | * must be aligned on a 64 byte boundary, and calculated so as to increase | ||
2345 | * the number of pending entries on the transmit queue. Any attempt to | ||
2346 | * decrease the number of pending transmit queue entires is considered | ||
2347 | * an invalid tail offset and will result in an EINVAL error. | ||
2348 | * | ||
2349 | * Since the tail of the transmit queue may not be moved backwards, the | ||
2350 | * transmit queue may be flushed by configuring a new transmit queue, | ||
2351 | * whereupon the hypervisor will configure the initial transmit head and | ||
2352 | * tail pointers to be equal. | ||
2353 | */ | ||
2354 | #define HV_FAST_LDC_TX_SET_QTAIL 0xe3 | ||
2355 | |||
2356 | /* ldc_rx_qconf() | ||
2357 | * TRAP: HV_FAST_TRAP | ||
2358 | * FUNCTION: HV_FAST_LDC_RX_QCONF | ||
2359 | * ARG0: channel ID | ||
2360 | * ARG1: real address base of queue | ||
2361 | * ARG2: num entries in queue | ||
2362 | * RET0: status | ||
2363 | * | ||
2364 | * Configure receive queue for the LDC endpoint specified by the | ||
2365 | * given channel ID, to be placed at the given real address, and | ||
2366 | * be of the given num entries. Num entries must be a power of two. | ||
2367 | * The real address base of the queue must be aligned on the queue | ||
2368 | * size. Each queue entry is 64-bytes, so for example, a 32 entry | ||
2369 | * queue must be aligned on a 2048 byte real address boundary. | ||
2370 | * | ||
2371 | * The endpoint's transmit queue is un-configured if num entries is zero. | ||
2372 | * | ||
2373 | * If a valid receive queue is specified for a local endpoint the LDC is | ||
2374 | * in the up state for the purpose of transmission to this endpoint. | ||
2375 | * | ||
2376 | * The maximum number of entries for each queue for a specific cpu may be | ||
2377 | * determined from the machine description. | ||
2378 | * | ||
2379 | * As receive queue configuration causes a reset of the queue's head and | ||
2380 | * tail pointers there is no way for a gues to determine how many entries | ||
2381 | * have been received between a preceeding ldc_get_rx_state() API call | ||
2382 | * and the completion of the configuration operation. It should be noted | ||
2383 | * that datagram delivery is not guarenteed via domain channels anyway, | ||
2384 | * and therefore any higher protocol should be resilient to datagram | ||
2385 | * loss if necessary. However, to overcome this specific race potential | ||
2386 | * it is recommended, for example, that a higher level protocol be employed | ||
2387 | * to ensure either retransmission, or ensure that no datagrams are pending | ||
2388 | * on the peer endpoint's transmit queue prior to the configuration process. | ||
2389 | */ | ||
2390 | #define HV_FAST_LDC_RX_QCONF 0xe4 | ||
2391 | |||
2392 | /* ldc_rx_qinfo() | ||
2393 | * TRAP: HV_FAST_TRAP | ||
2394 | * FUNCTION: HV_FAST_LDC_RX_QINFO | ||
2395 | * ARG0: channel ID | ||
2396 | * RET0: status | ||
2397 | * RET1: real address base of queue | ||
2398 | * RET2: num entries in queue | ||
2399 | * | ||
2400 | * Return the configuration info for the receive queue of LDC endpoint | ||
2401 | * defined by the given channel ID. The real address is the currently | ||
2402 | * defined real address base of the defined queue, and num entries is the | ||
2403 | * size of the queue in terms of number of entries. | ||
2404 | * | ||
2405 | * If the specified channel ID is a valid endpoint number, but no receive | ||
2406 | * queue has been defined this service will return success, but with num | ||
2407 | * entries set to zero and the real address will have an undefined value. | ||
2408 | */ | ||
2409 | #define HV_FAST_LDC_RX_QINFO 0xe5 | ||
2410 | |||
2411 | /* ldc_rx_get_state() | ||
2412 | * TRAP: HV_FAST_TRAP | ||
2413 | * FUNCTION: HV_FAST_LDC_RX_GET_STATE | ||
2414 | * ARG0: channel ID | ||
2415 | * RET0: status | ||
2416 | * RET1: head offset | ||
2417 | * RET2: tail offset | ||
2418 | * RET3: channel state | ||
2419 | * | ||
2420 | * Return the receive state, and the head and tail queue pointers, for | ||
2421 | * the receive queue of the LDC endpoint defined by the given channel ID. | ||
2422 | * The head and tail values are the byte offset of the head and tail | ||
2423 | * positions of the receive queue for the specified endpoint. | ||
2424 | */ | ||
2425 | #define HV_FAST_LDC_RX_GET_STATE 0xe6 | ||
2426 | |||
2427 | /* ldc_rx_set_qhead() | ||
2428 | * TRAP: HV_FAST_TRAP | ||
2429 | * FUNCTION: HV_FAST_LDC_RX_SET_QHEAD | ||
2430 | * ARG0: channel ID | ||
2431 | * ARG1: head offset | ||
2432 | * RET0: status | ||
2433 | * | ||
2434 | * Update the head pointer for the receive queue associated with the LDC | ||
2435 | * endpoint defined by the given channel ID. The head offset specified | ||
2436 | * must be aligned on a 64 byte boundary, and calculated so as to decrease | ||
2437 | * the number of pending entries on the receive queue. Any attempt to | ||
2438 | * increase the number of pending receive queue entires is considered | ||
2439 | * an invalid head offset and will result in an EINVAL error. | ||
2440 | * | ||
2441 | * The receive queue may be flushed by setting the head offset equal | ||
2442 | * to the current tail offset. | ||
2443 | */ | ||
2444 | #define HV_FAST_LDC_RX_SET_QHEAD 0xe7 | ||
2445 | |||
2446 | /* LDC Map Table Entry. Each slot is defined by a translation table | ||
2447 | * entry, as specified by the LDC_MTE_* bits below, and a 64-bit | ||
2448 | * hypervisor invalidation cookie. | ||
2449 | */ | ||
2450 | #define LDC_MTE_PADDR 0x0fffffffffffe000 /* pa[55:13] */ | ||
2451 | #define LDC_MTE_COPY_W 0x0000000000000400 /* copy write access */ | ||
2452 | #define LDC_MTE_COPY_R 0x0000000000000200 /* copy read access */ | ||
2453 | #define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */ | ||
2454 | #define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access */ | ||
2455 | #define LDC_MTE_EXEC 0x0000000000000040 /* execute */ | ||
2456 | #define LDC_MTE_WRITE 0x0000000000000020 /* read */ | ||
2457 | #define LDC_MTE_READ 0x0000000000000010 /* write */ | ||
2458 | #define LDC_MTE_SZALL 0x000000000000000f /* page size bits */ | ||
2459 | #define LDC_MTE_SZ16GB 0x0000000000000007 /* 16GB page */ | ||
2460 | #define LDC_MTE_SZ2GB 0x0000000000000006 /* 2GB page */ | ||
2461 | #define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page */ | ||
2462 | #define LDC_MTE_SZ32MB 0x0000000000000004 /* 32MB page */ | ||
2463 | #define LDC_MTE_SZ4MB 0x0000000000000003 /* 4MB page */ | ||
2464 | #define LDC_MTE_SZ512K 0x0000000000000002 /* 512K page */ | ||
2465 | #define LDC_MTE_SZ64K 0x0000000000000001 /* 64K page */ | ||
2466 | #define LDC_MTE_SZ8K 0x0000000000000000 /* 8K page */ | ||
2467 | |||
2468 | #ifndef __ASSEMBLY__ | ||
2469 | struct ldc_mtable_entry { | ||
2470 | unsigned long mte; | ||
2471 | unsigned long cookie; | ||
2472 | }; | ||
2473 | #endif | ||
2474 | |||
2475 | /* ldc_set_map_table() | ||
2476 | * TRAP: HV_FAST_TRAP | ||
2477 | * FUNCTION: HV_FAST_LDC_SET_MAP_TABLE | ||
2478 | * ARG0: channel ID | ||
2479 | * ARG1: table real address | ||
2480 | * ARG2: num entries | ||
2481 | * RET0: status | ||
2482 | * | ||
2483 | * Register the MTE table at the given table real address, with the | ||
2484 | * specified num entries, for the LDC indicated by the given channel | ||
2485 | * ID. | ||
2486 | */ | ||
2487 | #define HV_FAST_LDC_SET_MAP_TABLE 0xea | ||
2488 | |||
2489 | /* ldc_get_map_table() | ||
2490 | * TRAP: HV_FAST_TRAP | ||
2491 | * FUNCTION: HV_FAST_LDC_GET_MAP_TABLE | ||
2492 | * ARG0: channel ID | ||
2493 | * RET0: status | ||
2494 | * RET1: table real address | ||
2495 | * RET2: num entries | ||
2496 | * | ||
2497 | * Return the configuration of the current mapping table registered | ||
2498 | * for the given channel ID. | ||
2499 | */ | ||
2500 | #define HV_FAST_LDC_GET_MAP_TABLE 0xeb | ||
2501 | |||
2502 | #define LDC_COPY_IN 0 | ||
2503 | #define LDC_COPY_OUT 1 | ||
2504 | |||
2505 | /* ldc_copy() | ||
2506 | * TRAP: HV_FAST_TRAP | ||
2507 | * FUNCTION: HV_FAST_LDC_COPY | ||
2508 | * ARG0: channel ID | ||
2509 | * ARG1: LDC_COPY_* direction code | ||
2510 | * ARG2: target real address | ||
2511 | * ARG3: local real address | ||
2512 | * ARG4: length in bytes | ||
2513 | * RET0: status | ||
2514 | * RET1: actual length in bytes | ||
2515 | */ | ||
2516 | #define HV_FAST_LDC_COPY 0xec | ||
2517 | |||
2518 | #define LDC_MEM_READ 1 | ||
2519 | #define LDC_MEM_WRITE 2 | ||
2520 | #define LDC_MEM_EXEC 4 | ||
2521 | |||
2522 | /* ldc_mapin() | ||
2523 | * TRAP: HV_FAST_TRAP | ||
2524 | * FUNCTION: HV_FAST_LDC_MAPIN | ||
2525 | * ARG0: channel ID | ||
2526 | * ARG1: cookie | ||
2527 | * RET0: status | ||
2528 | * RET1: real address | ||
2529 | * RET2: LDC_MEM_* permissions | ||
2530 | */ | ||
2531 | #define HV_FAST_LDC_MAPIN 0xed | ||
2532 | |||
2533 | /* ldc_unmap() | ||
2534 | * TRAP: HV_FAST_TRAP | ||
2535 | * FUNCTION: HV_FAST_LDC_UNMAP | ||
2536 | * ARG0: real address | ||
2537 | * RET0: status | ||
2538 | */ | ||
2539 | #define HV_FAST_LDC_UNMAP 0xee | ||
2540 | |||
2541 | /* ldc_revoke() | ||
2542 | * TRAP: HV_FAST_TRAP | ||
2543 | * FUNCTION: HV_FAST_LDC_REVOKE | ||
2544 | * ARG0: cookie | ||
2545 | * ARG1: ldc_mtable_entry cookie | ||
2546 | * RET0: status | ||
2547 | */ | ||
2548 | #define HV_FAST_LDC_REVOKE 0xef | ||
2549 | |||
2550 | #ifndef __ASSEMBLY__ | ||
2551 | extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel, | ||
2552 | unsigned long ra, | ||
2553 | unsigned long num_entries); | ||
2554 | extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel, | ||
2555 | unsigned long *ra, | ||
2556 | unsigned long *num_entries); | ||
2557 | extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel, | ||
2558 | unsigned long *head_off, | ||
2559 | unsigned long *tail_off, | ||
2560 | unsigned long *chan_state); | ||
2561 | extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel, | ||
2562 | unsigned long tail_off); | ||
2563 | extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel, | ||
2564 | unsigned long ra, | ||
2565 | unsigned long num_entries); | ||
2566 | extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel, | ||
2567 | unsigned long *ra, | ||
2568 | unsigned long *num_entries); | ||
2569 | extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel, | ||
2570 | unsigned long *head_off, | ||
2571 | unsigned long *tail_off, | ||
2572 | unsigned long *chan_state); | ||
2573 | extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel, | ||
2574 | unsigned long head_off); | ||
2575 | extern unsigned long sun4v_ldc_set_map_table(unsigned long channel, | ||
2576 | unsigned long ra, | ||
2577 | unsigned long num_entries); | ||
2578 | extern unsigned long sun4v_ldc_get_map_table(unsigned long channel, | ||
2579 | unsigned long *ra, | ||
2580 | unsigned long *num_entries); | ||
2581 | extern unsigned long sun4v_ldc_copy(unsigned long channel, | ||
2582 | unsigned long dir_code, | ||
2583 | unsigned long tgt_raddr, | ||
2584 | unsigned long lcl_raddr, | ||
2585 | unsigned long len, | ||
2586 | unsigned long *actual_len); | ||
2587 | extern unsigned long sun4v_ldc_mapin(unsigned long channel, | ||
2588 | unsigned long cookie, | ||
2589 | unsigned long *ra, | ||
2590 | unsigned long *perm); | ||
2591 | extern unsigned long sun4v_ldc_unmap(unsigned long ra); | ||
2592 | extern unsigned long sun4v_ldc_revoke(unsigned long cookie, | ||
2593 | unsigned long mte_cookie); | ||
2594 | #endif | ||
2595 | |||
2040 | /* Performance counter services. */ | 2596 | /* Performance counter services. */ |
2041 | 2597 | ||
2042 | #define HV_PERF_JBUS_PERF_CTRL_REG 0x00 | 2598 | #define HV_PERF_JBUS_PERF_CTRL_REG 0x00 |
@@ -2204,6 +2760,7 @@ extern void sun4v_hvapi_unregister(unsigned long group); | |||
2204 | extern int sun4v_hvapi_get(unsigned long group, | 2760 | extern int sun4v_hvapi_get(unsigned long group, |
2205 | unsigned long *major, | 2761 | unsigned long *major, |
2206 | unsigned long *minor); | 2762 | unsigned long *minor); |
2763 | extern void sun4v_hvapi_init(void); | ||
2207 | #endif | 2764 | #endif |
2208 | 2765 | ||
2209 | #endif /* !(_SPARC64_HYPERVISOR_H) */ | 2766 | #endif /* !(_SPARC64_HYPERVISOR_H) */ |
diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h index 627e3396a5f0..9974c7b0aebc 100644 --- a/include/asm-sparc64/kdebug.h +++ b/include/asm-sparc64/kdebug.h | |||
@@ -32,7 +32,6 @@ enum die_val { | |||
32 | DIE_TRAP, | 32 | DIE_TRAP, |
33 | DIE_TRAP_TL1, | 33 | DIE_TRAP_TL1, |
34 | DIE_CALL, | 34 | DIE_CALL, |
35 | DIE_PAGE_FAULT, | ||
36 | }; | 35 | }; |
37 | 36 | ||
38 | #endif | 37 | #endif |
diff --git a/include/asm-sparc64/mdesc.h b/include/asm-sparc64/mdesc.h new file mode 100644 index 000000000000..124eb8ca2378 --- /dev/null +++ b/include/asm-sparc64/mdesc.h | |||
@@ -0,0 +1,39 @@ | |||
1 | #ifndef _SPARC64_MDESC_H | ||
2 | #define _SPARC64_MDESC_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | #include <asm/prom.h> | ||
6 | |||
7 | struct mdesc_node; | ||
8 | struct mdesc_arc { | ||
9 | const char *name; | ||
10 | struct mdesc_node *arc; | ||
11 | }; | ||
12 | |||
13 | struct mdesc_node { | ||
14 | const char *name; | ||
15 | u64 node; | ||
16 | unsigned int unique_id; | ||
17 | unsigned int num_arcs; | ||
18 | struct property *properties; | ||
19 | struct mdesc_node *hash_next; | ||
20 | struct mdesc_node *allnodes_next; | ||
21 | struct mdesc_arc arcs[0]; | ||
22 | }; | ||
23 | |||
24 | extern struct mdesc_node *md_find_node_by_name(struct mdesc_node *from, | ||
25 | const char *name); | ||
26 | #define md_for_each_node_by_name(__mn, __name) \ | ||
27 | for (__mn = md_find_node_by_name(NULL, __name); __mn; \ | ||
28 | __mn = md_find_node_by_name(__mn, __name)) | ||
29 | |||
30 | extern struct property *md_find_property(const struct mdesc_node *mp, | ||
31 | const char *name, | ||
32 | int *lenp); | ||
33 | extern const void *md_get_property(const struct mdesc_node *mp, | ||
34 | const char *name, | ||
35 | int *lenp); | ||
36 | |||
37 | extern void sun4v_mdesc_init(void); | ||
38 | |||
39 | #endif | ||
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index 6a0da3b1695c..992f9f7a476c 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h | |||
@@ -316,11 +316,8 @@ extern int prom_setprop(int node, const char *prop_name, char *prop_value, | |||
316 | 316 | ||
317 | extern int prom_pathtoinode(const char *path); | 317 | extern int prom_pathtoinode(const char *path); |
318 | extern int prom_inst2pkg(int); | 318 | extern int prom_inst2pkg(int); |
319 | 319 | extern int prom_service_exists(const char *service_name); | |
320 | /* CPU probing helpers. */ | 320 | extern void prom_sun4v_guest_soft_state(void); |
321 | struct device_node; | ||
322 | int cpu_find_by_instance(int instance, struct device_node **dev_node, int *mid); | ||
323 | int cpu_find_by_mid(int mid, struct device_node **prom_node); | ||
324 | 321 | ||
325 | /* Client interface level routines. */ | 322 | /* Client interface level routines. */ |
326 | extern void prom_set_trap_table(unsigned long tba); | 323 | extern void prom_set_trap_table(unsigned long tba); |
diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h index ced8cbde046d..88db872ce2f8 100644 --- a/include/asm-sparc64/percpu.h +++ b/include/asm-sparc64/percpu.h | |||
@@ -5,7 +5,8 @@ | |||
5 | 5 | ||
6 | #ifdef CONFIG_SMP | 6 | #ifdef CONFIG_SMP |
7 | 7 | ||
8 | extern void setup_per_cpu_areas(void); | 8 | #define setup_per_cpu_areas() do { } while (0) |
9 | extern void real_setup_per_cpu_areas(void); | ||
9 | 10 | ||
10 | extern unsigned long __per_cpu_base; | 11 | extern unsigned long __per_cpu_base; |
11 | extern unsigned long __per_cpu_shift; | 12 | extern unsigned long __per_cpu_shift; |
@@ -34,6 +35,7 @@ do { \ | |||
34 | } while (0) | 35 | } while (0) |
35 | #else /* ! SMP */ | 36 | #else /* ! SMP */ |
36 | 37 | ||
38 | #define real_setup_per_cpu_areas() do { } while (0) | ||
37 | #define DEFINE_PER_CPU(type, name) \ | 39 | #define DEFINE_PER_CPU(type, name) \ |
38 | __typeof__(type) per_cpu__##name | 40 | __typeof__(type) per_cpu__##name |
39 | 41 | ||
diff --git a/include/asm-sparc64/prom.h b/include/asm-sparc64/prom.h index ddad5f99ac7f..b4df3042add0 100644 --- a/include/asm-sparc64/prom.h +++ b/include/asm-sparc64/prom.h | |||
@@ -90,6 +90,7 @@ extern struct device_node *of_find_compatible_node(struct device_node *from, | |||
90 | const char *type, const char *compat); | 90 | const char *type, const char *compat); |
91 | extern struct device_node *of_find_node_by_path(const char *path); | 91 | extern struct device_node *of_find_node_by_path(const char *path); |
92 | extern struct device_node *of_find_node_by_phandle(phandle handle); | 92 | extern struct device_node *of_find_node_by_phandle(phandle handle); |
93 | extern struct device_node *of_find_node_by_cpuid(int cpuid); | ||
93 | extern struct device_node *of_get_parent(const struct device_node *node); | 94 | extern struct device_node *of_get_parent(const struct device_node *node); |
94 | extern struct device_node *of_get_next_child(const struct device_node *node, | 95 | extern struct device_node *of_get_next_child(const struct device_node *node, |
95 | struct device_node *prev); | 96 | struct device_node *prev); |
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h index 869d16fb907b..f76e1492add5 100644 --- a/include/asm-sparc64/smp.h +++ b/include/asm-sparc64/smp.h | |||
@@ -41,7 +41,7 @@ extern cpumask_t cpu_sibling_map[NR_CPUS]; | |||
41 | extern int hard_smp_processor_id(void); | 41 | extern int hard_smp_processor_id(void); |
42 | #define raw_smp_processor_id() (current_thread_info()->cpu) | 42 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
43 | 43 | ||
44 | extern void smp_setup_cpu_possible_map(void); | 44 | extern void smp_fill_in_sib_core_maps(void); |
45 | extern unsigned char boot_cpu_id; | 45 | extern unsigned char boot_cpu_id; |
46 | 46 | ||
47 | #endif /* !(__ASSEMBLY__) */ | 47 | #endif /* !(__ASSEMBLY__) */ |
@@ -49,7 +49,7 @@ extern unsigned char boot_cpu_id; | |||
49 | #else | 49 | #else |
50 | 50 | ||
51 | #define hard_smp_processor_id() 0 | 51 | #define hard_smp_processor_id() 0 |
52 | #define smp_setup_cpu_possible_map() do { } while (0) | 52 | #define smp_fill_in_sib_core_maps() do { } while (0) |
53 | #define boot_cpu_id (0) | 53 | #define boot_cpu_id (0) |
54 | 54 | ||
55 | #endif /* !(CONFIG_SMP) */ | 55 | #endif /* !(CONFIG_SMP) */ |
diff --git a/include/asm-sparc64/sstate.h b/include/asm-sparc64/sstate.h new file mode 100644 index 000000000000..a7c35dbcb281 --- /dev/null +++ b/include/asm-sparc64/sstate.h | |||
@@ -0,0 +1,13 @@ | |||
1 | #ifndef _SPARC64_SSTATE_H | ||
2 | #define _SPARC64_SSTATE_H | ||
3 | |||
4 | extern void sstate_booting(void); | ||
5 | extern void sstate_running(void); | ||
6 | extern void sstate_halt(void); | ||
7 | extern void sstate_poweroff(void); | ||
8 | extern void sstate_panic(void); | ||
9 | extern void sstate_reboot(void); | ||
10 | |||
11 | extern void sun4v_sstate_init(void); | ||
12 | |||
13 | #endif /* _SPARC64_SSTATE_H */ | ||
diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h index 2ebf7f27bf91..98252cd44dd6 100644 --- a/include/asm-sparc64/thread_info.h +++ b/include/asm-sparc64/thread_info.h | |||
@@ -38,8 +38,8 @@ struct thread_info { | |||
38 | /* D$ line 1 */ | 38 | /* D$ line 1 */ |
39 | struct task_struct *task; | 39 | struct task_struct *task; |
40 | unsigned long flags; | 40 | unsigned long flags; |
41 | __u8 cpu; | ||
42 | __u8 fpsaved[7]; | 41 | __u8 fpsaved[7]; |
42 | __u8 pad; | ||
43 | unsigned long ksp; | 43 | unsigned long ksp; |
44 | 44 | ||
45 | /* D$ line 2 */ | 45 | /* D$ line 2 */ |
@@ -49,7 +49,7 @@ struct thread_info { | |||
49 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | 49 | int preempt_count; /* 0 => preemptable, <0 => BUG */ |
50 | __u8 new_child; | 50 | __u8 new_child; |
51 | __u8 syscall_noerror; | 51 | __u8 syscall_noerror; |
52 | __u16 __pad; | 52 | __u16 cpu; |
53 | 53 | ||
54 | unsigned long *utraps; | 54 | unsigned long *utraps; |
55 | 55 | ||
@@ -83,8 +83,7 @@ struct thread_info { | |||
83 | #define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) | 83 | #define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) |
84 | #define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) | 84 | #define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) |
85 | #define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) | 85 | #define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) |
86 | #define TI_CPU 0x00000010 | 86 | #define TI_FPSAVED 0x00000010 |
87 | #define TI_FPSAVED 0x00000011 | ||
88 | #define TI_KSP 0x00000018 | 87 | #define TI_KSP 0x00000018 |
89 | #define TI_FAULT_ADDR 0x00000020 | 88 | #define TI_FAULT_ADDR 0x00000020 |
90 | #define TI_KREGS 0x00000028 | 89 | #define TI_KREGS 0x00000028 |
@@ -92,6 +91,7 @@ struct thread_info { | |||
92 | #define TI_PRE_COUNT 0x00000038 | 91 | #define TI_PRE_COUNT 0x00000038 |
93 | #define TI_NEW_CHILD 0x0000003c | 92 | #define TI_NEW_CHILD 0x0000003c |
94 | #define TI_SYS_NOERROR 0x0000003d | 93 | #define TI_SYS_NOERROR 0x0000003d |
94 | #define TI_CPU 0x0000003e | ||
95 | #define TI_UTRAPS 0x00000040 | 95 | #define TI_UTRAPS 0x00000040 |
96 | #define TI_REG_WINDOW 0x00000048 | 96 | #define TI_REG_WINDOW 0x00000048 |
97 | #define TI_RWIN_SPTRS 0x000003c8 | 97 | #define TI_RWIN_SPTRS 0x000003c8 |
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h index 98a6c613589d..e0d450d600ec 100644 --- a/include/asm-sparc64/topology.h +++ b/include/asm-sparc64/topology.h | |||
@@ -6,4 +6,7 @@ | |||
6 | 6 | ||
7 | #include <asm-generic/topology.h> | 7 | #include <asm-generic/topology.h> |
8 | 8 | ||
9 | #define topology_core_id(cpu) (cpu_data(cpu).core_id) | ||
10 | #define topology_thread_siblings(cpu) (cpu_sibling_map[cpu]) | ||
11 | |||
9 | #endif /* _ASM_SPARC64_TOPOLOGY_H */ | 12 | #endif /* _ASM_SPARC64_TOPOLOGY_H */ |
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h index ab55ffcb7bf4..76e4299dd9bc 100644 --- a/include/asm-sparc64/tsb.h +++ b/include/asm-sparc64/tsb.h | |||
@@ -271,7 +271,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; | |||
271 | #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ | 271 | #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ |
272 | sethi %hi(swapper_4m_tsb), REG1; \ | 272 | sethi %hi(swapper_4m_tsb), REG1; \ |
273 | or REG1, %lo(swapper_4m_tsb), REG1; \ | 273 | or REG1, %lo(swapper_4m_tsb), REG1; \ |
274 | and TAG, (KERNEL_TSB_NENTRIES - 1), REG2; \ | 274 | and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ |
275 | sllx REG2, 4, REG2; \ | 275 | sllx REG2, 4, REG2; \ |
276 | add REG1, REG2, REG2; \ | 276 | add REG1, REG2, REG2; \ |
277 | KTSB_LOAD_QUAD(REG2, REG3); \ | 277 | KTSB_LOAD_QUAD(REG2, REG3); \ |
diff --git a/include/linux/timer.h b/include/linux/timer.h index e0c5c16c992f..c661710d3627 100644 --- a/include/linux/timer.h +++ b/include/linux/timer.h | |||
@@ -69,6 +69,12 @@ extern int __mod_timer(struct timer_list *timer, unsigned long expires); | |||
69 | extern int mod_timer(struct timer_list *timer, unsigned long expires); | 69 | extern int mod_timer(struct timer_list *timer, unsigned long expires); |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * The jiffies value which is added to now, when there is no timer | ||
73 | * in the timer wheel: | ||
74 | */ | ||
75 | #define NEXT_TIMER_MAX_DELTA ((1UL << 30) - 1) | ||
76 | |||
77 | /* | ||
72 | * Return when the next timer-wheel timeout occurs (in absolute jiffies), | 78 | * Return when the next timer-wheel timeout occurs (in absolute jiffies), |
73 | * locks the timer base: | 79 | * locks the timer base: |
74 | */ | 80 | */ |