diff options
Diffstat (limited to 'include')
154 files changed, 502 insertions, 9770 deletions
diff --git a/include/asm-arm/.gitignore b/include/asm-arm/.gitignore deleted file mode 100644 index e02c15d158fc..000000000000 --- a/include/asm-arm/.gitignore +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | arch | ||
2 | mach-types.h | ||
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index 37b82cb96c89..e727fe0d1451 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h | |||
@@ -88,7 +88,7 @@ extern void warn_slowpath(const char *file, const int line, | |||
88 | 88 | ||
89 | #else /* !CONFIG_BUG */ | 89 | #else /* !CONFIG_BUG */ |
90 | #ifndef HAVE_ARCH_BUG | 90 | #ifndef HAVE_ARCH_BUG |
91 | #define BUG() | 91 | #define BUG() do {} while(0) |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | #ifndef HAVE_ARCH_BUG_ON | 94 | #ifndef HAVE_ARCH_BUG_ON |
diff --git a/include/asm-generic/percpu.h b/include/asm-generic/percpu.h index b0e63c672ebd..d7d50d7ee51e 100644 --- a/include/asm-generic/percpu.h +++ b/include/asm-generic/percpu.h | |||
@@ -1,13 +1,9 @@ | |||
1 | #ifndef _ASM_GENERIC_PERCPU_H_ | 1 | #ifndef _ASM_GENERIC_PERCPU_H_ |
2 | #define _ASM_GENERIC_PERCPU_H_ | 2 | #define _ASM_GENERIC_PERCPU_H_ |
3 | |||
3 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
4 | #include <linux/threads.h> | 5 | #include <linux/threads.h> |
5 | 6 | #include <linux/percpu-defs.h> | |
6 | /* | ||
7 | * Determine the real variable name from the name visible in the | ||
8 | * kernel sources. | ||
9 | */ | ||
10 | #define per_cpu_var(var) per_cpu__##var | ||
11 | 7 | ||
12 | #ifdef CONFIG_SMP | 8 | #ifdef CONFIG_SMP |
13 | 9 | ||
@@ -73,11 +69,32 @@ extern void setup_per_cpu_areas(void); | |||
73 | 69 | ||
74 | #endif /* SMP */ | 70 | #endif /* SMP */ |
75 | 71 | ||
72 | #ifndef PER_CPU_BASE_SECTION | ||
73 | #ifdef CONFIG_SMP | ||
74 | #define PER_CPU_BASE_SECTION ".data.percpu" | ||
75 | #else | ||
76 | #define PER_CPU_BASE_SECTION ".data" | ||
77 | #endif | ||
78 | #endif | ||
79 | |||
80 | #ifdef CONFIG_SMP | ||
81 | |||
82 | #ifdef MODULE | ||
83 | #define PER_CPU_SHARED_ALIGNED_SECTION "" | ||
84 | #else | ||
85 | #define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned" | ||
86 | #endif | ||
87 | #define PER_CPU_FIRST_SECTION ".first" | ||
88 | |||
89 | #else | ||
90 | |||
91 | #define PER_CPU_SHARED_ALIGNED_SECTION "" | ||
92 | #define PER_CPU_FIRST_SECTION "" | ||
93 | |||
94 | #endif | ||
95 | |||
76 | #ifndef PER_CPU_ATTRIBUTES | 96 | #ifndef PER_CPU_ATTRIBUTES |
77 | #define PER_CPU_ATTRIBUTES | 97 | #define PER_CPU_ATTRIBUTES |
78 | #endif | 98 | #endif |
79 | 99 | ||
80 | #define DECLARE_PER_CPU(type, name) extern PER_CPU_ATTRIBUTES \ | ||
81 | __typeof__(type) per_cpu_var(name) | ||
82 | |||
83 | #endif /* _ASM_GENERIC_PERCPU_H_ */ | 100 | #endif /* _ASM_GENERIC_PERCPU_H_ */ |
diff --git a/include/asm-generic/siginfo.h b/include/asm-generic/siginfo.h index 35752dadd6df..c840719a8c59 100644 --- a/include/asm-generic/siginfo.h +++ b/include/asm-generic/siginfo.h | |||
@@ -201,7 +201,7 @@ typedef struct siginfo { | |||
201 | #define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */ | 201 | #define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */ |
202 | #define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */ | 202 | #define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */ |
203 | #define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint/watchpoint */ | 203 | #define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint/watchpoint */ |
204 | #define NSIGTRAP 2 | 204 | #define NSIGTRAP 4 |
205 | 205 | ||
206 | /* | 206 | /* |
207 | * SIGCHLD si_codes | 207 | * SIGCHLD si_codes |
diff --git a/include/asm-h8300/timer.h b/include/asm-h8300/timer.h deleted file mode 100644 index def80464d38f..000000000000 --- a/include/asm-h8300/timer.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef __H8300_TIMER_H | ||
2 | #define __H8300_TIMER_H | ||
3 | |||
4 | void h8300_timer_tick(void); | ||
5 | void h8300_timer_setup(void); | ||
6 | void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day, | ||
7 | unsigned int *hour, unsigned int *min, unsigned int *sec); | ||
8 | |||
9 | #define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */ | ||
10 | |||
11 | #define calc_param(cnt, div, rate, limit) \ | ||
12 | do { \ | ||
13 | cnt = TIMER_FREQ / HZ; \ | ||
14 | for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \ | ||
15 | if (rate[div] == 0) \ | ||
16 | continue; \ | ||
17 | if ((cnt / rate[div]) > limit) \ | ||
18 | break; \ | ||
19 | } \ | ||
20 | if (div == ARRAY_SIZE(divide_rate)) \ | ||
21 | panic("Timer counter overflow"); \ | ||
22 | cnt /= divide_rate[div]; \ | ||
23 | } while(0) | ||
24 | |||
25 | #endif | ||
diff --git a/include/asm-m32r/Kbuild b/include/asm-m32r/Kbuild deleted file mode 100644 index c68e1680da01..000000000000 --- a/include/asm-m32r/Kbuild +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | include include/asm-generic/Kbuild.asm | ||
diff --git a/include/asm-m32r/addrspace.h b/include/asm-m32r/addrspace.h deleted file mode 100644 index 81782c122da4..000000000000 --- a/include/asm-m32r/addrspace.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 by Hiroyuki Kondo | ||
7 | * | ||
8 | * Defitions for the address spaces of the M32R CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_M32R_ADDRSPACE_H | ||
11 | #define __ASM_M32R_ADDRSPACE_H | ||
12 | |||
13 | /* | ||
14 | * Memory segments (32bit kernel mode addresses) | ||
15 | */ | ||
16 | #define KUSEG 0x00000000 | ||
17 | #define KSEG0 0x80000000 | ||
18 | #define KSEG1 0xa0000000 | ||
19 | #define KSEG2 0xc0000000 | ||
20 | #define KSEG3 0xe0000000 | ||
21 | |||
22 | #define K0BASE KSEG0 | ||
23 | |||
24 | /* | ||
25 | * Returns the kernel segment base of a given address | ||
26 | */ | ||
27 | #ifndef __ASSEMBLY__ | ||
28 | #define KSEGX(a) (((unsigned long)(a)) & 0xe0000000) | ||
29 | #else | ||
30 | #define KSEGX(a) ((a) & 0xe0000000) | ||
31 | #endif | ||
32 | |||
33 | /* | ||
34 | * Returns the physical address of a KSEG0/KSEG1 address | ||
35 | */ | ||
36 | #ifndef __ASSEMBLY__ | ||
37 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | ||
38 | #else | ||
39 | #define PHYSADDR(a) ((a) & 0x1fffffff) | ||
40 | #endif | ||
41 | |||
42 | /* | ||
43 | * Map an address to a certain kernel segment | ||
44 | */ | ||
45 | #ifndef __ASSEMBLY__ | ||
46 | #define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0)) | ||
47 | #define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1)) | ||
48 | #define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2)) | ||
49 | #define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3)) | ||
50 | #else | ||
51 | #define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0) | ||
52 | #define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1) | ||
53 | #define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2) | ||
54 | #define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3) | ||
55 | #endif | ||
56 | |||
57 | #endif /* __ASM_M32R_ADDRSPACE_H */ | ||
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h deleted file mode 100644 index 26351539b5ff..000000000000 --- a/include/asm-m32r/assembler.h +++ /dev/null | |||
@@ -1,229 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_ASSEMBLER_H | ||
2 | #define _ASM_M32R_ASSEMBLER_H | ||
3 | |||
4 | /* | ||
5 | * linux/asm-m32r/assembler.h | ||
6 | * | ||
7 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | * | ||
9 | * This file contains M32R architecture specific macro definitions. | ||
10 | */ | ||
11 | |||
12 | |||
13 | #ifndef __STR | ||
14 | #ifdef __ASSEMBLY__ | ||
15 | #define __STR(x) x | ||
16 | #else | ||
17 | #define __STR(x) #x | ||
18 | #endif | ||
19 | #endif /* __STR */ | ||
20 | |||
21 | #ifdef CONFIG_SMP | ||
22 | #define M32R_LOCK __STR(lock) | ||
23 | #define M32R_UNLOCK __STR(unlock) | ||
24 | #else | ||
25 | #define M32R_LOCK __STR(ld) | ||
26 | #define M32R_UNLOCK __STR(st) | ||
27 | #endif | ||
28 | |||
29 | #ifdef __ASSEMBLY__ | ||
30 | #undef ENTRY | ||
31 | #define ENTRY(name) ENTRY_M name | ||
32 | .macro ENTRY_M name | ||
33 | .global \name | ||
34 | ALIGN | ||
35 | \name: | ||
36 | .endm | ||
37 | #endif | ||
38 | |||
39 | |||
40 | /** | ||
41 | * LDIMM - load immediate value | ||
42 | * STI - enable interruption | ||
43 | * CLI - disable interruption | ||
44 | */ | ||
45 | |||
46 | #ifdef __ASSEMBLY__ | ||
47 | |||
48 | #define LDIMM(reg,x) LDIMM reg x | ||
49 | .macro LDIMM reg x | ||
50 | seth \reg, #high(\x) | ||
51 | or3 \reg, \reg, #low(\x) | ||
52 | .endm | ||
53 | |||
54 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
55 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg | ||
56 | .macro ENABLE_INTERRUPTS reg | ||
57 | setpsw #0x40 -> nop | ||
58 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | ||
59 | .endm | ||
60 | |||
61 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg | ||
62 | .macro DISABLE_INTERRUPTS reg | ||
63 | clrpsw #0x40 -> nop | ||
64 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | ||
65 | .endm | ||
66 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
67 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg | ||
68 | .macro ENABLE_INTERRUPTS reg | ||
69 | mvfc \reg, psw | ||
70 | or3 \reg, \reg, #0x0040 | ||
71 | mvtc \reg, psw | ||
72 | .endm | ||
73 | |||
74 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg | ||
75 | .macro DISABLE_INTERRUPTS reg | ||
76 | mvfc \reg, psw | ||
77 | and3 \reg, \reg, #0xffbf | ||
78 | mvtc \reg, psw | ||
79 | .endm | ||
80 | #endif /* CONFIG_CHIP_M32102 */ | ||
81 | |||
82 | .macro SAVE_ALL | ||
83 | push r0 ; orig_r0 | ||
84 | push sp ; spi (r15) | ||
85 | push lr ; r14 | ||
86 | push r13 | ||
87 | mvfc r13, cr3 ; spu | ||
88 | push r13 | ||
89 | mvfc r13, bbpc | ||
90 | push r13 | ||
91 | mvfc r13, bbpsw | ||
92 | push r13 | ||
93 | mvfc r13, bpc | ||
94 | push r13 | ||
95 | mvfc r13, psw | ||
96 | push r13 | ||
97 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
98 | mvfaclo r13, a1 | ||
99 | push r13 | ||
100 | mvfachi r13, a1 | ||
101 | push r13 | ||
102 | mvfaclo r13, a0 | ||
103 | push r13 | ||
104 | mvfachi r13, a0 | ||
105 | push r13 | ||
106 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
107 | mvfaclo r13 | ||
108 | push r13 | ||
109 | mvfachi r13 | ||
110 | push r13 | ||
111 | ldi r13, #0 | ||
112 | push r13 ; dummy push acc1h | ||
113 | push r13 ; dummy push acc1l | ||
114 | #else | ||
115 | #error unknown isa configuration | ||
116 | #endif | ||
117 | ldi r13, #-1 | ||
118 | push r13 ; syscall_nr (default: -1) | ||
119 | push r12 | ||
120 | push r11 | ||
121 | push r10 | ||
122 | push r9 | ||
123 | push r8 | ||
124 | push r7 | ||
125 | push r3 | ||
126 | push r2 | ||
127 | push r1 | ||
128 | push r0 | ||
129 | addi sp, #-4 ; room for implicit pt_regs parameter | ||
130 | push r6 | ||
131 | push r5 | ||
132 | push r4 | ||
133 | .endm | ||
134 | |||
135 | .macro RESTORE_ALL | ||
136 | pop r4 | ||
137 | pop r5 | ||
138 | pop r6 | ||
139 | addi sp, #4 | ||
140 | pop r0 | ||
141 | pop r1 | ||
142 | pop r2 | ||
143 | pop r3 | ||
144 | pop r7 | ||
145 | pop r8 | ||
146 | pop r9 | ||
147 | pop r10 | ||
148 | pop r11 | ||
149 | pop r12 | ||
150 | addi r15, #4 ; Skip syscall number | ||
151 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
152 | pop r13 | ||
153 | mvtachi r13, a0 | ||
154 | pop r13 | ||
155 | mvtaclo r13, a0 | ||
156 | pop r13 | ||
157 | mvtachi r13, a1 | ||
158 | pop r13 | ||
159 | mvtaclo r13, a1 | ||
160 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
161 | pop r13 ; dummy pop acc1h | ||
162 | pop r13 ; dummy pop acc1l | ||
163 | pop r13 | ||
164 | mvtachi r13 | ||
165 | pop r13 | ||
166 | mvtaclo r13 | ||
167 | #else | ||
168 | #error unknown isa configuration | ||
169 | #endif | ||
170 | pop r14 | ||
171 | mvtc r14, psw | ||
172 | pop r14 | ||
173 | mvtc r14, bpc | ||
174 | addi sp, #8 ; Skip bbpsw, bbpc | ||
175 | pop r14 | ||
176 | mvtc r14, cr3 ; spu | ||
177 | pop r13 | ||
178 | pop lr ; r14 | ||
179 | pop sp ; spi (r15) | ||
180 | addi sp, #4 ; Skip orig_r0 | ||
181 | .fillinsn | ||
182 | 1: rte | ||
183 | .section .fixup,"ax" | ||
184 | 2: bl do_exit | ||
185 | .previous | ||
186 | .section __ex_table,"a" | ||
187 | ALIGN | ||
188 | .long 1b, 2b | ||
189 | .previous | ||
190 | .endm | ||
191 | |||
192 | #define GET_CURRENT(reg) get_current reg | ||
193 | .macro get_current reg | ||
194 | ldi \reg, #-8192 | ||
195 | and \reg, sp | ||
196 | .endm | ||
197 | |||
198 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
199 | .macro SWITCH_TO_KERNEL_STACK | ||
200 | ; switch to kernel stack (spi) | ||
201 | clrpsw #0x80 -> nop | ||
202 | .endm | ||
203 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
204 | .macro SWITCH_TO_KERNEL_STACK | ||
205 | push r0 ; save r0 for working | ||
206 | mvfc r0, psw | ||
207 | and3 r0, r0, #0x00ff7f | ||
208 | mvtc r0, psw | ||
209 | slli r0, #16 | ||
210 | bltz r0, 1f ; check BSM-bit | ||
211 | ; | ||
212 | ;; called from kernel context: previous stack = spi | ||
213 | pop r0 ; retrieve r0 | ||
214 | bra 2f | ||
215 | .fillinsn | ||
216 | 1: | ||
217 | ;; called from user context: previous stack = spu | ||
218 | mvfc r0, cr3 ; spu | ||
219 | addi r0, #4 | ||
220 | mvtc r0, cr3 ; spu | ||
221 | ld r0, @(-4,r0) ; retrieve r0 | ||
222 | .fillinsn | ||
223 | 2: | ||
224 | .endm | ||
225 | #endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
226 | |||
227 | #endif /* __ASSEMBLY__ */ | ||
228 | |||
229 | #endif /* _ASM_M32R_ASSEMBLER_H */ | ||
diff --git a/include/asm-m32r/atomic.h b/include/asm-m32r/atomic.h deleted file mode 100644 index 2eed30f84080..000000000000 --- a/include/asm-m32r/atomic.h +++ /dev/null | |||
@@ -1,318 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_ATOMIC_H | ||
2 | #define _ASM_M32R_ATOMIC_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/atomic.h | ||
6 | * | ||
7 | * M32R version: | ||
8 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
9 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <asm/assembler.h> | ||
14 | #include <asm/system.h> | ||
15 | |||
16 | /* | ||
17 | * Atomic operations that C can't guarantee us. Useful for | ||
18 | * resource counting etc.. | ||
19 | */ | ||
20 | |||
21 | #define ATOMIC_INIT(i) { (i) } | ||
22 | |||
23 | /** | ||
24 | * atomic_read - read atomic variable | ||
25 | * @v: pointer of type atomic_t | ||
26 | * | ||
27 | * Atomically reads the value of @v. | ||
28 | */ | ||
29 | #define atomic_read(v) ((v)->counter) | ||
30 | |||
31 | /** | ||
32 | * atomic_set - set atomic variable | ||
33 | * @v: pointer of type atomic_t | ||
34 | * @i: required value | ||
35 | * | ||
36 | * Atomically sets the value of @v to @i. | ||
37 | */ | ||
38 | #define atomic_set(v,i) (((v)->counter) = (i)) | ||
39 | |||
40 | /** | ||
41 | * atomic_add_return - add integer to atomic variable and return it | ||
42 | * @i: integer value to add | ||
43 | * @v: pointer of type atomic_t | ||
44 | * | ||
45 | * Atomically adds @i to @v and return (@i + @v). | ||
46 | */ | ||
47 | static __inline__ int atomic_add_return(int i, atomic_t *v) | ||
48 | { | ||
49 | unsigned long flags; | ||
50 | int result; | ||
51 | |||
52 | local_irq_save(flags); | ||
53 | __asm__ __volatile__ ( | ||
54 | "# atomic_add_return \n\t" | ||
55 | DCACHE_CLEAR("%0", "r4", "%1") | ||
56 | M32R_LOCK" %0, @%1; \n\t" | ||
57 | "add %0, %2; \n\t" | ||
58 | M32R_UNLOCK" %0, @%1; \n\t" | ||
59 | : "=&r" (result) | ||
60 | : "r" (&v->counter), "r" (i) | ||
61 | : "memory" | ||
62 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
63 | , "r4" | ||
64 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
65 | ); | ||
66 | local_irq_restore(flags); | ||
67 | |||
68 | return result; | ||
69 | } | ||
70 | |||
71 | /** | ||
72 | * atomic_sub_return - subtract integer from atomic variable and return it | ||
73 | * @i: integer value to subtract | ||
74 | * @v: pointer of type atomic_t | ||
75 | * | ||
76 | * Atomically subtracts @i from @v and return (@v - @i). | ||
77 | */ | ||
78 | static __inline__ int atomic_sub_return(int i, atomic_t *v) | ||
79 | { | ||
80 | unsigned long flags; | ||
81 | int result; | ||
82 | |||
83 | local_irq_save(flags); | ||
84 | __asm__ __volatile__ ( | ||
85 | "# atomic_sub_return \n\t" | ||
86 | DCACHE_CLEAR("%0", "r4", "%1") | ||
87 | M32R_LOCK" %0, @%1; \n\t" | ||
88 | "sub %0, %2; \n\t" | ||
89 | M32R_UNLOCK" %0, @%1; \n\t" | ||
90 | : "=&r" (result) | ||
91 | : "r" (&v->counter), "r" (i) | ||
92 | : "memory" | ||
93 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
94 | , "r4" | ||
95 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
96 | ); | ||
97 | local_irq_restore(flags); | ||
98 | |||
99 | return result; | ||
100 | } | ||
101 | |||
102 | /** | ||
103 | * atomic_add - add integer to atomic variable | ||
104 | * @i: integer value to add | ||
105 | * @v: pointer of type atomic_t | ||
106 | * | ||
107 | * Atomically adds @i to @v. | ||
108 | */ | ||
109 | #define atomic_add(i,v) ((void) atomic_add_return((i), (v))) | ||
110 | |||
111 | /** | ||
112 | * atomic_sub - subtract the atomic variable | ||
113 | * @i: integer value to subtract | ||
114 | * @v: pointer of type atomic_t | ||
115 | * | ||
116 | * Atomically subtracts @i from @v. | ||
117 | */ | ||
118 | #define atomic_sub(i,v) ((void) atomic_sub_return((i), (v))) | ||
119 | |||
120 | /** | ||
121 | * atomic_sub_and_test - subtract value from variable and test result | ||
122 | * @i: integer value to subtract | ||
123 | * @v: pointer of type atomic_t | ||
124 | * | ||
125 | * Atomically subtracts @i from @v and returns | ||
126 | * true if the result is zero, or false for all | ||
127 | * other cases. | ||
128 | */ | ||
129 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | ||
130 | |||
131 | /** | ||
132 | * atomic_inc_return - increment atomic variable and return it | ||
133 | * @v: pointer of type atomic_t | ||
134 | * | ||
135 | * Atomically increments @v by 1 and returns the result. | ||
136 | */ | ||
137 | static __inline__ int atomic_inc_return(atomic_t *v) | ||
138 | { | ||
139 | unsigned long flags; | ||
140 | int result; | ||
141 | |||
142 | local_irq_save(flags); | ||
143 | __asm__ __volatile__ ( | ||
144 | "# atomic_inc_return \n\t" | ||
145 | DCACHE_CLEAR("%0", "r4", "%1") | ||
146 | M32R_LOCK" %0, @%1; \n\t" | ||
147 | "addi %0, #1; \n\t" | ||
148 | M32R_UNLOCK" %0, @%1; \n\t" | ||
149 | : "=&r" (result) | ||
150 | : "r" (&v->counter) | ||
151 | : "memory" | ||
152 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
153 | , "r4" | ||
154 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
155 | ); | ||
156 | local_irq_restore(flags); | ||
157 | |||
158 | return result; | ||
159 | } | ||
160 | |||
161 | /** | ||
162 | * atomic_dec_return - decrement atomic variable and return it | ||
163 | * @v: pointer of type atomic_t | ||
164 | * | ||
165 | * Atomically decrements @v by 1 and returns the result. | ||
166 | */ | ||
167 | static __inline__ int atomic_dec_return(atomic_t *v) | ||
168 | { | ||
169 | unsigned long flags; | ||
170 | int result; | ||
171 | |||
172 | local_irq_save(flags); | ||
173 | __asm__ __volatile__ ( | ||
174 | "# atomic_dec_return \n\t" | ||
175 | DCACHE_CLEAR("%0", "r4", "%1") | ||
176 | M32R_LOCK" %0, @%1; \n\t" | ||
177 | "addi %0, #-1; \n\t" | ||
178 | M32R_UNLOCK" %0, @%1; \n\t" | ||
179 | : "=&r" (result) | ||
180 | : "r" (&v->counter) | ||
181 | : "memory" | ||
182 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
183 | , "r4" | ||
184 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
185 | ); | ||
186 | local_irq_restore(flags); | ||
187 | |||
188 | return result; | ||
189 | } | ||
190 | |||
191 | /** | ||
192 | * atomic_inc - increment atomic variable | ||
193 | * @v: pointer of type atomic_t | ||
194 | * | ||
195 | * Atomically increments @v by 1. | ||
196 | */ | ||
197 | #define atomic_inc(v) ((void)atomic_inc_return(v)) | ||
198 | |||
199 | /** | ||
200 | * atomic_dec - decrement atomic variable | ||
201 | * @v: pointer of type atomic_t | ||
202 | * | ||
203 | * Atomically decrements @v by 1. | ||
204 | */ | ||
205 | #define atomic_dec(v) ((void)atomic_dec_return(v)) | ||
206 | |||
207 | /** | ||
208 | * atomic_inc_and_test - increment and test | ||
209 | * @v: pointer of type atomic_t | ||
210 | * | ||
211 | * Atomically increments @v by 1 | ||
212 | * and returns true if the result is zero, or false for all | ||
213 | * other cases. | ||
214 | */ | ||
215 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
216 | |||
217 | /** | ||
218 | * atomic_dec_and_test - decrement and test | ||
219 | * @v: pointer of type atomic_t | ||
220 | * | ||
221 | * Atomically decrements @v by 1 and | ||
222 | * returns true if the result is 0, or false for all | ||
223 | * other cases. | ||
224 | */ | ||
225 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) | ||
226 | |||
227 | /** | ||
228 | * atomic_add_negative - add and test if negative | ||
229 | * @v: pointer of type atomic_t | ||
230 | * @i: integer value to add | ||
231 | * | ||
232 | * Atomically adds @i to @v and returns true | ||
233 | * if the result is negative, or false when | ||
234 | * result is greater than or equal to zero. | ||
235 | */ | ||
236 | #define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0) | ||
237 | |||
238 | #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) | ||
239 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
240 | |||
241 | /** | ||
242 | * atomic_add_unless - add unless the number is a given value | ||
243 | * @v: pointer of type atomic_t | ||
244 | * @a: the amount to add to v... | ||
245 | * @u: ...unless v is equal to u. | ||
246 | * | ||
247 | * Atomically adds @a to @v, so long as it was not @u. | ||
248 | * Returns non-zero if @v was not @u, and zero otherwise. | ||
249 | */ | ||
250 | static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | ||
251 | { | ||
252 | int c, old; | ||
253 | c = atomic_read(v); | ||
254 | for (;;) { | ||
255 | if (unlikely(c == (u))) | ||
256 | break; | ||
257 | old = atomic_cmpxchg((v), c, c + (a)); | ||
258 | if (likely(old == c)) | ||
259 | break; | ||
260 | c = old; | ||
261 | } | ||
262 | return c != (u); | ||
263 | } | ||
264 | |||
265 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
266 | |||
267 | static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr) | ||
268 | { | ||
269 | unsigned long flags; | ||
270 | unsigned long tmp; | ||
271 | |||
272 | local_irq_save(flags); | ||
273 | __asm__ __volatile__ ( | ||
274 | "# atomic_clear_mask \n\t" | ||
275 | DCACHE_CLEAR("%0", "r5", "%1") | ||
276 | M32R_LOCK" %0, @%1; \n\t" | ||
277 | "and %0, %2; \n\t" | ||
278 | M32R_UNLOCK" %0, @%1; \n\t" | ||
279 | : "=&r" (tmp) | ||
280 | : "r" (addr), "r" (~mask) | ||
281 | : "memory" | ||
282 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
283 | , "r5" | ||
284 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
285 | ); | ||
286 | local_irq_restore(flags); | ||
287 | } | ||
288 | |||
289 | static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr) | ||
290 | { | ||
291 | unsigned long flags; | ||
292 | unsigned long tmp; | ||
293 | |||
294 | local_irq_save(flags); | ||
295 | __asm__ __volatile__ ( | ||
296 | "# atomic_set_mask \n\t" | ||
297 | DCACHE_CLEAR("%0", "r5", "%1") | ||
298 | M32R_LOCK" %0, @%1; \n\t" | ||
299 | "or %0, %2; \n\t" | ||
300 | M32R_UNLOCK" %0, @%1; \n\t" | ||
301 | : "=&r" (tmp) | ||
302 | : "r" (addr), "r" (mask) | ||
303 | : "memory" | ||
304 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
305 | , "r5" | ||
306 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
307 | ); | ||
308 | local_irq_restore(flags); | ||
309 | } | ||
310 | |||
311 | /* Atomic operations are already serializing on m32r */ | ||
312 | #define smp_mb__before_atomic_dec() barrier() | ||
313 | #define smp_mb__after_atomic_dec() barrier() | ||
314 | #define smp_mb__before_atomic_inc() barrier() | ||
315 | #define smp_mb__after_atomic_inc() barrier() | ||
316 | |||
317 | #include <asm-generic/atomic.h> | ||
318 | #endif /* _ASM_M32R_ATOMIC_H */ | ||
diff --git a/include/asm-m32r/auxvec.h b/include/asm-m32r/auxvec.h deleted file mode 100644 index f76dcc860fae..000000000000 --- a/include/asm-m32r/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _ASM_M32R__AUXVEC_H | ||
2 | #define _ASM_M32R__AUXVEC_H | ||
3 | |||
4 | #endif /* _ASM_M32R__AUXVEC_H */ | ||
diff --git a/include/asm-m32r/bitops.h b/include/asm-m32r/bitops.h deleted file mode 100644 index aaddf0d57603..000000000000 --- a/include/asm-m32r/bitops.h +++ /dev/null | |||
@@ -1,275 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_BITOPS_H | ||
2 | #define _ASM_M32R_BITOPS_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/bitops.h | ||
6 | * | ||
7 | * Copyright 1992, Linus Torvalds. | ||
8 | * | ||
9 | * M32R version: | ||
10 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
11 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef _LINUX_BITOPS_H | ||
15 | #error only <linux/bitops.h> can be included directly | ||
16 | #endif | ||
17 | |||
18 | #include <linux/compiler.h> | ||
19 | #include <asm/assembler.h> | ||
20 | #include <asm/system.h> | ||
21 | #include <asm/byteorder.h> | ||
22 | #include <asm/types.h> | ||
23 | |||
24 | /* | ||
25 | * These have to be done with inline assembly: that way the bit-setting | ||
26 | * is guaranteed to be atomic. All bit operations return 0 if the bit | ||
27 | * was cleared before the operation and != 0 if it was not. | ||
28 | * | ||
29 | * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). | ||
30 | */ | ||
31 | |||
32 | /** | ||
33 | * set_bit - Atomically set a bit in memory | ||
34 | * @nr: the bit to set | ||
35 | * @addr: the address to start counting from | ||
36 | * | ||
37 | * This function is atomic and may not be reordered. See __set_bit() | ||
38 | * if you do not require the atomic guarantees. | ||
39 | * Note that @nr may be almost arbitrarily large; this function is not | ||
40 | * restricted to acting on a single-word quantity. | ||
41 | */ | ||
42 | static __inline__ void set_bit(int nr, volatile void * addr) | ||
43 | { | ||
44 | __u32 mask; | ||
45 | volatile __u32 *a = addr; | ||
46 | unsigned long flags; | ||
47 | unsigned long tmp; | ||
48 | |||
49 | a += (nr >> 5); | ||
50 | mask = (1 << (nr & 0x1F)); | ||
51 | |||
52 | local_irq_save(flags); | ||
53 | __asm__ __volatile__ ( | ||
54 | DCACHE_CLEAR("%0", "r6", "%1") | ||
55 | M32R_LOCK" %0, @%1; \n\t" | ||
56 | "or %0, %2; \n\t" | ||
57 | M32R_UNLOCK" %0, @%1; \n\t" | ||
58 | : "=&r" (tmp) | ||
59 | : "r" (a), "r" (mask) | ||
60 | : "memory" | ||
61 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
62 | , "r6" | ||
63 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
64 | ); | ||
65 | local_irq_restore(flags); | ||
66 | } | ||
67 | |||
68 | /** | ||
69 | * clear_bit - Clears a bit in memory | ||
70 | * @nr: Bit to clear | ||
71 | * @addr: Address to start counting from | ||
72 | * | ||
73 | * clear_bit() is atomic and may not be reordered. However, it does | ||
74 | * not contain a memory barrier, so if it is used for locking purposes, | ||
75 | * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() | ||
76 | * in order to ensure changes are visible on other processors. | ||
77 | */ | ||
78 | static __inline__ void clear_bit(int nr, volatile void * addr) | ||
79 | { | ||
80 | __u32 mask; | ||
81 | volatile __u32 *a = addr; | ||
82 | unsigned long flags; | ||
83 | unsigned long tmp; | ||
84 | |||
85 | a += (nr >> 5); | ||
86 | mask = (1 << (nr & 0x1F)); | ||
87 | |||
88 | local_irq_save(flags); | ||
89 | |||
90 | __asm__ __volatile__ ( | ||
91 | DCACHE_CLEAR("%0", "r6", "%1") | ||
92 | M32R_LOCK" %0, @%1; \n\t" | ||
93 | "and %0, %2; \n\t" | ||
94 | M32R_UNLOCK" %0, @%1; \n\t" | ||
95 | : "=&r" (tmp) | ||
96 | : "r" (a), "r" (~mask) | ||
97 | : "memory" | ||
98 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
99 | , "r6" | ||
100 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
101 | ); | ||
102 | local_irq_restore(flags); | ||
103 | } | ||
104 | |||
105 | #define smp_mb__before_clear_bit() barrier() | ||
106 | #define smp_mb__after_clear_bit() barrier() | ||
107 | |||
108 | /** | ||
109 | * change_bit - Toggle a bit in memory | ||
110 | * @nr: Bit to clear | ||
111 | * @addr: Address to start counting from | ||
112 | * | ||
113 | * change_bit() is atomic and may not be reordered. | ||
114 | * Note that @nr may be almost arbitrarily large; this function is not | ||
115 | * restricted to acting on a single-word quantity. | ||
116 | */ | ||
117 | static __inline__ void change_bit(int nr, volatile void * addr) | ||
118 | { | ||
119 | __u32 mask; | ||
120 | volatile __u32 *a = addr; | ||
121 | unsigned long flags; | ||
122 | unsigned long tmp; | ||
123 | |||
124 | a += (nr >> 5); | ||
125 | mask = (1 << (nr & 0x1F)); | ||
126 | |||
127 | local_irq_save(flags); | ||
128 | __asm__ __volatile__ ( | ||
129 | DCACHE_CLEAR("%0", "r6", "%1") | ||
130 | M32R_LOCK" %0, @%1; \n\t" | ||
131 | "xor %0, %2; \n\t" | ||
132 | M32R_UNLOCK" %0, @%1; \n\t" | ||
133 | : "=&r" (tmp) | ||
134 | : "r" (a), "r" (mask) | ||
135 | : "memory" | ||
136 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
137 | , "r6" | ||
138 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
139 | ); | ||
140 | local_irq_restore(flags); | ||
141 | } | ||
142 | |||
143 | /** | ||
144 | * test_and_set_bit - Set a bit and return its old value | ||
145 | * @nr: Bit to set | ||
146 | * @addr: Address to count from | ||
147 | * | ||
148 | * This operation is atomic and cannot be reordered. | ||
149 | * It also implies a memory barrier. | ||
150 | */ | ||
151 | static __inline__ int test_and_set_bit(int nr, volatile void * addr) | ||
152 | { | ||
153 | __u32 mask, oldbit; | ||
154 | volatile __u32 *a = addr; | ||
155 | unsigned long flags; | ||
156 | unsigned long tmp; | ||
157 | |||
158 | a += (nr >> 5); | ||
159 | mask = (1 << (nr & 0x1F)); | ||
160 | |||
161 | local_irq_save(flags); | ||
162 | __asm__ __volatile__ ( | ||
163 | DCACHE_CLEAR("%0", "%1", "%2") | ||
164 | M32R_LOCK" %0, @%2; \n\t" | ||
165 | "mv %1, %0; \n\t" | ||
166 | "and %0, %3; \n\t" | ||
167 | "or %1, %3; \n\t" | ||
168 | M32R_UNLOCK" %1, @%2; \n\t" | ||
169 | : "=&r" (oldbit), "=&r" (tmp) | ||
170 | : "r" (a), "r" (mask) | ||
171 | : "memory" | ||
172 | ); | ||
173 | local_irq_restore(flags); | ||
174 | |||
175 | return (oldbit != 0); | ||
176 | } | ||
177 | |||
178 | /** | ||
179 | * test_and_clear_bit - Clear a bit and return its old value | ||
180 | * @nr: Bit to set | ||
181 | * @addr: Address to count from | ||
182 | * | ||
183 | * This operation is atomic and cannot be reordered. | ||
184 | * It also implies a memory barrier. | ||
185 | */ | ||
186 | static __inline__ int test_and_clear_bit(int nr, volatile void * addr) | ||
187 | { | ||
188 | __u32 mask, oldbit; | ||
189 | volatile __u32 *a = addr; | ||
190 | unsigned long flags; | ||
191 | unsigned long tmp; | ||
192 | |||
193 | a += (nr >> 5); | ||
194 | mask = (1 << (nr & 0x1F)); | ||
195 | |||
196 | local_irq_save(flags); | ||
197 | |||
198 | __asm__ __volatile__ ( | ||
199 | DCACHE_CLEAR("%0", "%1", "%3") | ||
200 | M32R_LOCK" %0, @%3; \n\t" | ||
201 | "mv %1, %0; \n\t" | ||
202 | "and %0, %2; \n\t" | ||
203 | "not %2, %2; \n\t" | ||
204 | "and %1, %2; \n\t" | ||
205 | M32R_UNLOCK" %1, @%3; \n\t" | ||
206 | : "=&r" (oldbit), "=&r" (tmp), "+r" (mask) | ||
207 | : "r" (a) | ||
208 | : "memory" | ||
209 | ); | ||
210 | local_irq_restore(flags); | ||
211 | |||
212 | return (oldbit != 0); | ||
213 | } | ||
214 | |||
215 | /** | ||
216 | * test_and_change_bit - Change a bit and return its old value | ||
217 | * @nr: Bit to set | ||
218 | * @addr: Address to count from | ||
219 | * | ||
220 | * This operation is atomic and cannot be reordered. | ||
221 | * It also implies a memory barrier. | ||
222 | */ | ||
223 | static __inline__ int test_and_change_bit(int nr, volatile void * addr) | ||
224 | { | ||
225 | __u32 mask, oldbit; | ||
226 | volatile __u32 *a = addr; | ||
227 | unsigned long flags; | ||
228 | unsigned long tmp; | ||
229 | |||
230 | a += (nr >> 5); | ||
231 | mask = (1 << (nr & 0x1F)); | ||
232 | |||
233 | local_irq_save(flags); | ||
234 | __asm__ __volatile__ ( | ||
235 | DCACHE_CLEAR("%0", "%1", "%2") | ||
236 | M32R_LOCK" %0, @%2; \n\t" | ||
237 | "mv %1, %0; \n\t" | ||
238 | "and %0, %3; \n\t" | ||
239 | "xor %1, %3; \n\t" | ||
240 | M32R_UNLOCK" %1, @%2; \n\t" | ||
241 | : "=&r" (oldbit), "=&r" (tmp) | ||
242 | : "r" (a), "r" (mask) | ||
243 | : "memory" | ||
244 | ); | ||
245 | local_irq_restore(flags); | ||
246 | |||
247 | return (oldbit != 0); | ||
248 | } | ||
249 | |||
250 | #include <asm-generic/bitops/non-atomic.h> | ||
251 | #include <asm-generic/bitops/ffz.h> | ||
252 | #include <asm-generic/bitops/__ffs.h> | ||
253 | #include <asm-generic/bitops/fls.h> | ||
254 | #include <asm-generic/bitops/__fls.h> | ||
255 | #include <asm-generic/bitops/fls64.h> | ||
256 | |||
257 | #ifdef __KERNEL__ | ||
258 | |||
259 | #include <asm-generic/bitops/sched.h> | ||
260 | #include <asm-generic/bitops/find.h> | ||
261 | #include <asm-generic/bitops/ffs.h> | ||
262 | #include <asm-generic/bitops/hweight.h> | ||
263 | #include <asm-generic/bitops/lock.h> | ||
264 | |||
265 | #endif /* __KERNEL__ */ | ||
266 | |||
267 | #ifdef __KERNEL__ | ||
268 | |||
269 | #include <asm-generic/bitops/ext2-non-atomic.h> | ||
270 | #include <asm-generic/bitops/ext2-atomic.h> | ||
271 | #include <asm-generic/bitops/minix.h> | ||
272 | |||
273 | #endif /* __KERNEL__ */ | ||
274 | |||
275 | #endif /* _ASM_M32R_BITOPS_H */ | ||
diff --git a/include/asm-m32r/bug.h b/include/asm-m32r/bug.h deleted file mode 100644 index 4cc0462c15b8..000000000000 --- a/include/asm-m32r/bug.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _M32R_BUG_H | ||
2 | #define _M32R_BUG_H | ||
3 | #include <asm-generic/bug.h> | ||
4 | #endif | ||
diff --git a/include/asm-m32r/bugs.h b/include/asm-m32r/bugs.h deleted file mode 100644 index f77214eff136..000000000000 --- a/include/asm-m32r/bugs.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_BUGS_H | ||
2 | #define _ASM_M32R_BUGS_H | ||
3 | |||
4 | /* | ||
5 | * This is included by init/main.c to check for architecture-dependent bugs. | ||
6 | * | ||
7 | * Needs: | ||
8 | * void check_bugs(void); | ||
9 | */ | ||
10 | #include <asm/processor.h> | ||
11 | |||
12 | static void __init check_bugs(void) | ||
13 | { | ||
14 | extern unsigned long loops_per_jiffy; | ||
15 | |||
16 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; | ||
17 | } | ||
18 | |||
19 | #endif /* _ASM_M32R_BUGS_H */ | ||
diff --git a/include/asm-m32r/byteorder.h b/include/asm-m32r/byteorder.h deleted file mode 100644 index 21855d8b028b..000000000000 --- a/include/asm-m32r/byteorder.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_BYTEORDER_H | ||
2 | #define _ASM_M32R_BYTEORDER_H | ||
3 | |||
4 | #if defined(__LITTLE_ENDIAN__) | ||
5 | # include <linux/byteorder/little_endian.h> | ||
6 | #else | ||
7 | # include <linux/byteorder/big_endian.h> | ||
8 | #endif | ||
9 | |||
10 | #endif /* _ASM_M32R_BYTEORDER_H */ | ||
diff --git a/include/asm-m32r/cache.h b/include/asm-m32r/cache.h deleted file mode 100644 index 40b3ee98193d..000000000000 --- a/include/asm-m32r/cache.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_CACHE_H | ||
2 | #define _ASM_M32R_CACHE_H | ||
3 | |||
4 | /* L1 cache line size */ | ||
5 | #define L1_CACHE_SHIFT 4 | ||
6 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
7 | |||
8 | #endif /* _ASM_M32R_CACHE_H */ | ||
diff --git a/include/asm-m32r/cachectl.h b/include/asm-m32r/cachectl.h deleted file mode 100644 index 2aab8f6fff41..000000000000 --- a/include/asm-m32r/cachectl.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * cachectl.h -- defines for M32R cache control system calls | ||
3 | * | ||
4 | * Copyright (C) 2003 by Kazuhiro Inaoka | ||
5 | */ | ||
6 | #ifndef __ASM_M32R_CACHECTL | ||
7 | #define __ASM_M32R_CACHECTL | ||
8 | |||
9 | /* | ||
10 | * Options for cacheflush system call | ||
11 | * | ||
12 | * cacheflush() is currently fluch_cache_all(). | ||
13 | */ | ||
14 | #define ICACHE (1<<0) /* flush instruction cache */ | ||
15 | #define DCACHE (1<<1) /* writeback and flush data cache */ | ||
16 | #define BCACHE (ICACHE|DCACHE) /* flush both caches */ | ||
17 | |||
18 | /* | ||
19 | * Caching modes for the cachectl(2) call | ||
20 | * | ||
21 | * cachectl(2) is currently not supported and returns ENOSYS. | ||
22 | */ | ||
23 | #define CACHEABLE 0 /* make pages cacheable */ | ||
24 | #define UNCACHEABLE 1 /* make pages uncacheable */ | ||
25 | |||
26 | #endif /* __ASM_M32R_CACHECTL */ | ||
diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h deleted file mode 100644 index 78587c958146..000000000000 --- a/include/asm-m32r/cacheflush.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_CACHEFLUSH_H | ||
2 | #define _ASM_M32R_CACHEFLUSH_H | ||
3 | |||
4 | #include <linux/mm.h> | ||
5 | |||
6 | extern void _flush_cache_all(void); | ||
7 | extern void _flush_cache_copyback_all(void); | ||
8 | |||
9 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
10 | #define flush_cache_all() do { } while (0) | ||
11 | #define flush_cache_mm(mm) do { } while (0) | ||
12 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
13 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
14 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
15 | #define flush_dcache_page(page) do { } while (0) | ||
16 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
17 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
18 | #ifndef CONFIG_SMP | ||
19 | #define flush_icache_range(start, end) _flush_cache_copyback_all() | ||
20 | #define flush_icache_page(vma,pg) _flush_cache_copyback_all() | ||
21 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all() | ||
22 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | ||
23 | #else /* CONFIG_SMP */ | ||
24 | extern void smp_flush_cache_all(void); | ||
25 | #define flush_icache_range(start, end) smp_flush_cache_all() | ||
26 | #define flush_icache_page(vma,pg) smp_flush_cache_all() | ||
27 | #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all() | ||
28 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | ||
29 | #endif /* CONFIG_SMP */ | ||
30 | #elif defined(CONFIG_CHIP_M32102) | ||
31 | #define flush_cache_all() do { } while (0) | ||
32 | #define flush_cache_mm(mm) do { } while (0) | ||
33 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
34 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
35 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
36 | #define flush_dcache_page(page) do { } while (0) | ||
37 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
38 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
39 | #define flush_icache_range(start, end) _flush_cache_all() | ||
40 | #define flush_icache_page(vma,pg) _flush_cache_all() | ||
41 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all() | ||
42 | #define flush_cache_sigtramp(addr) _flush_cache_all() | ||
43 | #else | ||
44 | #define flush_cache_all() do { } while (0) | ||
45 | #define flush_cache_mm(mm) do { } while (0) | ||
46 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
47 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
48 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
49 | #define flush_dcache_page(page) do { } while (0) | ||
50 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
51 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
52 | #define flush_icache_range(start, end) do { } while (0) | ||
53 | #define flush_icache_page(vma,pg) do { } while (0) | ||
54 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
55 | #define flush_cache_sigtramp(addr) do { } while (0) | ||
56 | #endif /* CONFIG_CHIP_* */ | ||
57 | |||
58 | #define flush_cache_vmap(start, end) do { } while (0) | ||
59 | #define flush_cache_vunmap(start, end) do { } while (0) | ||
60 | |||
61 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
62 | do { \ | ||
63 | memcpy(dst, src, len); \ | ||
64 | flush_icache_user_range(vma, page, vaddr, len); \ | ||
65 | } while (0) | ||
66 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
67 | memcpy(dst, src, len) | ||
68 | |||
69 | #endif /* _ASM_M32R_CACHEFLUSH_H */ | ||
diff --git a/include/asm-m32r/checksum.h b/include/asm-m32r/checksum.h deleted file mode 100644 index a7a7c4f44abe..000000000000 --- a/include/asm-m32r/checksum.h +++ /dev/null | |||
@@ -1,204 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _ASM_M32R_CHECKSUM_H | ||
3 | #define _ASM_M32R_CHECKSUM_H | ||
4 | |||
5 | /* | ||
6 | * include/asm-m32r/checksum.h | ||
7 | * | ||
8 | * IP/TCP/UDP checksum routines | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | * | ||
14 | * Some code taken from mips and parisc architecture. | ||
15 | * | ||
16 | * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata | ||
17 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
18 | */ | ||
19 | |||
20 | #include <linux/in6.h> | ||
21 | |||
22 | /* | ||
23 | * computes the checksum of a memory block at buff, length len, | ||
24 | * and adds in "sum" (32-bit) | ||
25 | * | ||
26 | * returns a 32-bit number suitable for feeding into itself | ||
27 | * or csum_tcpudp_magic | ||
28 | * | ||
29 | * this function must be called with even lengths, except | ||
30 | * for the last fragment, which may be odd | ||
31 | * | ||
32 | * it's best to have buff aligned on a 32-bit boundary | ||
33 | */ | ||
34 | asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
35 | |||
36 | /* | ||
37 | * The same as csum_partial, but copies from src while it checksums. | ||
38 | * | ||
39 | * Here even more important to align src and dst on a 32-bit (or even | ||
40 | * better 64-bit) boundary | ||
41 | */ | ||
42 | extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, | ||
43 | int len, __wsum sum); | ||
44 | |||
45 | /* | ||
46 | * This is a new version of the above that records errors it finds in *errp, | ||
47 | * but continues and zeros thre rest of the buffer. | ||
48 | */ | ||
49 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
50 | int len, __wsum sum, | ||
51 | int *err_ptr); | ||
52 | |||
53 | /* | ||
54 | * Fold a partial checksum | ||
55 | */ | ||
56 | |||
57 | static inline __sum16 csum_fold(__wsum sum) | ||
58 | { | ||
59 | unsigned long tmpreg; | ||
60 | __asm__( | ||
61 | " sll3 %1, %0, #16 \n" | ||
62 | " cmp %0, %0 \n" | ||
63 | " addx %0, %1 \n" | ||
64 | " ldi %1, #0 \n" | ||
65 | " srli %0, #16 \n" | ||
66 | " addx %0, %1 \n" | ||
67 | " xor3 %0, %0, #0x0000ffff \n" | ||
68 | : "=r" (sum), "=&r" (tmpreg) | ||
69 | : "0" (sum) | ||
70 | : "cbit" | ||
71 | ); | ||
72 | return (__force __sum16)sum; | ||
73 | } | ||
74 | |||
75 | /* | ||
76 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
77 | * which always checksum on 4 octet boundaries. | ||
78 | */ | ||
79 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
80 | { | ||
81 | unsigned long tmpreg0, tmpreg1; | ||
82 | __wsum sum; | ||
83 | |||
84 | __asm__ __volatile__( | ||
85 | " ld %0, @%1+ \n" | ||
86 | " addi %2, #-4 \n" | ||
87 | "# bgez %2, 2f \n" | ||
88 | " cmp %0, %0 \n" | ||
89 | " ld %3, @%1+ \n" | ||
90 | " ld %4, @%1+ \n" | ||
91 | " addx %0, %3 \n" | ||
92 | " ld %3, @%1+ \n" | ||
93 | " addx %0, %4 \n" | ||
94 | " addx %0, %3 \n" | ||
95 | " .fillinsn\n" | ||
96 | "1: \n" | ||
97 | " ld %4, @%1+ \n" | ||
98 | " addi %2, #-1 \n" | ||
99 | " addx %0, %4 \n" | ||
100 | " bgtz %2, 1b \n" | ||
101 | "\n" | ||
102 | " ldi %3, #0 \n" | ||
103 | " addx %0, %3 \n" | ||
104 | " .fillinsn\n" | ||
105 | "2: \n" | ||
106 | /* Since the input registers which are loaded with iph and ihl | ||
107 | are modified, we must also specify them as outputs, or gcc | ||
108 | will assume they contain their original values. */ | ||
109 | : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1) | ||
110 | : "1" (iph), "2" (ihl) | ||
111 | : "cbit", "memory"); | ||
112 | |||
113 | return csum_fold(sum); | ||
114 | } | ||
115 | |||
116 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
117 | unsigned short len, | ||
118 | unsigned short proto, | ||
119 | __wsum sum) | ||
120 | { | ||
121 | #if defined(__LITTLE_ENDIAN) | ||
122 | unsigned long len_proto = (proto + len) << 8; | ||
123 | #else | ||
124 | unsigned long len_proto = proto + len; | ||
125 | #endif | ||
126 | unsigned long tmpreg; | ||
127 | |||
128 | __asm__( | ||
129 | " cmp %0, %0 \n" | ||
130 | " addx %0, %2 \n" | ||
131 | " addx %0, %3 \n" | ||
132 | " addx %0, %4 \n" | ||
133 | " ldi %1, #0 \n" | ||
134 | " addx %0, %1 \n" | ||
135 | : "=r" (sum), "=&r" (tmpreg) | ||
136 | : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum) | ||
137 | : "cbit" | ||
138 | ); | ||
139 | |||
140 | return sum; | ||
141 | } | ||
142 | |||
143 | /* | ||
144 | * computes the checksum of the TCP/UDP pseudo-header | ||
145 | * returns a 16-bit checksum, already complemented | ||
146 | */ | ||
147 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
148 | unsigned short len, | ||
149 | unsigned short proto, | ||
150 | __wsum sum) | ||
151 | { | ||
152 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
153 | } | ||
154 | |||
155 | /* | ||
156 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
157 | * in icmp.c | ||
158 | */ | ||
159 | |||
160 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
161 | { | ||
162 | return csum_fold (csum_partial(buff, len, 0)); | ||
163 | } | ||
164 | |||
165 | #define _HAVE_ARCH_IPV6_CSUM | ||
166 | static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, | ||
167 | const struct in6_addr *daddr, | ||
168 | __u32 len, unsigned short proto, | ||
169 | __wsum sum) | ||
170 | { | ||
171 | unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3; | ||
172 | __asm__( | ||
173 | " ld %1, @(%5) \n" | ||
174 | " ld %2, @(4,%5) \n" | ||
175 | " ld %3, @(8,%5) \n" | ||
176 | " ld %4, @(12,%5) \n" | ||
177 | " add %0, %1 \n" | ||
178 | " addx %0, %2 \n" | ||
179 | " addx %0, %3 \n" | ||
180 | " addx %0, %4 \n" | ||
181 | " ld %1, @(%6) \n" | ||
182 | " ld %2, @(4,%6) \n" | ||
183 | " ld %3, @(8,%6) \n" | ||
184 | " ld %4, @(12,%6) \n" | ||
185 | " addx %0, %1 \n" | ||
186 | " addx %0, %2 \n" | ||
187 | " addx %0, %3 \n" | ||
188 | " addx %0, %4 \n" | ||
189 | " addx %0, %7 \n" | ||
190 | " addx %0, %8 \n" | ||
191 | " ldi %1, #0 \n" | ||
192 | " addx %0, %1 \n" | ||
193 | : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1), | ||
194 | "=&r" (tmpreg2), "=&r" (tmpreg3) | ||
195 | : "r" (saddr), "r" (daddr), | ||
196 | "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) | ||
197 | : "cbit" | ||
198 | ); | ||
199 | |||
200 | return csum_fold(sum); | ||
201 | } | ||
202 | |||
203 | #endif /* _ASM_M32R_CHECKSUM_H */ | ||
204 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-m32r/cputime.h b/include/asm-m32r/cputime.h deleted file mode 100644 index 0a47550df2b7..000000000000 --- a/include/asm-m32r/cputime.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __M32R_CPUTIME_H | ||
2 | #define __M32R_CPUTIME_H | ||
3 | |||
4 | #include <asm-generic/cputime.h> | ||
5 | |||
6 | #endif /* __M32R_CPUTIME_H */ | ||
diff --git a/include/asm-m32r/current.h b/include/asm-m32r/current.h deleted file mode 100644 index 7859d864f2c2..000000000000 --- a/include/asm-m32r/current.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_CURRENT_H | ||
2 | #define _ASM_M32R_CURRENT_H | ||
3 | |||
4 | #include <linux/thread_info.h> | ||
5 | |||
6 | struct task_struct; | ||
7 | |||
8 | static __inline__ struct task_struct *get_current(void) | ||
9 | { | ||
10 | return current_thread_info()->task; | ||
11 | } | ||
12 | |||
13 | #define current (get_current()) | ||
14 | |||
15 | #endif /* _ASM_M32R_CURRENT_H */ | ||
diff --git a/include/asm-m32r/delay.h b/include/asm-m32r/delay.h deleted file mode 100644 index 9dd9e999ea69..000000000000 --- a/include/asm-m32r/delay.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_DELAY_H | ||
2 | #define _ASM_M32R_DELAY_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1993 Linus Torvalds | ||
6 | * | ||
7 | * Delay routines calling functions in arch/m32r/lib/delay.c | ||
8 | */ | ||
9 | |||
10 | extern void __bad_udelay(void); | ||
11 | extern void __bad_ndelay(void); | ||
12 | |||
13 | extern void __udelay(unsigned long usecs); | ||
14 | extern void __ndelay(unsigned long nsecs); | ||
15 | extern void __const_udelay(unsigned long xloops); | ||
16 | extern void __delay(unsigned long loops); | ||
17 | |||
18 | #define udelay(n) (__builtin_constant_p(n) ? \ | ||
19 | ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \ | ||
20 | __udelay(n)) | ||
21 | |||
22 | #define ndelay(n) (__builtin_constant_p(n) ? \ | ||
23 | ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ | ||
24 | __ndelay(n)) | ||
25 | |||
26 | #endif /* _ASM_M32R_DELAY_H */ | ||
diff --git a/include/asm-m32r/device.h b/include/asm-m32r/device.h deleted file mode 100644 index d8f9872b0e2d..000000000000 --- a/include/asm-m32r/device.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * Arch specific extensions to struct device | ||
3 | * | ||
4 | * This file is released under the GPLv2 | ||
5 | */ | ||
6 | #include <asm-generic/device.h> | ||
7 | |||
diff --git a/include/asm-m32r/div64.h b/include/asm-m32r/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/include/asm-m32r/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/include/asm-m32r/dma.h b/include/asm-m32r/dma.h deleted file mode 100644 index 52f6a22dd232..000000000000 --- a/include/asm-m32r/dma.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_DMA_H | ||
2 | #define _ASM_M32R_DMA_H | ||
3 | |||
4 | #include <asm/io.h> | ||
5 | |||
6 | /* | ||
7 | * The maximum address that we can perform a DMA transfer | ||
8 | * to on this platform | ||
9 | */ | ||
10 | #define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000) | ||
11 | |||
12 | #endif /* _ASM_M32R_DMA_H */ | ||
diff --git a/include/asm-m32r/elf.h b/include/asm-m32r/elf.h deleted file mode 100644 index 0cc34c94bf2b..000000000000 --- a/include/asm-m32r/elf.h +++ /dev/null | |||
@@ -1,134 +0,0 @@ | |||
1 | #ifndef _ASM_M32R__ELF_H | ||
2 | #define _ASM_M32R__ELF_H | ||
3 | |||
4 | /* | ||
5 | * ELF-specific definitions. | ||
6 | * | ||
7 | * Copyright (C) 1999-2004, Renesas Technology Corp. | ||
8 | * Hirokazu Takata <takata at linux-m32r.org> | ||
9 | */ | ||
10 | |||
11 | #include <asm/ptrace.h> | ||
12 | #include <asm/user.h> | ||
13 | #include <asm/page.h> | ||
14 | |||
15 | /* M32R relocation types */ | ||
16 | #define R_M32R_NONE 0 | ||
17 | #define R_M32R_16 1 | ||
18 | #define R_M32R_32 2 | ||
19 | #define R_M32R_24 3 | ||
20 | #define R_M32R_10_PCREL 4 | ||
21 | #define R_M32R_18_PCREL 5 | ||
22 | #define R_M32R_26_PCREL 6 | ||
23 | #define R_M32R_HI16_ULO 7 | ||
24 | #define R_M32R_HI16_SLO 8 | ||
25 | #define R_M32R_LO16 9 | ||
26 | #define R_M32R_SDA16 10 | ||
27 | #define R_M32R_GNU_VTINHERIT 11 | ||
28 | #define R_M32R_GNU_VTENTRY 12 | ||
29 | |||
30 | #define R_M32R_16_RELA 33 | ||
31 | #define R_M32R_32_RELA 34 | ||
32 | #define R_M32R_24_RELA 35 | ||
33 | #define R_M32R_10_PCREL_RELA 36 | ||
34 | #define R_M32R_18_PCREL_RELA 37 | ||
35 | #define R_M32R_26_PCREL_RELA 38 | ||
36 | #define R_M32R_HI16_ULO_RELA 39 | ||
37 | #define R_M32R_HI16_SLO_RELA 40 | ||
38 | #define R_M32R_LO16_RELA 41 | ||
39 | #define R_M32R_SDA16_RELA 42 | ||
40 | #define R_M32R_RELA_GNU_VTINHERIT 43 | ||
41 | #define R_M32R_RELA_GNU_VTENTRY 44 | ||
42 | |||
43 | #define R_M32R_GOT24 48 | ||
44 | #define R_M32R_26_PLTREL 49 | ||
45 | #define R_M32R_COPY 50 | ||
46 | #define R_M32R_GLOB_DAT 51 | ||
47 | #define R_M32R_JMP_SLOT 52 | ||
48 | #define R_M32R_RELATIVE 53 | ||
49 | #define R_M32R_GOTOFF 54 | ||
50 | #define R_M32R_GOTPC24 55 | ||
51 | #define R_M32R_GOT16_HI_ULO 56 | ||
52 | #define R_M32R_GOT16_HI_SLO 57 | ||
53 | #define R_M32R_GOT16_LO 58 | ||
54 | #define R_M32R_GOTPC_HI_ULO 59 | ||
55 | #define R_M32R_GOTPC_HI_SLO 60 | ||
56 | #define R_M32R_GOTPC_LO 61 | ||
57 | #define R_M32R_GOTOFF_HI_ULO 62 | ||
58 | #define R_M32R_GOTOFF_HI_SLO 63 | ||
59 | #define R_M32R_GOTOFF_LO 64 | ||
60 | |||
61 | #define R_M32R_NUM 256 | ||
62 | |||
63 | /* | ||
64 | * ELF register definitions.. | ||
65 | */ | ||
66 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) | ||
67 | |||
68 | typedef unsigned long elf_greg_t; | ||
69 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
70 | |||
71 | /* We have no FP mumumu. */ | ||
72 | typedef double elf_fpreg_t; | ||
73 | typedef elf_fpreg_t elf_fpregset_t; | ||
74 | |||
75 | /* | ||
76 | * This is used to ensure we don't load something for the wrong architecture. | ||
77 | */ | ||
78 | #define elf_check_arch(x) \ | ||
79 | (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R)) | ||
80 | |||
81 | /* | ||
82 | * These are used to set parameters in the core dumps. | ||
83 | */ | ||
84 | #define ELF_CLASS ELFCLASS32 | ||
85 | #if defined(__LITTLE_ENDIAN) | ||
86 | #define ELF_DATA ELFDATA2LSB | ||
87 | #elif defined(__BIG_ENDIAN) | ||
88 | #define ELF_DATA ELFDATA2MSB | ||
89 | #else | ||
90 | #error no endian defined | ||
91 | #endif | ||
92 | #define ELF_ARCH EM_M32R | ||
93 | |||
94 | /* r0 is set by ld.so to a pointer to a function which might be | ||
95 | * registered using 'atexit'. This provides a mean for the dynamic | ||
96 | * linker to call DT_FINI functions for shared libraries that have | ||
97 | * been loaded before the code runs. | ||
98 | * | ||
99 | * So that we can use the same startup file with static executables, | ||
100 | * we start programs with a value of 0 to indicate that there is no | ||
101 | * such function. | ||
102 | */ | ||
103 | #define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0 | ||
104 | |||
105 | #define USE_ELF_CORE_DUMP | ||
106 | #define ELF_EXEC_PAGESIZE PAGE_SIZE | ||
107 | |||
108 | /* | ||
109 | * This is the location that an ET_DYN program is loaded if exec'ed. | ||
110 | * Typical use of this is to invoke "./ld.so someprog" to test out a | ||
111 | * new version of the loader. We need to make sure that it is out of | ||
112 | * the way of the program that it will "exec", and that there is | ||
113 | * sufficient room for the brk. | ||
114 | */ | ||
115 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) | ||
116 | |||
117 | /* regs is struct pt_regs, pr_reg is elf_gregset_t (which is | ||
118 | now struct_user_regs, they are different) */ | ||
119 | |||
120 | #define ELF_CORE_COPY_REGS(pr_reg, regs) \ | ||
121 | memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs)); | ||
122 | |||
123 | /* This yields a mask that user programs can use to figure out what | ||
124 | instruction set this CPU supports. */ | ||
125 | #define ELF_HWCAP (0) | ||
126 | |||
127 | /* This yields a string that ld.so will use to load implementation | ||
128 | specific libraries for optimization. This is more specific in | ||
129 | intent than poking at uname or /proc/cpuinfo. */ | ||
130 | #define ELF_PLATFORM (NULL) | ||
131 | |||
132 | #define SET_PERSONALITY(ex) set_personality(PER_LINUX) | ||
133 | |||
134 | #endif /* _ASM_M32R__ELF_H */ | ||
diff --git a/include/asm-m32r/emergency-restart.h b/include/asm-m32r/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/include/asm-m32r/emergency-restart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
2 | #define _ASM_EMERGENCY_RESTART_H | ||
3 | |||
4 | #include <asm-generic/emergency-restart.h> | ||
5 | |||
6 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/include/asm-m32r/errno.h b/include/asm-m32r/errno.h deleted file mode 100644 index 777149262aad..000000000000 --- a/include/asm-m32r/errno.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_ERRNO_H | ||
2 | #define _ASM_M32R_ERRNO_H | ||
3 | |||
4 | #include <asm-generic/errno.h> | ||
5 | |||
6 | #endif /* _ASM_M32R_ERRNO_H */ | ||
diff --git a/include/asm-m32r/fb.h b/include/asm-m32r/fb.h deleted file mode 100644 index d92e99cd8c8a..000000000000 --- a/include/asm-m32r/fb.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef _ASM_FB_H_ | ||
2 | #define _ASM_FB_H_ | ||
3 | |||
4 | #include <linux/fb.h> | ||
5 | #include <linux/fs.h> | ||
6 | #include <asm/page.h> | ||
7 | |||
8 | static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, | ||
9 | unsigned long off) | ||
10 | { | ||
11 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | ||
12 | } | ||
13 | |||
14 | static inline int fb_is_primary_device(struct fb_info *info) | ||
15 | { | ||
16 | return 0; | ||
17 | } | ||
18 | |||
19 | #endif /* _ASM_FB_H_ */ | ||
diff --git a/include/asm-m32r/fcntl.h b/include/asm-m32r/fcntl.h deleted file mode 100644 index 46ab12db5739..000000000000 --- a/include/asm-m32r/fcntl.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/fcntl.h> | ||
diff --git a/include/asm-m32r/flat.h b/include/asm-m32r/flat.h deleted file mode 100644 index d851cf0c4aa5..000000000000 --- a/include/asm-m32r/flat.h +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-m32r/flat.h | ||
3 | * | ||
4 | * uClinux flat-format executables | ||
5 | * | ||
6 | * Copyright (C) 2004 Kazuhiro Inaoka | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive for | ||
10 | * more details. | ||
11 | */ | ||
12 | #ifndef __ASM_M32R_FLAT_H | ||
13 | #define __ASM_M32R_FLAT_H | ||
14 | |||
15 | #define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0)) | ||
16 | #define flat_argvp_envp_on_stack() 0 | ||
17 | #define flat_old_ram_flag(flags) (flags) | ||
18 | #define flat_set_persistent(relval, p) 0 | ||
19 | #define flat_reloc_valid(reloc, size) \ | ||
20 | (((reloc) - textlen_for_m32r_lo16_data) <= (size)) | ||
21 | #define flat_get_addr_from_rp(rp, relval, flags, persistent) \ | ||
22 | m32r_flat_get_addr_from_rp(rp, relval, (text_len) ) | ||
23 | |||
24 | #define flat_put_addr_at_rp(rp, addr, relval) \ | ||
25 | m32r_flat_put_addr_at_rp(rp, addr, relval) | ||
26 | |||
27 | /* Convert a relocation entry into an address. */ | ||
28 | static inline unsigned long | ||
29 | flat_get_relocate_addr (unsigned long relval) | ||
30 | { | ||
31 | return relval & 0x00ffffff; /* Mask out top 8-bits */ | ||
32 | } | ||
33 | |||
34 | #define flat_m32r_get_reloc_type(relval) ((relval) >> 24) | ||
35 | |||
36 | #define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */ | ||
37 | |||
38 | #define FLAT_M32R_32 0x00 /* 32bits reloc */ | ||
39 | #define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */ | ||
40 | #define FLAT_M32R_16 0x02 /* 16bits reloc */ | ||
41 | #define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */ | ||
42 | #define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low()) | ||
43 | for a symbol in .data section */ | ||
44 | /* High 16bits of an address used | ||
45 | when the lower 16bbits are treated | ||
46 | as unsigned. | ||
47 | To create SETH instruction only. | ||
48 | 0x1X: X means a number of register. | ||
49 | 0x10 - 0x3F are reserved. */ | ||
50 | #define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */ | ||
51 | /* High 16bits of an address used | ||
52 | when the lower 16bbits are treated | ||
53 | as signed. | ||
54 | To create SETH instruction only. | ||
55 | 0x2X: X means a number of register. | ||
56 | 0x20 - 0x4F are reserved. */ | ||
57 | #define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */ | ||
58 | |||
59 | static unsigned long textlen_for_m32r_lo16_data = 0; | ||
60 | |||
61 | static inline unsigned long m32r_flat_get_addr_from_rp (unsigned long *rp, | ||
62 | unsigned long relval, | ||
63 | unsigned long textlen) | ||
64 | { | ||
65 | unsigned int reloc = flat_m32r_get_reloc_type (relval); | ||
66 | textlen_for_m32r_lo16_data = 0; | ||
67 | if (reloc & 0xf0) { | ||
68 | unsigned long addr = htonl(*rp); | ||
69 | switch (reloc & 0xf0) | ||
70 | { | ||
71 | case FLAT_M32R_HI16_ULO: | ||
72 | case FLAT_M32R_HI16_SLO: | ||
73 | if (addr == 0) { | ||
74 | /* put "seth Rn,#0x0" instead of 0 (addr). */ | ||
75 | *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24)); | ||
76 | } | ||
77 | return addr; | ||
78 | default: | ||
79 | break; | ||
80 | } | ||
81 | } else { | ||
82 | switch (reloc) | ||
83 | { | ||
84 | case FLAT_M32R_LO16: | ||
85 | return htonl(*rp) & 0xFFFF; | ||
86 | case FLAT_M32R_LO16_DATA: | ||
87 | /* FIXME: The return value will decrease by textlen | ||
88 | at m32r_flat_put_addr_at_rp () */ | ||
89 | textlen_for_m32r_lo16_data = textlen; | ||
90 | return (htonl(*rp) & 0xFFFF) + textlen; | ||
91 | case FLAT_M32R_16: | ||
92 | return htons(*(unsigned short *)rp) & 0xFFFF; | ||
93 | case FLAT_M32R_24: | ||
94 | return htonl(*rp) & 0xFFFFFF; | ||
95 | case FLAT_M32R_32: | ||
96 | return htonl(*rp); | ||
97 | default: | ||
98 | break; | ||
99 | } | ||
100 | } | ||
101 | return ~0; /* bogus value */ | ||
102 | } | ||
103 | |||
104 | static inline void m32r_flat_put_addr_at_rp (unsigned long *rp, | ||
105 | unsigned long addr, | ||
106 | unsigned long relval) | ||
107 | { | ||
108 | unsigned int reloc = flat_m32r_get_reloc_type (relval); | ||
109 | if (reloc & 0xf0) { | ||
110 | unsigned long Rn = reloc & 0x0f; /* get a number of register */ | ||
111 | Rn <<= 24; /* 0x0R000000 */ | ||
112 | reloc &= 0xf0; | ||
113 | switch (reloc) | ||
114 | { | ||
115 | case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */ | ||
116 | *rp = (M32R_SETH_OPCODE | Rn | ||
117 | | ((addr >> 16) & 0xFFFF)); | ||
118 | break; | ||
119 | case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */ | ||
120 | *rp = (M32R_SETH_OPCODE | Rn | ||
121 | | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0)) | ||
122 | & 0xFFFF)); | ||
123 | break; | ||
124 | } | ||
125 | } else { | ||
126 | switch (reloc) { | ||
127 | case FLAT_M32R_LO16_DATA: | ||
128 | addr -= textlen_for_m32r_lo16_data; | ||
129 | textlen_for_m32r_lo16_data = 0; | ||
130 | case FLAT_M32R_LO16: | ||
131 | *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF); | ||
132 | break; | ||
133 | case FLAT_M32R_16: | ||
134 | *(unsigned short *)rp = addr & 0xFFFF; | ||
135 | break; | ||
136 | case FLAT_M32R_24: | ||
137 | *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF); | ||
138 | break; | ||
139 | case FLAT_M32R_32: | ||
140 | *rp = addr; | ||
141 | break; | ||
142 | } | ||
143 | } | ||
144 | } | ||
145 | |||
146 | #endif /* __ASM_M32R_FLAT_H */ | ||
diff --git a/include/asm-m32r/ftrace.h b/include/asm-m32r/ftrace.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/include/asm-m32r/ftrace.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty */ | ||
diff --git a/include/asm-m32r/futex.h b/include/asm-m32r/futex.h deleted file mode 100644 index 6a332a9f099c..000000000000 --- a/include/asm-m32r/futex.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_FUTEX_H | ||
2 | #define _ASM_FUTEX_H | ||
3 | |||
4 | #include <asm-generic/futex.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-m32r/hardirq.h b/include/asm-m32r/hardirq.h deleted file mode 100644 index cb8aa762f235..000000000000 --- a/include/asm-m32r/hardirq.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef __ASM_HARDIRQ_H | ||
3 | #define __ASM_HARDIRQ_H | ||
4 | |||
5 | #include <linux/threads.h> | ||
6 | #include <linux/irq.h> | ||
7 | |||
8 | typedef struct { | ||
9 | unsigned int __softirq_pending; | ||
10 | } ____cacheline_aligned irq_cpustat_t; | ||
11 | |||
12 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
13 | |||
14 | #if NR_IRQS > 256 | ||
15 | #define HARDIRQ_BITS 9 | ||
16 | #else | ||
17 | #define HARDIRQ_BITS 8 | ||
18 | #endif | ||
19 | |||
20 | /* | ||
21 | * The hardirq mask has to be large enough to have | ||
22 | * space for potentially all IRQ sources in the system | ||
23 | * nesting on a single CPU: | ||
24 | */ | ||
25 | #if (1 << HARDIRQ_BITS) < NR_IRQS | ||
26 | # error HARDIRQ_BITS is too low! | ||
27 | #endif | ||
28 | |||
29 | static inline void ack_bad_irq(int irq) | ||
30 | { | ||
31 | printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); | ||
32 | BUG(); | ||
33 | } | ||
34 | |||
35 | #endif /* __ASM_HARDIRQ_H */ | ||
36 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-m32r/hw_irq.h b/include/asm-m32r/hw_irq.h deleted file mode 100644 index 7138537cda03..000000000000 --- a/include/asm-m32r/hw_irq.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_HW_IRQ_H | ||
2 | #define _ASM_M32R_HW_IRQ_H | ||
3 | |||
4 | #endif /* _ASM_M32R_HW_IRQ_H */ | ||
diff --git a/include/asm-m32r/io.h b/include/asm-m32r/io.h deleted file mode 100644 index d06933bd6318..000000000000 --- a/include/asm-m32r/io.h +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_IO_H | ||
2 | #define _ASM_M32R_IO_H | ||
3 | |||
4 | #include <linux/string.h> | ||
5 | #include <linux/compiler.h> | ||
6 | #include <asm/page.h> /* __va */ | ||
7 | |||
8 | #ifdef __KERNEL__ | ||
9 | |||
10 | #define IO_SPACE_LIMIT 0xFFFFFFFF | ||
11 | |||
12 | /** | ||
13 | * virt_to_phys - map virtual addresses to physical | ||
14 | * @address: address to remap | ||
15 | * | ||
16 | * The returned physical address is the physical (CPU) mapping for | ||
17 | * the memory address given. It is only valid to use this function on | ||
18 | * addresses directly mapped or allocated via kmalloc. | ||
19 | * | ||
20 | * This function does not give bus mappings for DMA transfers. In | ||
21 | * almost all conceivable cases a device driver should not be using | ||
22 | * this function | ||
23 | */ | ||
24 | |||
25 | static inline unsigned long virt_to_phys(volatile void * address) | ||
26 | { | ||
27 | return __pa(address); | ||
28 | } | ||
29 | |||
30 | /** | ||
31 | * phys_to_virt - map physical address to virtual | ||
32 | * @address: address to remap | ||
33 | * | ||
34 | * The returned virtual address is a current CPU mapping for | ||
35 | * the memory address given. It is only valid to use this function on | ||
36 | * addresses that have a kernel mapping | ||
37 | * | ||
38 | * This function does not handle bus mappings for DMA transfers. In | ||
39 | * almost all conceivable cases a device driver should not be using | ||
40 | * this function | ||
41 | */ | ||
42 | |||
43 | static inline void *phys_to_virt(unsigned long address) | ||
44 | { | ||
45 | return __va(address); | ||
46 | } | ||
47 | |||
48 | extern void __iomem * | ||
49 | __ioremap(unsigned long offset, unsigned long size, unsigned long flags); | ||
50 | |||
51 | /** | ||
52 | * ioremap - map bus memory into CPU space | ||
53 | * @offset: bus address of the memory | ||
54 | * @size: size of the resource to map | ||
55 | * | ||
56 | * ioremap performs a platform specific sequence of operations to | ||
57 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | ||
58 | * writew/writel functions and the other mmio helpers. The returned | ||
59 | * address is not guaranteed to be usable directly as a virtual | ||
60 | * address. | ||
61 | */ | ||
62 | |||
63 | static inline void __iomem *ioremap(unsigned long offset, unsigned long size) | ||
64 | { | ||
65 | return __ioremap(offset, size, 0); | ||
66 | } | ||
67 | |||
68 | extern void iounmap(volatile void __iomem *addr); | ||
69 | #define ioremap_nocache(off,size) ioremap(off,size) | ||
70 | |||
71 | /* | ||
72 | * IO bus memory addresses are also 1:1 with the physical address | ||
73 | */ | ||
74 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
75 | #define page_to_bus page_to_phys | ||
76 | #define virt_to_bus virt_to_phys | ||
77 | |||
78 | extern unsigned char _inb(unsigned long); | ||
79 | extern unsigned short _inw(unsigned long); | ||
80 | extern unsigned long _inl(unsigned long); | ||
81 | extern unsigned char _inb_p(unsigned long); | ||
82 | extern unsigned short _inw_p(unsigned long); | ||
83 | extern unsigned long _inl_p(unsigned long); | ||
84 | extern void _outb(unsigned char, unsigned long); | ||
85 | extern void _outw(unsigned short, unsigned long); | ||
86 | extern void _outl(unsigned long, unsigned long); | ||
87 | extern void _outb_p(unsigned char, unsigned long); | ||
88 | extern void _outw_p(unsigned short, unsigned long); | ||
89 | extern void _outl_p(unsigned long, unsigned long); | ||
90 | extern void _insb(unsigned int, void *, unsigned long); | ||
91 | extern void _insw(unsigned int, void *, unsigned long); | ||
92 | extern void _insl(unsigned int, void *, unsigned long); | ||
93 | extern void _outsb(unsigned int, const void *, unsigned long); | ||
94 | extern void _outsw(unsigned int, const void *, unsigned long); | ||
95 | extern void _outsl(unsigned int, const void *, unsigned long); | ||
96 | |||
97 | static inline unsigned char _readb(unsigned long addr) | ||
98 | { | ||
99 | return *(volatile unsigned char __force *)addr; | ||
100 | } | ||
101 | |||
102 | static inline unsigned short _readw(unsigned long addr) | ||
103 | { | ||
104 | return *(volatile unsigned short __force *)addr; | ||
105 | } | ||
106 | |||
107 | static inline unsigned long _readl(unsigned long addr) | ||
108 | { | ||
109 | return *(volatile unsigned long __force *)addr; | ||
110 | } | ||
111 | |||
112 | static inline void _writeb(unsigned char b, unsigned long addr) | ||
113 | { | ||
114 | *(volatile unsigned char __force *)addr = b; | ||
115 | } | ||
116 | |||
117 | static inline void _writew(unsigned short w, unsigned long addr) | ||
118 | { | ||
119 | *(volatile unsigned short __force *)addr = w; | ||
120 | } | ||
121 | |||
122 | static inline void _writel(unsigned long l, unsigned long addr) | ||
123 | { | ||
124 | *(volatile unsigned long __force *)addr = l; | ||
125 | } | ||
126 | |||
127 | #define inb _inb | ||
128 | #define inw _inw | ||
129 | #define inl _inl | ||
130 | #define outb _outb | ||
131 | #define outw _outw | ||
132 | #define outl _outl | ||
133 | |||
134 | #define inb_p _inb_p | ||
135 | #define inw_p _inw_p | ||
136 | #define inl_p _inl_p | ||
137 | #define outb_p _outb_p | ||
138 | #define outw_p _outw_p | ||
139 | #define outl_p _outl_p | ||
140 | |||
141 | #define insb _insb | ||
142 | #define insw _insw | ||
143 | #define insl _insl | ||
144 | #define outsb _outsb | ||
145 | #define outsw _outsw | ||
146 | #define outsl _outsl | ||
147 | |||
148 | #define readb(addr) _readb((unsigned long)(addr)) | ||
149 | #define readw(addr) _readw((unsigned long)(addr)) | ||
150 | #define readl(addr) _readl((unsigned long)(addr)) | ||
151 | #define __raw_readb readb | ||
152 | #define __raw_readw readw | ||
153 | #define __raw_readl readl | ||
154 | #define readb_relaxed readb | ||
155 | #define readw_relaxed readw | ||
156 | #define readl_relaxed readl | ||
157 | |||
158 | #define writeb(val, addr) _writeb((val), (unsigned long)(addr)) | ||
159 | #define writew(val, addr) _writew((val), (unsigned long)(addr)) | ||
160 | #define writel(val, addr) _writel((val), (unsigned long)(addr)) | ||
161 | #define __raw_writeb writeb | ||
162 | #define __raw_writew writew | ||
163 | #define __raw_writel writel | ||
164 | |||
165 | #define mmiowb() | ||
166 | |||
167 | #define flush_write_buffers() do { } while (0) /* M32R_FIXME */ | ||
168 | |||
169 | static inline void | ||
170 | memset_io(volatile void __iomem *addr, unsigned char val, int count) | ||
171 | { | ||
172 | memset((void __force *) addr, val, count); | ||
173 | } | ||
174 | |||
175 | static inline void | ||
176 | memcpy_fromio(void *dst, volatile void __iomem *src, int count) | ||
177 | { | ||
178 | memcpy(dst, (void __force *) src, count); | ||
179 | } | ||
180 | |||
181 | static inline void | ||
182 | memcpy_toio(volatile void __iomem *dst, const void *src, int count) | ||
183 | { | ||
184 | memcpy((void __force *) dst, src, count); | ||
185 | } | ||
186 | |||
187 | /* | ||
188 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
189 | * access | ||
190 | */ | ||
191 | #define xlate_dev_mem_ptr(p) __va(p) | ||
192 | |||
193 | /* | ||
194 | * Convert a virtual cached pointer to an uncached pointer | ||
195 | */ | ||
196 | #define xlate_dev_kmem_ptr(p) p | ||
197 | |||
198 | #endif /* __KERNEL__ */ | ||
199 | |||
200 | #endif /* _ASM_M32R_IO_H */ | ||
diff --git a/include/asm-m32r/ioctl.h b/include/asm-m32r/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/include/asm-m32r/ioctl.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/ioctl.h> | ||
diff --git a/include/asm-m32r/ioctls.h b/include/asm-m32r/ioctls.h deleted file mode 100644 index b9f54bb5d7cf..000000000000 --- a/include/asm-m32r/ioctls.h +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | #ifndef __ARCH_M32R_IOCTLS_H__ | ||
2 | #define __ARCH_M32R_IOCTLS_H__ | ||
3 | |||
4 | #include <asm/ioctl.h> | ||
5 | |||
6 | /* 0x54 is just a magic number to make these relatively unique ('T') */ | ||
7 | |||
8 | #define TCGETS 0x5401 | ||
9 | #define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */ | ||
10 | #define TCSETSW 0x5403 | ||
11 | #define TCSETSF 0x5404 | ||
12 | #define TCGETA 0x5405 | ||
13 | #define TCSETA 0x5406 | ||
14 | #define TCSETAW 0x5407 | ||
15 | #define TCSETAF 0x5408 | ||
16 | #define TCSBRK 0x5409 | ||
17 | #define TCXONC 0x540A | ||
18 | #define TCFLSH 0x540B | ||
19 | #define TIOCEXCL 0x540C | ||
20 | #define TIOCNXCL 0x540D | ||
21 | #define TIOCSCTTY 0x540E | ||
22 | #define TIOCGPGRP 0x540F | ||
23 | #define TIOCSPGRP 0x5410 | ||
24 | #define TIOCOUTQ 0x5411 | ||
25 | #define TIOCSTI 0x5412 | ||
26 | #define TIOCGWINSZ 0x5413 | ||
27 | #define TIOCSWINSZ 0x5414 | ||
28 | #define TIOCMGET 0x5415 | ||
29 | #define TIOCMBIS 0x5416 | ||
30 | #define TIOCMBIC 0x5417 | ||
31 | #define TIOCMSET 0x5418 | ||
32 | #define TIOCGSOFTCAR 0x5419 | ||
33 | #define TIOCSSOFTCAR 0x541A | ||
34 | #define FIONREAD 0x541B | ||
35 | #define TIOCINQ FIONREAD | ||
36 | #define TIOCLINUX 0x541C | ||
37 | #define TIOCCONS 0x541D | ||
38 | #define TIOCGSERIAL 0x541E | ||
39 | #define TIOCSSERIAL 0x541F | ||
40 | #define TIOCPKT 0x5420 | ||
41 | #define FIONBIO 0x5421 | ||
42 | #define TIOCNOTTY 0x5422 | ||
43 | #define TIOCSETD 0x5423 | ||
44 | #define TIOCGETD 0x5424 | ||
45 | #define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ | ||
46 | /* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */ | ||
47 | #define TIOCSBRK 0x5427 /* BSD compatibility */ | ||
48 | #define TIOCCBRK 0x5428 /* BSD compatibility */ | ||
49 | #define TIOCGSID 0x5429 /* Return the session ID of FD */ | ||
50 | #define TCGETS2 _IOR('T',0x2A, struct termios2) | ||
51 | #define TCSETS2 _IOW('T',0x2B, struct termios2) | ||
52 | #define TCSETSW2 _IOW('T',0x2C, struct termios2) | ||
53 | #define TCSETSF2 _IOW('T',0x2D, struct termios2) | ||
54 | #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ | ||
55 | #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ | ||
56 | |||
57 | #define FIONCLEX 0x5450 | ||
58 | #define FIOCLEX 0x5451 | ||
59 | #define FIOASYNC 0x5452 | ||
60 | #define TIOCSERCONFIG 0x5453 | ||
61 | #define TIOCSERGWILD 0x5454 | ||
62 | #define TIOCSERSWILD 0x5455 | ||
63 | #define TIOCGLCKTRMIOS 0x5456 | ||
64 | #define TIOCSLCKTRMIOS 0x5457 | ||
65 | #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ | ||
66 | #define TIOCSERGETLSR 0x5459 /* Get line status register */ | ||
67 | #define TIOCSERGETMULTI 0x545A /* Get multiport config */ | ||
68 | #define TIOCSERSETMULTI 0x545B /* Set multiport config */ | ||
69 | |||
70 | #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ | ||
71 | #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ | ||
72 | #define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ | ||
73 | #define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ | ||
74 | #define FIOQSIZE 0x5460 | ||
75 | |||
76 | /* Used for packet mode */ | ||
77 | #define TIOCPKT_DATA 0 | ||
78 | #define TIOCPKT_FLUSHREAD 1 | ||
79 | #define TIOCPKT_FLUSHWRITE 2 | ||
80 | #define TIOCPKT_STOP 4 | ||
81 | #define TIOCPKT_START 8 | ||
82 | #define TIOCPKT_NOSTOP 16 | ||
83 | #define TIOCPKT_DOSTOP 32 | ||
84 | |||
85 | #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | ||
86 | |||
87 | #endif /* __ARCH_M32R_IOCTLS_H__ */ | ||
diff --git a/include/asm-m32r/ipcbuf.h b/include/asm-m32r/ipcbuf.h deleted file mode 100644 index 8d2d7c8ffdb0..000000000000 --- a/include/asm-m32r/ipcbuf.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_IPCBUF_H | ||
2 | #define _ASM_M32R_IPCBUF_H | ||
3 | |||
4 | /* | ||
5 | * The ipc64_perm structure for m32r architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 32-bit mode_t and seq | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct ipc64_perm | ||
15 | { | ||
16 | __kernel_key_t key; | ||
17 | __kernel_uid32_t uid; | ||
18 | __kernel_gid32_t gid; | ||
19 | __kernel_uid32_t cuid; | ||
20 | __kernel_gid32_t cgid; | ||
21 | __kernel_mode_t mode; | ||
22 | unsigned short __pad1; | ||
23 | unsigned short seq; | ||
24 | unsigned short __pad2; | ||
25 | unsigned long __unused1; | ||
26 | unsigned long __unused2; | ||
27 | }; | ||
28 | |||
29 | #endif /* _ASM_M32R_IPCBUF_H */ | ||
diff --git a/include/asm-m32r/irq.h b/include/asm-m32r/irq.h deleted file mode 100644 index 242028b4d86a..000000000000 --- a/include/asm-m32r/irq.h +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _ASM_M32R_IRQ_H | ||
3 | #define _ASM_M32R_IRQ_H | ||
4 | |||
5 | |||
6 | #if defined(CONFIG_PLAT_USRV) | ||
7 | /* | ||
8 | * IRQ definitions for M32700UT | ||
9 | * M32700 Chip: 64 interrupts | ||
10 | * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
11 | */ | ||
12 | #define M32700UT_NUM_CPU_IRQ (64) | ||
13 | #define M32700UT_NUM_PLD_IRQ (32) | ||
14 | #define M32700UT_IRQ_BASE 0 | ||
15 | #define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE | ||
16 | #define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ) | ||
17 | |||
18 | #define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ) | ||
19 | #elif defined(CONFIG_PLAT_M32700UT) | ||
20 | /* | ||
21 | * IRQ definitions for M32700UT(Rev.C) + M32R-LAN | ||
22 | * M32700 Chip: 64 interrupts | ||
23 | * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
24 | * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin | ||
25 | * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin | ||
26 | */ | ||
27 | #define M32700UT_NUM_CPU_IRQ (64) | ||
28 | #define M32700UT_NUM_PLD_IRQ (32) | ||
29 | #define M32700UT_NUM_LCD_PLD_IRQ (32) | ||
30 | #define M32700UT_NUM_LAN_PLD_IRQ (32) | ||
31 | #define M32700UT_IRQ_BASE 0 | ||
32 | #define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE) | ||
33 | #define M32700UT_PLD_IRQ_BASE \ | ||
34 | (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ) | ||
35 | #define M32700UT_LCD_PLD_IRQ_BASE \ | ||
36 | (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ) | ||
37 | #define M32700UT_LAN_PLD_IRQ_BASE \ | ||
38 | (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ) | ||
39 | |||
40 | #define NR_IRQS \ | ||
41 | (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \ | ||
42 | + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ) | ||
43 | #elif defined(CONFIG_PLAT_OPSPUT) | ||
44 | /* | ||
45 | * IRQ definitions for OPSPUT + M32R-LAN | ||
46 | * OPSP Chip: 64 interrupts | ||
47 | * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
48 | * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin | ||
49 | * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin | ||
50 | */ | ||
51 | #define OPSPUT_NUM_CPU_IRQ (64) | ||
52 | #define OPSPUT_NUM_PLD_IRQ (32) | ||
53 | #define OPSPUT_NUM_LCD_PLD_IRQ (32) | ||
54 | #define OPSPUT_NUM_LAN_PLD_IRQ (32) | ||
55 | #define OPSPUT_IRQ_BASE 0 | ||
56 | #define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE) | ||
57 | #define OPSPUT_PLD_IRQ_BASE \ | ||
58 | (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ) | ||
59 | #define OPSPUT_LCD_PLD_IRQ_BASE \ | ||
60 | (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ) | ||
61 | #define OPSPUT_LAN_PLD_IRQ_BASE \ | ||
62 | (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ) | ||
63 | |||
64 | #define NR_IRQS \ | ||
65 | (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \ | ||
66 | + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ) | ||
67 | |||
68 | #elif defined(CONFIG_PLAT_M32104UT) | ||
69 | /* | ||
70 | * IRQ definitions for M32104UT | ||
71 | * M32104 Chip: 64 interrupts | ||
72 | * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
73 | */ | ||
74 | #define M32104UT_NUM_CPU_IRQ (64) | ||
75 | #define M32104UT_NUM_PLD_IRQ (32) | ||
76 | #define M32104UT_IRQ_BASE 0 | ||
77 | #define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE | ||
78 | #define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ) | ||
79 | |||
80 | #define NR_IRQS \ | ||
81 | (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ) | ||
82 | |||
83 | #else | ||
84 | #define NR_IRQS 64 | ||
85 | #endif | ||
86 | |||
87 | #define irq_canonicalize(irq) (irq) | ||
88 | |||
89 | #endif /* _ASM_M32R_IRQ_H */ | ||
90 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-m32r/irq_regs.h b/include/asm-m32r/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/include/asm-m32r/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/include/asm-m32r/kdebug.h b/include/asm-m32r/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/include/asm-m32r/kdebug.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/kdebug.h> | ||
diff --git a/include/asm-m32r/kmap_types.h b/include/asm-m32r/kmap_types.h deleted file mode 100644 index fa94dc6410ea..000000000000 --- a/include/asm-m32r/kmap_types.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef __M32R_KMAP_TYPES_H | ||
2 | #define __M32R_KMAP_TYPES_H | ||
3 | |||
4 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
5 | # define D(n) __KM_FENCE_##n , | ||
6 | #else | ||
7 | # define D(n) | ||
8 | #endif | ||
9 | |||
10 | enum km_type { | ||
11 | D(0) KM_BOUNCE_READ, | ||
12 | D(1) KM_SKB_SUNRPC_DATA, | ||
13 | D(2) KM_SKB_DATA_SOFTIRQ, | ||
14 | D(3) KM_USER0, | ||
15 | D(4) KM_USER1, | ||
16 | D(5) KM_BIO_SRC_IRQ, | ||
17 | D(6) KM_BIO_DST_IRQ, | ||
18 | D(7) KM_PTE0, | ||
19 | D(8) KM_PTE1, | ||
20 | D(9) KM_IRQ0, | ||
21 | D(10) KM_IRQ1, | ||
22 | D(11) KM_SOFTIRQ0, | ||
23 | D(12) KM_SOFTIRQ1, | ||
24 | D(13) KM_TYPE_NR | ||
25 | }; | ||
26 | |||
27 | #undef D | ||
28 | |||
29 | #endif /* __M32R_KMAP_TYPES_H */ | ||
diff --git a/include/asm-m32r/linkage.h b/include/asm-m32r/linkage.h deleted file mode 100644 index a9fb151cf648..000000000000 --- a/include/asm-m32r/linkage.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | #define __ALIGN .balign 4 | ||
5 | #define __ALIGN_STR ".balign 4" | ||
6 | |||
7 | #endif /* __ASM_LINKAGE_H */ | ||
diff --git a/include/asm-m32r/local.h b/include/asm-m32r/local.h deleted file mode 100644 index 22256d138630..000000000000 --- a/include/asm-m32r/local.h +++ /dev/null | |||
@@ -1,366 +0,0 @@ | |||
1 | #ifndef __M32R_LOCAL_H | ||
2 | #define __M32R_LOCAL_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/local.h | ||
6 | * | ||
7 | * M32R version: | ||
8 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
9 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> | ||
11 | */ | ||
12 | |||
13 | #include <linux/percpu.h> | ||
14 | #include <asm/assembler.h> | ||
15 | #include <asm/system.h> | ||
16 | #include <asm/local.h> | ||
17 | |||
18 | /* | ||
19 | * Atomic operations that C can't guarantee us. Useful for | ||
20 | * resource counting etc.. | ||
21 | */ | ||
22 | |||
23 | /* | ||
24 | * Make sure gcc doesn't try to be clever and move things around | ||
25 | * on us. We need to use _exactly_ the address the user gave us, | ||
26 | * not some alias that contains the same information. | ||
27 | */ | ||
28 | typedef struct { volatile int counter; } local_t; | ||
29 | |||
30 | #define LOCAL_INIT(i) { (i) } | ||
31 | |||
32 | /** | ||
33 | * local_read - read local variable | ||
34 | * @l: pointer of type local_t | ||
35 | * | ||
36 | * Atomically reads the value of @l. | ||
37 | */ | ||
38 | #define local_read(l) ((l)->counter) | ||
39 | |||
40 | /** | ||
41 | * local_set - set local variable | ||
42 | * @l: pointer of type local_t | ||
43 | * @i: required value | ||
44 | * | ||
45 | * Atomically sets the value of @l to @i. | ||
46 | */ | ||
47 | #define local_set(l, i) (((l)->counter) = (i)) | ||
48 | |||
49 | /** | ||
50 | * local_add_return - add long to local variable and return it | ||
51 | * @i: long value to add | ||
52 | * @l: pointer of type local_t | ||
53 | * | ||
54 | * Atomically adds @i to @l and return (@i + @l). | ||
55 | */ | ||
56 | static inline long local_add_return(long i, local_t *l) | ||
57 | { | ||
58 | unsigned long flags; | ||
59 | long result; | ||
60 | |||
61 | local_irq_save(flags); | ||
62 | __asm__ __volatile__ ( | ||
63 | "# local_add_return \n\t" | ||
64 | DCACHE_CLEAR("%0", "r4", "%1") | ||
65 | "ld %0, @%1; \n\t" | ||
66 | "add %0, %2; \n\t" | ||
67 | "st %0, @%1; \n\t" | ||
68 | : "=&r" (result) | ||
69 | : "r" (&l->counter), "r" (i) | ||
70 | : "memory" | ||
71 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
72 | , "r4" | ||
73 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
74 | ); | ||
75 | local_irq_restore(flags); | ||
76 | |||
77 | return result; | ||
78 | } | ||
79 | |||
80 | /** | ||
81 | * local_sub_return - subtract long from local variable and return it | ||
82 | * @i: long value to subtract | ||
83 | * @l: pointer of type local_t | ||
84 | * | ||
85 | * Atomically subtracts @i from @l and return (@l - @i). | ||
86 | */ | ||
87 | static inline long local_sub_return(long i, local_t *l) | ||
88 | { | ||
89 | unsigned long flags; | ||
90 | long result; | ||
91 | |||
92 | local_irq_save(flags); | ||
93 | __asm__ __volatile__ ( | ||
94 | "# local_sub_return \n\t" | ||
95 | DCACHE_CLEAR("%0", "r4", "%1") | ||
96 | "ld %0, @%1; \n\t" | ||
97 | "sub %0, %2; \n\t" | ||
98 | "st %0, @%1; \n\t" | ||
99 | : "=&r" (result) | ||
100 | : "r" (&l->counter), "r" (i) | ||
101 | : "memory" | ||
102 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
103 | , "r4" | ||
104 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
105 | ); | ||
106 | local_irq_restore(flags); | ||
107 | |||
108 | return result; | ||
109 | } | ||
110 | |||
111 | /** | ||
112 | * local_add - add long to local variable | ||
113 | * @i: long value to add | ||
114 | * @l: pointer of type local_t | ||
115 | * | ||
116 | * Atomically adds @i to @l. | ||
117 | */ | ||
118 | #define local_add(i, l) ((void) local_add_return((i), (l))) | ||
119 | |||
120 | /** | ||
121 | * local_sub - subtract the local variable | ||
122 | * @i: long value to subtract | ||
123 | * @l: pointer of type local_t | ||
124 | * | ||
125 | * Atomically subtracts @i from @l. | ||
126 | */ | ||
127 | #define local_sub(i, l) ((void) local_sub_return((i), (l))) | ||
128 | |||
129 | /** | ||
130 | * local_sub_and_test - subtract value from variable and test result | ||
131 | * @i: integer value to subtract | ||
132 | * @l: pointer of type local_t | ||
133 | * | ||
134 | * Atomically subtracts @i from @l and returns | ||
135 | * true if the result is zero, or false for all | ||
136 | * other cases. | ||
137 | */ | ||
138 | #define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0) | ||
139 | |||
140 | /** | ||
141 | * local_inc_return - increment local variable and return it | ||
142 | * @l: pointer of type local_t | ||
143 | * | ||
144 | * Atomically increments @l by 1 and returns the result. | ||
145 | */ | ||
146 | static inline long local_inc_return(local_t *l) | ||
147 | { | ||
148 | unsigned long flags; | ||
149 | long result; | ||
150 | |||
151 | local_irq_save(flags); | ||
152 | __asm__ __volatile__ ( | ||
153 | "# local_inc_return \n\t" | ||
154 | DCACHE_CLEAR("%0", "r4", "%1") | ||
155 | "ld %0, @%1; \n\t" | ||
156 | "addi %0, #1; \n\t" | ||
157 | "st %0, @%1; \n\t" | ||
158 | : "=&r" (result) | ||
159 | : "r" (&l->counter) | ||
160 | : "memory" | ||
161 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
162 | , "r4" | ||
163 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
164 | ); | ||
165 | local_irq_restore(flags); | ||
166 | |||
167 | return result; | ||
168 | } | ||
169 | |||
170 | /** | ||
171 | * local_dec_return - decrement local variable and return it | ||
172 | * @l: pointer of type local_t | ||
173 | * | ||
174 | * Atomically decrements @l by 1 and returns the result. | ||
175 | */ | ||
176 | static inline long local_dec_return(local_t *l) | ||
177 | { | ||
178 | unsigned long flags; | ||
179 | long result; | ||
180 | |||
181 | local_irq_save(flags); | ||
182 | __asm__ __volatile__ ( | ||
183 | "# local_dec_return \n\t" | ||
184 | DCACHE_CLEAR("%0", "r4", "%1") | ||
185 | "ld %0, @%1; \n\t" | ||
186 | "addi %0, #-1; \n\t" | ||
187 | "st %0, @%1; \n\t" | ||
188 | : "=&r" (result) | ||
189 | : "r" (&l->counter) | ||
190 | : "memory" | ||
191 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
192 | , "r4" | ||
193 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
194 | ); | ||
195 | local_irq_restore(flags); | ||
196 | |||
197 | return result; | ||
198 | } | ||
199 | |||
200 | /** | ||
201 | * local_inc - increment local variable | ||
202 | * @l: pointer of type local_t | ||
203 | * | ||
204 | * Atomically increments @l by 1. | ||
205 | */ | ||
206 | #define local_inc(l) ((void)local_inc_return(l)) | ||
207 | |||
208 | /** | ||
209 | * local_dec - decrement local variable | ||
210 | * @l: pointer of type local_t | ||
211 | * | ||
212 | * Atomically decrements @l by 1. | ||
213 | */ | ||
214 | #define local_dec(l) ((void)local_dec_return(l)) | ||
215 | |||
216 | /** | ||
217 | * local_inc_and_test - increment and test | ||
218 | * @l: pointer of type local_t | ||
219 | * | ||
220 | * Atomically increments @l by 1 | ||
221 | * and returns true if the result is zero, or false for all | ||
222 | * other cases. | ||
223 | */ | ||
224 | #define local_inc_and_test(l) (local_inc_return(l) == 0) | ||
225 | |||
226 | /** | ||
227 | * local_dec_and_test - decrement and test | ||
228 | * @l: pointer of type local_t | ||
229 | * | ||
230 | * Atomically decrements @l by 1 and | ||
231 | * returns true if the result is 0, or false for all | ||
232 | * other cases. | ||
233 | */ | ||
234 | #define local_dec_and_test(l) (local_dec_return(l) == 0) | ||
235 | |||
236 | /** | ||
237 | * local_add_negative - add and test if negative | ||
238 | * @l: pointer of type local_t | ||
239 | * @i: integer value to add | ||
240 | * | ||
241 | * Atomically adds @i to @l and returns true | ||
242 | * if the result is negative, or false when | ||
243 | * result is greater than or equal to zero. | ||
244 | */ | ||
245 | #define local_add_negative(i, l) (local_add_return((i), (l)) < 0) | ||
246 | |||
247 | #define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n))) | ||
248 | #define local_xchg(v, new) (xchg_local(&((l)->counter), new)) | ||
249 | |||
250 | /** | ||
251 | * local_add_unless - add unless the number is a given value | ||
252 | * @l: pointer of type local_t | ||
253 | * @a: the amount to add to l... | ||
254 | * @u: ...unless l is equal to u. | ||
255 | * | ||
256 | * Atomically adds @a to @l, so long as it was not @u. | ||
257 | * Returns non-zero if @l was not @u, and zero otherwise. | ||
258 | */ | ||
259 | static inline int local_add_unless(local_t *l, long a, long u) | ||
260 | { | ||
261 | long c, old; | ||
262 | c = local_read(l); | ||
263 | for (;;) { | ||
264 | if (unlikely(c == (u))) | ||
265 | break; | ||
266 | old = local_cmpxchg((l), c, c + (a)); | ||
267 | if (likely(old == c)) | ||
268 | break; | ||
269 | c = old; | ||
270 | } | ||
271 | return c != (u); | ||
272 | } | ||
273 | |||
274 | #define local_inc_not_zero(l) local_add_unless((l), 1, 0) | ||
275 | |||
276 | static inline void local_clear_mask(unsigned long mask, local_t *addr) | ||
277 | { | ||
278 | unsigned long flags; | ||
279 | unsigned long tmp; | ||
280 | |||
281 | local_irq_save(flags); | ||
282 | __asm__ __volatile__ ( | ||
283 | "# local_clear_mask \n\t" | ||
284 | DCACHE_CLEAR("%0", "r5", "%1") | ||
285 | "ld %0, @%1; \n\t" | ||
286 | "and %0, %2; \n\t" | ||
287 | "st %0, @%1; \n\t" | ||
288 | : "=&r" (tmp) | ||
289 | : "r" (addr), "r" (~mask) | ||
290 | : "memory" | ||
291 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
292 | , "r5" | ||
293 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
294 | ); | ||
295 | local_irq_restore(flags); | ||
296 | } | ||
297 | |||
298 | static inline void local_set_mask(unsigned long mask, local_t *addr) | ||
299 | { | ||
300 | unsigned long flags; | ||
301 | unsigned long tmp; | ||
302 | |||
303 | local_irq_save(flags); | ||
304 | __asm__ __volatile__ ( | ||
305 | "# local_set_mask \n\t" | ||
306 | DCACHE_CLEAR("%0", "r5", "%1") | ||
307 | "ld %0, @%1; \n\t" | ||
308 | "or %0, %2; \n\t" | ||
309 | "st %0, @%1; \n\t" | ||
310 | : "=&r" (tmp) | ||
311 | : "r" (addr), "r" (mask) | ||
312 | : "memory" | ||
313 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
314 | , "r5" | ||
315 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
316 | ); | ||
317 | local_irq_restore(flags); | ||
318 | } | ||
319 | |||
320 | /* Atomic operations are already serializing on m32r */ | ||
321 | #define smp_mb__before_local_dec() barrier() | ||
322 | #define smp_mb__after_local_dec() barrier() | ||
323 | #define smp_mb__before_local_inc() barrier() | ||
324 | #define smp_mb__after_local_inc() barrier() | ||
325 | |||
326 | /* Use these for per-cpu local_t variables: on some archs they are | ||
327 | * much more efficient than these naive implementations. Note they take | ||
328 | * a variable, not an address. | ||
329 | */ | ||
330 | |||
331 | #define __local_inc(l) ((l)->a.counter++) | ||
332 | #define __local_dec(l) ((l)->a.counter++) | ||
333 | #define __local_add(i, l) ((l)->a.counter += (i)) | ||
334 | #define __local_sub(i, l) ((l)->a.counter -= (i)) | ||
335 | |||
336 | /* Use these for per-cpu local_t variables: on some archs they are | ||
337 | * much more efficient than these naive implementations. Note they take | ||
338 | * a variable, not an address. | ||
339 | */ | ||
340 | |||
341 | /* Need to disable preemption for the cpu local counters otherwise we could | ||
342 | still access a variable of a previous CPU in a non local way. */ | ||
343 | #define cpu_local_wrap_v(l) \ | ||
344 | ({ local_t res__; \ | ||
345 | preempt_disable(); \ | ||
346 | res__ = (l); \ | ||
347 | preempt_enable(); \ | ||
348 | res__; }) | ||
349 | #define cpu_local_wrap(l) \ | ||
350 | ({ preempt_disable(); \ | ||
351 | l; \ | ||
352 | preempt_enable(); }) \ | ||
353 | |||
354 | #define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l))) | ||
355 | #define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i))) | ||
356 | #define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l))) | ||
357 | #define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l))) | ||
358 | #define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l))) | ||
359 | #define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l))) | ||
360 | |||
361 | #define __cpu_local_inc(l) cpu_local_inc(l) | ||
362 | #define __cpu_local_dec(l) cpu_local_dec(l) | ||
363 | #define __cpu_local_add(i, l) cpu_local_add((i), (l)) | ||
364 | #define __cpu_local_sub(i, l) cpu_local_sub((i), (l)) | ||
365 | |||
366 | #endif /* __M32R_LOCAL_H */ | ||
diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h deleted file mode 100644 index 52807f8db166..000000000000 --- a/include/asm-m32r/m32102.h +++ /dev/null | |||
@@ -1,314 +0,0 @@ | |||
1 | #ifndef _M32102_H_ | ||
2 | #define _M32102_H_ | ||
3 | |||
4 | /* | ||
5 | * Renesas M32R 32102 group | ||
6 | * | ||
7 | * Copyright (c) 2001 Hitoshi Yamamoto | ||
8 | * Copyright (c) 2003, 2004 Renesas Technology Corp. | ||
9 | */ | ||
10 | |||
11 | /*======================================================================* | ||
12 | * Special Function Register | ||
13 | *======================================================================*/ | ||
14 | #if !defined(CONFIG_CHIP_M32104) | ||
15 | #define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */ | ||
16 | #else | ||
17 | #define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */ | ||
18 | #endif | ||
19 | |||
20 | /* | ||
21 | * Clock and Power Management registers. | ||
22 | */ | ||
23 | #define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET) | ||
24 | |||
25 | #define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET) | ||
26 | #define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET) | ||
27 | #define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET) | ||
28 | |||
29 | /* | ||
30 | * DMA Controller registers. | ||
31 | */ | ||
32 | #define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET) | ||
33 | |||
34 | #define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET) | ||
35 | #define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET) | ||
36 | #define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET) | ||
37 | #define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET) | ||
38 | |||
39 | #define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET) | ||
40 | #define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET) | ||
41 | #define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET) | ||
42 | #define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET) | ||
43 | #define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET) | ||
44 | #define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET) | ||
45 | #define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET) | ||
46 | #define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET) | ||
47 | |||
48 | #define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET) | ||
49 | #define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET) | ||
50 | #define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET) | ||
51 | #define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET) | ||
52 | #define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET) | ||
53 | #define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET) | ||
54 | #define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET) | ||
55 | #define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET) | ||
56 | |||
57 | /* | ||
58 | * Multi Function Timer registers. | ||
59 | */ | ||
60 | #define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET) | ||
61 | |||
62 | #define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */ | ||
63 | #define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */ | ||
64 | |||
65 | #define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET) | ||
66 | #define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */ | ||
67 | #define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */ | ||
68 | #define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */ | ||
69 | #define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */ | ||
70 | #define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */ | ||
71 | |||
72 | #define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET) | ||
73 | #define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */ | ||
74 | #define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */ | ||
75 | #define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */ | ||
76 | #define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */ | ||
77 | #define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */ | ||
78 | |||
79 | #define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET) | ||
80 | #define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */ | ||
81 | #define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */ | ||
82 | #define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */ | ||
83 | #define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */ | ||
84 | #define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */ | ||
85 | |||
86 | #define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET) | ||
87 | #define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */ | ||
88 | #define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */ | ||
89 | #define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */ | ||
90 | #define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */ | ||
91 | #define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */ | ||
92 | |||
93 | #define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET) | ||
94 | #define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */ | ||
95 | #define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */ | ||
96 | #define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */ | ||
97 | #define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */ | ||
98 | #define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */ | ||
99 | |||
100 | #define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET) | ||
101 | #define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */ | ||
102 | #define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */ | ||
103 | #define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */ | ||
104 | #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ | ||
105 | #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ | ||
106 | |||
107 | #if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \ | ||
108 | || defined(CONFIG_CHIP_M32104) | ||
109 | #define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */ | ||
110 | #define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */ | ||
111 | #define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */ | ||
112 | #define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */ | ||
113 | #define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */ | ||
114 | #define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */ | ||
115 | #define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */ | ||
116 | #define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */ | ||
117 | #define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */ | ||
118 | #define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */ | ||
119 | #define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */ | ||
120 | #define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */ | ||
121 | #else | ||
122 | #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ | ||
123 | #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ | ||
124 | #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ | ||
125 | #define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */ | ||
126 | #define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */ | ||
127 | #define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */ | ||
128 | #define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */ | ||
129 | #define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */ | ||
130 | #define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */ | ||
131 | #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ | ||
132 | #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ | ||
133 | #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ | ||
134 | #endif | ||
135 | |||
136 | #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ | ||
137 | #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ | ||
138 | #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */ | ||
139 | #define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */ | ||
140 | #define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */ | ||
141 | #define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */ | ||
142 | #define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */ | ||
143 | #define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */ | ||
144 | #define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */ | ||
145 | #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */ | ||
146 | #define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */ | ||
147 | #define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */ | ||
148 | #define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */ | ||
149 | #define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */ | ||
150 | #define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */ | ||
151 | |||
152 | /* | ||
153 | * Serial I/O registers. | ||
154 | */ | ||
155 | #define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET) | ||
156 | |||
157 | #define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET) | ||
158 | #define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET) | ||
159 | #define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET) | ||
160 | #define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET) | ||
161 | #define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET) | ||
162 | #define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET) | ||
163 | #define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET) | ||
164 | #define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET) | ||
165 | #define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET) | ||
166 | |||
167 | /* | ||
168 | * Interrupt Control Unit registers. | ||
169 | */ | ||
170 | #define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET) | ||
171 | #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) | ||
172 | #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) | ||
173 | #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) | ||
174 | #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) | ||
175 | #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) | ||
176 | #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ | ||
177 | #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ | ||
178 | #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ | ||
179 | #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ | ||
180 | #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ | ||
181 | #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ | ||
182 | #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ | ||
183 | #define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */ | ||
184 | #define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */ | ||
185 | #define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */ | ||
186 | #define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */ | ||
187 | #define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */ | ||
188 | #define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */ | ||
189 | #define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */ | ||
190 | #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */ | ||
191 | #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */ | ||
192 | #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */ | ||
193 | #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */ | ||
194 | #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */ | ||
195 | #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */ | ||
196 | #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */ | ||
197 | #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */ | ||
198 | #define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */ | ||
199 | #define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */ | ||
200 | #define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */ | ||
201 | #define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */ | ||
202 | |||
203 | #ifdef CONFIG_SMP | ||
204 | #define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */ | ||
205 | #define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */ | ||
206 | #define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */ | ||
207 | #define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */ | ||
208 | #define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */ | ||
209 | #define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */ | ||
210 | #define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */ | ||
211 | #define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */ | ||
212 | #endif /* CONFIG_SMP */ | ||
213 | |||
214 | #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */ | ||
215 | #define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */ | ||
216 | #define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */ | ||
217 | #define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */ | ||
218 | #define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */ | ||
219 | #define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */ | ||
220 | #define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */ | ||
221 | #define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */ | ||
222 | |||
223 | #define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */ | ||
224 | #define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */ | ||
225 | #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */ | ||
226 | #define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */ | ||
227 | #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ | ||
228 | #define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */ | ||
229 | #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */ | ||
230 | #define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */ | ||
231 | #define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */ | ||
232 | #define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */ | ||
233 | #define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */ | ||
234 | #define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */ | ||
235 | #define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */ | ||
236 | #define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */ | ||
237 | |||
238 | #define M32R_IRQ_INT0 (1) /* INT0 */ | ||
239 | #define M32R_IRQ_INT1 (2) /* INT1 */ | ||
240 | #define M32R_IRQ_INT2 (3) /* INT2 */ | ||
241 | #define M32R_IRQ_INT3 (4) /* INT3 */ | ||
242 | #define M32R_IRQ_INT4 (5) /* INT4 */ | ||
243 | #define M32R_IRQ_INT5 (6) /* INT5 */ | ||
244 | #define M32R_IRQ_INT6 (7) /* INT6 */ | ||
245 | #define M32R_IRQ_MFT0 (16) /* MFT0 */ | ||
246 | #define M32R_IRQ_MFT1 (17) /* MFT1 */ | ||
247 | #define M32R_IRQ_MFT2 (18) /* MFT2 */ | ||
248 | #define M32R_IRQ_MFT3 (19) /* MFT3 */ | ||
249 | #ifdef CONFIG_CHIP_M32104 | ||
250 | #define M32R_IRQ_MFTX0 (24) /* MFTX0 */ | ||
251 | #define M32R_IRQ_MFTX1 (25) /* MFTX1 */ | ||
252 | #define M32R_IRQ_DMA0 (32) /* DMA0 */ | ||
253 | #define M32R_IRQ_DMA1 (33) /* DMA1 */ | ||
254 | #define M32R_IRQ_DMA2 (34) /* DMA2 */ | ||
255 | #define M32R_IRQ_DMA3 (35) /* DMA3 */ | ||
256 | #define M32R_IRQ_SIO0_R (40) /* SIO0 send */ | ||
257 | #define M32R_IRQ_SIO0_S (41) /* SIO0 receive */ | ||
258 | #define M32R_IRQ_SIO1_R (42) /* SIO1 send */ | ||
259 | #define M32R_IRQ_SIO1_S (43) /* SIO1 receive */ | ||
260 | #define M32R_IRQ_SIO2_R (44) /* SIO2 send */ | ||
261 | #define M32R_IRQ_SIO2_S (45) /* SIO2 receive */ | ||
262 | #define M32R_IRQ_SIO3_R (46) /* SIO3 send */ | ||
263 | #define M32R_IRQ_SIO3_S (47) /* SIO3 receive */ | ||
264 | #define M32R_IRQ_ADC (56) /* ADC */ | ||
265 | #define M32R_IRQ_PC (57) /* PC */ | ||
266 | #else /* ! M32104 */ | ||
267 | #define M32R_IRQ_DMA0 (32) /* DMA0 */ | ||
268 | #define M32R_IRQ_DMA1 (33) /* DMA1 */ | ||
269 | #define M32R_IRQ_SIO0_R (48) /* SIO0 send */ | ||
270 | #define M32R_IRQ_SIO0_S (49) /* SIO0 receive */ | ||
271 | #define M32R_IRQ_SIO1_R (50) /* SIO1 send */ | ||
272 | #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ | ||
273 | #define M32R_IRQ_SIO2_R (52) /* SIO2 send */ | ||
274 | #define M32R_IRQ_SIO2_S (53) /* SIO2 receive */ | ||
275 | #define M32R_IRQ_SIO3_R (54) /* SIO3 send */ | ||
276 | #define M32R_IRQ_SIO3_S (55) /* SIO3 receive */ | ||
277 | #define M32R_IRQ_SIO4_R (56) /* SIO4 send */ | ||
278 | #define M32R_IRQ_SIO4_S (57) /* SIO4 receive */ | ||
279 | #endif /* ! M32104 */ | ||
280 | |||
281 | #ifdef CONFIG_SMP | ||
282 | #define M32R_IRQ_IPI0 (56) | ||
283 | #define M32R_IRQ_IPI1 (57) | ||
284 | #define M32R_IRQ_IPI2 (58) | ||
285 | #define M32R_IRQ_IPI3 (59) | ||
286 | #define M32R_IRQ_IPI4 (60) | ||
287 | #define M32R_IRQ_IPI5 (61) | ||
288 | #define M32R_IRQ_IPI6 (62) | ||
289 | #define M32R_IRQ_IPI7 (63) | ||
290 | #define M32R_CPUID_PORTL (0xffffffe0) | ||
291 | |||
292 | #define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET) | ||
293 | |||
294 | #define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP) | ||
295 | #define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP) | ||
296 | #define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP) | ||
297 | #define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP) | ||
298 | #define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP) | ||
299 | #define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP) | ||
300 | #define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP) | ||
301 | #define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP) | ||
302 | #define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP) | ||
303 | #define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP) | ||
304 | #define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP) | ||
305 | |||
306 | #endif /* CONFIG_SMP */ | ||
307 | |||
308 | #ifndef __ASSEMBLY__ | ||
309 | typedef struct { | ||
310 | unsigned long icucr; /* ICU Control Register */ | ||
311 | } icu_data_t; | ||
312 | #endif | ||
313 | |||
314 | #endif /* _M32102_H_ */ | ||
diff --git a/include/asm-m32r/m32104ut/m32104ut_pld.h b/include/asm-m32r/m32104ut/m32104ut_pld.h deleted file mode 100644 index 2dc89d68b6d9..000000000000 --- a/include/asm-m32r/m32104ut/m32104ut_pld.h +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | #ifndef _M32104UT_M32104UT_PLD_H | ||
2 | #define _M32104UT_M32104UT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32104ut/m32104ut_pld.h | ||
6 | * | ||
7 | * Definitions for Programable Logic Device(PLD) on M32104UT board. | ||
8 | * Based on m32700ut_pld.h | ||
9 | * | ||
10 | * Copyright (c) 2002 Takeo Takahashi | ||
11 | * Copyright (c) 2005 Naoto Sugai | ||
12 | * | ||
13 | * This file is subject to the terms and conditions of the GNU General | ||
14 | * Public License. See the file "COPYING" in the main directory of | ||
15 | * this archive for more details. | ||
16 | */ | ||
17 | |||
18 | #if defined(CONFIG_PLAT_M32104UT) | ||
19 | #define PLD_PLAT_BASE 0x02c00000 | ||
20 | #else | ||
21 | #error "no platform configuration" | ||
22 | #endif | ||
23 | |||
24 | #ifndef __ASSEMBLY__ | ||
25 | /* | ||
26 | * C functions use non-cache address. | ||
27 | */ | ||
28 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
29 | #define __reg8 (volatile unsigned char *) | ||
30 | #define __reg16 (volatile unsigned short *) | ||
31 | #define __reg32 (volatile unsigned int *) | ||
32 | #else | ||
33 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
34 | #define __reg8 | ||
35 | #define __reg16 | ||
36 | #define __reg32 | ||
37 | #endif /* __ASSEMBLY__ */ | ||
38 | |||
39 | /* CFC */ | ||
40 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
41 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
42 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
43 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
44 | |||
45 | /* MMC */ | ||
46 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
47 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
48 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
49 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
50 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
51 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
52 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
53 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
54 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
55 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
56 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
57 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
58 | |||
59 | /* ICU | ||
60 | * ICUISTS: status register | ||
61 | * ICUIREQ0: request register | ||
62 | * ICUIREQ1: request register | ||
63 | * ICUCR3: control register for CFIREQ# interrupt | ||
64 | * ICUCR4: control register for CFC Card insert interrupt | ||
65 | * ICUCR5: control register for CFC Card eject interrupt | ||
66 | * ICUCR6: control register for external interrupt | ||
67 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
68 | * ICUCR13: control register for SC error interrupt | ||
69 | * ICUCR14: control register for SC receive interrupt | ||
70 | * ICUCR15: control register for SC send interrupt | ||
71 | */ | ||
72 | |||
73 | #define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */ | ||
74 | #define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
75 | #define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
76 | #define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
77 | #define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
78 | #define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
79 | #define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */ | ||
80 | #define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
81 | #define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */ | ||
82 | |||
83 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
84 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
85 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
86 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
87 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
88 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
89 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
90 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
91 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
92 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
93 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
94 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
95 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
96 | #define PLD_ICUCR_IEN (0x1000) | ||
97 | #define PLD_ICUCR_IREQ (0x0100) | ||
98 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
99 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
100 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
101 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
102 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
103 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
104 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
105 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
106 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
107 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
108 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
109 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
110 | |||
111 | /* Power Control of MMC and CF */ | ||
112 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
113 | #define PLD_CPCR_CDP 0x0001 | ||
114 | |||
115 | /* LED Control | ||
116 | * | ||
117 | * 1: DIP swich side | ||
118 | * 2: Reset switch side | ||
119 | */ | ||
120 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
121 | #define PLD_IOLED_1_ON 0x001 | ||
122 | #define PLD_IOLED_1_OFF 0x000 | ||
123 | #define PLD_IOLED_2_ON 0x002 | ||
124 | #define PLD_IOLED_2_OFF 0x000 | ||
125 | |||
126 | /* DIP Switch | ||
127 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
128 | * 1: - | ||
129 | * 2: - | ||
130 | * 3: - | ||
131 | */ | ||
132 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
133 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
134 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
135 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
136 | |||
137 | /* CRC */ | ||
138 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
139 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
140 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
141 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
142 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
143 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
144 | |||
145 | /* RTC */ | ||
146 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
147 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
148 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
149 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
150 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
151 | |||
152 | /* SIM Card */ | ||
153 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
154 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
155 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
156 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
157 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
158 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
159 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
160 | |||
161 | #endif /* _M32104UT_M32104UT_PLD_H */ | ||
diff --git a/include/asm-m32r/m32700ut/m32700ut_lan.h b/include/asm-m32r/m32700ut/m32700ut_lan.h deleted file mode 100644 index aae810a4fb2c..000000000000 --- a/include/asm-m32r/m32700ut/m32700ut_lan.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_LAN_H | ||
2 | #define _M32700UT_M32700UT_LAN_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_lan.h | ||
6 | * | ||
7 | * M32700UT-LAN board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* ICU | ||
26 | * ICUISTS: status register | ||
27 | * ICUIREQ0: request register | ||
28 | * ICUIREQ1: request register | ||
29 | * ICUCR3: control register for CFIREQ# interrupt | ||
30 | * ICUCR4: control register for CFC Card insert interrupt | ||
31 | * ICUCR5: control register for CFC Card eject interrupt | ||
32 | * ICUCR6: control register for external interrupt | ||
33 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
34 | * ICUCR13: control register for SC error interrupt | ||
35 | * ICUCR14: control register for SC receive interrupt | ||
36 | * ICUCR15: control register for SC send interrupt | ||
37 | * ICUCR16: control register for SIO0 receive interrupt | ||
38 | * ICUCR17: control register for SIO0 send interrupt | ||
39 | */ | ||
40 | #define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */ | ||
41 | #define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */ | ||
42 | |||
43 | #define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002) | ||
44 | #define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000) | ||
45 | #define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK) | ||
46 | #define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0) | ||
47 | #define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK) | ||
48 | #define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004) | ||
49 | #define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010) | ||
50 | #define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014) | ||
51 | |||
52 | /* | ||
53 | * AR register on PLD | ||
54 | */ | ||
55 | #define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000) | ||
56 | #define ARVCR0_VDS 0x00080000 | ||
57 | #define ARVCR0_RST 0x00010000 | ||
58 | #define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004) | ||
59 | #define ARVCR1_QVGA 0x02000000 | ||
60 | #define ARVCR1_NORMAL 0x01000000 | ||
61 | #define ARVCR1_HIEN 0x00010000 | ||
62 | #define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008) | ||
63 | #define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010) | ||
64 | #define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014) | ||
65 | #define ARINTSEL_INT3 0x10000000 /* CPU INT3 */ | ||
66 | #define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5 | ||
67 | /* | ||
68 | #define ARINTSEL_SEL2 0x00002000 | ||
69 | #define ARINTSEL_SEL3 0x00001000 | ||
70 | #define ARINTSEL_SEL6 0x00000200 | ||
71 | #define ARINTSEL_SEL7 0x00000100 | ||
72 | #define ARINTSEL_SEL9 0x00000040 | ||
73 | #define ARINTSEL_SEL10 0x00000020 | ||
74 | #define ARINTSEL_SEL11 0x00000010 | ||
75 | #define ARINTSEL_SEL12 0x00000008 | ||
76 | */ | ||
77 | |||
78 | /* | ||
79 | * I2C register on PLD | ||
80 | */ | ||
81 | #define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040) | ||
82 | #define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */ | ||
83 | #define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044) | ||
84 | #define PLDI2CMOD_ACKCLK 0x00000200 | ||
85 | #define PLDI2CMOD_DTWD 0x00000100 | ||
86 | #define PLDI2CMOD_10BT 0x00000004 | ||
87 | #define PLDI2CMOD_ATM_NORMAL 0x00000000 | ||
88 | #define PLDI2CMOD_ATM_AUTO 0x00000003 | ||
89 | #define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048) | ||
90 | #define PLDI2CACK_ACK 0x00000001 | ||
91 | #define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c) | ||
92 | #define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050) | ||
93 | #define PLDI2CCND_START 0x00000001 | ||
94 | #define PLDI2CCND_STOP 0x00000002 | ||
95 | #define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054) | ||
96 | #define PLDI2CSTEN_STEN 0x00000001 | ||
97 | #define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060) | ||
98 | #define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064) | ||
99 | #define PLDI2CSTS_TRX 0x00000020 | ||
100 | #define PLDI2CSTS_BB 0x00000010 | ||
101 | #define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */ | ||
102 | |||
103 | #endif /* _M32700UT_M32700UT_LAN_H */ | ||
diff --git a/include/asm-m32r/m32700ut/m32700ut_lcd.h b/include/asm-m32r/m32700ut/m32700ut_lcd.h deleted file mode 100644 index 4c2489079788..000000000000 --- a/include/asm-m32r/m32700ut/m32700ut_lcd.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_LCD_H | ||
2 | #define _M32700UT_M32700UT_LCD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_lcd.h | ||
6 | * | ||
7 | * M32700UT-LCD board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* | ||
26 | * ICU | ||
27 | */ | ||
28 | #define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1) | ||
29 | #define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2) | ||
30 | #define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3) | ||
31 | #define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4) | ||
32 | #define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16) | ||
33 | #define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17) | ||
34 | #define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18) | ||
35 | #define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19) | ||
36 | #define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21) | ||
37 | |||
38 | #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002) | ||
39 | #define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000) | ||
40 | #define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK) | ||
41 | #define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0) | ||
42 | #define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK) | ||
43 | #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004) | ||
44 | #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006) | ||
45 | #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020) | ||
46 | #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022) | ||
47 | #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024) | ||
48 | #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026) | ||
49 | #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030) | ||
50 | #define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032) | ||
51 | #define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034) | ||
52 | #define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036) | ||
53 | #define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a) | ||
54 | |||
55 | #endif /* _M32700UT_M32700UT_LCD_H */ | ||
diff --git a/include/asm-m32r/m32700ut/m32700ut_pld.h b/include/asm-m32r/m32700ut/m32700ut_pld.h deleted file mode 100644 index 57623beb44cb..000000000000 --- a/include/asm-m32r/m32700ut/m32700ut_pld.h +++ /dev/null | |||
@@ -1,259 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_PLD_H | ||
2 | #define _M32700UT_M32700UT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_pld.h | ||
6 | * | ||
7 | * Definitions for Programable Logic Device(PLD) on M32700UT board. | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) | ||
17 | #define PLD_PLAT_BASE 0x04c00000 | ||
18 | #else | ||
19 | #error "no platform configuration" | ||
20 | #endif | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | /* | ||
24 | * C functions use non-cache address. | ||
25 | */ | ||
26 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
27 | #define __reg8 (volatile unsigned char *) | ||
28 | #define __reg16 (volatile unsigned short *) | ||
29 | #define __reg32 (volatile unsigned int *) | ||
30 | #else | ||
31 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
32 | #define __reg8 | ||
33 | #define __reg16 | ||
34 | #define __reg32 | ||
35 | #endif /* __ASSEMBLY__ */ | ||
36 | |||
37 | /* CFC */ | ||
38 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
39 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
40 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
41 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
42 | #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008) | ||
43 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
44 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
45 | #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010) | ||
46 | |||
47 | /* MMC */ | ||
48 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
49 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
50 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
51 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
52 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
53 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
54 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
55 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
56 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
57 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
58 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
59 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
60 | |||
61 | /* ICU | ||
62 | * ICUISTS: status register | ||
63 | * ICUIREQ0: request register | ||
64 | * ICUIREQ1: request register | ||
65 | * ICUCR3: control register for CFIREQ# interrupt | ||
66 | * ICUCR4: control register for CFC Card insert interrupt | ||
67 | * ICUCR5: control register for CFC Card eject interrupt | ||
68 | * ICUCR6: control register for external interrupt | ||
69 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
70 | * ICUCR13: control register for SC error interrupt | ||
71 | * ICUCR14: control register for SC receive interrupt | ||
72 | * ICUCR15: control register for SC send interrupt | ||
73 | * ICUCR16: control register for SIO0 receive interrupt | ||
74 | * ICUCR17: control register for SIO0 send interrupt | ||
75 | */ | ||
76 | #if !defined(CONFIG_PLAT_USRV) | ||
77 | #define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ | ||
78 | #define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ | ||
79 | #define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ | ||
80 | #define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
81 | #define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
82 | #define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
83 | #define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
84 | #define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */ | ||
85 | #define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ | ||
86 | #define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ | ||
87 | #define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ | ||
88 | #define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
89 | #define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */ | ||
90 | #define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */ | ||
91 | #define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
92 | #define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */ | ||
93 | #define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */ | ||
94 | #define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */ | ||
95 | #define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ | ||
96 | #define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ | ||
97 | #define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ | ||
98 | #define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ | ||
99 | #define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ | ||
100 | #define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ | ||
101 | #define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ | ||
102 | #define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ | ||
103 | #define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ | ||
104 | #define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ | ||
105 | #define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ | ||
106 | #define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ | ||
107 | #define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ | ||
108 | #define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */ | ||
109 | |||
110 | #else /* CONFIG_PLAT_USRV */ | ||
111 | |||
112 | #define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ | ||
113 | #define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ | ||
114 | #define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ | ||
115 | #define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */ | ||
116 | #define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */ | ||
117 | #define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */ | ||
118 | #define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */ | ||
119 | #define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */ | ||
120 | #define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ | ||
121 | #define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ | ||
122 | #define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ | ||
123 | #define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */ | ||
124 | #define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */ | ||
125 | #define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */ | ||
126 | #define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */ | ||
127 | #define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */ | ||
128 | #define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */ | ||
129 | #define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */ | ||
130 | #define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ | ||
131 | #define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ | ||
132 | #define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ | ||
133 | #define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ | ||
134 | #define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ | ||
135 | #define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ | ||
136 | #define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ | ||
137 | #define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ | ||
138 | #define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ | ||
139 | #define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ | ||
140 | #define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ | ||
141 | #define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ | ||
142 | #define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ | ||
143 | |||
144 | #endif /* CONFIG_PLAT_USRV */ | ||
145 | |||
146 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
147 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
148 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
149 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
150 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
151 | #define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004) | ||
152 | #define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006) | ||
153 | #define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100) | ||
154 | #define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102) | ||
155 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
156 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
157 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
158 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
159 | #define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c) | ||
160 | #define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e) | ||
161 | #define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110) | ||
162 | #define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112) | ||
163 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
164 | #define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116) | ||
165 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
166 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
167 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
168 | #define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e) | ||
169 | #define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120) | ||
170 | #define PLD_ICUCR_IEN (0x1000) | ||
171 | #define PLD_ICUCR_IREQ (0x0100) | ||
172 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
173 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
174 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
175 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
176 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
177 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
178 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
179 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
180 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
181 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
182 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
183 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
184 | |||
185 | /* Power Control of MMC and CF */ | ||
186 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
187 | #define PLD_CPCR_CF 0x0001 | ||
188 | #define PLD_CPCR_MMC 0x0002 | ||
189 | |||
190 | /* LED Control | ||
191 | * | ||
192 | * 1: DIP swich side | ||
193 | * 2: Reset switch side | ||
194 | */ | ||
195 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
196 | #define PLD_IOLED_1_ON 0x001 | ||
197 | #define PLD_IOLED_1_OFF 0x000 | ||
198 | #define PLD_IOLED_2_ON 0x002 | ||
199 | #define PLD_IOLED_2_OFF 0x000 | ||
200 | |||
201 | /* DIP Switch | ||
202 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
203 | * 1: - | ||
204 | * 2: - | ||
205 | * 3: - | ||
206 | */ | ||
207 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
208 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
209 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
210 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
211 | |||
212 | /* CRC */ | ||
213 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
214 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
215 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
216 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
217 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
218 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
219 | |||
220 | /* RTC */ | ||
221 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
222 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
223 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
224 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
225 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
226 | |||
227 | /* SIO0 */ | ||
228 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
229 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
230 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
231 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
232 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
233 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
234 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
235 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
236 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
237 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
238 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
239 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
240 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
241 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
242 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
243 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
244 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
245 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
246 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
247 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
248 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
249 | |||
250 | /* SIM Card */ | ||
251 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
252 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
253 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
254 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
255 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
256 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
257 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
258 | |||
259 | #endif /* _M32700UT_M32700UT_PLD.H */ | ||
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h deleted file mode 100644 index 214b44b40757..000000000000 --- a/include/asm-m32r/m32r.h +++ /dev/null | |||
@@ -1,160 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_M32R_H_ | ||
2 | #define _ASM_M32R_M32R_H_ | ||
3 | |||
4 | /* | ||
5 | * Renesas M32R processor | ||
6 | * | ||
7 | * Copyright (C) 2003, 2004 Renesas Technology Corp. | ||
8 | */ | ||
9 | |||
10 | |||
11 | /* Chip type */ | ||
12 | #if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP) | ||
13 | #include <asm/m32r_mp_fpga.h> | ||
14 | #elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | ||
15 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | ||
16 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
17 | #include <asm/m32102.h> | ||
18 | #endif | ||
19 | |||
20 | /* Platform type */ | ||
21 | #if defined(CONFIG_PLAT_M32700UT) | ||
22 | #include <asm/m32700ut/m32700ut_pld.h> | ||
23 | #include <asm/m32700ut/m32700ut_lan.h> | ||
24 | #include <asm/m32700ut/m32700ut_lcd.h> | ||
25 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
26 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
27 | #define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE | ||
28 | #define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS | ||
29 | #define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE | ||
30 | #define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS | ||
31 | #define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE | ||
32 | #endif /* CONFIG_PLAT_M32700UT */ | ||
33 | |||
34 | #if defined(CONFIG_PLAT_OPSPUT) | ||
35 | #include <asm/opsput/opsput_pld.h> | ||
36 | #include <asm/opsput/opsput_lan.h> | ||
37 | #include <asm/opsput/opsput_lcd.h> | ||
38 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
39 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
40 | #define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE | ||
41 | #define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS | ||
42 | #define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE | ||
43 | #define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS | ||
44 | #define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE | ||
45 | #endif /* CONFIG_PLAT_OPSPUT */ | ||
46 | |||
47 | #if defined(CONFIG_PLAT_MAPPI2) | ||
48 | #include <asm/mappi2/mappi2_pld.h> | ||
49 | #endif /* CONFIG_PLAT_MAPPI2 */ | ||
50 | |||
51 | #if defined(CONFIG_PLAT_MAPPI3) | ||
52 | #include <asm/mappi3/mappi3_pld.h> | ||
53 | #endif /* CONFIG_PLAT_MAPPI3 */ | ||
54 | |||
55 | #if defined(CONFIG_PLAT_USRV) | ||
56 | #include <asm/m32700ut/m32700ut_pld.h> | ||
57 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
58 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
59 | #define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE | ||
60 | #endif | ||
61 | |||
62 | #if defined(CONFIG_PLAT_M32104UT) | ||
63 | #include <asm/m32104ut/m32104ut_pld.h> | ||
64 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
65 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
66 | #define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE | ||
67 | #endif /* CONFIG_PLAT_M32104 */ | ||
68 | |||
69 | /* | ||
70 | * M32R Register | ||
71 | */ | ||
72 | |||
73 | /* | ||
74 | * MMU Register | ||
75 | */ | ||
76 | |||
77 | #define MMU_REG_BASE (0xffff0000) | ||
78 | #define ITLB_BASE (0xfe000000) | ||
79 | #define DTLB_BASE (0xfe000800) | ||
80 | |||
81 | #define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES | ||
82 | |||
83 | #define MATM MMU_REG_BASE /* MMU Address Translation Mode | ||
84 | Register */ | ||
85 | #define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */ | ||
86 | #define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */ | ||
87 | #define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */ | ||
88 | #define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual | ||
89 | Address Register */ | ||
90 | #define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page | ||
91 | Number Register */ | ||
92 | #define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */ | ||
93 | #define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address | ||
94 | Register */ | ||
95 | #define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */ | ||
96 | #define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for | ||
97 | Instruciton */ | ||
98 | #define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */ | ||
99 | |||
100 | #define MATM_offset (MATM - MMU_REG_BASE) | ||
101 | #define MPSZ_offset (MPSZ - MMU_REG_BASE) | ||
102 | #define MASID_offset (MASID - MMU_REG_BASE) | ||
103 | #define MESTS_offset (MESTS - MMU_REG_BASE) | ||
104 | #define MDEVA_offset (MDEVA - MMU_REG_BASE) | ||
105 | #define MDEVP_offset (MDEVP - MMU_REG_BASE) | ||
106 | #define MPTB_offset (MPTB - MMU_REG_BASE) | ||
107 | #define MSVA_offset (MSVA - MMU_REG_BASE) | ||
108 | #define MTOP_offset (MTOP - MMU_REG_BASE) | ||
109 | #define MIDXI_offset (MIDXI - MMU_REG_BASE) | ||
110 | #define MIDXD_offset (MIDXD - MMU_REG_BASE) | ||
111 | |||
112 | #define MESTS_IT (1 << 0) /* Instruction TLB miss */ | ||
113 | #define MESTS_IA (1 << 1) /* Instruction Access Exception */ | ||
114 | #define MESTS_DT (1 << 4) /* Operand TLB miss */ | ||
115 | #define MESTS_DA (1 << 5) /* Operand Access Exception */ | ||
116 | #define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */ | ||
117 | |||
118 | /* | ||
119 | * PSW (Processor Status Word) | ||
120 | */ | ||
121 | |||
122 | /* PSW bit */ | ||
123 | #define M32R_PSW_BIT_SM (7) /* Stack Mode */ | ||
124 | #define M32R_PSW_BIT_IE (6) /* Interrupt Enable */ | ||
125 | #define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */ | ||
126 | #define M32R_PSW_BIT_C (0) /* Condition */ | ||
127 | #define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */ | ||
128 | #define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */ | ||
129 | #define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */ | ||
130 | #define M32R_PSW_BIT_BC (0+8) /* Backup Condition */ | ||
131 | |||
132 | /* PSW bit map */ | ||
133 | #define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */ | ||
134 | #define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */ | ||
135 | #define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */ | ||
136 | #define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */ | ||
137 | #define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */ | ||
138 | #define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */ | ||
139 | #define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */ | ||
140 | #define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */ | ||
141 | |||
142 | /* | ||
143 | * Direct address to SFR | ||
144 | */ | ||
145 | |||
146 | #include <asm/page.h> | ||
147 | #ifdef CONFIG_MMU | ||
148 | #define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000) | ||
149 | #else | ||
150 | #define NONCACHE_OFFSET __PAGE_OFFSET | ||
151 | #endif /* CONFIG_MMU */ | ||
152 | |||
153 | #define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET | ||
154 | #define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET | ||
155 | #define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET | ||
156 | #define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET | ||
157 | #define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET | ||
158 | #define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET | ||
159 | |||
160 | #endif /* _ASM_M32R_M32R_H_ */ | ||
diff --git a/include/asm-m32r/m32r_mp_fpga.h b/include/asm-m32r/m32r_mp_fpga.h deleted file mode 100644 index 976d2b995919..000000000000 --- a/include/asm-m32r/m32r_mp_fpga.h +++ /dev/null | |||
@@ -1,313 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_M32R_MP_FPGA_ | ||
2 | #define _ASM_M32R_M32R_MP_FPGA_ | ||
3 | |||
4 | /* | ||
5 | * Renesas M32R-MP-FPGA | ||
6 | * | ||
7 | * Copyright (c) 2002 Hitoshi Yamamoto | ||
8 | * Copyright (c) 2003, 2004 Renesas Technology Corp. | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * ======================================================== | ||
13 | * M32R-MP-FPGA Memory Map | ||
14 | * ======================================================== | ||
15 | * 0x00000000 : Block#0 : 64[MB] | ||
16 | * 0x03E00000 : SFR | ||
17 | * 0x03E00000 : reserved | ||
18 | * 0x03EF0000 : FPGA | ||
19 | * 0x03EF1000 : reserved | ||
20 | * 0x03EF4000 : CKM | ||
21 | * 0x03EF4000 : BSELC | ||
22 | * 0x03EF5000 : reserved | ||
23 | * 0x03EFC000 : MFT | ||
24 | * 0x03EFD000 : SIO | ||
25 | * 0x03EFE000 : reserved | ||
26 | * 0x03EFF000 : ICU | ||
27 | * 0x03F00000 : Internal SRAM 64[KB] | ||
28 | * 0x03F10000 : reserved | ||
29 | * -------------------------------------------------------- | ||
30 | * 0x04000000 : Block#1 : 64[MB] | ||
31 | * 0x04000000 : Debug board SRAM 4[MB] | ||
32 | * 0x04400000 : reserved | ||
33 | * -------------------------------------------------------- | ||
34 | * 0x08000000 : Block#2 : 64[MB] | ||
35 | * -------------------------------------------------------- | ||
36 | * 0x0C000000 : Block#3 : 64[MB] | ||
37 | * -------------------------------------------------------- | ||
38 | * 0x10000000 : Block#4 : 64[MB] | ||
39 | * -------------------------------------------------------- | ||
40 | * 0x14000000 : Block#5 : 64[MB] | ||
41 | * -------------------------------------------------------- | ||
42 | * 0x18000000 : Block#6 : 64[MB] | ||
43 | * -------------------------------------------------------- | ||
44 | * 0x1C000000 : Block#7 : 64[MB] | ||
45 | * -------------------------------------------------------- | ||
46 | * 0xFE000000 : TLB | ||
47 | * 0xFE000000 : ITLB | ||
48 | * 0xFE000080 : reserved | ||
49 | * 0xFE000800 : DTLB | ||
50 | * 0xFE000880 : reserved | ||
51 | * -------------------------------------------------------- | ||
52 | * 0xFF000000 : System area | ||
53 | * 0xFFFF0000 : MMU | ||
54 | * 0xFFFF0030 : reserved | ||
55 | * 0xFFFF8000 : Debug function | ||
56 | * 0xFFFFA000 : reserved | ||
57 | * 0xFFFFC000 : CPU control | ||
58 | * 0xFFFFFFFF | ||
59 | * ======================================================== | ||
60 | */ | ||
61 | |||
62 | /*======================================================================* | ||
63 | * Special Function Register | ||
64 | *======================================================================*/ | ||
65 | #define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */ | ||
66 | |||
67 | /* | ||
68 | * FPGA registers. | ||
69 | */ | ||
70 | #define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET) | ||
71 | |||
72 | #define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP) | ||
73 | #define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP) | ||
74 | #define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP) | ||
75 | #define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP) | ||
76 | #define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP) | ||
77 | #define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP) | ||
78 | #define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP) | ||
79 | #define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP) | ||
80 | #define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP) | ||
81 | #define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP) | ||
82 | #define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP) | ||
83 | |||
84 | /* | ||
85 | * Clock and Power Manager registers. | ||
86 | */ | ||
87 | #define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET) | ||
88 | |||
89 | #define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET) | ||
90 | #define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET) | ||
91 | #define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET) | ||
92 | |||
93 | /* | ||
94 | * Block SELect Controller registers. | ||
95 | */ | ||
96 | #define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET) | ||
97 | |||
98 | #define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET) | ||
99 | #define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET) | ||
100 | #define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET) | ||
101 | #define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET) | ||
102 | #define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET) | ||
103 | #define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET) | ||
104 | #define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET) | ||
105 | #define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET) | ||
106 | #define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET) | ||
107 | #define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET) | ||
108 | #define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET) | ||
109 | #define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET) | ||
110 | #define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET) | ||
111 | #define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET) | ||
112 | #define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET) | ||
113 | #define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET) | ||
114 | |||
115 | /* | ||
116 | * Multi Function Timer registers. | ||
117 | */ | ||
118 | #define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET) | ||
119 | |||
120 | #define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */ | ||
121 | #define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */ | ||
122 | |||
123 | #define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET) | ||
124 | #define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */ | ||
125 | #define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */ | ||
126 | #define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */ | ||
127 | #define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */ | ||
128 | #define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */ | ||
129 | |||
130 | #define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET) | ||
131 | #define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */ | ||
132 | #define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */ | ||
133 | #define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */ | ||
134 | #define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */ | ||
135 | #define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */ | ||
136 | |||
137 | #define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET) | ||
138 | #define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */ | ||
139 | #define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */ | ||
140 | #define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */ | ||
141 | #define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */ | ||
142 | #define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */ | ||
143 | |||
144 | #define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET) | ||
145 | #define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */ | ||
146 | #define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */ | ||
147 | #define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */ | ||
148 | #define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */ | ||
149 | #define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */ | ||
150 | |||
151 | #define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET) | ||
152 | #define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */ | ||
153 | #define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */ | ||
154 | #define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */ | ||
155 | #define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */ | ||
156 | #define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */ | ||
157 | |||
158 | #define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET) | ||
159 | #define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */ | ||
160 | #define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */ | ||
161 | #define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */ | ||
162 | #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ | ||
163 | #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ | ||
164 | |||
165 | #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ | ||
166 | #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ | ||
167 | #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ | ||
168 | #define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */ | ||
169 | #define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */ | ||
170 | #define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */ | ||
171 | #define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */ | ||
172 | #define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */ | ||
173 | #define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */ | ||
174 | #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ | ||
175 | #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ | ||
176 | #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ | ||
177 | |||
178 | #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ | ||
179 | #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ | ||
180 | #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */ | ||
181 | #define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */ | ||
182 | #define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */ | ||
183 | #define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */ | ||
184 | #define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */ | ||
185 | #define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */ | ||
186 | #define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */ | ||
187 | #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */ | ||
188 | #define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */ | ||
189 | #define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */ | ||
190 | #define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */ | ||
191 | #define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */ | ||
192 | #define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */ | ||
193 | |||
194 | /* | ||
195 | * Serial I/O registers. | ||
196 | */ | ||
197 | #define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET) | ||
198 | |||
199 | #define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET) | ||
200 | #define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET) | ||
201 | #define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET) | ||
202 | #define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET) | ||
203 | #define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET) | ||
204 | #define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET) | ||
205 | #define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET) | ||
206 | #define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET) | ||
207 | #define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET) | ||
208 | |||
209 | /* | ||
210 | * Interrupt Control Unit registers. | ||
211 | */ | ||
212 | #define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET) | ||
213 | |||
214 | #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) | ||
215 | #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) | ||
216 | #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) | ||
217 | #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) | ||
218 | #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) | ||
219 | #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ | ||
220 | #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ | ||
221 | #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ | ||
222 | #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ | ||
223 | #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ | ||
224 | #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ | ||
225 | #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ | ||
226 | #define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */ | ||
227 | #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */ | ||
228 | #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */ | ||
229 | #define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */ | ||
230 | #define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */ | ||
231 | #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */ | ||
232 | #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */ | ||
233 | #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */ | ||
234 | #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */ | ||
235 | #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */ | ||
236 | #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */ | ||
237 | #define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */ | ||
238 | #define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */ | ||
239 | #define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */ | ||
240 | #define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */ | ||
241 | #define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */ | ||
242 | #define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */ | ||
243 | #define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */ | ||
244 | #define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */ | ||
245 | |||
246 | #define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF) | ||
247 | #define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F) | ||
248 | #define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7) | ||
249 | |||
250 | #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */ | ||
251 | #define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */ | ||
252 | #define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */ | ||
253 | #define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */ | ||
254 | #define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */ | ||
255 | #define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */ | ||
256 | #define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */ | ||
257 | #define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */ | ||
258 | |||
259 | #define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */ | ||
260 | #define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */ | ||
261 | #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */ | ||
262 | #define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */ | ||
263 | #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ | ||
264 | #define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */ | ||
265 | #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */ | ||
266 | #define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */ | ||
267 | #define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */ | ||
268 | #define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */ | ||
269 | #define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */ | ||
270 | #define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */ | ||
271 | #define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */ | ||
272 | #define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */ | ||
273 | #define M32R_ICUCR_ILEVEL_MASK (7UL) | ||
274 | |||
275 | #define M32R_IRQ_INT0 (1) /* INT0 */ | ||
276 | #define M32R_IRQ_INT1 (2) /* INT1 */ | ||
277 | #define M32R_IRQ_INT2 (3) /* INT2 */ | ||
278 | #define M32R_IRQ_INT3 (4) /* INT3 */ | ||
279 | #define M32R_IRQ_INT4 (5) /* INT4 */ | ||
280 | #define M32R_IRQ_INT5 (6) /* INT5 */ | ||
281 | #define M32R_IRQ_INT6 (7) /* INT6 */ | ||
282 | #define M32R_IRQ_INT7 (8) /* INT7 */ | ||
283 | #define M32R_IRQ_MFT0 (16) /* MFT0 */ | ||
284 | #define M32R_IRQ_MFT1 (17) /* MFT1 */ | ||
285 | #define M32R_IRQ_MFT2 (18) /* MFT2 */ | ||
286 | #define M32R_IRQ_MFT3 (19) /* MFT3 */ | ||
287 | #define M32R_IRQ_MFT4 (20) /* MFT4 */ | ||
288 | #define M32R_IRQ_MFT5 (21) /* MFT5 */ | ||
289 | #define M32R_IRQ_DMAC0 (32) /* DMAC0 */ | ||
290 | #define M32R_IRQ_DMAC1 (33) /* DMAC1 */ | ||
291 | #define M32R_IRQ_SIO0_R (48) /* SIO0 receive */ | ||
292 | #define M32R_IRQ_SIO0_S (49) /* SIO0 send */ | ||
293 | #define M32R_IRQ_SIO1_R (50) /* SIO1 send */ | ||
294 | #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ | ||
295 | #define M32R_IRQ_IPI0 (56) /* IPI0 */ | ||
296 | #define M32R_IRQ_IPI1 (57) /* IPI1 */ | ||
297 | #define M32R_IRQ_IPI2 (58) /* IPI2 */ | ||
298 | #define M32R_IRQ_IPI3 (59) /* IPI3 */ | ||
299 | #define M32R_IRQ_IPI4 (60) /* IPI4 */ | ||
300 | #define M32R_IRQ_IPI5 (61) /* IPI5 */ | ||
301 | #define M32R_IRQ_IPI6 (62) /* IPI6 */ | ||
302 | #define M32R_IRQ_IPI7 (63) /* IPI7 */ | ||
303 | |||
304 | /*======================================================================* | ||
305 | * CPU | ||
306 | *======================================================================*/ | ||
307 | |||
308 | #define M32R_CPUID_PORTL (0xFFFFFFE0) | ||
309 | #define M32R_MCICAR_PORTL (0xFFFFFFF0) | ||
310 | #define M32R_MCDCAR_PORTL (0xFFFFFFF4) | ||
311 | #define M32R_MCCR_PORTL (0xFFFFFFFC) | ||
312 | |||
313 | #endif /* _ASM_M32R_M32R_MP_FPGA_ */ | ||
diff --git a/include/asm-m32r/mappi2/mappi2_pld.h b/include/asm-m32r/mappi2/mappi2_pld.h deleted file mode 100644 index 2624c9db7255..000000000000 --- a/include/asm-m32r/mappi2/mappi2_pld.h +++ /dev/null | |||
@@ -1,150 +0,0 @@ | |||
1 | #ifndef _MAPPI2_PLD_H | ||
2 | #define _MAPPI2_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/mappi2/mappi2_pld.h | ||
6 | * | ||
7 | * Definitions for Extended IO Logic on MAPPI2 board. | ||
8 | * based on m32700ut_pld.h | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General | ||
11 | * Public License. See the file "COPYING" in the main directory of | ||
12 | * this archive for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* FIXME: | ||
17 | * Some C functions use non-cache address, so can't define non-cache address. | ||
18 | */ | ||
19 | #define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */) | ||
20 | #define __reg8 (volatile unsigned char *) | ||
21 | #define __reg16 (volatile unsigned short *) | ||
22 | #define __reg32 (volatile unsigned int *) | ||
23 | #else | ||
24 | #define PLD_BASE (0x10c00000 + NONCACHE_OFFSET) | ||
25 | #define __reg8 | ||
26 | #define __reg16 | ||
27 | #define __reg32 | ||
28 | #endif /* __ASSEMBLY__ */ | ||
29 | |||
30 | /* CFC */ | ||
31 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
32 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
33 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
34 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
35 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
36 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
37 | |||
38 | /* MMC */ | ||
39 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
40 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
41 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
42 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
43 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
44 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
45 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
46 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
47 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
48 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
49 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
50 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
51 | |||
52 | /* Power Control of MMC and CF */ | ||
53 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
54 | |||
55 | |||
56 | /*==== ICU ====*/ | ||
57 | #define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ | ||
58 | #define M32R_IRQ_I2C (28) /* I2C-BUS */ | ||
59 | #if 1 | ||
60 | #define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */ | ||
61 | #define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */ | ||
62 | #define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */ | ||
63 | #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ | ||
64 | #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ | ||
65 | #else | ||
66 | #define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */ | ||
67 | #define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */ | ||
68 | #define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */ | ||
69 | #define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */ | ||
70 | #define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */ | ||
71 | #endif | ||
72 | |||
73 | |||
74 | #if 0 | ||
75 | /* LED Control | ||
76 | * | ||
77 | * 1: DIP swich side | ||
78 | * 2: Reset switch side | ||
79 | */ | ||
80 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
81 | #define PLD_IOLED_1_ON 0x001 | ||
82 | #define PLD_IOLED_1_OFF 0x000 | ||
83 | #define PLD_IOLED_2_ON 0x002 | ||
84 | #define PLD_IOLED_2_OFF 0x000 | ||
85 | |||
86 | /* DIP Switch | ||
87 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
88 | * 1: - | ||
89 | * 2: - | ||
90 | * 3: - | ||
91 | */ | ||
92 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
93 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
94 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
95 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
96 | |||
97 | #endif | ||
98 | |||
99 | /* CRC */ | ||
100 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
101 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
102 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
103 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
104 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
105 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
106 | |||
107 | |||
108 | #if 0 | ||
109 | /* RTC */ | ||
110 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
111 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
112 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
113 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
114 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
115 | |||
116 | /* SIO0 */ | ||
117 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
118 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
119 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
120 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
121 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
122 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
123 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
124 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
125 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
126 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
127 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
128 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
129 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
130 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
131 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
132 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
133 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
134 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
135 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
136 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
137 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
138 | |||
139 | /* SIM Card */ | ||
140 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
141 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
142 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
143 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
144 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
145 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
146 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
147 | |||
148 | #endif | ||
149 | |||
150 | #endif /* _MAPPI2_PLD.H */ | ||
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h deleted file mode 100644 index 451c40ee70af..000000000000 --- a/include/asm-m32r/mappi3/mappi3_pld.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | #ifndef _MAPPI3_PLD_H | ||
2 | #define _MAPPI3_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/mappi3/mappi3_pld.h | ||
6 | * | ||
7 | * Definitions for Extended IO Logic on MAPPI3 board. | ||
8 | * based on m32700ut_pld.h | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General | ||
11 | * Public License. See the file "COPYING" in the main directory of | ||
12 | * this archive for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* FIXME: | ||
17 | * Some C functions use non-cache address, so can't define non-cache address. | ||
18 | */ | ||
19 | #define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */) | ||
20 | #define __reg8 (volatile unsigned char *) | ||
21 | #define __reg16 (volatile unsigned short *) | ||
22 | #define __reg32 (volatile unsigned int *) | ||
23 | #else | ||
24 | #define PLD_BASE (0x1c000000 + NONCACHE_OFFSET) | ||
25 | #define __reg8 | ||
26 | #define __reg16 | ||
27 | #define __reg32 | ||
28 | #endif /* __ASSEMBLY__ */ | ||
29 | |||
30 | /* CFC */ | ||
31 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
32 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
33 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
34 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
35 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
36 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
37 | |||
38 | /* MMC */ | ||
39 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
40 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
41 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
42 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
43 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
44 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
45 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
46 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
47 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
48 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
49 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
50 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
51 | |||
52 | /* Power Control of MMC and CF */ | ||
53 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
54 | |||
55 | /* ICU */ | ||
56 | #define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ | ||
57 | #define M32R_IRQ_I2C (28) /* I2C-BUS */ | ||
58 | #define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ | ||
59 | #define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */ | ||
60 | #define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ | ||
61 | #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ | ||
62 | #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ | ||
63 | |||
64 | #if 0 | ||
65 | /* LED Control | ||
66 | * | ||
67 | * 1: DIP swich side | ||
68 | * 2: Reset switch side | ||
69 | */ | ||
70 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
71 | #define PLD_IOLED_1_ON 0x001 | ||
72 | #define PLD_IOLED_1_OFF 0x000 | ||
73 | #define PLD_IOLED_2_ON 0x002 | ||
74 | #define PLD_IOLED_2_OFF 0x000 | ||
75 | |||
76 | /* DIP Switch | ||
77 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
78 | * 1: - | ||
79 | * 2: - | ||
80 | * 3: - | ||
81 | */ | ||
82 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
83 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
84 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
85 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
86 | |||
87 | #endif | ||
88 | |||
89 | /* CRC */ | ||
90 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
91 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
92 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
93 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
94 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
95 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
96 | |||
97 | #if 0 | ||
98 | /* RTC */ | ||
99 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
100 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
101 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
102 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
103 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
104 | |||
105 | /* SIO0 */ | ||
106 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
107 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
108 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
109 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
110 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
111 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
112 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
113 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
114 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
115 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
116 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
117 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
118 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
119 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
120 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
121 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
122 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
123 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
124 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
125 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
126 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
127 | |||
128 | /* SIM Card */ | ||
129 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
130 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
131 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
132 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
133 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
134 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
135 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
136 | |||
137 | #endif | ||
138 | |||
139 | /* Reset Control */ | ||
140 | #define PLD_REBOOT __reg16(PLD_BASE + 0x38000) | ||
141 | |||
142 | #endif /* _MAPPI3_PLD.H */ | ||
diff --git a/include/asm-m32r/mc146818rtc.h b/include/asm-m32r/mc146818rtc.h deleted file mode 100644 index aa1b7bf84f51..000000000000 --- a/include/asm-m32r/mc146818rtc.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * Machine dependent access functions for RTC registers. | ||
3 | */ | ||
4 | #ifndef _ASM_MC146818RTC_H | ||
5 | #define _ASM_MC146818RTC_H | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | |||
9 | #ifndef RTC_PORT | ||
10 | #define RTC_PORT(x) ((x)) | ||
11 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
12 | #endif | ||
13 | |||
14 | /* | ||
15 | * The yet supported machines all access the RTC index register via | ||
16 | * an ISA port access but the way to access the date register differs ... | ||
17 | */ | ||
18 | #define CMOS_READ(addr) ({ \ | ||
19 | outb_p((addr),RTC_PORT(0)); \ | ||
20 | inb_p(RTC_PORT(1)); \ | ||
21 | }) | ||
22 | #define CMOS_WRITE(val, addr) ({ \ | ||
23 | outb_p((addr),RTC_PORT(0)); \ | ||
24 | outb_p((val),RTC_PORT(1)); \ | ||
25 | }) | ||
26 | |||
27 | #define RTC_IRQ 8 | ||
28 | |||
29 | #endif /* _ASM_MC146818RTC_H */ | ||
diff --git a/include/asm-m32r/mman.h b/include/asm-m32r/mman.h deleted file mode 100644 index 516a8973b130..000000000000 --- a/include/asm-m32r/mman.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __M32R_MMAN_H__ | ||
2 | #define __M32R_MMAN_H__ | ||
3 | |||
4 | #include <asm-generic/mman.h> | ||
5 | |||
6 | #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ | ||
7 | #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ | ||
8 | #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ | ||
9 | #define MAP_LOCKED 0x2000 /* pages are locked */ | ||
10 | #define MAP_NORESERVE 0x4000 /* don't check for reservations */ | ||
11 | #define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ | ||
12 | #define MAP_NONBLOCK 0x10000 /* do not block on IO */ | ||
13 | |||
14 | #define MCL_CURRENT 1 /* lock all current mappings */ | ||
15 | #define MCL_FUTURE 2 /* lock all future mappings */ | ||
16 | |||
17 | #endif /* __M32R_MMAN_H__ */ | ||
diff --git a/include/asm-m32r/mmu.h b/include/asm-m32r/mmu.h deleted file mode 100644 index 150cb92bb666..000000000000 --- a/include/asm-m32r/mmu.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_MMU_H | ||
2 | #define _ASM_M32R_MMU_H | ||
3 | |||
4 | #if !defined(CONFIG_MMU) | ||
5 | |||
6 | typedef struct { | ||
7 | unsigned long end_brk; | ||
8 | } mm_context_t; | ||
9 | |||
10 | #else /* CONFIG_MMU */ | ||
11 | |||
12 | /* Default "unsigned long" context */ | ||
13 | #ifndef CONFIG_SMP | ||
14 | typedef unsigned long mm_context_t; | ||
15 | #else | ||
16 | typedef unsigned long mm_context_t[NR_CPUS]; | ||
17 | #endif | ||
18 | |||
19 | #endif /* CONFIG_MMU */ | ||
20 | |||
21 | #endif /* _ASM_M32R_MMU_H */ | ||
diff --git a/include/asm-m32r/mmu_context.h b/include/asm-m32r/mmu_context.h deleted file mode 100644 index 91909e5dd9d0..000000000000 --- a/include/asm-m32r/mmu_context.h +++ /dev/null | |||
@@ -1,164 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_MMU_CONTEXT_H | ||
2 | #define _ASM_M32R_MMU_CONTEXT_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | #include <asm/m32r.h> | ||
6 | |||
7 | #define MMU_CONTEXT_ASID_MASK (0x000000FF) | ||
8 | #define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00) | ||
9 | #define MMU_CONTEXT_FIRST_VERSION (0x00000100) | ||
10 | #define NO_CONTEXT (0x00000000) | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | #include <asm/atomic.h> | ||
15 | #include <asm/pgalloc.h> | ||
16 | #include <asm/mmu.h> | ||
17 | #include <asm/tlbflush.h> | ||
18 | #include <asm-generic/mm_hooks.h> | ||
19 | |||
20 | /* | ||
21 | * Cache of MMU context last used. | ||
22 | */ | ||
23 | #ifndef CONFIG_SMP | ||
24 | extern unsigned long mmu_context_cache_dat; | ||
25 | #define mmu_context_cache mmu_context_cache_dat | ||
26 | #define mm_context(mm) mm->context | ||
27 | #else /* not CONFIG_SMP */ | ||
28 | extern unsigned long mmu_context_cache_dat[]; | ||
29 | #define mmu_context_cache mmu_context_cache_dat[smp_processor_id()] | ||
30 | #define mm_context(mm) mm->context[smp_processor_id()] | ||
31 | #endif /* not CONFIG_SMP */ | ||
32 | |||
33 | #define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid()) | ||
34 | #define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT)) | ||
35 | |||
36 | #ifdef CONFIG_MMU | ||
37 | #define enter_lazy_tlb(mm, tsk) do { } while (0) | ||
38 | |||
39 | static inline void get_new_mmu_context(struct mm_struct *mm) | ||
40 | { | ||
41 | unsigned long mc = ++mmu_context_cache; | ||
42 | |||
43 | if (!(mc & MMU_CONTEXT_ASID_MASK)) { | ||
44 | /* We exhaust ASID of this version. | ||
45 | Flush all TLB and start new cycle. */ | ||
46 | local_flush_tlb_all(); | ||
47 | /* Fix version if needed. | ||
48 | Note that we avoid version #0 to distingush NO_CONTEXT. */ | ||
49 | if (!mc) | ||
50 | mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; | ||
51 | } | ||
52 | mm_context(mm) = mc; | ||
53 | } | ||
54 | |||
55 | /* | ||
56 | * Get MMU context if needed. | ||
57 | */ | ||
58 | static inline void get_mmu_context(struct mm_struct *mm) | ||
59 | { | ||
60 | if (mm) { | ||
61 | unsigned long mc = mmu_context_cache; | ||
62 | |||
63 | /* Check if we have old version of context. | ||
64 | If it's old, we need to get new context with new version. */ | ||
65 | if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK) | ||
66 | get_new_mmu_context(mm); | ||
67 | } | ||
68 | } | ||
69 | |||
70 | /* | ||
71 | * Initialize the context related info for a new mm_struct | ||
72 | * instance. | ||
73 | */ | ||
74 | static inline int init_new_context(struct task_struct *tsk, | ||
75 | struct mm_struct *mm) | ||
76 | { | ||
77 | #ifndef CONFIG_SMP | ||
78 | mm->context = NO_CONTEXT; | ||
79 | #else /* CONFIG_SMP */ | ||
80 | int num_cpus = num_online_cpus(); | ||
81 | int i; | ||
82 | |||
83 | for (i = 0 ; i < num_cpus ; i++) | ||
84 | mm->context[i] = NO_CONTEXT; | ||
85 | #endif /* CONFIG_SMP */ | ||
86 | |||
87 | return 0; | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * Destroy context related info for an mm_struct that is about | ||
92 | * to be put to rest. | ||
93 | */ | ||
94 | #define destroy_context(mm) do { } while (0) | ||
95 | |||
96 | static inline void set_asid(unsigned long asid) | ||
97 | { | ||
98 | *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK); | ||
99 | } | ||
100 | |||
101 | static inline unsigned long get_asid(void) | ||
102 | { | ||
103 | unsigned long asid; | ||
104 | |||
105 | asid = *(volatile long *)MASID; | ||
106 | asid &= MMU_CONTEXT_ASID_MASK; | ||
107 | |||
108 | return asid; | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * After we have set current->mm to a new value, this activates | ||
113 | * the context for the new mm so we see the new mappings. | ||
114 | */ | ||
115 | static inline void activate_context(struct mm_struct *mm) | ||
116 | { | ||
117 | get_mmu_context(mm); | ||
118 | set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK); | ||
119 | } | ||
120 | |||
121 | static inline void switch_mm(struct mm_struct *prev, | ||
122 | struct mm_struct *next, struct task_struct *tsk) | ||
123 | { | ||
124 | #ifdef CONFIG_SMP | ||
125 | int cpu = smp_processor_id(); | ||
126 | #endif /* CONFIG_SMP */ | ||
127 | |||
128 | if (prev != next) { | ||
129 | #ifdef CONFIG_SMP | ||
130 | cpu_set(cpu, next->cpu_vm_mask); | ||
131 | #endif /* CONFIG_SMP */ | ||
132 | /* Set MPTB = next->pgd */ | ||
133 | *(volatile unsigned long *)MPTB = (unsigned long)next->pgd; | ||
134 | activate_context(next); | ||
135 | } | ||
136 | #ifdef CONFIG_SMP | ||
137 | else | ||
138 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) | ||
139 | activate_context(next); | ||
140 | #endif /* CONFIG_SMP */ | ||
141 | } | ||
142 | |||
143 | #define deactivate_mm(tsk, mm) do { } while (0) | ||
144 | |||
145 | #define activate_mm(prev, next) \ | ||
146 | switch_mm((prev), (next), NULL) | ||
147 | |||
148 | #else /* not CONFIG_MMU */ | ||
149 | #define get_mmu_context(mm) do { } while (0) | ||
150 | #define init_new_context(tsk,mm) (0) | ||
151 | #define destroy_context(mm) do { } while (0) | ||
152 | #define set_asid(asid) do { } while (0) | ||
153 | #define get_asid() (0) | ||
154 | #define activate_context(mm) do { } while (0) | ||
155 | #define switch_mm(prev,next,tsk) do { } while (0) | ||
156 | #define deactivate_mm(mm,tsk) do { } while (0) | ||
157 | #define activate_mm(prev,next) do { } while (0) | ||
158 | #define enter_lazy_tlb(mm,tsk) do { } while (0) | ||
159 | #endif /* not CONFIG_MMU */ | ||
160 | |||
161 | #endif /* not __ASSEMBLY__ */ | ||
162 | |||
163 | #endif /* __KERNEL__ */ | ||
164 | #endif /* _ASM_M32R_MMU_CONTEXT_H */ | ||
diff --git a/include/asm-m32r/mmzone.h b/include/asm-m32r/mmzone.h deleted file mode 100644 index 9f3b5accda88..000000000000 --- a/include/asm-m32r/mmzone.h +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* | ||
2 | * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002 | ||
3 | * | ||
4 | */ | ||
5 | |||
6 | #ifndef _ASM_MMZONE_H_ | ||
7 | #define _ASM_MMZONE_H_ | ||
8 | |||
9 | #include <asm/smp.h> | ||
10 | |||
11 | #ifdef CONFIG_DISCONTIGMEM | ||
12 | |||
13 | extern struct pglist_data *node_data[]; | ||
14 | #define NODE_DATA(nid) (node_data[nid]) | ||
15 | |||
16 | #define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn) | ||
17 | #define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) | ||
18 | #define node_end_pfn(nid) \ | ||
19 | ({ \ | ||
20 | pg_data_t *__pgdat = NODE_DATA(nid); \ | ||
21 | __pgdat->node_start_pfn + __pgdat->node_spanned_pages - 1; \ | ||
22 | }) | ||
23 | |||
24 | #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) | ||
25 | /* | ||
26 | * pfn_valid should be made as fast as possible, and the current definition | ||
27 | * is valid for machines that are NUMA, but still contiguous, which is what | ||
28 | * is currently supported. A more generalised, but slower definition would | ||
29 | * be something like this - mbligh: | ||
30 | * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) ) | ||
31 | */ | ||
32 | #if 1 /* M32R_FIXME */ | ||
33 | #define pfn_valid(pfn) (1) | ||
34 | #else | ||
35 | #define pfn_valid(pfn) ((pfn) < num_physpages) | ||
36 | #endif | ||
37 | |||
38 | /* | ||
39 | * generic node memory support, the following assumptions apply: | ||
40 | */ | ||
41 | |||
42 | static __inline__ int pfn_to_nid(unsigned long pfn) | ||
43 | { | ||
44 | int node; | ||
45 | |||
46 | for (node = 0 ; node < MAX_NUMNODES ; node++) | ||
47 | if (pfn >= node_start_pfn(node) && pfn <= node_end_pfn(node)) | ||
48 | break; | ||
49 | |||
50 | return node; | ||
51 | } | ||
52 | |||
53 | static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn) | ||
54 | { | ||
55 | return(NODE_DATA(pfn_to_nid(pfn))); | ||
56 | } | ||
57 | |||
58 | #endif /* CONFIG_DISCONTIGMEM */ | ||
59 | #endif /* _ASM_MMZONE_H_ */ | ||
diff --git a/include/asm-m32r/module.h b/include/asm-m32r/module.h deleted file mode 100644 index eb73ee011215..000000000000 --- a/include/asm-m32r/module.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_MODULE_H | ||
2 | #define _ASM_M32R_MODULE_H | ||
3 | |||
4 | struct mod_arch_specific { }; | ||
5 | |||
6 | #define Elf_Shdr Elf32_Shdr | ||
7 | #define Elf_Sym Elf32_Sym | ||
8 | #define Elf_Ehdr Elf32_Ehdr | ||
9 | |||
10 | #endif /* _ASM_M32R_MODULE_H */ | ||
diff --git a/include/asm-m32r/msgbuf.h b/include/asm-m32r/msgbuf.h deleted file mode 100644 index 0d5a877b813e..000000000000 --- a/include/asm-m32r/msgbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_MSGBUF_H | ||
2 | #define _ASM_M32R_MSGBUF_H | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for m32r architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
19 | unsigned long __unused2; | ||
20 | __kernel_time_t msg_ctime; /* last change time */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | #endif /* _ASM_M32R_MSGBUF_H */ | ||
diff --git a/include/asm-m32r/mutex.h b/include/asm-m32r/mutex.h deleted file mode 100644 index 458c1f7fbc18..000000000000 --- a/include/asm-m32r/mutex.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * Pull in the generic implementation for the mutex fastpath. | ||
3 | * | ||
4 | * TODO: implement optimized primitives instead, or leave the generic | ||
5 | * implementation in place, or pick the atomic_xchg() based generic | ||
6 | * implementation. (see asm-generic/mutex-xchg.h for details) | ||
7 | */ | ||
8 | |||
9 | #include <asm-generic/mutex-dec.h> | ||
diff --git a/include/asm-m32r/opsput/opsput_lan.h b/include/asm-m32r/opsput/opsput_lan.h deleted file mode 100644 index a5f18dd1ab20..000000000000 --- a/include/asm-m32r/opsput/opsput_lan.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_LAN_H | ||
2 | #define _OPSPUT_OPSPUT_LAN_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_lan.h | ||
6 | * | ||
7 | * OPSPUT-LAN board | ||
8 | * | ||
9 | * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* ICU | ||
26 | * ICUISTS: status register | ||
27 | * ICUIREQ0: request register | ||
28 | * ICUIREQ1: request register | ||
29 | * ICUCR3: control register for CFIREQ# interrupt | ||
30 | * ICUCR4: control register for CFC Card insert interrupt | ||
31 | * ICUCR5: control register for CFC Card eject interrupt | ||
32 | * ICUCR6: control register for external interrupt | ||
33 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
34 | * ICUCR13: control register for SC error interrupt | ||
35 | * ICUCR14: control register for SC receive interrupt | ||
36 | * ICUCR15: control register for SC send interrupt | ||
37 | * ICUCR16: control register for SIO0 receive interrupt | ||
38 | * ICUCR17: control register for SIO0 send interrupt | ||
39 | */ | ||
40 | #define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */ | ||
41 | #define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */ | ||
42 | |||
43 | #define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002) | ||
44 | #define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000) | ||
45 | #define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK) | ||
46 | #define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0) | ||
47 | #define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK) | ||
48 | #define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004) | ||
49 | #define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010) | ||
50 | #define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014) | ||
51 | |||
52 | #endif /* _OPSPUT_OPSPUT_LAN_H */ | ||
diff --git a/include/asm-m32r/opsput/opsput_lcd.h b/include/asm-m32r/opsput/opsput_lcd.h deleted file mode 100644 index 369c9f0832a6..000000000000 --- a/include/asm-m32r/opsput/opsput_lcd.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_LCD_H | ||
2 | #define _OPSPUT_OPSPUT_LCD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_lcd.h | ||
6 | * | ||
7 | * OPSPUT-LCD board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* | ||
26 | * ICU | ||
27 | */ | ||
28 | #define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1) | ||
29 | #define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2) | ||
30 | #define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3) | ||
31 | #define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4) | ||
32 | #define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16) | ||
33 | #define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17) | ||
34 | #define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18) | ||
35 | #define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19) | ||
36 | #define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21) | ||
37 | |||
38 | #define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002) | ||
39 | #define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000) | ||
40 | #define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK) | ||
41 | #define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0) | ||
42 | #define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK) | ||
43 | #define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004) | ||
44 | #define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006) | ||
45 | #define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020) | ||
46 | #define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022) | ||
47 | #define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024) | ||
48 | #define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026) | ||
49 | #define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030) | ||
50 | #define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032) | ||
51 | #define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034) | ||
52 | #define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036) | ||
53 | #define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a) | ||
54 | |||
55 | #endif /* _OPSPUT_OPSPUT_LCD_H */ | ||
diff --git a/include/asm-m32r/opsput/opsput_pld.h b/include/asm-m32r/opsput/opsput_pld.h deleted file mode 100644 index 3f11ea1aac2d..000000000000 --- a/include/asm-m32r/opsput/opsput_pld.h +++ /dev/null | |||
@@ -1,255 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_PLD_H | ||
2 | #define _OPSPUT_OPSPUT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_pld.h | ||
6 | * | ||
7 | * Definitions for Programable Logic Device(PLD) on OPSPUT board. | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #define PLD_PLAT_BASE 0x1cc00000 | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | /* | ||
20 | * C functions use non-cache address. | ||
21 | */ | ||
22 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
23 | #define __reg8 (volatile unsigned char *) | ||
24 | #define __reg16 (volatile unsigned short *) | ||
25 | #define __reg32 (volatile unsigned int *) | ||
26 | #else | ||
27 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
28 | #define __reg8 | ||
29 | #define __reg16 | ||
30 | #define __reg32 | ||
31 | #endif /* __ASSEMBLY__ */ | ||
32 | |||
33 | /* CFC */ | ||
34 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
35 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
36 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
37 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
38 | #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008) | ||
39 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
40 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
41 | #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010) | ||
42 | |||
43 | /* MMC */ | ||
44 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
45 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
46 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
47 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
48 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
49 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
50 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
51 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
52 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
53 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
54 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
55 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
56 | |||
57 | /* ICU | ||
58 | * ICUISTS: status register | ||
59 | * ICUIREQ0: request register | ||
60 | * ICUIREQ1: request register | ||
61 | * ICUCR3: control register for CFIREQ# interrupt | ||
62 | * ICUCR4: control register for CFC Card insert interrupt | ||
63 | * ICUCR5: control register for CFC Card eject interrupt | ||
64 | * ICUCR6: control register for external interrupt | ||
65 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
66 | * ICUCR13: control register for SC error interrupt | ||
67 | * ICUCR14: control register for SC receive interrupt | ||
68 | * ICUCR15: control register for SC send interrupt | ||
69 | * ICUCR16: control register for SIO0 receive interrupt | ||
70 | * ICUCR17: control register for SIO0 send interrupt | ||
71 | */ | ||
72 | #if !defined(CONFIG_PLAT_USRV) | ||
73 | #define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */ | ||
74 | #define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */ | ||
75 | #define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */ | ||
76 | #define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
77 | #define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
78 | #define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
79 | #define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
80 | #define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */ | ||
81 | #define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */ | ||
82 | #define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */ | ||
83 | #define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */ | ||
84 | #define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
85 | #define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */ | ||
86 | #define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */ | ||
87 | #define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
88 | #define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */ | ||
89 | #define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */ | ||
90 | #define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */ | ||
91 | #define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */ | ||
92 | #define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */ | ||
93 | #define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */ | ||
94 | #define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */ | ||
95 | #define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */ | ||
96 | #define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */ | ||
97 | #define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */ | ||
98 | #define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */ | ||
99 | #define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */ | ||
100 | #define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */ | ||
101 | #define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */ | ||
102 | #define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */ | ||
103 | #define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */ | ||
104 | #define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */ | ||
105 | |||
106 | #else /* CONFIG_PLAT_USRV */ | ||
107 | |||
108 | #define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */ | ||
109 | #define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */ | ||
110 | #define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */ | ||
111 | #define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */ | ||
112 | #define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */ | ||
113 | #define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */ | ||
114 | #define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */ | ||
115 | #define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */ | ||
116 | #define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */ | ||
117 | #define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */ | ||
118 | #define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */ | ||
119 | #define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */ | ||
120 | #define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */ | ||
121 | #define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */ | ||
122 | #define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */ | ||
123 | #define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */ | ||
124 | #define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */ | ||
125 | #define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */ | ||
126 | #define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */ | ||
127 | #define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */ | ||
128 | #define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */ | ||
129 | #define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */ | ||
130 | #define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */ | ||
131 | #define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */ | ||
132 | #define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */ | ||
133 | #define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */ | ||
134 | #define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */ | ||
135 | #define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */ | ||
136 | #define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */ | ||
137 | #define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */ | ||
138 | #define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */ | ||
139 | |||
140 | #endif /* CONFIG_PLAT_USRV */ | ||
141 | |||
142 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
143 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
144 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
145 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
146 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
147 | #define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004) | ||
148 | #define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006) | ||
149 | #define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100) | ||
150 | #define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102) | ||
151 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
152 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
153 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
154 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
155 | #define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c) | ||
156 | #define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e) | ||
157 | #define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110) | ||
158 | #define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112) | ||
159 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
160 | #define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116) | ||
161 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
162 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
163 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
164 | #define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e) | ||
165 | #define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120) | ||
166 | #define PLD_ICUCR_IEN (0x1000) | ||
167 | #define PLD_ICUCR_IREQ (0x0100) | ||
168 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
169 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
170 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
171 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
172 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
173 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
174 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
175 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
176 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
177 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
178 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
179 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
180 | |||
181 | /* Power Control of MMC and CF */ | ||
182 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
183 | #define PLD_CPCR_CF 0x0001 | ||
184 | #define PLD_CPCR_MMC 0x0002 | ||
185 | |||
186 | /* LED Control | ||
187 | * | ||
188 | * 1: DIP swich side | ||
189 | * 2: Reset switch side | ||
190 | */ | ||
191 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
192 | #define PLD_IOLED_1_ON 0x001 | ||
193 | #define PLD_IOLED_1_OFF 0x000 | ||
194 | #define PLD_IOLED_2_ON 0x002 | ||
195 | #define PLD_IOLED_2_OFF 0x000 | ||
196 | |||
197 | /* DIP Switch | ||
198 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
199 | * 1: - | ||
200 | * 2: - | ||
201 | * 3: - | ||
202 | */ | ||
203 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
204 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
205 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
206 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
207 | |||
208 | /* CRC */ | ||
209 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
210 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
211 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
212 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
213 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
214 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
215 | |||
216 | /* RTC */ | ||
217 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
218 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
219 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
220 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
221 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
222 | |||
223 | /* SIO0 */ | ||
224 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
225 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
226 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
227 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
228 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
229 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
230 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
231 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
232 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
233 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
234 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
235 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
236 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
237 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
238 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
239 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
240 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
241 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
242 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
243 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
244 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
245 | |||
246 | /* SIM Card */ | ||
247 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
248 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
249 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
250 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
251 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
252 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
253 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
254 | |||
255 | #endif /* _OPSPUT_OPSPUT_PLD.H */ | ||
diff --git a/include/asm-m32r/page.h b/include/asm-m32r/page.h deleted file mode 100644 index c9333089fe11..000000000000 --- a/include/asm-m32r/page.h +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PAGE_H | ||
2 | #define _ASM_M32R_PAGE_H | ||
3 | |||
4 | /* PAGE_SHIFT determines the page size */ | ||
5 | #define PAGE_SHIFT 12 | ||
6 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | ||
7 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
8 | |||
9 | #ifndef __ASSEMBLY__ | ||
10 | |||
11 | extern void clear_page(void *to); | ||
12 | extern void copy_page(void *to, void *from); | ||
13 | |||
14 | #define clear_user_page(page, vaddr, pg) clear_page(page) | ||
15 | #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) | ||
16 | |||
17 | #define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \ | ||
18 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) | ||
19 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE | ||
20 | |||
21 | /* | ||
22 | * These are used to make use of C type-checking.. | ||
23 | */ | ||
24 | typedef struct { unsigned long pte; } pte_t; | ||
25 | typedef struct { unsigned long pmd; } pmd_t; | ||
26 | typedef struct { unsigned long pgd; } pgd_t; | ||
27 | #define pte_val(x) ((x).pte) | ||
28 | #define PTE_MASK PAGE_MASK | ||
29 | |||
30 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
31 | typedef struct page *pgtable_t; | ||
32 | |||
33 | #define pmd_val(x) ((x).pmd) | ||
34 | #define pgd_val(x) ((x).pgd) | ||
35 | #define pgprot_val(x) ((x).pgprot) | ||
36 | |||
37 | #define __pte(x) ((pte_t) { (x) } ) | ||
38 | #define __pmd(x) ((pmd_t) { (x) } ) | ||
39 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
40 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
41 | |||
42 | #endif /* !__ASSEMBLY__ */ | ||
43 | |||
44 | /* | ||
45 | * This handles the memory map.. We could make this a config | ||
46 | * option, but too many people screw it up, and too few need | ||
47 | * it. | ||
48 | * | ||
49 | * A __PAGE_OFFSET of 0xC0000000 means that the kernel has | ||
50 | * a virtual address space of one gigabyte, which limits the | ||
51 | * amount of physical memory you can use to about 950MB. | ||
52 | * | ||
53 | * If you want more physical memory than this then see the CONFIG_HIGHMEM4G | ||
54 | * and CONFIG_HIGHMEM64G options in the kernel configuration. | ||
55 | */ | ||
56 | |||
57 | #define __MEMORY_START CONFIG_MEMORY_START | ||
58 | #define __MEMORY_SIZE CONFIG_MEMORY_SIZE | ||
59 | |||
60 | #ifdef CONFIG_MMU | ||
61 | #define __PAGE_OFFSET (0x80000000) | ||
62 | #else | ||
63 | #define __PAGE_OFFSET (0x00000000) | ||
64 | #endif | ||
65 | |||
66 | #define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) | ||
67 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) | ||
68 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) | ||
69 | |||
70 | #ifndef CONFIG_DISCONTIGMEM | ||
71 | #define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT) | ||
72 | #define ARCH_PFN_OFFSET PFN_BASE | ||
73 | #define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr) | ||
74 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
75 | |||
76 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | ||
77 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | ||
78 | |||
79 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
80 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC ) | ||
81 | |||
82 | #define devmem_is_allowed(x) 1 | ||
83 | |||
84 | #include <asm-generic/memory_model.h> | ||
85 | #include <asm-generic/page.h> | ||
86 | |||
87 | #endif /* _ASM_M32R_PAGE_H */ | ||
diff --git a/include/asm-m32r/param.h b/include/asm-m32r/param.h deleted file mode 100644 index 94c770196048..000000000000 --- a/include/asm-m32r/param.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PARAM_H | ||
2 | #define _ASM_M32R_PARAM_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ | ||
6 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | ||
7 | # define CLOCKS_PER_SEC (USER_HZ) /* like times() */ | ||
8 | #endif | ||
9 | |||
10 | #ifndef HZ | ||
11 | #define HZ 100 | ||
12 | #endif | ||
13 | |||
14 | #define EXEC_PAGESIZE 4096 | ||
15 | |||
16 | #ifndef NOGROUP | ||
17 | #define NOGROUP (-1) | ||
18 | #endif | ||
19 | |||
20 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
21 | |||
22 | #endif /* _ASM_M32R_PARAM_H */ | ||
23 | |||
diff --git a/include/asm-m32r/pci.h b/include/asm-m32r/pci.h deleted file mode 100644 index fe785d167db6..000000000000 --- a/include/asm-m32r/pci.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PCI_H | ||
2 | #define _ASM_M32R_PCI_H | ||
3 | |||
4 | #include <asm-generic/pci.h> | ||
5 | |||
6 | #define PCI_DMA_BUS_IS_PHYS (1) | ||
7 | |||
8 | #endif /* _ASM_M32R_PCI_H */ | ||
diff --git a/include/asm-m32r/percpu.h b/include/asm-m32r/percpu.h deleted file mode 100644 index e3169301fe66..000000000000 --- a/include/asm-m32r/percpu.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ARCH_M32R_PERCPU__ | ||
2 | #define __ARCH_M32R_PERCPU__ | ||
3 | |||
4 | #include <asm-generic/percpu.h> | ||
5 | |||
6 | #endif /* __ARCH_M32R_PERCPU__ */ | ||
diff --git a/include/asm-m32r/pgalloc.h b/include/asm-m32r/pgalloc.h deleted file mode 100644 index f11a2b909cdb..000000000000 --- a/include/asm-m32r/pgalloc.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PGALLOC_H | ||
2 | #define _ASM_M32R_PGALLOC_H | ||
3 | |||
4 | #include <linux/mm.h> | ||
5 | |||
6 | #include <asm/io.h> | ||
7 | |||
8 | #define pmd_populate_kernel(mm, pmd, pte) \ | ||
9 | set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) | ||
10 | |||
11 | static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, | ||
12 | pgtable_t pte) | ||
13 | { | ||
14 | set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte))); | ||
15 | } | ||
16 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
17 | |||
18 | /* | ||
19 | * Allocate and free page tables. | ||
20 | */ | ||
21 | static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm) | ||
22 | { | ||
23 | pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); | ||
24 | |||
25 | return pgd; | ||
26 | } | ||
27 | |||
28 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
29 | { | ||
30 | free_page((unsigned long)pgd); | ||
31 | } | ||
32 | |||
33 | static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
34 | unsigned long address) | ||
35 | { | ||
36 | pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); | ||
37 | |||
38 | return pte; | ||
39 | } | ||
40 | |||
41 | static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm, | ||
42 | unsigned long address) | ||
43 | { | ||
44 | struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO); | ||
45 | |||
46 | pgtable_page_ctor(pte); | ||
47 | return pte; | ||
48 | } | ||
49 | |||
50 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
51 | { | ||
52 | free_page((unsigned long)pte); | ||
53 | } | ||
54 | |||
55 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
56 | { | ||
57 | pgtable_page_dtor(pte); | ||
58 | __free_page(pte); | ||
59 | } | ||
60 | |||
61 | #define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) | ||
62 | |||
63 | /* | ||
64 | * allocating and freeing a pmd is trivial: the 1-entry pmd is | ||
65 | * inside the pgd, so has no extra memory associated with it. | ||
66 | * (In the PAE case we free the pmds as part of the pgd.) | ||
67 | */ | ||
68 | |||
69 | #define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) | ||
70 | #define pmd_free(mm, x) do { } while (0) | ||
71 | #define __pmd_free_tlb(tlb, x) do { } while (0) | ||
72 | #define pgd_populate(mm, pmd, pte) BUG() | ||
73 | |||
74 | #define check_pgt_cache() do { } while (0) | ||
75 | |||
76 | #endif /* _ASM_M32R_PGALLOC_H */ | ||
diff --git a/include/asm-m32r/pgtable-2level.h b/include/asm-m32r/pgtable-2level.h deleted file mode 100644 index bca3475f9595..000000000000 --- a/include/asm-m32r/pgtable-2level.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PGTABLE_2LEVEL_H | ||
2 | #define _ASM_M32R_PGTABLE_2LEVEL_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * traditional M32R two-level paging structure: | ||
7 | */ | ||
8 | |||
9 | #define PGDIR_SHIFT 22 | ||
10 | #define PTRS_PER_PGD 1024 | ||
11 | |||
12 | /* | ||
13 | * the M32R is two-level, so we don't really have any | ||
14 | * PMD directory physically. | ||
15 | */ | ||
16 | #define PMD_SHIFT 22 | ||
17 | #define PTRS_PER_PMD 1 | ||
18 | |||
19 | #define PTRS_PER_PTE 1024 | ||
20 | |||
21 | #define pte_ERROR(e) \ | ||
22 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
23 | #define pmd_ERROR(e) \ | ||
24 | printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) | ||
25 | #define pgd_ERROR(e) \ | ||
26 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
27 | |||
28 | /* | ||
29 | * The "pgd_xxx()" functions here are trivial for a folded two-level | ||
30 | * setup: the pgd is never bad, and a pmd always exists (as it's folded | ||
31 | * into the pgd entry) | ||
32 | */ | ||
33 | static inline int pgd_none(pgd_t pgd) { return 0; } | ||
34 | static inline int pgd_bad(pgd_t pgd) { return 0; } | ||
35 | static inline int pgd_present(pgd_t pgd) { return 1; } | ||
36 | #define pgd_clear(xp) do { } while (0) | ||
37 | |||
38 | /* | ||
39 | * Certain architectures need to do special things when PTEs | ||
40 | * within a page table are directly modified. Thus, the following | ||
41 | * hook is made available. | ||
42 | */ | ||
43 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) | ||
44 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
45 | |||
46 | /* | ||
47 | * (pmds are folded into pgds so this doesnt get actually called, | ||
48 | * but the define is needed for a generic inline function.) | ||
49 | */ | ||
50 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
51 | #define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) | ||
52 | |||
53 | #define pgd_page_vaddr(pgd) \ | ||
54 | ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) | ||
55 | |||
56 | #ifndef CONFIG_DISCONTIGMEM | ||
57 | #define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE)) | ||
58 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
59 | |||
60 | static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) | ||
61 | { | ||
62 | return (pmd_t *) dir; | ||
63 | } | ||
64 | |||
65 | #define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0)) | ||
66 | #define pte_same(a, b) (pte_val(a) == pte_val(b)) | ||
67 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
68 | #define pte_none(x) (!pte_val(x)) | ||
69 | #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT) | ||
70 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
71 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
72 | |||
73 | #define PTE_FILE_MAX_BITS 29 | ||
74 | #define pte_to_pgoff(pte) (((pte_val(pte) >> 2) & 0x7f) | (((pte_val(pte) >> 10)) << 7)) | ||
75 | #define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7f) << 2) | (((off) >> 7) << 10) | _PAGE_FILE }) | ||
76 | |||
77 | #endif /* __KERNEL__ */ | ||
78 | #endif /* _ASM_M32R_PGTABLE_2LEVEL_H */ | ||
diff --git a/include/asm-m32r/pgtable.h b/include/asm-m32r/pgtable.h deleted file mode 100644 index e6359c566b50..000000000000 --- a/include/asm-m32r/pgtable.h +++ /dev/null | |||
@@ -1,363 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PGTABLE_H | ||
2 | #define _ASM_M32R_PGTABLE_H | ||
3 | |||
4 | #include <asm-generic/4level-fixup.h> | ||
5 | |||
6 | #ifdef __KERNEL__ | ||
7 | /* | ||
8 | * The Linux memory management assumes a three-level page table setup. On | ||
9 | * the M32R, we use that, but "fold" the mid level into the top-level page | ||
10 | * table, so that we physically have the same two-level page table as the | ||
11 | * M32R mmu expects. | ||
12 | * | ||
13 | * This file contains the functions and defines necessary to modify and use | ||
14 | * the M32R page table tree. | ||
15 | */ | ||
16 | |||
17 | /* CAUTION!: If you change macro definitions in this file, you might have to | ||
18 | * change arch/m32r/mmu.S manually. | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | |||
23 | #include <linux/threads.h> | ||
24 | #include <linux/bitops.h> | ||
25 | #include <asm/processor.h> | ||
26 | #include <asm/addrspace.h> | ||
27 | #include <asm/page.h> | ||
28 | |||
29 | struct mm_struct; | ||
30 | struct vm_area_struct; | ||
31 | |||
32 | extern pgd_t swapper_pg_dir[1024]; | ||
33 | extern void paging_init(void); | ||
34 | |||
35 | /* | ||
36 | * ZERO_PAGE is a global shared page that is always zero: used | ||
37 | * for zero-mapped memory areas etc.. | ||
38 | */ | ||
39 | extern unsigned long empty_zero_page[1024]; | ||
40 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | ||
41 | |||
42 | #endif /* !__ASSEMBLY__ */ | ||
43 | |||
44 | #ifndef __ASSEMBLY__ | ||
45 | #include <asm/pgtable-2level.h> | ||
46 | #endif | ||
47 | |||
48 | #define pgtable_cache_init() do { } while (0) | ||
49 | |||
50 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
51 | #define PMD_MASK (~(PMD_SIZE - 1)) | ||
52 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
53 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
54 | |||
55 | #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) | ||
56 | #define FIRST_USER_ADDRESS 0 | ||
57 | |||
58 | #ifndef __ASSEMBLY__ | ||
59 | /* Just any arbitrary offset to the start of the vmalloc VM area: the | ||
60 | * current 8MB value just means that there will be a 8MB "hole" after the | ||
61 | * physical memory until the kernel virtual memory starts. That means that | ||
62 | * any out-of-bounds memory accesses will hopefully be caught. | ||
63 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | ||
64 | * area for the same reason. ;) | ||
65 | */ | ||
66 | #define VMALLOC_START KSEG2 | ||
67 | #define VMALLOC_END KSEG3 | ||
68 | |||
69 | /* | ||
70 | * M32R TLB format | ||
71 | * | ||
72 | * [0] [1:19] [20:23] [24:31] | ||
73 | * +-----------------------+----+-------------+ | ||
74 | * | VPN |0000| ASID | | ||
75 | * +-----------------------+----+-------------+ | ||
76 | * +-+---------------------+----+-+---+-+-+-+-+ | ||
77 | * |0 PPN |0000|N|AC |L|G|V| | | ||
78 | * +-+---------------------+----+-+---+-+-+-+-+ | ||
79 | * RWX | ||
80 | */ | ||
81 | |||
82 | #define _PAGE_BIT_DIRTY 0 /* software: page changed */ | ||
83 | #define _PAGE_BIT_FILE 0 /* when !present: nonlinear file | ||
84 | mapping */ | ||
85 | #define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */ | ||
86 | #define _PAGE_BIT_GLOBAL 2 /* Global */ | ||
87 | #define _PAGE_BIT_LARGE 3 /* Large */ | ||
88 | #define _PAGE_BIT_EXEC 4 /* Execute */ | ||
89 | #define _PAGE_BIT_WRITE 5 /* Write */ | ||
90 | #define _PAGE_BIT_READ 6 /* Read */ | ||
91 | #define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */ | ||
92 | #define _PAGE_BIT_ACCESSED 8 /* software: page referenced */ | ||
93 | #define _PAGE_BIT_PROTNONE 9 /* software: if not present */ | ||
94 | |||
95 | #define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY) | ||
96 | #define _PAGE_FILE (1UL << _PAGE_BIT_FILE) | ||
97 | #define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT) | ||
98 | #define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL) | ||
99 | #define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE) | ||
100 | #define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC) | ||
101 | #define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE) | ||
102 | #define _PAGE_READ (1UL << _PAGE_BIT_READ) | ||
103 | #define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE) | ||
104 | #define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED) | ||
105 | #define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE) | ||
106 | |||
107 | #define _PAGE_TABLE \ | ||
108 | ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \ | ||
109 | | _PAGE_DIRTY ) | ||
110 | #define _KERNPG_TABLE \ | ||
111 | ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \ | ||
112 | | _PAGE_DIRTY ) | ||
113 | #define _PAGE_CHG_MASK \ | ||
114 | ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY ) | ||
115 | |||
116 | #ifdef CONFIG_MMU | ||
117 | #define PAGE_NONE \ | ||
118 | __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) | ||
119 | #define PAGE_SHARED \ | ||
120 | __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED) | ||
121 | #define PAGE_SHARED_EXEC \ | ||
122 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \ | ||
123 | | _PAGE_ACCESSED) | ||
124 | #define PAGE_COPY \ | ||
125 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED) | ||
126 | #define PAGE_COPY_EXEC \ | ||
127 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED) | ||
128 | #define PAGE_READONLY \ | ||
129 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED) | ||
130 | #define PAGE_READONLY_EXEC \ | ||
131 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED) | ||
132 | |||
133 | #define __PAGE_KERNEL \ | ||
134 | ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \ | ||
135 | | _PAGE_ACCESSED ) | ||
136 | #define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE ) | ||
137 | #define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE) | ||
138 | |||
139 | #define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL) | ||
140 | |||
141 | #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL) | ||
142 | #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO) | ||
143 | #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE) | ||
144 | |||
145 | #else | ||
146 | #define PAGE_NONE __pgprot(0) | ||
147 | #define PAGE_SHARED __pgprot(0) | ||
148 | #define PAGE_SHARED_EXEC __pgprot(0) | ||
149 | #define PAGE_COPY __pgprot(0) | ||
150 | #define PAGE_COPY_EXEC __pgprot(0) | ||
151 | #define PAGE_READONLY __pgprot(0) | ||
152 | #define PAGE_READONLY_EXEC __pgprot(0) | ||
153 | |||
154 | #define PAGE_KERNEL __pgprot(0) | ||
155 | #define PAGE_KERNEL_RO __pgprot(0) | ||
156 | #define PAGE_KERNEL_NOCACHE __pgprot(0) | ||
157 | #endif /* CONFIG_MMU */ | ||
158 | |||
159 | /* xwr */ | ||
160 | #define __P000 PAGE_NONE | ||
161 | #define __P001 PAGE_READONLY | ||
162 | #define __P010 PAGE_COPY | ||
163 | #define __P011 PAGE_COPY | ||
164 | #define __P100 PAGE_READONLY_EXEC | ||
165 | #define __P101 PAGE_READONLY_EXEC | ||
166 | #define __P110 PAGE_COPY_EXEC | ||
167 | #define __P111 PAGE_COPY_EXEC | ||
168 | |||
169 | #define __S000 PAGE_NONE | ||
170 | #define __S001 PAGE_READONLY | ||
171 | #define __S010 PAGE_SHARED | ||
172 | #define __S011 PAGE_SHARED | ||
173 | #define __S100 PAGE_READONLY_EXEC | ||
174 | #define __S101 PAGE_READONLY_EXEC | ||
175 | #define __S110 PAGE_SHARED_EXEC | ||
176 | #define __S111 PAGE_SHARED_EXEC | ||
177 | |||
178 | /* page table for 0-4MB for everybody */ | ||
179 | |||
180 | #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) | ||
181 | #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) | ||
182 | |||
183 | #define pmd_none(x) (!pmd_val(x)) | ||
184 | #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) | ||
185 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) | ||
186 | #define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE) | ||
187 | |||
188 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) | ||
189 | |||
190 | /* | ||
191 | * The following only work if pte_present() is true. | ||
192 | * Undefined behaviour if not.. | ||
193 | */ | ||
194 | static inline int pte_dirty(pte_t pte) | ||
195 | { | ||
196 | return pte_val(pte) & _PAGE_DIRTY; | ||
197 | } | ||
198 | |||
199 | static inline int pte_young(pte_t pte) | ||
200 | { | ||
201 | return pte_val(pte) & _PAGE_ACCESSED; | ||
202 | } | ||
203 | |||
204 | static inline int pte_write(pte_t pte) | ||
205 | { | ||
206 | return pte_val(pte) & _PAGE_WRITE; | ||
207 | } | ||
208 | |||
209 | /* | ||
210 | * The following only works if pte_present() is not true. | ||
211 | */ | ||
212 | static inline int pte_file(pte_t pte) | ||
213 | { | ||
214 | return pte_val(pte) & _PAGE_FILE; | ||
215 | } | ||
216 | |||
217 | static inline int pte_special(pte_t pte) | ||
218 | { | ||
219 | return 0; | ||
220 | } | ||
221 | |||
222 | static inline pte_t pte_mkclean(pte_t pte) | ||
223 | { | ||
224 | pte_val(pte) &= ~_PAGE_DIRTY; | ||
225 | return pte; | ||
226 | } | ||
227 | |||
228 | static inline pte_t pte_mkold(pte_t pte) | ||
229 | { | ||
230 | pte_val(pte) &= ~_PAGE_ACCESSED; | ||
231 | return pte; | ||
232 | } | ||
233 | |||
234 | static inline pte_t pte_wrprotect(pte_t pte) | ||
235 | { | ||
236 | pte_val(pte) &= ~_PAGE_WRITE; | ||
237 | return pte; | ||
238 | } | ||
239 | |||
240 | static inline pte_t pte_mkdirty(pte_t pte) | ||
241 | { | ||
242 | pte_val(pte) |= _PAGE_DIRTY; | ||
243 | return pte; | ||
244 | } | ||
245 | |||
246 | static inline pte_t pte_mkyoung(pte_t pte) | ||
247 | { | ||
248 | pte_val(pte) |= _PAGE_ACCESSED; | ||
249 | return pte; | ||
250 | } | ||
251 | |||
252 | static inline pte_t pte_mkwrite(pte_t pte) | ||
253 | { | ||
254 | pte_val(pte) |= _PAGE_WRITE; | ||
255 | return pte; | ||
256 | } | ||
257 | |||
258 | static inline pte_t pte_mkspecial(pte_t pte) | ||
259 | { | ||
260 | return pte; | ||
261 | } | ||
262 | |||
263 | static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) | ||
264 | { | ||
265 | return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep); | ||
266 | } | ||
267 | |||
268 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
269 | { | ||
270 | clear_bit(_PAGE_BIT_WRITE, ptep); | ||
271 | } | ||
272 | |||
273 | /* | ||
274 | * Macro and implementation to make a page protection as uncachable. | ||
275 | */ | ||
276 | static inline pgprot_t pgprot_noncached(pgprot_t _prot) | ||
277 | { | ||
278 | unsigned long prot = pgprot_val(_prot); | ||
279 | |||
280 | prot |= _PAGE_NONCACHABLE; | ||
281 | return __pgprot(prot); | ||
282 | } | ||
283 | |||
284 | #define pgprot_writecombine(prot) pgprot_noncached(prot) | ||
285 | |||
286 | /* | ||
287 | * Conversion functions: convert a page and protection to a page entry, | ||
288 | * and a page entry and page directory to the page they refer to. | ||
289 | */ | ||
290 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot) | ||
291 | |||
292 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
293 | { | ||
294 | set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \ | ||
295 | | pgprot_val(newprot))); | ||
296 | |||
297 | return pte; | ||
298 | } | ||
299 | |||
300 | /* | ||
301 | * Conversion functions: convert a page and protection to a page entry, | ||
302 | * and a page entry and page directory to the page they refer to. | ||
303 | */ | ||
304 | |||
305 | static inline void pmd_set(pmd_t * pmdp, pte_t * ptep) | ||
306 | { | ||
307 | pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK); | ||
308 | } | ||
309 | |||
310 | #define pmd_page_vaddr(pmd) \ | ||
311 | ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | ||
312 | |||
313 | #ifndef CONFIG_DISCONTIGMEM | ||
314 | #define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE)) | ||
315 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
316 | |||
317 | /* to find an entry in a page-table-directory. */ | ||
318 | #define pgd_index(address) \ | ||
319 | (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
320 | |||
321 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
322 | |||
323 | /* to find an entry in a kernel page-table-directory */ | ||
324 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
325 | |||
326 | #define pmd_index(address) \ | ||
327 | (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | ||
328 | |||
329 | #define pte_index(address) \ | ||
330 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
331 | #define pte_offset_kernel(dir, address) \ | ||
332 | ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
333 | #define pte_offset_map(dir, address) \ | ||
334 | ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address)) | ||
335 | #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address) | ||
336 | #define pte_unmap(pte) do { } while (0) | ||
337 | #define pte_unmap_nested(pte) do { } while (0) | ||
338 | |||
339 | /* Encode and de-code a swap entry */ | ||
340 | #define __swp_type(x) (((x).val >> 2) & 0x1f) | ||
341 | #define __swp_offset(x) ((x).val >> 10) | ||
342 | #define __swp_entry(type, offset) \ | ||
343 | ((swp_entry_t) { ((type) << 2) | ((offset) << 10) }) | ||
344 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
345 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
346 | |||
347 | #endif /* !__ASSEMBLY__ */ | ||
348 | |||
349 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | ||
350 | #define kern_addr_valid(addr) (1) | ||
351 | |||
352 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
353 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
354 | |||
355 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | ||
356 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | ||
357 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | ||
358 | #define __HAVE_ARCH_PTE_SAME | ||
359 | #include <asm-generic/pgtable.h> | ||
360 | |||
361 | #endif /* __KERNEL__ */ | ||
362 | |||
363 | #endif /* _ASM_M32R_PGTABLE_H */ | ||
diff --git a/include/asm-m32r/poll.h b/include/asm-m32r/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/include/asm-m32r/poll.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/poll.h> | ||
diff --git a/include/asm-m32r/posix_types.h b/include/asm-m32r/posix_types.h deleted file mode 100644 index b309c5858637..000000000000 --- a/include/asm-m32r/posix_types.h +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_POSIX_TYPES_H | ||
2 | #define _ASM_M32R_POSIX_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is generally used by user-level software, so you need to | ||
6 | * be a little careful about namespace pollution etc. Also, we cannot | ||
7 | * assume GCC is being used. | ||
8 | */ | ||
9 | |||
10 | typedef unsigned long __kernel_ino_t; | ||
11 | typedef unsigned short __kernel_mode_t; | ||
12 | typedef unsigned short __kernel_nlink_t; | ||
13 | typedef long __kernel_off_t; | ||
14 | typedef int __kernel_pid_t; | ||
15 | typedef unsigned short __kernel_ipc_pid_t; | ||
16 | typedef unsigned short __kernel_uid_t; | ||
17 | typedef unsigned short __kernel_gid_t; | ||
18 | typedef unsigned int __kernel_size_t; | ||
19 | typedef int __kernel_ssize_t; | ||
20 | typedef int __kernel_ptrdiff_t; | ||
21 | typedef long __kernel_time_t; | ||
22 | typedef long __kernel_suseconds_t; | ||
23 | typedef long __kernel_clock_t; | ||
24 | typedef int __kernel_timer_t; | ||
25 | typedef int __kernel_clockid_t; | ||
26 | typedef int __kernel_daddr_t; | ||
27 | typedef char * __kernel_caddr_t; | ||
28 | typedef unsigned short __kernel_uid16_t; | ||
29 | typedef unsigned short __kernel_gid16_t; | ||
30 | typedef unsigned int __kernel_uid32_t; | ||
31 | typedef unsigned int __kernel_gid32_t; | ||
32 | |||
33 | typedef unsigned short __kernel_old_uid_t; | ||
34 | typedef unsigned short __kernel_old_gid_t; | ||
35 | typedef unsigned short __kernel_old_dev_t; | ||
36 | |||
37 | #ifdef __GNUC__ | ||
38 | typedef long long __kernel_loff_t; | ||
39 | #endif | ||
40 | |||
41 | typedef struct { | ||
42 | int val[2]; | ||
43 | } __kernel_fsid_t; | ||
44 | |||
45 | #if defined(__KERNEL__) | ||
46 | |||
47 | #undef __FD_SET | ||
48 | static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
49 | { | ||
50 | unsigned long __tmp = __fd / __NFDBITS; | ||
51 | unsigned long __rem = __fd % __NFDBITS; | ||
52 | __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); | ||
53 | } | ||
54 | |||
55 | #undef __FD_CLR | ||
56 | static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
57 | { | ||
58 | unsigned long __tmp = __fd / __NFDBITS; | ||
59 | unsigned long __rem = __fd % __NFDBITS; | ||
60 | __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); | ||
61 | } | ||
62 | |||
63 | |||
64 | #undef __FD_ISSET | ||
65 | static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) | ||
66 | { | ||
67 | unsigned long __tmp = __fd / __NFDBITS; | ||
68 | unsigned long __rem = __fd % __NFDBITS; | ||
69 | return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * This will unroll the loop for the normal constant case (8 ints, | ||
74 | * for a 256-bit fd_set) | ||
75 | */ | ||
76 | #undef __FD_ZERO | ||
77 | static __inline__ void __FD_ZERO(__kernel_fd_set *__p) | ||
78 | { | ||
79 | unsigned long *__tmp = __p->fds_bits; | ||
80 | int __i; | ||
81 | |||
82 | if (__builtin_constant_p(__FDSET_LONGS)) { | ||
83 | switch (__FDSET_LONGS) { | ||
84 | case 16: | ||
85 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
86 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
87 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
88 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
89 | __tmp[ 8] = 0; __tmp[ 9] = 0; | ||
90 | __tmp[10] = 0; __tmp[11] = 0; | ||
91 | __tmp[12] = 0; __tmp[13] = 0; | ||
92 | __tmp[14] = 0; __tmp[15] = 0; | ||
93 | return; | ||
94 | |||
95 | case 8: | ||
96 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
97 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
98 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
99 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
100 | return; | ||
101 | |||
102 | case 4: | ||
103 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
104 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
105 | return; | ||
106 | } | ||
107 | } | ||
108 | __i = __FDSET_LONGS; | ||
109 | while (__i) { | ||
110 | __i--; | ||
111 | *__tmp = 0; | ||
112 | __tmp++; | ||
113 | } | ||
114 | } | ||
115 | |||
116 | #endif /* defined(__KERNEL__) */ | ||
117 | |||
118 | #endif /* _ASM_M32R_POSIX_TYPES_H */ | ||
diff --git a/include/asm-m32r/processor.h b/include/asm-m32r/processor.h deleted file mode 100644 index 1a997fc148a2..000000000000 --- a/include/asm-m32r/processor.h +++ /dev/null | |||
@@ -1,147 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PROCESSOR_H | ||
2 | #define _ASM_M32R_PROCESSOR_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/processor.h | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | * | ||
11 | * Copyright (C) 1994 Linus Torvalds | ||
12 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
13 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <asm/cache.h> | ||
18 | #include <asm/ptrace.h> /* pt_regs */ | ||
19 | |||
20 | /* | ||
21 | * Default implementation of macro that returns current | ||
22 | * instruction pointer ("program counter"). | ||
23 | */ | ||
24 | #define current_text_addr() ({ __label__ _l; _l: &&_l; }) | ||
25 | |||
26 | /* | ||
27 | * CPU type and hardware bug flags. Kept separately for each CPU. | ||
28 | * Members of this structure are referenced in head.S, so think twice | ||
29 | * before touching them. [mj] | ||
30 | */ | ||
31 | |||
32 | struct cpuinfo_m32r { | ||
33 | unsigned long pgtable_cache_sz; | ||
34 | unsigned long cpu_clock; | ||
35 | unsigned long bus_clock; | ||
36 | unsigned long timer_divide; | ||
37 | unsigned long loops_per_jiffy; | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * capabilities of CPUs | ||
42 | */ | ||
43 | |||
44 | extern struct cpuinfo_m32r boot_cpu_data; | ||
45 | |||
46 | #ifdef CONFIG_SMP | ||
47 | extern struct cpuinfo_m32r cpu_data[]; | ||
48 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
49 | #else | ||
50 | #define cpu_data (&boot_cpu_data) | ||
51 | #define current_cpu_data boot_cpu_data | ||
52 | #endif | ||
53 | |||
54 | /* | ||
55 | * User space process size: 2GB (default). | ||
56 | */ | ||
57 | #ifdef CONFIG_MMU | ||
58 | #define TASK_SIZE (0x80000000UL) | ||
59 | #else | ||
60 | #define TASK_SIZE (0x00400000UL) | ||
61 | #endif | ||
62 | |||
63 | #ifdef __KERNEL__ | ||
64 | #define STACK_TOP TASK_SIZE | ||
65 | #define STACK_TOP_MAX STACK_TOP | ||
66 | #endif | ||
67 | |||
68 | /* This decides where the kernel will search for a free chunk of vm | ||
69 | * space during mmap's. | ||
70 | */ | ||
71 | #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) | ||
72 | |||
73 | typedef struct { | ||
74 | unsigned long seg; | ||
75 | } mm_segment_t; | ||
76 | |||
77 | #define MAX_TRAPS 10 | ||
78 | |||
79 | struct debug_trap { | ||
80 | int nr_trap; | ||
81 | unsigned long addr[MAX_TRAPS]; | ||
82 | unsigned long insn[MAX_TRAPS]; | ||
83 | }; | ||
84 | |||
85 | struct thread_struct { | ||
86 | unsigned long address; | ||
87 | unsigned long trap_no; /* Trap number */ | ||
88 | unsigned long error_code; /* Error code of trap */ | ||
89 | unsigned long lr; /* saved pc */ | ||
90 | unsigned long sp; /* user stack pointer */ | ||
91 | struct debug_trap debug_trap; | ||
92 | }; | ||
93 | |||
94 | #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) | ||
95 | |||
96 | #define INIT_THREAD { \ | ||
97 | .sp = INIT_SP, \ | ||
98 | } | ||
99 | |||
100 | /* | ||
101 | * Do necessary setup to start up a newly executed thread. | ||
102 | */ | ||
103 | |||
104 | /* User process Backup PSW */ | ||
105 | #define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM) | ||
106 | |||
107 | #define start_thread(regs, new_pc, new_spu) \ | ||
108 | do { \ | ||
109 | set_fs(USER_DS); \ | ||
110 | regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \ | ||
111 | regs->bpc = new_pc; \ | ||
112 | regs->spu = new_spu; \ | ||
113 | } while (0) | ||
114 | |||
115 | /* Forward declaration, a strange C thing */ | ||
116 | struct task_struct; | ||
117 | struct mm_struct; | ||
118 | |||
119 | /* Free all resources held by a thread. */ | ||
120 | extern void release_thread(struct task_struct *); | ||
121 | |||
122 | #define prepare_to_copy(tsk) do { } while (0) | ||
123 | |||
124 | /* | ||
125 | * create a kernel thread without removing it from tasklists | ||
126 | */ | ||
127 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
128 | |||
129 | /* Copy and release all segment info associated with a VM */ | ||
130 | extern void copy_segments(struct task_struct *p, struct mm_struct * mm); | ||
131 | extern void release_segments(struct mm_struct * mm); | ||
132 | |||
133 | extern unsigned long thread_saved_pc(struct task_struct *); | ||
134 | |||
135 | /* Copy and release all segment info associated with a VM */ | ||
136 | #define copy_segments(p, mm) do { } while (0) | ||
137 | #define release_segments(mm) do { } while (0) | ||
138 | |||
139 | unsigned long get_wchan(struct task_struct *p); | ||
140 | #define KSTK_EIP(tsk) ((tsk)->thread.lr) | ||
141 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) | ||
142 | |||
143 | #define THREAD_SIZE (2*PAGE_SIZE) | ||
144 | |||
145 | #define cpu_relax() barrier() | ||
146 | |||
147 | #endif /* _ASM_M32R_PROCESSOR_H */ | ||
diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h deleted file mode 100644 index a0755b982028..000000000000 --- a/include/asm-m32r/ptrace.h +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PTRACE_H | ||
2 | #define _ASM_M32R_PTRACE_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/ptrace.h | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | * | ||
11 | * M32R version: | ||
12 | * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
13 | */ | ||
14 | |||
15 | /* 0 - 13 are integer registers (general purpose registers). */ | ||
16 | #define PT_R4 0 | ||
17 | #define PT_R5 1 | ||
18 | #define PT_R6 2 | ||
19 | #define PT_REGS 3 | ||
20 | #define PT_R0 4 | ||
21 | #define PT_R1 5 | ||
22 | #define PT_R2 6 | ||
23 | #define PT_R3 7 | ||
24 | #define PT_R7 8 | ||
25 | #define PT_R8 9 | ||
26 | #define PT_R9 10 | ||
27 | #define PT_R10 11 | ||
28 | #define PT_R11 12 | ||
29 | #define PT_R12 13 | ||
30 | #define PT_SYSCNR 14 | ||
31 | #define PT_R13 PT_FP | ||
32 | #define PT_R14 PT_LR | ||
33 | #define PT_R15 PT_SP | ||
34 | |||
35 | /* processor status and miscellaneous context registers. */ | ||
36 | #define PT_ACC0H 15 | ||
37 | #define PT_ACC0L 16 | ||
38 | #define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */ | ||
39 | #define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */ | ||
40 | #define PT_PSW 19 | ||
41 | #define PT_BPC 20 | ||
42 | #define PT_BBPSW 21 | ||
43 | #define PT_BBPC 22 | ||
44 | #define PT_SPU 23 | ||
45 | #define PT_FP 24 | ||
46 | #define PT_LR 25 | ||
47 | #define PT_SPI 26 | ||
48 | #define PT_ORIGR0 27 | ||
49 | |||
50 | /* virtual pt_reg entry for gdb */ | ||
51 | #define PT_PC 30 | ||
52 | #define PT_CBR 31 | ||
53 | #define PT_EVB 32 | ||
54 | |||
55 | |||
56 | /* Control registers. */ | ||
57 | #define SPR_CR0 PT_PSW | ||
58 | #define SPR_CR1 PT_CBR /* read only */ | ||
59 | #define SPR_CR2 PT_SPI | ||
60 | #define SPR_CR3 PT_SPU | ||
61 | #define SPR_CR4 | ||
62 | #define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */ | ||
63 | #define SPR_CR6 PT_BPC | ||
64 | #define SPR_CR7 | ||
65 | #define SPR_CR8 PT_BBPSW | ||
66 | #define SPR_CR9 | ||
67 | #define SPR_CR10 | ||
68 | #define SPR_CR11 | ||
69 | #define SPR_CR12 | ||
70 | #define SPR_CR13 PT_WR | ||
71 | #define SPR_CR14 PT_BBPC | ||
72 | #define SPR_CR15 | ||
73 | |||
74 | /* this struct defines the way the registers are stored on the | ||
75 | stack during a system call. */ | ||
76 | struct pt_regs { | ||
77 | /* Saved main processor registers. */ | ||
78 | unsigned long r4; | ||
79 | unsigned long r5; | ||
80 | unsigned long r6; | ||
81 | struct pt_regs *pt_regs; | ||
82 | unsigned long r0; | ||
83 | unsigned long r1; | ||
84 | unsigned long r2; | ||
85 | unsigned long r3; | ||
86 | unsigned long r7; | ||
87 | unsigned long r8; | ||
88 | unsigned long r9; | ||
89 | unsigned long r10; | ||
90 | unsigned long r11; | ||
91 | unsigned long r12; | ||
92 | long syscall_nr; | ||
93 | |||
94 | /* Saved main processor status and miscellaneous context registers. */ | ||
95 | unsigned long acc0h; | ||
96 | unsigned long acc0l; | ||
97 | unsigned long acc1h; /* ISA_DSP_LEVEL2 only */ | ||
98 | unsigned long acc1l; /* ISA_DSP_LEVEL2 only */ | ||
99 | unsigned long psw; | ||
100 | unsigned long bpc; /* saved PC for TRAP syscalls */ | ||
101 | unsigned long bbpsw; | ||
102 | unsigned long bbpc; | ||
103 | unsigned long spu; /* saved user stack */ | ||
104 | unsigned long fp; | ||
105 | unsigned long lr; /* saved PC for JL syscalls */ | ||
106 | unsigned long spi; /* saved kernel stack */ | ||
107 | unsigned long orig_r0; | ||
108 | }; | ||
109 | |||
110 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ | ||
111 | #define PTRACE_GETREGS 12 | ||
112 | #define PTRACE_SETREGS 13 | ||
113 | |||
114 | #define PTRACE_OLDSETOPTIONS 21 | ||
115 | |||
116 | /* options set using PTRACE_SETOPTIONS */ | ||
117 | #define PTRACE_O_TRACESYSGOOD 0x00000001 | ||
118 | |||
119 | #ifdef __KERNEL__ | ||
120 | |||
121 | #include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */ | ||
122 | |||
123 | struct task_struct; | ||
124 | extern void init_debug_traps(struct task_struct *); | ||
125 | #define arch_ptrace_attach(child) \ | ||
126 | init_debug_traps(child) | ||
127 | |||
128 | #if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2) | ||
129 | #define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0) | ||
130 | #elif defined(CONFIG_ISA_M32R) | ||
131 | #define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0) | ||
132 | #else | ||
133 | #error unknown isa configuration | ||
134 | #endif | ||
135 | |||
136 | #define instruction_pointer(regs) ((regs)->bpc) | ||
137 | #define profile_pc(regs) instruction_pointer(regs) | ||
138 | |||
139 | extern void show_regs(struct pt_regs *); | ||
140 | |||
141 | extern void withdraw_debug_trap(struct pt_regs *regs); | ||
142 | |||
143 | #define task_pt_regs(task) \ | ||
144 | ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1) | ||
145 | |||
146 | #endif /* __KERNEL */ | ||
147 | |||
148 | #endif /* _ASM_M32R_PTRACE_H */ | ||
diff --git a/include/asm-m32r/resource.h b/include/asm-m32r/resource.h deleted file mode 100644 index b1ce766e37a0..000000000000 --- a/include/asm-m32r/resource.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_RESOURCE_H | ||
2 | #define _ASM_M32R_RESOURCE_H | ||
3 | |||
4 | #include <asm-generic/resource.h> | ||
5 | |||
6 | #endif /* _ASM_M32R_RESOURCE_H */ | ||
diff --git a/include/asm-m32r/rtc.h b/include/asm-m32r/rtc.h deleted file mode 100644 index 0340633f3f4d..000000000000 --- a/include/asm-m32r/rtc.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | #ifndef __RTC_H__ | ||
2 | #define __RTC_H__ | ||
3 | |||
4 | /* Dallas DS1302 clock/calendar register numbers. */ | ||
5 | # define RTC_SECONDS 0 | ||
6 | # define RTC_MINUTES 1 | ||
7 | # define RTC_HOURS 2 | ||
8 | # define RTC_DAY_OF_MONTH 3 | ||
9 | # define RTC_MONTH 4 | ||
10 | # define RTC_WEEKDAY 5 | ||
11 | # define RTC_YEAR 6 | ||
12 | # define RTC_CONTROL 7 | ||
13 | |||
14 | /* Bits in CONTROL register. */ | ||
15 | # define RTC_CONTROL_WRITEPROTECT 0x80 | ||
16 | # define RTC_TRICKLECHARGER 8 | ||
17 | |||
18 | /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */ | ||
19 | # define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */ | ||
20 | # define RTC_TCR_1DIOD 0x04 /* xxxx01xx */ | ||
21 | # define RTC_TCR_2DIOD 0x08 /* xxxx10xx */ | ||
22 | # define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */ | ||
23 | # define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */ | ||
24 | # define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */ | ||
25 | # define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */ | ||
26 | |||
27 | #ifdef CONFIG_DS1302 | ||
28 | extern unsigned char ds1302_readreg(int reg); | ||
29 | extern void ds1302_writereg(int reg, unsigned char val); | ||
30 | extern int ds1302_init(void); | ||
31 | # define CMOS_READ(x) ds1302_readreg(x) | ||
32 | # define CMOS_WRITE(val,reg) ds1302_writereg(reg,val) | ||
33 | # define RTC_INIT() ds1302_init() | ||
34 | #else | ||
35 | /* No RTC configured so we shouldn't try to access any. */ | ||
36 | # define CMOS_READ(x) 42 | ||
37 | # define CMOS_WRITE(x,y) | ||
38 | # define RTC_INIT() (-1) | ||
39 | #endif | ||
40 | |||
41 | /* | ||
42 | * The struct used to pass data via the following ioctl. Similar to the | ||
43 | * struct tm in <time.h>, but it needs to be here so that the kernel | ||
44 | * source is self contained, allowing cross-compiles, etc. etc. | ||
45 | */ | ||
46 | struct rtc_time { | ||
47 | int tm_sec; | ||
48 | int tm_min; | ||
49 | int tm_hour; | ||
50 | int tm_mday; | ||
51 | int tm_mon; | ||
52 | int tm_year; | ||
53 | int tm_wday; | ||
54 | int tm_yday; | ||
55 | int tm_isdst; | ||
56 | }; | ||
57 | |||
58 | /* ioctl() calls that are permitted to the /dev/rtc interface. */ | ||
59 | #define RTC_MAGIC 'p' | ||
60 | #define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */ | ||
61 | #define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */ | ||
62 | #define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int) | ||
63 | #define RTC_MAX_IOCTL 0x0b | ||
64 | |||
65 | #endif /* __RTC_H__ */ | ||
diff --git a/include/asm-m32r/s1d13806.h b/include/asm-m32r/s1d13806.h deleted file mode 100644 index 248d36a82d79..000000000000 --- a/include/asm-m32r/s1d13806.h +++ /dev/null | |||
@@ -1,199 +0,0 @@ | |||
1 | //---------------------------------------------------------------------------- | ||
2 | // | ||
3 | // File generated by S1D13806CFG.EXE | ||
4 | // | ||
5 | // Copyright (c) 2000,2001 Epson Research and Development, Inc. | ||
6 | // All rights reserved. | ||
7 | // | ||
8 | //---------------------------------------------------------------------------- | ||
9 | |||
10 | // Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz) | ||
11 | // Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz) | ||
12 | |||
13 | #define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */ | ||
14 | |||
15 | static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = { | ||
16 | |||
17 | {0x0001,0x00}, // Miscellaneous Register | ||
18 | {0x01FC,0x00}, // Display Mode Register | ||
19 | #if defined(CONFIG_PLAT_MAPPI) | ||
20 | {0x0004,0x00}, // General IO Pins Configuration Register 0 | ||
21 | {0x0005,0x00}, // General IO Pins Configuration Register 1 | ||
22 | {0x0008,0x00}, // General IO Pins Control Register 0 | ||
23 | {0x0009,0x00}, // General IO Pins Control Register 1 | ||
24 | {0x0010,0x00}, // Memory Clock Configuration Register | ||
25 | {0x0014,0x00}, // LCD Pixel Clock Configuration Register | ||
26 | {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register | ||
27 | {0x001C,0x00}, // MediaPlug Clock Configuration Register | ||
28 | /* | ||
29 | * .. 10MHz: 0x00 | ||
30 | * .. 30MHz: 0x01 | ||
31 | * 30MHz ..: 0x02 | ||
32 | */ | ||
33 | {0x001E,0x02}, // CPU To Memory Wait State Select Register | ||
34 | {0x0021,0x02}, // DRAM Refresh Rate Register | ||
35 | {0x002A,0x11}, // DRAM Timings Control Register 0 | ||
36 | {0x002B,0x13}, // DRAM Timings Control Register 1 | ||
37 | {0x0020,0x80}, // Memory Configuration Register | ||
38 | {0x0030,0x25}, // Panel Type Register | ||
39 | {0x0031,0x00}, // MOD Rate Register | ||
40 | {0x0032,0x4F}, // LCD Horizontal Display Width Register | ||
41 | {0x0034,0x12}, // LCD Horizontal Non-Display Period Register | ||
42 | {0x0035,0x01}, // TFT FPLINE Start Position Register | ||
43 | {0x0036,0x0B}, // TFT FPLINE Pulse Width Register | ||
44 | {0x0038,0xDF}, // LCD Vertical Display Height Register 0 | ||
45 | {0x0039,0x01}, // LCD Vertical Display Height Register 1 | ||
46 | {0x003A,0x2C}, // LCD Vertical Non-Display Period Register | ||
47 | {0x003B,0x0A}, // TFT FPFRAME Start Position Register | ||
48 | {0x003C,0x01}, // TFT FPFRAME Pulse Width Register | ||
49 | |||
50 | {0x0041,0x00}, // LCD Miscellaneous Register | ||
51 | {0x0042,0x00}, // LCD Display Start Address Register 0 | ||
52 | {0x0043,0x00}, // LCD Display Start Address Register 1 | ||
53 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
54 | |||
55 | #elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
56 | {0x0004,0x07}, // GPIO[0:7] direction | ||
57 | {0x0005,0x00}, // GPIO[8:12] direction | ||
58 | {0x0008,0x00}, // GPIO[0:7] data | ||
59 | {0x0009,0x00}, // GPIO[8:12] data | ||
60 | {0x0008,0x04}, // LCD panel Vcc on | ||
61 | {0x0008,0x05}, // LCD panel reset | ||
62 | {0x0010,0x01}, // Memory Clock Configuration Register | ||
63 | {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4) | ||
64 | {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register | ||
65 | {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz) | ||
66 | {0x001E,0x00}, // CPU To Memory Wait State Select Register | ||
67 | {0x0020,0x80}, // Memory Configuration Register | ||
68 | {0x0021,0x03}, // DRAM Refresh Rate Register | ||
69 | {0x002A,0x00}, // DRAM Timings Control Register 0 | ||
70 | {0x002B,0x01}, // DRAM Timings Control Register 1 | ||
71 | {0x0030,0x25}, // Panel Type Register | ||
72 | {0x0031,0x00}, // MOD Rate Register | ||
73 | {0x0032,0x1d}, // LCD Horizontal Display Width Register | ||
74 | {0x0034,0x05}, // LCD Horizontal Non-Display Period Register | ||
75 | {0x0035,0x01}, // TFT FPLINE Start Position Register | ||
76 | {0x0036,0x01}, // TFT FPLINE Pulse Width Register | ||
77 | {0x0038,0x3F}, // LCD Vertical Display Height Register 0 | ||
78 | {0x0039,0x01}, // LCD Vertical Display Height Register 1 | ||
79 | {0x003A,0x0b}, // LCD Vertical Non-Display Period Register | ||
80 | {0x003B,0x07}, // TFT FPFRAME Start Position Register | ||
81 | {0x003C,0x02}, // TFT FPFRAME Pulse Width Register | ||
82 | |||
83 | {0x0041,0x00}, // LCD Miscellaneous Register | ||
84 | #if (SWIVEL_VIEW == 0) | ||
85 | {0x0042,0x00}, // LCD Display Start Address Register 0 | ||
86 | {0x0043,0x00}, // LCD Display Start Address Register 1 | ||
87 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
88 | |||
89 | #elif (SWIVEL_VIEW == 1) | ||
90 | // 1024 - W(320) = 0x2C0 | ||
91 | {0x0042,0xC0}, // LCD Display Start Address Register 0 | ||
92 | {0x0043,0x02}, // LCD Display Start Address Register 1 | ||
93 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
94 | // 1024 | ||
95 | {0x0046,0x00}, // LCD Memory Address Offset Register 0 | ||
96 | {0x0047,0x02}, // LCD Memory Address Offset Register 1 | ||
97 | #else | ||
98 | #error unsupported SWIVEL_VIEW mode | ||
99 | #endif | ||
100 | #else | ||
101 | #error no platform configuration | ||
102 | #endif /* CONFIG_PLAT_XXX */ | ||
103 | |||
104 | {0x0048,0x00}, // LCD Pixel Panning Register | ||
105 | {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register | ||
106 | {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register | ||
107 | {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register | ||
108 | {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register | ||
109 | {0x0053,0x01}, // CRT/TV HRTC Start Position Register | ||
110 | {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register | ||
111 | {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0 | ||
112 | {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1 | ||
113 | {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register | ||
114 | {0x0059,0x09}, // CRT/TV VRTC Start Position Register | ||
115 | {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register | ||
116 | {0x005B,0x10}, // TV Output Control Register | ||
117 | |||
118 | {0x0062,0x00}, // CRT/TV Display Start Address Register 0 | ||
119 | {0x0063,0x00}, // CRT/TV Display Start Address Register 1 | ||
120 | {0x0064,0x00}, // CRT/TV Display Start Address Register 2 | ||
121 | |||
122 | {0x0068,0x00}, // CRT/TV Pixel Panning Register | ||
123 | {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register | ||
124 | {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register | ||
125 | {0x0070,0x00}, // LCD Ink/Cursor Control Register | ||
126 | {0x0071,0x01}, // LCD Ink/Cursor Start Address Register | ||
127 | {0x0072,0x00}, // LCD Cursor X Position Register 0 | ||
128 | {0x0073,0x00}, // LCD Cursor X Position Register 1 | ||
129 | {0x0074,0x00}, // LCD Cursor Y Position Register 0 | ||
130 | {0x0075,0x00}, // LCD Cursor Y Position Register 1 | ||
131 | {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register | ||
132 | {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register | ||
133 | {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register | ||
134 | {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register | ||
135 | {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register | ||
136 | {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register | ||
137 | {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register | ||
138 | {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register | ||
139 | {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register | ||
140 | {0x0082,0x00}, // CRT/TV Cursor X Position Register 0 | ||
141 | {0x0083,0x00}, // CRT/TV Cursor X Position Register 1 | ||
142 | {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0 | ||
143 | {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1 | ||
144 | {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register | ||
145 | {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register | ||
146 | {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register | ||
147 | {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register | ||
148 | {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register | ||
149 | {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register | ||
150 | {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register | ||
151 | {0x0100,0x00}, // BitBlt Control Register 0 | ||
152 | {0x0101,0x00}, // BitBlt Control Register 1 | ||
153 | {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register | ||
154 | {0x0103,0x00}, // BitBlt Operation Register | ||
155 | {0x0104,0x00}, // BitBlt Source Start Address Register 0 | ||
156 | {0x0105,0x00}, // BitBlt Source Start Address Register 1 | ||
157 | {0x0106,0x00}, // BitBlt Source Start Address Register 2 | ||
158 | {0x0108,0x00}, // BitBlt Destination Start Address Register 0 | ||
159 | {0x0109,0x00}, // BitBlt Destination Start Address Register 1 | ||
160 | {0x010A,0x00}, // BitBlt Destination Start Address Register 2 | ||
161 | {0x010C,0x00}, // BitBlt Memory Address Offset Register 0 | ||
162 | {0x010D,0x00}, // BitBlt Memory Address Offset Register 1 | ||
163 | {0x0110,0x00}, // BitBlt Width Register 0 | ||
164 | {0x0111,0x00}, // BitBlt Width Register 1 | ||
165 | {0x0112,0x00}, // BitBlt Height Register 0 | ||
166 | {0x0113,0x00}, // BitBlt Height Register 1 | ||
167 | {0x0114,0x00}, // BitBlt Background Color Register 0 | ||
168 | {0x0115,0x00}, // BitBlt Background Color Register 1 | ||
169 | {0x0118,0x00}, // BitBlt Foreground Color Register 0 | ||
170 | {0x0119,0x00}, // BitBlt Foreground Color Register 1 | ||
171 | {0x01E0,0x00}, // Look-Up Table Mode Register | ||
172 | {0x01E2,0x00}, // Look-Up Table Address Register | ||
173 | {0x01F0,0x10}, // Power Save Configuration Register | ||
174 | {0x01F1,0x00}, // Power Save Status Register | ||
175 | {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register | ||
176 | #if (SWIVEL_VIEW == 0) | ||
177 | {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT) | ||
178 | #elif (SWIVEL_VIEW == 1) | ||
179 | {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT) | ||
180 | #else | ||
181 | #error unsupported SWIVEL_VIEW mode | ||
182 | #endif /* SWIVEL_VIEW */ | ||
183 | |||
184 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
185 | {0x0008,0x07}, // LCD panel Vdd & Vg on | ||
186 | #endif | ||
187 | |||
188 | {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp) | ||
189 | #if defined(CONFIG_PLAT_MAPPI) | ||
190 | {0x0046,0x80}, // LCD Memory Address Offset Register 0 | ||
191 | {0x0047,0x02}, // LCD Memory Address Offset Register 1 | ||
192 | #elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
193 | {0x0046,0xf0}, // LCD Memory Address Offset Register 0 | ||
194 | {0x0047,0x00}, // LCD Memory Address Offset Register 1 | ||
195 | #endif | ||
196 | {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp) | ||
197 | {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo | ||
198 | {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1 | ||
199 | }; | ||
diff --git a/include/asm-m32r/scatterlist.h b/include/asm-m32r/scatterlist.h deleted file mode 100644 index 1ed372c73d0b..000000000000 --- a/include/asm-m32r/scatterlist.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SCATTERLIST_H | ||
2 | #define _ASM_M32R_SCATTERLIST_H | ||
3 | |||
4 | #include <asm/types.h> | ||
5 | |||
6 | struct scatterlist { | ||
7 | #ifdef CONFIG_DEBUG_SG | ||
8 | unsigned long sg_magic; | ||
9 | #endif | ||
10 | char * address; /* Location data is to be transferred to, NULL for | ||
11 | * highmem page */ | ||
12 | unsigned long page_link; | ||
13 | unsigned int offset;/* for highmem, page offset */ | ||
14 | |||
15 | dma_addr_t dma_address; | ||
16 | unsigned int length; | ||
17 | }; | ||
18 | |||
19 | #define ISA_DMA_THRESHOLD (0x1fffffff) | ||
20 | |||
21 | #endif /* _ASM_M32R_SCATTERLIST_H */ | ||
diff --git a/include/asm-m32r/sections.h b/include/asm-m32r/sections.h deleted file mode 100644 index 5e5d21c4908a..000000000000 --- a/include/asm-m32r/sections.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef _M32R_SECTIONS_H | ||
2 | #define _M32R_SECTIONS_H | ||
3 | |||
4 | /* nothing to see, move along */ | ||
5 | #include <asm-generic/sections.h> | ||
6 | |||
7 | #endif /* _M32R_SECTIONS_H */ | ||
diff --git a/include/asm-m32r/segment.h b/include/asm-m32r/segment.h deleted file mode 100644 index 42b11aeb3249..000000000000 --- a/include/asm-m32r/segment.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SEGMENT_H | ||
2 | #define _ASM_M32R_SEGMENT_H | ||
3 | |||
4 | #define __KERNEL_CS 0x10 | ||
5 | #define __KERNEL_DS 0x18 | ||
6 | |||
7 | #define __USER_CS 0x23 | ||
8 | #define __USER_DS 0x2B | ||
9 | |||
10 | #endif /* _ASM_M32R_SEGMENT_H */ | ||
diff --git a/include/asm-m32r/sembuf.h b/include/asm-m32r/sembuf.h deleted file mode 100644 index c9873d6890e2..000000000000 --- a/include/asm-m32r/sembuf.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SEMBUF_H | ||
2 | #define _ASM_M32R_SEMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The semid64_ds structure for m32r architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct semid64_ds { | ||
15 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
16 | __kernel_time_t sem_otime; /* last semop time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t sem_ctime; /* last change time */ | ||
19 | unsigned long __unused2; | ||
20 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long __unused4; | ||
23 | }; | ||
24 | |||
25 | #endif /* _ASM_M32R_SEMBUF_H */ | ||
diff --git a/include/asm-m32r/serial.h b/include/asm-m32r/serial.h deleted file mode 100644 index 5ac244c72f15..000000000000 --- a/include/asm-m32r/serial.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SERIAL_H | ||
2 | #define _ASM_M32R_SERIAL_H | ||
3 | |||
4 | /* include/asm-m32r/serial.h */ | ||
5 | |||
6 | |||
7 | #define BASE_BAUD 115200 | ||
8 | |||
9 | #endif /* _ASM_M32R_SERIAL_H */ | ||
diff --git a/include/asm-m32r/setup.h b/include/asm-m32r/setup.h deleted file mode 100644 index c637ab992394..000000000000 --- a/include/asm-m32r/setup.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SETUP_H | ||
2 | #define _ASM_M32R_SETUP_H | ||
3 | |||
4 | /* | ||
5 | * This is set up by the setup-routine at boot-time | ||
6 | */ | ||
7 | |||
8 | #define COMMAND_LINE_SIZE 512 | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #define PARAM ((unsigned char *)empty_zero_page) | ||
13 | |||
14 | #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) | ||
15 | #define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) | ||
16 | #define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) | ||
17 | #define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) | ||
18 | #define INITRD_START (*(unsigned long *) (PARAM+0x010)) | ||
19 | #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) | ||
20 | |||
21 | #define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018)) | ||
22 | #define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c)) | ||
23 | #define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020)) | ||
24 | |||
25 | #define COMMAND_LINE ((char *) (PARAM+0x100)) | ||
26 | |||
27 | #define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200)) | ||
28 | |||
29 | #define RAMDISK_IMAGE_START_MASK (0x07FF) | ||
30 | #define RAMDISK_PROMPT_FLAG (0x8000) | ||
31 | #define RAMDISK_LOAD_FLAG (0x4000) | ||
32 | |||
33 | extern unsigned long memory_start; | ||
34 | extern unsigned long memory_end; | ||
35 | |||
36 | #endif /* __KERNEL__ */ | ||
37 | |||
38 | #endif /* _ASM_M32R_SETUP_H */ | ||
diff --git a/include/asm-m32r/shmbuf.h b/include/asm-m32r/shmbuf.h deleted file mode 100644 index b0cdf0aa7d65..000000000000 --- a/include/asm-m32r/shmbuf.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SHMBUF_H | ||
2 | #define _ASM_M32R_SHMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for M32R architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | size_t shm_segsz; /* size of segment (bytes) */ | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused4; | ||
27 | unsigned long __unused5; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* _ASM_M32R_SHMBUF_H */ | ||
diff --git a/include/asm-m32r/shmparam.h b/include/asm-m32r/shmparam.h deleted file mode 100644 index 35986d81a528..000000000000 --- a/include/asm-m32r/shmparam.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SHMPARAM_H | ||
2 | #define _ASM_M32R_SHMPARAM_H | ||
3 | |||
4 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
5 | |||
6 | #endif /* _ASM_M32R_SHMPARAM_H */ | ||
diff --git a/include/asm-m32r/sigcontext.h b/include/asm-m32r/sigcontext.h deleted file mode 100644 index da4a9c36d09b..000000000000 --- a/include/asm-m32r/sigcontext.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SIGCONTEXT_H | ||
2 | #define _ASM_M32R_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | /* CPU registers */ | ||
6 | /* Saved main processor registers. */ | ||
7 | unsigned long sc_r4; | ||
8 | unsigned long sc_r5; | ||
9 | unsigned long sc_r6; | ||
10 | struct pt_regs *sc_pt_regs; | ||
11 | unsigned long sc_r0; | ||
12 | unsigned long sc_r1; | ||
13 | unsigned long sc_r2; | ||
14 | unsigned long sc_r3; | ||
15 | unsigned long sc_r7; | ||
16 | unsigned long sc_r8; | ||
17 | unsigned long sc_r9; | ||
18 | unsigned long sc_r10; | ||
19 | unsigned long sc_r11; | ||
20 | unsigned long sc_r12; | ||
21 | |||
22 | /* Saved main processor status and miscellaneous context registers. */ | ||
23 | unsigned long sc_acc0h; | ||
24 | unsigned long sc_acc0l; | ||
25 | unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */ | ||
26 | unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */ | ||
27 | unsigned long sc_psw; | ||
28 | unsigned long sc_bpc; /* saved PC for TRAP syscalls */ | ||
29 | unsigned long sc_bbpsw; | ||
30 | unsigned long sc_bbpc; | ||
31 | unsigned long sc_spu; /* saved user stack */ | ||
32 | unsigned long sc_fp; | ||
33 | unsigned long sc_lr; /* saved PC for JL syscalls */ | ||
34 | unsigned long sc_spi; /* saved kernel stack */ | ||
35 | |||
36 | unsigned long oldmask; | ||
37 | }; | ||
38 | |||
39 | #endif /* _ASM_M32R_SIGCONTEXT_H */ | ||
diff --git a/include/asm-m32r/siginfo.h b/include/asm-m32r/siginfo.h deleted file mode 100644 index 7d9cd9ebfd0e..000000000000 --- a/include/asm-m32r/siginfo.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _M32R_SIGINFO_H | ||
2 | #define _M32R_SIGINFO_H | ||
3 | |||
4 | #include <asm-generic/siginfo.h> | ||
5 | |||
6 | #endif /* _M32R_SIGINFO_H */ | ||
diff --git a/include/asm-m32r/signal.h b/include/asm-m32r/signal.h deleted file mode 100644 index 1a607066bc64..000000000000 --- a/include/asm-m32r/signal.h +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SIGNAL_H | ||
2 | #define _ASM_M32R_SIGNAL_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | #include <linux/time.h> | ||
6 | #include <linux/compiler.h> | ||
7 | |||
8 | /* Avoid too many header ordering problems. */ | ||
9 | struct siginfo; | ||
10 | |||
11 | #ifdef __KERNEL__ | ||
12 | /* Most things should be clean enough to redefine this at will, if care | ||
13 | is taken to make libc match. */ | ||
14 | |||
15 | #define _NSIG 64 | ||
16 | #define _NSIG_BPW 32 | ||
17 | #define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
18 | |||
19 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
20 | |||
21 | typedef struct { | ||
22 | unsigned long sig[_NSIG_WORDS]; | ||
23 | } sigset_t; | ||
24 | |||
25 | #else | ||
26 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
27 | |||
28 | #define NSIG 32 | ||
29 | typedef unsigned long sigset_t; | ||
30 | |||
31 | #endif /* __KERNEL__ */ | ||
32 | |||
33 | #define SIGHUP 1 | ||
34 | #define SIGINT 2 | ||
35 | #define SIGQUIT 3 | ||
36 | #define SIGILL 4 | ||
37 | #define SIGTRAP 5 | ||
38 | #define SIGABRT 6 | ||
39 | #define SIGIOT 6 | ||
40 | #define SIGBUS 7 | ||
41 | #define SIGFPE 8 | ||
42 | #define SIGKILL 9 | ||
43 | #define SIGUSR1 10 | ||
44 | #define SIGSEGV 11 | ||
45 | #define SIGUSR2 12 | ||
46 | #define SIGPIPE 13 | ||
47 | #define SIGALRM 14 | ||
48 | #define SIGTERM 15 | ||
49 | #define SIGSTKFLT 16 | ||
50 | #define SIGCHLD 17 | ||
51 | #define SIGCONT 18 | ||
52 | #define SIGSTOP 19 | ||
53 | #define SIGTSTP 20 | ||
54 | #define SIGTTIN 21 | ||
55 | #define SIGTTOU 22 | ||
56 | #define SIGURG 23 | ||
57 | #define SIGXCPU 24 | ||
58 | #define SIGXFSZ 25 | ||
59 | #define SIGVTALRM 26 | ||
60 | #define SIGPROF 27 | ||
61 | #define SIGWINCH 28 | ||
62 | #define SIGIO 29 | ||
63 | #define SIGPOLL SIGIO | ||
64 | /* | ||
65 | #define SIGLOST 29 | ||
66 | */ | ||
67 | #define SIGPWR 30 | ||
68 | #define SIGSYS 31 | ||
69 | #define SIGUNUSED 31 | ||
70 | |||
71 | /* These should not be considered constants from userland. */ | ||
72 | #define SIGRTMIN 32 | ||
73 | #define SIGRTMAX _NSIG | ||
74 | |||
75 | /* | ||
76 | * SA_FLAGS values: | ||
77 | * | ||
78 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
79 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
80 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
81 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
82 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
83 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
84 | * | ||
85 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
86 | * Unix names RESETHAND and NODEFER respectively. | ||
87 | */ | ||
88 | #define SA_NOCLDSTOP 0x00000001u | ||
89 | #define SA_NOCLDWAIT 0x00000002u | ||
90 | #define SA_SIGINFO 0x00000004u | ||
91 | #define SA_ONSTACK 0x08000000u | ||
92 | #define SA_RESTART 0x10000000u | ||
93 | #define SA_NODEFER 0x40000000u | ||
94 | #define SA_RESETHAND 0x80000000u | ||
95 | |||
96 | #define SA_NOMASK SA_NODEFER | ||
97 | #define SA_ONESHOT SA_RESETHAND | ||
98 | |||
99 | #define SA_RESTORER 0x04000000 | ||
100 | |||
101 | /* | ||
102 | * sigaltstack controls | ||
103 | */ | ||
104 | #define SS_ONSTACK 1 | ||
105 | #define SS_DISABLE 2 | ||
106 | |||
107 | #define MINSIGSTKSZ 2048 | ||
108 | #define SIGSTKSZ 8192 | ||
109 | |||
110 | #include <asm-generic/signal.h> | ||
111 | |||
112 | #ifdef __KERNEL__ | ||
113 | struct old_sigaction { | ||
114 | __sighandler_t sa_handler; | ||
115 | old_sigset_t sa_mask; | ||
116 | unsigned long sa_flags; | ||
117 | __sigrestore_t sa_restorer; | ||
118 | }; | ||
119 | |||
120 | struct sigaction { | ||
121 | __sighandler_t sa_handler; | ||
122 | unsigned long sa_flags; | ||
123 | __sigrestore_t sa_restorer; | ||
124 | sigset_t sa_mask; /* mask last for extensibility */ | ||
125 | }; | ||
126 | |||
127 | struct k_sigaction { | ||
128 | struct sigaction sa; | ||
129 | }; | ||
130 | #else | ||
131 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
132 | |||
133 | struct sigaction { | ||
134 | union { | ||
135 | __sighandler_t _sa_handler; | ||
136 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
137 | } _u; | ||
138 | sigset_t sa_mask; | ||
139 | unsigned long sa_flags; | ||
140 | void (*sa_restorer)(void); | ||
141 | }; | ||
142 | |||
143 | #define sa_handler _u._sa_handler | ||
144 | #define sa_sigaction _u._sa_sigaction | ||
145 | |||
146 | #endif /* __KERNEL__ */ | ||
147 | |||
148 | typedef struct sigaltstack { | ||
149 | void __user *ss_sp; | ||
150 | int ss_flags; | ||
151 | size_t ss_size; | ||
152 | } stack_t; | ||
153 | |||
154 | #ifdef __KERNEL__ | ||
155 | #include <asm/sigcontext.h> | ||
156 | |||
157 | #undef __HAVE_ARCH_SIG_BITOPS | ||
158 | |||
159 | struct pt_regs; | ||
160 | extern int do_signal(struct pt_regs *regs, sigset_t *oldset); | ||
161 | |||
162 | #define ptrace_signal_deliver(regs, cookie) do { } while (0) | ||
163 | |||
164 | #endif /* __KERNEL__ */ | ||
165 | |||
166 | #endif /* _ASM_M32R_SIGNAL_H */ | ||
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h deleted file mode 100644 index b96a6d2ffbc3..000000000000 --- a/include/asm-m32r/smp.h +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SMP_H | ||
2 | #define _ASM_M32R_SMP_H | ||
3 | |||
4 | #ifdef CONFIG_SMP | ||
5 | #ifndef __ASSEMBLY__ | ||
6 | |||
7 | #include <linux/cpumask.h> | ||
8 | #include <linux/spinlock.h> | ||
9 | #include <linux/threads.h> | ||
10 | #include <asm/m32r.h> | ||
11 | |||
12 | #define PHYSID_ARRAY_SIZE 1 | ||
13 | |||
14 | struct physid_mask | ||
15 | { | ||
16 | unsigned long mask[PHYSID_ARRAY_SIZE]; | ||
17 | }; | ||
18 | |||
19 | typedef struct physid_mask physid_mask_t; | ||
20 | |||
21 | #define physid_set(physid, map) set_bit(physid, (map).mask) | ||
22 | #define physid_clear(physid, map) clear_bit(physid, (map).mask) | ||
23 | #define physid_isset(physid, map) test_bit(physid, (map).mask) | ||
24 | #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask) | ||
25 | |||
26 | #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
27 | #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
28 | #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS) | ||
29 | #define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS) | ||
30 | #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS) | ||
31 | #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS) | ||
32 | #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS) | ||
33 | #define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS) | ||
34 | #define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS) | ||
35 | #define physids_coerce(map) ((map).mask[0]) | ||
36 | |||
37 | #define physids_promote(physids) \ | ||
38 | ({ \ | ||
39 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
40 | __physid_mask.mask[0] = physids; \ | ||
41 | __physid_mask; \ | ||
42 | }) | ||
43 | |||
44 | #define physid_mask_of_physid(physid) \ | ||
45 | ({ \ | ||
46 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
47 | physid_set(physid, __physid_mask); \ | ||
48 | __physid_mask; \ | ||
49 | }) | ||
50 | |||
51 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } | ||
52 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } | ||
53 | |||
54 | extern physid_mask_t phys_cpu_present_map; | ||
55 | |||
56 | /* | ||
57 | * Some lowlevel functions might want to know about | ||
58 | * the real CPU ID <-> CPU # mapping. | ||
59 | */ | ||
60 | extern volatile int cpu_2_physid[NR_CPUS]; | ||
61 | #define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id] | ||
62 | |||
63 | #define raw_smp_processor_id() (current_thread_info()->cpu) | ||
64 | |||
65 | extern cpumask_t cpu_callout_map; | ||
66 | |||
67 | static __inline__ int hard_smp_processor_id(void) | ||
68 | { | ||
69 | return (int)*(volatile long *)M32R_CPUID_PORTL; | ||
70 | } | ||
71 | |||
72 | static __inline__ int cpu_logical_map(int cpu) | ||
73 | { | ||
74 | return cpu; | ||
75 | } | ||
76 | |||
77 | static __inline__ int cpu_number_map(int cpu) | ||
78 | { | ||
79 | return cpu; | ||
80 | } | ||
81 | |||
82 | static __inline__ unsigned int num_booting_cpus(void) | ||
83 | { | ||
84 | return cpus_weight(cpu_callout_map); | ||
85 | } | ||
86 | |||
87 | extern void smp_send_timer(void); | ||
88 | extern unsigned long send_IPI_mask_phys(cpumask_t, int, int); | ||
89 | |||
90 | extern void arch_send_call_function_single_ipi(int cpu); | ||
91 | extern void arch_send_call_function_ipi(cpumask_t mask); | ||
92 | |||
93 | #endif /* not __ASSEMBLY__ */ | ||
94 | |||
95 | #define NO_PROC_ID (0xff) /* No processor magic marker */ | ||
96 | |||
97 | #define PROC_CHANGE_PENALTY (15) /* Schedule penalty */ | ||
98 | |||
99 | /* | ||
100 | * M32R-mp IPI | ||
101 | */ | ||
102 | #define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0) | ||
103 | #define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0) | ||
104 | #define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0) | ||
105 | #define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0) | ||
106 | #define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0) | ||
107 | #define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0) | ||
108 | #define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0) | ||
109 | |||
110 | #define IPI_SHIFT (0) | ||
111 | #define NR_IPIS (8) | ||
112 | |||
113 | #else /* CONFIG_SMP */ | ||
114 | |||
115 | #define hard_smp_processor_id() 0 | ||
116 | |||
117 | #endif /* CONFIG_SMP */ | ||
118 | |||
119 | #endif /* _ASM_M32R_SMP_H */ | ||
diff --git a/include/asm-m32r/socket.h b/include/asm-m32r/socket.h deleted file mode 100644 index be7ed589af5c..000000000000 --- a/include/asm-m32r/socket.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SOCKET_H | ||
2 | #define _ASM_M32R_SOCKET_H | ||
3 | |||
4 | #include <asm/sockios.h> | ||
5 | |||
6 | /* For setsockoptions(2) */ | ||
7 | #define SOL_SOCKET 1 | ||
8 | |||
9 | #define SO_DEBUG 1 | ||
10 | #define SO_REUSEADDR 2 | ||
11 | #define SO_TYPE 3 | ||
12 | #define SO_ERROR 4 | ||
13 | #define SO_DONTROUTE 5 | ||
14 | #define SO_BROADCAST 6 | ||
15 | #define SO_SNDBUF 7 | ||
16 | #define SO_RCVBUF 8 | ||
17 | #define SO_SNDBUFFORCE 32 | ||
18 | #define SO_RCVBUFFORCE 33 | ||
19 | #define SO_KEEPALIVE 9 | ||
20 | #define SO_OOBINLINE 10 | ||
21 | #define SO_NO_CHECK 11 | ||
22 | #define SO_PRIORITY 12 | ||
23 | #define SO_LINGER 13 | ||
24 | #define SO_BSDCOMPAT 14 | ||
25 | /* To add :#define SO_REUSEPORT 15 */ | ||
26 | #define SO_PASSCRED 16 | ||
27 | #define SO_PEERCRED 17 | ||
28 | #define SO_RCVLOWAT 18 | ||
29 | #define SO_SNDLOWAT 19 | ||
30 | #define SO_RCVTIMEO 20 | ||
31 | #define SO_SNDTIMEO 21 | ||
32 | |||
33 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
34 | #define SO_SECURITY_AUTHENTICATION 22 | ||
35 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
36 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
37 | |||
38 | #define SO_BINDTODEVICE 25 | ||
39 | |||
40 | /* Socket filtering */ | ||
41 | #define SO_ATTACH_FILTER 26 | ||
42 | #define SO_DETACH_FILTER 27 | ||
43 | |||
44 | #define SO_PEERNAME 28 | ||
45 | #define SO_TIMESTAMP 29 | ||
46 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
47 | |||
48 | #define SO_ACCEPTCONN 30 | ||
49 | |||
50 | #define SO_PEERSEC 31 | ||
51 | #define SO_PASSSEC 34 | ||
52 | #define SO_TIMESTAMPNS 35 | ||
53 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
54 | |||
55 | #define SO_MARK 36 | ||
56 | |||
57 | #define SO_TIMESTAMPING 37 | ||
58 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
59 | |||
60 | #endif /* _ASM_M32R_SOCKET_H */ | ||
diff --git a/include/asm-m32r/sockios.h b/include/asm-m32r/sockios.h deleted file mode 100644 index 6c1fb9b43bdb..000000000000 --- a/include/asm-m32r/sockios.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SOCKIOS_H | ||
2 | #define _ASM_M32R_SOCKIOS_H | ||
3 | |||
4 | /* Socket-level I/O control calls. */ | ||
5 | #define FIOSETOWN 0x8901 | ||
6 | #define SIOCSPGRP 0x8902 | ||
7 | #define FIOGETOWN 0x8903 | ||
8 | #define SIOCGPGRP 0x8904 | ||
9 | #define SIOCATMARK 0x8905 | ||
10 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
11 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
12 | |||
13 | #endif /* _ASM_M32R_SOCKIOS_H */ | ||
diff --git a/include/asm-m32r/spinlock.h b/include/asm-m32r/spinlock.h deleted file mode 100644 index dded923883b2..000000000000 --- a/include/asm-m32r/spinlock.h +++ /dev/null | |||
@@ -1,326 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SPINLOCK_H | ||
2 | #define _ASM_M32R_SPINLOCK_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/spinlock.h | ||
6 | * | ||
7 | * M32R version: | ||
8 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
9 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/atomic.h> | ||
14 | #include <asm/page.h> | ||
15 | |||
16 | /* | ||
17 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | ||
18 | * | ||
19 | * (the type definitions are in asm/spinlock_types.h) | ||
20 | * | ||
21 | * Simple spin lock operations. There are two variants, one clears IRQ's | ||
22 | * on the local processor, one does not. | ||
23 | * | ||
24 | * We make no fairness assumptions. They have a cost. | ||
25 | */ | ||
26 | |||
27 | #define __raw_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0) | ||
28 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | ||
29 | #define __raw_spin_unlock_wait(x) \ | ||
30 | do { cpu_relax(); } while (__raw_spin_is_locked(x)) | ||
31 | |||
32 | /** | ||
33 | * __raw_spin_trylock - Try spin lock and return a result | ||
34 | * @lock: Pointer to the lock variable | ||
35 | * | ||
36 | * __raw_spin_trylock() tries to get the lock and returns a result. | ||
37 | * On the m32r, the result value is 1 (= Success) or 0 (= Failure). | ||
38 | */ | ||
39 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
40 | { | ||
41 | int oldval; | ||
42 | unsigned long tmp1, tmp2; | ||
43 | |||
44 | /* | ||
45 | * lock->slock : =1 : unlock | ||
46 | * : <=0 : lock | ||
47 | * { | ||
48 | * oldval = lock->slock; <--+ need atomic operation | ||
49 | * lock->slock = 0; <--+ | ||
50 | * } | ||
51 | */ | ||
52 | __asm__ __volatile__ ( | ||
53 | "# __raw_spin_trylock \n\t" | ||
54 | "ldi %1, #0; \n\t" | ||
55 | "mvfc %2, psw; \n\t" | ||
56 | "clrpsw #0x40 -> nop; \n\t" | ||
57 | DCACHE_CLEAR("%0", "r6", "%3") | ||
58 | "lock %0, @%3; \n\t" | ||
59 | "unlock %1, @%3; \n\t" | ||
60 | "mvtc %2, psw; \n\t" | ||
61 | : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2) | ||
62 | : "r" (&lock->slock) | ||
63 | : "memory" | ||
64 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
65 | , "r6" | ||
66 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
67 | ); | ||
68 | |||
69 | return (oldval > 0); | ||
70 | } | ||
71 | |||
72 | static inline void __raw_spin_lock(raw_spinlock_t *lock) | ||
73 | { | ||
74 | unsigned long tmp0, tmp1; | ||
75 | |||
76 | /* | ||
77 | * lock->slock : =1 : unlock | ||
78 | * : <=0 : lock | ||
79 | * | ||
80 | * for ( ; ; ) { | ||
81 | * lock->slock -= 1; <-- need atomic operation | ||
82 | * if (lock->slock == 0) break; | ||
83 | * for ( ; lock->slock <= 0 ; ); | ||
84 | * } | ||
85 | */ | ||
86 | __asm__ __volatile__ ( | ||
87 | "# __raw_spin_lock \n\t" | ||
88 | ".fillinsn \n" | ||
89 | "1: \n\t" | ||
90 | "mvfc %1, psw; \n\t" | ||
91 | "clrpsw #0x40 -> nop; \n\t" | ||
92 | DCACHE_CLEAR("%0", "r6", "%2") | ||
93 | "lock %0, @%2; \n\t" | ||
94 | "addi %0, #-1; \n\t" | ||
95 | "unlock %0, @%2; \n\t" | ||
96 | "mvtc %1, psw; \n\t" | ||
97 | "bltz %0, 2f; \n\t" | ||
98 | LOCK_SECTION_START(".balign 4 \n\t") | ||
99 | ".fillinsn \n" | ||
100 | "2: \n\t" | ||
101 | "ld %0, @%2; \n\t" | ||
102 | "bgtz %0, 1b; \n\t" | ||
103 | "bra 2b; \n\t" | ||
104 | LOCK_SECTION_END | ||
105 | : "=&r" (tmp0), "=&r" (tmp1) | ||
106 | : "r" (&lock->slock) | ||
107 | : "memory" | ||
108 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
109 | , "r6" | ||
110 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
111 | ); | ||
112 | } | ||
113 | |||
114 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) | ||
115 | { | ||
116 | mb(); | ||
117 | lock->slock = 1; | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * Read-write spinlocks, allowing multiple readers | ||
122 | * but only one writer. | ||
123 | * | ||
124 | * NOTE! it is quite common to have readers in interrupts | ||
125 | * but no interrupt writers. For those circumstances we | ||
126 | * can "mix" irq-safe locks - any writer needs to get a | ||
127 | * irq-safe write-lock, but readers can get non-irqsafe | ||
128 | * read-locks. | ||
129 | * | ||
130 | * On x86, we implement read-write locks as a 32-bit counter | ||
131 | * with the high bit (sign) being the "contended" bit. | ||
132 | * | ||
133 | * The inline assembly is non-obvious. Think about it. | ||
134 | * | ||
135 | * Changed to use the same technique as rw semaphores. See | ||
136 | * semaphore.h for details. -ben | ||
137 | */ | ||
138 | |||
139 | /** | ||
140 | * read_can_lock - would read_trylock() succeed? | ||
141 | * @lock: the rwlock in question. | ||
142 | */ | ||
143 | #define __raw_read_can_lock(x) ((int)(x)->lock > 0) | ||
144 | |||
145 | /** | ||
146 | * write_can_lock - would write_trylock() succeed? | ||
147 | * @lock: the rwlock in question. | ||
148 | */ | ||
149 | #define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS) | ||
150 | |||
151 | static inline void __raw_read_lock(raw_rwlock_t *rw) | ||
152 | { | ||
153 | unsigned long tmp0, tmp1; | ||
154 | |||
155 | /* | ||
156 | * rw->lock : >0 : unlock | ||
157 | * : <=0 : lock | ||
158 | * | ||
159 | * for ( ; ; ) { | ||
160 | * rw->lock -= 1; <-- need atomic operation | ||
161 | * if (rw->lock >= 0) break; | ||
162 | * rw->lock += 1; <-- need atomic operation | ||
163 | * for ( ; rw->lock <= 0 ; ); | ||
164 | * } | ||
165 | */ | ||
166 | __asm__ __volatile__ ( | ||
167 | "# read_lock \n\t" | ||
168 | ".fillinsn \n" | ||
169 | "1: \n\t" | ||
170 | "mvfc %1, psw; \n\t" | ||
171 | "clrpsw #0x40 -> nop; \n\t" | ||
172 | DCACHE_CLEAR("%0", "r6", "%2") | ||
173 | "lock %0, @%2; \n\t" | ||
174 | "addi %0, #-1; \n\t" | ||
175 | "unlock %0, @%2; \n\t" | ||
176 | "mvtc %1, psw; \n\t" | ||
177 | "bltz %0, 2f; \n\t" | ||
178 | LOCK_SECTION_START(".balign 4 \n\t") | ||
179 | ".fillinsn \n" | ||
180 | "2: \n\t" | ||
181 | "clrpsw #0x40 -> nop; \n\t" | ||
182 | DCACHE_CLEAR("%0", "r6", "%2") | ||
183 | "lock %0, @%2; \n\t" | ||
184 | "addi %0, #1; \n\t" | ||
185 | "unlock %0, @%2; \n\t" | ||
186 | "mvtc %1, psw; \n\t" | ||
187 | ".fillinsn \n" | ||
188 | "3: \n\t" | ||
189 | "ld %0, @%2; \n\t" | ||
190 | "bgtz %0, 1b; \n\t" | ||
191 | "bra 3b; \n\t" | ||
192 | LOCK_SECTION_END | ||
193 | : "=&r" (tmp0), "=&r" (tmp1) | ||
194 | : "r" (&rw->lock) | ||
195 | : "memory" | ||
196 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
197 | , "r6" | ||
198 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
199 | ); | ||
200 | } | ||
201 | |||
202 | static inline void __raw_write_lock(raw_rwlock_t *rw) | ||
203 | { | ||
204 | unsigned long tmp0, tmp1, tmp2; | ||
205 | |||
206 | /* | ||
207 | * rw->lock : =RW_LOCK_BIAS_STR : unlock | ||
208 | * : !=RW_LOCK_BIAS_STR : lock | ||
209 | * | ||
210 | * for ( ; ; ) { | ||
211 | * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation | ||
212 | * if (rw->lock == 0) break; | ||
213 | * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation | ||
214 | * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ; | ||
215 | * } | ||
216 | */ | ||
217 | __asm__ __volatile__ ( | ||
218 | "# write_lock \n\t" | ||
219 | "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t" | ||
220 | "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t" | ||
221 | ".fillinsn \n" | ||
222 | "1: \n\t" | ||
223 | "mvfc %2, psw; \n\t" | ||
224 | "clrpsw #0x40 -> nop; \n\t" | ||
225 | DCACHE_CLEAR("%0", "r7", "%3") | ||
226 | "lock %0, @%3; \n\t" | ||
227 | "sub %0, %1; \n\t" | ||
228 | "unlock %0, @%3; \n\t" | ||
229 | "mvtc %2, psw; \n\t" | ||
230 | "bnez %0, 2f; \n\t" | ||
231 | LOCK_SECTION_START(".balign 4 \n\t") | ||
232 | ".fillinsn \n" | ||
233 | "2: \n\t" | ||
234 | "clrpsw #0x40 -> nop; \n\t" | ||
235 | DCACHE_CLEAR("%0", "r7", "%3") | ||
236 | "lock %0, @%3; \n\t" | ||
237 | "add %0, %1; \n\t" | ||
238 | "unlock %0, @%3; \n\t" | ||
239 | "mvtc %2, psw; \n\t" | ||
240 | ".fillinsn \n" | ||
241 | "3: \n\t" | ||
242 | "ld %0, @%3; \n\t" | ||
243 | "beq %0, %1, 1b; \n\t" | ||
244 | "bra 3b; \n\t" | ||
245 | LOCK_SECTION_END | ||
246 | : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) | ||
247 | : "r" (&rw->lock) | ||
248 | : "memory" | ||
249 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
250 | , "r7" | ||
251 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
252 | ); | ||
253 | } | ||
254 | |||
255 | static inline void __raw_read_unlock(raw_rwlock_t *rw) | ||
256 | { | ||
257 | unsigned long tmp0, tmp1; | ||
258 | |||
259 | __asm__ __volatile__ ( | ||
260 | "# read_unlock \n\t" | ||
261 | "mvfc %1, psw; \n\t" | ||
262 | "clrpsw #0x40 -> nop; \n\t" | ||
263 | DCACHE_CLEAR("%0", "r6", "%2") | ||
264 | "lock %0, @%2; \n\t" | ||
265 | "addi %0, #1; \n\t" | ||
266 | "unlock %0, @%2; \n\t" | ||
267 | "mvtc %1, psw; \n\t" | ||
268 | : "=&r" (tmp0), "=&r" (tmp1) | ||
269 | : "r" (&rw->lock) | ||
270 | : "memory" | ||
271 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
272 | , "r6" | ||
273 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
274 | ); | ||
275 | } | ||
276 | |||
277 | static inline void __raw_write_unlock(raw_rwlock_t *rw) | ||
278 | { | ||
279 | unsigned long tmp0, tmp1, tmp2; | ||
280 | |||
281 | __asm__ __volatile__ ( | ||
282 | "# write_unlock \n\t" | ||
283 | "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t" | ||
284 | "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t" | ||
285 | "mvfc %2, psw; \n\t" | ||
286 | "clrpsw #0x40 -> nop; \n\t" | ||
287 | DCACHE_CLEAR("%0", "r7", "%3") | ||
288 | "lock %0, @%3; \n\t" | ||
289 | "add %0, %1; \n\t" | ||
290 | "unlock %0, @%3; \n\t" | ||
291 | "mvtc %2, psw; \n\t" | ||
292 | : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) | ||
293 | : "r" (&rw->lock) | ||
294 | : "memory" | ||
295 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
296 | , "r7" | ||
297 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
298 | ); | ||
299 | } | ||
300 | |||
301 | static inline int __raw_read_trylock(raw_rwlock_t *lock) | ||
302 | { | ||
303 | atomic_t *count = (atomic_t*)lock; | ||
304 | if (atomic_dec_return(count) >= 0) | ||
305 | return 1; | ||
306 | atomic_inc(count); | ||
307 | return 0; | ||
308 | } | ||
309 | |||
310 | static inline int __raw_write_trylock(raw_rwlock_t *lock) | ||
311 | { | ||
312 | atomic_t *count = (atomic_t *)lock; | ||
313 | if (atomic_sub_and_test(RW_LOCK_BIAS, count)) | ||
314 | return 1; | ||
315 | atomic_add(RW_LOCK_BIAS, count); | ||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | #define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock) | ||
320 | #define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock) | ||
321 | |||
322 | #define _raw_spin_relax(lock) cpu_relax() | ||
323 | #define _raw_read_relax(lock) cpu_relax() | ||
324 | #define _raw_write_relax(lock) cpu_relax() | ||
325 | |||
326 | #endif /* _ASM_M32R_SPINLOCK_H */ | ||
diff --git a/include/asm-m32r/spinlock_types.h b/include/asm-m32r/spinlock_types.h deleted file mode 100644 index 83f52105c0e4..000000000000 --- a/include/asm-m32r/spinlock_types.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SPINLOCK_TYPES_H | ||
2 | #define _ASM_M32R_SPINLOCK_TYPES_H | ||
3 | |||
4 | #ifndef __LINUX_SPINLOCK_TYPES_H | ||
5 | # error "please don't include this file directly" | ||
6 | #endif | ||
7 | |||
8 | typedef struct { | ||
9 | volatile int slock; | ||
10 | } raw_spinlock_t; | ||
11 | |||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 1 } | ||
13 | |||
14 | typedef struct { | ||
15 | volatile int lock; | ||
16 | } raw_rwlock_t; | ||
17 | |||
18 | #define RW_LOCK_BIAS 0x01000000 | ||
19 | #define RW_LOCK_BIAS_STR "0x01000000" | ||
20 | |||
21 | #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } | ||
22 | |||
23 | #endif /* _ASM_M32R_SPINLOCK_TYPES_H */ | ||
diff --git a/include/asm-m32r/stat.h b/include/asm-m32r/stat.h deleted file mode 100644 index da4518f82d6d..000000000000 --- a/include/asm-m32r/stat.h +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_STAT_H | ||
2 | #define _ASM_M32R_STAT_H | ||
3 | |||
4 | #include <asm/byteorder.h> | ||
5 | |||
6 | struct __old_kernel_stat { | ||
7 | unsigned short st_dev; | ||
8 | unsigned short st_ino; | ||
9 | unsigned short st_mode; | ||
10 | unsigned short st_nlink; | ||
11 | unsigned short st_uid; | ||
12 | unsigned short st_gid; | ||
13 | unsigned short st_rdev; | ||
14 | unsigned long st_size; | ||
15 | unsigned long st_atime; | ||
16 | unsigned long st_mtime; | ||
17 | unsigned long st_ctime; | ||
18 | }; | ||
19 | |||
20 | #define STAT_HAVE_NSEC 1 | ||
21 | |||
22 | struct stat { | ||
23 | unsigned short st_dev; | ||
24 | unsigned short __pad1; | ||
25 | unsigned long st_ino; | ||
26 | unsigned short st_mode; | ||
27 | unsigned short st_nlink; | ||
28 | unsigned short st_uid; | ||
29 | unsigned short st_gid; | ||
30 | unsigned short st_rdev; | ||
31 | unsigned short __pad2; | ||
32 | unsigned long st_size; | ||
33 | unsigned long st_blksize; | ||
34 | unsigned long st_blocks; | ||
35 | unsigned long st_atime; | ||
36 | unsigned long st_atime_nsec; | ||
37 | unsigned long st_mtime; | ||
38 | unsigned long st_mtime_nsec; | ||
39 | unsigned long st_ctime; | ||
40 | unsigned long st_ctime_nsec; | ||
41 | unsigned long __unused4; | ||
42 | unsigned long __unused5; | ||
43 | }; | ||
44 | |||
45 | /* This matches struct stat64 in glibc2.1, hence the absolutely | ||
46 | * insane amounts of padding around dev_t's. | ||
47 | */ | ||
48 | struct stat64 { | ||
49 | unsigned long long st_dev; | ||
50 | unsigned char __pad0[4]; | ||
51 | #define STAT64_HAS_BROKEN_ST_INO | ||
52 | unsigned long __st_ino; | ||
53 | |||
54 | unsigned int st_mode; | ||
55 | unsigned int st_nlink; | ||
56 | |||
57 | unsigned long st_uid; | ||
58 | unsigned long st_gid; | ||
59 | |||
60 | unsigned long long st_rdev; | ||
61 | unsigned char __pad3[4]; | ||
62 | |||
63 | long long st_size; | ||
64 | unsigned long st_blksize; | ||
65 | |||
66 | #if defined(__BIG_ENDIAN) | ||
67 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
68 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
69 | #elif defined(__LITTLE_ENDIAN) | ||
70 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
71 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
72 | #else | ||
73 | #error no endian defined | ||
74 | #endif | ||
75 | unsigned long st_atime; | ||
76 | unsigned long st_atime_nsec; | ||
77 | |||
78 | unsigned long st_mtime; | ||
79 | unsigned long st_mtime_nsec; | ||
80 | |||
81 | unsigned long st_ctime; | ||
82 | unsigned long st_ctime_nsec; | ||
83 | |||
84 | unsigned long long st_ino; | ||
85 | }; | ||
86 | |||
87 | #endif /* _ASM_M32R_STAT_H */ | ||
diff --git a/include/asm-m32r/statfs.h b/include/asm-m32r/statfs.h deleted file mode 100644 index 6eb4c6007e6b..000000000000 --- a/include/asm-m32r/statfs.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_STATFS_H | ||
2 | #define _ASM_M32R_STATFS_H | ||
3 | |||
4 | #include <asm-generic/statfs.h> | ||
5 | |||
6 | #endif /* _ASM_M32R_STATFS_H */ | ||
diff --git a/include/asm-m32r/string.h b/include/asm-m32r/string.h deleted file mode 100644 index e61e2b0bfc1f..000000000000 --- a/include/asm-m32r/string.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_STRING_H | ||
2 | #define _ASM_M32R_STRING_H | ||
3 | |||
4 | #define __HAVE_ARCH_STRLEN | ||
5 | extern size_t strlen(const char * s); | ||
6 | |||
7 | #define __HAVE_ARCH_MEMCPY | ||
8 | extern void *memcpy(void *__to, __const__ void *__from, size_t __n); | ||
9 | |||
10 | #define __HAVE_ARCH_MEMSET | ||
11 | extern void *memset(void *__s, int __c, size_t __count); | ||
12 | |||
13 | #endif /* _ASM_M32R_STRING_H */ | ||
diff --git a/include/asm-m32r/swab.h b/include/asm-m32r/swab.h deleted file mode 100644 index 54dab001d6d1..000000000000 --- a/include/asm-m32r/swab.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SWAB_H | ||
2 | #define _ASM_M32R_SWAB_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
7 | # define __SWAB_64_THRU_32__ | ||
8 | #endif | ||
9 | |||
10 | #endif /* _ASM_M32R_SWAB_H */ | ||
diff --git a/include/asm-m32r/syscall.h b/include/asm-m32r/syscall.h deleted file mode 100644 index 25f316f2b78d..000000000000 --- a/include/asm-m32r/syscall.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SYSCALL_H | ||
2 | #define _ASM_M32R_SYSCALL_H | ||
3 | |||
4 | /* Definitions for the system call vector. */ | ||
5 | #define SYSCALL_VECTOR "2" | ||
6 | #define SYSCALL_VECTOR_ADDRESS "0xa0" | ||
7 | |||
8 | #endif /* _ASM_M32R_SYSCALL_H */ | ||
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h deleted file mode 100644 index c980f5ba8de7..000000000000 --- a/include/asm-m32r/system.h +++ /dev/null | |||
@@ -1,431 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_SYSTEM_H | ||
2 | #define _ASM_M32R_SYSTEM_H | ||
3 | |||
4 | /* | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
10 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
11 | */ | ||
12 | |||
13 | #include <linux/compiler.h> | ||
14 | #include <asm/assembler.h> | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | |||
18 | /* | ||
19 | * switch_to(prev, next) should switch from task `prev' to `next' | ||
20 | * `prev' will never be the same as `next'. | ||
21 | * | ||
22 | * `next' and `prev' should be struct task_struct, but it isn't always defined | ||
23 | */ | ||
24 | |||
25 | #if defined(CONFIG_FRAME_POINTER) || \ | ||
26 | !defined(CONFIG_SCHED_OMIT_FRAME_POINTER) | ||
27 | #define M32R_PUSH_FP " push fp\n" | ||
28 | #define M32R_POP_FP " pop fp\n" | ||
29 | #else | ||
30 | #define M32R_PUSH_FP "" | ||
31 | #define M32R_POP_FP "" | ||
32 | #endif | ||
33 | |||
34 | #define switch_to(prev, next, last) do { \ | ||
35 | __asm__ __volatile__ ( \ | ||
36 | " seth lr, #high(1f) \n" \ | ||
37 | " or3 lr, lr, #low(1f) \n" \ | ||
38 | " st lr, @%4 ; store old LR \n" \ | ||
39 | " ld lr, @%5 ; load new LR \n" \ | ||
40 | M32R_PUSH_FP \ | ||
41 | " st sp, @%2 ; store old SP \n" \ | ||
42 | " ld sp, @%3 ; load new SP \n" \ | ||
43 | " push %1 ; store `prev' on new stack \n" \ | ||
44 | " jmp lr \n" \ | ||
45 | " .fillinsn \n" \ | ||
46 | "1: \n" \ | ||
47 | " pop %0 ; restore `__last' from new stack \n" \ | ||
48 | M32R_POP_FP \ | ||
49 | : "=r" (last) \ | ||
50 | : "0" (prev), \ | ||
51 | "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \ | ||
52 | "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \ | ||
53 | : "memory", "lr" \ | ||
54 | ); \ | ||
55 | } while(0) | ||
56 | |||
57 | /* Interrupt Control */ | ||
58 | #if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104) | ||
59 | #define local_irq_enable() \ | ||
60 | __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory") | ||
61 | #define local_irq_disable() \ | ||
62 | __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory") | ||
63 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
64 | static inline void local_irq_enable(void) | ||
65 | { | ||
66 | unsigned long tmpreg; | ||
67 | __asm__ __volatile__( | ||
68 | "mvfc %0, psw; \n\t" | ||
69 | "or3 %0, %0, #0x0040; \n\t" | ||
70 | "mvtc %0, psw; \n\t" | ||
71 | : "=&r" (tmpreg) : : "cbit", "memory"); | ||
72 | } | ||
73 | |||
74 | static inline void local_irq_disable(void) | ||
75 | { | ||
76 | unsigned long tmpreg0, tmpreg1; | ||
77 | __asm__ __volatile__( | ||
78 | "ld24 %0, #0 ; Use 32-bit insn. \n\t" | ||
79 | "mvfc %1, psw ; No interrupt can be accepted here. \n\t" | ||
80 | "mvtc %0, psw \n\t" | ||
81 | "and3 %0, %1, #0xffbf \n\t" | ||
82 | "mvtc %0, psw \n\t" | ||
83 | : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory"); | ||
84 | } | ||
85 | #endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
86 | |||
87 | #define local_save_flags(x) \ | ||
88 | __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */) | ||
89 | |||
90 | #define local_irq_restore(x) \ | ||
91 | __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \ | ||
92 | : "r" (x) : "cbit", "memory") | ||
93 | |||
94 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
95 | #define local_irq_save(x) \ | ||
96 | __asm__ __volatile__( \ | ||
97 | "mvfc %0, psw; \n\t" \ | ||
98 | "clrpsw #0x40 -> nop; \n\t" \ | ||
99 | : "=r" (x) : /* no input */ : "memory") | ||
100 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
101 | #define local_irq_save(x) \ | ||
102 | ({ \ | ||
103 | unsigned long tmpreg; \ | ||
104 | __asm__ __volatile__( \ | ||
105 | "ld24 %1, #0 \n\t" \ | ||
106 | "mvfc %0, psw \n\t" \ | ||
107 | "mvtc %1, psw \n\t" \ | ||
108 | "and3 %1, %0, #0xffbf \n\t" \ | ||
109 | "mvtc %1, psw \n\t" \ | ||
110 | : "=r" (x), "=&r" (tmpreg) \ | ||
111 | : : "cbit", "memory"); \ | ||
112 | }) | ||
113 | #endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
114 | |||
115 | #define irqs_disabled() \ | ||
116 | ({ \ | ||
117 | unsigned long flags; \ | ||
118 | local_save_flags(flags); \ | ||
119 | !(flags & 0x40); \ | ||
120 | }) | ||
121 | |||
122 | #define nop() __asm__ __volatile__ ("nop" : : ) | ||
123 | |||
124 | #define xchg(ptr, x) \ | ||
125 | ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) | ||
126 | #define xchg_local(ptr, x) \ | ||
127 | ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \ | ||
128 | sizeof(*(ptr)))) | ||
129 | |||
130 | extern void __xchg_called_with_bad_pointer(void); | ||
131 | |||
132 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
133 | #define DCACHE_CLEAR(reg0, reg1, addr) \ | ||
134 | "seth "reg1", #high(dcache_dummy); \n\t" \ | ||
135 | "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \ | ||
136 | "lock "reg0", @"reg1"; \n\t" \ | ||
137 | "add3 "reg0", "addr", #0x1000; \n\t" \ | ||
138 | "ld "reg0", @"reg0"; \n\t" \ | ||
139 | "add3 "reg0", "addr", #0x2000; \n\t" \ | ||
140 | "ld "reg0", @"reg0"; \n\t" \ | ||
141 | "unlock "reg0", @"reg1"; \n\t" | ||
142 | /* FIXME: This workaround code cannot handle kernel modules | ||
143 | * correctly under SMP environment. | ||
144 | */ | ||
145 | #else /* CONFIG_CHIP_M32700_TS1 */ | ||
146 | #define DCACHE_CLEAR(reg0, reg1, addr) | ||
147 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
148 | |||
149 | static __always_inline unsigned long | ||
150 | __xchg(unsigned long x, volatile void *ptr, int size) | ||
151 | { | ||
152 | unsigned long flags; | ||
153 | unsigned long tmp = 0; | ||
154 | |||
155 | local_irq_save(flags); | ||
156 | |||
157 | switch (size) { | ||
158 | #ifndef CONFIG_SMP | ||
159 | case 1: | ||
160 | __asm__ __volatile__ ( | ||
161 | "ldb %0, @%2 \n\t" | ||
162 | "stb %1, @%2 \n\t" | ||
163 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
164 | break; | ||
165 | case 2: | ||
166 | __asm__ __volatile__ ( | ||
167 | "ldh %0, @%2 \n\t" | ||
168 | "sth %1, @%2 \n\t" | ||
169 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
170 | break; | ||
171 | case 4: | ||
172 | __asm__ __volatile__ ( | ||
173 | "ld %0, @%2 \n\t" | ||
174 | "st %1, @%2 \n\t" | ||
175 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
176 | break; | ||
177 | #else /* CONFIG_SMP */ | ||
178 | case 4: | ||
179 | __asm__ __volatile__ ( | ||
180 | DCACHE_CLEAR("%0", "r4", "%2") | ||
181 | "lock %0, @%2; \n\t" | ||
182 | "unlock %1, @%2; \n\t" | ||
183 | : "=&r" (tmp) : "r" (x), "r" (ptr) | ||
184 | : "memory" | ||
185 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
186 | , "r4" | ||
187 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
188 | ); | ||
189 | break; | ||
190 | #endif /* CONFIG_SMP */ | ||
191 | default: | ||
192 | __xchg_called_with_bad_pointer(); | ||
193 | } | ||
194 | |||
195 | local_irq_restore(flags); | ||
196 | |||
197 | return (tmp); | ||
198 | } | ||
199 | |||
200 | static __always_inline unsigned long | ||
201 | __xchg_local(unsigned long x, volatile void *ptr, int size) | ||
202 | { | ||
203 | unsigned long flags; | ||
204 | unsigned long tmp = 0; | ||
205 | |||
206 | local_irq_save(flags); | ||
207 | |||
208 | switch (size) { | ||
209 | case 1: | ||
210 | __asm__ __volatile__ ( | ||
211 | "ldb %0, @%2 \n\t" | ||
212 | "stb %1, @%2 \n\t" | ||
213 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
214 | break; | ||
215 | case 2: | ||
216 | __asm__ __volatile__ ( | ||
217 | "ldh %0, @%2 \n\t" | ||
218 | "sth %1, @%2 \n\t" | ||
219 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
220 | break; | ||
221 | case 4: | ||
222 | __asm__ __volatile__ ( | ||
223 | "ld %0, @%2 \n\t" | ||
224 | "st %1, @%2 \n\t" | ||
225 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
226 | break; | ||
227 | default: | ||
228 | __xchg_called_with_bad_pointer(); | ||
229 | } | ||
230 | |||
231 | local_irq_restore(flags); | ||
232 | |||
233 | return (tmp); | ||
234 | } | ||
235 | |||
236 | #define __HAVE_ARCH_CMPXCHG 1 | ||
237 | |||
238 | static inline unsigned long | ||
239 | __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new) | ||
240 | { | ||
241 | unsigned long flags; | ||
242 | unsigned int retval; | ||
243 | |||
244 | local_irq_save(flags); | ||
245 | __asm__ __volatile__ ( | ||
246 | DCACHE_CLEAR("%0", "r4", "%1") | ||
247 | M32R_LOCK" %0, @%1; \n" | ||
248 | " bne %0, %2, 1f; \n" | ||
249 | M32R_UNLOCK" %3, @%1; \n" | ||
250 | " bra 2f; \n" | ||
251 | " .fillinsn \n" | ||
252 | "1:" | ||
253 | M32R_UNLOCK" %0, @%1; \n" | ||
254 | " .fillinsn \n" | ||
255 | "2:" | ||
256 | : "=&r" (retval) | ||
257 | : "r" (p), "r" (old), "r" (new) | ||
258 | : "cbit", "memory" | ||
259 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
260 | , "r4" | ||
261 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
262 | ); | ||
263 | local_irq_restore(flags); | ||
264 | |||
265 | return retval; | ||
266 | } | ||
267 | |||
268 | static inline unsigned long | ||
269 | __cmpxchg_local_u32(volatile unsigned int *p, unsigned int old, | ||
270 | unsigned int new) | ||
271 | { | ||
272 | unsigned long flags; | ||
273 | unsigned int retval; | ||
274 | |||
275 | local_irq_save(flags); | ||
276 | __asm__ __volatile__ ( | ||
277 | DCACHE_CLEAR("%0", "r4", "%1") | ||
278 | "ld %0, @%1; \n" | ||
279 | " bne %0, %2, 1f; \n" | ||
280 | "st %3, @%1; \n" | ||
281 | " bra 2f; \n" | ||
282 | " .fillinsn \n" | ||
283 | "1:" | ||
284 | "st %0, @%1; \n" | ||
285 | " .fillinsn \n" | ||
286 | "2:" | ||
287 | : "=&r" (retval) | ||
288 | : "r" (p), "r" (old), "r" (new) | ||
289 | : "cbit", "memory" | ||
290 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
291 | , "r4" | ||
292 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
293 | ); | ||
294 | local_irq_restore(flags); | ||
295 | |||
296 | return retval; | ||
297 | } | ||
298 | |||
299 | /* This function doesn't exist, so you'll get a linker error | ||
300 | if something tries to do an invalid cmpxchg(). */ | ||
301 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
302 | |||
303 | static inline unsigned long | ||
304 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) | ||
305 | { | ||
306 | switch (size) { | ||
307 | case 4: | ||
308 | return __cmpxchg_u32(ptr, old, new); | ||
309 | #if 0 /* we don't have __cmpxchg_u64 */ | ||
310 | case 8: | ||
311 | return __cmpxchg_u64(ptr, old, new); | ||
312 | #endif /* 0 */ | ||
313 | } | ||
314 | __cmpxchg_called_with_bad_pointer(); | ||
315 | return old; | ||
316 | } | ||
317 | |||
318 | #define cmpxchg(ptr, o, n) \ | ||
319 | ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \ | ||
320 | (unsigned long)(n), sizeof(*(ptr)))) | ||
321 | |||
322 | #include <asm-generic/cmpxchg-local.h> | ||
323 | |||
324 | static inline unsigned long __cmpxchg_local(volatile void *ptr, | ||
325 | unsigned long old, | ||
326 | unsigned long new, int size) | ||
327 | { | ||
328 | switch (size) { | ||
329 | case 4: | ||
330 | return __cmpxchg_local_u32(ptr, old, new); | ||
331 | default: | ||
332 | return __cmpxchg_local_generic(ptr, old, new, size); | ||
333 | } | ||
334 | |||
335 | return old; | ||
336 | } | ||
337 | |||
338 | /* | ||
339 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make | ||
340 | * them available. | ||
341 | */ | ||
342 | #define cmpxchg_local(ptr, o, n) \ | ||
343 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ | ||
344 | (unsigned long)(n), sizeof(*(ptr)))) | ||
345 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
346 | |||
347 | #endif /* __KERNEL__ */ | ||
348 | |||
349 | /* | ||
350 | * Memory barrier. | ||
351 | * | ||
352 | * mb() prevents loads and stores being reordered across this point. | ||
353 | * rmb() prevents loads being reordered across this point. | ||
354 | * wmb() prevents stores being reordered across this point. | ||
355 | */ | ||
356 | #define mb() barrier() | ||
357 | #define rmb() mb() | ||
358 | #define wmb() mb() | ||
359 | |||
360 | /** | ||
361 | * read_barrier_depends - Flush all pending reads that subsequents reads | ||
362 | * depend on. | ||
363 | * | ||
364 | * No data-dependent reads from memory-like regions are ever reordered | ||
365 | * over this barrier. All reads preceding this primitive are guaranteed | ||
366 | * to access memory (but not necessarily other CPUs' caches) before any | ||
367 | * reads following this primitive that depend on the data return by | ||
368 | * any of the preceding reads. This primitive is much lighter weight than | ||
369 | * rmb() on most CPUs, and is never heavier weight than is | ||
370 | * rmb(). | ||
371 | * | ||
372 | * These ordering constraints are respected by both the local CPU | ||
373 | * and the compiler. | ||
374 | * | ||
375 | * Ordering is not guaranteed by anything other than these primitives, | ||
376 | * not even by data dependencies. See the documentation for | ||
377 | * memory_barrier() for examples and URLs to more information. | ||
378 | * | ||
379 | * For example, the following code would force ordering (the initial | ||
380 | * value of "a" is zero, "b" is one, and "p" is "&a"): | ||
381 | * | ||
382 | * <programlisting> | ||
383 | * CPU 0 CPU 1 | ||
384 | * | ||
385 | * b = 2; | ||
386 | * memory_barrier(); | ||
387 | * p = &b; q = p; | ||
388 | * read_barrier_depends(); | ||
389 | * d = *q; | ||
390 | * </programlisting> | ||
391 | * | ||
392 | * | ||
393 | * because the read of "*q" depends on the read of "p" and these | ||
394 | * two reads are separated by a read_barrier_depends(). However, | ||
395 | * the following code, with the same initial values for "a" and "b": | ||
396 | * | ||
397 | * <programlisting> | ||
398 | * CPU 0 CPU 1 | ||
399 | * | ||
400 | * a = 2; | ||
401 | * memory_barrier(); | ||
402 | * b = 3; y = b; | ||
403 | * read_barrier_depends(); | ||
404 | * x = a; | ||
405 | * </programlisting> | ||
406 | * | ||
407 | * does not enforce ordering, since there is no data dependency between | ||
408 | * the read of "a" and the read of "b". Therefore, on some CPUs, such | ||
409 | * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() | ||
410 | * in cases like this where there are no data dependencies. | ||
411 | **/ | ||
412 | |||
413 | #define read_barrier_depends() do { } while (0) | ||
414 | |||
415 | #ifdef CONFIG_SMP | ||
416 | #define smp_mb() mb() | ||
417 | #define smp_rmb() rmb() | ||
418 | #define smp_wmb() wmb() | ||
419 | #define smp_read_barrier_depends() read_barrier_depends() | ||
420 | #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) | ||
421 | #else | ||
422 | #define smp_mb() barrier() | ||
423 | #define smp_rmb() barrier() | ||
424 | #define smp_wmb() barrier() | ||
425 | #define smp_read_barrier_depends() do { } while (0) | ||
426 | #define set_mb(var, value) do { var = value; barrier(); } while (0) | ||
427 | #endif | ||
428 | |||
429 | #define arch_align_stack(x) (x) | ||
430 | |||
431 | #endif /* _ASM_M32R_SYSTEM_H */ | ||
diff --git a/include/asm-m32r/termbits.h b/include/asm-m32r/termbits.h deleted file mode 100644 index bc104008b55b..000000000000 --- a/include/asm-m32r/termbits.h +++ /dev/null | |||
@@ -1,199 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_TERMBITS_H | ||
2 | #define _ASM_M32R_TERMBITS_H | ||
3 | |||
4 | #include <linux/posix_types.h> | ||
5 | |||
6 | typedef unsigned char cc_t; | ||
7 | typedef unsigned int speed_t; | ||
8 | typedef unsigned int tcflag_t; | ||
9 | |||
10 | #define NCCS 19 | ||
11 | struct termios { | ||
12 | tcflag_t c_iflag; /* input mode flags */ | ||
13 | tcflag_t c_oflag; /* output mode flags */ | ||
14 | tcflag_t c_cflag; /* control mode flags */ | ||
15 | tcflag_t c_lflag; /* local mode flags */ | ||
16 | cc_t c_line; /* line discipline */ | ||
17 | cc_t c_cc[NCCS]; /* control characters */ | ||
18 | }; | ||
19 | |||
20 | struct termios2 { | ||
21 | tcflag_t c_iflag; /* input mode flags */ | ||
22 | tcflag_t c_oflag; /* output mode flags */ | ||
23 | tcflag_t c_cflag; /* control mode flags */ | ||
24 | tcflag_t c_lflag; /* local mode flags */ | ||
25 | cc_t c_line; /* line discipline */ | ||
26 | cc_t c_cc[NCCS]; /* control characters */ | ||
27 | speed_t c_ispeed; /* input speed */ | ||
28 | speed_t c_ospeed; /* output speed */ | ||
29 | }; | ||
30 | |||
31 | struct ktermios { | ||
32 | tcflag_t c_iflag; /* input mode flags */ | ||
33 | tcflag_t c_oflag; /* output mode flags */ | ||
34 | tcflag_t c_cflag; /* control mode flags */ | ||
35 | tcflag_t c_lflag; /* local mode flags */ | ||
36 | cc_t c_line; /* line discipline */ | ||
37 | cc_t c_cc[NCCS]; /* control characters */ | ||
38 | speed_t c_ispeed; /* input speed */ | ||
39 | speed_t c_ospeed; /* output speed */ | ||
40 | }; | ||
41 | |||
42 | /* c_cc characters */ | ||
43 | #define VINTR 0 | ||
44 | #define VQUIT 1 | ||
45 | #define VERASE 2 | ||
46 | #define VKILL 3 | ||
47 | #define VEOF 4 | ||
48 | #define VTIME 5 | ||
49 | #define VMIN 6 | ||
50 | #define VSWTC 7 | ||
51 | #define VSTART 8 | ||
52 | #define VSTOP 9 | ||
53 | #define VSUSP 10 | ||
54 | #define VEOL 11 | ||
55 | #define VREPRINT 12 | ||
56 | #define VDISCARD 13 | ||
57 | #define VWERASE 14 | ||
58 | #define VLNEXT 15 | ||
59 | #define VEOL2 16 | ||
60 | |||
61 | /* c_iflag bits */ | ||
62 | #define IGNBRK 0000001 | ||
63 | #define BRKINT 0000002 | ||
64 | #define IGNPAR 0000004 | ||
65 | #define PARMRK 0000010 | ||
66 | #define INPCK 0000020 | ||
67 | #define ISTRIP 0000040 | ||
68 | #define INLCR 0000100 | ||
69 | #define IGNCR 0000200 | ||
70 | #define ICRNL 0000400 | ||
71 | #define IUCLC 0001000 | ||
72 | #define IXON 0002000 | ||
73 | #define IXANY 0004000 | ||
74 | #define IXOFF 0010000 | ||
75 | #define IMAXBEL 0020000 | ||
76 | #define IUTF8 0040000 | ||
77 | |||
78 | /* c_oflag bits */ | ||
79 | #define OPOST 0000001 | ||
80 | #define OLCUC 0000002 | ||
81 | #define ONLCR 0000004 | ||
82 | #define OCRNL 0000010 | ||
83 | #define ONOCR 0000020 | ||
84 | #define ONLRET 0000040 | ||
85 | #define OFILL 0000100 | ||
86 | #define OFDEL 0000200 | ||
87 | #define NLDLY 0000400 | ||
88 | #define NL0 0000000 | ||
89 | #define NL1 0000400 | ||
90 | #define CRDLY 0003000 | ||
91 | #define CR0 0000000 | ||
92 | #define CR1 0001000 | ||
93 | #define CR2 0002000 | ||
94 | #define CR3 0003000 | ||
95 | #define TABDLY 0014000 | ||
96 | #define TAB0 0000000 | ||
97 | #define TAB1 0004000 | ||
98 | #define TAB2 0010000 | ||
99 | #define TAB3 0014000 | ||
100 | #define XTABS 0014000 | ||
101 | #define BSDLY 0020000 | ||
102 | #define BS0 0000000 | ||
103 | #define BS1 0020000 | ||
104 | #define VTDLY 0040000 | ||
105 | #define VT0 0000000 | ||
106 | #define VT1 0040000 | ||
107 | #define FFDLY 0100000 | ||
108 | #define FF0 0000000 | ||
109 | #define FF1 0100000 | ||
110 | |||
111 | /* c_cflag bit meaning */ | ||
112 | #define CBAUD 0010017 | ||
113 | #define B0 0000000 /* hang up */ | ||
114 | #define B50 0000001 | ||
115 | #define B75 0000002 | ||
116 | #define B110 0000003 | ||
117 | #define B134 0000004 | ||
118 | #define B150 0000005 | ||
119 | #define B200 0000006 | ||
120 | #define B300 0000007 | ||
121 | #define B600 0000010 | ||
122 | #define B1200 0000011 | ||
123 | #define B1800 0000012 | ||
124 | #define B2400 0000013 | ||
125 | #define B4800 0000014 | ||
126 | #define B9600 0000015 | ||
127 | #define B19200 0000016 | ||
128 | #define B38400 0000017 | ||
129 | #define EXTA B19200 | ||
130 | #define EXTB B38400 | ||
131 | #define CSIZE 0000060 | ||
132 | #define CS5 0000000 | ||
133 | #define CS6 0000020 | ||
134 | #define CS7 0000040 | ||
135 | #define CS8 0000060 | ||
136 | #define CSTOPB 0000100 | ||
137 | #define CREAD 0000200 | ||
138 | #define PARENB 0000400 | ||
139 | #define PARODD 0001000 | ||
140 | #define HUPCL 0002000 | ||
141 | #define CLOCAL 0004000 | ||
142 | #define CBAUDEX 0010000 | ||
143 | #define BOTHER 0010000 | ||
144 | #define B57600 0010001 | ||
145 | #define B115200 0010002 | ||
146 | #define B230400 0010003 | ||
147 | #define B460800 0010004 | ||
148 | #define B500000 0010005 | ||
149 | #define B576000 0010006 | ||
150 | #define B921600 0010007 | ||
151 | #define B1000000 0010010 | ||
152 | #define B1152000 0010011 | ||
153 | #define B1500000 0010012 | ||
154 | #define B2000000 0010013 | ||
155 | #define B2500000 0010014 | ||
156 | #define B3000000 0010015 | ||
157 | #define B3500000 0010016 | ||
158 | #define B4000000 0010017 | ||
159 | #define CIBAUD 002003600000 /** input baud rate */ | ||
160 | #define CTVB 004000000000 /* VisioBraille Terminal flow control */ | ||
161 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
162 | #define CRTSCTS 020000000000 /* flow control */ | ||
163 | |||
164 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
165 | |||
166 | /* c_lflag bits */ | ||
167 | #define ISIG 0000001 | ||
168 | #define ICANON 0000002 | ||
169 | #define XCASE 0000004 | ||
170 | #define ECHO 0000010 | ||
171 | #define ECHOE 0000020 | ||
172 | #define ECHOK 0000040 | ||
173 | #define ECHONL 0000100 | ||
174 | #define NOFLSH 0000200 | ||
175 | #define TOSTOP 0000400 | ||
176 | #define ECHOCTL 0001000 | ||
177 | #define ECHOPRT 0002000 | ||
178 | #define ECHOKE 0004000 | ||
179 | #define FLUSHO 0010000 | ||
180 | #define PENDIN 0040000 | ||
181 | #define IEXTEN 0100000 | ||
182 | |||
183 | /* tcflow() and TCXONC use these */ | ||
184 | #define TCOOFF 0 | ||
185 | #define TCOON 1 | ||
186 | #define TCIOFF 2 | ||
187 | #define TCION 3 | ||
188 | |||
189 | /* tcflush() and TCFLSH use these */ | ||
190 | #define TCIFLUSH 0 | ||
191 | #define TCOFLUSH 1 | ||
192 | #define TCIOFLUSH 2 | ||
193 | |||
194 | /* tcsetattr uses these */ | ||
195 | #define TCSANOW 0 | ||
196 | #define TCSADRAIN 1 | ||
197 | #define TCSAFLUSH 2 | ||
198 | |||
199 | #endif /* _ASM_M32R_TERMBITS_H */ | ||
diff --git a/include/asm-m32r/termios.h b/include/asm-m32r/termios.h deleted file mode 100644 index 93ce79fd342a..000000000000 --- a/include/asm-m32r/termios.h +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | #ifndef _M32R_TERMIOS_H | ||
2 | #define _M32R_TERMIOS_H | ||
3 | |||
4 | #include <asm/termbits.h> | ||
5 | #include <asm/ioctls.h> | ||
6 | |||
7 | struct winsize { | ||
8 | unsigned short ws_row; | ||
9 | unsigned short ws_col; | ||
10 | unsigned short ws_xpixel; | ||
11 | unsigned short ws_ypixel; | ||
12 | }; | ||
13 | |||
14 | #define NCC 8 | ||
15 | struct termio { | ||
16 | unsigned short c_iflag; /* input mode flags */ | ||
17 | unsigned short c_oflag; /* output mode flags */ | ||
18 | unsigned short c_cflag; /* control mode flags */ | ||
19 | unsigned short c_lflag; /* local mode flags */ | ||
20 | unsigned char c_line; /* line discipline */ | ||
21 | unsigned char c_cc[NCC]; /* control characters */ | ||
22 | }; | ||
23 | |||
24 | /* modem lines */ | ||
25 | #define TIOCM_LE 0x001 | ||
26 | #define TIOCM_DTR 0x002 | ||
27 | #define TIOCM_RTS 0x004 | ||
28 | #define TIOCM_ST 0x008 | ||
29 | #define TIOCM_SR 0x010 | ||
30 | #define TIOCM_CTS 0x020 | ||
31 | #define TIOCM_CAR 0x040 | ||
32 | #define TIOCM_RNG 0x080 | ||
33 | #define TIOCM_DSR 0x100 | ||
34 | #define TIOCM_CD TIOCM_CAR | ||
35 | #define TIOCM_RI TIOCM_RNG | ||
36 | #define TIOCM_OUT1 0x2000 | ||
37 | #define TIOCM_OUT2 0x4000 | ||
38 | #define TIOCM_LOOP 0x8000 | ||
39 | |||
40 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
41 | |||
42 | #ifdef __KERNEL__ | ||
43 | #include <linux/module.h> | ||
44 | |||
45 | /* intr=^C quit=^\ erase=del kill=^U | ||
46 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
47 | start=^Q stop=^S susp=^Z eol=\0 | ||
48 | reprint=^R discard=^U werase=^W lnext=^V | ||
49 | eol2=\0 | ||
50 | */ | ||
51 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
52 | |||
53 | /* | ||
54 | * Translate a "termio" structure into a "termios". Ugh. | ||
55 | */ | ||
56 | #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ | ||
57 | unsigned short __tmp; \ | ||
58 | get_user(__tmp,&(termio)->x); \ | ||
59 | *(unsigned short *) &(termios)->x = __tmp; \ | ||
60 | } | ||
61 | |||
62 | #define user_termio_to_kernel_termios(termios, termio) \ | ||
63 | ({ \ | ||
64 | SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ | ||
65 | SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ | ||
66 | SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ | ||
67 | SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ | ||
68 | copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ | ||
69 | }) | ||
70 | |||
71 | /* | ||
72 | * Translate a "termios" structure into a "termio". Ugh. | ||
73 | */ | ||
74 | #define kernel_termios_to_user_termio(termio, termios) \ | ||
75 | ({ \ | ||
76 | put_user((termios)->c_iflag, &(termio)->c_iflag); \ | ||
77 | put_user((termios)->c_oflag, &(termio)->c_oflag); \ | ||
78 | put_user((termios)->c_cflag, &(termio)->c_cflag); \ | ||
79 | put_user((termios)->c_lflag, &(termio)->c_lflag); \ | ||
80 | put_user((termios)->c_line, &(termio)->c_line); \ | ||
81 | copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ | ||
82 | }) | ||
83 | |||
84 | #define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) | ||
85 | #define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) | ||
86 | #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) | ||
87 | #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) | ||
88 | |||
89 | #endif /* __KERNEL__ */ | ||
90 | |||
91 | #endif /* _M32R_TERMIOS_H */ | ||
diff --git a/include/asm-m32r/thread_info.h b/include/asm-m32r/thread_info.h deleted file mode 100644 index 8589d462df27..000000000000 --- a/include/asm-m32r/thread_info.h +++ /dev/null | |||
@@ -1,184 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_THREAD_INFO_H | ||
2 | #define _ASM_M32R_THREAD_INFO_H | ||
3 | |||
4 | /* thread_info.h: m32r low-level thread information | ||
5 | * | ||
6 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
7 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
8 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
9 | */ | ||
10 | |||
11 | #ifdef __KERNEL__ | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | #include <asm/processor.h> | ||
15 | #endif | ||
16 | |||
17 | /* | ||
18 | * low level task data that entry.S needs immediate access to | ||
19 | * - this struct should fit entirely inside of one cache line | ||
20 | * - this struct shares the supervisor stack pages | ||
21 | * - if the contents of this structure are changed, the assembly constants must also be changed | ||
22 | */ | ||
23 | #ifndef __ASSEMBLY__ | ||
24 | |||
25 | struct thread_info { | ||
26 | struct task_struct *task; /* main task structure */ | ||
27 | struct exec_domain *exec_domain; /* execution domain */ | ||
28 | unsigned long flags; /* low level flags */ | ||
29 | unsigned long status; /* thread-synchronous flags */ | ||
30 | __u32 cpu; /* current CPU */ | ||
31 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
32 | |||
33 | mm_segment_t addr_limit; /* thread address space: | ||
34 | 0-0xBFFFFFFF for user-thread | ||
35 | 0-0xFFFFFFFF for kernel-thread | ||
36 | */ | ||
37 | struct restart_block restart_block; | ||
38 | |||
39 | __u8 supervisor_stack[0]; | ||
40 | }; | ||
41 | |||
42 | #else /* !__ASSEMBLY__ */ | ||
43 | |||
44 | /* offsets into the thread_info struct for assembly code access */ | ||
45 | #define TI_TASK 0x00000000 | ||
46 | #define TI_EXEC_DOMAIN 0x00000004 | ||
47 | #define TI_FLAGS 0x00000008 | ||
48 | #define TI_STATUS 0x0000000C | ||
49 | #define TI_CPU 0x00000010 | ||
50 | #define TI_PRE_COUNT 0x00000014 | ||
51 | #define TI_ADDR_LIMIT 0x00000018 | ||
52 | #define TI_RESTART_BLOCK 0x000001C | ||
53 | |||
54 | #endif | ||
55 | |||
56 | #define PREEMPT_ACTIVE 0x10000000 | ||
57 | |||
58 | /* | ||
59 | * macros/functions for gaining access to the thread information structure | ||
60 | * | ||
61 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
62 | */ | ||
63 | #ifndef __ASSEMBLY__ | ||
64 | |||
65 | #define INIT_THREAD_INFO(tsk) \ | ||
66 | { \ | ||
67 | .task = &tsk, \ | ||
68 | .exec_domain = &default_exec_domain, \ | ||
69 | .flags = 0, \ | ||
70 | .cpu = 0, \ | ||
71 | .preempt_count = 1, \ | ||
72 | .addr_limit = KERNEL_DS, \ | ||
73 | .restart_block = { \ | ||
74 | .fn = do_no_restart_syscall, \ | ||
75 | }, \ | ||
76 | } | ||
77 | |||
78 | #define init_thread_info (init_thread_union.thread_info) | ||
79 | #define init_stack (init_thread_union.stack) | ||
80 | |||
81 | #define THREAD_SIZE (2*PAGE_SIZE) | ||
82 | |||
83 | /* how to get the thread information struct from C */ | ||
84 | static inline struct thread_info *current_thread_info(void) | ||
85 | { | ||
86 | struct thread_info *ti; | ||
87 | |||
88 | __asm__ __volatile__ ( | ||
89 | "ldi %0, #%1 \n\t" | ||
90 | "and %0, sp \n\t" | ||
91 | : "=r" (ti) : "i" (~(THREAD_SIZE - 1)) | ||
92 | ); | ||
93 | |||
94 | return ti; | ||
95 | } | ||
96 | |||
97 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR | ||
98 | |||
99 | /* thread information allocation */ | ||
100 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
101 | #define alloc_thread_info(tsk) \ | ||
102 | ({ \ | ||
103 | struct thread_info *ret; \ | ||
104 | \ | ||
105 | ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \ | ||
106 | \ | ||
107 | ret; \ | ||
108 | }) | ||
109 | #else | ||
110 | #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) | ||
111 | #endif | ||
112 | |||
113 | #define free_thread_info(info) kfree(info) | ||
114 | |||
115 | #define TI_FLAG_FAULT_CODE_SHIFT 28 | ||
116 | |||
117 | static inline void set_thread_fault_code(unsigned int val) | ||
118 | { | ||
119 | struct thread_info *ti = current_thread_info(); | ||
120 | ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT))) | ||
121 | | (val << TI_FLAG_FAULT_CODE_SHIFT); | ||
122 | } | ||
123 | |||
124 | static inline unsigned int get_thread_fault_code(void) | ||
125 | { | ||
126 | struct thread_info *ti = current_thread_info(); | ||
127 | return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT; | ||
128 | } | ||
129 | |||
130 | #else /* !__ASSEMBLY__ */ | ||
131 | |||
132 | #define THREAD_SIZE 8192 | ||
133 | |||
134 | /* how to get the thread information struct from ASM */ | ||
135 | #define GET_THREAD_INFO(reg) GET_THREAD_INFO reg | ||
136 | .macro GET_THREAD_INFO reg | ||
137 | ldi \reg, #-THREAD_SIZE | ||
138 | and \reg, sp | ||
139 | .endm | ||
140 | |||
141 | #endif | ||
142 | |||
143 | /* | ||
144 | * thread information flags | ||
145 | * - these are process state flags that various assembly files may need to access | ||
146 | * - pending work-to-be-done flags are in LSW | ||
147 | * - other flags in MSW | ||
148 | */ | ||
149 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
150 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
151 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
152 | #define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */ | ||
153 | #define TIF_IRET 4 /* return with iret */ | ||
154 | #define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */ | ||
155 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ | ||
156 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ | ||
157 | #define TIF_MEMDIE 18 /* OOM killer killed process */ | ||
158 | #define TIF_FREEZE 19 /* is freezing for suspend */ | ||
159 | |||
160 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
161 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
162 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
163 | #define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) | ||
164 | #define _TIF_IRET (1<<TIF_IRET) | ||
165 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | ||
166 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) | ||
167 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
168 | #define _TIF_FREEZE (1<<TIF_FREEZE) | ||
169 | |||
170 | #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ | ||
171 | #define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ | ||
172 | |||
173 | /* | ||
174 | * Thread-synchronous status. | ||
175 | * | ||
176 | * This is different from the flags in that nobody else | ||
177 | * ever touches our thread-synchronous status, so we don't | ||
178 | * have to worry about atomic accesses. | ||
179 | */ | ||
180 | #define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */ | ||
181 | |||
182 | #endif /* __KERNEL__ */ | ||
183 | |||
184 | #endif /* _ASM_M32R_THREAD_INFO_H */ | ||
diff --git a/include/asm-m32r/timex.h b/include/asm-m32r/timex.h deleted file mode 100644 index bb9fe4feb12d..000000000000 --- a/include/asm-m32r/timex.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_TIMEX_H | ||
2 | #define _ASM_M32R_TIMEX_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/timex.h | ||
6 | * | ||
7 | * m32r architecture timex specifications | ||
8 | */ | ||
9 | |||
10 | #define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE) | ||
11 | #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ | ||
12 | |||
13 | #ifdef __KERNEL__ | ||
14 | /* | ||
15 | * Standard way to access the cycle counter. | ||
16 | * Currently only used on SMP. | ||
17 | */ | ||
18 | |||
19 | typedef unsigned long long cycles_t; | ||
20 | |||
21 | static __inline__ cycles_t get_cycles (void) | ||
22 | { | ||
23 | return 0; | ||
24 | } | ||
25 | #endif /* __KERNEL__ */ | ||
26 | |||
27 | #endif /* _ASM_M32R_TIMEX_H */ | ||
diff --git a/include/asm-m32r/tlb.h b/include/asm-m32r/tlb.h deleted file mode 100644 index c7ebd8d48f3b..000000000000 --- a/include/asm-m32r/tlb.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef _M32R_TLB_H | ||
2 | #define _M32R_TLB_H | ||
3 | |||
4 | /* | ||
5 | * x86 doesn't need any special per-pte or | ||
6 | * per-vma handling.. | ||
7 | */ | ||
8 | #define tlb_start_vma(tlb, vma) do { } while (0) | ||
9 | #define tlb_end_vma(tlb, vma) do { } while (0) | ||
10 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) | ||
11 | |||
12 | /* | ||
13 | * .. because we flush the whole mm when it | ||
14 | * fills up. | ||
15 | */ | ||
16 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
17 | |||
18 | #include <asm-generic/tlb.h> | ||
19 | |||
20 | #endif /* _M32R_TLB_H */ | ||
diff --git a/include/asm-m32r/tlbflush.h b/include/asm-m32r/tlbflush.h deleted file mode 100644 index 0ef95307784e..000000000000 --- a/include/asm-m32r/tlbflush.h +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_TLBFLUSH_H | ||
2 | #define _ASM_M32R_TLBFLUSH_H | ||
3 | |||
4 | #include <asm/m32r.h> | ||
5 | |||
6 | /* | ||
7 | * TLB flushing: | ||
8 | * | ||
9 | * - flush_tlb() flushes the current mm struct TLBs | ||
10 | * - flush_tlb_all() flushes all processes TLBs | ||
11 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
12 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
13 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
14 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
15 | */ | ||
16 | |||
17 | extern void local_flush_tlb_all(void); | ||
18 | extern void local_flush_tlb_mm(struct mm_struct *); | ||
19 | extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long); | ||
20 | extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long, | ||
21 | unsigned long); | ||
22 | |||
23 | #ifndef CONFIG_SMP | ||
24 | #ifdef CONFIG_MMU | ||
25 | #define flush_tlb_all() local_flush_tlb_all() | ||
26 | #define flush_tlb_mm(mm) local_flush_tlb_mm(mm) | ||
27 | #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) | ||
28 | #define flush_tlb_range(vma, start, end) \ | ||
29 | local_flush_tlb_range(vma, start, end) | ||
30 | #define flush_tlb_kernel_range(start, end) local_flush_tlb_all() | ||
31 | #else /* CONFIG_MMU */ | ||
32 | #define flush_tlb_all() do { } while (0) | ||
33 | #define flush_tlb_mm(mm) do { } while (0) | ||
34 | #define flush_tlb_page(vma, vmaddr) do { } while (0) | ||
35 | #define flush_tlb_range(vma, start, end) do { } while (0) | ||
36 | #endif /* CONFIG_MMU */ | ||
37 | #else /* CONFIG_SMP */ | ||
38 | extern void smp_flush_tlb_all(void); | ||
39 | extern void smp_flush_tlb_mm(struct mm_struct *); | ||
40 | extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long); | ||
41 | extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long, | ||
42 | unsigned long); | ||
43 | |||
44 | #define flush_tlb_all() smp_flush_tlb_all() | ||
45 | #define flush_tlb_mm(mm) smp_flush_tlb_mm(mm) | ||
46 | #define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page) | ||
47 | #define flush_tlb_range(vma, start, end) \ | ||
48 | smp_flush_tlb_range(vma, start, end) | ||
49 | #define flush_tlb_kernel_range(start, end) smp_flush_tlb_all() | ||
50 | #endif /* CONFIG_SMP */ | ||
51 | |||
52 | static __inline__ void __flush_tlb_page(unsigned long page) | ||
53 | { | ||
54 | unsigned int tmpreg0, tmpreg1, tmpreg2; | ||
55 | |||
56 | __asm__ __volatile__ ( | ||
57 | "seth %0, #high(%4) \n\t" | ||
58 | "st %3, @(%5, %0) \n\t" | ||
59 | "ldi %1, #1 \n\t" | ||
60 | "st %1, @(%6, %0) \n\t" | ||
61 | "add3 %1, %0, %7 \n\t" | ||
62 | ".fillinsn \n" | ||
63 | "1: \n\t" | ||
64 | "ld %2, @(%6, %0) \n\t" | ||
65 | "bnez %2, 1b \n\t" | ||
66 | "ld %0, @%1+ \n\t" | ||
67 | "ld %1, @%1 \n\t" | ||
68 | "st %2, @+%0 \n\t" | ||
69 | "st %2, @+%1 \n\t" | ||
70 | : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2) | ||
71 | : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset), | ||
72 | "i" (MTOP_offset), "i" (MIDXI_offset) | ||
73 | : "memory" | ||
74 | ); | ||
75 | } | ||
76 | |||
77 | static __inline__ void __flush_tlb_all(void) | ||
78 | { | ||
79 | unsigned int tmpreg0, tmpreg1; | ||
80 | |||
81 | __asm__ __volatile__ ( | ||
82 | "seth %0, #high(%2) \n\t" | ||
83 | "or3 %0, %0, #low(%2) \n\t" | ||
84 | "ldi %1, #0xc \n\t" | ||
85 | "st %1, @%0 \n\t" | ||
86 | ".fillinsn \n" | ||
87 | "1: \n\t" | ||
88 | "ld %1, @%0 \n\t" | ||
89 | "bnez %1, 1b \n\t" | ||
90 | : "=&r" (tmpreg0), "=&r" (tmpreg1) | ||
91 | : "i" (MTOP) : "memory" | ||
92 | ); | ||
93 | } | ||
94 | |||
95 | extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); | ||
96 | |||
97 | #endif /* _ASM_M32R_TLBFLUSH_H */ | ||
diff --git a/include/asm-m32r/topology.h b/include/asm-m32r/topology.h deleted file mode 100644 index d607eb32bd7e..000000000000 --- a/include/asm-m32r/topology.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_TOPOLOGY_H | ||
2 | #define _ASM_M32R_TOPOLOGY_H | ||
3 | |||
4 | #include <asm-generic/topology.h> | ||
5 | |||
6 | #endif /* _ASM_M32R_TOPOLOGY_H */ | ||
diff --git a/include/asm-m32r/types.h b/include/asm-m32r/types.h deleted file mode 100644 index bc9f7fff0ac3..000000000000 --- a/include/asm-m32r/types.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_TYPES_H | ||
2 | #define _ASM_M32R_TYPES_H | ||
3 | |||
4 | #include <asm-generic/int-ll64.h> | ||
5 | |||
6 | #ifndef __ASSEMBLY__ | ||
7 | |||
8 | typedef unsigned short umode_t; | ||
9 | |||
10 | #endif /* __ASSEMBLY__ */ | ||
11 | |||
12 | /* | ||
13 | * These aren't exported outside the kernel to avoid name space clashes | ||
14 | */ | ||
15 | #ifdef __KERNEL__ | ||
16 | |||
17 | #define BITS_PER_LONG 32 | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | |||
21 | /* DMA addresses are 32-bits wide. */ | ||
22 | |||
23 | typedef u32 dma_addr_t; | ||
24 | typedef u64 dma64_addr_t; | ||
25 | |||
26 | #endif /* __ASSEMBLY__ */ | ||
27 | |||
28 | #endif /* __KERNEL__ */ | ||
29 | |||
30 | #endif /* _ASM_M32R_TYPES_H */ | ||
diff --git a/include/asm-m32r/uaccess.h b/include/asm-m32r/uaccess.h deleted file mode 100644 index 1c7047bea200..000000000000 --- a/include/asm-m32r/uaccess.h +++ /dev/null | |||
@@ -1,693 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_UACCESS_H | ||
2 | #define _ASM_M32R_UACCESS_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-m32r/uaccess.h | ||
6 | * | ||
7 | * M32R version. | ||
8 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * User space memory access functions | ||
13 | */ | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/thread_info.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/setup.h> | ||
18 | |||
19 | #define VERIFY_READ 0 | ||
20 | #define VERIFY_WRITE 1 | ||
21 | |||
22 | /* | ||
23 | * The fs value determines whether argument validity checking should be | ||
24 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
25 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
26 | * | ||
27 | * For historical reasons, these macros are grossly misnamed. | ||
28 | */ | ||
29 | |||
30 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
31 | |||
32 | #ifdef CONFIG_MMU | ||
33 | |||
34 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
35 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
36 | #define get_ds() (KERNEL_DS) | ||
37 | #define get_fs() (current_thread_info()->addr_limit) | ||
38 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
39 | |||
40 | #else /* not CONFIG_MMU */ | ||
41 | |||
42 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
43 | #define USER_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
44 | #define get_ds() (KERNEL_DS) | ||
45 | |||
46 | static inline mm_segment_t get_fs(void) | ||
47 | { | ||
48 | return USER_DS; | ||
49 | } | ||
50 | |||
51 | static inline void set_fs(mm_segment_t s) | ||
52 | { | ||
53 | } | ||
54 | |||
55 | #endif /* not CONFIG_MMU */ | ||
56 | |||
57 | #define segment_eq(a,b) ((a).seg == (b).seg) | ||
58 | |||
59 | #define __addr_ok(addr) \ | ||
60 | ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) | ||
61 | |||
62 | /* | ||
63 | * Test whether a block of memory is a valid user space address. | ||
64 | * Returns 0 if the range is valid, nonzero otherwise. | ||
65 | * | ||
66 | * This is equivalent to the following test: | ||
67 | * (u33)addr + (u33)size >= (u33)current->addr_limit.seg | ||
68 | * | ||
69 | * This needs 33-bit arithmetic. We have a carry... | ||
70 | */ | ||
71 | #define __range_ok(addr,size) ({ \ | ||
72 | unsigned long flag, roksum; \ | ||
73 | __chk_user_ptr(addr); \ | ||
74 | asm ( \ | ||
75 | " cmpu %1, %1 ; clear cbit\n" \ | ||
76 | " addx %1, %3 ; set cbit if overflow\n" \ | ||
77 | " subx %0, %0\n" \ | ||
78 | " cmpu %4, %1\n" \ | ||
79 | " subx %0, %5\n" \ | ||
80 | : "=&r" (flag), "=r" (roksum) \ | ||
81 | : "1" (addr), "r" ((int)(size)), \ | ||
82 | "r" (current_thread_info()->addr_limit.seg), "r" (0) \ | ||
83 | : "cbit" ); \ | ||
84 | flag; }) | ||
85 | |||
86 | /** | ||
87 | * access_ok: - Checks if a user space pointer is valid | ||
88 | * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that | ||
89 | * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe | ||
90 | * to write to a block, it is always safe to read from it. | ||
91 | * @addr: User space pointer to start of block to check | ||
92 | * @size: Size of block to check | ||
93 | * | ||
94 | * Context: User context only. This function may sleep. | ||
95 | * | ||
96 | * Checks if a pointer to a block of memory in user space is valid. | ||
97 | * | ||
98 | * Returns true (nonzero) if the memory block may be valid, false (zero) | ||
99 | * if it is definitely invalid. | ||
100 | * | ||
101 | * Note that, depending on architecture, this function probably just | ||
102 | * checks that the pointer is in the user space range - after calling | ||
103 | * this function, memory access functions may still return -EFAULT. | ||
104 | */ | ||
105 | #ifdef CONFIG_MMU | ||
106 | #define access_ok(type,addr,size) (likely(__range_ok(addr,size) == 0)) | ||
107 | #else | ||
108 | static inline int access_ok(int type, const void *addr, unsigned long size) | ||
109 | { | ||
110 | unsigned long val = (unsigned long)addr; | ||
111 | |||
112 | return ((val >= memory_start) && ((val + size) < memory_end)); | ||
113 | } | ||
114 | #endif /* CONFIG_MMU */ | ||
115 | |||
116 | /* | ||
117 | * The exception table consists of pairs of addresses: the first is the | ||
118 | * address of an instruction that is allowed to fault, and the second is | ||
119 | * the address at which the program should continue. No registers are | ||
120 | * modified, so it is entirely up to the continuation code to figure out | ||
121 | * what to do. | ||
122 | * | ||
123 | * All the routines below use bits of fixup code that are out of line | ||
124 | * with the main instruction path. This means when everything is well, | ||
125 | * we don't even have to jump over them. Further, they do not intrude | ||
126 | * on our cache or tlb entries. | ||
127 | */ | ||
128 | |||
129 | struct exception_table_entry | ||
130 | { | ||
131 | unsigned long insn, fixup; | ||
132 | }; | ||
133 | |||
134 | extern int fixup_exception(struct pt_regs *regs); | ||
135 | |||
136 | /* | ||
137 | * These are the main single-value transfer routines. They automatically | ||
138 | * use the right size if we just have the right pointer type. | ||
139 | * | ||
140 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
141 | * and yet we don't want to do any pointers, because that is too much | ||
142 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
143 | * and hide all the uglyness from the user. | ||
144 | * | ||
145 | * The "__xxx" versions of the user access functions are versions that | ||
146 | * do not verify the address space, that must have been done previously | ||
147 | * with a separate "access_ok()" call (this is used when we do multiple | ||
148 | * accesses to the same area of user memory). | ||
149 | */ | ||
150 | |||
151 | /* Careful: we have to cast the result to the type of the pointer for sign | ||
152 | reasons */ | ||
153 | /** | ||
154 | * get_user: - Get a simple variable from user space. | ||
155 | * @x: Variable to store result. | ||
156 | * @ptr: Source address, in user space. | ||
157 | * | ||
158 | * Context: User context only. This function may sleep. | ||
159 | * | ||
160 | * This macro copies a single simple variable from user space to kernel | ||
161 | * space. It supports simple types like char and int, but not larger | ||
162 | * data types like structures or arrays. | ||
163 | * | ||
164 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
165 | * dereferencing @ptr must be assignable to @x without a cast. | ||
166 | * | ||
167 | * Returns zero on success, or -EFAULT on error. | ||
168 | * On error, the variable @x is set to zero. | ||
169 | */ | ||
170 | #define get_user(x,ptr) \ | ||
171 | __get_user_check((x),(ptr),sizeof(*(ptr))) | ||
172 | |||
173 | /** | ||
174 | * put_user: - Write a simple value into user space. | ||
175 | * @x: Value to copy to user space. | ||
176 | * @ptr: Destination address, in user space. | ||
177 | * | ||
178 | * Context: User context only. This function may sleep. | ||
179 | * | ||
180 | * This macro copies a single simple value from kernel space to user | ||
181 | * space. It supports simple types like char and int, but not larger | ||
182 | * data types like structures or arrays. | ||
183 | * | ||
184 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
185 | * to the result of dereferencing @ptr. | ||
186 | * | ||
187 | * Returns zero on success, or -EFAULT on error. | ||
188 | */ | ||
189 | #define put_user(x,ptr) \ | ||
190 | __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) | ||
191 | |||
192 | /** | ||
193 | * __get_user: - Get a simple variable from user space, with less checking. | ||
194 | * @x: Variable to store result. | ||
195 | * @ptr: Source address, in user space. | ||
196 | * | ||
197 | * Context: User context only. This function may sleep. | ||
198 | * | ||
199 | * This macro copies a single simple variable from user space to kernel | ||
200 | * space. It supports simple types like char and int, but not larger | ||
201 | * data types like structures or arrays. | ||
202 | * | ||
203 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
204 | * dereferencing @ptr must be assignable to @x without a cast. | ||
205 | * | ||
206 | * Caller must check the pointer with access_ok() before calling this | ||
207 | * function. | ||
208 | * | ||
209 | * Returns zero on success, or -EFAULT on error. | ||
210 | * On error, the variable @x is set to zero. | ||
211 | */ | ||
212 | #define __get_user(x,ptr) \ | ||
213 | __get_user_nocheck((x),(ptr),sizeof(*(ptr))) | ||
214 | |||
215 | #define __get_user_nocheck(x,ptr,size) \ | ||
216 | ({ \ | ||
217 | long __gu_err = 0; \ | ||
218 | unsigned long __gu_val; \ | ||
219 | might_sleep(); \ | ||
220 | __get_user_size(__gu_val,(ptr),(size),__gu_err); \ | ||
221 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
222 | __gu_err; \ | ||
223 | }) | ||
224 | |||
225 | #define __get_user_check(x,ptr,size) \ | ||
226 | ({ \ | ||
227 | long __gu_err = -EFAULT; \ | ||
228 | unsigned long __gu_val = 0; \ | ||
229 | const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ | ||
230 | might_sleep(); \ | ||
231 | if (access_ok(VERIFY_READ,__gu_addr,size)) \ | ||
232 | __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \ | ||
233 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
234 | __gu_err; \ | ||
235 | }) | ||
236 | |||
237 | extern long __get_user_bad(void); | ||
238 | |||
239 | #define __get_user_size(x,ptr,size,retval) \ | ||
240 | do { \ | ||
241 | retval = 0; \ | ||
242 | __chk_user_ptr(ptr); \ | ||
243 | switch (size) { \ | ||
244 | case 1: __get_user_asm(x,ptr,retval,"ub"); break; \ | ||
245 | case 2: __get_user_asm(x,ptr,retval,"uh"); break; \ | ||
246 | case 4: __get_user_asm(x,ptr,retval,""); break; \ | ||
247 | default: (x) = __get_user_bad(); \ | ||
248 | } \ | ||
249 | } while (0) | ||
250 | |||
251 | #define __get_user_asm(x, addr, err, itype) \ | ||
252 | __asm__ __volatile__( \ | ||
253 | " .fillinsn\n" \ | ||
254 | "1: ld"itype" %1,@%2\n" \ | ||
255 | " .fillinsn\n" \ | ||
256 | "2:\n" \ | ||
257 | ".section .fixup,\"ax\"\n" \ | ||
258 | " .balign 4\n" \ | ||
259 | "3: ldi %0,%3\n" \ | ||
260 | " seth r14,#high(2b)\n" \ | ||
261 | " or3 r14,r14,#low(2b)\n" \ | ||
262 | " jmp r14\n" \ | ||
263 | ".previous\n" \ | ||
264 | ".section __ex_table,\"a\"\n" \ | ||
265 | " .balign 4\n" \ | ||
266 | " .long 1b,3b\n" \ | ||
267 | ".previous" \ | ||
268 | : "=&r" (err), "=&r" (x) \ | ||
269 | : "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
270 | : "r14", "memory") | ||
271 | |||
272 | /** | ||
273 | * __put_user: - Write a simple value into user space, with less checking. | ||
274 | * @x: Value to copy to user space. | ||
275 | * @ptr: Destination address, in user space. | ||
276 | * | ||
277 | * Context: User context only. This function may sleep. | ||
278 | * | ||
279 | * This macro copies a single simple value from kernel space to user | ||
280 | * space. It supports simple types like char and int, but not larger | ||
281 | * data types like structures or arrays. | ||
282 | * | ||
283 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
284 | * to the result of dereferencing @ptr. | ||
285 | * | ||
286 | * Caller must check the pointer with access_ok() before calling this | ||
287 | * function. | ||
288 | * | ||
289 | * Returns zero on success, or -EFAULT on error. | ||
290 | */ | ||
291 | #define __put_user(x,ptr) \ | ||
292 | __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) | ||
293 | |||
294 | |||
295 | #define __put_user_nocheck(x,ptr,size) \ | ||
296 | ({ \ | ||
297 | long __pu_err; \ | ||
298 | might_sleep(); \ | ||
299 | __put_user_size((x),(ptr),(size),__pu_err); \ | ||
300 | __pu_err; \ | ||
301 | }) | ||
302 | |||
303 | |||
304 | #define __put_user_check(x,ptr,size) \ | ||
305 | ({ \ | ||
306 | long __pu_err = -EFAULT; \ | ||
307 | __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ | ||
308 | might_sleep(); \ | ||
309 | if (access_ok(VERIFY_WRITE,__pu_addr,size)) \ | ||
310 | __put_user_size((x),__pu_addr,(size),__pu_err); \ | ||
311 | __pu_err; \ | ||
312 | }) | ||
313 | |||
314 | #if defined(__LITTLE_ENDIAN__) | ||
315 | #define __put_user_u64(x, addr, err) \ | ||
316 | __asm__ __volatile__( \ | ||
317 | " .fillinsn\n" \ | ||
318 | "1: st %L1,@%2\n" \ | ||
319 | " .fillinsn\n" \ | ||
320 | "2: st %H1,@(4,%2)\n" \ | ||
321 | " .fillinsn\n" \ | ||
322 | "3:\n" \ | ||
323 | ".section .fixup,\"ax\"\n" \ | ||
324 | " .balign 4\n" \ | ||
325 | "4: ldi %0,%3\n" \ | ||
326 | " seth r14,#high(3b)\n" \ | ||
327 | " or3 r14,r14,#low(3b)\n" \ | ||
328 | " jmp r14\n" \ | ||
329 | ".previous\n" \ | ||
330 | ".section __ex_table,\"a\"\n" \ | ||
331 | " .balign 4\n" \ | ||
332 | " .long 1b,4b\n" \ | ||
333 | " .long 2b,4b\n" \ | ||
334 | ".previous" \ | ||
335 | : "=&r" (err) \ | ||
336 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
337 | : "r14", "memory") | ||
338 | |||
339 | #elif defined(__BIG_ENDIAN__) | ||
340 | #define __put_user_u64(x, addr, err) \ | ||
341 | __asm__ __volatile__( \ | ||
342 | " .fillinsn\n" \ | ||
343 | "1: st %H1,@%2\n" \ | ||
344 | " .fillinsn\n" \ | ||
345 | "2: st %L1,@(4,%2)\n" \ | ||
346 | " .fillinsn\n" \ | ||
347 | "3:\n" \ | ||
348 | ".section .fixup,\"ax\"\n" \ | ||
349 | " .balign 4\n" \ | ||
350 | "4: ldi %0,%3\n" \ | ||
351 | " seth r14,#high(3b)\n" \ | ||
352 | " or3 r14,r14,#low(3b)\n" \ | ||
353 | " jmp r14\n" \ | ||
354 | ".previous\n" \ | ||
355 | ".section __ex_table,\"a\"\n" \ | ||
356 | " .balign 4\n" \ | ||
357 | " .long 1b,4b\n" \ | ||
358 | " .long 2b,4b\n" \ | ||
359 | ".previous" \ | ||
360 | : "=&r" (err) \ | ||
361 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
362 | : "r14", "memory") | ||
363 | #else | ||
364 | #error no endian defined | ||
365 | #endif | ||
366 | |||
367 | extern void __put_user_bad(void); | ||
368 | |||
369 | #define __put_user_size(x,ptr,size,retval) \ | ||
370 | do { \ | ||
371 | retval = 0; \ | ||
372 | __chk_user_ptr(ptr); \ | ||
373 | switch (size) { \ | ||
374 | case 1: __put_user_asm(x,ptr,retval,"b"); break; \ | ||
375 | case 2: __put_user_asm(x,ptr,retval,"h"); break; \ | ||
376 | case 4: __put_user_asm(x,ptr,retval,""); break; \ | ||
377 | case 8: __put_user_u64((__typeof__(*ptr))(x),ptr,retval); break;\ | ||
378 | default: __put_user_bad(); \ | ||
379 | } \ | ||
380 | } while (0) | ||
381 | |||
382 | struct __large_struct { unsigned long buf[100]; }; | ||
383 | #define __m(x) (*(struct __large_struct *)(x)) | ||
384 | |||
385 | /* | ||
386 | * Tell gcc we read from memory instead of writing: this is because | ||
387 | * we do not write to any memory gcc knows about, so there are no | ||
388 | * aliasing issues. | ||
389 | */ | ||
390 | #define __put_user_asm(x, addr, err, itype) \ | ||
391 | __asm__ __volatile__( \ | ||
392 | " .fillinsn\n" \ | ||
393 | "1: st"itype" %1,@%2\n" \ | ||
394 | " .fillinsn\n" \ | ||
395 | "2:\n" \ | ||
396 | ".section .fixup,\"ax\"\n" \ | ||
397 | " .balign 4\n" \ | ||
398 | "3: ldi %0,%3\n" \ | ||
399 | " seth r14,#high(2b)\n" \ | ||
400 | " or3 r14,r14,#low(2b)\n" \ | ||
401 | " jmp r14\n" \ | ||
402 | ".previous\n" \ | ||
403 | ".section __ex_table,\"a\"\n" \ | ||
404 | " .balign 4\n" \ | ||
405 | " .long 1b,3b\n" \ | ||
406 | ".previous" \ | ||
407 | : "=&r" (err) \ | ||
408 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
409 | : "r14", "memory") | ||
410 | |||
411 | /* | ||
412 | * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault | ||
413 | * we return the initial request size (1, 2 or 4), as copy_*_user should do. | ||
414 | * If a store crosses a page boundary and gets a fault, the m32r will not write | ||
415 | * anything, so this is accurate. | ||
416 | */ | ||
417 | |||
418 | /* | ||
419 | * Copy To/From Userspace | ||
420 | */ | ||
421 | |||
422 | /* Generic arbitrary sized copy. */ | ||
423 | /* Return the number of bytes NOT copied. */ | ||
424 | #define __copy_user(to,from,size) \ | ||
425 | do { \ | ||
426 | unsigned long __dst, __src, __c; \ | ||
427 | __asm__ __volatile__ ( \ | ||
428 | " mv r14, %0\n" \ | ||
429 | " or r14, %1\n" \ | ||
430 | " beq %0, %1, 9f\n" \ | ||
431 | " beqz %2, 9f\n" \ | ||
432 | " and3 r14, r14, #3\n" \ | ||
433 | " bnez r14, 2f\n" \ | ||
434 | " and3 %2, %2, #3\n" \ | ||
435 | " beqz %3, 2f\n" \ | ||
436 | " addi %0, #-4 ; word_copy \n" \ | ||
437 | " .fillinsn\n" \ | ||
438 | "0: ld r14, @%1+\n" \ | ||
439 | " addi %3, #-1\n" \ | ||
440 | " .fillinsn\n" \ | ||
441 | "1: st r14, @+%0\n" \ | ||
442 | " bnez %3, 0b\n" \ | ||
443 | " beqz %2, 9f\n" \ | ||
444 | " addi %0, #4\n" \ | ||
445 | " .fillinsn\n" \ | ||
446 | "2: ldb r14, @%1 ; byte_copy \n" \ | ||
447 | " .fillinsn\n" \ | ||
448 | "3: stb r14, @%0\n" \ | ||
449 | " addi %1, #1\n" \ | ||
450 | " addi %2, #-1\n" \ | ||
451 | " addi %0, #1\n" \ | ||
452 | " bnez %2, 2b\n" \ | ||
453 | " .fillinsn\n" \ | ||
454 | "9:\n" \ | ||
455 | ".section .fixup,\"ax\"\n" \ | ||
456 | " .balign 4\n" \ | ||
457 | "5: addi %3, #1\n" \ | ||
458 | " addi %1, #-4\n" \ | ||
459 | " .fillinsn\n" \ | ||
460 | "6: slli %3, #2\n" \ | ||
461 | " add %2, %3\n" \ | ||
462 | " addi %0, #4\n" \ | ||
463 | " .fillinsn\n" \ | ||
464 | "7: seth r14, #high(9b)\n" \ | ||
465 | " or3 r14, r14, #low(9b)\n" \ | ||
466 | " jmp r14\n" \ | ||
467 | ".previous\n" \ | ||
468 | ".section __ex_table,\"a\"\n" \ | ||
469 | " .balign 4\n" \ | ||
470 | " .long 0b,6b\n" \ | ||
471 | " .long 1b,5b\n" \ | ||
472 | " .long 2b,9b\n" \ | ||
473 | " .long 3b,9b\n" \ | ||
474 | ".previous\n" \ | ||
475 | : "=&r" (__dst), "=&r" (__src), "=&r" (size), \ | ||
476 | "=&r" (__c) \ | ||
477 | : "0" (to), "1" (from), "2" (size), "3" (size / 4) \ | ||
478 | : "r14", "memory"); \ | ||
479 | } while (0) | ||
480 | |||
481 | #define __copy_user_zeroing(to,from,size) \ | ||
482 | do { \ | ||
483 | unsigned long __dst, __src, __c; \ | ||
484 | __asm__ __volatile__ ( \ | ||
485 | " mv r14, %0\n" \ | ||
486 | " or r14, %1\n" \ | ||
487 | " beq %0, %1, 9f\n" \ | ||
488 | " beqz %2, 9f\n" \ | ||
489 | " and3 r14, r14, #3\n" \ | ||
490 | " bnez r14, 2f\n" \ | ||
491 | " and3 %2, %2, #3\n" \ | ||
492 | " beqz %3, 2f\n" \ | ||
493 | " addi %0, #-4 ; word_copy \n" \ | ||
494 | " .fillinsn\n" \ | ||
495 | "0: ld r14, @%1+\n" \ | ||
496 | " addi %3, #-1\n" \ | ||
497 | " .fillinsn\n" \ | ||
498 | "1: st r14, @+%0\n" \ | ||
499 | " bnez %3, 0b\n" \ | ||
500 | " beqz %2, 9f\n" \ | ||
501 | " addi %0, #4\n" \ | ||
502 | " .fillinsn\n" \ | ||
503 | "2: ldb r14, @%1 ; byte_copy \n" \ | ||
504 | " .fillinsn\n" \ | ||
505 | "3: stb r14, @%0\n" \ | ||
506 | " addi %1, #1\n" \ | ||
507 | " addi %2, #-1\n" \ | ||
508 | " addi %0, #1\n" \ | ||
509 | " bnez %2, 2b\n" \ | ||
510 | " .fillinsn\n" \ | ||
511 | "9:\n" \ | ||
512 | ".section .fixup,\"ax\"\n" \ | ||
513 | " .balign 4\n" \ | ||
514 | "5: addi %3, #1\n" \ | ||
515 | " addi %1, #-4\n" \ | ||
516 | " .fillinsn\n" \ | ||
517 | "6: slli %3, #2\n" \ | ||
518 | " add %2, %3\n" \ | ||
519 | " addi %0, #4\n" \ | ||
520 | " .fillinsn\n" \ | ||
521 | "7: ldi r14, #0 ; store zero \n" \ | ||
522 | " .fillinsn\n" \ | ||
523 | "8: addi %2, #-1\n" \ | ||
524 | " stb r14, @%0 ; ACE? \n" \ | ||
525 | " addi %0, #1\n" \ | ||
526 | " bnez %2, 8b\n" \ | ||
527 | " seth r14, #high(9b)\n" \ | ||
528 | " or3 r14, r14, #low(9b)\n" \ | ||
529 | " jmp r14\n" \ | ||
530 | ".previous\n" \ | ||
531 | ".section __ex_table,\"a\"\n" \ | ||
532 | " .balign 4\n" \ | ||
533 | " .long 0b,6b\n" \ | ||
534 | " .long 1b,5b\n" \ | ||
535 | " .long 2b,7b\n" \ | ||
536 | " .long 3b,7b\n" \ | ||
537 | ".previous\n" \ | ||
538 | : "=&r" (__dst), "=&r" (__src), "=&r" (size), \ | ||
539 | "=&r" (__c) \ | ||
540 | : "0" (to), "1" (from), "2" (size), "3" (size / 4) \ | ||
541 | : "r14", "memory"); \ | ||
542 | } while (0) | ||
543 | |||
544 | |||
545 | /* We let the __ versions of copy_from/to_user inline, because they're often | ||
546 | * used in fast paths and have only a small space overhead. | ||
547 | */ | ||
548 | static inline unsigned long __generic_copy_from_user_nocheck(void *to, | ||
549 | const void __user *from, unsigned long n) | ||
550 | { | ||
551 | __copy_user_zeroing(to,from,n); | ||
552 | return n; | ||
553 | } | ||
554 | |||
555 | static inline unsigned long __generic_copy_to_user_nocheck(void __user *to, | ||
556 | const void *from, unsigned long n) | ||
557 | { | ||
558 | __copy_user(to,from,n); | ||
559 | return n; | ||
560 | } | ||
561 | |||
562 | unsigned long __generic_copy_to_user(void __user *, const void *, unsigned long); | ||
563 | unsigned long __generic_copy_from_user(void *, const void __user *, unsigned long); | ||
564 | |||
565 | /** | ||
566 | * __copy_to_user: - Copy a block of data into user space, with less checking. | ||
567 | * @to: Destination address, in user space. | ||
568 | * @from: Source address, in kernel space. | ||
569 | * @n: Number of bytes to copy. | ||
570 | * | ||
571 | * Context: User context only. This function may sleep. | ||
572 | * | ||
573 | * Copy data from kernel space to user space. Caller must check | ||
574 | * the specified block with access_ok() before calling this function. | ||
575 | * | ||
576 | * Returns number of bytes that could not be copied. | ||
577 | * On success, this will be zero. | ||
578 | */ | ||
579 | #define __copy_to_user(to,from,n) \ | ||
580 | __generic_copy_to_user_nocheck((to),(from),(n)) | ||
581 | |||
582 | #define __copy_to_user_inatomic __copy_to_user | ||
583 | #define __copy_from_user_inatomic __copy_from_user | ||
584 | |||
585 | /** | ||
586 | * copy_to_user: - Copy a block of data into user space. | ||
587 | * @to: Destination address, in user space. | ||
588 | * @from: Source address, in kernel space. | ||
589 | * @n: Number of bytes to copy. | ||
590 | * | ||
591 | * Context: User context only. This function may sleep. | ||
592 | * | ||
593 | * Copy data from kernel space to user space. | ||
594 | * | ||
595 | * Returns number of bytes that could not be copied. | ||
596 | * On success, this will be zero. | ||
597 | */ | ||
598 | #define copy_to_user(to,from,n) \ | ||
599 | ({ \ | ||
600 | might_sleep(); \ | ||
601 | __generic_copy_to_user((to),(from),(n)); \ | ||
602 | }) | ||
603 | |||
604 | /** | ||
605 | * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space. | ||
606 | * @from: Source address, in user space. | ||
607 | * @n: Number of bytes to copy. | ||
608 | * | ||
609 | * Context: User context only. This function may sleep. | ||
610 | * | ||
611 | * Copy data from user space to kernel space. Caller must check | ||
612 | * the specified block with access_ok() before calling this function. | ||
613 | * | ||
614 | * Returns number of bytes that could not be copied. | ||
615 | * On success, this will be zero. | ||
616 | * | ||
617 | * If some data could not be copied, this function will pad the copied | ||
618 | * data to the requested size using zero bytes. | ||
619 | */ | ||
620 | #define __copy_from_user(to,from,n) \ | ||
621 | __generic_copy_from_user_nocheck((to),(from),(n)) | ||
622 | |||
623 | /** | ||
624 | * copy_from_user: - Copy a block of data from user space. | ||
625 | * @to: Destination address, in kernel space. | ||
626 | * @from: Source address, in user space. | ||
627 | * @n: Number of bytes to copy. | ||
628 | * | ||
629 | * Context: User context only. This function may sleep. | ||
630 | * | ||
631 | * Copy data from user space to kernel space. | ||
632 | * | ||
633 | * Returns number of bytes that could not be copied. | ||
634 | * On success, this will be zero. | ||
635 | * | ||
636 | * If some data could not be copied, this function will pad the copied | ||
637 | * data to the requested size using zero bytes. | ||
638 | */ | ||
639 | #define copy_from_user(to,from,n) \ | ||
640 | ({ \ | ||
641 | might_sleep(); \ | ||
642 | __generic_copy_from_user((to),(from),(n)); \ | ||
643 | }) | ||
644 | |||
645 | long __must_check strncpy_from_user(char *dst, const char __user *src, | ||
646 | long count); | ||
647 | long __must_check __strncpy_from_user(char *dst, | ||
648 | const char __user *src, long count); | ||
649 | |||
650 | /** | ||
651 | * __clear_user: - Zero a block of memory in user space, with less checking. | ||
652 | * @to: Destination address, in user space. | ||
653 | * @n: Number of bytes to zero. | ||
654 | * | ||
655 | * Zero a block of memory in user space. Caller must check | ||
656 | * the specified block with access_ok() before calling this function. | ||
657 | * | ||
658 | * Returns number of bytes that could not be cleared. | ||
659 | * On success, this will be zero. | ||
660 | */ | ||
661 | unsigned long __clear_user(void __user *mem, unsigned long len); | ||
662 | |||
663 | /** | ||
664 | * clear_user: - Zero a block of memory in user space. | ||
665 | * @to: Destination address, in user space. | ||
666 | * @n: Number of bytes to zero. | ||
667 | * | ||
668 | * Zero a block of memory in user space. Caller must check | ||
669 | * the specified block with access_ok() before calling this function. | ||
670 | * | ||
671 | * Returns number of bytes that could not be cleared. | ||
672 | * On success, this will be zero. | ||
673 | */ | ||
674 | unsigned long clear_user(void __user *mem, unsigned long len); | ||
675 | |||
676 | /** | ||
677 | * strlen_user: - Get the size of a string in user space. | ||
678 | * @str: The string to measure. | ||
679 | * | ||
680 | * Context: User context only. This function may sleep. | ||
681 | * | ||
682 | * Get the size of a NUL-terminated string in user space. | ||
683 | * | ||
684 | * Returns the size of the string INCLUDING the terminating NUL. | ||
685 | * On exception, returns 0. | ||
686 | * | ||
687 | * If there is a limit on the length of a valid string, you may wish to | ||
688 | * consider using strnlen_user() instead. | ||
689 | */ | ||
690 | #define strlen_user(str) strnlen_user(str, ~0UL >> 1) | ||
691 | long strnlen_user(const char __user *str, long n); | ||
692 | |||
693 | #endif /* _ASM_M32R_UACCESS_H */ | ||
diff --git a/include/asm-m32r/ucontext.h b/include/asm-m32r/ucontext.h deleted file mode 100644 index 09324741eec3..000000000000 --- a/include/asm-m32r/ucontext.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_UCONTEXT_H | ||
2 | #define _ASM_M32R_UCONTEXT_H | ||
3 | |||
4 | struct ucontext { | ||
5 | unsigned long uc_flags; | ||
6 | struct ucontext *uc_link; | ||
7 | stack_t uc_stack; | ||
8 | struct sigcontext uc_mcontext; | ||
9 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
10 | }; | ||
11 | |||
12 | #endif /* _ASM_M32R_UCONTEXT_H */ | ||
diff --git a/include/asm-m32r/unaligned.h b/include/asm-m32r/unaligned.h deleted file mode 100644 index 377eb20d1ec6..000000000000 --- a/include/asm-m32r/unaligned.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_UNALIGNED_H | ||
2 | #define _ASM_M32R_UNALIGNED_H | ||
3 | |||
4 | #if defined(__LITTLE_ENDIAN__) | ||
5 | # include <linux/unaligned/le_memmove.h> | ||
6 | # include <linux/unaligned/be_byteshift.h> | ||
7 | # include <linux/unaligned/generic.h> | ||
8 | # define get_unaligned __get_unaligned_le | ||
9 | # define put_unaligned __put_unaligned_le | ||
10 | #else | ||
11 | # include <linux/unaligned/be_memmove.h> | ||
12 | # include <linux/unaligned/le_byteshift.h> | ||
13 | # include <linux/unaligned/generic.h> | ||
14 | # define get_unaligned __get_unaligned_be | ||
15 | # define put_unaligned __put_unaligned_be | ||
16 | #endif | ||
17 | |||
18 | #endif /* _ASM_M32R_UNALIGNED_H */ | ||
diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h deleted file mode 100644 index cf701c933249..000000000000 --- a/include/asm-m32r/unistd.h +++ /dev/null | |||
@@ -1,389 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_UNISTD_H | ||
2 | #define _ASM_M32R_UNISTD_H | ||
3 | |||
4 | /* | ||
5 | * This file contains the system call numbers. | ||
6 | */ | ||
7 | |||
8 | #define __NR_restart_syscall 0 | ||
9 | #define __NR_exit 1 | ||
10 | #define __NR_fork 2 | ||
11 | #define __NR_read 3 | ||
12 | #define __NR_write 4 | ||
13 | #define __NR_open 5 | ||
14 | #define __NR_close 6 | ||
15 | #define __NR_waitpid 7 | ||
16 | #define __NR_creat 8 | ||
17 | #define __NR_link 9 | ||
18 | #define __NR_unlink 10 | ||
19 | #define __NR_execve 11 | ||
20 | #define __NR_chdir 12 | ||
21 | #define __NR_time 13 | ||
22 | #define __NR_mknod 14 | ||
23 | #define __NR_chmod 15 | ||
24 | /* 16 is unused */ | ||
25 | /* 17 is unused */ | ||
26 | /* 18 is unused */ | ||
27 | #define __NR_lseek 19 | ||
28 | #define __NR_getpid 20 | ||
29 | #define __NR_mount 21 | ||
30 | #define __NR_umount 22 | ||
31 | /* 23 is unused */ | ||
32 | /* 24 is unused */ | ||
33 | #define __NR_stime 25 | ||
34 | #define __NR_ptrace 26 | ||
35 | #define __NR_alarm 27 | ||
36 | /* 28 is unused */ | ||
37 | #define __NR_pause 29 | ||
38 | #define __NR_utime 30 | ||
39 | /* 31 is unused */ | ||
40 | #define __NR_cachectl 32 /* old #define __NR_gtty 32*/ | ||
41 | #define __NR_access 33 | ||
42 | /* 34 is unused */ | ||
43 | /* 35 is unused */ | ||
44 | #define __NR_sync 36 | ||
45 | #define __NR_kill 37 | ||
46 | #define __NR_rename 38 | ||
47 | #define __NR_mkdir 39 | ||
48 | #define __NR_rmdir 40 | ||
49 | #define __NR_dup 41 | ||
50 | #define __NR_pipe 42 | ||
51 | #define __NR_times 43 | ||
52 | /* 44 is unused */ | ||
53 | #define __NR_brk 45 | ||
54 | /* 46 is unused */ | ||
55 | /* 47 is unused (getgid16) */ | ||
56 | /* 48 is unused */ | ||
57 | /* 49 is unused */ | ||
58 | /* 50 is unused */ | ||
59 | #define __NR_acct 51 | ||
60 | #define __NR_umount2 52 | ||
61 | /* 53 is unused */ | ||
62 | #define __NR_ioctl 54 | ||
63 | /* 55 is unused (fcntl) */ | ||
64 | /* 56 is unused */ | ||
65 | #define __NR_setpgid 57 | ||
66 | /* 58 is unused */ | ||
67 | /* 59 is unused */ | ||
68 | #define __NR_umask 60 | ||
69 | #define __NR_chroot 61 | ||
70 | #define __NR_ustat 62 | ||
71 | #define __NR_dup2 63 | ||
72 | #define __NR_getppid 64 | ||
73 | #define __NR_getpgrp 65 | ||
74 | #define __NR_setsid 66 | ||
75 | /* 67 is unused */ | ||
76 | /* 68 is unused*/ | ||
77 | /* 69 is unused*/ | ||
78 | /* 70 is unused */ | ||
79 | /* 71 is unused */ | ||
80 | /* 72 is unused */ | ||
81 | /* 73 is unused */ | ||
82 | #define __NR_sethostname 74 | ||
83 | #define __NR_setrlimit 75 | ||
84 | /* 76 is unused (old getrlimit) */ | ||
85 | #define __NR_getrusage 77 | ||
86 | #define __NR_gettimeofday 78 | ||
87 | #define __NR_settimeofday 79 | ||
88 | /* 80 is unused */ | ||
89 | /* 81 is unused */ | ||
90 | /* 82 is unused */ | ||
91 | #define __NR_symlink 83 | ||
92 | /* 84 is unused */ | ||
93 | #define __NR_readlink 85 | ||
94 | #define __NR_uselib 86 | ||
95 | #define __NR_swapon 87 | ||
96 | #define __NR_reboot 88 | ||
97 | /* 89 is unused */ | ||
98 | /* 90 is unused */ | ||
99 | #define __NR_munmap 91 | ||
100 | #define __NR_truncate 92 | ||
101 | #define __NR_ftruncate 93 | ||
102 | #define __NR_fchmod 94 | ||
103 | /* 95 is unused */ | ||
104 | #define __NR_getpriority 96 | ||
105 | #define __NR_setpriority 97 | ||
106 | /* 98 is unused */ | ||
107 | #define __NR_statfs 99 | ||
108 | #define __NR_fstatfs 100 | ||
109 | /* 101 is unused */ | ||
110 | #define __NR_socketcall 102 | ||
111 | #define __NR_syslog 103 | ||
112 | #define __NR_setitimer 104 | ||
113 | #define __NR_getitimer 105 | ||
114 | #define __NR_stat 106 | ||
115 | #define __NR_lstat 107 | ||
116 | #define __NR_fstat 108 | ||
117 | /* 109 is unused */ | ||
118 | /* 110 is unused */ | ||
119 | #define __NR_vhangup 111 | ||
120 | /* 112 is unused */ | ||
121 | /* 113 is unused */ | ||
122 | #define __NR_wait4 114 | ||
123 | #define __NR_swapoff 115 | ||
124 | #define __NR_sysinfo 116 | ||
125 | #define __NR_ipc 117 | ||
126 | #define __NR_fsync 118 | ||
127 | /* 119 is unused */ | ||
128 | #define __NR_clone 120 | ||
129 | #define __NR_setdomainname 121 | ||
130 | #define __NR_uname 122 | ||
131 | /* 123 is unused */ | ||
132 | #define __NR_adjtimex 124 | ||
133 | #define __NR_mprotect 125 | ||
134 | /* 126 is unused */ | ||
135 | /* 127 is unused */ | ||
136 | #define __NR_init_module 128 | ||
137 | #define __NR_delete_module 129 | ||
138 | /* 130 is unused */ | ||
139 | #define __NR_quotactl 131 | ||
140 | #define __NR_getpgid 132 | ||
141 | #define __NR_fchdir 133 | ||
142 | #define __NR_bdflush 134 | ||
143 | #define __NR_sysfs 135 | ||
144 | #define __NR_personality 136 | ||
145 | /* 137 is unused */ | ||
146 | /* 138 is unused */ | ||
147 | /* 139 is unused */ | ||
148 | #define __NR__llseek 140 | ||
149 | #define __NR_getdents 141 | ||
150 | #define __NR__newselect 142 | ||
151 | #define __NR_flock 143 | ||
152 | #define __NR_msync 144 | ||
153 | #define __NR_readv 145 | ||
154 | #define __NR_writev 146 | ||
155 | #define __NR_getsid 147 | ||
156 | #define __NR_fdatasync 148 | ||
157 | #define __NR__sysctl 149 | ||
158 | #define __NR_mlock 150 | ||
159 | #define __NR_munlock 151 | ||
160 | #define __NR_mlockall 152 | ||
161 | #define __NR_munlockall 153 | ||
162 | #define __NR_sched_setparam 154 | ||
163 | #define __NR_sched_getparam 155 | ||
164 | #define __NR_sched_setscheduler 156 | ||
165 | #define __NR_sched_getscheduler 157 | ||
166 | #define __NR_sched_yield 158 | ||
167 | #define __NR_sched_get_priority_max 159 | ||
168 | #define __NR_sched_get_priority_min 160 | ||
169 | #define __NR_sched_rr_get_interval 161 | ||
170 | #define __NR_nanosleep 162 | ||
171 | #define __NR_mremap 163 | ||
172 | /* 164 is unused */ | ||
173 | /* 165 is unused */ | ||
174 | #define __NR_tas 166 | ||
175 | /* 167 is unused */ | ||
176 | #define __NR_poll 168 | ||
177 | #define __NR_nfsservctl 169 | ||
178 | /* 170 is unused */ | ||
179 | /* 171 is unused */ | ||
180 | #define __NR_prctl 172 | ||
181 | #define __NR_rt_sigreturn 173 | ||
182 | #define __NR_rt_sigaction 174 | ||
183 | #define __NR_rt_sigprocmask 175 | ||
184 | #define __NR_rt_sigpending 176 | ||
185 | #define __NR_rt_sigtimedwait 177 | ||
186 | #define __NR_rt_sigqueueinfo 178 | ||
187 | #define __NR_rt_sigsuspend 179 | ||
188 | #define __NR_pread64 180 | ||
189 | #define __NR_pwrite64 181 | ||
190 | /* 182 is unused */ | ||
191 | #define __NR_getcwd 183 | ||
192 | #define __NR_capget 184 | ||
193 | #define __NR_capset 185 | ||
194 | #define __NR_sigaltstack 186 | ||
195 | #define __NR_sendfile 187 | ||
196 | /* 188 is unused */ | ||
197 | /* 189 is unused */ | ||
198 | #define __NR_vfork 190 | ||
199 | #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ | ||
200 | #define __NR_mmap2 192 | ||
201 | #define __NR_truncate64 193 | ||
202 | #define __NR_ftruncate64 194 | ||
203 | #define __NR_stat64 195 | ||
204 | #define __NR_lstat64 196 | ||
205 | #define __NR_fstat64 197 | ||
206 | #define __NR_lchown32 198 | ||
207 | #define __NR_getuid32 199 | ||
208 | #define __NR_getgid32 200 | ||
209 | #define __NR_geteuid32 201 | ||
210 | #define __NR_getegid32 202 | ||
211 | #define __NR_setreuid32 203 | ||
212 | #define __NR_setregid32 204 | ||
213 | #define __NR_getgroups32 205 | ||
214 | #define __NR_setgroups32 206 | ||
215 | #define __NR_fchown32 207 | ||
216 | #define __NR_setresuid32 208 | ||
217 | #define __NR_getresuid32 209 | ||
218 | #define __NR_setresgid32 210 | ||
219 | #define __NR_getresgid32 211 | ||
220 | #define __NR_chown32 212 | ||
221 | #define __NR_setuid32 213 | ||
222 | #define __NR_setgid32 214 | ||
223 | #define __NR_setfsuid32 215 | ||
224 | #define __NR_setfsgid32 216 | ||
225 | #define __NR_pivot_root 217 | ||
226 | #define __NR_mincore 218 | ||
227 | #define __NR_madvise 219 | ||
228 | #define __NR_getdents64 220 | ||
229 | #define __NR_fcntl64 221 | ||
230 | /* 222 is unused */ | ||
231 | /* 223 is unused */ | ||
232 | #define __NR_gettid 224 | ||
233 | #define __NR_readahead 225 | ||
234 | #define __NR_setxattr 226 | ||
235 | #define __NR_lsetxattr 227 | ||
236 | #define __NR_fsetxattr 228 | ||
237 | #define __NR_getxattr 229 | ||
238 | #define __NR_lgetxattr 230 | ||
239 | #define __NR_fgetxattr 231 | ||
240 | #define __NR_listxattr 232 | ||
241 | #define __NR_llistxattr 233 | ||
242 | #define __NR_flistxattr 234 | ||
243 | #define __NR_removexattr 235 | ||
244 | #define __NR_lremovexattr 236 | ||
245 | #define __NR_fremovexattr 237 | ||
246 | #define __NR_tkill 238 | ||
247 | #define __NR_sendfile64 239 | ||
248 | #define __NR_futex 240 | ||
249 | #define __NR_sched_setaffinity 241 | ||
250 | #define __NR_sched_getaffinity 242 | ||
251 | #define __NR_set_thread_area 243 | ||
252 | #define __NR_get_thread_area 244 | ||
253 | #define __NR_io_setup 245 | ||
254 | #define __NR_io_destroy 246 | ||
255 | #define __NR_io_getevents 247 | ||
256 | #define __NR_io_submit 248 | ||
257 | #define __NR_io_cancel 249 | ||
258 | #define __NR_fadvise64 250 | ||
259 | /* 251 is unused */ | ||
260 | #define __NR_exit_group 252 | ||
261 | #define __NR_lookup_dcookie 253 | ||
262 | #define __NR_epoll_create 254 | ||
263 | #define __NR_epoll_ctl 255 | ||
264 | #define __NR_epoll_wait 256 | ||
265 | #define __NR_remap_file_pages 257 | ||
266 | #define __NR_set_tid_address 258 | ||
267 | #define __NR_timer_create 259 | ||
268 | #define __NR_timer_settime (__NR_timer_create+1) | ||
269 | #define __NR_timer_gettime (__NR_timer_create+2) | ||
270 | #define __NR_timer_getoverrun (__NR_timer_create+3) | ||
271 | #define __NR_timer_delete (__NR_timer_create+4) | ||
272 | #define __NR_clock_settime (__NR_timer_create+5) | ||
273 | #define __NR_clock_gettime (__NR_timer_create+6) | ||
274 | #define __NR_clock_getres (__NR_timer_create+7) | ||
275 | #define __NR_clock_nanosleep (__NR_timer_create+8) | ||
276 | #define __NR_statfs64 268 | ||
277 | #define __NR_fstatfs64 269 | ||
278 | #define __NR_tgkill 270 | ||
279 | #define __NR_utimes 271 | ||
280 | #define __NR_fadvise64_64 272 | ||
281 | #define __NR_vserver 273 | ||
282 | #define __NR_mbind 274 | ||
283 | #define __NR_get_mempolicy 275 | ||
284 | #define __NR_set_mempolicy 276 | ||
285 | #define __NR_mq_open 277 | ||
286 | #define __NR_mq_unlink (__NR_mq_open+1) | ||
287 | #define __NR_mq_timedsend (__NR_mq_open+2) | ||
288 | #define __NR_mq_timedreceive (__NR_mq_open+3) | ||
289 | #define __NR_mq_notify (__NR_mq_open+4) | ||
290 | #define __NR_mq_getsetattr (__NR_mq_open+5) | ||
291 | #define __NR_kexec_load 283 | ||
292 | #define __NR_waitid 284 | ||
293 | /* 285 is unused */ | ||
294 | #define __NR_add_key 286 | ||
295 | #define __NR_request_key 287 | ||
296 | #define __NR_keyctl 288 | ||
297 | #define __NR_ioprio_set 289 | ||
298 | #define __NR_ioprio_get 290 | ||
299 | #define __NR_inotify_init 291 | ||
300 | #define __NR_inotify_add_watch 292 | ||
301 | #define __NR_inotify_rm_watch 293 | ||
302 | #define __NR_migrate_pages 294 | ||
303 | #define __NR_openat 295 | ||
304 | #define __NR_mkdirat 296 | ||
305 | #define __NR_mknodat 297 | ||
306 | #define __NR_fchownat 298 | ||
307 | #define __NR_futimesat 299 | ||
308 | #define __NR_fstatat64 300 | ||
309 | #define __NR_unlinkat 301 | ||
310 | #define __NR_renameat 302 | ||
311 | #define __NR_linkat 303 | ||
312 | #define __NR_symlinkat 304 | ||
313 | #define __NR_readlinkat 305 | ||
314 | #define __NR_fchmodat 306 | ||
315 | #define __NR_faccessat 307 | ||
316 | #define __NR_pselect6 308 | ||
317 | #define __NR_ppoll 309 | ||
318 | #define __NR_unshare 310 | ||
319 | #define __NR_set_robust_list 311 | ||
320 | #define __NR_get_robust_list 312 | ||
321 | #define __NR_splice 313 | ||
322 | #define __NR_sync_file_range 314 | ||
323 | #define __NR_tee 315 | ||
324 | #define __NR_vmsplice 316 | ||
325 | #define __NR_move_pages 317 | ||
326 | #define __NR_getcpu 318 | ||
327 | #define __NR_epoll_pwait 319 | ||
328 | #define __NR_utimensat 320 | ||
329 | #define __NR_signalfd 321 | ||
330 | /* #define __NR_timerfd 322 removed */ | ||
331 | #define __NR_eventfd 323 | ||
332 | #define __NR_fallocate 324 | ||
333 | |||
334 | #ifdef __KERNEL__ | ||
335 | |||
336 | #define NR_syscalls 325 | ||
337 | |||
338 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
339 | #define __ARCH_WANT_STAT64 | ||
340 | #define __ARCH_WANT_SYS_ALARM | ||
341 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
342 | #define __ARCH_WANT_SYS_PAUSE | ||
343 | #define __ARCH_WANT_SYS_TIME | ||
344 | #define __ARCH_WANT_SYS_UTIME | ||
345 | #define __ARCH_WANT_SYS_WAITPID | ||
346 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
347 | #define __ARCH_WANT_SYS_FADVISE64 | ||
348 | #define __ARCH_WANT_SYS_GETPGRP | ||
349 | #define __ARCH_WANT_SYS_LLSEEK | ||
350 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/ | ||
351 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
352 | #define __ARCH_WANT_SYS_RT_SIGACTION | ||
353 | |||
354 | #define __IGNORE_lchown | ||
355 | #define __IGNORE_setuid | ||
356 | #define __IGNORE_getuid | ||
357 | #define __IGNORE_setgid | ||
358 | #define __IGNORE_getgid | ||
359 | #define __IGNORE_geteuid | ||
360 | #define __IGNORE_getegid | ||
361 | #define __IGNORE_fcntl | ||
362 | #define __IGNORE_setreuid | ||
363 | #define __IGNORE_setregid | ||
364 | #define __IGNORE_getrlimit | ||
365 | #define __IGNORE_getgroups | ||
366 | #define __IGNORE_setgroups | ||
367 | #define __IGNORE_select | ||
368 | #define __IGNORE_mmap | ||
369 | #define __IGNORE_fchown | ||
370 | #define __IGNORE_setfsuid | ||
371 | #define __IGNORE_setfsgid | ||
372 | #define __IGNORE_setresuid | ||
373 | #define __IGNORE_getresuid | ||
374 | #define __IGNORE_setresgid | ||
375 | #define __IGNORE_getresgid | ||
376 | #define __IGNORE_chown | ||
377 | |||
378 | /* | ||
379 | * "Conditional" syscalls | ||
380 | * | ||
381 | * What we want is __attribute__((weak,alias("sys_ni_syscall"))), | ||
382 | * but it doesn't work on all toolchains, so we just do it by hand | ||
383 | */ | ||
384 | #ifndef cond_syscall | ||
385 | #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") | ||
386 | #endif | ||
387 | |||
388 | #endif /* __KERNEL__ */ | ||
389 | #endif /* _ASM_M32R_UNISTD_H */ | ||
diff --git a/include/asm-m32r/user.h b/include/asm-m32r/user.h deleted file mode 100644 index 03b3c11c2aff..000000000000 --- a/include/asm-m32r/user.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_USER_H | ||
2 | #define _ASM_M32R_USER_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | #include <asm/ptrace.h> | ||
6 | #include <asm/page.h> | ||
7 | |||
8 | /* | ||
9 | * Core file format: The core file is written in such a way that gdb | ||
10 | * can understand it and provide useful information to the user (under | ||
11 | * linux we use the `trad-core' bfd). | ||
12 | * | ||
13 | * The actual file contents are as follows: | ||
14 | * UPAGE: 1 page consisting of a user struct that tells gdb | ||
15 | * what is present in the file. Directly after this is a | ||
16 | * copy of the task_struct, which is currently not used by gdb, | ||
17 | * but it may come in handy at some point. All of the registers | ||
18 | * are stored as part of the upage. The upage should always be | ||
19 | * only one page. | ||
20 | * DATA: The data area is stored. We use current->end_text to | ||
21 | * current->brk to pick up all of the user variables, plus any memory | ||
22 | * that may have been sbrk'ed. No attempt is made to determine if a | ||
23 | * page is demand-zero or if a page is totally unused, we just cover | ||
24 | * the entire range. All of the addresses are rounded in such a way | ||
25 | * that an integral number of pages is written. | ||
26 | * STACK: We need the stack information in order to get a meaningful | ||
27 | * backtrace. We need to write the data from usp to | ||
28 | * current->start_stack, so we round each of these off in order to be | ||
29 | * able to write an integer number of pages. | ||
30 | */ | ||
31 | |||
32 | struct user { | ||
33 | struct pt_regs regs; /* entire machine state */ | ||
34 | size_t u_tsize; /* text size (pages) */ | ||
35 | size_t u_dsize; /* data size (pages) */ | ||
36 | size_t u_ssize; /* stack size (pages) */ | ||
37 | unsigned long start_code; /* text starting address */ | ||
38 | unsigned long start_data; /* data starting address */ | ||
39 | unsigned long start_stack; /* stack starting address */ | ||
40 | long int signal; /* signal causing core dump */ | ||
41 | unsigned long u_ar0; /* help gdb find registers */ | ||
42 | unsigned long magic; /* identifies a core file */ | ||
43 | char u_comm[32]; /* user command name */ | ||
44 | }; | ||
45 | |||
46 | #define NBPG PAGE_SIZE | ||
47 | #define UPAGES 1 | ||
48 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
49 | #define HOST_DATA_START_ADDR (u.start_data) | ||
50 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
51 | |||
52 | #endif /* _ASM_M32R_USER_H */ | ||
diff --git a/include/asm-m32r/vga.h b/include/asm-m32r/vga.h deleted file mode 100644 index a1b63061c06f..000000000000 --- a/include/asm-m32r/vga.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_VGA_H | ||
2 | #define _ASM_M32R_VGA_H | ||
3 | |||
4 | /* | ||
5 | * Access to VGA videoram | ||
6 | * | ||
7 | * (c) 1998 Martin Mares <mj@ucw.cz> | ||
8 | */ | ||
9 | |||
10 | /* | ||
11 | * On the PC, we can just recalculate addresses and then | ||
12 | * access the videoram directly without any black magic. | ||
13 | */ | ||
14 | |||
15 | #define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) | ||
16 | |||
17 | #define vga_readb(x) (*(x)) | ||
18 | #define vga_writeb(x,y) (*(y) = (x)) | ||
19 | |||
20 | #endif /* _ASM_M32R_VGA_H */ | ||
diff --git a/include/asm-m32r/xor.h b/include/asm-m32r/xor.h deleted file mode 100644 index 6d525259df3e..000000000000 --- a/include/asm-m32r/xor.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_XOR_H | ||
2 | #define _ASM_M32R_XOR_H | ||
3 | |||
4 | #include <asm-generic/xor.h> | ||
5 | |||
6 | #endif /* _ASM_M32R_XOR_H */ | ||
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index 2df74eb09563..9477af01a639 100644 --- a/include/drm/drm_pciids.h +++ b/include/drm/drm_pciids.h | |||
@@ -472,6 +472,7 @@ | |||
472 | {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 472 | {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
473 | {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 473 | {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
474 | {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 474 | {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
475 | {0x8086, 0x358e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
475 | {0, 0, 0} | 476 | {0, 0, 0} |
476 | 477 | ||
477 | #define gamma_PCI_IDS \ | 478 | #define gamma_PCI_IDS \ |
@@ -533,4 +534,5 @@ | |||
533 | {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 534 | {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
534 | {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 535 | {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
535 | {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 536 | {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
537 | {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | ||
536 | {0, 0, 0} | 538 | {0, 0, 0} |
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 67e3353a56d6..95962fa8398a 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h | |||
@@ -594,6 +594,9 @@ struct drm_i915_gem_busy { | |||
594 | #define I915_BIT_6_SWIZZLE_9_10_11 4 | 594 | #define I915_BIT_6_SWIZZLE_9_10_11 4 |
595 | /* Not seen by userland */ | 595 | /* Not seen by userland */ |
596 | #define I915_BIT_6_SWIZZLE_UNKNOWN 5 | 596 | #define I915_BIT_6_SWIZZLE_UNKNOWN 5 |
597 | /* Seen by userland. */ | ||
598 | #define I915_BIT_6_SWIZZLE_9_17 6 | ||
599 | #define I915_BIT_6_SWIZZLE_9_10_17 7 | ||
597 | 600 | ||
598 | struct drm_i915_gem_set_tiling { | 601 | struct drm_i915_gem_set_tiling { |
599 | /** Handle of the buffer to have its tiling state updated */ | 602 | /** Handle of the buffer to have its tiling state updated */ |
diff --git a/include/linux/bio.h b/include/linux/bio.h index b900d2c67d29..b89cf2d82898 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h | |||
@@ -504,6 +504,115 @@ static inline int bio_has_data(struct bio *bio) | |||
504 | return bio && bio->bi_io_vec != NULL; | 504 | return bio && bio->bi_io_vec != NULL; |
505 | } | 505 | } |
506 | 506 | ||
507 | /* | ||
508 | * BIO list managment for use by remapping drivers (e.g. DM or MD). | ||
509 | * | ||
510 | * A bio_list anchors a singly-linked list of bios chained through the bi_next | ||
511 | * member of the bio. The bio_list also caches the last list member to allow | ||
512 | * fast access to the tail. | ||
513 | */ | ||
514 | struct bio_list { | ||
515 | struct bio *head; | ||
516 | struct bio *tail; | ||
517 | }; | ||
518 | |||
519 | static inline int bio_list_empty(const struct bio_list *bl) | ||
520 | { | ||
521 | return bl->head == NULL; | ||
522 | } | ||
523 | |||
524 | static inline void bio_list_init(struct bio_list *bl) | ||
525 | { | ||
526 | bl->head = bl->tail = NULL; | ||
527 | } | ||
528 | |||
529 | #define bio_list_for_each(bio, bl) \ | ||
530 | for (bio = (bl)->head; bio; bio = bio->bi_next) | ||
531 | |||
532 | static inline unsigned bio_list_size(const struct bio_list *bl) | ||
533 | { | ||
534 | unsigned sz = 0; | ||
535 | struct bio *bio; | ||
536 | |||
537 | bio_list_for_each(bio, bl) | ||
538 | sz++; | ||
539 | |||
540 | return sz; | ||
541 | } | ||
542 | |||
543 | static inline void bio_list_add(struct bio_list *bl, struct bio *bio) | ||
544 | { | ||
545 | bio->bi_next = NULL; | ||
546 | |||
547 | if (bl->tail) | ||
548 | bl->tail->bi_next = bio; | ||
549 | else | ||
550 | bl->head = bio; | ||
551 | |||
552 | bl->tail = bio; | ||
553 | } | ||
554 | |||
555 | static inline void bio_list_add_head(struct bio_list *bl, struct bio *bio) | ||
556 | { | ||
557 | bio->bi_next = bl->head; | ||
558 | |||
559 | bl->head = bio; | ||
560 | |||
561 | if (!bl->tail) | ||
562 | bl->tail = bio; | ||
563 | } | ||
564 | |||
565 | static inline void bio_list_merge(struct bio_list *bl, struct bio_list *bl2) | ||
566 | { | ||
567 | if (!bl2->head) | ||
568 | return; | ||
569 | |||
570 | if (bl->tail) | ||
571 | bl->tail->bi_next = bl2->head; | ||
572 | else | ||
573 | bl->head = bl2->head; | ||
574 | |||
575 | bl->tail = bl2->tail; | ||
576 | } | ||
577 | |||
578 | static inline void bio_list_merge_head(struct bio_list *bl, | ||
579 | struct bio_list *bl2) | ||
580 | { | ||
581 | if (!bl2->head) | ||
582 | return; | ||
583 | |||
584 | if (bl->head) | ||
585 | bl2->tail->bi_next = bl->head; | ||
586 | else | ||
587 | bl->tail = bl2->tail; | ||
588 | |||
589 | bl->head = bl2->head; | ||
590 | } | ||
591 | |||
592 | static inline struct bio *bio_list_pop(struct bio_list *bl) | ||
593 | { | ||
594 | struct bio *bio = bl->head; | ||
595 | |||
596 | if (bio) { | ||
597 | bl->head = bl->head->bi_next; | ||
598 | if (!bl->head) | ||
599 | bl->tail = NULL; | ||
600 | |||
601 | bio->bi_next = NULL; | ||
602 | } | ||
603 | |||
604 | return bio; | ||
605 | } | ||
606 | |||
607 | static inline struct bio *bio_list_get(struct bio_list *bl) | ||
608 | { | ||
609 | struct bio *bio = bl->head; | ||
610 | |||
611 | bl->head = bl->tail = NULL; | ||
612 | |||
613 | return bio; | ||
614 | } | ||
615 | |||
507 | #if defined(CONFIG_BLK_DEV_INTEGRITY) | 616 | #if defined(CONFIG_BLK_DEV_INTEGRITY) |
508 | 617 | ||
509 | #define bip_vec_idx(bip, idx) (&(bip->bip_vec[(idx)])) | 618 | #define bip_vec_idx(bip, idx) (&(bip->bip_vec[(idx)])) |
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index 7b73bb8f1970..16ed0284d780 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h | |||
@@ -155,6 +155,7 @@ void create_empty_buffers(struct page *, unsigned long, | |||
155 | unsigned long b_state); | 155 | unsigned long b_state); |
156 | void end_buffer_read_sync(struct buffer_head *bh, int uptodate); | 156 | void end_buffer_read_sync(struct buffer_head *bh, int uptodate); |
157 | void end_buffer_write_sync(struct buffer_head *bh, int uptodate); | 157 | void end_buffer_write_sync(struct buffer_head *bh, int uptodate); |
158 | void end_buffer_async_write(struct buffer_head *bh, int uptodate); | ||
158 | 159 | ||
159 | /* Things to do with buffers at mapping->private_list */ | 160 | /* Things to do with buffers at mapping->private_list */ |
160 | void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode); | 161 | void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode); |
@@ -197,6 +198,8 @@ extern int buffer_heads_over_limit; | |||
197 | void block_invalidatepage(struct page *page, unsigned long offset); | 198 | void block_invalidatepage(struct page *page, unsigned long offset); |
198 | int block_write_full_page(struct page *page, get_block_t *get_block, | 199 | int block_write_full_page(struct page *page, get_block_t *get_block, |
199 | struct writeback_control *wbc); | 200 | struct writeback_control *wbc); |
201 | int block_write_full_page_endio(struct page *page, get_block_t *get_block, | ||
202 | struct writeback_control *wbc, bh_end_io_t *handler); | ||
200 | int block_read_full_page(struct page*, get_block_t*); | 203 | int block_read_full_page(struct page*, get_block_t*); |
201 | int block_is_partially_uptodate(struct page *page, read_descriptor_t *desc, | 204 | int block_is_partially_uptodate(struct page *page, read_descriptor_t *desc, |
202 | unsigned long from); | 205 | unsigned long from); |
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 573819ef4cc0..5a40d14daa9f 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h | |||
@@ -143,7 +143,9 @@ extern u64 timecounter_cyc2time(struct timecounter *tc, | |||
143 | * 400-499: Perfect | 143 | * 400-499: Perfect |
144 | * The ideal clocksource. A must-use where | 144 | * The ideal clocksource. A must-use where |
145 | * available. | 145 | * available. |
146 | * @read: returns a cycle value | 146 | * @read: returns a cycle value, passes clocksource as argument |
147 | * @enable: optional function to enable the clocksource | ||
148 | * @disable: optional function to disable the clocksource | ||
147 | * @mask: bitmask for two's complement | 149 | * @mask: bitmask for two's complement |
148 | * subtraction of non 64 bit counters | 150 | * subtraction of non 64 bit counters |
149 | * @mult: cycle to nanosecond multiplier (adjusted by NTP) | 151 | * @mult: cycle to nanosecond multiplier (adjusted by NTP) |
@@ -162,7 +164,9 @@ struct clocksource { | |||
162 | char *name; | 164 | char *name; |
163 | struct list_head list; | 165 | struct list_head list; |
164 | int rating; | 166 | int rating; |
165 | cycle_t (*read)(void); | 167 | cycle_t (*read)(struct clocksource *cs); |
168 | int (*enable)(struct clocksource *cs); | ||
169 | void (*disable)(struct clocksource *cs); | ||
166 | cycle_t mask; | 170 | cycle_t mask; |
167 | u32 mult; | 171 | u32 mult; |
168 | u32 mult_orig; | 172 | u32 mult_orig; |
@@ -271,7 +275,34 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant) | |||
271 | */ | 275 | */ |
272 | static inline cycle_t clocksource_read(struct clocksource *cs) | 276 | static inline cycle_t clocksource_read(struct clocksource *cs) |
273 | { | 277 | { |
274 | return cs->read(); | 278 | return cs->read(cs); |
279 | } | ||
280 | |||
281 | /** | ||
282 | * clocksource_enable: - enable clocksource | ||
283 | * @cs: pointer to clocksource | ||
284 | * | ||
285 | * Enables the specified clocksource. The clocksource callback | ||
286 | * function should start up the hardware and setup mult and field | ||
287 | * members of struct clocksource to reflect hardware capabilities. | ||
288 | */ | ||
289 | static inline int clocksource_enable(struct clocksource *cs) | ||
290 | { | ||
291 | return cs->enable ? cs->enable(cs) : 0; | ||
292 | } | ||
293 | |||
294 | /** | ||
295 | * clocksource_disable: - disable clocksource | ||
296 | * @cs: pointer to clocksource | ||
297 | * | ||
298 | * Disables the specified clocksource. The clocksource callback | ||
299 | * function should power down the now unused hardware block to | ||
300 | * save power. | ||
301 | */ | ||
302 | static inline void clocksource_disable(struct clocksource *cs) | ||
303 | { | ||
304 | if (cs->disable) | ||
305 | cs->disable(cs); | ||
275 | } | 306 | } |
276 | 307 | ||
277 | /** | 308 | /** |
diff --git a/include/linux/debug_locks.h b/include/linux/debug_locks.h index 493dedb7a67b..29b3ce3f2a1d 100644 --- a/include/linux/debug_locks.h +++ b/include/linux/debug_locks.h | |||
@@ -3,6 +3,7 @@ | |||
3 | 3 | ||
4 | #include <linux/kernel.h> | 4 | #include <linux/kernel.h> |
5 | #include <asm/atomic.h> | 5 | #include <asm/atomic.h> |
6 | #include <asm/system.h> | ||
6 | 7 | ||
7 | struct task_struct; | 8 | struct task_struct; |
8 | 9 | ||
diff --git a/include/linux/device.h b/include/linux/device.h index 2918c0e8fdfd..6a69caaac18a 100644 --- a/include/linux/device.h +++ b/include/linux/device.h | |||
@@ -551,6 +551,7 @@ extern int (*platform_notify_remove)(struct device *dev); | |||
551 | extern struct device *get_device(struct device *dev); | 551 | extern struct device *get_device(struct device *dev); |
552 | extern void put_device(struct device *dev); | 552 | extern void put_device(struct device *dev); |
553 | 553 | ||
554 | extern void wait_for_device_probe(void); | ||
554 | 555 | ||
555 | /* drivers/base/power/shutdown.c */ | 556 | /* drivers/base/power/shutdown.c */ |
556 | extern void device_shutdown(void); | 557 | extern void device_shutdown(void); |
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h index baabf33be244..a0d9422a1569 100644 --- a/include/linux/dynamic_debug.h +++ b/include/linux/dynamic_debug.h | |||
@@ -70,7 +70,7 @@ extern int ddebug_remove_module(char *mod_name); | |||
70 | DEBUG_HASH2, __LINE__, _DPRINTK_FLAGS_DEFAULT }; \ | 70 | DEBUG_HASH2, __LINE__, _DPRINTK_FLAGS_DEFAULT }; \ |
71 | if (__dynamic_dbg_enabled(descriptor)) \ | 71 | if (__dynamic_dbg_enabled(descriptor)) \ |
72 | dev_printk(KERN_DEBUG, dev, \ | 72 | dev_printk(KERN_DEBUG, dev, \ |
73 | KBUILD_MODNAME ": " pr_fmt(fmt),\ | 73 | KBUILD_MODNAME ": " fmt, \ |
74 | ##__VA_ARGS__); \ | 74 | ##__VA_ARGS__); \ |
75 | } while (0) | 75 | } while (0) |
76 | 76 | ||
diff --git a/include/linux/fb.h b/include/linux/fb.h index f563c5013932..330c4b1bfcaa 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h | |||
@@ -173,8 +173,12 @@ struct fb_fix_screeninfo { | |||
173 | /* Interpretation of offset for color fields: All offsets are from the right, | 173 | /* Interpretation of offset for color fields: All offsets are from the right, |
174 | * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you | 174 | * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you |
175 | * can use the offset as right argument to <<). A pixel afterwards is a bit | 175 | * can use the offset as right argument to <<). A pixel afterwards is a bit |
176 | * stream and is written to video memory as that unmodified. This implies | 176 | * stream and is written to video memory as that unmodified. |
177 | * big-endian byte order if bits_per_pixel is greater than 8. | 177 | * |
178 | * For pseudocolor: offset and length should be the same for all color | ||
179 | * components. Offset specifies the position of the least significant bit | ||
180 | * of the pallette index in a pixel value. Length indicates the number | ||
181 | * of available palette entries (i.e. # of entries = 1 << length). | ||
178 | */ | 182 | */ |
179 | struct fb_bitfield { | 183 | struct fb_bitfield { |
180 | __u32 offset; /* beginning of bitfield */ | 184 | __u32 offset; /* beginning of bitfield */ |
diff --git a/include/linux/fiemap.h b/include/linux/fiemap.h index 671decbd2aeb..934e22d65801 100644 --- a/include/linux/fiemap.h +++ b/include/linux/fiemap.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef _LINUX_FIEMAP_H | 11 | #ifndef _LINUX_FIEMAP_H |
12 | #define _LINUX_FIEMAP_H | 12 | #define _LINUX_FIEMAP_H |
13 | 13 | ||
14 | #include <linux/types.h> | ||
15 | |||
14 | struct fiemap_extent { | 16 | struct fiemap_extent { |
15 | __u64 fe_logical; /* logical offset in bytes for the start of | 17 | __u64 fe_logical; /* logical offset in bytes for the start of |
16 | * the extent from the beginning of the file */ | 18 | * the extent from the beginning of the file */ |
diff --git a/include/linux/fs.h b/include/linux/fs.h index 562d2855cf30..5bed436f4353 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h | |||
@@ -87,6 +87,60 @@ struct inodes_stat_t { | |||
87 | */ | 87 | */ |
88 | #define FMODE_NOCMTIME ((__force fmode_t)2048) | 88 | #define FMODE_NOCMTIME ((__force fmode_t)2048) |
89 | 89 | ||
90 | /* | ||
91 | * The below are the various read and write types that we support. Some of | ||
92 | * them include behavioral modifiers that send information down to the | ||
93 | * block layer and IO scheduler. Terminology: | ||
94 | * | ||
95 | * The block layer uses device plugging to defer IO a little bit, in | ||
96 | * the hope that we will see more IO very shortly. This increases | ||
97 | * coalescing of adjacent IO and thus reduces the number of IOs we | ||
98 | * have to send to the device. It also allows for better queuing, | ||
99 | * if the IO isn't mergeable. If the caller is going to be waiting | ||
100 | * for the IO, then he must ensure that the device is unplugged so | ||
101 | * that the IO is dispatched to the driver. | ||
102 | * | ||
103 | * All IO is handled async in Linux. This is fine for background | ||
104 | * writes, but for reads or writes that someone waits for completion | ||
105 | * on, we want to notify the block layer and IO scheduler so that they | ||
106 | * know about it. That allows them to make better scheduling | ||
107 | * decisions. So when the below references 'sync' and 'async', it | ||
108 | * is referencing this priority hint. | ||
109 | * | ||
110 | * With that in mind, the available types are: | ||
111 | * | ||
112 | * READ A normal read operation. Device will be plugged. | ||
113 | * READ_SYNC A synchronous read. Device is not plugged, caller can | ||
114 | * immediately wait on this read without caring about | ||
115 | * unplugging. | ||
116 | * READA Used for read-ahead operations. Lower priority, and the | ||
117 | * block layer could (in theory) choose to ignore this | ||
118 | * request if it runs into resource problems. | ||
119 | * WRITE A normal async write. Device will be plugged. | ||
120 | * SWRITE Like WRITE, but a special case for ll_rw_block() that | ||
121 | * tells it to lock the buffer first. Normally a buffer | ||
122 | * must be locked before doing IO. | ||
123 | * WRITE_SYNC_PLUG Synchronous write. Identical to WRITE, but passes down | ||
124 | * the hint that someone will be waiting on this IO | ||
125 | * shortly. The device must still be unplugged explicitly, | ||
126 | * WRITE_SYNC_PLUG does not do this as we could be | ||
127 | * submitting more writes before we actually wait on any | ||
128 | * of them. | ||
129 | * WRITE_SYNC Like WRITE_SYNC_PLUG, but also unplugs the device | ||
130 | * immediately after submission. The write equivalent | ||
131 | * of READ_SYNC. | ||
132 | * WRITE_ODIRECT Special case write for O_DIRECT only. | ||
133 | * SWRITE_SYNC | ||
134 | * SWRITE_SYNC_PLUG Like WRITE_SYNC/WRITE_SYNC_PLUG, but locks the buffer. | ||
135 | * See SWRITE. | ||
136 | * WRITE_BARRIER Like WRITE, but tells the block layer that all | ||
137 | * previously submitted writes must be safely on storage | ||
138 | * before this one is started. Also guarantees that when | ||
139 | * this write is complete, it itself is also safely on | ||
140 | * storage. Prevents reordering of writes on both sides | ||
141 | * of this IO. | ||
142 | * | ||
143 | */ | ||
90 | #define RW_MASK 1 | 144 | #define RW_MASK 1 |
91 | #define RWA_MASK 2 | 145 | #define RWA_MASK 2 |
92 | #define READ 0 | 146 | #define READ 0 |
@@ -102,6 +156,11 @@ struct inodes_stat_t { | |||
102 | (SWRITE | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_NOIDLE)) | 156 | (SWRITE | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_NOIDLE)) |
103 | #define SWRITE_SYNC (SWRITE_SYNC_PLUG | (1 << BIO_RW_UNPLUG)) | 157 | #define SWRITE_SYNC (SWRITE_SYNC_PLUG | (1 << BIO_RW_UNPLUG)) |
104 | #define WRITE_BARRIER (WRITE | (1 << BIO_RW_BARRIER)) | 158 | #define WRITE_BARRIER (WRITE | (1 << BIO_RW_BARRIER)) |
159 | |||
160 | /* | ||
161 | * These aren't really reads or writes, they pass down information about | ||
162 | * parts of device that are now unused by the file system. | ||
163 | */ | ||
105 | #define DISCARD_NOBARRIER (1 << BIO_RW_DISCARD) | 164 | #define DISCARD_NOBARRIER (1 << BIO_RW_DISCARD) |
106 | #define DISCARD_BARRIER ((1 << BIO_RW_DISCARD) | (1 << BIO_RW_BARRIER)) | 165 | #define DISCARD_BARRIER ((1 << BIO_RW_DISCARD) | (1 << BIO_RW_BARRIER)) |
107 | 166 | ||
@@ -738,9 +797,6 @@ enum inode_i_mutex_lock_class | |||
738 | I_MUTEX_QUOTA | 797 | I_MUTEX_QUOTA |
739 | }; | 798 | }; |
740 | 799 | ||
741 | extern void inode_double_lock(struct inode *inode1, struct inode *inode2); | ||
742 | extern void inode_double_unlock(struct inode *inode1, struct inode *inode2); | ||
743 | |||
744 | /* | 800 | /* |
745 | * NOTE: in a 32bit arch with a preemptable kernel and | 801 | * NOTE: in a 32bit arch with a preemptable kernel and |
746 | * an UP compile the i_size_read/write must be atomic | 802 | * an UP compile the i_size_read/write must be atomic |
@@ -2150,8 +2206,6 @@ extern ssize_t generic_file_splice_read(struct file *, loff_t *, | |||
2150 | struct pipe_inode_info *, size_t, unsigned int); | 2206 | struct pipe_inode_info *, size_t, unsigned int); |
2151 | extern ssize_t generic_file_splice_write(struct pipe_inode_info *, | 2207 | extern ssize_t generic_file_splice_write(struct pipe_inode_info *, |
2152 | struct file *, loff_t *, size_t, unsigned int); | 2208 | struct file *, loff_t *, size_t, unsigned int); |
2153 | extern ssize_t generic_file_splice_write_nolock(struct pipe_inode_info *, | ||
2154 | struct file *, loff_t *, size_t, unsigned int); | ||
2155 | extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe, | 2209 | extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe, |
2156 | struct file *out, loff_t *, size_t len, unsigned int flags); | 2210 | struct file *out, loff_t *, size_t len, unsigned int flags); |
2157 | extern long do_splice_direct(struct file *in, loff_t *ppos, struct file *out, | 2211 | extern long do_splice_direct(struct file *in, loff_t *ppos, struct file *out, |
@@ -2245,9 +2299,8 @@ extern int vfs_readdir(struct file *, filldir_t, void *); | |||
2245 | 2299 | ||
2246 | extern int vfs_stat(char __user *, struct kstat *); | 2300 | extern int vfs_stat(char __user *, struct kstat *); |
2247 | extern int vfs_lstat(char __user *, struct kstat *); | 2301 | extern int vfs_lstat(char __user *, struct kstat *); |
2248 | extern int vfs_stat_fd(int dfd, char __user *, struct kstat *); | ||
2249 | extern int vfs_lstat_fd(int dfd, char __user *, struct kstat *); | ||
2250 | extern int vfs_fstat(unsigned int, struct kstat *); | 2302 | extern int vfs_fstat(unsigned int, struct kstat *); |
2303 | extern int vfs_fstatat(int , char __user *, struct kstat *, int); | ||
2251 | 2304 | ||
2252 | extern int do_vfs_ioctl(struct file *filp, unsigned int fd, unsigned int cmd, | 2305 | extern int do_vfs_ioctl(struct file *filp, unsigned int fd, unsigned int cmd, |
2253 | unsigned long arg); | 2306 | unsigned long arg); |
@@ -2395,7 +2448,7 @@ struct ctl_table; | |||
2395 | int proc_nr_files(struct ctl_table *table, int write, struct file *filp, | 2448 | int proc_nr_files(struct ctl_table *table, int write, struct file *filp, |
2396 | void __user *buffer, size_t *lenp, loff_t *ppos); | 2449 | void __user *buffer, size_t *lenp, loff_t *ppos); |
2397 | 2450 | ||
2398 | int get_filesystem_list(char * buf); | 2451 | int __init get_filesystem_list(char *buf); |
2399 | 2452 | ||
2400 | #endif /* __KERNEL__ */ | 2453 | #endif /* __KERNEL__ */ |
2401 | #endif /* _LINUX_FS_H */ | 2454 | #endif /* _LINUX_FS_H */ |
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index f2a78b5e8b55..244677cc082b 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h | |||
@@ -43,10 +43,6 @@ | |||
43 | * | 43 | * |
44 | */ | 44 | */ |
45 | 45 | ||
46 | /* Flags related to I2C device features */ | ||
47 | #define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001 | ||
48 | #define FSL_I2C_DEV_CLOCK_5200 0x00000002 | ||
49 | |||
50 | enum fsl_usb2_operating_modes { | 46 | enum fsl_usb2_operating_modes { |
51 | FSL_USB2_MPH_HOST, | 47 | FSL_USB2_MPH_HOST, |
52 | FSL_USB2_DR_HOST, | 48 | FSL_USB2_DR_HOST, |
@@ -83,6 +79,10 @@ struct fsl_spi_platform_data { | |||
83 | u16 max_chipselect; | 79 | u16 max_chipselect; |
84 | void (*cs_control)(struct spi_device *spi, bool on); | 80 | void (*cs_control)(struct spi_device *spi, bool on); |
85 | u32 sysclk; | 81 | u32 sysclk; |
82 | |||
83 | /* Legacy hooks, used by mpc52xx_psc_spi driver. */ | ||
84 | void (*activate_cs)(u8 cs, u8 polarity); | ||
85 | void (*deactivate_cs)(u8 cs, u8 polarity); | ||
86 | }; | 86 | }; |
87 | 87 | ||
88 | struct mpc8xx_pcmcia_ops { | 88 | struct mpc8xx_pcmcia_ops { |
diff --git a/include/linux/init.h b/include/linux/init.h index 68cb0265d009..f121a7a10c3d 100644 --- a/include/linux/init.h +++ b/include/linux/init.h | |||
@@ -247,6 +247,7 @@ struct obs_kernel_param { | |||
247 | 247 | ||
248 | /* Relies on boot_command_line being set */ | 248 | /* Relies on boot_command_line being set */ |
249 | void __init parse_early_param(void); | 249 | void __init parse_early_param(void); |
250 | void __init parse_early_options(char *cmdline); | ||
250 | #endif /* __ASSEMBLY__ */ | 251 | #endif /* __ASSEMBLY__ */ |
251 | 252 | ||
252 | /** | 253 | /** |
diff --git a/include/linux/init_task.h b/include/linux/init_task.h index dcfb93337e9a..d87247d2641f 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h | |||
@@ -15,19 +15,6 @@ | |||
15 | extern struct files_struct init_files; | 15 | extern struct files_struct init_files; |
16 | extern struct fs_struct init_fs; | 16 | extern struct fs_struct init_fs; |
17 | 17 | ||
18 | #define INIT_KIOCTX(name, which_mm) \ | ||
19 | { \ | ||
20 | .users = ATOMIC_INIT(1), \ | ||
21 | .dead = 0, \ | ||
22 | .mm = &which_mm, \ | ||
23 | .user_id = 0, \ | ||
24 | .next = NULL, \ | ||
25 | .wait = __WAIT_QUEUE_HEAD_INITIALIZER(name.wait), \ | ||
26 | .ctx_lock = __SPIN_LOCK_UNLOCKED(name.ctx_lock), \ | ||
27 | .reqs_active = 0U, \ | ||
28 | .max_reqs = ~0U, \ | ||
29 | } | ||
30 | |||
31 | #define INIT_MM(name) \ | 18 | #define INIT_MM(name) \ |
32 | { \ | 19 | { \ |
33 | .mm_rb = RB_ROOT, \ | 20 | .mm_rb = RB_ROOT, \ |
diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h index 7ebdb4fb4e54..65aae34759de 100644 --- a/include/linux/ipmi.h +++ b/include/linux/ipmi.h | |||
@@ -198,6 +198,8 @@ struct kernel_ipmi_msg { | |||
198 | response. When you send a | 198 | response. When you send a |
199 | response message, this will | 199 | response message, this will |
200 | be returned. */ | 200 | be returned. */ |
201 | #define IPMI_OEM_RECV_TYPE 5 /* The response for OEM Channels */ | ||
202 | |||
201 | /* Note that async events and received commands do not have a completion | 203 | /* Note that async events and received commands do not have a completion |
202 | code as the first byte of the incoming data, unlike a response. */ | 204 | code as the first byte of the incoming data, unlike a response. */ |
203 | 205 | ||
diff --git a/include/linux/ipmi_msgdefs.h b/include/linux/ipmi_msgdefs.h index b56a158d587a..df97e6e31e87 100644 --- a/include/linux/ipmi_msgdefs.h +++ b/include/linux/ipmi_msgdefs.h | |||
@@ -58,6 +58,12 @@ | |||
58 | #define IPMI_READ_EVENT_MSG_BUFFER_CMD 0x35 | 58 | #define IPMI_READ_EVENT_MSG_BUFFER_CMD 0x35 |
59 | #define IPMI_GET_CHANNEL_INFO_CMD 0x42 | 59 | #define IPMI_GET_CHANNEL_INFO_CMD 0x42 |
60 | 60 | ||
61 | /* Bit for BMC global enables. */ | ||
62 | #define IPMI_BMC_RCV_MSG_INTR 0x01 | ||
63 | #define IPMI_BMC_EVT_MSG_INTR 0x02 | ||
64 | #define IPMI_BMC_EVT_MSG_BUFF 0x04 | ||
65 | #define IPMI_BMC_SYS_LOG 0x08 | ||
66 | |||
61 | #define IPMI_NETFN_STORAGE_REQUEST 0x0a | 67 | #define IPMI_NETFN_STORAGE_REQUEST 0x0a |
62 | #define IPMI_NETFN_STORAGE_RESPONSE 0x0b | 68 | #define IPMI_NETFN_STORAGE_RESPONSE 0x0b |
63 | #define IPMI_ADD_SEL_ENTRY_CMD 0x44 | 69 | #define IPMI_ADD_SEL_ENTRY_CMD 0x44 |
@@ -109,5 +115,7 @@ | |||
109 | #define IPMI_CHANNEL_MEDIUM_USB1 10 | 115 | #define IPMI_CHANNEL_MEDIUM_USB1 10 |
110 | #define IPMI_CHANNEL_MEDIUM_USB2 11 | 116 | #define IPMI_CHANNEL_MEDIUM_USB2 11 |
111 | #define IPMI_CHANNEL_MEDIUM_SYSINTF 12 | 117 | #define IPMI_CHANNEL_MEDIUM_SYSINTF 12 |
118 | #define IPMI_CHANNEL_MEDIUM_OEM_MIN 0x60 | ||
119 | #define IPMI_CHANNEL_MEDIUM_OEM_MAX 0x7f | ||
112 | 120 | ||
113 | #endif /* __LINUX_IPMI_MSGDEFS_H */ | 121 | #endif /* __LINUX_IPMI_MSGDEFS_H */ |
diff --git a/include/linux/kernel.h b/include/linux/kernel.h index d9e75ec7def5..883cd44ff765 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h | |||
@@ -377,6 +377,15 @@ static inline char *pack_hex_byte(char *buf, u8 byte) | |||
377 | #define pr_cont(fmt, ...) \ | 377 | #define pr_cont(fmt, ...) \ |
378 | printk(KERN_CONT fmt, ##__VA_ARGS__) | 378 | printk(KERN_CONT fmt, ##__VA_ARGS__) |
379 | 379 | ||
380 | /* pr_devel() should produce zero code unless DEBUG is defined */ | ||
381 | #ifdef DEBUG | ||
382 | #define pr_devel(fmt, ...) \ | ||
383 | printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__) | ||
384 | #else | ||
385 | #define pr_devel(fmt, ...) \ | ||
386 | ({ if (0) printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__); 0; }) | ||
387 | #endif | ||
388 | |||
380 | /* If you are writing a driver, please use dev_dbg instead */ | 389 | /* If you are writing a driver, please use dev_dbg instead */ |
381 | #if defined(DEBUG) | 390 | #if defined(DEBUG) |
382 | #define pr_debug(fmt, ...) \ | 391 | #define pr_debug(fmt, ...) \ |
diff --git a/include/linux/libata.h b/include/linux/libata.h index b450a2628855..3d501db36a26 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h | |||
@@ -209,6 +209,7 @@ enum { | |||
209 | 209 | ||
210 | /* bits 24:31 of ap->flags are reserved for LLD specific flags */ | 210 | /* bits 24:31 of ap->flags are reserved for LLD specific flags */ |
211 | 211 | ||
212 | |||
212 | /* struct ata_port pflags */ | 213 | /* struct ata_port pflags */ |
213 | ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */ | 214 | ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */ |
214 | ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */ | 215 | ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */ |
@@ -225,6 +226,9 @@ enum { | |||
225 | ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */ | 226 | ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */ |
226 | ATA_PFLAG_INIT_GTM_VALID = (1 << 19), /* initial gtm data valid */ | 227 | ATA_PFLAG_INIT_GTM_VALID = (1 << 19), /* initial gtm data valid */ |
227 | 228 | ||
229 | ATA_PFLAG_PIO32 = (1 << 20), /* 32bit PIO */ | ||
230 | ATA_PFLAG_PIO32CHANGE = (1 << 21), /* 32bit PIO can be turned on/off */ | ||
231 | |||
228 | /* struct ata_queued_cmd flags */ | 232 | /* struct ata_queued_cmd flags */ |
229 | ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ | 233 | ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ |
230 | ATA_QCFLAG_DMAMAP = (1 << 1), /* SG table is DMA mapped */ | 234 | ATA_QCFLAG_DMAMAP = (1 << 1), /* SG table is DMA mapped */ |
@@ -689,7 +693,10 @@ struct ata_port { | |||
689 | struct Scsi_Host *scsi_host; /* our co-allocated scsi host */ | 693 | struct Scsi_Host *scsi_host; /* our co-allocated scsi host */ |
690 | struct ata_port_operations *ops; | 694 | struct ata_port_operations *ops; |
691 | spinlock_t *lock; | 695 | spinlock_t *lock; |
696 | /* Flags owned by the EH context. Only EH should touch these once the | ||
697 | port is active */ | ||
692 | unsigned long flags; /* ATA_FLAG_xxx */ | 698 | unsigned long flags; /* ATA_FLAG_xxx */ |
699 | /* Flags that change dynamically, protected by ap->lock */ | ||
693 | unsigned int pflags; /* ATA_PFLAG_xxx */ | 700 | unsigned int pflags; /* ATA_PFLAG_xxx */ |
694 | unsigned int print_id; /* user visible unique port ID */ | 701 | unsigned int print_id; /* user visible unique port ID */ |
695 | unsigned int port_no; /* 0 based port no. inside the host */ | 702 | unsigned int port_no; /* 0 based port no. inside the host */ |
@@ -1595,6 +1602,7 @@ extern void ata_sff_drain_fifo(struct ata_queued_cmd *qc); | |||
1595 | extern void ata_sff_error_handler(struct ata_port *ap); | 1602 | extern void ata_sff_error_handler(struct ata_port *ap); |
1596 | extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc); | 1603 | extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc); |
1597 | extern int ata_sff_port_start(struct ata_port *ap); | 1604 | extern int ata_sff_port_start(struct ata_port *ap); |
1605 | extern int ata_sff_port_start32(struct ata_port *ap); | ||
1598 | extern void ata_sff_std_ports(struct ata_ioports *ioaddr); | 1606 | extern void ata_sff_std_ports(struct ata_ioports *ioaddr); |
1599 | extern unsigned long ata_bmdma_mode_filter(struct ata_device *dev, | 1607 | extern unsigned long ata_bmdma_mode_filter(struct ata_device *dev, |
1600 | unsigned long xfer_mask); | 1608 | unsigned long xfer_mask); |
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index 18146c980b68..a9e3b76aa884 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h | |||
@@ -75,7 +75,7 @@ int mm_match_cgroup(const struct mm_struct *mm, const struct mem_cgroup *cgroup) | |||
75 | { | 75 | { |
76 | struct mem_cgroup *mem; | 76 | struct mem_cgroup *mem; |
77 | rcu_read_lock(); | 77 | rcu_read_lock(); |
78 | mem = mem_cgroup_from_task((mm)->owner); | 78 | mem = mem_cgroup_from_task(rcu_dereference((mm)->owner)); |
79 | rcu_read_unlock(); | 79 | rcu_read_unlock(); |
80 | return cgroup == mem; | 80 | return cgroup == mem; |
81 | } | 81 | } |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index ee98cd570885..06ba90c211a5 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2514,6 +2514,8 @@ | |||
2514 | #define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433 | 2514 | #define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433 |
2515 | #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 | 2515 | #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 |
2516 | #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 | 2516 | #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 |
2517 | #define PCI_DEVICE_ID_INTEL_82854_HB 0x358c | ||
2518 | #define PCI_DEVICE_ID_INTEL_82854_IG 0x358e | ||
2517 | #define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 | 2519 | #define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 |
2518 | #define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 | 2520 | #define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 |
2519 | #define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 | 2521 | #define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 |
diff --git a/include/linux/percpu-defs.h b/include/linux/percpu-defs.h new file mode 100644 index 000000000000..8f921d74f49f --- /dev/null +++ b/include/linux/percpu-defs.h | |||
@@ -0,0 +1,84 @@ | |||
1 | #ifndef _LINUX_PERCPU_DEFS_H | ||
2 | #define _LINUX_PERCPU_DEFS_H | ||
3 | |||
4 | /* | ||
5 | * Determine the real variable name from the name visible in the | ||
6 | * kernel sources. | ||
7 | */ | ||
8 | #define per_cpu_var(var) per_cpu__##var | ||
9 | |||
10 | /* | ||
11 | * Base implementations of per-CPU variable declarations and definitions, where | ||
12 | * the section in which the variable is to be placed is provided by the | ||
13 | * 'section' argument. This may be used to affect the parameters governing the | ||
14 | * variable's storage. | ||
15 | * | ||
16 | * NOTE! The sections for the DECLARE and for the DEFINE must match, lest | ||
17 | * linkage errors occur due the compiler generating the wrong code to access | ||
18 | * that section. | ||
19 | */ | ||
20 | #define DECLARE_PER_CPU_SECTION(type, name, section) \ | ||
21 | extern \ | ||
22 | __attribute__((__section__(PER_CPU_BASE_SECTION section))) \ | ||
23 | PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name | ||
24 | |||
25 | #define DEFINE_PER_CPU_SECTION(type, name, section) \ | ||
26 | __attribute__((__section__(PER_CPU_BASE_SECTION section))) \ | ||
27 | PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name | ||
28 | |||
29 | /* | ||
30 | * Variant on the per-CPU variable declaration/definition theme used for | ||
31 | * ordinary per-CPU variables. | ||
32 | */ | ||
33 | #define DECLARE_PER_CPU(type, name) \ | ||
34 | DECLARE_PER_CPU_SECTION(type, name, "") | ||
35 | |||
36 | #define DEFINE_PER_CPU(type, name) \ | ||
37 | DEFINE_PER_CPU_SECTION(type, name, "") | ||
38 | |||
39 | /* | ||
40 | * Declaration/definition used for per-CPU variables that must come first in | ||
41 | * the set of variables. | ||
42 | */ | ||
43 | #define DECLARE_PER_CPU_FIRST(type, name) \ | ||
44 | DECLARE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION) | ||
45 | |||
46 | #define DEFINE_PER_CPU_FIRST(type, name) \ | ||
47 | DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION) | ||
48 | |||
49 | /* | ||
50 | * Declaration/definition used for per-CPU variables that must be cacheline | ||
51 | * aligned under SMP conditions so that, whilst a particular instance of the | ||
52 | * data corresponds to a particular CPU, inefficiencies due to direct access by | ||
53 | * other CPUs are reduced by preventing the data from unnecessarily spanning | ||
54 | * cachelines. | ||
55 | * | ||
56 | * An example of this would be statistical data, where each CPU's set of data | ||
57 | * is updated by that CPU alone, but the data from across all CPUs is collated | ||
58 | * by a CPU processing a read from a proc file. | ||
59 | */ | ||
60 | #define DECLARE_PER_CPU_SHARED_ALIGNED(type, name) \ | ||
61 | DECLARE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \ | ||
62 | ____cacheline_aligned_in_smp | ||
63 | |||
64 | #define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ | ||
65 | DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \ | ||
66 | ____cacheline_aligned_in_smp | ||
67 | |||
68 | /* | ||
69 | * Declaration/definition used for per-CPU variables that must be page aligned. | ||
70 | */ | ||
71 | #define DECLARE_PER_CPU_PAGE_ALIGNED(type, name) \ | ||
72 | DECLARE_PER_CPU_SECTION(type, name, ".page_aligned") | ||
73 | |||
74 | #define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \ | ||
75 | DEFINE_PER_CPU_SECTION(type, name, ".page_aligned") | ||
76 | |||
77 | /* | ||
78 | * Intermodule exports for per-CPU variables. | ||
79 | */ | ||
80 | #define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var) | ||
81 | #define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var) | ||
82 | |||
83 | |||
84 | #endif /* _LINUX_PERCPU_DEFS_H */ | ||
diff --git a/include/linux/percpu.h b/include/linux/percpu.h index cfda2d5ad319..1581ff235c7e 100644 --- a/include/linux/percpu.h +++ b/include/linux/percpu.h | |||
@@ -9,50 +9,6 @@ | |||
9 | 9 | ||
10 | #include <asm/percpu.h> | 10 | #include <asm/percpu.h> |
11 | 11 | ||
12 | #ifndef PER_CPU_BASE_SECTION | ||
13 | #ifdef CONFIG_SMP | ||
14 | #define PER_CPU_BASE_SECTION ".data.percpu" | ||
15 | #else | ||
16 | #define PER_CPU_BASE_SECTION ".data" | ||
17 | #endif | ||
18 | #endif | ||
19 | |||
20 | #ifdef CONFIG_SMP | ||
21 | |||
22 | #ifdef MODULE | ||
23 | #define PER_CPU_SHARED_ALIGNED_SECTION "" | ||
24 | #else | ||
25 | #define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned" | ||
26 | #endif | ||
27 | #define PER_CPU_FIRST_SECTION ".first" | ||
28 | |||
29 | #else | ||
30 | |||
31 | #define PER_CPU_SHARED_ALIGNED_SECTION "" | ||
32 | #define PER_CPU_FIRST_SECTION "" | ||
33 | |||
34 | #endif | ||
35 | |||
36 | #define DEFINE_PER_CPU_SECTION(type, name, section) \ | ||
37 | __attribute__((__section__(PER_CPU_BASE_SECTION section))) \ | ||
38 | PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name | ||
39 | |||
40 | #define DEFINE_PER_CPU(type, name) \ | ||
41 | DEFINE_PER_CPU_SECTION(type, name, "") | ||
42 | |||
43 | #define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ | ||
44 | DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \ | ||
45 | ____cacheline_aligned_in_smp | ||
46 | |||
47 | #define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \ | ||
48 | DEFINE_PER_CPU_SECTION(type, name, ".page_aligned") | ||
49 | |||
50 | #define DEFINE_PER_CPU_FIRST(type, name) \ | ||
51 | DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION) | ||
52 | |||
53 | #define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var) | ||
54 | #define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var) | ||
55 | |||
56 | /* enough to cover all DEFINE_PER_CPUs in modules */ | 12 | /* enough to cover all DEFINE_PER_CPUs in modules */ |
57 | #ifdef CONFIG_MODULES | 13 | #ifdef CONFIG_MODULES |
58 | #define PERCPU_MODULE_RESERVE (8 << 10) | 14 | #define PERCPU_MODULE_RESERVE (8 << 10) |
diff --git a/include/linux/pipe_fs_i.h b/include/linux/pipe_fs_i.h index 8e4120285f72..c8f038554e80 100644 --- a/include/linux/pipe_fs_i.h +++ b/include/linux/pipe_fs_i.h | |||
@@ -134,6 +134,11 @@ struct pipe_buf_operations { | |||
134 | memory allocation, whereas PIPE_BUF makes atomicity guarantees. */ | 134 | memory allocation, whereas PIPE_BUF makes atomicity guarantees. */ |
135 | #define PIPE_SIZE PAGE_SIZE | 135 | #define PIPE_SIZE PAGE_SIZE |
136 | 136 | ||
137 | /* Pipe lock and unlock operations */ | ||
138 | void pipe_lock(struct pipe_inode_info *); | ||
139 | void pipe_unlock(struct pipe_inode_info *); | ||
140 | void pipe_double_lock(struct pipe_inode_info *, struct pipe_inode_info *); | ||
141 | |||
137 | /* Drop the inode semaphore and wait for a pipe event, atomically */ | 142 | /* Drop the inode semaphore and wait for a pipe event, atomically */ |
138 | void pipe_wait(struct pipe_inode_info *pipe); | 143 | void pipe_wait(struct pipe_inode_info *pipe); |
139 | 144 | ||
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h index 76e470a299bf..72736fd8223c 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h | |||
@@ -77,4 +77,46 @@ extern int platform_driver_probe(struct platform_driver *driver, | |||
77 | #define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) | 77 | #define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) |
78 | #define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) | 78 | #define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) |
79 | 79 | ||
80 | /* early platform driver interface */ | ||
81 | struct early_platform_driver { | ||
82 | const char *class_str; | ||
83 | struct platform_driver *pdrv; | ||
84 | struct list_head list; | ||
85 | int requested_id; | ||
86 | }; | ||
87 | |||
88 | #define EARLY_PLATFORM_ID_UNSET -2 | ||
89 | #define EARLY_PLATFORM_ID_ERROR -3 | ||
90 | |||
91 | extern int early_platform_driver_register(struct early_platform_driver *epdrv, | ||
92 | char *buf); | ||
93 | extern void early_platform_add_devices(struct platform_device **devs, int num); | ||
94 | |||
95 | static inline int is_early_platform_device(struct platform_device *pdev) | ||
96 | { | ||
97 | return !pdev->dev.driver; | ||
98 | } | ||
99 | |||
100 | extern void early_platform_driver_register_all(char *class_str); | ||
101 | extern int early_platform_driver_probe(char *class_str, | ||
102 | int nr_probe, int user_only); | ||
103 | extern void early_platform_cleanup(void); | ||
104 | |||
105 | |||
106 | #ifndef MODULE | ||
107 | #define early_platform_init(class_string, platform_driver) \ | ||
108 | static __initdata struct early_platform_driver early_driver = { \ | ||
109 | .class_str = class_string, \ | ||
110 | .pdrv = platform_driver, \ | ||
111 | .requested_id = EARLY_PLATFORM_ID_UNSET, \ | ||
112 | }; \ | ||
113 | static int __init early_platform_driver_setup_func(char *buf) \ | ||
114 | { \ | ||
115 | return early_platform_driver_register(&early_driver, buf); \ | ||
116 | } \ | ||
117 | early_param(class_string, early_platform_driver_setup_func) | ||
118 | #else /* MODULE */ | ||
119 | #define early_platform_init(class_string, platform_driver) | ||
120 | #endif /* MODULE */ | ||
121 | |||
80 | #endif /* _PLATFORM_DEVICE_H_ */ | 122 | #endif /* _PLATFORM_DEVICE_H_ */ |
diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h index 0cdda00f2b2a..58b2aa5312b9 100644 --- a/include/linux/rcutree.h +++ b/include/linux/rcutree.h | |||
@@ -161,9 +161,8 @@ struct rcu_data { | |||
161 | unsigned long offline_fqs; /* Kicked due to being offline. */ | 161 | unsigned long offline_fqs; /* Kicked due to being offline. */ |
162 | unsigned long resched_ipi; /* Sent a resched IPI. */ | 162 | unsigned long resched_ipi; /* Sent a resched IPI. */ |
163 | 163 | ||
164 | /* 5) state to allow this CPU to force_quiescent_state on others */ | 164 | /* 5) For future __rcu_pending statistics. */ |
165 | long n_rcu_pending; /* rcu_pending() calls since boot. */ | 165 | long n_rcu_pending; /* rcu_pending() calls since boot. */ |
166 | long n_rcu_pending_force_qs; /* when to force quiescent states. */ | ||
167 | 166 | ||
168 | int cpu; | 167 | int cpu; |
169 | }; | 168 | }; |
diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h index 5621d87c4479..6b361d23a499 100644 --- a/include/linux/reiserfs_fs_sb.h +++ b/include/linux/reiserfs_fs_sb.h | |||
@@ -193,7 +193,7 @@ struct reiserfs_journal { | |||
193 | atomic_t j_wcount; /* count of writers for current commit */ | 193 | atomic_t j_wcount; /* count of writers for current commit */ |
194 | unsigned long j_bcount; /* batch count. allows turning X transactions into 1 */ | 194 | unsigned long j_bcount; /* batch count. allows turning X transactions into 1 */ |
195 | unsigned long j_first_unflushed_offset; /* first unflushed transactions offset */ | 195 | unsigned long j_first_unflushed_offset; /* first unflushed transactions offset */ |
196 | unsigned long j_last_flush_trans_id; /* last fully flushed journal timestamp */ | 196 | unsigned j_last_flush_trans_id; /* last fully flushed journal timestamp */ |
197 | struct buffer_head *j_header_bh; | 197 | struct buffer_head *j_header_bh; |
198 | 198 | ||
199 | time_t j_trans_start_time; /* time this transaction started */ | 199 | time_t j_trans_start_time; /* time this transaction started */ |
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h index 262a8dccfa81..167c33361d9c 100644 --- a/include/linux/seccomp.h +++ b/include/linux/seccomp.h | |||
@@ -21,6 +21,8 @@ extern long prctl_set_seccomp(unsigned long); | |||
21 | 21 | ||
22 | #else /* CONFIG_SECCOMP */ | 22 | #else /* CONFIG_SECCOMP */ |
23 | 23 | ||
24 | #include <linux/errno.h> | ||
25 | |||
24 | typedef struct { } seccomp_t; | 26 | typedef struct { } seccomp_t; |
25 | 27 | ||
26 | #define secure_computing(x) do { } while (0) | 28 | #define secure_computing(x) do { } while (0) |
diff --git a/include/linux/sht15.h b/include/linux/sht15.h new file mode 100644 index 000000000000..046bce05ecab --- /dev/null +++ b/include/linux/sht15.h | |||
@@ -0,0 +1,24 @@ | |||
1 | /* | ||
2 | * sht15.h - support for the SHT15 Temperature and Humidity Sensor | ||
3 | * | ||
4 | * Copyright (c) 2009 Jonathan Cameron | ||
5 | * | ||
6 | * Copyright (c) 2007 Wouter Horre | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /** | ||
14 | * struct sht15_platform_data - sht15 connectivity info | ||
15 | * @gpio_data: no. of gpio to which bidirectional data line is connected | ||
16 | * @gpio_sck: no. of gpio to which the data clock is connected. | ||
17 | * @supply_mv: supply voltage in mv. Overridden by regulator if available. | ||
18 | **/ | ||
19 | struct sht15_platform_data { | ||
20 | int gpio_data; | ||
21 | int gpio_sck; | ||
22 | int supply_mv; | ||
23 | }; | ||
24 | |||
diff --git a/include/linux/slow-work.h b/include/linux/slow-work.h index 85958277f83d..b65c8881f07a 100644 --- a/include/linux/slow-work.h +++ b/include/linux/slow-work.h | |||
@@ -67,7 +67,7 @@ static inline void slow_work_init(struct slow_work *work, | |||
67 | } | 67 | } |
68 | 68 | ||
69 | /** | 69 | /** |
70 | * slow_work_init - Initialise a very slow work item | 70 | * vslow_work_init - Initialise a very slow work item |
71 | * @work: The work item to initialise | 71 | * @work: The work item to initialise |
72 | * @ops: The operations to use to handle the slow work item | 72 | * @ops: The operations to use to handle the slow work item |
73 | * | 73 | * |
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h index 05eab2f11e63..2ea20320c093 100644 --- a/include/linux/spi/ads7846.h +++ b/include/linux/spi/ads7846.h | |||
@@ -51,5 +51,6 @@ struct ads7846_platform_data { | |||
51 | void **filter_data); | 51 | void **filter_data); |
52 | int (*filter) (void *filter_data, int data_idx, int *val); | 52 | int (*filter) (void *filter_data, int data_idx, int *val); |
53 | void (*filter_cleanup)(void *filter_data); | 53 | void (*filter_cleanup)(void *filter_data); |
54 | void (*wait_for_sync)(void); | ||
54 | }; | 55 | }; |
55 | 56 | ||
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 2cc43fa380cb..a0faa18f7b1b 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h | |||
@@ -245,7 +245,12 @@ struct spi_master { | |||
245 | */ | 245 | */ |
246 | u16 dma_alignment; | 246 | u16 dma_alignment; |
247 | 247 | ||
248 | /* setup mode and clock, etc (spi driver may call many times) */ | 248 | /* Setup mode and clock, etc (spi driver may call many times). |
249 | * | ||
250 | * IMPORTANT: this may be called when transfers to another | ||
251 | * device are active. DO NOT UPDATE SHARED REGISTERS in ways | ||
252 | * which could break those transfers. | ||
253 | */ | ||
249 | int (*setup)(struct spi_device *spi); | 254 | int (*setup)(struct spi_device *spi); |
250 | 255 | ||
251 | /* bidirectional bulk transfers | 256 | /* bidirectional bulk transfers |
diff --git a/include/linux/splice.h b/include/linux/splice.h index 528dcb93c2f2..5f3faa9d15ae 100644 --- a/include/linux/splice.h +++ b/include/linux/splice.h | |||
@@ -36,6 +36,8 @@ struct splice_desc { | |||
36 | void *data; /* cookie */ | 36 | void *data; /* cookie */ |
37 | } u; | 37 | } u; |
38 | loff_t pos; /* file position */ | 38 | loff_t pos; /* file position */ |
39 | size_t num_spliced; /* number of bytes already spliced */ | ||
40 | bool need_wakeup; /* need to wake up writer */ | ||
39 | }; | 41 | }; |
40 | 42 | ||
41 | struct partial_page { | 43 | struct partial_page { |
@@ -66,6 +68,16 @@ extern ssize_t splice_from_pipe(struct pipe_inode_info *, struct file *, | |||
66 | splice_actor *); | 68 | splice_actor *); |
67 | extern ssize_t __splice_from_pipe(struct pipe_inode_info *, | 69 | extern ssize_t __splice_from_pipe(struct pipe_inode_info *, |
68 | struct splice_desc *, splice_actor *); | 70 | struct splice_desc *, splice_actor *); |
71 | extern int splice_from_pipe_feed(struct pipe_inode_info *, struct splice_desc *, | ||
72 | splice_actor *); | ||
73 | extern int splice_from_pipe_next(struct pipe_inode_info *, | ||
74 | struct splice_desc *); | ||
75 | extern void splice_from_pipe_begin(struct splice_desc *); | ||
76 | extern void splice_from_pipe_end(struct pipe_inode_info *, | ||
77 | struct splice_desc *); | ||
78 | extern int pipe_to_file(struct pipe_inode_info *, struct pipe_buffer *, | ||
79 | struct splice_desc *); | ||
80 | |||
69 | extern ssize_t splice_to_pipe(struct pipe_inode_info *, | 81 | extern ssize_t splice_to_pipe(struct pipe_inode_info *, |
70 | struct splice_pipe_desc *); | 82 | struct splice_pipe_desc *); |
71 | extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, | 83 | extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, |
diff --git a/include/linux/suspend.h b/include/linux/suspend.h index 3e3a4364cbff..795032edfc46 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h | |||
@@ -58,10 +58,17 @@ typedef int __bitwise suspend_state_t; | |||
58 | * by @begin(). | 58 | * by @begin(). |
59 | * @prepare() is called right after devices have been suspended (ie. the | 59 | * @prepare() is called right after devices have been suspended (ie. the |
60 | * appropriate .suspend() method has been executed for each device) and | 60 | * appropriate .suspend() method has been executed for each device) and |
61 | * before the nonboot CPUs are disabled (it is executed with IRQs enabled). | 61 | * before device drivers' late suspend callbacks are executed. It returns |
62 | * This callback is optional. It returns 0 on success or a negative | 62 | * 0 on success or a negative error code otherwise, in which case the |
63 | * error code otherwise, in which case the system cannot enter the desired | 63 | * system cannot enter the desired sleep state (@prepare_late(), @enter(), |
64 | * sleep state (@enter() and @finish() will not be called in that case). | 64 | * @wake(), and @finish() will not be called in that case). |
65 | * | ||
66 | * @prepare_late: Finish preparing the platform for entering the system sleep | ||
67 | * state indicated by @begin(). | ||
68 | * @prepare_late is called before disabling nonboot CPUs and after | ||
69 | * device drivers' late suspend callbacks have been executed. It returns | ||
70 | * 0 on success or a negative error code otherwise, in which case the | ||
71 | * system cannot enter the desired sleep state (@enter() and @wake()). | ||
65 | * | 72 | * |
66 | * @enter: Enter the system sleep state indicated by @begin() or represented by | 73 | * @enter: Enter the system sleep state indicated by @begin() or represented by |
67 | * the argument if @begin() is not implemented. | 74 | * the argument if @begin() is not implemented. |
@@ -69,19 +76,26 @@ typedef int __bitwise suspend_state_t; | |||
69 | * error code otherwise, in which case the system cannot enter the desired | 76 | * error code otherwise, in which case the system cannot enter the desired |
70 | * sleep state. | 77 | * sleep state. |
71 | * | 78 | * |
72 | * @finish: Called when the system has just left a sleep state, right after | 79 | * @wake: Called when the system has just left a sleep state, right after |
73 | * the nonboot CPUs have been enabled and before devices are resumed (it is | 80 | * the nonboot CPUs have been enabled and before device drivers' early |
74 | * executed with IRQs enabled). | 81 | * resume callbacks are executed. |
82 | * This callback is optional, but should be implemented by the platforms | ||
83 | * that implement @prepare_late(). If implemented, it is always called | ||
84 | * after @enter(), even if @enter() fails. | ||
85 | * | ||
86 | * @finish: Finish wake-up of the platform. | ||
87 | * @finish is called right prior to calling device drivers' regular suspend | ||
88 | * callbacks. | ||
75 | * This callback is optional, but should be implemented by the platforms | 89 | * This callback is optional, but should be implemented by the platforms |
76 | * that implement @prepare(). If implemented, it is always called after | 90 | * that implement @prepare(). If implemented, it is always called after |
77 | * @enter() (even if @enter() fails). | 91 | * @enter() and @wake(), if implemented, even if any of them fails. |
78 | * | 92 | * |
79 | * @end: Called by the PM core right after resuming devices, to indicate to | 93 | * @end: Called by the PM core right after resuming devices, to indicate to |
80 | * the platform that the system has returned to the working state or | 94 | * the platform that the system has returned to the working state or |
81 | * the transition to the sleep state has been aborted. | 95 | * the transition to the sleep state has been aborted. |
82 | * This callback is optional, but should be implemented by the platforms | 96 | * This callback is optional, but should be implemented by the platforms |
83 | * that implement @begin(), but platforms implementing @begin() should | 97 | * that implement @begin(). Accordingly, platforms implementing @begin() |
84 | * also provide a @end() which cleans up transitions aborted before | 98 | * should also provide a @end() which cleans up transitions aborted before |
85 | * @enter(). | 99 | * @enter(). |
86 | * | 100 | * |
87 | * @recover: Recover the platform from a suspend failure. | 101 | * @recover: Recover the platform from a suspend failure. |
@@ -93,7 +107,9 @@ struct platform_suspend_ops { | |||
93 | int (*valid)(suspend_state_t state); | 107 | int (*valid)(suspend_state_t state); |
94 | int (*begin)(suspend_state_t state); | 108 | int (*begin)(suspend_state_t state); |
95 | int (*prepare)(void); | 109 | int (*prepare)(void); |
110 | int (*prepare_late)(void); | ||
96 | int (*enter)(suspend_state_t state); | 111 | int (*enter)(suspend_state_t state); |
112 | void (*wake)(void); | ||
97 | void (*finish)(void); | 113 | void (*finish)(void); |
98 | void (*end)(void); | 114 | void (*end)(void); |
99 | void (*recover)(void); | 115 | void (*recover)(void); |
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index dabe4ad89141..40617c1d8976 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h | |||
@@ -148,7 +148,7 @@ struct old_linux_dirent; | |||
148 | asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \ | 148 | asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \ |
149 | "\t.globl ." #alias "\n\t.set ." #alias ", ." #name) | 149 | "\t.globl ." #alias "\n\t.set ." #alias ", ." #name) |
150 | #else | 150 | #else |
151 | #ifdef CONFIG_ALPHA | 151 | #if defined(CONFIG_ALPHA) || defined(CONFIG_MIPS) |
152 | #define SYSCALL_ALIAS(alias, name) \ | 152 | #define SYSCALL_ALIAS(alias, name) \ |
153 | asm ( #alias " = " #name "\n\t.globl " #alias) | 153 | asm ( #alias " = " #name "\n\t.globl " #alias) |
154 | #else | 154 | #else |
diff --git a/include/linux/usb.h b/include/linux/usb.h index c6b2ab41b908..3aa2cd1f8d08 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h | |||
@@ -1387,6 +1387,7 @@ extern int usb_string(struct usb_device *dev, int index, | |||
1387 | extern int usb_clear_halt(struct usb_device *dev, int pipe); | 1387 | extern int usb_clear_halt(struct usb_device *dev, int pipe); |
1388 | extern int usb_reset_configuration(struct usb_device *dev); | 1388 | extern int usb_reset_configuration(struct usb_device *dev); |
1389 | extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate); | 1389 | extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate); |
1390 | extern void usb_reset_endpoint(struct usb_device *dev, unsigned int epaddr); | ||
1390 | 1391 | ||
1391 | /* this request isn't really synchronous, but it belongs with the others */ | 1392 | /* this request isn't really synchronous, but it belongs with the others */ |
1392 | extern int usb_driver_set_configuration(struct usb_device *udev, int config); | 1393 | extern int usb_driver_set_configuration(struct usb_device *udev, int config); |
@@ -1491,14 +1492,6 @@ void usb_sg_wait(struct usb_sg_request *io); | |||
1491 | #define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) | 1492 | #define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) |
1492 | #define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) | 1493 | #define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) |
1493 | 1494 | ||
1494 | /* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */ | ||
1495 | #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1) | ||
1496 | #define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep))) | ||
1497 | #define usb_settoggle(dev, ep, out, bit) \ | ||
1498 | ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \ | ||
1499 | ((bit) << (ep))) | ||
1500 | |||
1501 | |||
1502 | static inline unsigned int __create_pipe(struct usb_device *dev, | 1495 | static inline unsigned int __create_pipe(struct usb_device *dev, |
1503 | unsigned int endpoint) | 1496 | unsigned int endpoint) |
1504 | { | 1497 | { |
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h index b95842542590..625e9e4639c6 100644 --- a/include/linux/usb/serial.h +++ b/include/linux/usb/serial.h | |||
@@ -29,7 +29,7 @@ | |||
29 | /** | 29 | /** |
30 | * usb_serial_port: structure for the specific ports of a device. | 30 | * usb_serial_port: structure for the specific ports of a device. |
31 | * @serial: pointer back to the struct usb_serial owner of this port. | 31 | * @serial: pointer back to the struct usb_serial owner of this port. |
32 | * @tty: pointer to the corresponding tty for this port. | 32 | * @port: pointer to the corresponding tty_port for this port. |
33 | * @lock: spinlock to grab when updating portions of this structure. | 33 | * @lock: spinlock to grab when updating portions of this structure. |
34 | * @mutex: mutex used to synchronize serial_open() and serial_close() | 34 | * @mutex: mutex used to synchronize serial_open() and serial_close() |
35 | * access for this port. | 35 | * access for this port. |
@@ -44,19 +44,22 @@ | |||
44 | * @interrupt_out_endpointAddress: endpoint address for the interrupt out pipe | 44 | * @interrupt_out_endpointAddress: endpoint address for the interrupt out pipe |
45 | * for this port. | 45 | * for this port. |
46 | * @bulk_in_buffer: pointer to the bulk in buffer for this port. | 46 | * @bulk_in_buffer: pointer to the bulk in buffer for this port. |
47 | * @bulk_in_size: the size of the bulk_in_buffer, in bytes. | ||
47 | * @read_urb: pointer to the bulk in struct urb for this port. | 48 | * @read_urb: pointer to the bulk in struct urb for this port. |
48 | * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this | 49 | * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this |
49 | * port. | 50 | * port. |
50 | * @bulk_out_buffer: pointer to the bulk out buffer for this port. | 51 | * @bulk_out_buffer: pointer to the bulk out buffer for this port. |
51 | * @bulk_out_size: the size of the bulk_out_buffer, in bytes. | 52 | * @bulk_out_size: the size of the bulk_out_buffer, in bytes. |
52 | * @write_urb: pointer to the bulk out struct urb for this port. | 53 | * @write_urb: pointer to the bulk out struct urb for this port. |
54 | * @write_urb_busy: port`s writing status | ||
53 | * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this | 55 | * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this |
54 | * port. | 56 | * port. |
55 | * @write_wait: a wait_queue_head_t used by the port. | 57 | * @write_wait: a wait_queue_head_t used by the port. |
56 | * @work: work queue entry for the line discipline waking up. | 58 | * @work: work queue entry for the line discipline waking up. |
57 | * @open_count: number of times this port has been opened. | ||
58 | * @throttled: nonzero if the read urb is inactive to throttle the device | 59 | * @throttled: nonzero if the read urb is inactive to throttle the device |
59 | * @throttle_req: nonzero if the tty wants to throttle us | 60 | * @throttle_req: nonzero if the tty wants to throttle us |
61 | * @console: attached usb serial console | ||
62 | * @dev: pointer to the serial device | ||
60 | * | 63 | * |
61 | * This structure is used by the usb-serial core and drivers for the specific | 64 | * This structure is used by the usb-serial core and drivers for the specific |
62 | * ports of a device. | 65 | * ports of a device. |
diff --git a/include/sound/jack.h b/include/sound/jack.h index 6b013c6f6a04..f236e426a706 100644 --- a/include/sound/jack.h +++ b/include/sound/jack.h | |||
@@ -50,6 +50,8 @@ struct snd_jack { | |||
50 | int type; | 50 | int type; |
51 | const char *id; | 51 | const char *id; |
52 | char name[100]; | 52 | char name[100]; |
53 | void *private_data; | ||
54 | void (*private_free)(struct snd_jack *); | ||
53 | }; | 55 | }; |
54 | 56 | ||
55 | #ifdef CONFIG_SND_JACK | 57 | #ifdef CONFIG_SND_JACK |
diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 8904b1900d7f..c17296891617 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h | |||
@@ -268,7 +268,8 @@ struct snd_pcm_runtime { | |||
268 | int overrange; | 268 | int overrange; |
269 | snd_pcm_uframes_t avail_max; | 269 | snd_pcm_uframes_t avail_max; |
270 | snd_pcm_uframes_t hw_ptr_base; /* Position at buffer restart */ | 270 | snd_pcm_uframes_t hw_ptr_base; /* Position at buffer restart */ |
271 | snd_pcm_uframes_t hw_ptr_interrupt; /* Position at interrupt time*/ | 271 | snd_pcm_uframes_t hw_ptr_interrupt; /* Position at interrupt time */ |
272 | unsigned long hw_ptr_jiffies; /* Time when hw_ptr is updated */ | ||
272 | 273 | ||
273 | /* -- HW params -- */ | 274 | /* -- HW params -- */ |
274 | snd_pcm_access_t access; /* access mode */ | 275 | snd_pcm_access_t access; /* access mode */ |
diff --git a/include/video/cyblafb.h b/include/video/cyblafb.h deleted file mode 100644 index d3c1d4e2c8e3..000000000000 --- a/include/video/cyblafb.h +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | |||
2 | #ifndef CYBLAFB_DEBUG | ||
3 | #define CYBLAFB_DEBUG 0 | ||
4 | #endif | ||
5 | |||
6 | #if CYBLAFB_DEBUG | ||
7 | #define debug(f,a...) printk("%s:" f, __func__ , ## a); | ||
8 | #else | ||
9 | #define debug(f,a...) | ||
10 | #endif | ||
11 | |||
12 | #define output(f, a...) printk("cyblafb: " f, ## a) | ||
13 | |||
14 | #define Kb (1024) | ||
15 | #define Mb (Kb*Kb) | ||
16 | |||
17 | /* PCI IDS of supported cards temporarily here */ | ||
18 | |||
19 | #define CYBERBLADEi1 0x8500 | ||
20 | |||
21 | /* these defines are for 'lcd' variable */ | ||
22 | #define LCD_STRETCH 0 | ||
23 | #define LCD_CENTER 1 | ||
24 | #define LCD_BIOS 2 | ||
25 | |||
26 | /* display types */ | ||
27 | #define DISPLAY_CRT 0 | ||
28 | #define DISPLAY_FP 1 | ||
29 | |||
30 | #define ROP_S 0xCC | ||
31 | |||
32 | #define point(x,y) ((y)<<16|(x)) | ||
33 | |||
34 | // | ||
35 | // Attribute Regs, ARxx, 3c0/3c1 | ||
36 | // | ||
37 | #define AR00 0x00 | ||
38 | #define AR01 0x01 | ||
39 | #define AR02 0x02 | ||
40 | #define AR03 0x03 | ||
41 | #define AR04 0x04 | ||
42 | #define AR05 0x05 | ||
43 | #define AR06 0x06 | ||
44 | #define AR07 0x07 | ||
45 | #define AR08 0x08 | ||
46 | #define AR09 0x09 | ||
47 | #define AR0A 0x0A | ||
48 | #define AR0B 0x0B | ||
49 | #define AR0C 0x0C | ||
50 | #define AR0D 0x0D | ||
51 | #define AR0E 0x0E | ||
52 | #define AR0F 0x0F | ||
53 | #define AR10 0x10 | ||
54 | #define AR12 0x12 | ||
55 | #define AR13 0x13 | ||
56 | |||
57 | // | ||
58 | // Sequencer Regs, SRxx, 3c4/3c5 | ||
59 | // | ||
60 | #define SR00 0x00 | ||
61 | #define SR01 0x01 | ||
62 | #define SR02 0x02 | ||
63 | #define SR03 0x03 | ||
64 | #define SR04 0x04 | ||
65 | #define SR0D 0x0D | ||
66 | #define SR0E 0x0E | ||
67 | #define SR11 0x11 | ||
68 | #define SR18 0x18 | ||
69 | #define SR19 0x19 | ||
70 | |||
71 | // | ||
72 | // | ||
73 | // | ||
74 | #define CR00 0x00 | ||
75 | #define CR01 0x01 | ||
76 | #define CR02 0x02 | ||
77 | #define CR03 0x03 | ||
78 | #define CR04 0x04 | ||
79 | #define CR05 0x05 | ||
80 | #define CR06 0x06 | ||
81 | #define CR07 0x07 | ||
82 | #define CR08 0x08 | ||
83 | #define CR09 0x09 | ||
84 | #define CR0A 0x0A | ||
85 | #define CR0B 0x0B | ||
86 | #define CR0C 0x0C | ||
87 | #define CR0D 0x0D | ||
88 | #define CR0E 0x0E | ||
89 | #define CR0F 0x0F | ||
90 | #define CR10 0x10 | ||
91 | #define CR11 0x11 | ||
92 | #define CR12 0x12 | ||
93 | #define CR13 0x13 | ||
94 | #define CR14 0x14 | ||
95 | #define CR15 0x15 | ||
96 | #define CR16 0x16 | ||
97 | #define CR17 0x17 | ||
98 | #define CR18 0x18 | ||
99 | #define CR19 0x19 | ||
100 | #define CR1A 0x1A | ||
101 | #define CR1B 0x1B | ||
102 | #define CR1C 0x1C | ||
103 | #define CR1D 0x1D | ||
104 | #define CR1E 0x1E | ||
105 | #define CR1F 0x1F | ||
106 | #define CR20 0x20 | ||
107 | #define CR21 0x21 | ||
108 | #define CR27 0x27 | ||
109 | #define CR29 0x29 | ||
110 | #define CR2A 0x2A | ||
111 | #define CR2B 0x2B | ||
112 | #define CR2D 0x2D | ||
113 | #define CR2F 0x2F | ||
114 | #define CR36 0x36 | ||
115 | #define CR38 0x38 | ||
116 | #define CR39 0x39 | ||
117 | #define CR3A 0x3A | ||
118 | #define CR55 0x55 | ||
119 | #define CR56 0x56 | ||
120 | #define CR57 0x57 | ||
121 | #define CR58 0x58 | ||
122 | |||
123 | // | ||
124 | // | ||
125 | // | ||
126 | |||
127 | #define GR00 0x01 | ||
128 | #define GR01 0x01 | ||
129 | #define GR02 0x02 | ||
130 | #define GR03 0x03 | ||
131 | #define GR04 0x04 | ||
132 | #define GR05 0x05 | ||
133 | #define GR06 0x06 | ||
134 | #define GR07 0x07 | ||
135 | #define GR08 0x08 | ||
136 | #define GR0F 0x0F | ||
137 | #define GR20 0x20 | ||
138 | #define GR23 0x23 | ||
139 | #define GR2F 0x2F | ||
140 | #define GR30 0x30 | ||
141 | #define GR31 0x31 | ||
142 | #define GR33 0x33 | ||
143 | #define GR52 0x52 | ||
144 | #define GR53 0x53 | ||
145 | #define GR5D 0x5d | ||
146 | |||
147 | |||
148 | // | ||
149 | // Graphics Engine | ||
150 | // | ||
151 | #define GEBase 0x2100 // could be mapped elsewhere if we like it | ||
152 | #define GE00 (GEBase+0x00) // source 1, p 111 | ||
153 | #define GE04 (GEBase+0x04) // source 2, p 111 | ||
154 | #define GE08 (GEBase+0x08) // destination 1, p 111 | ||
155 | #define GE0C (GEBase+0x0C) // destination 2, p 112 | ||
156 | #define GE10 (GEBase+0x10) // right view base & enable, p 112 | ||
157 | #define GE13 (GEBase+0x13) // left view base & enable, p 112 | ||
158 | #define GE18 (GEBase+0x18) // block write start address, p 112 | ||
159 | #define GE1C (GEBase+0x1C) // block write end address, p 112 | ||
160 | #define GE20 (GEBase+0x20) // engine status, p 113 | ||
161 | #define GE24 (GEBase+0x24) // reset all GE pointers | ||
162 | #define GE44 (GEBase+0x44) // command register, p 126 | ||
163 | #define GE48 (GEBase+0x48) // raster operation, p 127 | ||
164 | #define GE60 (GEBase+0x60) // foreground color, p 128 | ||
165 | #define GE64 (GEBase+0x64) // background color, p 128 | ||
166 | #define GE6C (GEBase+0x6C) // Pattern and Style, p 129, ok | ||
167 | #define GE9C (GEBase+0x9C) // pixel engine data port, p 125 | ||
168 | #define GEB8 (GEBase+0xB8) // Destination Stride / Buffer Base 0, p 133 | ||
169 | #define GEBC (GEBase+0xBC) // Destination Stride / Buffer Base 1, p 133 | ||
170 | #define GEC0 (GEBase+0xC0) // Destination Stride / Buffer Base 2, p 133 | ||
171 | #define GEC4 (GEBase+0xC4) // Destination Stride / Buffer Base 3, p 133 | ||
172 | #define GEC8 (GEBase+0xC8) // Source Stride / Buffer Base 0, p 133 | ||
173 | #define GECC (GEBase+0xCC) // Source Stride / Buffer Base 1, p 133 | ||
174 | #define GED0 (GEBase+0xD0) // Source Stride / Buffer Base 2, p 133 | ||
175 | #define GED4 (GEBase+0xD4) // Source Stride / Buffer Base 3, p 133 | ||