10 files changed, 278 insertions, 114 deletions

diff --git a/include/asm-powerpc/cputhreads.h b/include/asm-powerpc/cputhreads.h
new file mode 100644
index 000000000000..8485c28b5f47
--- /dev/null
+++ b/include/asm-powerpc/cputhreads.h
@@ -0,0 +1,71 @@
+#ifndef _ASM_POWERPC_CPUTHREADS_H
+#define _ASM_POWERPC_CPUTHREADS_H
+
+#include <linux/cpumask.h>
+
+/*
+ * Mapping of threads to cores
+ */
+
+#ifdef CONFIG_SMP
+extern int threads_per_core;
+extern int threads_shift;
+extern cpumask_t threads_core_mask;
+#else
+#define threads_per_core        1
+#define threads_shift           0
+#define threads_core_mask       (CPU_MASK_CPU0)
+#endif
+
+/* cpu_thread_mask_to_cores - Return a cpumask of one per cores
+ *                            hit by the argument
+ *
+ * @threads:    a cpumask of threads
+ *
+ * This function returns a cpumask which will have one "cpu" (or thread)
+ * bit set for each core that has at least one thread set in the argument.
+ *
+ * This can typically be used for things like IPI for tlb invalidations
+ * since those need to be done only once per core/TLB
+ */
+static inline cpumask_t cpu_thread_mask_to_cores(cpumask_t threads)
+{
+        cpumask_t       tmp, res;
+        int             i;
+
+        res = CPU_MASK_NONE;
+        for (i = 0; i < NR_CPUS; i += threads_per_core) {
+                cpus_shift_right(tmp, threads_core_mask, i);
+                if (cpus_intersects(threads, tmp))
+                        cpu_set(i, res);
+        }
+        return res;
+}
+
+static inline int cpu_nr_cores(void)
+{
+        return NR_CPUS >> threads_shift;
+}
+
+static inline cpumask_t cpu_online_cores_map(void)
+{
+        return cpu_thread_mask_to_cores(cpu_online_map);
+}
+
+static inline int cpu_thread_to_core(int cpu)
+{
+        return cpu >> threads_shift;
+}
+
+static inline int cpu_thread_in_core(int cpu)
+{
+        return cpu & (threads_per_core - 1);
+}
+
+static inline int cpu_first_thread_in_core(int cpu)
+{
+        return cpu & ~(threads_per_core - 1);
+}
+
+#endif /* _ASM_POWERPC_CPUTHREADS_H */
+
diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h
index 3671c128f271..1e41bd1c8502 100644
--- a/include/asm-powerpc/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -64,7 +64,7 @@ enum {
         FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
         FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
         FW_FEATURE_CELLEB_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_BEAT,
-        FW_FEATURE_CELLEB_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_BEAT,
+        FW_FEATURE_CELLEB_ALWAYS = 0,
         FW_FEATURE_NATIVE_POSSIBLE = 0,
         FW_FEATURE_NATIVE_ALWAYS = 0,
         FW_FEATURE_POSSIBLE =
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index 4a82fdccee92..7a3cef785abd 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -69,10 +69,9 @@ struct iommu_table {
 };
 
 struct scatterlist;
-struct device_node;
 
 /* Frees table for an individual device node */
-extern void iommu_free_table(struct device_node *dn);
+extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
 
 /* Initializes an iommu_table based in values set in the passed-in
  * structure
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 82328dec2b52..12e5e773c67e 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -180,6 +180,7 @@ extern int mmu_vmalloc_psize;
 extern int mmu_io_psize;
 extern int mmu_kernel_ssize;
 extern int mmu_highuser_ssize;
+extern u16 mmu_slb_size;
 
 /*
  * If the processor supports 64k normal pages but not 64k cache
diff --git a/include/asm-powerpc/of_platform.h b/include/asm-powerpc/of_platform.h
index 80e6fad28b4f..d20a4cd08fa1 100644
--- a/include/asm-powerpc/of_platform.h
+++ b/include/asm-powerpc/of_platform.h
@@ -15,8 +15,14 @@
 #include <linux/of_platform.h>
 
 /* Platform drivers register/unregister */
-extern int of_register_platform_driver(struct of_platform_driver *drv);
-extern void of_unregister_platform_driver(struct of_platform_driver *drv);
+static inline int of_register_platform_driver(struct of_platform_driver *drv)
+{
+        return of_register_driver(drv, &of_platform_bus_type);
+}
+static inline void of_unregister_platform_driver(struct of_platform_driver *drv)
+{
+        of_unregister_driver(drv);
+}
 
 /* Platform devices and busses creation */
 extern struct of_device *of_platform_device_create(struct device_node *np,
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index d8bdc79db12e..f139f2a44b19 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -1,15 +1,17 @@
 #ifndef _ASM_POWERPC_PCI_BRIDGE_H
 #define _ASM_POWERPC_PCI_BRIDGE_H
 #ifdef __KERNEL__
-
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
 #include <linux/pci.h>
 #include <linux/list.h>
 #include <linux/ioport.h>
 
-#ifndef CONFIG_PPC64
-
 struct device_node;
-struct pci_controller;
 
 /*
  * Structure of a PCI controller (host bridge)
@@ -17,26 +19,38 @@ struct pci_controller;
 struct pci_controller {
         struct pci_bus *bus;
         char is_dynamic;
-        void *arch_data;
+#ifdef CONFIG_PPC64
+        int node;
+#endif
+        struct device_node *dn;
         struct list_head list_node;
         struct device *parent;
 
         int first_busno;
         int last_busno;
+#ifndef CONFIG_PPC64
         int self_busno;
+#endif
 
         void __iomem *io_base_virt;
+#ifdef CONFIG_PPC64
+        void *io_base_alloc;
+#endif
         resource_size_t io_base_phys;
 
         /* Some machines (PReP) have a non 1:1 mapping of
          * the PCI memory space in the CPU bus space
          */
         resource_size_t pci_mem_offset;
+#ifdef CONFIG_PPC64
+        unsigned long pci_io_size;
+#endif
 
         struct pci_ops *ops;
         volatile unsigned int __iomem *cfg_addr;
         volatile void __iomem *cfg_data;
 
+#ifndef CONFIG_PPC64
         /*
          * Used for variants of PCI indirect handling and possible quirks:
          *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
@@ -51,21 +65,30 @@ struct pci_controller {
          *   set.
          *  BIG_ENDIAN - cfg_addr is a big endian register
          */
-#define PPC_INDIRECT_TYPE_SET_CFG_TYPE          (0x00000001)
-#define PPC_INDIRECT_TYPE_EXT_REG               (0x00000002)
-#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS  (0x00000004)
-#define PPC_INDIRECT_TYPE_NO_PCIE_LINK          (0x00000008)
-#define PPC_INDIRECT_TYPE_BIG_ENDIAN            (0x00000010)
+#define PPC_INDIRECT_TYPE_SET_CFG_TYPE          0x00000001
+#define PPC_INDIRECT_TYPE_EXT_REG               0x00000002
+#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS  0x00000004
+#define PPC_INDIRECT_TYPE_NO_PCIE_LINK          0x00000008
+#define PPC_INDIRECT_TYPE_BIG_ENDIAN            0x00000010
         u32 indirect_type;
-
+#endif  /* !CONFIG_PPC64 */
         /* Currently, we limit ourselves to 1 IO range and 3 mem
          * ranges since the common pci_bus structure can't handle more
          */
         struct resource io_resource;
         struct resource mem_resources[3];
         int global_number;              /* PCI domain number */
+#ifdef CONFIG_PPC64
+        unsigned long buid;
+        unsigned long dma_window_base_cur;
+        unsigned long dma_window_size;
+
+        void *private_data;
+#endif  /* CONFIG_PPC64 */
 };
 
+#ifndef CONFIG_PPC64
+
 static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
 {
         return bus->sysdata;
@@ -81,18 +104,18 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
 
 /* These are used for config access before all the PCI probing
    has been done. */
-int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
-                           int where, u8 *val);
-int early_read_config_word(struct pci_controller *hose, int bus, int dev_fn,
-                           int where, u16 *val);
-int early_read_config_dword(struct pci_controller *hose, int bus, int dev_fn,
-                            int where, u32 *val);
-int early_write_config_byte(struct pci_controller *hose, int bus, int dev_fn,
-                            int where, u8 val);
-int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn,
-                            int where, u16 val);
-int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn,
-                             int where, u32 val);
+extern int early_read_config_byte(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u8 *val);
+extern int early_read_config_word(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u16 *val);
+extern int early_read_config_dword(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u32 *val);
+extern int early_write_config_byte(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u8 val);
+extern int early_write_config_word(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u16 val);
+extern int early_write_config_dword(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u32 val);
 
 extern int early_find_capability(struct pci_controller *hose, int bus,
                                  int dev_fn, int cap);
@@ -104,62 +127,12 @@ extern void setup_grackle(struct pci_controller *hose);
 extern void __init update_bridge_resource(struct pci_dev *dev,
                                           struct resource *res);
 
-#else
-
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * Structure of a PCI controller (host bridge)
- */
-struct pci_controller {
-        struct pci_bus *bus;
-        char is_dynamic;
-        int node;
-        void *arch_data;
-        struct list_head list_node;
-        struct device *parent;
-
-        int first_busno;
-        int last_busno;
-
-        void __iomem *io_base_virt;
-        void *io_base_alloc;
-        resource_size_t io_base_phys;
-
-        /* Some machines have a non 1:1 mapping of
-         * the PCI memory space in the CPU bus space
-         */
-        resource_size_t pci_mem_offset;
-        unsigned long pci_io_size;
-
-        struct pci_ops *ops;
-        volatile unsigned int __iomem *cfg_addr;
-        volatile void __iomem *cfg_data;
-
-        /* Currently, we limit ourselves to 1 IO range and 3 mem
-         * ranges since the common pci_bus structure can't handle more
-         */
-        struct resource io_resource;
-        struct resource mem_resources[3];
-        int global_number;
-        unsigned long buid;
-        unsigned long dma_window_base_cur;
-        unsigned long dma_window_size;
-
-        void *private_data;
-};
+#else   /* CONFIG_PPC64 */
 
 /*
  * PCI stuff, for nodes representing PCI devices, pointed to
  * by device_node->data.
  */
-struct pci_controller;
 struct iommu_table;
 
 struct pci_dn {
@@ -179,9 +152,9 @@ struct pci_dn {
         int     eeh_mode;               /* See eeh.h for possible EEH_MODEs */
         int     eeh_config_addr;
         int     eeh_pe_config_addr; /* new-style partition endpoint address */
-        int     eeh_check_count;        /* # times driver ignored error */
-        int     eeh_freeze_count;       /* # times this device froze up. */
-        int     eeh_false_positives;    /* # times this device reported #ff's */
+        int     eeh_check_count;        /* # times driver ignored error */
+        int     eeh_freeze_count;       /* # times this device froze up. */
+        int     eeh_false_positives;    /* # times this device reported #ff's */
         u32     config_space[16];       /* saved PCI config space */
 #endif
 };
@@ -189,7 +162,7 @@ struct pci_dn {
 /* Get the pointer to a device_node's pci_dn */
 #define PCI_DN(dn)      ((struct pci_dn *) (dn)->data)
 
-struct device_node *fetch_dev_dn(struct pci_dev *dev);
+extern struct device_node *fetch_dev_dn(struct pci_dev *dev);
 
 /* Get a device_node from a pci_dev.  This code must be fast except
  * in the case where the sysdata is incorrect and needs to be fixed
@@ -227,14 +200,14 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
 }
 
 /** Find the bus corresponding to the indicated device node */
-struct pci_bus * pcibios_find_pci_bus(struct device_node *dn);
+extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn);
 
 /** Remove all of the PCI devices under this bus */
-void pcibios_remove_pci_devices(struct pci_bus *bus);
+extern void pcibios_remove_pci_devices(struct pci_bus *bus);
 
 /** Discover new pci devices under this bus, and add them */
-void pcibios_add_pci_devices(struct pci_bus * bus);
-void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus);
+extern void pcibios_add_pci_devices(struct pci_bus *bus);
+extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus);
 
 extern int pcibios_remove_root_bus(struct pci_controller *phb);
 
@@ -270,20 +243,18 @@ extern int pcibios_map_io_space(struct pci_bus *bus);
 #define PHB_SET_NODE(PHB, NODE)         ((PHB)->node = -1)
 #endif
 
-#endif /* CONFIG_PPC64 */
+#endif  /* CONFIG_PPC64 */
 
 /* Get the PCI host controller for an OF device */
-extern struct pci_controller*
-pci_find_hose_for_OF_device(struct device_node* node);
+extern struct pci_controller *pci_find_hose_for_OF_device(
+                        struct device_node* node);
 
 /* Fill up host controller resources from the OF node */
-extern void
-pci_process_bridge_OF_ranges(struct pci_controller *hose,
-                           struct device_node *dev, int primary);
+extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
+                        struct device_node *dev, int primary);
 
 /* Allocate & free a PCI host bridge structure */
-extern struct pci_controller *
-pcibios_alloc_controller(struct device_node *dev);
+extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
 
 #ifdef CONFIG_PCI
@@ -298,9 +269,7 @@ static inline int pcibios_vaddr_is_ioport(void __iomem *address)
 {
         return 0;
 }
-#endif
-
+#endif  /* CONFIG_PCI */
 
-
-#endif /* __KERNEL__ */
-#endif
+#endif  /* __KERNEL__ */
+#endif  /* _ASM_POWERPC_PCI_BRIDGE_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index b847aa10074b..854ab713f56c 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -22,7 +22,6 @@ extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
 
 
 extern struct list_head hose_list;
-extern int global_phb_number;
 
 extern void find_and_init_phbs(void);
 
@@ -47,9 +46,6 @@ extern void init_pci_config_tokens (void);
 extern unsigned long get_phb_buid (struct device_node *);
 extern int rtas_setup_phb(struct pci_controller *phb);
 
-/* From iSeries PCI */
-extern void iSeries_pcibios_init(void);
-
 extern unsigned long pci_probe_only;
 
 /* ---- EEH internal-use-only related routines ---- */
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index e775ff1ca413..1f685047c6ff 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -691,12 +691,6 @@
 #define PV_BE           0x0070
 #define PV_PA6T         0x0090
 
-/*
- * Number of entries in the SLB. If this ever changes we should handle
- * it with a use a cpu feature fixup.
- */
-#define SLB_NUM_ENTRIES 64
-
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__
 #define mfmsr()         ({unsigned long rval; \
diff --git a/include/asm-powerpc/smu.h b/include/asm-powerpc/smu.h
index e49f644ca63a..76329f451aba 100644
--- a/include/asm-powerpc/smu.h
+++ b/include/asm-powerpc/smu.h
@@ -173,7 +173,7 @@
  * Power supply control
  *
  * The "sub" command is an ASCII string in the data, the
- * data lenght is that of the string.
+ * data length is that of the string.
  *
  * The VSLEW command can be used to get or set the voltage slewing.
  *  - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of
@@ -201,20 +201,90 @@
  */
 #define SMU_CMD_READ_ADC                        0xd8
 
+
 /* Misc commands
  *
  * This command seem to be a grab bag of various things
+ *
+ * Parameters:
+ *   1: subcommand
  */
 #define SMU_CMD_MISC_df_COMMAND                 0xdf
-#define   SMU_CMD_MISC_df_SET_DISPLAY_LIT       0x02 /* i: 1 byte */
+
+/*
+ * Sets "system ready" status
+ *
+ * I did not yet understand how it exactly works or what it does.
+ *
+ * Guessing from OF code, 0x02 activates the display backlight. Apple uses/used
+ * the same codebase for all OF versions. On PowerBooks, this command would
+ * enable the backlight. For the G5s, it only activates the front LED. However,
+ * don't take this for granted.
+ *
+ * Parameters:
+ *   2: status [0x00, 0x01 or 0x02]
+ */
+#define   SMU_CMD_MISC_df_SET_DISPLAY_LIT       0x02
+
+/*
+ * Sets mode of power switch.
+ *
+ * What this actually does is not yet known. Maybe it enables some interrupt.
+ *
+ * Parameters:
+ *   2: enable power switch? [0x00 or 0x01]
+ *   3 (optional): enable nmi? [0x00 or 0x01]
+ *
+ * Returns:
+ *   If parameter 2 is 0x00 and parameter 3 is not specified, returns wether
+ *   NMI is enabled. Otherwise unknown.
+ */
 #define   SMU_CMD_MISC_df_NMI_OPTION            0x04
 
+/* Sets LED dimm offset.
+ *
+ * The front LED dimms itself during sleep. Its brightness (or, well, the PWM
+ * frequency) depends on current time. Therefore, the SMU needs to know the
+ * timezone.
+ *
+ * Parameters:
+ *   2-8: unknown (BCD coding)
+ */
+#define   SMU_CMD_MISC_df_DIMM_OFFSET           0x99
+
+
 /*
  * Version info commands
  *
- * I haven't quite tried to figure out how these work
+ * Parameters:
+ *   1 (optional): Specifies version part to retrieve
+ *
+ * Returns:
+ *   Version value
  */
 #define SMU_CMD_VERSION_COMMAND                 0xea
+#define   SMU_VERSION_RUNNING                   0x00
+#define   SMU_VERSION_BASE                      0x01
+#define   SMU_VERSION_UPDATE                    0x02
+
+
+/*
+ * Switches
+ *
+ * These are switches whose status seems to be known to the SMU.
+ *
+ * Parameters:
+ *   none
+ *
+ * Result:
+ *   Switch bits (ORed, see below)
+ */
+#define SMU_CMD_SWITCHES                        0xdc
+
+/* Switches bits */
+#define SMU_SWITCH_CASE_CLOSED                  0x01
+#define SMU_SWITCH_AC_POWER                     0x04
+#define SMU_SWITCH_POWER_SWITCH                 0x08
 
 
 /*
@@ -243,10 +313,64 @@
  */
 #define SMU_CMD_MISC_ee_COMMAND                 0xee
 #define   SMU_CMD_MISC_ee_GET_DATABLOCK_REC     0x02
-#define   SMU_CMD_MISC_ee_LEDS_CTRL             0x04 /* i: 00 (00,01) [00] */
+
+/* Retrieves currently used watts.
+ *
+ * Parameters:
+ *   1: 0x03 (Meaning unknown)
+ */
+#define   SMU_CMD_MISC_ee_GET_WATTS             0x03
+
+#define   SMU_CMD_MISC_ee_LEDS_CTRL             0x04 /* i: 00 (00,01) [00] */
 #define   SMU_CMD_MISC_ee_GET_DATA              0x05 /* i: 00 , o: ?? */
 
 
+/*
+ * Power related commands
+ *
+ * Parameters:
+ *   1: subcommand
+ */
+#define SMU_CMD_POWER_EVENTS_COMMAND            0x8f
+
+/* SMU_POWER_EVENTS subcommands */
+enum {
+        SMU_PWR_GET_POWERUP_EVENTS      = 0x00,
+        SMU_PWR_SET_POWERUP_EVENTS      = 0x01,
+        SMU_PWR_CLR_POWERUP_EVENTS      = 0x02,
+        SMU_PWR_GET_WAKEUP_EVENTS       = 0x03,
+        SMU_PWR_SET_WAKEUP_EVENTS       = 0x04,
+        SMU_PWR_CLR_WAKEUP_EVENTS       = 0x05,
+
+        /*
+         * Get last shutdown cause
+         *
+         * Returns:
+         *   1 byte (signed char): Last shutdown cause. Exact meaning unknown.
+         */
+        SMU_PWR_LAST_SHUTDOWN_CAUSE     = 0x07,
+
+        /*
+         * Sets or gets server ID. Meaning or use is unknown.
+         *
+         * Parameters:
+         *   2 (optional): Set server ID (1 byte)
+         *
+         * Returns:
+         *   1 byte (server ID?)
+         */
+        SMU_PWR_SERVER_ID               = 0x08,
+};
+
+/* Power events wakeup bits */
+enum {
+        SMU_PWR_WAKEUP_KEY              = 0x01, /* Wake on key press */
+        SMU_PWR_WAKEUP_AC_INSERT        = 0x02, /* Wake on AC adapter plug */
+        SMU_PWR_WAKEUP_AC_CHANGE        = 0x04,
+        SMU_PWR_WAKEUP_LID_OPEN         = 0x08,
+        SMU_PWR_WAKEUP_RING             = 0x10,
+};
+
 
 /*
  * - Kernel side interface -
diff --git a/include/linux/of.h b/include/linux/of.h
index 5c39b9270ff7..c65af7bd1e9c 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -46,6 +46,10 @@ extern struct device_node *of_find_node_by_phandle(phandle handle);
 extern struct device_node *of_get_parent(const struct device_node *node);
 extern struct device_node *of_get_next_child(const struct device_node *node,
                                              struct device_node *prev);
+#define for_each_child_of_node(parent, child) \
+        for (child = of_get_next_child(parent, NULL); child != NULL; \
+             child = of_get_next_child(parent, child))
+
 extern struct property *of_find_property(const struct device_node *np,
                                          const char *name,
                                          int *lenp);