3 files changed, 54 insertions, 31 deletions

diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 30b023411fef..b24a99e3ef9c 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -450,5 +450,30 @@
         REST_CR (%cr22, PT_PSW  (\regs))
         .endm
 
+
+        /* First step to create a "relied upon translation"
+         * See PA 2.0 Arch. page F-4 and F-5.
+         *
+         * The ssm was originally necessary due to a "PCxT bug".
+         * But someone decided it needed to be added to the architecture
+         * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
+         * It's been carried forward into PA 2.0 Arch as well. :^(
+         *
+         * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
+         * rsm/ssm prevents the ifetch unit from speculatively fetching
+         * instructions past this line in the code stream.
+         * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
+         */
+        .macro  pcxt_ssm_bug
+        rsm     PSW_SM_I,%r0
+        nop     /* 1 */
+        nop     /* 2 */
+        nop     /* 3 */
+        nop     /* 4 */
+        nop     /* 5 */
+        nop     /* 6 */
+        nop     /* 7 */
+        .endm
+
 #endif /* __ASSEMBLY__ */
 #endif
diff --git a/include/asm-parisc/psw.h b/include/asm-parisc/psw.h
index 51323029f377..4334d6ca2add 100644
--- a/include/asm-parisc/psw.h
+++ b/include/asm-parisc/psw.h
@@ -1,4 +1,7 @@
 #ifndef _PARISC_PSW_H
+
+#include <linux/config.h>
+
 #define PSW_I   0x00000001
 #define PSW_D   0x00000002
 #define PSW_P   0x00000004
@@ -9,6 +12,16 @@
 #define PSW_G   0x00000040      /* PA1.x only */
 #define PSW_O   0x00000080      /* PA2.0 only */
 
+/* ssm/rsm instructions number PSW_W and PSW_E differently */
+#define PSW_SM_I        PSW_I   /* Enable External Interrupts */
+#define PSW_SM_D        PSW_D
+#define PSW_SM_P        PSW_P
+#define PSW_SM_Q        PSW_Q   /* Enable Interrupt State Collection */
+#define PSW_SM_R        PSW_R   /* Enable Recover Counter Trap */
+#define PSW_SM_W        0x200   /* PA2.0 only : Enable Wide Mode */
+
+#define PSW_SM_QUIET    PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
+
 #define PSW_CB  0x0000ff00
 
 #define PSW_M   0x00010000
@@ -30,33 +43,21 @@
 #define PSW_Z   0x40000000      /* PA1.x only */
 #define PSW_Y   0x80000000      /* PA1.x only */
 
-#ifdef __LP64__
-#define PSW_HI_CB 0x000000ff    /* PA2.0 only */
+#ifdef CONFIG_64BIT
+#  define PSW_HI_CB 0x000000ff    /* PA2.0 only */
 #endif
 
-/* PSW bits to be used with ssm/rsm */
-#define PSW_SM_I        0x1
-#define PSW_SM_D        0x2
-#define PSW_SM_P        0x4
-#define PSW_SM_Q        0x8
-#define PSW_SM_R        0x10
-#define PSW_SM_F        0x20
-#define PSW_SM_G        0x40
-#define PSW_SM_O        0x80
-#define PSW_SM_E        0x100
-#define PSW_SM_W        0x200
-
-#ifdef __LP64__
-#  define USER_PSW      (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
-#  define KERNEL_PSW    (PSW_W | PSW_C | PSW_Q | PSW_P | PSW_D)
-#  define REAL_MODE_PSW (PSW_W | PSW_Q)
-#  define USER_PSW_MASK (PSW_W | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
-#  define USER_PSW_HI_MASK (PSW_HI_CB)
-#else
-#  define USER_PSW      (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
-#  define KERNEL_PSW    (PSW_C | PSW_Q | PSW_P | PSW_D)
-#  define REAL_MODE_PSW (PSW_Q)
-#  define USER_PSW_MASK (PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
+#ifdef CONFIG_64BIT
+#  define USER_PSW_HI_MASK      PSW_HI_CB
+#  define WIDE_PSW              PSW_W
+#else 
+#  define WIDE_PSW              0
 #endif
 
+/* Used when setting up for rfi */
+#define KERNEL_PSW    (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
+#define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
+#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
+#define USER_PSW      (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
+
 #endif
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index eb27b78930e8..efbb2d8625b1 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -64,29 +64,26 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
 {
         unsigned long npages;
 
-        
         npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
-        if (npages >= 512)  /* XXX arbitrary, should be tuned */
+        if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
                 flush_tlb_all();
         else {
 
                 mtsp(vma->vm_mm->context,1);
+                purge_tlb_start();
                 if (split_tlb) {
-                        purge_tlb_start();
                         while (npages--) {
                                 pdtlb(start);
                                 pitlb(start);
                                 start += PAGE_SIZE;
                         }
-                        purge_tlb_end();
                 } else {
-                        purge_tlb_start();
                         while (npages--) {
                                 pdtlb(start);
                                 start += PAGE_SIZE;
                         }
-                        purge_tlb_end();
                 }
+                purge_tlb_end();
         }
 }