352 files changed, 6492 insertions, 2302 deletions
diff --git a/include/acpi/acinterp.h b/include/acpi/acinterp.h
index ce7c9d653910..73967c8152d3 100644
--- a/include/acpi/acinterp.h
+++ b/include/acpi/acinterp.h
@@ -253,7 +253,8 @@ acpi_ex_release_mutex(union acpi_operand_object *obj_desc,
 void acpi_ex_release_all_mutexes(struct acpi_thread_state *thread);
-void acpi_ex_unlink_mutex(union acpi_operand_object *obj_desc);
+void acpi_ex_unlink_mutex(union acpi_operand_object *obj_desc,
+                          struct acpi_thread_state *thread);
 /*
 * exprep - ACPI AML execution - prep utilities
diff --git a/include/acpi/acobject.h b/include/acpi/acobject.h
index 04e9735a6742..5206d61d74a6 100644
--- a/include/acpi/acobject.h
+++ b/include/acpi/acobject.h
@@ -155,7 +155,7 @@ struct acpi_object_event {
 struct acpi_object_mutex {
        ACPI_OBJECT_COMMON_HEADER u8 sync_level;        /* 0-15, specified in Mutex() call */
        u16 acquisition_depth;  /* Allow multiple Acquires, same thread */
-        struct acpi_thread_state *owner_thread; /* Current owner of the mutex */
+        acpi_thread_id owner_thread_id; /* Current owner of the mutex */
        acpi_mutex os_mutex;    /* Actual OS synchronization object */
        union acpi_operand_object *prev;        /* Link for list of acquired mutexes */
        union acpi_operand_object *next;        /* Link for list of acquired mutexes */
diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h
index 4dc8a5043ef0..f6275b0e66dd 100644
--- a/include/acpi/acpi_drivers.h
+++ b/include/acpi/acpi_drivers.h
@@ -105,12 +105,6 @@ int acpi_ec_ecdt_probe(void);
 int acpi_processor_set_thermal_limit(acpi_handle handle, int type);
-/* --------------------------------------------------------------------------
-                                    Hot Keys
-   -------------------------------------------------------------------------- */
-extern int acpi_specific_hotkey_enabled;
 /*--------------------------------------------------------------------------
                                  Dock Station
  -------------------------------------------------------------------------- */
@@ -122,10 +116,34 @@ extern int register_hotplug_dock_device(acpi_handle handle,
        acpi_notify_handler handler, void *context);
 extern void unregister_hotplug_dock_device(acpi_handle handle);
 #else
-#define is_dock_device(h)                       (0)
+static inline int is_dock_device(acpi_handle handle)
-#define register_dock_notifier(nb)              (-ENODEV)
+{
-#define unregister_dock_notifier(nb)            do { } while(0)
+        return 0;
-#define register_hotplug_dock_device(h1, h2, c) (-ENODEV)
+}
-#define unregister_hotplug_dock_device(h)       do { } while(0)
+static inline int register_dock_notifier(struct notifier_block *nb)
+{
+        return -ENODEV;
+}
+static inline void unregister_dock_notifier(struct notifier_block *nb)
+{
+}
+static inline int register_hotplug_dock_device(acpi_handle handle,
+                                acpi_notify_handler handler, void *context)
+{
+        return -ENODEV;
+}
+static inline void unregister_hotplug_dock_device(acpi_handle handle)
+{
+}
+#endif
+/*--------------------------------------------------------------------------
+                                  Suspend/Resume
+  -------------------------------------------------------------------------- */
+#ifdef CONFIG_ACPI_SLEEP
+extern int acpi_sleep_init(void);
+#else
+#define acpi_sleep_init() do {} while (0)
 #endif
 #endif /*__ACPI_DRIVERS_H__*/
diff --git a/include/acpi/acpiosxf.h b/include/acpi/acpiosxf.h
index 781394b9efe0..2785058c82ab 100644
--- a/include/acpi/acpiosxf.h
+++ b/include/acpi/acpiosxf.h
@@ -240,12 +240,6 @@ acpi_status
 acpi_os_validate_address(u8 space_id,
                         acpi_physical_address address, acpi_size length);
-u8 acpi_os_readable(void *pointer, acpi_size length);
-#ifdef ACPI_FUTURE_USAGE
-u8 acpi_os_writable(void *pointer, acpi_size length);
-#endif
 u64 acpi_os_get_timer(void);
 acpi_status acpi_os_signal(u32 function, void *info);
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index 7798d2a9f793..916c0102db5b 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -79,6 +79,7 @@ struct acpi_processor_power {
        u32 bm_activity;
        int count;
        struct acpi_processor_cx states[ACPI_PROCESSOR_MAX_POWER];
+        int timer_broadcast_on_state;
 };
 /* Performance Management */
diff --git a/include/asm-arm/.gitignore b/include/asm-arm/.gitignore
new file mode 100644
index 000000000000..e02c15d158fc
--- /dev/null
+++ b/include/asm-arm/.gitignore
@@ -0,0 +1,2 @@
+arch
+mach-types.h
diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S
index 1eb3503bd16e..83fdf68f6b7c 100644
--- a/include/asm-arm/arch-aaec2000/entry-macro.S
+++ b/include/asm-arm/arch-aaec2000/entry-macro.S
@@ -15,6 +15,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     r4, #0xf8000000
                add     r4, r4, #0x00000500
diff --git a/include/asm-arm/arch-at91rm9200/at91_aic.h b/include/asm-arm/arch-at91/at91_aic.h
index 267e69812e26..df44c12a12d4 100644
--- a/include/asm-arm/arch-at91rm9200/at91_aic.h
+++ b/include/asm-arm/arch-at91/at91_aic.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_aic.h
+ * include/asm-arm/arch-at91/at91_aic.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h
index e4b8b27acfca..b0369e176f7b 100644
--- a/include/asm-arm/arch-at91rm9200/at91_dbgu.h
+++ b/include/asm-arm/arch-at91/at91_dbgu.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_dbgu.h
+ * include/asm-arm/arch-at91/at91_dbgu.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
@@ -35,6 +35,20 @@
 #define         AT91_CIDR_NVPSIZ        (0xf  << 8)             /* Nonvolatile Program Memory Size */
 #define         AT91_CIDR_NVPSIZ2       (0xf  << 12)            /* Second Nonvolatile Program Memory Size */
 #define         AT91_CIDR_SRAMSIZ       (0xf  << 16)            /* Internal SRAM Size */
+#define                 AT91_CIDR_SRAMSIZ_1K    (1 << 16)
+#define                 AT91_CIDR_SRAMSIZ_2K    (2 << 16)
+#define                 AT91_CIDR_SRAMSIZ_112K  (4 << 16)
+#define                 AT91_CIDR_SRAMSIZ_4K    (5 << 16)
+#define                 AT91_CIDR_SRAMSIZ_80K   (6 << 16)
+#define                 AT91_CIDR_SRAMSIZ_160K  (7 << 16)
+#define                 AT91_CIDR_SRAMSIZ_8K    (8 << 16)
+#define                 AT91_CIDR_SRAMSIZ_16K   (9 << 16)
+#define                 AT91_CIDR_SRAMSIZ_32K   (10 << 16)
+#define                 AT91_CIDR_SRAMSIZ_64K   (11 << 16)
+#define                 AT91_CIDR_SRAMSIZ_128K  (12 << 16)
+#define                 AT91_CIDR_SRAMSIZ_256K  (13 << 16)
+#define                 AT91_CIDR_SRAMSIZ_96K   (14 << 16)
+#define                 AT91_CIDR_SRAMSIZ_512K  (15 << 16)
 #define         AT91_CIDR_ARCH          (0xff << 20)            /* Architecture Identifier */
 #define         AT91_CIDR_NVPTYP        (7    << 28)            /* Nonvolatile Program Memory Type */
 #define         AT91_CIDR_EXT           (1    << 31)            /* Extension Flag */
diff --git a/include/asm-arm/arch-at91rm9200/at91_ecc.h b/include/asm-arm/arch-at91/at91_ecc.h
index 5c564ede5c5d..ff93df516d6d 100644
--- a/include/asm-arm/arch-at91rm9200/at91_ecc.h
+++ b/include/asm-arm/arch-at91/at91_ecc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_ecc.h
+ * include/asm-arm/arch-at91/at91_ecc.h
 *
 * Error Corrected Code Controller (ECC) - System peripherals regsters.
 * Based on AT91SAM9260 datasheet revision B.
diff --git a/include/asm-arm/arch-at91rm9200/at91_lcdc.h b/include/asm-arm/arch-at91/at91_lcdc.h
index 9cbfcdd3c471..ab040a40d37b 100644
--- a/include/asm-arm/arch-at91rm9200/at91_lcdc.h
+++ b/include/asm-arm/arch-at91/at91_lcdc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_lcdc.h
+ * include/asm-arm/arch-at91/at91_lcdc.h
 *
 * LCD Controller (LCDC).
 * Based on AT91SAM9261 datasheet revision E.
diff --git a/include/asm-arm/arch-at91rm9200/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h
index 9a552cb743c0..40a9876b661a 100644
--- a/include/asm-arm/arch-at91rm9200/at91_mci.h
+++ b/include/asm-arm/arch-at91/at91_mci.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_mci.h
+ * include/asm-arm/arch-at91/at91_mci.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_pio.h b/include/asm-arm/arch-at91/at91_pio.h
index 680eaa1f5915..84c3866d309f 100644
--- a/include/asm-arm/arch-at91rm9200/at91_pio.h
+++ b/include/asm-arm/arch-at91/at91_pio.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_pio.h
+ * include/asm-arm/arch-at91/at91_pio.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_pit.h b/include/asm-arm/arch-at91/at91_pit.h
index 4a30d009c588..5026325a5ae4 100644
--- a/include/asm-arm/arch-at91rm9200/at91_pit.h
+++ b/include/asm-arm/arch-at91/at91_pit.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_pit.h
+ * include/asm-arm/arch-at91/at91_pit.h
 *
 * Periodic Interval Timer (PIT) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
diff --git a/include/asm-arm/arch-at91rm9200/at91_pmc.h b/include/asm-arm/arch-at91/at91_pmc.h
index c3b489d09b6c..33ff5b6798ee 100644
--- a/include/asm-arm/arch-at91rm9200/at91_pmc.h
+++ b/include/asm-arm/arch-at91/at91_pmc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_pmc.h
+ * include/asm-arm/arch-at91/at91_pmc.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_rstc.h b/include/asm-arm/arch-at91/at91_rstc.h
index 237d3c40b318..fb8d1618a231 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rstc.h
+++ b/include/asm-arm/arch-at91/at91_rstc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_rstc.h
+ * include/asm-arm/arch-at91/at91_rstc.h
 *
 * Reset Controller (RSTC) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
@@ -17,7 +17,7 @@
 #define         AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
 #define         AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
 #define         AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
-#define         AT91_RSTC_KEY           (0xff << 24)            /* KEY Password */
+#define         AT91_RSTC_KEY           (0xa5 << 24)            /* KEY Password */
 #define AT91_RSTC_SR            (AT91_RSTC + 0x04)      /* Reset Controller Status Register */
 #define         AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
@@ -34,6 +34,5 @@
 #define         AT91_RSTC_URSTEN        (1 << 0)                /* User Reset Enable */
 #define         AT91_RSTC_URSTIEN       (1 << 4)                /* User Reset Interrupt Enable */
 #define         AT91_RSTC_ERSTL         (0xf << 8)              /* External Reset Length */
-#define         AT91_RSTC_KEY           (0xff << 24)            /* KEY Password */
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/at91_rtc.h b/include/asm-arm/arch-at91/at91_rtc.h
index 095fe0883102..af9bd28174c0 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rtc.h
+++ b/include/asm-arm/arch-at91/at91_rtc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_rtc.h
+ * include/asm-arm/arch-at91/at91_rtc.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_rtt.h b/include/asm-arm/arch-at91/at91_rtt.h
index c6751ba3cccc..bae1103fbbb2 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rtt.h
+++ b/include/asm-arm/arch-at91/at91_rtt.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_rtt.h
+ * include/asm-arm/arch-at91/at91_rtt.h
 *
 * Real-time Timer (RTT) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
diff --git a/include/asm-arm/arch-at91rm9200/at91_shdwc.h b/include/asm-arm/arch-at91/at91_shdwc.h
index 0439250553c9..795fcc266228 100644
--- a/include/asm-arm/arch-at91rm9200/at91_shdwc.h
+++ b/include/asm-arm/arch-at91/at91_shdwc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_shdwc.h
+ * include/asm-arm/arch-at91/at91_shdwc.h
 *
 * Shutdown Controller (SHDWC) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
diff --git a/include/asm-arm/arch-at91rm9200/at91_spi.h b/include/asm-arm/arch-at91/at91_spi.h
index bec48ca89bba..f9b9a8464997 100644
--- a/include/asm-arm/arch-at91rm9200/at91_spi.h
+++ b/include/asm-arm/arch-at91/at91_spi.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_spi.h
+ * include/asm-arm/arch-at91/at91_spi.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_ssc.h b/include/asm-arm/arch-at91/at91_ssc.h
index 694bcaa8f7c2..0ecc73460b50 100644
--- a/include/asm-arm/arch-at91rm9200/at91_ssc.h
+++ b/include/asm-arm/arch-at91/at91_ssc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_ssc.h
+ * include/asm-arm/arch-at91/at91_ssc.h
 *
 * Copyright (C) SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/at91_st.h b/include/asm-arm/arch-at91/at91_st.h
index 2432ddfc6c47..30446e2ea772 100644
--- a/include/asm-arm/arch-at91rm9200/at91_st.h
+++ b/include/asm-arm/arch-at91/at91_st.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_st.h
+ * include/asm-arm/arch-at91/at91_st.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_tc.h b/include/asm-arm/arch-at91/at91_tc.h
index 8d06eb078e1d..b85d3faeef5c 100644
--- a/include/asm-arm/arch-at91rm9200/at91_tc.h
+++ b/include/asm-arm/arch-at91/at91_tc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_tc.h
+ * include/asm-arm/arch-at91/at91_tc.h
 *
 * Copyright (C) SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/at91_twi.h b/include/asm-arm/arch-at91/at91_twi.h
index cda914f1e740..ca9a90733456 100644
--- a/include/asm-arm/arch-at91rm9200/at91_twi.h
+++ b/include/asm-arm/arch-at91/at91_twi.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_twi.h
+ * include/asm-arm/arch-at91/at91_twi.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91_wdt.h b/include/asm-arm/arch-at91/at91_wdt.h
index ac63e775772c..7251a344c740 100644
--- a/include/asm-arm/arch-at91rm9200/at91_wdt.h
+++ b/include/asm-arm/arch-at91/at91_wdt.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91_wdt.h
+ * include/asm-arm/arch-at91/at91_wdt.h
 *
 * Watchdog Timer (WDT) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91/at91rm9200.h
index c569b6a21a42..a12ac8ab2ad0 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200.h
+++ b/include/asm-arm/arch-at91/at91rm9200.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91rm9200.h
+ * include/asm-arm/arch-at91/at91rm9200.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_emac.h b/include/asm-arm/arch-at91/at91rm9200_emac.h
index fbc091e61e2f..0c417af5fe7f 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_emac.h
+++ b/include/asm-arm/arch-at91/at91rm9200_emac.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91rm9200_emac.h
+ * include/asm-arm/arch-at91/at91rm9200_emac.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h b/include/asm-arm/arch-at91/at91rm9200_mc.h
index 0c0d81480b3a..24d012939cc4 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h
+++ b/include/asm-arm/arch-at91/at91rm9200_mc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91rm9200_mc.h
+ * include/asm-arm/arch-at91/at91rm9200_mc.h
 *
 * Copyright (C) 2005 Ivan Kokshaysky
 * Copyright (C) SAN People
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h
index 46f4dd65c035..2cadebc36af7 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9260.h
+++ b/include/asm-arm/arch-at91/at91sam9260.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91sam9260.h
+ * include/asm-arm/arch-at91/at91sam9260.h
 *
 * (C) 2006 Andrew Victor
 *
@@ -113,6 +113,10 @@
 #define AT91SAM9260_UHP_BASE    0x00500000      /* USB Host controller */
+#define AT91SAM9XE_FLASH_BASE   0x00200000      /* Internal FLASH base address */
+#define AT91SAM9XE_SRAM_BASE    0x00300000      /* Internal SRAM base address */
 #if 0
 /*
 * PIO pin definitions (peripheral A/B multiplexing).
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h
index 78f6b4917b8b..aacb1e976422 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
+++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
+ * include/asm-arm/arch-at91/at91sam9260_matrix.h
 *
 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
 * Based on AT91SAM9260 datasheet revision B.
@@ -18,7 +18,7 @@
 #define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
 #define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
 #define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x04)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT                (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h
index 8d39672d5b82..01b58ffe2e27 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9261.h
+++ b/include/asm-arm/arch-at91/at91sam9261.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91sam9261.h
+ * include/asm-arm/arch-at91/at91sam9261.h
 *
 * Copyright (C) SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h b/include/asm-arm/arch-at91/at91sam9261_matrix.h
index ec88efabbe6c..6f072421be5b 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
+++ b/include/asm-arm/arch-at91/at91sam9261_matrix.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
+ * include/asm-arm/arch-at91/at91sam9261_matrix.h
 *
 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
 * Based on AT91SAM9261 datasheet revision D.
diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h
new file mode 100644
index 000000000000..f4af68ae0ea9
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91sam9263.h
@@ -0,0 +1,131 @@
+/*
+ * include/asm-arm/arch-at91/at91sam9263.h
+ *
+ * (C) 2007 Atmel Corporation.
+ *
+ * Common definitions.
+ * Based on AT91SAM9263 datasheet revision B (Preliminary).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef AT91SAM9263_H
+#define AT91SAM9263_H
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
+#define AT91_ID_SYS             1       /* System Peripherals */
+#define AT91SAM9263_ID_PIOA     2       /* Parallel IO Controller A */
+#define AT91SAM9263_ID_PIOB     3       /* Parallel IO Controller B */
+#define AT91SAM9263_ID_PIOCDE   4       /* Parallel IO Controller C, D and E */
+#define AT91SAM9263_ID_US0      7       /* USART 0 */
+#define AT91SAM9263_ID_US1      8       /* USART 1 */
+#define AT91SAM9263_ID_US2      9       /* USART 2 */
+#define AT91SAM9263_ID_MCI0     10      /* Multimedia Card Interface 0 */
+#define AT91SAM9263_ID_MCI1     11      /* Multimedia Card Interface 1 */
+#define AT91SAM9263_ID_CAN      12      /* CAN */
+#define AT91SAM9263_ID_TWI      13      /* Two-Wire Interface */
+#define AT91SAM9263_ID_SPI0     14      /* Serial Peripheral Interface 0 */
+#define AT91SAM9263_ID_SPI1     15      /* Serial Peripheral Interface 1 */
+#define AT91SAM9263_ID_SSC0     16      /* Serial Synchronous Controller 0 */
+#define AT91SAM9263_ID_SSC1     17      /* Serial Synchronous Controller 1 */
+#define AT91SAM9263_ID_AC97C    18      /* AC97 Controller */
+#define AT91SAM9263_ID_TCB      19      /* Timer Counter 0, 1 and 2 */
+#define AT91SAM9263_ID_PWMC     20      /* Pulse Width Modulation Controller */
+#define AT91SAM9263_ID_EMAC     21      /* Ethernet */
+#define AT91SAM9263_ID_2DGE     23      /* 2D Graphic Engine */
+#define AT91SAM9263_ID_UDP      24      /* USB Device Port */
+#define AT91SAM9263_ID_ISI      25      /* Image Sensor Interface */
+#define AT91SAM9263_ID_LCDC     26      /* LCD Controller */
+#define AT91SAM9263_ID_DMA      27      /* DMA Controller */
+#define AT91SAM9263_ID_UHP      29      /* USB Host port */
+#define AT91SAM9263_ID_IRQ0     30      /* Advanced Interrupt Controller (IRQ0) */
+#define AT91SAM9263_ID_IRQ1     31      /* Advanced Interrupt Controller (IRQ1) */
+/*
+ * User Peripheral physical base addresses.
+ */
+#define AT91SAM9263_BASE_UDP            0xfff78000
+#define AT91SAM9263_BASE_TCB0           0xfff7c000
+#define AT91SAM9263_BASE_TC0            0xfff7c000
+#define AT91SAM9263_BASE_TC1            0xfff7c040
+#define AT91SAM9263_BASE_TC2            0xfff7c080
+#define AT91SAM9263_BASE_MCI0           0xfff80000
+#define AT91SAM9263_BASE_MCI1           0xfff84000
+#define AT91SAM9263_BASE_TWI            0xfff88000
+#define AT91SAM9263_BASE_US0            0xfff8c000
+#define AT91SAM9263_BASE_US1            0xfff90000
+#define AT91SAM9263_BASE_US2            0xfff94000
+#define AT91SAM9263_BASE_SSC0           0xfff98000
+#define AT91SAM9263_BASE_SSC1           0xfff9c000
+#define AT91SAM9263_BASE_AC97C          0xfffa0000
+#define AT91SAM9263_BASE_SPI0           0xfffa4000
+#define AT91SAM9263_BASE_SPI1           0xfffa8000
+#define AT91SAM9263_BASE_CAN            0xfffac000
+#define AT91SAM9263_BASE_PWMC           0xfffb8000
+#define AT91SAM9263_BASE_EMAC           0xfffbc000
+#define AT91SAM9263_BASE_ISI            0xfffc4000
+#define AT91SAM9263_BASE_2DGE           0xfffc8000
+#define AT91_BASE_SYS                   0xffffe000
+/*
+ * System Peripherals (offset from AT91_BASE_SYS)
+ */
+#define AT91_ECC0       (0xffffe000 - AT91_BASE_SYS)
+#define AT91_SDRAMC0    (0xffffe200 - AT91_BASE_SYS)
+#define AT91_SMC0       (0xffffe400 - AT91_BASE_SYS)
+#define AT91_ECC1       (0xffffe600 - AT91_BASE_SYS)
+#define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
+#define AT91_SMC1       (0xffffea00 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
+#define AT91_CCFG       (0xffffed10 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PIOE       (0xfffffa00 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT0       (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_RTT1       (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
+#define AT91_SMC        AT91_SMC0
+/*
+ * Internal Memory.
+ */
+#define AT91SAM9263_SRAM0_BASE  0x00300000      /* Internal SRAM 0 base address */
+#define AT91SAM9263_SRAM0_SIZE  (80 * SZ_1K)    /* Internal SRAM 0 size (80Kb) */
+#define AT91SAM9263_ROM_BASE    0x00400000      /* Internal ROM base address */
+#define AT91SAM9263_ROM_SIZE    SZ_128K         /* Internal ROM size (128Kb) */
+#define AT91SAM9263_SRAM1_BASE  0x00500000      /* Internal SRAM 1 base address */
+#define AT91SAM9263_SRAM1_SIZE  SZ_16K          /* Internal SRAM 1 size (16Kb) */
+#define AT91SAM9263_LCDC_BASE   0x00700000      /* LCD Controller */
+#define AT91SAM9263_DMAC_BASE   0x00800000      /* DMA Controller */
+#define AT91SAM9263_UHP_BASE    0x00a00000      /* USB Host controller */
+#if 0
+/*
+ * PIO pin definitions (peripheral A/B multiplexing).
+ */
+// TODO: Add
+#endif
+#endif
diff --git a/include/asm-arm/arch-at91/at91sam9263_matrix.h b/include/asm-arm/arch-at91/at91sam9263_matrix.h
new file mode 100644
index 000000000000..6fc6e4be624e
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91sam9263_matrix.h
@@ -0,0 +1,129 @@
+/*
+ * include/asm-arm/arch-at91/at91sam9263_matrix.h
+ *
+ *  Copyright (C) 2006 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ * Based on AT91SAM9263 datasheet revision B (Preliminary).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef AT91SAM9263_MATRIX_H
+#define AT91SAM9263_MATRIX_H
+#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
+#define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
+#define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
+#define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
+#define                 AT91_MATRIX_ULBT_FOUR           (2 << 0)
+#define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
+#define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
+#define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
+#define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
+#define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
+#define                 AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
+#define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
+#define         AT91_MATRIX_FIXED_DEFMSTR       (7    << 18)    /* Fixed Index of Default Master */
+#define         AT91_MATRIX_ARBT                (3    << 24)    /* Arbitration Type */
+#define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
+#define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
+#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
+#define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
+#define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
+#define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
+#define         AT91_MATRIX_M3PR                (3 << 12)       /* Master 3 Priority */
+#define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
+#define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
+#define         AT91_MATRIX_M6PR                (3 << 24)       /* Master 6 Priority */
+#define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
+#define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
+#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
+#define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define         AT91_MATRIX_RCB2                (1 << 2)
+#define         AT91_MATRIX_RCB3                (1 << 3)
+#define         AT91_MATRIX_RCB4                (1 << 4)
+#define         AT91_MATRIX_RCB5                (1 << 5)
+#define         AT91_MATRIX_RCB6                (1 << 6)
+#define         AT91_MATRIX_RCB7                (1 << 7)
+#define         AT91_MATRIX_RCB8                (1 << 8)
+#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x114)   /* TCM Configuration Register */
+#define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
+#define                 AT91_MATRIX_ITCM_0              (0 << 0)
+#define                 AT91_MATRIX_ITCM_16             (5 << 0)
+#define                 AT91_MATRIX_ITCM_32             (6 << 0)
+#define         AT91_MATRIX_DTCM_SIZE           (0xf << 4)      /* Size of DTCM enabled memory block */
+#define                 AT91_MATRIX_DTCM_0              (0 << 4)
+#define                 AT91_MATRIX_DTCM_16             (5 << 4)
+#define                 AT91_MATRIX_DTCM_32             (6 << 4)
+#define AT91_MATRIX_EBI0CSA     (AT91_MATRIX + 0x120)   /* EBI0 Chip Select Assignment Register */
+#define         AT91_MATRIX_EBI0_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
+#define                 AT91_MATRIX_EBI0_CS1A_SMC               (0 << 1)
+#define                 AT91_MATRIX_EBI0_CS1A_SDRAMC            (1 << 1)
+#define         AT91_MATRIX_EBI0_CS3A           (1 << 3)        /* Chip Select 3 Assignment */
+#define                 AT91_MATRIX_EBI0_CS3A_SMC               (0 << 3)
+#define                 AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA    (1 << 3)
+#define         AT91_MATRIX_EBI0_CS4A           (1 << 4)        /* Chip Select 4 Assignment */
+#define                 AT91_MATRIX_EBI0_CS4A_SMC               (0 << 4)
+#define                 AT91_MATRIX_EBI0_CS4A_SMC_CF1           (1 << 4)
+#define         AT91_MATRIX_EBI0_CS5A           (1 << 5)        /* Chip Select 5 Assignment */
+#define                 AT91_MATRIX_EBI0_CS5A_SMC               (0 << 5)
+#define                 AT91_MATRIX_EBI0_CS5A_SMC_CF2           (1 << 5)
+#define         AT91_MATRIX_EBI0_DBPUC          (1 << 8)        /* Data Bus Pull-up Configuration */
+#define         AT91_MATRIX_EBI0_VDDIOMSEL      (1 << 16)       /* Memory voltage selection */
+#define                 AT91_MATRIX_EBI0_VDDIOMSEL_1_8V         (0 << 16)
+#define                 AT91_MATRIX_EBI0_VDDIOMSEL_3_3V         (1 << 16)
+#define AT91_MATRIX_EBI1CSA     (AT91_MATRIX + 0x124)   /* EBI1 Chip Select Assignment Register */
+#define         AT91_MATRIX_EBI1_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
+#define                 AT91_MATRIX_EBI1_CS1A_SMC               (0 << 1)
+#define                 AT91_MATRIX_EBI1_CS1A_SDRAMC            (1 << 1)
+#define         AT91_MATRIX_EBI1_CS2A           (1 << 3)        /* Chip Select 3 Assignment */
+#define                 AT91_MATRIX_EBI1_CS2A_SMC               (0 << 3)
+#define                 AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA    (1 << 3)
+#define         AT91_MATRIX_EBI1_DBPUC          (1 << 8)        /* Data Bus Pull-up Configuration */
+#define         AT91_MATRIX_EBI1_VDDIOMSEL      (1 << 16)       /* Memory voltage selection */
+#define                 AT91_MATRIX_EBI1_VDDIOMSEL_1_8V         (0 << 16)
+#define                 AT91_MATRIX_EBI1_VDDIOMSEL_3_3V         (1 << 16)
+#endif
diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91/at91sam926x_mc.h
index 972e7531c7f4..d82631c251f1 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
+++ b/include/asm-arm/arch-at91/at91sam926x_mc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
+ * include/asm-arm/arch-at91/at91sam926x_mc.h
 *
 * Memory Controllers (SMC, SDRAMC) - System peripherals registers.
 * Based on AT91SAM9261 datasheet revision D.
@@ -131,4 +131,11 @@
 #define                 AT91_SMC_PS_16                  (2 << 28)
 #define                 AT91_SMC_PS_32                  (3 << 28)
+#if defined(AT91_SMC1)          /* The AT91SAM9263 has 2 Static Memory contollers */
+#define AT91_SMC1_SETUP(n)      (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
+#define AT91_SMC1_PULSE(n)      (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
+#define AT91_SMC1_CYCLE(n)      (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
+#define AT91_SMC1_MODE(n)       (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
+#endif
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/board.h b/include/asm-arm/arch-at91/board.h
index 768e0fc6aa2f..7b9903c2c447 100644
--- a/include/asm-arm/arch-at91rm9200/board.h
+++ b/include/asm-arm/arch-at91/board.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/board.h
+ * include/asm-arm/arch-at91/board.h
 *
 *  Copyright (C) 2005 HP Labs
 *
@@ -60,7 +60,7 @@ struct at91_mmc_data {
        u8              wp_pin;         /* (SD) writeprotect detect */
        u8              vcc_pin;        /* power switching (high == on) */
 };
-extern void __init at91_add_device_mmc(struct at91_mmc_data *data);
+extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
 /* Ethernet */
 struct at91_eth_data {
@@ -69,9 +69,14 @@ struct at91_eth_data {
 };
 extern void __init at91_add_device_eth(struct at91_eth_data *data);
+#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263)
+#define eth_platform_data       at91_eth_data
+#endif
 /* USB Host */
 struct at91_usbh_data {
        u8              ports;          /* number of ports on root hub */
+        u8              vbus_pin[];     /* port power-control pin */
 };
 extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
diff --git a/include/asm-arm/arch-at91rm9200/cpu.h b/include/asm-arm/arch-at91/cpu.h
index 6f8d09b08692..d464ca58cdbc 100644
--- a/include/asm-arm/arch-at91rm9200/cpu.h
+++ b/include/asm-arm/arch-at91/cpu.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/cpu.h
+ * include/asm-arm/arch-at91/cpu.h
 *
 *  Copyright (C) 2006 SAN People
 *
@@ -20,7 +20,11 @@
 #define ARCH_ID_AT91RM9200      0x09290780
 #define ARCH_ID_AT91SAM9260     0x019803a0
 #define ARCH_ID_AT91SAM9261     0x019703a0
+#define ARCH_ID_AT91SAM9263     0x019607a0
+#define ARCH_ID_AT91SAM9XE128   0x329973a0
+#define ARCH_ID_AT91SAM9XE256   0x329a93a0
+#define ARCH_ID_AT91SAM9XE512   0x329aa3a0
 static inline unsigned long at91_cpu_identify(void)
 {
@@ -28,6 +32,16 @@ static inline unsigned long at91_cpu_identify(void)
 }
+#define ARCH_FAMILY_AT91X92     0x09200000
+#define ARCH_FAMILY_AT91SAM9    0x01900000
+#define ARCH_FAMILY_AT91SAM9XE  0x02900000
+static inline unsigned long at91_arch_identify(void)
+{
+        return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
+}
 #ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
 #else
@@ -35,8 +49,10 @@ static inline unsigned long at91_cpu_identify(void)
 #endif
 #ifdef CONFIG_ARCH_AT91SAM9260
-#define cpu_is_at91sam9260()    (at91_cpu_identify() == ARCH_ID_AT91SAM9260)
+#define cpu_is_at91sam9xe()     (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
+#define cpu_is_at91sam9260()    ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
 #else
+#define cpu_is_at91sam9xe()     (0)
 #define cpu_is_at91sam9260()    (0)
 #endif
@@ -46,4 +62,10 @@ static inline unsigned long at91_cpu_identify(void)
 #define cpu_is_at91sam9261()    (0)
 #endif
+#ifdef CONFIG_ARCH_AT91SAM9263
+#define cpu_is_at91sam9263()    (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
+#else
+#define cpu_is_at91sam9263()    (0)
+#endif
 #endif
diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S
new file mode 100644
index 000000000000..13e9f5e1d4ff
--- /dev/null
+++ b/include/asm-arm/arch-at91/debug-macro.S
@@ -0,0 +1,39 @@
+/*
+ * include/asm-arm/arch-at91/debug-macro.S
+ *
+ *  Copyright (C) 2003-2005 SAN People
+ *
+ * Debugging macro include header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+#include <asm/hardware.h>
+#include <asm/arch/at91_dbgu.h>
+        .macro  addruart,rx
+        mrc     p15, 0, \rx, c1, c0
+        tst     \rx, #1                                         @ MMU enabled?
+        ldreq   \rx, =(AT91_BASE_SYS + AT91_DBGU)               @ System peripherals (phys address)
+        ldrne   \rx, =(AT91_VA_BASE_SYS + AT91_DBGU)            @ System peripherals (virt address)
+        .endm
+        .macro  senduart,rd,rx
+        strb    \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)]        @ Write to Transmitter Holding Register
+        .endm
+        .macro  waituart,rd,rx
+1001:   ldr     \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]         @ Read Status Register
+        tst     \rd, #AT91_DBGU_TXRDY                           @ DBGU_TXRDY = 1 when ready to transmit
+        beq     1001b
+        .endm
+        .macro  busyuart,rd,rx
+1001:   ldr     \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]         @ Read Status Register
+        tst     \rd, #AT91_DBGU_TXEMPTY                         @ DBGU_TXEMPTY = 1 when transmission complete
+        beq     1001b
+        .endm
diff --git a/include/asm-arm/arch-at91rm9200/dma.h b/include/asm-arm/arch-at91/dma.h
index 22c1dfdd8da3..774565412beb 100644
--- a/include/asm-arm/arch-at91rm9200/dma.h
+++ b/include/asm-arm/arch-at91/dma.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/dma.h
+ * include/asm-arm/arch-at91/dma.h
 *
 *  Copyright (C) 2003 SAN People
 *
diff --git a/include/asm-arm/arch-at91/entry-macro.S b/include/asm-arm/arch-at91/entry-macro.S
new file mode 100644
index 000000000000..cc1d850a0788
--- /dev/null
+++ b/include/asm-arm/arch-at91/entry-macro.S
@@ -0,0 +1,32 @@
+/*
+ * include/asm-arm/arch-at91/entry-macro.S
+ *
+ *  Copyright (C) 2003-2005 SAN People
+ *
+ * Low-level IRQ helper macros for AT91RM9200 platforms
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <asm/hardware.h>
+#include <asm/arch/at91_aic.h>
+        .macro  disable_fiq
+        .endm
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        ldr     \base, =(AT91_VA_BASE_SYS + AT91_AIC)           @ base virtual address of AIC peripheral
+        ldr     \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)]     @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
+        ldr     \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)]   @ read interrupt source number
+        teq     \irqstat, #0                                    @ ISR is 0 when no current interrupt, or spurious interrupt
+        streq   \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)]     @ not going to be handled further, then ACK it now.
+        .endm
diff --git a/include/asm-arm/arch-at91rm9200/gpio.h b/include/asm-arm/arch-at91/gpio.h
index e09d6528fadf..98ad2114f43a 100644
--- a/include/asm-arm/arch-at91rm9200/gpio.h
+++ b/include/asm-arm/arch-at91/gpio.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/gpio.h
+ * include/asm-arm/arch-at91/gpio.h
 *
 *  Copyright (C) 2005 HP Labs
 *
@@ -17,7 +17,7 @@
 #define PIN_BASE                NR_AIC_IRQS
-#define MAX_GPIO_BANKS          4
+#define MAX_GPIO_BANKS          5
 /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
@@ -26,37 +26,31 @@
 #define AT91_PIN_PA2    (PIN_BASE + 0x00 + 2)
 #define AT91_PIN_PA3    (PIN_BASE + 0x00 + 3)
 #define AT91_PIN_PA4    (PIN_BASE + 0x00 + 4)
 #define AT91_PIN_PA5    (PIN_BASE + 0x00 + 5)
 #define AT91_PIN_PA6    (PIN_BASE + 0x00 + 6)
 #define AT91_PIN_PA7    (PIN_BASE + 0x00 + 7)
 #define AT91_PIN_PA8    (PIN_BASE + 0x00 + 8)
 #define AT91_PIN_PA9    (PIN_BASE + 0x00 + 9)
 #define AT91_PIN_PA10   (PIN_BASE + 0x00 + 10)
 #define AT91_PIN_PA11   (PIN_BASE + 0x00 + 11)
 #define AT91_PIN_PA12   (PIN_BASE + 0x00 + 12)
 #define AT91_PIN_PA13   (PIN_BASE + 0x00 + 13)
 #define AT91_PIN_PA14   (PIN_BASE + 0x00 + 14)
 #define AT91_PIN_PA15   (PIN_BASE + 0x00 + 15)
 #define AT91_PIN_PA16   (PIN_BASE + 0x00 + 16)
 #define AT91_PIN_PA17   (PIN_BASE + 0x00 + 17)
 #define AT91_PIN_PA18   (PIN_BASE + 0x00 + 18)
 #define AT91_PIN_PA19   (PIN_BASE + 0x00 + 19)
 #define AT91_PIN_PA20   (PIN_BASE + 0x00 + 20)
 #define AT91_PIN_PA21   (PIN_BASE + 0x00 + 21)
 #define AT91_PIN_PA22   (PIN_BASE + 0x00 + 22)
 #define AT91_PIN_PA23   (PIN_BASE + 0x00 + 23)
 #define AT91_PIN_PA24   (PIN_BASE + 0x00 + 24)
 #define AT91_PIN_PA25   (PIN_BASE + 0x00 + 25)
 #define AT91_PIN_PA26   (PIN_BASE + 0x00 + 26)
 #define AT91_PIN_PA27   (PIN_BASE + 0x00 + 27)
 #define AT91_PIN_PA28   (PIN_BASE + 0x00 + 28)
 #define AT91_PIN_PA29   (PIN_BASE + 0x00 + 29)
 #define AT91_PIN_PA30   (PIN_BASE + 0x00 + 30)
 #define AT91_PIN_PA31   (PIN_BASE + 0x00 + 31)
@@ -65,37 +59,31 @@
 #define AT91_PIN_PB2    (PIN_BASE + 0x20 + 2)
 #define AT91_PIN_PB3    (PIN_BASE + 0x20 + 3)
 #define AT91_PIN_PB4    (PIN_BASE + 0x20 + 4)
 #define AT91_PIN_PB5    (PIN_BASE + 0x20 + 5)
 #define AT91_PIN_PB6    (PIN_BASE + 0x20 + 6)
 #define AT91_PIN_PB7    (PIN_BASE + 0x20 + 7)
 #define AT91_PIN_PB8    (PIN_BASE + 0x20 + 8)
 #define AT91_PIN_PB9    (PIN_BASE + 0x20 + 9)
 #define AT91_PIN_PB10   (PIN_BASE + 0x20 + 10)
 #define AT91_PIN_PB11   (PIN_BASE + 0x20 + 11)
 #define AT91_PIN_PB12   (PIN_BASE + 0x20 + 12)
 #define AT91_PIN_PB13   (PIN_BASE + 0x20 + 13)
 #define AT91_PIN_PB14   (PIN_BASE + 0x20 + 14)
 #define AT91_PIN_PB15   (PIN_BASE + 0x20 + 15)
 #define AT91_PIN_PB16   (PIN_BASE + 0x20 + 16)
 #define AT91_PIN_PB17   (PIN_BASE + 0x20 + 17)
 #define AT91_PIN_PB18   (PIN_BASE + 0x20 + 18)
 #define AT91_PIN_PB19   (PIN_BASE + 0x20 + 19)
 #define AT91_PIN_PB20   (PIN_BASE + 0x20 + 20)
 #define AT91_PIN_PB21   (PIN_BASE + 0x20 + 21)
 #define AT91_PIN_PB22   (PIN_BASE + 0x20 + 22)
 #define AT91_PIN_PB23   (PIN_BASE + 0x20 + 23)
 #define AT91_PIN_PB24   (PIN_BASE + 0x20 + 24)
 #define AT91_PIN_PB25   (PIN_BASE + 0x20 + 25)
 #define AT91_PIN_PB26   (PIN_BASE + 0x20 + 26)
 #define AT91_PIN_PB27   (PIN_BASE + 0x20 + 27)
 #define AT91_PIN_PB28   (PIN_BASE + 0x20 + 28)
 #define AT91_PIN_PB29   (PIN_BASE + 0x20 + 29)
 #define AT91_PIN_PB30   (PIN_BASE + 0x20 + 30)
 #define AT91_PIN_PB31   (PIN_BASE + 0x20 + 31)
@@ -104,37 +92,31 @@
 #define AT91_PIN_PC2    (PIN_BASE + 0x40 + 2)
 #define AT91_PIN_PC3    (PIN_BASE + 0x40 + 3)
 #define AT91_PIN_PC4    (PIN_BASE + 0x40 + 4)
 #define AT91_PIN_PC5    (PIN_BASE + 0x40 + 5)
 #define AT91_PIN_PC6    (PIN_BASE + 0x40 + 6)
 #define AT91_PIN_PC7    (PIN_BASE + 0x40 + 7)
 #define AT91_PIN_PC8    (PIN_BASE + 0x40 + 8)
 #define AT91_PIN_PC9    (PIN_BASE + 0x40 + 9)
 #define AT91_PIN_PC10   (PIN_BASE + 0x40 + 10)
 #define AT91_PIN_PC11   (PIN_BASE + 0x40 + 11)
 #define AT91_PIN_PC12   (PIN_BASE + 0x40 + 12)
 #define AT91_PIN_PC13   (PIN_BASE + 0x40 + 13)
 #define AT91_PIN_PC14   (PIN_BASE + 0x40 + 14)
 #define AT91_PIN_PC15   (PIN_BASE + 0x40 + 15)
 #define AT91_PIN_PC16   (PIN_BASE + 0x40 + 16)
 #define AT91_PIN_PC17   (PIN_BASE + 0x40 + 17)
 #define AT91_PIN_PC18   (PIN_BASE + 0x40 + 18)
 #define AT91_PIN_PC19   (PIN_BASE + 0x40 + 19)
 #define AT91_PIN_PC20   (PIN_BASE + 0x40 + 20)
 #define AT91_PIN_PC21   (PIN_BASE + 0x40 + 21)
 #define AT91_PIN_PC22   (PIN_BASE + 0x40 + 22)
 #define AT91_PIN_PC23   (PIN_BASE + 0x40 + 23)
 #define AT91_PIN_PC24   (PIN_BASE + 0x40 + 24)
 #define AT91_PIN_PC25   (PIN_BASE + 0x40 + 25)
 #define AT91_PIN_PC26   (PIN_BASE + 0x40 + 26)
 #define AT91_PIN_PC27   (PIN_BASE + 0x40 + 27)
 #define AT91_PIN_PC28   (PIN_BASE + 0x40 + 28)
 #define AT91_PIN_PC29   (PIN_BASE + 0x40 + 29)
 #define AT91_PIN_PC30   (PIN_BASE + 0x40 + 30)
 #define AT91_PIN_PC31   (PIN_BASE + 0x40 + 31)
@@ -143,40 +125,67 @@
 #define AT91_PIN_PD2    (PIN_BASE + 0x60 + 2)
 #define AT91_PIN_PD3    (PIN_BASE + 0x60 + 3)
 #define AT91_PIN_PD4    (PIN_BASE + 0x60 + 4)
 #define AT91_PIN_PD5    (PIN_BASE + 0x60 + 5)
 #define AT91_PIN_PD6    (PIN_BASE + 0x60 + 6)
 #define AT91_PIN_PD7    (PIN_BASE + 0x60 + 7)
 #define AT91_PIN_PD8    (PIN_BASE + 0x60 + 8)
 #define AT91_PIN_PD9    (PIN_BASE + 0x60 + 9)
 #define AT91_PIN_PD10   (PIN_BASE + 0x60 + 10)
 #define AT91_PIN_PD11   (PIN_BASE + 0x60 + 11)
 #define AT91_PIN_PD12   (PIN_BASE + 0x60 + 12)
 #define AT91_PIN_PD13   (PIN_BASE + 0x60 + 13)
 #define AT91_PIN_PD14   (PIN_BASE + 0x60 + 14)
 #define AT91_PIN_PD15   (PIN_BASE + 0x60 + 15)
 #define AT91_PIN_PD16   (PIN_BASE + 0x60 + 16)
 #define AT91_PIN_PD17   (PIN_BASE + 0x60 + 17)
 #define AT91_PIN_PD18   (PIN_BASE + 0x60 + 18)
 #define AT91_PIN_PD19   (PIN_BASE + 0x60 + 19)
 #define AT91_PIN_PD20   (PIN_BASE + 0x60 + 20)
 #define AT91_PIN_PD21   (PIN_BASE + 0x60 + 21)
 #define AT91_PIN_PD22   (PIN_BASE + 0x60 + 22)
 #define AT91_PIN_PD23   (PIN_BASE + 0x60 + 23)
 #define AT91_PIN_PD24   (PIN_BASE + 0x60 + 24)
 #define AT91_PIN_PD25   (PIN_BASE + 0x60 + 25)
 #define AT91_PIN_PD26   (PIN_BASE + 0x60 + 26)
 #define AT91_PIN_PD27   (PIN_BASE + 0x60 + 27)
 #define AT91_PIN_PD28   (PIN_BASE + 0x60 + 28)
 #define AT91_PIN_PD29   (PIN_BASE + 0x60 + 29)
 #define AT91_PIN_PD30   (PIN_BASE + 0x60 + 30)
 #define AT91_PIN_PD31   (PIN_BASE + 0x60 + 31)
+#define AT91_PIN_PE0    (PIN_BASE + 0x80 + 0)
+#define AT91_PIN_PE1    (PIN_BASE + 0x80 + 1)
+#define AT91_PIN_PE2    (PIN_BASE + 0x80 + 2)
+#define AT91_PIN_PE3    (PIN_BASE + 0x80 + 3)
+#define AT91_PIN_PE4    (PIN_BASE + 0x80 + 4)
+#define AT91_PIN_PE5    (PIN_BASE + 0x80 + 5)
+#define AT91_PIN_PE6    (PIN_BASE + 0x80 + 6)
+#define AT91_PIN_PE7    (PIN_BASE + 0x80 + 7)
+#define AT91_PIN_PE8    (PIN_BASE + 0x80 + 8)
+#define AT91_PIN_PE9    (PIN_BASE + 0x80 + 9)
+#define AT91_PIN_PE10   (PIN_BASE + 0x80 + 10)
+#define AT91_PIN_PE11   (PIN_BASE + 0x80 + 11)
+#define AT91_PIN_PE12   (PIN_BASE + 0x80 + 12)
+#define AT91_PIN_PE13   (PIN_BASE + 0x80 + 13)
+#define AT91_PIN_PE14   (PIN_BASE + 0x80 + 14)
+#define AT91_PIN_PE15   (PIN_BASE + 0x80 + 15)
+#define AT91_PIN_PE16   (PIN_BASE + 0x80 + 16)
+#define AT91_PIN_PE17   (PIN_BASE + 0x80 + 17)
+#define AT91_PIN_PE18   (PIN_BASE + 0x80 + 18)
+#define AT91_PIN_PE19   (PIN_BASE + 0x80 + 19)
+#define AT91_PIN_PE20   (PIN_BASE + 0x80 + 20)
+#define AT91_PIN_PE21   (PIN_BASE + 0x80 + 21)
+#define AT91_PIN_PE22   (PIN_BASE + 0x80 + 22)
+#define AT91_PIN_PE23   (PIN_BASE + 0x80 + 23)
+#define AT91_PIN_PE24   (PIN_BASE + 0x80 + 24)
+#define AT91_PIN_PE25   (PIN_BASE + 0x80 + 25)
+#define AT91_PIN_PE26   (PIN_BASE + 0x80 + 26)
+#define AT91_PIN_PE27   (PIN_BASE + 0x80 + 27)
+#define AT91_PIN_PE28   (PIN_BASE + 0x80 + 28)
+#define AT91_PIN_PE29   (PIN_BASE + 0x80 + 29)
+#define AT91_PIN_PE30   (PIN_BASE + 0x80 + 30)
+#define AT91_PIN_PE31   (PIN_BASE + 0x80 + 31)
 #ifndef __ASSEMBLY__
 /* setup setup routines, called from board init or driver probe() */
 extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91/hardware.h
index 9ea5bfe06320..eaaf1c12b753 100644
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91/hardware.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/hardware.h
+ * include/asm-arm/arch-at91/hardware.h
 *
 *  Copyright (C) 2003 SAN People
 *  Copyright (C) 2003 ATMEL
@@ -22,21 +22,23 @@
 #include <asm/arch/at91sam9260.h>
 #elif defined(CONFIG_ARCH_AT91SAM9261)
 #include <asm/arch/at91sam9261.h>
+#elif defined(CONFIG_ARCH_AT91SAM9263)
+#include <asm/arch/at91sam9263.h>
 #else
 #error "Unsupported AT91 processor"
 #endif
 /*
- * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
+ * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
- * to 0xFEFA0000 .. 0xFF000000.  (384Kb)
+ * to 0xFEF78000 .. 0xFF000000.  (5444Kb)
 */
-#define AT91_IO_PHYS_BASE       0xFFFA0000
+#define AT91_IO_PHYS_BASE       0xFFF78000
 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
 #define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
 /* Convert a physical IO address to virtual IO address */
-#define AT91_IO_P2V(x)  ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
+#define AT91_IO_P2V(x)          ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
 /*
 * Virtual to Physical Address mapping for IO devices.
diff --git a/include/asm-arm/arch-at91rm9200/io.h b/include/asm-arm/arch-at91/io.h
index 88fd1bebcef3..401f327ec047 100644
--- a/include/asm-arm/arch-at91rm9200/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/io.h
+ * include/asm-arm/arch-at91/io.h
 *
 *  Copyright (C) 2003 SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/irqs.h b/include/asm-arm/arch-at91/irqs.h
index c0679eaefaf2..1ffa3bb9a9c1 100644
--- a/include/asm-arm/arch-at91rm9200/irqs.h
+++ b/include/asm-arm/arch-at91/irqs.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/irqs.h
+ * include/asm-arm/arch-at91/irqs.h
 *
 *  Copyright (C) 2004 SAN People
 *
@@ -37,8 +37,8 @@
 * IRQ interrupt symbols are the AT91xxx_ID_* symbols
 * for IRQs handled directly through the AIC, or else the AT91_PIN_*
 * symbols in gpio.h for ones handled indirectly as GPIOs.
- * We make provision for 4 banks of GPIO.
+ * We make provision for 5 banks of GPIO.
 */
-#define NR_IRQS         (NR_AIC_IRQS + (4 * 32))
+#define NR_IRQS         (NR_AIC_IRQS + (5 * 32))
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/memory.h b/include/asm-arm/arch-at91/memory.h
index f985069e6d01..4835d6784509 100644
--- a/include/asm-arm/arch-at91rm9200/memory.h
+++ b/include/asm-arm/arch-at91/memory.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/memory.h
+ * include/asm-arm/arch-at91/memory.h
 *
 *  Copyright (C) 2004 SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/system.h b/include/asm-arm/arch-at91/system.h
index 9c67130603b2..6bf846098ea9 100644
--- a/include/asm-arm/arch-at91rm9200/system.h
+++ b/include/asm-arm/arch-at91/system.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/system.h
+ * include/asm-arm/arch-at91/system.h
 *
 *  Copyright (C) 2003 SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/timex.h b/include/asm-arm/arch-at91/timex.h
index faeca45a8d44..f41636d607a2 100644
--- a/include/asm-arm/arch-at91rm9200/timex.h
+++ b/include/asm-arm/arch-at91/timex.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/timex.h
+ * include/asm-arm/arch-at91/timex.h
 *
 *  Copyright (C) 2003 SAN People
 *
@@ -32,6 +32,11 @@
 #define AT91SAM9_MASTER_CLOCK   99300000
 #define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+#elif defined(CONFIG_ARCH_AT91SAM9263)
+#define AT91SAM9_MASTER_CLOCK   99959500
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
 #endif
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91/uncompress.h
index 34b4b93fa015..a193d28304b6 100644
--- a/include/asm-arm/arch-at91rm9200/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/uncompress.h
+ * include/asm-arm/arch-at91/uncompress.h
 *
 *  Copyright (C) 2003 SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/vmalloc.h b/include/asm-arm/arch-at91/vmalloc.h
index 0a23b8c562b9..bb05e70e932a 100644
--- a/include/asm-arm/arch-at91rm9200/vmalloc.h
+++ b/include/asm-arm/arch-at91/vmalloc.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91rm9200/vmalloc.h
+ * include/asm-arm/arch-at91/vmalloc.h
 *
 *  Copyright (C) 2003 SAN People
 *
diff --git a/include/asm-arm/arch-at91rm9200/at91_pdc.h b/include/asm-arm/arch-at91rm9200/at91_pdc.h
deleted file mode 100644
index 79d6e02fa45e..000000000000
--- a/include/asm-arm/arch-at91rm9200/at91_pdc.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * include/asm-arm/arch-at91rm9200/at91_pdc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Peripheral Data Controller (PDC) registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef AT91_PDC_H
-#define AT91_PDC_H
-#define AT91_PDC_RPR            0x100   /* Receive Pointer Register */
-#define AT91_PDC_RCR            0x104   /* Receive Counter Register */
-#define AT91_PDC_TPR            0x108   /* Transmit Pointer Register */
-#define AT91_PDC_TCR            0x10c   /* Transmit Counter Register */
-#define AT91_PDC_RNPR           0x110   /* Receive Next Pointer Register */
-#define AT91_PDC_RNCR           0x114   /* Receive Next Counter Register */
-#define AT91_PDC_TNPR           0x118   /* Transmit Next Pointer Register */
-#define AT91_PDC_TNCR           0x11c   /* Transmit Next Counter Register */
-#define AT91_PDC_PTCR           0x120   /* Transfer Control Register */
-#define         AT91_PDC_RXTEN          (1 << 0)        /* Receiver Transfer Enable */
-#define         AT91_PDC_RXTDIS         (1 << 1)        /* Receiver Transfer Disable */
-#define         AT91_PDC_TXTEN          (1 << 8)        /* Transmitter Transfer Enable */
-#define         AT91_PDC_TXTDIS         (1 << 9)        /* Transmitter Transfer Disable */
-#define AT91_PDC_PTSR           0x124   /* Transfer Status Register */
-#endif
diff --git a/include/asm-arm/arch-at91rm9200/debug-macro.S b/include/asm-arm/arch-at91rm9200/debug-macro.S
deleted file mode 100644
index 85cdadf26634..000000000000
--- a/include/asm-arm/arch-at91rm9200/debug-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * include/asm-arm/arch-at91rm9200/debug-macro.S
- *
- *  Copyright (C) 2003-2005 SAN People
- *
- * Debugging macro include header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-#include <asm/hardware.h>
-#include <asm/arch/at91_dbgu.h>
-        .macro  addruart,rx
-        mrc     p15, 0, \rx, c1, c0
-        tst     \rx, #1                         @ MMU enabled?
-        ldreq   \rx, =AT91_BASE_SYS             @ System peripherals (phys address)
-        ldrne   \rx, =AT91_VA_BASE_SYS          @ System peripherals (virt address)
-        .endm
-        .macro  senduart,rd,rx
-        strb    \rd, [\rx, #AT91_DBGU_THR]      @ Write to Transmitter Holding Register
-        .endm
-        .macro  waituart,rd,rx
-1001:   ldr     \rd, [\rx, #AT91_DBGU_SR]       @ Read Status Register
-        tst     \rd, #AT91_DBGU_TXRDY           @ DBGU_TXRDY = 1 when ready to transmit
-        beq     1001b
-        .endm
-        .macro  busyuart,rd,rx
-1001:   ldr     \rd, [\rx, #AT91_DBGU_SR]       @ Read Status Register
-        tst     \rd, #AT91_DBGU_TXEMPTY         @ DBGU_TXEMPTY = 1 when transmission complete
-        beq     1001b
-        .endm
diff --git a/include/asm-arm/arch-at91rm9200/entry-macro.S b/include/asm-arm/arch-at91rm9200/entry-macro.S
index 57248a796472..0e0aadf2a175 100644
--- a/include/asm-arm/arch-at91rm9200/entry-macro.S
+++ b/include/asm-arm/arch-at91rm9200/entry-macro.S
@@ -16,6 +16,12 @@
        .macro  disable_fiq
        .endm
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr     \base, =(AT91_VA_BASE_SYS)              @ base virtual address of SYS peripherals
        ldr     \irqnr, [\base, #AT91_AIC_IVR]          @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S
index c9e5395e5106..0cfb89b229d1 100644
--- a/include/asm-arm/arch-cl7500/entry-macro.S
+++ b/include/asm-arm/arch-cl7500/entry-macro.S
@@ -1,3 +1,8 @@
 #include <asm/hardware.h>
 #include <asm/hardware/entry-macro-iomd.S>
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S
index de4481dd8ba0..cd8c5a0bc7bc 100644
--- a/include/asm-arm/arch-clps711x/entry-macro.S
+++ b/include/asm-arm/arch-clps711x/entry-macro.S
@@ -13,6 +13,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
 #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
 #error INTSR stride != INTMR stride
 #endif
diff --git a/include/asm-arm/arch-ebsa110/entry-macro.S b/include/asm-arm/arch-ebsa110/entry-macro.S
index b12ca04f998c..aa23c5d6c69e 100644
--- a/include/asm-arm/arch-ebsa110/entry-macro.S
+++ b/include/asm-arm/arch-ebsa110/entry-macro.S
@@ -15,6 +15,12 @@
        .macro  disable_fiq
        .endm
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
        .macro  get_irqnr_and_base, irqnr, stat, base, tmp
        mov     \base, #IRQ_STAT
        ldrb    \stat, [\base]                  @ get interrupts
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
index ce812d4f4a33..4203dbf10662 100644
--- a/include/asm-arm/arch-ebsa285/entry-macro.S
+++ b/include/asm-arm/arch-ebsa285/entry-macro.S
@@ -14,6 +14,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .equ    dc21285_high, ARMCSR_BASE & 0xff000000
                .equ    dc21285_low, ARMCSR_BASE & 0x00ffffff
diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S
index 84140a28dfcf..241ec221a047 100644
--- a/include/asm-arm/arch-ep93xx/entry-macro.S
+++ b/include/asm-arm/arch-ep93xx/entry-macro.S
@@ -14,6 +14,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =(EP93XX_AHB_VIRT_BASE)
                orr     \base, \base, #0x000b0000
diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
index 593f562f85c3..625c6f0abc03 100644
--- a/include/asm-arm/arch-ep93xx/ep93xx-regs.h
+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
@@ -73,6 +73,11 @@
 #define EP93XX_GPIO_BASE                (EP93XX_APB_VIRT_BASE + 0x00040000)
 #define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
+#define EP93XX_GPIO_F_INT_TYPE1         EP93XX_GPIO_REG(0x4c)
+#define EP93XX_GPIO_F_INT_TYPE2         EP93XX_GPIO_REG(0x50)
+#define EP93XX_GPIO_F_INT_ACK           EP93XX_GPIO_REG(0x54)
+#define EP93XX_GPIO_F_INT_ENABLE        EP93XX_GPIO_REG(0x58)
+#define EP93XX_GPIO_F_INT_STATUS        EP93XX_GPIO_REG(0x5c)
 #define EP93XX_GPIO_A_INT_TYPE1         EP93XX_GPIO_REG(0x90)
 #define EP93XX_GPIO_A_INT_TYPE2         EP93XX_GPIO_REG(0x94)
 #define EP93XX_GPIO_A_INT_ACK           EP93XX_GPIO_REG(0x98)
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
index ae532e304bf1..2a8c63638c5e 100644
--- a/include/asm-arm/arch-ep93xx/irqs.h
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -67,9 +67,13 @@
 #define IRQ_EP93XX_SAI                  60
 #define EP93XX_VIC2_VALID_IRQ_MASK      0x1fffffff
-#define IRQ_EP93XX_GPIO(x)              (64 + (x))
+/*
+ * Map GPIO A0..A7 to irq 64..71, B0..B7 to 72..79, and
+ * F0..F7 to 80..87.
+ */
+#define IRQ_EP93XX_GPIO(x)              (64 + (((x) + (((x) >> 2) & 8)) & 0x1f))
-#define NR_EP93XX_IRQS                  IRQ_EP93XX_GPIO(16)
+#define NR_EP93XX_IRQS                  (64 + 24)
 #define EP93XX_BOARD_IRQ(x)             (NR_EP93XX_IRQS + (x))
 #define EP93XX_BOARD_IRQS               32
diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h
index b4a8deb8bdef..44eccec2cba4 100644
--- a/include/asm-arm/arch-ep93xx/platform.h
+++ b/include/asm-arm/arch-ep93xx/platform.h
@@ -8,7 +8,6 @@ void ep93xx_map_io(void);
 void ep93xx_init_irq(void);
 void ep93xx_init_time(unsigned long);
 void ep93xx_init_devices(void);
-void ep93xx_clock_init(void);
 extern struct sys_timer ep93xx_timer;
 struct ep93xx_eth_data
diff --git a/include/asm-arm/arch-h720x/entry-macro.S b/include/asm-arm/arch-h720x/entry-macro.S
index 8f165648e2af..38dd63ae104e 100644
--- a/include/asm-arm/arch-h720x/entry-macro.S
+++ b/include/asm-arm/arch-h720x/entry-macro.S
@@ -11,6 +11,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
                @ we could use the id register on H7202, but this is not
diff --git a/include/asm-arm/arch-imx/entry-macro.S b/include/asm-arm/arch-imx/entry-macro.S
index 3b9ef6914627..0b84e81031c3 100644
--- a/include/asm-arm/arch-imx/entry-macro.S
+++ b/include/asm-arm/arch-imx/entry-macro.S
@@ -11,21 +11,22 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
 #define AITC_NIVECSR   0x40
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, =IO_ADDRESS(IMX_AITC_BASE)
+                ldr     \base, =IO_ADDRESS(IMX_AITC_BASE)
                @ Load offset & priority of the highest priority
                @ interrupt pending.
-                ldr     \irqnr, [\irqstat, #AITC_NIVECSR]
+                ldr     \irqstat, [\base, #AITC_NIVECSR]
                @ Shift off the priority leaving the offset or
-                @ "interrupt number"
+                @ "interrupt number", use arithmetic shift to
-                mov     \irqnr, \irqnr, lsr #16
+                @ transform illegal source (0xffff) as -1
-                ldr     \irqstat, =1    @ dummy compare
+                mov     \irqnr, \irqstat, asr #16
-                ldr     \base, =0xFFFF          // invalid interrupt
+                adds    \tmp, \irqnr, #1
-                cmp     \irqnr, \base
-                bne     1001f
-                ldr     \irqstat, =0
-1001:
-                tst     \irqstat, #1    @ to make the condition code = TRUE
                .endm
diff --git a/include/asm-arm/arch-integrator/entry-macro.S b/include/asm-arm/arch-integrator/entry-macro.S
index 69838d04f90b..491af1a23de5 100644
--- a/include/asm-arm/arch-integrator/entry-macro.S
+++ b/include/asm-arm/arch-integrator/entry-macro.S
@@ -13,6 +13,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 /* FIXME: should not be using soo many LDRs here */
                ldr     \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
diff --git a/include/asm-arm/arch-iop13xx/entry-macro.S b/include/asm-arm/arch-iop13xx/entry-macro.S
index 94c50283dc56..a624a7870c64 100644
--- a/include/asm-arm/arch-iop13xx/entry-macro.S
+++ b/include/asm-arm/arch-iop13xx/entry-macro.S
@@ -19,21 +19,27 @@
        .macro  disable_fiq
        .endm
+        .macro get_irqnr_preamble, base, tmp
+        mrc     p15, 0, \tmp, c15, c1, 0
+        orr     \tmp, \tmp, #(1 << 6)
+        mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
+        .endm
        /*
         * Note: a 1-cycle window exists where iintvec will return the value
         * of iintbase, so we explicitly check for "bad zeros"
         */
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        mrc     p15, 0, \tmp, c15, c1, 0
-        orr     \tmp, \tmp, #(1 << 6)
-        mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
        mrc     p6, 0, \irqnr, c3, c2, 0        @ Read IINTVEC
        cmp     \irqnr, #0
        mrceq   p6, 0, \irqnr, c3, c2, 0        @ Re-read on potentially bad zero
        adds    \irqstat, \irqnr, #1            @ Check for 0xffffffff
        movne   \irqnr, \irqnr, lsr #2          @ Convert to irqnr
+        .endm
-        biceq   \tmp, \tmp, #(1 << 6)
+        .macro arch_ret_to_user, tmp1, tmp2
-        mcreq   p15, 0, \tmp, c15, c1, 0        @ Disable cp6 access if no more interrupts
+        mrc     p15, 0, \tmp1, c15, c1, 0
+        ands    \tmp2, \tmp1, #(1 << 6)
+        bicne   \tmp1, \tmp1, #(1 << 6)
+        mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
        .endm
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index a88522a0ff8e..d26b755a9879 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -9,34 +9,6 @@ void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_init_irq(void);
-void iop13xx_init_time(unsigned long tickrate);
-unsigned long iop13xx_gettimeoffset(void);
-/* handle cp6 access
- * to do: handle access in entry-armv5.S and unify with
- * the iop3xx implementation
- * note: use iop13xx_cp6_enable_irq_save and iop13xx_cp6_irq_restore (irq.h)
- * when interrupts are enabled
- */
-static inline unsigned long iop13xx_cp6_save(void)
-{
-        u32 temp, cp_flags;
-        asm volatile (
-                "mrc    p15, 0, %1, c15, c1, 0\n\t"
-                "orr    %0, %1, #(1 << 6)\n\t"
-                "mcr    p15, 0, %0, c15, c1, 0\n\t"
-                : "=r" (temp), "=r"(cp_flags));
-        return cp_flags;
-}
-static inline void iop13xx_cp6_restore(unsigned long cp_flags)
-{
-        asm volatile (
-                "mcr    p15, 0, %0, c15, c1, 0\n\t"
-                : : "r" (cp_flags) );
-}
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
@@ -479,14 +451,4 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PBI_BAR1                IOP13XX_PBI_OFFSET(0x10)
 #define IOP13XX_PBI_LR1                 IOP13XX_PBI_OFFSET(0x14)
-#define IOP13XX_TMR_TC                  0x01
-#define IOP13XX_TMR_EN                  0x02
-#define IOP13XX_TMR_RELOAD              0x04
-#define IOP13XX_TMR_PRIVILEGED          0x08
-#define IOP13XX_TMR_RATIO_1_1           0x00
-#define IOP13XX_TMR_RATIO_4_1           0x10
-#define IOP13XX_TMR_RATIO_8_1           0x20
-#define IOP13XX_TMR_RATIO_16_1          0x30
 #endif /* _IOP13XX_HW_H_ */
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h
index 442e35a40359..5c6fac2a4004 100644
--- a/include/asm-arm/arch-iop13xx/irqs.h
+++ b/include/asm-arm/arch-iop13xx/irqs.h
@@ -3,8 +3,6 @@
 #ifndef __ASSEMBLER__
 #include <linux/types.h>
-#include <asm/system.h> /* local_irq_save */
-#include <asm/arch/iop13xx.h> /* iop13xx_cp6_* */
 /* INTPND0 CP6 R0 Page 3
 */
@@ -41,21 +39,6 @@ static inline u32 read_intpnd_3(void)
        asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val));
        return val;
 }
-static inline void
-iop13xx_cp6_enable_irq_save(unsigned long *cp_flags, unsigned long *irq_flags)
-{
-        local_irq_save(*irq_flags);
-        *cp_flags = iop13xx_cp6_save();
-}
-static inline void
-iop13xx_cp6_irq_restore(unsigned long *cp_flags,
-        unsigned long *irq_flags)
-{
-        iop13xx_cp6_restore(*cp_flags);
-        local_irq_restore(*irq_flags);
-}
 #endif
 #define INTBASE 0
diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h
index ee3a62530af2..127827058e1f 100644
--- a/include/asm-arm/arch-iop13xx/system.h
+++ b/include/asm-arm/arch-iop13xx/system.h
@@ -48,12 +48,10 @@ static inline void arch_reset(char mode)
        /*
         * Reset the internal bus (warning both cores are reset)
         */
-        u32 cp_flags = iop13xx_cp6_save();
        write_wdtcr(IOP13XX_WDTCR_EN_ARM);
        write_wdtcr(IOP13XX_WDTCR_EN);
        write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
        write_wdtcr(0x1000);
-        iop13xx_cp6_restore(cp_flags);
        for(;;);
 }
diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h
new file mode 100644
index 000000000000..77a837a02dec
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/time.h
@@ -0,0 +1,51 @@
+#ifndef _IOP13XX_TIME_H_
+#define _IOP13XX_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
+#define IOP_TMR_EN          0x02
+#define IOP_TMR_RELOAD      0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1  0x00
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
+static inline void write_tmr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
+}
+static inline void write_tmr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val));
+}
+static inline u32 read_tcr0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val));
+        return val;
+}
+static inline u32 read_tcr1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
+        return val;
+}
+static inline void write_trr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val));
+}
+static inline void write_trr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val));
+}
+static inline void write_tisr(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val));
+}
+#endif
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 1500cbbd2295..207db99dfbd2 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -9,13 +9,28 @@
 */
 #include <asm/arch/iop32x.h>
-                .macro  disable_fiq
+        .macro  disable_fiq
-                .endm
+        .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        .macro get_irqnr_preamble, base, tmp
-                ldr     \base, =IOP3XX_REG_ADDR(0x07D8)
+        mrc     p15, 0, \tmp, c15, c1, 0
-                ldr     \irqstat, [\base]               @ Read IINTSRC
+        orr     \tmp, \tmp, #(1 << 6)
-                cmp     \irqstat, #0
+        mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
-                clzne   \irqnr, \irqstat
+        mrc     p15, 0, \tmp, c15, c1, 0
-                rsbne   \irqnr, \irqnr, #31
+        mov     \tmp, \tmp
-                .endm
+        sub     pc, pc, #4                      @ cp_wait
+        .endm
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
+        cmp     \irqstat, #0
+        clzne   \irqnr, \irqstat
+        rsbne   \irqnr, \irqnr, #31
+        .endm
+        .macro arch_ret_to_user, tmp1, tmp2
+        mrc     p15, 0, \tmp1, c15, c1, 0
+        ands    \tmp2, \tmp1, #(1 << 6)
+        bicne   \tmp1, \tmp1, #(1 << 6)
+        mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
+        .endm
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h
index 12d9ee02cde3..5f570a598a37 100644
--- a/include/asm-arm/arch-iop32x/io.h
+++ b/include/asm-arm/arch-iop32x/io.h
@@ -13,10 +13,16 @@
 #include <asm/hardware.h>
-#define IO_SPACE_LIMIT          0xffffffff
+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
+        unsigned long flags);
+extern void __iop3xx_iounmap(void __iomem *addr);
-#define __io(p)                 ((void __iomem *)(p))
+#define IO_SPACE_LIMIT          0xffffffff
+#define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
+#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f)
+#define __arch_iounmap(a)        __iop3xx_iounmap(a)
 #endif
diff --git a/include/asm-arm/arch-iop32x/time.h b/include/asm-arm/arch-iop32x/time.h
new file mode 100644
index 000000000000..0f28c9949623
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/time.h
@@ -0,0 +1,4 @@
+#ifndef _IOP32X_TIME_H_
+#define _IOP32X_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
+#endif
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 92b791702e34..b8e3d449e882 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -9,14 +9,29 @@
 */
 #include <asm/arch/iop33x.h>
-                .macro  disable_fiq
+        .macro  disable_fiq
-                .endm
+        .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        .macro get_irqnr_preamble, base, tmp
-                ldr     \base, =IOP3XX_REG_ADDR(0x07C8)
+        mrc     p15, 0, \tmp, c15, c1, 0
-                ldr     \irqstat, [\base]               @ Read IINTVEC
+        orr     \tmp, \tmp, #(1 << 6)
-                cmp     \irqstat, #0
+        mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
-                ldreq   \irqstat, [\base]               @ erratum 63 workaround
+        mrc     p15, 0, \tmp, c15, c1, 0
-                adds    \irqnr, \irqstat, #1
+        mov     \tmp, \tmp
-                movne   \irqnr, \irqstat, lsr #2
+        sub     pc, pc, #4                      @ cp_wait
-                .endm
+        .endm
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        mrc     p6, 0, \irqstat, c14, c0, 0     @ Read IINTVEC
+        cmp     \irqstat, #0
+        mrceq   p6, 0, \irqstat, c14, c0, 0     @ erratum 63 workaround
+        adds    \irqnr, \irqstat, #1
+        movne   \irqnr, \irqstat, lsr #2
+        .endm
+        .macro arch_ret_to_user, tmp1, tmp2
+        mrc     p15, 0, \tmp1, c15, c1, 0
+        ands    \tmp2, \tmp1, #(1 << 6)
+        bicne   \tmp1, \tmp1, #(1 << 6)
+        mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
+        .endm
diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h
index c017402bab96..1bb5071e1fa8 100644
--- a/include/asm-arm/arch-iop33x/io.h
+++ b/include/asm-arm/arch-iop33x/io.h
@@ -13,9 +13,16 @@
 #include <asm/hardware.h>
+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
+        unsigned long flags);
+extern void __iop3xx_iounmap(void __iomem *addr);
 #define IO_SPACE_LIMIT          0xffffffff
-#define __io(p)                 ((void __iomem *)(p))
+#define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
+#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f)
+#define __arch_iounmap(a)        __iop3xx_iounmap(a)
 #endif
diff --git a/include/asm-arm/arch-iop33x/time.h b/include/asm-arm/arch-iop33x/time.h
new file mode 100644
index 000000000000..4ac4d7664f85
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/time.h
@@ -0,0 +1,4 @@
+#ifndef _IOP33X_TIME_H_
+#define _IOP33X_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP33X_TIMER0
+#endif
diff --git a/include/asm-arm/arch-ixp2000/entry-macro.S b/include/asm-arm/arch-ixp2000/entry-macro.S
index 16e1e6124b31..11d512ad5945 100644
--- a/include/asm-arm/arch-ixp2000/entry-macro.S
+++ b/include/asm-arm/arch-ixp2000/entry-macro.S
@@ -12,6 +12,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     \irqnr, #0x0              @clear out irqnr as default
diff --git a/include/asm-arm/arch-ixp23xx/entry-macro.S b/include/asm-arm/arch-ixp23xx/entry-macro.S
index 867761677b57..ec9dd6fc2d0f 100644
--- a/include/asm-arm/arch-ixp23xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp23xx/entry-macro.S
@@ -5,6 +5,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
                ldr     \irqnr, [\irqnr]        @ get interrupt number
diff --git a/include/asm-arm/arch-ixp23xx/ixdp2351.h b/include/asm-arm/arch-ixp23xx/ixdp2351.h
index 4a24f8f15655..d5e8a43d7bbd 100644
--- a/include/asm-arm/arch-ixp23xx/ixdp2351.h
+++ b/include/asm-arm/arch-ixp23xx/ixdp2351.h
@@ -46,7 +46,7 @@
 #define IXDP2351_VIRT_NVRAM_BASE        IXDP2351_BB_AREA_BASE(0x0)
 #define IXDP2351_NVRAM_SIZE             (0x20000)
-#define IXDP2351_VIRT_MB_IXF1104_BASE   IXDP3251_BB_AREA_BASE(0x00020000)
+#define IXDP2351_VIRT_MB_IXF1104_BASE   IXDP2351_BB_AREA_BASE(0x00020000)
 #define IXDP2351_VIRT_ADD_UART_BASE     IXDP2351_BB_AREA_BASE(0x000240C0)
 #define IXDP2351_VIRT_FIC_BASE          IXDP2351_BB_AREA_BASE(0x00200000)
 #define IXDP2351_VIRT_DB0_BASE          IXDP2351_BB_AREA_BASE(0x00400000)
diff --git a/include/asm-arm/arch-ixp4xx/avila.h b/include/asm-arm/arch-ixp4xx/avila.h
new file mode 100644
index 000000000000..0dfea0ccd6ba
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/avila.h
@@ -0,0 +1,39 @@
+/*
+ * include/asm-arm/arch-ixp4xx/avila.h
+ *
+ * Gateworks Avila platform specific definitions
+ *
+ * Author: Michael-Luke Jones <mlj28@cam.ac.uk>
+ *
+ * Based on ixdp425.h
+ * Author: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * Copyright 2004 (c) MontaVista, Software, Inc.
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef __ASM_ARCH_HARDWARE_H__
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+#define AVILA_SDA_PIN           7
+#define AVILA_SCL_PIN           6
+/*
+ * AVILA PCI IRQs
+ */
+#define AVILA_PCI_MAX_DEV       4
+#define LOFT_PCI_MAX_DEV    6
+#define AVILA_PCI_IRQ_LINES     4
+/* PCI controller GPIO to IRQ pin mappings */
+#define AVILA_PCI_INTA_PIN      11
+#define AVILA_PCI_INTB_PIN      10
+#define AVILA_PCI_INTC_PIN      9
+#define AVILA_PCI_INTD_PIN      8
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index 27e124132e4c..dadb568b7ef0 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -12,6 +12,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
                ldr     \irqstat, [\irqstat]            @ get interrupts
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 6acb69c95ef9..88fd0877dcc1 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -42,6 +42,7 @@ extern unsigned int processor_id;
 /* Platform specific details */
 #include "ixdp425.h"
+#include "avila.h"
 #include "coyote.h"
 #include "prpmc1100.h"
 #include "nslu2.h"
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index f24b763ca18e..e44a563d00ff 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -79,6 +79,15 @@
 #define IRQ_IXDP425_PCI_INTD    IRQ_IXP4XX_GPIO8
 /*
+ * Gateworks Avila board IRQs
+ */
+#define IRQ_AVILA_PCI_INTA      IRQ_IXP4XX_GPIO11
+#define IRQ_AVILA_PCI_INTB      IRQ_IXP4XX_GPIO10
+#define IRQ_AVILA_PCI_INTC      IRQ_IXP4XX_GPIO9
+#define IRQ_AVILA_PCI_INTD      IRQ_IXP4XX_GPIO8
+/*
 * PrPMC1100 Board IRQs
 */
 #define IRQ_PRPMC1100_PCI_INTA  IRQ_IXP4XX_GPIO11
diff --git a/include/asm-arm/arch-ixp4xx/udc.h b/include/asm-arm/arch-ixp4xx/udc.h
index dbdec36ff0d1..79b850a3be47 100644
--- a/include/asm-arm/arch-ixp4xx/udc.h
+++ b/include/asm-arm/arch-ixp4xx/udc.h
@@ -6,3 +6,25 @@
 extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info);
+static inline int udc_gpio_to_irq(unsigned gpio)
+{
+        return 0;
+}
+static inline void udc_gpio_init_vbus(unsigned gpio)
+{
+}
+static inline void udc_gpio_init_pullup(unsigned gpio)
+{
+}
+static inline int udc_gpio_get(unsigned gpio)
+{
+        return 0;
+}
+static inline void udc_gpio_set(unsigned gpio, int is_on)
+{
+}
diff --git a/include/asm-arm/arch-l7200/entry-macro.S b/include/asm-arm/arch-l7200/entry-macro.S
index 8b6342dc4be2..63411d3e9df4 100644
--- a/include/asm-arm/arch-l7200/entry-macro.S
+++ b/include/asm-arm/arch-l7200/entry-macro.S
@@ -14,6 +14,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     \irqstat, #irq_base_addr                @ Virt addr IRQ regs
                add     \irqstat, \irqstat, #0x00001000         @ Status reg
diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S
index 9fc7f4988124..502700604e00 100644
--- a/include/asm-arm/arch-lh7a40x/entry-macro.S
+++ b/include/asm-arm/arch-lh7a40x/entry-macro.S
@@ -26,6 +26,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 branch_irq_lh7a400: b 1000f
diff --git a/include/asm-arm/arch-netx/entry-macro.S b/include/asm-arm/arch-netx/entry-macro.S
index 658df4d60ff3..83ad188a0847 100644
--- a/include/asm-arm/arch-netx/entry-macro.S
+++ b/include/asm-arm/arch-netx/entry-macro.S
@@ -23,6 +23,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     \base, #io_p2v(0x00100000)
                add     \base, \base, #0x000ff000
diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h
new file mode 100644
index 000000000000..91dc8fb1027f
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/board.h
@@ -0,0 +1,18 @@
+/*
+ * include/asm-arm/arch-ns9xxx/board.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_BOARD_H
+#define __ASM_ARCH_BOARD_H
+#include <asm/mach-types.h>
+#define board_is_a9m9750dev()   (machine_is_cc9p9360dev())
+#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
new file mode 100644
index 000000000000..4371a485db47
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -0,0 +1,37 @@
+/*
+ * include/asm-arm/arch-ns9xxx/clock.h
+ *
+ * Copyright (C) 2007 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H
+static inline u32 ns9xxx_systemclock(void)
+{
+        /*
+         * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c)
+         */
+        return 353894400;
+}
+static inline const u32 ns9xxx_cpuclock(void)
+{
+        return ns9xxx_systemclock() / 2;
+}
+static inline const u32 ns9xxx_ahbclock(void)
+{
+        return ns9xxx_systemclock() / 4;
+}
+static inline const u32 ns9xxx_bbusclock(void)
+{
+        return ns9xxx_systemclock() / 8;
+}
+#endif /* ifndef __ASM_ARCH_CLOCK_H */
diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S
new file mode 100644
index 000000000000..b21b93eb2dbc
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/debug-macro.S
@@ -0,0 +1,22 @@
+/*
+ * include/asm-arm/arch-ns9xxx/debug-macro.S
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#include <asm/hardware.h>
+#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, =NS9XXX_CSxSTAT_PHYS(0)
+                ldrne   \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
+                .endm
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-ns9xxx/dma.h b/include/asm-arm/arch-ns9xxx/dma.h
new file mode 100644
index 000000000000..a67cbbe009c4
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/dma.h
@@ -0,0 +1,14 @@
+/*
+ * include/asm-arm/arch-ns9xxx/dma.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+#endif /* ifndef __ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S
new file mode 100644
index 000000000000..467a1986d259
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/entry-macro.S
@@ -0,0 +1,22 @@
+/*
+ * include/asm-arm/arch-ns9xxx/entry-macro.S
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#include <asm/hardware.h>
+#include <asm/arch-ns9xxx/regs-sys.h>
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \base, =SYS_ISRADDR
+                ldr     \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)]
+                cmp     \irqstat, #0
+                ldrne   \irqnr, [\base]
+                .endm
+                .macro  disable_fiq
+                .endm
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
new file mode 100644
index 000000000000..6819da7c48d4
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -0,0 +1,67 @@
+/*
+ * include/asm-arm/arch-ns9xxx/hardware.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+#include <asm/memory.h>
+/*
+ * NetSilicon NS9xxx internal mapping:
+ *
+ * physical                <--> virtual
+ * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff
+ * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff
+ */
+#define io_p2v(x)       (0xf0000000 \
+                         + (((x) & 0xf0000000) >> 4) \
+                         + ((x) & 0x00ffffff))
+#define io_v2p(x)       ((((x) & 0x0f000000) << 4) \
+                         + ((x) & 0x00ffffff))
+#define __REGBIT(bit)           ((u32)1 << (bit))
+#define __REGBITS(hbit, lbit)   ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit))
+#define __REGVAL(mask, value)   (((value) * ((mask) & (-(mask))) & (mask)))
+#ifndef __ASSEMBLY__
+#  define __REG(x)      (*((volatile u32 *)io_p2v((x))))
+#  define __REG2(x, y)  (*((volatile u32 *)io_p2v((x)) + (y)))
+#  define __REGB(x)     (*((volatile u8 *)io_p2v((x))))
+#  define __REGB2(x)    (*((volatile u8 *)io_p2v((x)) + (y)))
+#  define REGSET(var, reg, field, value)                                \
+        ((var) = (((var)                                                \
+                   & ~(reg ## _ ## field &                              \
+                       ~ reg ## _ ## field ## _ ## value))              \
+                  | (reg ## _ ## field ## _ ## value)))
+#  define REGSETIM(var, reg, field, value)                              \
+        ((var) = (((var)                                                \
+                   & ~(reg ## _ ## field &                              \
+                       ~(__REGVAL(reg ## _ ## field, value))))          \
+                  | (__REGVAL(reg ## _ ## field, value))))
+#  define REGGET(reg, field)                                            \
+        ((reg & (reg ## _ ## field)) / (field & (-field)))
+#else
+#  define __REG(x)      io_p2v(x)
+#  define __REG2(x, y)  io_p2v((x) + (y))
+#  define __REGB(x)     __REG((x))
+#  define __REGB2(x, y) __REG2((x), (y))
+#endif
+#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ns9xxx/io.h b/include/asm-arm/arch-ns9xxx/io.h
new file mode 100644
index 000000000000..6f82d28af120
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/io.h
@@ -0,0 +1,20 @@
+/*
+ * include/asm-arm/arch-ns9xxx/io.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_IO_H
+#define __ASM_ARCH_IO_H
+#define IO_SPACE_LIMIT  0xffffffff /* XXX */
+#define __io(a)         ((void __iomem *)(a))
+#define __mem_pci(a)    (a)
+#define __mem_isa(a)    (IO_BASE + (a))
+#endif /* ifndef __ASM_ARCH_IO_H */
diff --git a/include/asm-arm/arch-ns9xxx/irqs.h b/include/asm-arm/arch-ns9xxx/irqs.h
new file mode 100644
index 000000000000..25d8d28b27f3
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/irqs.h
@@ -0,0 +1,85 @@
+/*
+ * include/asm-arm/arch-ns9xxx/irqs.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+#define IRQ_WATCHDOG    0
+#define IRQ_AHBBUSERR   1
+#define IRQ_BBUSAGG     2
+/* irq 3 is reserved for NS9360 */
+#define IRQ_ETHRX       4
+#define IRQ_ETHTX       5
+#define IRQ_ETHPHY      6
+#define IRQ_LCD         7
+#define IRQ_SERBRX      8
+#define IRQ_SERBTX      9
+#define IRQ_SERARX      10
+#define IRQ_SERATX      11
+#define IRQ_SERCRX      12
+#define IRQ_SERCTX      13
+#define IRQ_I2C         14
+#define IRQ_BBUSDMA     15
+#define IRQ_TIMER0      16
+#define IRQ_TIMER1      17
+#define IRQ_TIMER2      18
+#define IRQ_TIMER3      19
+#define IRQ_TIMER4      20
+#define IRQ_TIMER5      21
+#define IRQ_TIMER6      22
+#define IRQ_TIMER7      23
+#define IRQ_RTC         24
+#define IRQ_USBHOST     25
+#define IRQ_USBDEVICE   26
+#define IRQ_IEEE1284    27
+#define IRQ_EXT0        28
+#define IRQ_EXT1        29
+#define IRQ_EXT2        30
+#define IRQ_EXT3        31
+#define BBUS_IRQ(irq)   (32 + irq)
+#define IRQ_BBUS_DMA            BBUS_IRQ(0)
+#define IRQ_BBUS_SERBRX         BBUS_IRQ(2)
+#define IRQ_BBUS_SERBTX         BBUS_IRQ(3)
+#define IRQ_BBUS_SERARX         BBUS_IRQ(4)
+#define IRQ_BBUS_SERATX         BBUS_IRQ(5)
+#define IRQ_BBUS_SERCRX         BBUS_IRQ(6)
+#define IRQ_BBUS_SERCTX         BBUS_IRQ(7)
+#define IRQ_BBUS_SERDRX         BBUS_IRQ(8)
+#define IRQ_BBUS_SERDTX         BBUS_IRQ(9)
+#define IRQ_BBUS_I2C            BBUS_IRQ(10)
+#define IRQ_BBUS_1284           BBUS_IRQ(11)
+#define IRQ_BBUS_UTIL           BBUS_IRQ(12)
+#define IRQ_BBUS_RTC            BBUS_IRQ(13)
+#define IRQ_BBUS_USBHST         BBUS_IRQ(14)
+#define IRQ_BBUS_USBDEV         BBUS_IRQ(15)
+#define IRQ_BBUS_AHBDMA1        BBUS_IRQ(24)
+#define IRQ_BBUS_AHBDMA2        BBUS_IRQ(25)
+/*
+ * these Interrupts are specific for the a9m9750dev board.
+ * They are generated by an FPGA that interrupts the CPU on
+ * IRQ_EXT2
+ */
+#define FPGA_IRQ(irq)   (64 + irq)
+#define IRQ_FPGA_UARTA          FPGA_IRQ(0)
+#define IRQ_FPGA_UARTB          FPGA_IRQ(1)
+#define IRQ_FPGA_UARTC          FPGA_IRQ(2)
+#define IRQ_FPGA_UARTD          FPGA_IRQ(3)
+#define IRQ_FPGA_TOUCH          FPGA_IRQ(4)
+#define IRQ_FPGA_CF             FPGA_IRQ(5)
+#define IRQ_FPGA_CAN0           FPGA_IRQ(6)
+#define IRQ_FPGA_CAN1           FPGA_IRQ(7)
+#define NR_IRQS 72
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-ns9xxx/memory.h b/include/asm-arm/arch-ns9xxx/memory.h
new file mode 100644
index 000000000000..ce1343e593e1
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/memory.h
@@ -0,0 +1,27 @@
+/*
+ * include/asm-arm/arch-ns9xxx/memory.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+*/
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+/* x in [0..3] */
+#define NS9XXX_CSxSTAT_PHYS(x)  UL(((x) + 4) << 28)
+#define NS9XXX_CS0STAT_LENGTH   UL(0x1000)
+#define NS9XXX_CS1STAT_LENGTH   UL(0x1000)
+#define NS9XXX_CS2STAT_LENGTH   UL(0x1000)
+#define NS9XXX_CS3STAT_LENGTH   UL(0x1000)
+#define PHYS_OFFSET     UL(0x00000000)
+#define __virt_to_bus(x) __virt_to_phys(x)
+#define __bus_to_virt(x) __phys_to_virt(x)
+#endif
diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h
new file mode 100644
index 000000000000..716c106ac0bf
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/processor.h
@@ -0,0 +1,18 @@
+/*
+ * include/asm-arm/arch-ns9xxx/processor.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_PROCESSOR_H
+#define __ASM_ARCH_PROCESSOR_H
+#include <asm/mach-types.h>
+#define processor_is_ns9360()   (machine_is_cc9p9360dev())
+#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-bbu.h b/include/asm-arm/arch-ns9xxx/regs-bbu.h
new file mode 100644
index 000000000000..e26269546240
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-bbu.h
@@ -0,0 +1,21 @@
+/*
+ * include/asm-arm/arch-ns9xxx/regs-bbu.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_REGSBBU_H
+#define __ASM_ARCH_REGSBBU_H
+#include <asm/hardware.h>
+/* BBus Utility */
+/* GPIO Configuration Register */
+#define BBU_GC(x)       __REG2(0x9060000c, (x))
+#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
new file mode 100644
index 000000000000..c3dc532dd20c
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
@@ -0,0 +1,24 @@
+/*
+ * include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
+#define __ASM_ARCH_REGSBOARDA9M9750_H
+#include <asm/hardware.h>
+#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0))
+#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
+#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
+#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
+#define FPGA_IER        __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
+#define FPGA_ISR        __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
+#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-mem.h b/include/asm-arm/arch-ns9xxx/regs-mem.h
new file mode 100644
index 000000000000..8ed8448767b9
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-mem.h
@@ -0,0 +1,135 @@
+/*
+ * include/asm-arm/arch-ns9xxx/regs-mem.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_REGSMEM_H
+#define __ASM_ARCH_REGSMEM_H
+#include <asm/hardware.h>
+/* Memory Module */
+/* Control register */
+#define MEM_CTRL        __REG(0xa0700000)
+/* Status register */
+#define MEM_STAT        __REG(0xa0700004)
+/* Configuration register */
+#define MEM_CONF        __REG(0xa0700008)
+/* Dynamic Memory Control register */
+#define MEM_DMCTRL      __REG(0xa0700020)
+/* Dynamic Memory Refresh Timer */
+#define MEM_DMRT        __REG(0xa0700024)
+/* Dynamic Memory Read Configuration register */
+#define MEM_DMRC        __REG(0xa0700028)
+/* Dynamic Memory Precharge Command Period (tRP) */
+#define MEM_DMPCP       __REG(0xa0700030)
+/* Dynamic Memory Active to Precharge Command Period (tRAS) */
+#define MEM_DMAPCP      __REG(0xa0700034)
+/* Dynamic Memory Self-Refresh Exit Time (tSREX) */
+#define MEM_DMSRET      __REG(0xa0700038)
+/* Dynamic Memory Last Data Out to Active Time (tAPR) */
+#define MEM_DMLDOAT     __REG(0xa070003c)
+/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */
+#define MEM_DMDIACT     __REG(0xa0700040)
+/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */
+#define MEM_DMWRT       __REG(0xa0700044)
+/* Dynamic Memory Active to Active Command Period (tRC) */
+#define MEM_DMAACP      __REG(0xa0700048)
+/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */
+#define MEM_DMARP       __REG(0xa070004c)
+/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */
+#define MEM_DMESRAC     __REG(0xa0700050)
+/* Dynamic Memory Active Bank A to Active B Time (tRRD) */
+#define MEM_DMABAABT    __REG(0xa0700054)
+/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */
+#define MEM_DMLMACT     __REG(0xa0700058)
+/* Static Memory Extended Wait */
+#define MEM_SMEW        __REG(0xa0700080)
+/* Dynamic Memory Configuration Register x */
+#define MEM_DMCONF(x)   __REG2(0xa0700100, (x) << 3)
+/* Dynamic Memory RAS and CAS Delay x */
+#define MEM_DMRCD(x)    __REG2(0xa0700104, (x) << 3)
+/* Static Memory Configuration Register x */
+#define MEM_SMC(x)      __REG2(0xa0700200, (x) << 3)
+/* Static Memory Configuration Register x: Write protect */
+#define MEM_SMC_WSMC            __REGBIT(20)
+#define MEM_SMC_WSMC_OFF                __REGVAL(MEM_SMC_WSMC, 0)
+#define MEM_SMC_WSMC_ON                 __REGVAL(MEM_SMC_WSMC, 1)
+/* Static Memory Configuration Register x: Buffer enable */
+#define MEM_SMC_BSMC            __REGBIT(19)
+#define MEM_SMC_BSMC_OFF                __REGVAL(MEM_SMC_BSMC, 0)
+#define MEM_SMC_BSMC_ON                 __REGVAL(MEM_SMC_BSMC, 1)
+/* Static Memory Configuration Register x: Extended Wait */
+#define MEM_SMC_EW              __REGBIT(8)
+#define MEM_SMC_EW_OFF                  __REGVAL(MEM_SMC_EW, 0)
+#define MEM_SMC_EW_ON                   __REGVAL(MEM_SMC_EW, 1)
+/* Static Memory Configuration Register x: Byte lane state */
+#define MEM_SMC_PB              __REGBIT(7)
+#define MEM_SMC_PB_0                    __REGVAL(MEM_SMC_PB, 0)
+#define MEM_SMC_PB_1                    __REGVAL(MEM_SMC_PB, 1)
+/* Static Memory Configuration Register x: Chip select polarity */
+#define MEM_SMC_PC              __REGBIT(6)
+#define MEM_SMC_PC_AL                   __REGVAL(MEM_SMC_PC, 0)
+#define MEM_SMC_PC_AH                   __REGVAL(MEM_SMC_PC, 1)
+/* static memory configuration register x: page mode*/
+#define MEM_SMC_PM              __REGBIT(3)
+#define MEM_SMC_PM_DIS                  __REGVAL(MEM_SMC_PM, 0)
+#define MEM_SMC_PM_ASYNC                __REGVAL(MEM_SMC_PM, 1)
+/* static memory configuration register x: Memory width */
+#define MEM_SMC_MW              __REGBITS(1, 0)
+#define MEM_SMC_MW_8                    __REGVAL(MEM_SMC_MW, 0)
+#define MEM_SMC_MW_16                   __REGVAL(MEM_SMC_MW, 1)
+#define MEM_SMC_MW_32                   __REGVAL(MEM_SMC_MW, 2)
+/* Static Memory Write Enable Delay x */
+#define MEM_SMWED(x)    __REG2(0xa0700204, (x) << 3)
+/* Static Memory Output Enable Delay x */
+#define MEM_SMOED(x)    __REG2(0xa0700208, (x) << 3)
+/* Static Memory Read Delay x */
+#define MEM_SMRD(x)     __REG2(0xa070020c, (x) << 3)
+/* Static Memory Page Mode Read Delay 0 */
+#define MEM_SMPMRD(x)   __REG2(0xa0700210, (x) << 3)
+/* Static Memory Write Delay */
+#define MEM_SMWD(x)     __REG2(0xa0700214, (x) << 3)
+/* Static Memory Turn Round Delay x */
+#define MEM_SWT(x)      __REG2(0xa0700218, (x) << 3)
+#endif /* ifndef __ASM_ARCH_REGSMEM_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
new file mode 100644
index 000000000000..8162a50bb273
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -0,0 +1,157 @@
+/*
+ * include/asm-arm/arch-ns9xxx/regs-sys.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_REGSSYS_H
+#define __ASM_ARCH_REGSSYS_H
+#include <asm/hardware.h>
+/* System Control Module */
+/* AHB Arbiter Gen Configuration */
+#define SYS_AHBAGENCONF __REG(0xa0900000)
+/* BRC */
+#define SYS_BRC(x)      __REG2(0xa0900004, (x))
+/* Timer x Reload Count register */
+#define SYS_TRC(x)      __REG2(0xa0900044, (x))
+/* Timer x Read register */
+#define SYS_TR(x)       __REG2(0xa0900084, (x))
+/* Interrupt Vector Address Register Level x */
+#define SYS_IVA(x)      __REG2(0xa09000c4, (x))
+/* Interrupt Configuration registers */
+#define SYS_IC(x)       __REG2(0xa0900144, (x))
+/* ISRADDR */
+#define SYS_ISRADDR     __REG(0xa0900164)
+/* Interrupt Status Active */
+#define SYS_ISA         __REG(0xa0900168)
+/* Interrupt Status Raw */
+#define SYS_ISR         __REG(0xa090016c)
+/* Timer Interrupt Status register */
+#define SYS_TIS         __REG(0xa0900170)
+/* PLL Configuration register */
+#define SYS_PLL         __REG(0xa0900188)
+/* PLL Configuration register: PLL SW change */
+#define SYS_PLL_SWC             __REGBIT(15)
+#define SYS_PLL_SWC_NO                  __REGVAL(SYS_PLL_SWC, 0)
+#define SYS_PLL_SWC_YES                 __REGVAL(SYS_PLL_SWC, 1)
+/* Timer x Control register */
+#define SYS_TC(x)       __REG2(0xa0900190, (x))
+/* Timer x Control register: Timer enable */
+#define SYS_TCx_TEN             __REGBIT(15)
+#define SYS_TCx_TEN_DIS                 __REGVAL(SYS_TCx_TEN, 1)
+#define SYS_TCx_TEN_EN                  __REGVAL(SYS_TCx_TEN, 1)
+/* Timer x Control register: CPU debug mode */
+#define SYS_TCx_TDBG            __REGBIT(10)
+#define SYS_TCx_TDBG_CONT               __REGVAL(SYS_TCx_TDBG, 0)
+#define SYS_TCx_TDBG_STOP               __REGVAL(SYS_TCx_TDBG, 1)
+/* Timer x Control register: Interrupt clear */
+#define SYS_TCx_INTC            __REGBIT(9)
+#define SYS_TCx_INTC_UNSET              __REGVAL(SYS_TCx_INTC, 0)
+#define SYS_TCx_INTC_SET                __REGVAL(SYS_TCx_INTC, 1)
+/* Timer x Control register: Timer clock select */
+#define SYS_TCx_TLCS            __REGBITS(8, 6)
+#define SYS_TCx_TLCS_CPU                __REGVAL(SYS_TCx_TLCS, 0)       /* CPU clock */
+#define SYS_TCx_TLCS_DIV2               __REGVAL(SYS_TCx_TLCS, 1)       /* CPU clock / 2 */
+#define SYS_TCx_TLCS_DIV4               __REGVAL(SYS_TCx_TLCS, 2)       /* CPU clock / 4 */
+#define SYS_TCx_TLCS_DIV8               __REGVAL(SYS_TCx_TLCS, 3)       /* CPU clock / 8 */
+#define SYS_TCx_TLCS_DIV16              __REGVAL(SYS_TCx_TLCS, 4)       /* CPU clock / 16 */
+#define SYS_TCx_TLCS_DIV32              __REGVAL(SYS_TCx_TLCS, 5)       /* CPU clock / 32 */
+#define SYS_TCx_TLCS_DIV64              __REGVAL(SYS_TCx_TLCS, 6)       /* CPU clock / 64 */
+#define SYS_TCx_TLCS_EXT                __REGVAL(SYS_TCx_TLCS, 7)
+/* Timer x Control register: Timer mode */
+#define SYS_TCx_TM              __REGBITS(5, 4)
+#define SYS_TCx_TM_IEE                  __REGVAL(SYS_TCx_TM, 0)         /* Internal timer or external event */
+#define SYS_TCx_TM_ELL                  __REGVAL(SYS_TCx_TM, 1)         /* External low-level, gated timer */
+#define SYS_TCx_TM_EHL                  __REGVAL(SYS_TCx_TM, 2)         /* External high-level, gated timer */
+#define SYS_TCx_TM_CONCAT               __REGVAL(SYS_TCx_TM, 3)         /* Concatenate the lower timer. */
+/* Timer x Control register: Interrupt select */
+#define SYS_TCx_INTS            __REGBIT(3)
+#define SYS_TCx_INTS_DIS                __REGVAL(SYS_TCx_INTS, 0)
+#define SYS_TCx_INTS_EN                 __REGVAL(SYS_TCx_INTS, 1)
+/* Timer x Control register: Up/down select */
+#define SYS_TCx_UDS             __REGBIT(2)
+#define SYS_TCx_UDS_UP                  __REGVAL(SYS_TCx_UDS, 0)
+#define SYS_TCx_UDS_DOWN                __REGVAL(SYS_TCx_UDS, 1)
+/* Timer x Control register: 32- or 16-bit timer */
+#define SYS_TCx_TSZ             __REGBIT(1)
+#define SYS_TCx_TSZ_16                  __REGVAL(SYS_TCx_TSZ, 0)
+#define SYS_TCx_TSZ_32                  __REGVAL(SYS_TCx_TSZ, 1)
+/* Timer x Control register: Reload enable */
+#define SYS_TCx_REN             __REGBIT(0)
+#define SYS_TCx_REN_DIS                 __REGVAL(SYS_TCx_REN, 0)
+#define SYS_TCx_REN_EN                  __REGVAL(SYS_TCx_REN, 1)
+/* System Memory Chip Select x Dynamic Memory Base */
+#define SYS_SMCSDMB(x)  __REG2(0xa09001d0, (x) << 1)
+/* System Memory Chip Select x Dynamic Memory Mask */
+#define SYS_SMCSDMM(x)  __REG2(0xa09001d4, (x) << 1)
+/* System Memory Chip Select x Static Memory Base */
+#define SYS_SMCSSMB(x)  __REG2(0xa09001f0, (x) << 1)
+/* System Memory Chip Select x Static Memory Base: Chip select x base */
+#define SYS_SMCSSMB_CSxB        __REGBITS(31, 12)
+/* System Memory Chip Select x Static Memory Mask */
+#define SYS_SMCSSMM(x)  __REG2(0xa09001f4, (x) << 1)
+/* System Memory Chip Select x Static Memory Mask: Chip select x mask */
+#define SYS_SMCSSMM_CSxM        __REGBITS(31, 12)
+/* System Memory Chip Select x Static Memory Mask: Chip select x enable */
+#define SYS_SMCSSMM_CSEx        __REGBIT(0)
+#define SYS_SMCSSMM_CSEx_DIS            __REGVAL(SYS_SMCSSMM_CSEx, 0)
+#define SYS_SMCSSMM_CSEx_EN             __REGVAL(SYS_SMCSSMM_CSEx, 1)
+/* General purpose, user-defined ID register */
+#define SYS_GENID       __REG(0xa0900210)
+/* External Interrupt x Control register */
+#define SYS_EIC(x)      __REG2(0xa0900214, (x))
+/* External Interrupt x Control register: Status */
+#define SYS_EIC_STS             __REGBIT(3)
+/* External Interrupt x Control register: Clear */
+#define SYS_EIC_CLR             __REGBIT(2)
+/* External Interrupt x Control register: Polarity */
+#define SYS_EIC_PLTY            __REGBIT(1)
+#define SYS_EIC_PLTY_AH                 __REGVAL(SYS_EIC_PLTY, 0)
+#define SYS_EIC_PLTY_AL                 __REGVAL(SYS_EIC_PLTY, 1)
+/* External Interrupt x Control register: Level edge */
+#define SYS_EIC_LVEDG           __REGBIT(0)
+#define SYS_EIC_LVEDG_LEVEL             __REGVAL(SYS_EIC_LVEDG, 0)
+#define SYS_EIC_LVEDG_EDGE              __REGVAL(SYS_EIC_LVEDG, 1)
+#endif /* ifndef __ASM_ARCH_REGSSYS_H */
diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h
new file mode 100644
index 000000000000..e3cd4d31b3f3
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/system.h
@@ -0,0 +1,34 @@
+/*
+ * include/asm-arm/arch-ns9xxx/system.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+#include <asm/proc-fns.h>
+#include <asm/arch-ns9xxx/regs-sys.h>
+#include <asm/mach-types.h>
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+static inline void arch_reset(char mode)
+{
+        u32 reg;
+        reg = SYS_PLL >> 16;
+        REGSET(reg, SYS_PLL, SWC, YES);
+        SYS_PLL = reg;
+        BUG();
+}
+#endif /* ifndef __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-ns9xxx/timex.h b/include/asm-arm/arch-ns9xxx/timex.h
new file mode 100644
index 000000000000..f776cbd2622d
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/timex.h
@@ -0,0 +1,20 @@
+/*
+ * include/asm-arm/arch-ns9xxx/timex.h
+ *
+ * Copyright (C) 2005-2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+/*
+ * value for CLOCK_TICK_RATE stolen from include/asm-arm/arch-s3c2410/timex.h.
+ * See there for an explanation.
+ */
+#define CLOCK_TICK_RATE         12000000
+#endif /* ifndef __ASM_ARCH_TIMEX_H */
diff --git a/include/asm-arm/arch-ns9xxx/uncompress.h b/include/asm-arm/arch-ns9xxx/uncompress.h
new file mode 100644
index 000000000000..961ca7dc9954
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/uncompress.h
@@ -0,0 +1,35 @@
+/*
+ * include/asm-arm/arch-ns9xxx/uncompress.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+static void putc(char c)
+{
+        volatile u8 *base = (volatile u8 *)0x40000000;
+        int t = 0x10000;
+        do {
+                if (base[5] & 0x20) {
+                        base[0] = c;
+                        break;
+                }
+        } while (--t);
+}
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
+static void flush(void)
+{
+        /* nothing */
+}
+#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */
diff --git a/include/asm-arm/arch-ns9xxx/vmalloc.h b/include/asm-arm/arch-ns9xxx/vmalloc.h
new file mode 100644
index 000000000000..2f3cb6f6be24
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/vmalloc.h
@@ -0,0 +1,16 @@
+/*
+ * include/asm-arm/arch-ns9xxx/vmalloc.h
+ *
+ * Copyright (C) 2006 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+#define VMALLOC_END     (0xf0000000)
+#endif /* ifndef __ASM_ARCH_VMALLOC_H */
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index 0ffb1185f1ac..c90dff4828f7 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -29,6 +29,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =IO_ADDRESS(OMAP_IH1_BASE)
                ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
diff --git a/include/asm-arm/arch-pnx4008/entry-macro.S b/include/asm-arm/arch-pnx4008/entry-macro.S
index c1c198e3680b..f11731974e5d 100644
--- a/include/asm-arm/arch-pnx4008/entry-macro.S
+++ b/include/asm-arm/arch-pnx4008/entry-macro.S
@@ -28,6 +28,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 /* decode the MIC interrupt numbers */
                ldr     \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S
index 4985e33afc12..1d5fbb9b379a 100644
--- a/include/asm-arm/arch-pxa/entry-macro.S
+++ b/include/asm-arm/arch-pxa/entry-macro.S
@@ -13,6 +13,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 #ifdef CONFIG_PXA27x
                mrc     p6, 0, \irqstat, c0, c0, 0              @ ICIP
diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h
index e67c23821017..3d348a351157 100644
--- a/include/asm-arm/arch-pxa/gpio.h
+++ b/include/asm-arm/arch-pxa/gpio.h
@@ -25,10 +25,8 @@
 #define __ASM_ARCH_PXA_GPIO_H
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/irqs.h>
+#include <asm/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/errno.h>
 static inline int gpio_request(unsigned gpio, const char *label)
 {
@@ -42,26 +40,36 @@ static inline void gpio_free(unsigned gpio)
 static inline int gpio_direction_input(unsigned gpio)
 {
-        if (gpio > PXA_LAST_GPIO)
+        return pxa_gpio_mode(gpio | GPIO_IN);
-                return -EINVAL;
-        pxa_gpio_mode(gpio | GPIO_IN);
 }
 static inline int gpio_direction_output(unsigned gpio)
 {
-        if (gpio > PXA_LAST_GPIO)
+        return pxa_gpio_mode(gpio | GPIO_OUT);
-                return -EINVAL;
-        pxa_gpio_mode(gpio | GPIO_OUT);
 }
-/* REVISIT these macros are correct, but suffer code explosion
+static inline int __gpio_get_value(unsigned gpio)
- * for non-constant parameters.  Provide out-line versions too.
+{
- */
+        return GPLR(gpio) & GPIO_bit(gpio);
-#define gpio_get_value(gpio) \
+}
-        (GPLR(gpio) & GPIO_bit(gpio))
+#define gpio_get_value(gpio)                    \
+        (__builtin_constant_p(gpio) ?           \
+         __gpio_get_value(gpio) :               \
+         pxa_gpio_get_value(gpio))
+static inline void __gpio_set_value(unsigned gpio, int value)
+{
+        if (value)
+                GPSR(gpio) = GPIO_bit(gpio);
+        else
+                GPCR(gpio) = GPIO_bit(gpio);
+}
-#define gpio_set_value(gpio,value) \
+#define gpio_set_value(gpio,value)              \
-        ((value) ? (GPSR(gpio) = GPIO_bit(gpio)):(GPCR(gpio) = GPIO_bit(gpio)))
+        (__builtin_constant_p(gpio) ?           \
+         __gpio_set_value(gpio, value) :        \
+         pxa_gpio_set_value(gpio, value))
 #include <asm-generic/gpio.h>                   /* cansleep wrappers */
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 3e70bd95472c..e2bdc2fbede1 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -65,7 +65,17 @@
 /*
 * Handy routine to set GPIO alternate functions
 */
-extern void pxa_gpio_mode( int gpio_mode );
+extern int pxa_gpio_mode( int gpio_mode );
+/*
+ * Return GPIO level, nonzero means high, zero is low
+ */
+extern int pxa_gpio_get_value(unsigned gpio);
+/*
+ * Set output GPIO level
+ */
+extern void pxa_gpio_set_value(unsigned gpio, int value);
 /*
 * Routine to enable or disable CKEN
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index e24f6b6c79ae..aec835b6f057 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -463,9 +463,6 @@
 * Serial Audio Controller
 */
-/* FIXME: This clash with SA1111 defines */
-#ifndef _ASM_ARCH_SA1111
 #define SACR0           __REG(0x40400000)  /* Global Control Register */
 #define SACR1           __REG(0x40400004)  /* Serial Audio I 2 S/MSB-Justified Control Register */
 #define SASR0           __REG(0x4040000C)  /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
@@ -474,8 +471,8 @@
 #define SADIV           __REG(0x40400060)  /* Audio Clock Divider Register. */
 #define SADR            __REG(0x40400080)  /* Serial Audio Data Register (TX and RX FIFO access Register). */
-#define SACR0_RFTH(x)   (x << 12)       /* Rx FIFO Interrupt or DMA Trigger Threshold */
+#define SACR0_RFTH(x)   ((x) << 12)     /* Rx FIFO Interrupt or DMA Trigger Threshold */
-#define SACR0_TFTH(x)   (x << 8)        /* Tx FIFO Interrupt or DMA Trigger Threshold */
+#define SACR0_TFTH(x)   ((x) << 8)      /* Tx FIFO Interrupt or DMA Trigger Threshold */
 #define SACR0_STRF      (1 << 5)        /* FIFO Select for EFWR Special Function */
 #define SACR0_EFWR      (1 << 4)        /* Enable EFWR Function  */
 #define SACR0_RST       (1 << 3)        /* FIFO, i2s Register Reset */
@@ -503,8 +500,6 @@
 #define SAIMR_RFS       (1 << 4)        /* Enable Rx FIFO Service Interrupt */
 #define SAIMR_TFS       (1 << 3)        /* Enable Tx FIFO Service Interrupt */
-#endif
 /*
 * AC97 Controller registers
 */
@@ -1682,15 +1677,18 @@
 #define SSSR_PINT               (1 << 18)       /* Peripheral Trailing Byte Interrupt */
 #define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
-#define SSPSP_DMYSTOP(x)        (x << 23)       /* Dummy Stop */
+#define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
-#define SSPSP_SFRMWDTH(x)       (x << 16)       /* Serial Frame Width */
+#define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
-#define SSPSP_SFRMDLY(x)        (x << 9)        /* Serial Frame Delay */
+#define SSPSP_SFRMDLY(x)        ((x) << 9)      /* Serial Frame Delay */
-#define SSPSP_DMYSTRT(x)        (x << 7)        /* Dummy Start */
+#define SSPSP_DMYSTRT(x)        ((x) << 7)      /* Dummy Start */
-#define SSPSP_STRTDLY(x)        (x << 4)        /* Start Delay */
+#define SSPSP_STRTDLY(x)        ((x) << 4)      /* Start Delay */
 #define SSPSP_ETDS                      (1 << 3)        /* End of Transfer data State */
 #define SSPSP_SFRMP                     (1 << 2)        /* Serial Frame Polarity */
-#define SSPSP_SCMODE(x)         (x << 0)        /* Serial Bit Rate Clock Mode */
+#define SSPSP_SCMODE(x)         ((x) << 0)      /* Serial Bit Rate Clock Mode */
+#define SSACD_SCDB              (1 << 3)        /* SSPSYSCLK Divider Bypass */
+#define SSACD_ACPS(x)           ((x) << 4)      /* Audio clock PLL select */
+#define SSACD_ACDS(x)           ((x) << 0)      /* Audio clock divider select */
 #define SSCR0_P1        __REG(0x41000000)  /* SSP Port 1 Control Register 0 */
 #define SSCR1_P1        __REG(0x41000004)  /* SSP Port 1 Control Register 1 */
diff --git a/include/asm-arm/arch-pxa/udc.h b/include/asm-arm/arch-pxa/udc.h
index 646480d37256..8bc6f9c3e3ea 100644
--- a/include/asm-arm/arch-pxa/udc.h
+++ b/include/asm-arm/arch-pxa/udc.h
@@ -9,3 +9,33 @@
 extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info);
+static inline int udc_gpio_to_irq(unsigned gpio)
+{
+        return IRQ_GPIO(gpio & GPIO_MD_MASK_NR);
+}
+static inline void udc_gpio_init_vbus(unsigned gpio)
+{
+        pxa_gpio_mode((gpio & GPIO_MD_MASK_NR) | GPIO_IN);
+}
+static inline void udc_gpio_init_pullup(unsigned gpio)
+{
+        pxa_gpio_mode((gpio & GPIO_MD_MASK_NR) | GPIO_OUT | GPIO_DFLT_LOW);
+}
+static inline int udc_gpio_get(unsigned gpio)
+{
+        return (GPLR(gpio) & GPIO_bit(gpio)) != 0;
+}
+static inline void udc_gpio_set(unsigned gpio, int is_on)
+{
+        int mask = GPIO_bit(gpio);
+        if (is_on)
+                GPSR(gpio) = mask;
+        else
+                GPCR(gpio) = mask;
+}
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
index 1a6eec86bd47..138838d4ad75 100644
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -13,6 +13,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                /*
                 * The interrupt numbering scheme is defined in the
                 * interrupt controller spec.  To wit:
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
index 9ca76dc3a7af..aa78fe087ab2 100644
--- a/include/asm-arm/arch-realview/hardware.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -26,7 +26,7 @@
 #include <asm/arch/platform.h>
 /* macro to get at IO space when running virtually */
-#define IO_ADDRESS(x)           (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
+#define IO_ADDRESS(x)           ((((x) & 0x0effffff) | (((x) >> 4) & 0x0f000000)) + 0xf0000000)
 #define __io_address(n)         __io(IO_ADDRESS(n))
 #endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
index c16223c9588d..5a5db56f86b8 100644
--- a/include/asm-arm/arch-realview/irqs.h
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -65,6 +65,21 @@
 #define IRQ_AACI                (IRQ_GIC_START + INT_AACI)
 #define IRQ_ETH                 (IRQ_GIC_START + INT_ETH)
 #define IRQ_USB                 (IRQ_GIC_START + INT_USB)
+#define IRQ_PMU_CPU0            (IRQ_GIC_START + INT_PMU_CPU0)
+#define IRQ_PMU_CPU1            (IRQ_GIC_START + INT_PMU_CPU1)
+#define IRQ_PMU_CPU2            (IRQ_GIC_START + INT_PMU_CPU2)
+#define IRQ_PMU_CPU3            (IRQ_GIC_START + INT_PMU_CPU3)
+#define IRQ_PMU_SCU0            (IRQ_GIC_START + INT_PMU_SCU0)
+#define IRQ_PMU_SCU1            (IRQ_GIC_START + INT_PMU_SCU1)
+#define IRQ_PMU_SCU2            (IRQ_GIC_START + INT_PMU_SCU2)
+#define IRQ_PMU_SCU3            (IRQ_GIC_START + INT_PMU_SCU3)
+#define IRQ_PMU_SCU4            (IRQ_GIC_START + INT_PMU_SCU4)
+#define IRQ_PMU_SCU5            (IRQ_GIC_START + INT_PMU_SCU5)
+#define IRQ_PMU_SCU6            (IRQ_GIC_START + INT_PMU_SCU6)
+#define IRQ_PMU_SCU7            (IRQ_GIC_START + INT_PMU_SCU7)
+#define IRQ_EB_IRQ1             (IRQ_GIC_START + INT_EB_IRQ1)
+#define IRQ_EB_IRQ2             (IRQ_GIC_START + INT_EB_IRQ2)
 #define IRQMASK_WDOGINT         INTMASK_WDOGINT
 #define IRQMASK_SOFTINT         INTMASK_SOFTINT
@@ -103,4 +118,4 @@
 #define IRQMASK_ETH             INTMASK_ETH
 #define IRQMASK_USB             INTMASK_USB
-#define NR_IRQS                 (IRQ_GIC_START + 64)
+#define NR_IRQS                 (IRQ_GIC_START + 96)
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
index 18d7c18b738c..6e0eab95a3a2 100644
--- a/include/asm-arm/arch-realview/platform.h
+++ b/include/asm-arm/arch-realview/platform.h
@@ -207,11 +207,25 @@
 #define REALVIEW_GIC_CPU_BASE         0x10040000        /* Generic interrupt controller CPU interface */
 #define REALVIEW_GIC_DIST_BASE        0x10041000        /* Generic interrupt controller distributor */
 #else
+#ifdef CONFIG_REALVIEW_MPCORE_REVB
 #define REALVIEW_MPCORE_SCU_BASE        0x10100000      /*  SCU registers */
 #define REALVIEW_GIC_CPU_BASE           0x10100100      /* Generic interrupt controller CPU interface */
 #define REALVIEW_TWD_BASE               0x10100700
 #define REALVIEW_TWD_SIZE               0x00000100
 #define REALVIEW_GIC_DIST_BASE          0x10101000      /* Generic interrupt controller distributor */
+#define REALVIEW_MPCORE_L220_BASE       0x10102000      /* L220 registers */
+#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0xD8              /*  Register offset for MPCore sysctl */
+#else
+#define REALVIEW_MPCORE_SCU_BASE      0x1F000000        /*  SCU registers */
+#define REALVIEW_GIC_CPU_BASE         0x1F000100        /* Generic interrupt controller CPU interface */
+#define REALVIEW_TWD_BASE             0x1F000700
+#define REALVIEW_TWD_SIZE             0x00000100
+#define REALVIEW_GIC_DIST_BASE        0x1F001000        /* Generic interrupt controller distributor */
+#define REALVIEW_MPCORE_L220_BASE     0x1F002000        /* L220 registers */
+#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0x74              /*  Register offset for MPCore sysctl */
+#endif
+#define REALVIEW_GIC1_CPU_BASE        0x10040000        /* Generic interrupt controller CPU interface */
+#define REALVIEW_GIC1_DIST_BASE       0x10041000        /* Generic interrupt controller distributor */
 #endif
 #define REALVIEW_SMC_BASE             0x10080000        /* SMC */
        /* Reserved 0x10090000 - 0x100EFFFF */
@@ -306,7 +320,11 @@
 #define INT_USB                         29      /* USB controller */
 #define INT_TSPENINT                    30      /* Touchscreen pen */
 #define INT_TSKPADINT                   31      /* Touchscreen keypad */
 #else
+#define MAX_GIC_NR                      2
 #define INT_AACI                        0
 #define INT_TIMERINT0_1                 1
 #define INT_TIMERINT2_3                 2
diff --git a/include/asm-arm/arch-realview/scu.h b/include/asm-arm/arch-realview/scu.h
new file mode 100644
index 000000000000..cc293640178e
--- /dev/null
+++ b/include/asm-arm/arch-realview/scu.h
@@ -0,0 +1,8 @@
+#ifndef __ASMARM_ARCH_SCU_H
+#define __ASMARM_ARCH_SCU_H
+#include <asm/arch/platform.h>
+#define SCU_BASE        REALVIEW_MPCORE_SCU_BASE
+#endif
diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S
index c9e5395e5106..0cfb89b229d1 100644
--- a/include/asm-arm/arch-rpc/entry-macro.S
+++ b/include/asm-arm/arch-rpc/entry-macro.S
@@ -1,3 +1,8 @@
 #include <asm/hardware.h>
 #include <asm/hardware/entry-macro-iomd.S>
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h
index 65e0acffa1ad..0a6977fb5770 100644
--- a/include/asm-arm/arch-s3c2410/audio.h
+++ b/include/asm-arm/arch-s3c2410/audio.h
@@ -31,9 +31,9 @@ struct s3c24xx_iis_ops {
        int     (*suspend)(struct s3c24xx_iis_ops *me);
        int     (*resume)(struct s3c24xx_iis_ops *me);
-        int     (*open)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
+        int     (*open)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm);
-        int     (*close)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
+        int     (*close)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm);
-        int     (*prepare)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm, snd_pcm_runtime_t *rt);
+        int     (*prepare)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm, struct snd_pcm_runtime *rt);
 };
 struct s3c24xx_platdata_iis {
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h
index 58ffa7ba3c88..c6e8d8f64938 100644
--- a/include/asm-arm/arch-s3c2410/dma.h
+++ b/include/asm-arm/arch-s3c2410/dma.h
@@ -51,13 +51,19 @@ enum dma_ch {
        DMACH_UART0_SRC2,       /* s3c2412 second uart sources */
        DMACH_UART1_SRC2,
        DMACH_UART2_SRC2,
+        DMACH_UART3,            /* s3c2443 has extra uart */
+        DMACH_UART3_SRC2,
        DMACH_MAX,              /* the end entry */
 };
 #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
 /* we have 4 dma channels */
-#define S3C2410_DMA_CHANNELS        (4)
+#ifndef CONFIG_CPU_S3C2443
+#define S3C2410_DMA_CHANNELS            (4)
+#else
+#define S3C2410_DMA_CHANNELS            (6)
+#endif
 /* types */
@@ -321,6 +327,7 @@ extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn);
 #define S3C2410_DMA_DCDST       (0x1C)
 #define S3C2410_DMA_DMASKTRIG   (0x20)
 #define S3C2412_DMA_DMAREQSEL   (0x24)
+#define S3C2443_DMA_DMAREQSEL   (0x24)
 #define S3C2410_DISRCC_INC      (1<<0)
 #define S3C2410_DISRCC_APB      (1<<1)
@@ -415,4 +422,31 @@ extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn);
 #define S3C2412_DMAREQSEL_UART2_1       S3C2412_DMAREQSEL_SRC(24)
 #endif
+#define S3C2443_DMAREQSEL_SRC(x)        ((x)<<1)
+#define S3C2443_DMAREQSEL_HW            (1)
+#define S3C2443_DMAREQSEL_SPI0TX        S3C2443_DMAREQSEL_SRC(0)
+#define S3C2443_DMAREQSEL_SPI0RX        S3C2443_DMAREQSEL_SRC(1)
+#define S3C2443_DMAREQSEL_SPI1TX        S3C2443_DMAREQSEL_SRC(2)
+#define S3C2443_DMAREQSEL_SPI1RX        S3C2443_DMAREQSEL_SRC(3)
+#define S3C2443_DMAREQSEL_I2STX         S3C2443_DMAREQSEL_SRC(4)
+#define S3C2443_DMAREQSEL_I2SRX         S3C2443_DMAREQSEL_SRC(5)
+#define S3C2443_DMAREQSEL_TIMER         S3C2443_DMAREQSEL_SRC(9)
+#define S3C2443_DMAREQSEL_SDI           S3C2443_DMAREQSEL_SRC(10)
+#define S3C2443_DMAREQSEL_XDREQ0        S3C2443_DMAREQSEL_SRC(17)
+#define S3C2443_DMAREQSEL_XDREQ1        S3C2443_DMAREQSEL_SRC(18)
+#define S3C2443_DMAREQSEL_UART0_0       S3C2443_DMAREQSEL_SRC(19)
+#define S3C2443_DMAREQSEL_UART0_1       S3C2443_DMAREQSEL_SRC(20)
+#define S3C2443_DMAREQSEL_UART1_0       S3C2443_DMAREQSEL_SRC(21)
+#define S3C2443_DMAREQSEL_UART1_1       S3C2443_DMAREQSEL_SRC(22)
+#define S3C2443_DMAREQSEL_UART2_0       S3C2443_DMAREQSEL_SRC(23)
+#define S3C2443_DMAREQSEL_UART2_1       S3C2443_DMAREQSEL_SRC(24)
+#define S3C2443_DMAREQSEL_UART3_0       S3C2443_DMAREQSEL_SRC(25)
+#define S3C2443_DMAREQSEL_UART3_1       S3C2443_DMAREQSEL_SRC(26)
+#define S3C2443_DMAREQSEL_PCMOUT        S3C2443_DMAREQSEL_SRC(27)
+#define S3C2443_DMAREQSEL_PCMIN         S3C2443_DMAREQSEL_SRC(28)
+#define S3C2443_DMAREQSEL_MICIN         S3C2443_DMAREQSEL_SRC(29)
 #endif /* __ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
index 1eb4e6b8d249..bbec0a8ff158 100644
--- a/include/asm-arm/arch-s3c2410/entry-macro.S
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -22,6 +22,12 @@
 #include <asm/hardware.h>
 #include <asm/irq.h>
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     \base, #S3C24XX_VA_IRQ
diff --git a/include/asm-arm/arch-s3c2410/gpio.h b/include/asm-arm/arch-s3c2410/gpio.h
index 67b8b9ab22e9..d47ae453f8ca 100644
--- a/include/asm-arm/arch-s3c2410/gpio.h
+++ b/include/asm-arm/arch-s3c2410/gpio.h
@@ -1,7 +1,7 @@
 /*
- * linux/include/asm-arm/arch-pxa/gpio.h
+ * linux/include/asm-arm/arch-s3c2410/gpio.h
 *
- * S3C2400 GPIO wrappers for arch-neutral GPIO calls
+ * S3C2410 GPIO wrappers for arch-neutral GPIO calls
 *
 * Written by Philipp Zabel <philipp.zabel@gmail.com>
 *
@@ -21,14 +21,12 @@
 *
 */
-#ifndef __ASM_ARCH_PXA_GPIO_H
+#ifndef __ASM_ARCH_S3C2410_GPIO_H
-#define __ASM_ARCH_PXA_GPIO_H
+#define __ASM_ARCH_S3C2410_GPIO_H
-#include <asm/arch/pxa-regs.h>
+#include <asm/irq.h>
-#include <asm/arch/irqs.h>
+#include <asm/hardware.h>
-#include <asm/arch/hardware.h>
+#include <asm/arch/regs-gpio.h>
-#include <asm/errno.h>
 static inline int gpio_request(unsigned gpio, const char *label)
 {
@@ -57,8 +55,11 @@ static inline int gpio_direction_output(unsigned gpio)
 #include <asm-generic/gpio.h>                   /* cansleep wrappers */
-/* FIXME or maybe s3c2400_gpio_getirq() ... */
+#ifdef CONFIG_CPU_S3C2400
+#define gpio_to_irq(gpio)               s3c2400_gpio_getirq(gpio)
+#else
 #define gpio_to_irq(gpio)               s3c2410_gpio_getirq(gpio)
+#endif
 /* FIXME implement irq_to_gpio() */
diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h
index 4b7cff456c4e..c79cb1819913 100644
--- a/include/asm-arm/arch-s3c2410/irqs.h
+++ b/include/asm-arm/arch-s3c2410/irqs.h
@@ -34,10 +34,10 @@
 #define IRQ_EINT4t7    S3C2410_IRQ(4)       /* 20 */
 #define IRQ_EINT8t23   S3C2410_IRQ(5)
 #define IRQ_RESERVED6  S3C2410_IRQ(6)       /* for s3c2410 */
-#define IRQ_CAM        S3C2410_IRQ(6)       /* for s3c2440 */
+#define IRQ_CAM        S3C2410_IRQ(6)       /* for s3c2440,s3c2443 */
 #define IRQ_BATT_FLT   S3C2410_IRQ(7)
 #define IRQ_TICK       S3C2410_IRQ(8)       /* 24 */
-#define IRQ_WDT        S3C2410_IRQ(9)
+#define IRQ_WDT        S3C2410_IRQ(9)       /* WDT/AC97 for s3c2443 */
 #define IRQ_TIMER0     S3C2410_IRQ(10)
 #define IRQ_TIMER1     S3C2410_IRQ(11)
 #define IRQ_TIMER2     S3C2410_IRQ(12)
@@ -45,7 +45,7 @@
 #define IRQ_TIMER4     S3C2410_IRQ(14)
 #define IRQ_UART2      S3C2410_IRQ(15)
 #define IRQ_LCD        S3C2410_IRQ(16)      /* 32 */
-#define IRQ_DMA0       S3C2410_IRQ(17)
+#define IRQ_DMA0       S3C2410_IRQ(17)      /* IRQ_DMA for s3c2443 */
 #define IRQ_DMA1       S3C2410_IRQ(18)
 #define IRQ_DMA2       S3C2410_IRQ(19)
 #define IRQ_DMA3       S3C2410_IRQ(20)
@@ -94,29 +94,63 @@
 * these need to be ordered in number of appearance in the
 * SUBSRC mask register
 */
-#define IRQ_S3CUART_RX0  S3C2410_IRQ(54)   /* 70 */
-#define IRQ_S3CUART_TX0  S3C2410_IRQ(55)   /* 71 */
-#define IRQ_S3CUART_ERR0 S3C2410_IRQ(56)
-#define IRQ_S3CUART_RX1  S3C2410_IRQ(57)
+#define S3C2410_IRQSUB(x)       S3C2410_IRQ((x)+54)
-#define IRQ_S3CUART_TX1  S3C2410_IRQ(58)
-#define IRQ_S3CUART_ERR1 S3C2410_IRQ(59)
-#define IRQ_S3CUART_RX2  S3C2410_IRQ(60)
+#define IRQ_S3CUART_RX0         S3C2410_IRQSUB(0)       /* 70 */
-#define IRQ_S3CUART_TX2  S3C2410_IRQ(61)
+#define IRQ_S3CUART_TX0         S3C2410_IRQSUB(1)
-#define IRQ_S3CUART_ERR2 S3C2410_IRQ(62)
+#define IRQ_S3CUART_ERR0        S3C2410_IRQSUB(2)
-#define IRQ_TC           S3C2410_IRQ(63)
+#define IRQ_S3CUART_RX1         S3C2410_IRQSUB(3)       /* 73 */
-#define IRQ_ADC          S3C2410_IRQ(64)
+#define IRQ_S3CUART_TX1         S3C2410_IRQSUB(4)
+#define IRQ_S3CUART_ERR1        S3C2410_IRQSUB(5)
-/* extra irqs for s3c2440 */
+#define IRQ_S3CUART_RX2         S3C2410_IRQSUB(6)       /* 76 */
+#define IRQ_S3CUART_TX2         S3C2410_IRQSUB(7)
+#define IRQ_S3CUART_ERR2        S3C2410_IRQSUB(8)
-#define IRQ_S3C2440_CAM_C       S3C2410_IRQ(65)
+#define IRQ_TC                  S3C2410_IRQSUB(9)
-#define IRQ_S3C2440_CAM_P       S3C2410_IRQ(66)
+#define IRQ_ADC                 S3C2410_IRQSUB(10)
-#define IRQ_S3C2440_WDT         S3C2410_IRQ(67)
-#define IRQ_S3C2440_AC97        S3C2410_IRQ(68)
-#define NR_IRQS (IRQ_S3C2440_AC97+1)
+/* extra irqs for s3c2440 */
+#define IRQ_S3C2440_CAM_C       S3C2410_IRQSUB(11)      /* S3C2443 too */
+#define IRQ_S3C2440_CAM_P       S3C2410_IRQSUB(12)      /* S3C2443 too */
+#define IRQ_S3C2440_WDT         S3C2410_IRQSUB(13)
+#define IRQ_S3C2440_AC97        S3C2410_IRQSUB(14)
+/* irqs for s3c2443 */
+#define IRQ_S3C2443_DMA         S3C2410_IRQ(17)         /* IRQ_DMA1 */
+#define IRQ_S3C2443_UART3       S3C2410_IRQ(18)         /* IRQ_DMA2 */
+#define IRQ_S3C2443_CFCON       S3C2410_IRQ(19)         /* IRQ_DMA3 */
+#define IRQ_S3C2443_SDI1        S3C2410_IRQ(20)         /* IRQ_SDI */
+#define IRQ_S3C2443_NAND        S3C2410_IRQ(24)         /* reserved */
+#define IRQ_S3C2443_LCD1        S3C2410_IRQSUB(14)
+#define IRQ_S3C2443_LCD2        S3C2410_IRQSUB(15)
+#define IRQ_S3C2443_LCD3        S3C2410_IRQSUB(16)
+#define IRQ_S3C2443_LCD4        S3C2410_IRQSUB(17)
+#define IRQ_S3C2443_DMA0        S3C2410_IRQSUB(18)
+#define IRQ_S3C2443_DMA1        S3C2410_IRQSUB(19)
+#define IRQ_S3C2443_DMA2        S3C2410_IRQSUB(20)
+#define IRQ_S3C2443_DMA3        S3C2410_IRQSUB(21)
+#define IRQ_S3C2443_DMA4        S3C2410_IRQSUB(22)
+#define IRQ_S3C2443_DMA5        S3C2410_IRQSUB(23)
+/* UART3 */
+#define IRQ_S3C2443_RX3         S3C2410_IRQSUB(24)
+#define IRQ_S3C2443_TX3         S3C2410_IRQSUB(25)
+#define IRQ_S3C2443_ERR3        S3C2410_IRQSUB(26)
+#define IRQ_S3C2443_WDT         S3C2410_IRQSUB(27)
+#define IRQ_S3C2443_AC97        S3C2410_IRQSUB(28)
+#ifdef CONFIG_CPU_S3C2443
+#define NR_IRQS (IRQ_S3C2443_AC97+1)
+#else
+#define NR_IRQS (IRQ_S3C2440_AC97+1)
+#endif
 #endif /* __ASM_ARCH_IRQ_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-adc.h b/include/asm-arm/arch-s3c2410/regs-adc.h
index 3196a2849e8a..c7f231963e76 100644
--- a/include/asm-arm/arch-s3c2410/regs-adc.h
+++ b/include/asm-arm/arch-s3c2410/regs-adc.h
@@ -41,7 +41,7 @@
 #define S3C2410_ADCTSC_XP_SEN           (1<<4)
 #define S3C2410_ADCTSC_PULL_UP_DISABLE  (1<<3)
 #define S3C2410_ADCTSC_AUTO_PST         (1<<2)
-#define S3C2410_ADCTSC_XY_PST           (0x3<<0)
+#define S3C2410_ADCTSC_XY_PST(x)        (((x)&0x3)<<0)
 /* ADCDAT0 Bits */
 #define S3C2410_ADCDAT0_UPDOWN          (1<<15)
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index eae91694edcd..dea578b8f7f6 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -201,7 +201,7 @@
 #define S3C2400_GPBDAT     S3C2410_GPIOREG(0x0C)
 #define S3C2400_GPBUP      S3C2410_GPIOREG(0x10)
-/* no i/o pin in port b can have value 3! */
+/* no i/o pin in port b can have value 3 (unless it is a s3c2443) ! */
 #define S3C2410_GPB0         S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0)
 #define S3C2410_GPB0_INP     (0x00 << 0)
@@ -242,6 +242,7 @@
 #define S3C2410_GPB5_INP     (0x00 << 10)
 #define S3C2410_GPB5_OUTP    (0x01 << 10)
 #define S3C2410_GPB5_nXBACK  (0x02 << 10)
+#define S3C2443_GPB5_XBACK   (0x03 << 10)
 #define S3C2400_GPB5_DATA21  (0x02 << 10)
 #define S3C2400_GPB5_nCTS1   (0x03 << 10)
@@ -249,6 +250,7 @@
 #define S3C2410_GPB6_INP     (0x00 << 12)
 #define S3C2410_GPB6_OUTP    (0x01 << 12)
 #define S3C2410_GPB6_nXBREQ  (0x02 << 12)
+#define S3C2443_GPB6_XBREQ   (0x03 << 12)
 #define S3C2400_GPB6_DATA22  (0x02 << 12)
 #define S3C2400_GPB6_nRTS1   (0x03 << 12)
@@ -256,6 +258,7 @@
 #define S3C2410_GPB7_INP     (0x00 << 14)
 #define S3C2410_GPB7_OUTP    (0x01 << 14)
 #define S3C2410_GPB7_nXDACK1 (0x02 << 14)
+#define S3C2443_GPB7_XDACK1  (0x03 << 14)
 #define S3C2400_GPB7_DATA23  (0x02 << 14)
 #define S3C2410_GPB8         S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8)
@@ -268,6 +271,7 @@
 #define S3C2410_GPB9_INP     (0x00 << 18)
 #define S3C2410_GPB9_OUTP    (0x01 << 18)
 #define S3C2410_GPB9_nXDACK0 (0x02 << 18)
+#define S3C2443_GPB9_XDACK0  (0x03 << 18)
 #define S3C2400_GPB9_DATA25  (0x02 << 18)
 #define S3C2400_GPB9_I2SSDI  (0x03 << 18)
@@ -275,6 +279,7 @@
 #define S3C2410_GPB10_INP    (0x00 << 20)
 #define S3C2410_GPB10_OUTP   (0x01 << 20)
 #define S3C2410_GPB10_nXDRE0 (0x02 << 20)
+#define S3C2443_GPB10_XDREQ0 (0x03 << 20)
 #define S3C2400_GPB10_DATA26 (0x02 << 20)
 #define S3C2400_GPB10_nSS    (0x03 << 20)
@@ -556,6 +561,7 @@
 #define S3C2410_GPE0_INP       (0x00 << 0)
 #define S3C2410_GPE0_OUTP      (0x01 << 0)
 #define S3C2410_GPE0_I2SLRCK   (0x02 << 0)
+#define S3C2443_GPE0_AC_nRESET (0x03 << 0)
 #define S3C2400_GPE0_EINT0     (0x02 << 0)
 #define S3C2410_GPE0_MASK      (0x03 << 0)
@@ -563,6 +569,7 @@
 #define S3C2410_GPE1_INP       (0x00 << 2)
 #define S3C2410_GPE1_OUTP      (0x01 << 2)
 #define S3C2410_GPE1_I2SSCLK   (0x02 << 2)
+#define S3C2443_GPE1_AC_SYNC   (0x03 << 2)
 #define S3C2400_GPE1_EINT1     (0x02 << 2)
 #define S3C2400_GPE1_nSS       (0x03 << 2)
 #define S3C2410_GPE1_MASK      (0x03 << 2)
@@ -571,6 +578,7 @@
 #define S3C2410_GPE2_INP       (0x00 << 4)
 #define S3C2410_GPE2_OUTP      (0x01 << 4)
 #define S3C2410_GPE2_CDCLK     (0x02 << 4)
+#define S3C2443_GPE2_AC_BITCLK (0x03 << 4)
 #define S3C2400_GPE2_EINT2     (0x02 << 4)
 #define S3C2400_GPE2_I2SSDI    (0x03 << 4)
@@ -578,6 +586,7 @@
 #define S3C2410_GPE3_INP       (0x00 << 6)
 #define S3C2410_GPE3_OUTP      (0x01 << 6)
 #define S3C2410_GPE3_I2SSDI    (0x02 << 6)
+#define S3C2443_GPE3_AC_SDI    (0x03 << 6)
 #define S3C2400_GPE3_EINT3     (0x02 << 6)
 #define S3C2400_GPE3_nCTS1     (0x03 << 6)
 #define S3C2410_GPE3_nSS0      (0x03 << 6)
@@ -587,6 +596,7 @@
 #define S3C2410_GPE4_INP       (0x00 << 8)
 #define S3C2410_GPE4_OUTP      (0x01 << 8)
 #define S3C2410_GPE4_I2SSDO    (0x02 << 8)
+#define S3C2443_GPE4_AC_SDO    (0x03 << 8)
 #define S3C2400_GPE4_EINT4     (0x02 << 8)
 #define S3C2400_GPE4_nRTS1     (0x03 << 8)
 #define S3C2410_GPE4_I2SSDI    (0x03 << 8)
@@ -596,6 +606,7 @@
 #define S3C2410_GPE5_INP       (0x00 << 10)
 #define S3C2410_GPE5_OUTP      (0x01 << 10)
 #define S3C2410_GPE5_SDCLK     (0x02 << 10)
+#define S3C2443_GPE5_SD1_CLK   (0x02 << 10)
 #define S3C2400_GPE5_EINT5     (0x02 << 10)
 #define S3C2400_GPE5_TCLK1     (0x03 << 10)
@@ -603,24 +614,32 @@
 #define S3C2410_GPE6_INP       (0x00 << 12)
 #define S3C2410_GPE6_OUTP      (0x01 << 12)
 #define S3C2410_GPE6_SDCMD     (0x02 << 12)
+#define S3C2443_GPE6_SD1_CMD   (0x02 << 12)
+#define S3C2443_GPE6_AC_BITCLK (0x03 << 12)
 #define S3C2400_GPE6_EINT6     (0x02 << 12)
 #define S3C2410_GPE7           S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7)
 #define S3C2410_GPE7_INP       (0x00 << 14)
 #define S3C2410_GPE7_OUTP      (0x01 << 14)
 #define S3C2410_GPE7_SDDAT0    (0x02 << 14)
+#define S3C2443_GPE5_SD1_DAT0  (0x02 << 14)
+#define S3C2443_GPE7_AC_SDI    (0x03 << 14)
 #define S3C2400_GPE7_EINT7     (0x02 << 14)
 #define S3C2410_GPE8           S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8)
 #define S3C2410_GPE8_INP       (0x00 << 16)
 #define S3C2410_GPE8_OUTP      (0x01 << 16)
 #define S3C2410_GPE8_SDDAT1    (0x02 << 16)
+#define S3C2443_GPE8_SD1_DAT1  (0x02 << 16)
+#define S3C2443_GPE8_AC_SDO    (0x03 << 16)
 #define S3C2400_GPE8_nXDACK0   (0x02 << 16)
 #define S3C2410_GPE9           S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9)
 #define S3C2410_GPE9_INP       (0x00 << 18)
 #define S3C2410_GPE9_OUTP      (0x01 << 18)
 #define S3C2410_GPE9_SDDAT2    (0x02 << 18)
+#define S3C2443_GPE9_SD1_DAT2  (0x02 << 18)
+#define S3C2443_GPE9_AC_SYNC   (0x03 << 18)
 #define S3C2400_GPE9_nXDACK1   (0x02 << 18)
 #define S3C2400_GPE9_nXBACK    (0x03 << 18)
@@ -628,6 +647,8 @@
 #define S3C2410_GPE10_INP      (0x00 << 20)
 #define S3C2410_GPE10_OUTP     (0x01 << 20)
 #define S3C2410_GPE10_SDDAT3   (0x02 << 20)
+#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20)
+#define S3C2443_GPE10_AC_nRESET (0x03 << 20)
 #define S3C2400_GPE10_nXDREQ0  (0x02 << 20)
 #define S3C2410_GPE11          S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11)
@@ -796,6 +817,7 @@
 #define S3C2400_GPG4_MMCCLK   (0x02 << 8)
 #define S3C2400_GPG4_I2SSDI   (0x03 << 8)
 #define S3C2410_GPG4_LCDPWREN (0x03 << 8)
+#define S3C2443_GPG4_LCDPWRDN (0x03 << 8)
 #define S3C2410_GPG5          S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5)
 #define S3C2410_GPG5_INP      (0x00 << 10)
@@ -803,7 +825,7 @@
 #define S3C2410_GPG5_EINT13   (0x02 << 10)
 #define S3C2400_GPG5_MMCCMD   (0x02 << 10)
 #define S3C2400_GPG5_IICSDA   (0x03 << 10)
-#define S3C2410_GPG5_SPIMISO1 (0x03 << 10)
+#define S3C2410_GPG5_SPIMISO1 (0x03 << 10)      /* not s3c2443 */
 #define S3C2410_GPG6          S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6)
 #define S3C2410_GPG6_INP      (0x00 << 12)
@@ -845,6 +867,7 @@
 #define S3C2410_GPG11_OUTP    (0x01 << 22)
 #define S3C2410_GPG11_EINT19  (0x02 << 22)
 #define S3C2410_GPG11_TCLK1   (0x03 << 22)
+#define S3C2443_GPG11_CF_nIREQ (0x03 << 22)
 #define S3C2410_GPG12         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 12)
 #define S3C2410_GPG12_INP     (0x00 << 24)
@@ -852,25 +875,28 @@
 #define S3C2410_GPG12_EINT20  (0x02 << 24)
 #define S3C2410_GPG12_XMON    (0x03 << 24)
 #define S3C2442_GPG12_nSPICS0 (0x03 << 24)
+#define S3C2443_GPG12_nINPACK (0x03 << 24)
 #define S3C2410_GPG13         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 13)
 #define S3C2410_GPG13_INP     (0x00 << 26)
 #define S3C2410_GPG13_OUTP    (0x01 << 26)
 #define S3C2410_GPG13_EINT21  (0x02 << 26)
 #define S3C2410_GPG13_nXPON   (0x03 << 26)
+#define S3C2443_GPG13_CF_nREG (0x03 << 26)
 #define S3C2410_GPG14         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 14)
 #define S3C2410_GPG14_INP     (0x00 << 28)
 #define S3C2410_GPG14_OUTP    (0x01 << 28)
 #define S3C2410_GPG14_EINT22  (0x02 << 28)
 #define S3C2410_GPG14_YMON    (0x03 << 28)
+#define S3C2443_GPG14_CF_RESET (0x03 << 28)
 #define S3C2410_GPG15         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 15)
 #define S3C2410_GPG15_INP     (0x00 << 30)
 #define S3C2410_GPG15_OUTP    (0x01 << 30)
 #define S3C2410_GPG15_EINT23  (0x02 << 30)
 #define S3C2410_GPG15_nYPON   (0x03 << 30)
+#define S3C2443_GPG15_CF_PWR  (0x03 << 30)
 #define S3C2410_GPG_PUPDIS(x)  (1<<(x))
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h b/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
new file mode 100644
index 000000000000..ff0536d2de42
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
@@ -0,0 +1,194 @@
+/* linux/include/asm-arm/arch-s3c2410/regs-clock.h
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2443 clock register definitions
+*/
+#ifndef __ASM_ARM_REGS_S3C2443_CLOCK
+#define __ASM_ARM_REGS_S3C2443_CLOCK
+#define S3C2443_CLKREG(x)               ((x) + S3C24XX_VA_CLKPWR)
+#define S3C2443_PLLCON_MDIVSHIFT        16
+#define S3C2443_PLLCON_PDIVSHIFT        8
+#define S3C2443_PLLCON_SDIVSHIFT        0
+#define S3C2443_PLLCON_MDIVMASK         ((1<<(1+(23-16)))-1)
+#define S3C2443_PLLCON_PDIVMASK         ((1<<(1+(9-8)))-1)
+#define S3C2443_PLLCON_SDIVMASK         (3)
+#define S3C2443_MPLLCON                 S3C2443_CLKREG(0x10)
+#define S3C2443_EPLLCON                 S3C2443_CLKREG(0x18)
+#define S3C2443_CLKSRC                  S3C2443_CLKREG(0x20)
+#define S3C2443_CLKDIV0                 S3C2443_CLKREG(0x24)
+#define S3C2443_CLKDIV1                 S3C2443_CLKREG(0x28)
+#define S3C2443_HCLKCON                 S3C2443_CLKREG(0x30)
+#define S3C2443_PCLKCON                 S3C2443_CLKREG(0x34)
+#define S3C2443_SCLKCON                 S3C2443_CLKREG(0x38)
+#define S3C2443_PWRMODE                 S3C2443_CLKREG(0x40)
+#define S3C2443_SWRST                   S3C2443_CLKREG(0x44)
+#define S3C2443_BUSPRI0                 S3C2443_CLKREG(0x50)
+#define S3C2443_SYSID                   S3C2443_CLKREG(0x5C)
+#define S3C2443_PWRCFG                  S3C2443_CLKREG(0x60)
+#define S3C2443_RSTCON                  S3C2443_CLKREG(0x64)
+#define S3C2443_SWRST_RESET             (0x533c2443)
+#define S3C2443_PLLCON_OFF              (1<<24)
+#define S3C2443_CLKSRC_I2S_EXT          (1<<14)
+#define S3C2443_CLKSRC_I2S_EPLLDIV      (0<<14)
+#define S3C2443_CLKSRC_I2S_EPLLREF      (2<<14)
+#define S3C2443_CLKSRC_I2S_EPLLREF3     (3<<14)
+#define S3C2443_CLKSRC_I2S_MASK         (3<<14)
+#define S3C2443_CLKSRC_EPLLREF_XTAL     (2<<8)
+#define S3C2443_CLKSRC_EPLLREF_EXTCLK   (3<<8)
+#define S3C2443_CLKSRC_EPLLREF_MPLLREF  (0<<8)
+#define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<8)
+#define S3C2443_CLKSRC_EPLLREF_MASK     (3<<8)
+#define S3C2443_CLKSRC_ESYSCLK_EPLL     (1<<6)
+#define S3C2443_CLKSRC_MSYSCLK_MPLL     (1<<4)
+#define S3C2443_CLKSRC_EXTCLK_DIV       (1<<3)
+#define S3C2443_CLKDIV0_DVS             (1<<13)
+#define S3C2443_CLKDIV0_HALF_HCLK       (1<<3)
+#define S3C2443_CLKDIV0_HALF_PCLK       (1<<2)
+#define S3C2443_CLKDIV0_HCLKDIV_MASK    (3<<0)
+#define S3C2443_CLKDIV0_EXTDIV_MASK     (3<<6)
+#define S3C2443_CLKDIV0_EXTDIV_SHIFT    (6)
+#define S3C2443_CLKDIV0_PREDIV_MASK     (3<<4)
+#define S3C2443_CLKDIV0_PREDIV_SHIFT    (4)
+#define S3C2443_CLKDIV0_ARMDIV_MASK     (15<<9)
+#define S3C2443_CLKDIV0_ARMDIV_SHIFT    (9)
+#define S3C2443_CLKDIV0_ARMDIV_1        (0<<9)
+#define S3C2443_CLKDIV0_ARMDIV_2        (8<<9)
+#define S3C2443_CLKDIV0_ARMDIV_3        (2<<9)
+#define S3C2443_CLKDIV0_ARMDIV_4        (9<<9)
+#define S3C2443_CLKDIV0_ARMDIV_6        (10<<9)
+#define S3C2443_CLKDIV0_ARMDIV_8        (11<<9)
+#define S3C2443_CLKDIV0_ARMDIV_12       (13<<9)
+#define S3C2443_CLKDIV0_ARMDIV_16       (15<<9)
+/* S3C2443_CLKDIV1 */
+#define S3C2443_CLKDIV1_CAMDIV_MASK     (15<<26)
+#define S3C2443_CLKDIV1_CAMDIV_SHIFT    (26)
+#define S3C2443_CLKDIV1_HSSPIDIV_MASK   (3<<24)
+#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT  (24)
+#define S3C2443_CLKDIV1_DISPDIV_MASK    (0xff<<16)
+#define S3C2443_CLKDIV1_DISPDIV_SHIFT   (16)
+#define S3C2443_CLKDIV1_I2SDIV_MASK     (15<<12)
+#define S3C2443_CLKDIV1_I2SDIV_SHIFT    (12)
+#define S3C2443_CLKDIV1_UARTDIV_MASK    (15<<8)
+#define S3C2443_CLKDIV1_UARTDIV_SHIFT   (8)
+#define S3C2443_CLKDIV1_HSMMCDIV_MASK   (3<<6)
+#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT  (6)
+#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4)
+#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4)
+#define S3C2443_CLKCON_NAND
+#define S3C2443_HCLKCON_DMA0            (1<<0)
+#define S3C2443_HCLKCON_DMA1            (1<<1)
+#define S3C2443_HCLKCON_DMA2            (1<<2)
+#define S3C2443_HCLKCON_DMA3            (1<<3)
+#define S3C2443_HCLKCON_DMA4            (1<<4)
+#define S3C2443_HCLKCON_DMA5            (1<<5)
+#define S3C2443_HCLKCON_CAMIF           (1<<8)
+#define S3C2443_HCLKCON_DISP            (1<<9)
+#define S3C2443_HCLKCON_LCDC            (1<<10)
+#define S3C2443_HCLKCON_USBH            (1<<11)
+#define S3C2443_HCLKCON_USBD            (1<<12)
+#define S3C2443_HCLKCON_HSMMC           (1<<16)
+#define S3C2443_HCLKCON_CFC             (1<<17)
+#define S3C2443_HCLKCON_SSMC            (1<<18)
+#define S3C2443_HCLKCON_DRAMC           (1<<19)
+#define S3C2443_PCLKCON_UART0           (1<<0)
+#define S3C2443_PCLKCON_UART1           (1<<1)
+#define S3C2443_PCLKCON_UART2           (1<<2)
+#define S3C2443_PCLKCON_UART3           (1<<3)
+#define S3C2443_PCLKCON_IIC             (1<<4)
+#define S3C2443_PCLKCON_SDI             (1<<5)
+#define S3C2443_PCLKCON_ADC             (1<<7)
+#define S3C2443_PCLKCON_IIS             (1<<9)
+#define S3C2443_PCLKCON_PWMT            (1<<10)
+#define S3C2443_PCLKCON_WDT             (1<<11)
+#define S3C2443_PCLKCON_RTC             (1<<12)
+#define S3C2443_PCLKCON_GPIO            (1<<13)
+#define S3C2443_PCLKCON_SPI0            (1<<14)
+#define S3C2443_PCLKCON_SPI1            (1<<15)
+#define S3C2443_SCLKCON_DDRCLK          (1<<16)
+#define S3C2443_SCLKCON_SSMCCLK         (1<<15)
+#define S3C2443_SCLKCON_HSSPICLK        (1<<14)
+#define S3C2443_SCLKCON_HSMMCCLK_EXT    (1<<13)
+#define S3C2443_SCLKCON_HSMMCCLK_EPLL   (1<<12)
+#define S3C2443_SCLKCON_CAMCLK          (1<<11)
+#define S3C2443_SCLKCON_DISPCLK         (1<<10)
+#define S3C2443_SCLKCON_I2SCLK          (1<<9)
+#define S3C2443_SCLKCON_UARTCLK         (1<<8)
+#define S3C2443_SCLKCON_USBHOST         (1<<1)
+#include <asm/div64.h>
+static inline unsigned int
+s3c2443_get_mpll(unsigned int pllval, unsigned int baseclk)
+{
+        unsigned int mdiv, pdiv, sdiv;
+        uint64_t fvco;
+        mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT;
+        pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT;
+        sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT;
+        mdiv &= S3C2443_PLLCON_MDIVMASK;
+        pdiv &= S3C2443_PLLCON_PDIVMASK;
+        sdiv &= S3C2443_PLLCON_SDIVMASK;
+        fvco = (uint64_t)baseclk * (2 * (mdiv + 8));
+        do_div(fvco, pdiv << sdiv);
+        return (unsigned int)fvco;
+}
+static inline unsigned int
+s3c2443_get_epll(unsigned int pllval, unsigned int baseclk)
+{
+        unsigned int mdiv, pdiv, sdiv;
+        uint64_t fvco;
+        mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT;
+        pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT;
+        sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT;
+        mdiv &= S3C2443_PLLCON_MDIVMASK;
+        pdiv &= S3C2443_PLLCON_PDIVMASK;
+        sdiv &= S3C2443_PLLCON_SDIVMASK;
+        fvco = (uint64_t)baseclk * (mdiv + 8);
+        do_div(fvco, (pdiv + 2) << sdiv);
+        return (unsigned int)fvco;
+}
+#endif /*  __ASM_ARM_REGS_S3C2443_CLOCK */
diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h
index 46f52401d132..8946702a87f5 100644
--- a/include/asm-arm/arch-s3c2410/regs-serial.h
+++ b/include/asm-arm/arch-s3c2410/regs-serial.h
@@ -35,10 +35,12 @@
 #define S3C24XX_VA_UART0      (S3C24XX_VA_UART)
 #define S3C24XX_VA_UART1      (S3C24XX_VA_UART + 0x4000 )
 #define S3C24XX_VA_UART2      (S3C24XX_VA_UART + 0x8000 )
+#define S3C24XX_VA_UART3      (S3C24XX_VA_UART + 0xC000 )
 #define S3C2410_PA_UART0      (S3C24XX_PA_UART)
 #define S3C2410_PA_UART1      (S3C24XX_PA_UART + 0x4000 )
 #define S3C2410_PA_UART2      (S3C24XX_PA_UART + 0x8000 )
+#define S3C2443_PA_UART3      (S3C24XX_PA_UART + 0xC000 )
 #define S3C2410_URXH      (0x24)
 #define S3C2410_UTXH      (0x20)
@@ -73,6 +75,8 @@
 #define S3C2440_UCON_UCLK         (1<<10)
 #define S3C2440_UCON_PCLK2        (2<<10)
 #define S3C2440_UCON_FCLK         (3<<10)
+#define S3C2443_UCON_EPLL         (3<<10)
 #define S3C2440_UCON2_FCLK_EN     (1<<15)
 #define S3C2440_UCON0_DIVMASK     (15 << 12)
 #define S3C2440_UCON1_DIVMASK     (15 << 12)
@@ -93,6 +97,8 @@
 #define S3C2410_UCON_TXIRQMODE    (1<<2)
 #define S3C2410_UCON_RXIRQMODE    (1<<0)
 #define S3C2410_UCON_RXFIFO_TOI   (1<<7)
+#define S3C2443_UCON_RXERR_IRQEN  (1<<6)
+#define S3C2443_UCON_LOOPBACK     (1<<5)
 #define S3C2410_UCON_DEFAULT      (S3C2410_UCON_TXILEVEL  | \
                                   S3C2410_UCON_RXILEVEL  | \
@@ -127,7 +133,7 @@
 #define S3C2410_UMCOM_AFC         (1<<4)
 #define S3C2410_UMCOM_RTS_LOW     (1<<0)
-#define S3C2412_UMCON_AFC_63    (0<<5)
+#define S3C2412_UMCON_AFC_63    (0<<5)          /* same as s3c2443 */
 #define S3C2412_UMCON_AFC_56    (1<<5)
 #define S3C2412_UMCON_AFC_48    (2<<5)
 #define S3C2412_UMCON_AFC_40    (3<<5)
@@ -143,6 +149,7 @@
 #define S3C2410_UFSTAT_RXMASK     (15<<0)
 #define S3C2410_UFSTAT_RXSHIFT    (0)
+/* UFSTAT S3C2443 same as S3C2440 */
 #define S3C2440_UFSTAT_TXFULL     (1<<14)
 #define S3C2440_UFSTAT_RXFULL     (1<<6)
 #define S3C2440_UFSTAT_TXSHIFT    (8)
@@ -157,6 +164,8 @@
 #define S3C2410_UERSTAT_OVERRUN   (1<<0)
 #define S3C2410_UERSTAT_FRAME     (1<<2)
 #define S3C2410_UERSTAT_BREAK     (1<<3)
+#define S3C2443_UERSTAT_PARITY    (1<<1)
 #define S3C2410_UERSTAT_ANY       (S3C2410_UERSTAT_OVERRUN | \
                                   S3C2410_UERSTAT_FRAME | \
                                   S3C2410_UERSTAT_BREAK)
@@ -164,6 +173,8 @@
 #define S3C2410_UMSTAT_CTS        (1<<0)
 #define S3C2410_UMSTAT_DeltaCTS   (1<<2)
+#define S3C2443_DIVSLOT           (0x2C)
 #ifndef __ASSEMBLY__
 /* struct s3c24xx_uart_clksrc
diff --git a/include/asm-arm/arch-s3c2410/reset.h b/include/asm-arm/arch-s3c2410/reset.h
new file mode 100644
index 000000000000..4f866cdecab0
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/reset.h
@@ -0,0 +1,22 @@
+/* linux/include/asm-arm/arch-s3c2410/reset.h
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 CPU reset controls
+*/
+#ifndef __ASM_ARCH_RESET_H
+#define __ASM_ARCH_RESET_H __FILE__
+/* This allows the over-ride of the default reset code
+*/
+extern void (*s3c24xx_reset_hook)(void);
+#endif /* __ASM_ARCH_RESET_H */
diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h
index ecf250db45fb..1c74ef17da33 100644
--- a/include/asm-arm/arch-s3c2410/system.h
+++ b/include/asm-arm/arch-s3c2410/system.h
@@ -15,15 +15,16 @@
 #include <asm/arch/map.h>
 #include <asm/arch/idle.h>
+#include <asm/arch/reset.h>
 #include <asm/arch/regs-watchdog.h>
 #include <asm/arch/regs-clock.h>
 void (*s3c24xx_idle)(void);
+void (*s3c24xx_reset_hook)(void);
 void s3c24xx_default_idle(void)
 {
-        void __iomem *reg = S3C2410_CLKCON;
        unsigned long tmp;
        int i;
@@ -33,16 +34,18 @@ void s3c24xx_default_idle(void)
        /* Warning: going into idle state upsets jtag scanning */
-        __raw_writel(__raw_readl(reg) | (1<<2), reg);
+        __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
        /* the samsung port seems to do a loop and then unset idle.. */
        for (i = 0; i < 50; i++) {
-                tmp += __raw_readl(reg); /* ensure loop not optimised out */
+                tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
        }
        /* this bit is not cleared on re-start... */
-        __raw_writel(__raw_readl(reg) & ~(1<<2), reg);
+        __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
 }
 static void arch_idle(void)
@@ -53,7 +56,6 @@ static void arch_idle(void)
                s3c24xx_default_idle();
 }
 static void
 arch_reset(char mode)
 {
@@ -61,6 +63,9 @@ arch_reset(char mode)
                cpu_reset(0);
        }
+        if (s3c24xx_reset_hook)
+                s3c24xx_reset_hook();
        printk("arch_reset: attempting watchdog reset\n");
        __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
diff --git a/include/asm-arm/arch-s3c2410/udc.h b/include/asm-arm/arch-s3c2410/udc.h
new file mode 100644
index 000000000000..e59ec339d614
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/udc.h
@@ -0,0 +1,36 @@
+/* linux/include/asm/arch-s3c2410/udc.h
+ *
+ * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ *  Changelog:
+ *      14-Mar-2005     RTP     Created file
+ *      02-Aug-2005     RTP     File rename
+ *      07-Sep-2005     BJD     Minor cleanups, changed cmd to enum
+ *      18-Jan-2007     HMW     Add per-platform vbus_draw function
+*/
+#ifndef __ASM_ARM_ARCH_UDC_H
+#define __ASM_ARM_ARCH_UDC_H
+enum s3c2410_udc_cmd_e {
+        S3C2410_UDC_P_ENABLE    = 1,    /* Pull-up enable        */
+        S3C2410_UDC_P_DISABLE   = 2,    /* Pull-up disable       */
+        S3C2410_UDC_P_RESET     = 3,    /* UDC reset, in case of */
+};
+struct s3c2410_udc_mach_info {
+        void    (*udc_command)(enum s3c2410_udc_cmd_e);
+        void    (*vbus_draw)(unsigned int ma);
+        unsigned int vbus_pin;
+        unsigned char vbus_pin_inverted;
+};
+extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *);
+#endif /* __ASM_ARM_ARCH_UDC_H */
diff --git a/include/asm-arm/arch-sa1100/entry-macro.S b/include/asm-arm/arch-sa1100/entry-macro.S
index 51fb50ce1169..028967629340 100644
--- a/include/asm-arm/arch-sa1100/entry-macro.S
+++ b/include/asm-arm/arch-sa1100/entry-macro.S
@@ -11,6 +11,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     r4, #0xfa000000                 @ ICIP = 0xfa050000
                add     r4, r4, #0x00050000
diff --git a/include/asm-arm/arch-sa1100/gpio.h b/include/asm-arm/arch-sa1100/gpio.h
index a331fe3f6e48..da7575b0e5d0 100644
--- a/include/asm-arm/arch-sa1100/gpio.h
+++ b/include/asm-arm/arch-sa1100/gpio.h
@@ -1,5 +1,5 @@
 /*
- * linux/include/asm-arm/arch-pxa/gpio.h
+ * linux/include/asm-arm/arch-sa1100/gpio.h
 *
 * SA1100 GPIO wrappers for arch-neutral GPIO calls
 *
@@ -24,11 +24,8 @@
 #ifndef __ASM_ARCH_SA1100_GPIO_H
 #define __ASM_ARCH_SA1100_GPIO_H
-#include <asm/arch/SA-1100.h>
+#include <asm/hardware.h>
-#include <asm/arch/irqs.h>
+#include <asm/irq.h>
-#include <asm/arch/hardware.h>
-#include <asm/errno.h>
 static inline int gpio_request(unsigned gpio, const char *label)
 {
@@ -40,26 +37,23 @@ static inline void gpio_free(unsigned gpio)
        return;
 }
-static inline int gpio_direction_input(unsigned gpio)
+extern int gpio_direction_input(unsigned gpio);
+extern int gpio_direction_output(unsigned gpio);
+static inline int gpio_get_value(unsigned gpio)
 {
-        if (gpio > GPIO_MAX)
+        return GPLR & GPIO_GPIO(gpio);
-                return -EINVAL;
-        GPDR = (GPDR_In << gpio) 0
 }
-static inline int gpio_direction_output(unsigned gpio)
+static inline void gpio_set_value(unsigned gpio, int value)
 {
-        if (gpio > GPIO_MAX)
+        if (value)
-                return -EINVAL;
+                GPSR = GPIO_GPIO(gpio);
-        GPDR = (GPDR_Out << gpio) 0
+        else
+                GPCR = GPIO_GPIO(gpio);
 }
-#define gpio_get_value(gpio) \
-        (GPLR & GPIO_GPIO(gpio))
-#define gpio_set_value(gpio,value) \
-        ((value) ? (GPSR = GPIO_GPIO(gpio)) : (GPCR(gpio) = GPIO_GPIO(gpio)))
 #include <asm-generic/gpio.h>                   /* cansleep wrappers */
 static inline unsigned gpio_to_irq(unsigned gpio)
diff --git a/include/asm-arm/arch-shark/entry-macro.S b/include/asm-arm/arch-shark/entry-macro.S
index a924f27fb8d9..82463f30f3df 100644
--- a/include/asm-arm/arch-shark/entry-macro.S
+++ b/include/asm-arm/arch-shark/entry-macro.S
@@ -10,6 +10,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                mov     r4, #0xe0000000
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index feff771c0a0a..0fae002637a0 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -13,6 +13,12 @@
                .macro  disable_fiq
                .endm
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get masked status
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 5f531ea03059..afad32c76e6c 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -185,9 +185,15 @@ struct cpu_cache_fns {
        void (*coherent_user_range)(unsigned long, unsigned long);
        void (*flush_kern_dcache_page)(void *);
-        void (*dma_inv_range)(unsigned long, unsigned long);
+        void (*dma_inv_range)(const void *, const void *);
-        void (*dma_clean_range)(unsigned long, unsigned long);
+        void (*dma_clean_range)(const void *, const void *);
-        void (*dma_flush_range)(unsigned long, unsigned long);
+        void (*dma_flush_range)(const void *, const void *);
+};
+struct outer_cache_fns {
+        void (*inv_range)(unsigned long, unsigned long);
+        void (*clean_range)(unsigned long, unsigned long);
+        void (*flush_range)(unsigned long, unsigned long);
 };
 /*
@@ -240,9 +246,40 @@ extern void __cpuc_flush_dcache_page(void *);
 #define dmac_clean_range                __glue(_CACHE,_dma_clean_range)
 #define dmac_flush_range                __glue(_CACHE,_dma_flush_range)
-extern void dmac_inv_range(unsigned long, unsigned long);
+extern void dmac_inv_range(const void *, const void *);
-extern void dmac_clean_range(unsigned long, unsigned long);
+extern void dmac_clean_range(const void *, const void *);
-extern void dmac_flush_range(unsigned long, unsigned long);
+extern void dmac_flush_range(const void *, const void *);
+#endif
+#ifdef CONFIG_OUTER_CACHE
+extern struct outer_cache_fns outer_cache;
+static inline void outer_inv_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.inv_range)
+                outer_cache.inv_range(start, end);
+}
+static inline void outer_clean_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.clean_range)
+                outer_cache.clean_range(start, end);
+}
+static inline void outer_flush_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.flush_range)
+                outer_cache.flush_range(start, end);
+}
+#else
+static inline void outer_inv_range(unsigned long start, unsigned long end)
+{ }
+static inline void outer_clean_range(unsigned long start, unsigned long end)
+{ }
+static inline void outer_flush_range(unsigned long start, unsigned long end)
+{ }
 #endif
diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h
index 8c0bb5bb14ee..eaa0efd8d0d4 100644
--- a/include/asm-arm/checksum.h
+++ b/include/asm-arm/checksum.h
@@ -40,13 +40,27 @@ __wsum
 csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr);
 /*
+ *      Fold a partial checksum without adding pseudo headers
+ */
+static inline __sum16 csum_fold(__wsum sum)
+{
+        __asm__(
+        "add    %0, %1, %1, ror #16     @ csum_fold"
+        : "=r" (sum)
+        : "r" (sum)
+        : "cc");
+        return (__force __sum16)(~(__force u32)sum >> 16);
+}
+/*
 *      This is a version of ip_compute_csum() optimized for IP headers,
 *      which always checksum on 4 octet boundaries.
 */
 static inline __sum16
 ip_fast_csum(const void *iph, unsigned int ihl)
 {
-        unsigned int sum, tmp1;
+        unsigned int tmp1;
+        __wsum sum;
        __asm__ __volatile__(
        "ldr    %0, [%1], #4            @ ip_fast_csum          \n\
@@ -62,29 +76,11 @@ ip_fast_csum(const void *iph, unsigned int ihl)
        subne   %2, %2, #1              @ without destroying    \n\
        bne     1b                      @ the carry flag        \n\
        adcs    %0, %0, %3                                      \n\
-        adc     %0, %0, #0                                      \n\
+        adc     %0, %0, #0"
-        adds    %0, %0, %0, lsl #16                             \n\
-        addcs   %0, %0, #0x10000                                \n\
-        mvn     %0, %0                                          \n\
-        mov     %0, %0, lsr #16"
        : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1)
        : "1" (iph), "2" (ihl)
        : "cc", "memory");
-        return (__force __sum16)sum;
+        return csum_fold(sum);
-}
-/*
- *      Fold a partial checksum without adding pseudo headers
- */
-static inline __sum16 csum_fold(__wsum sum)
-{
-        __asm__(
-        "adds   %0, %1, %1, lsl #16     @ csum_fold             \n\
-        addcs   %0, %0, #0x10000"
-        : "=r" (sum)
-        : "r" (sum)
-        : "cc");
-        return (__force __sum16)(~(__force u32)sum >> 16);
 }
 static inline __wsum
@@ -114,23 +110,7 @@ static inline __sum16
 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
                  unsigned short proto, __wsum sum)
 {
-        __asm__(
+        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
-        "adds   %0, %1, %2              @ csum_tcpudp_magic     \n\
-        adcs    %0, %0, %3                                      \n"
-#ifdef __ARMEB__
-        "adcs   %0, %0, %4                                      \n"
-#else
-        "adcs   %0, %0, %4, lsl #8                              \n"
-#endif
-        "adcs   %0, %0, %5                                      \n\
-        adc     %0, %0, #0                                      \n\
-        adds    %0, %0, %0, lsl #16                             \n\
-        addcs   %0, %0, #0x10000                                \n\
-        mvn     %0, %0"
-        : "=&r"(sum)
-        : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto))
-        : "cc");
-        return (__force __sum16)((__force u32)sum >> 16);
 }
diff --git a/include/asm-arm/device.h b/include/asm-arm/device.h
index d8f9872b0e2d..c61642b40603 100644
--- a/include/asm-arm/device.h
+++ b/include/asm-arm/device.h
@@ -3,5 +3,13 @@
 *
 * This file is released under the GPLv2
 */
-#include <asm-generic/device.h>
+#ifndef ASMARM_DEVICE_H
+#define ASMARM_DEVICE_H
+struct dev_archdata {
+#ifdef CONFIG_DMABOUNCE
+        struct dmabounce_device_info *dmabounce;
+#endif
+};
+#endif
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
index 9bc46b486afb..abfb75b654c7 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/include/asm-arm/dma-mapping.h
@@ -17,7 +17,7 @@
 * platforms with CONFIG_DMABOUNCE.
 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
 */
-extern void consistent_sync(void *kaddr, size_t size, int rw);
+extern void consistent_sync(const void *kaddr, size_t size, int rw);
 /*
 * Return whether the given device DMA address mask can be supported
@@ -61,6 +61,22 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
        return dma_addr == ~0;
 }
+/*
+ * Dummy noncoherent implementation.  We don't provide a dma_cache_sync
+ * function so drivers using this API are highlighted with build warnings.
+ */
+static inline void *
+dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
+{
+        return NULL;
+}
+static inline void
+dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
+                     dma_addr_t handle)
+{
+}
 /**
 * dma_alloc_coherent - allocate consistent memory for DMA
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h
index 4c2885abbe6c..3c12a7625304 100644
--- a/include/asm-arm/domain.h
+++ b/include/asm-arm/domain.h
@@ -57,6 +57,7 @@
        __asm__ __volatile__(                           \
        "mcr    p15, 0, %0, c3, c0      @ set domain"   \
          : : "r" (x));                                 \
+        isb();                                          \
        } while (0)
 #define modify_domain(dom,type)                                 \
diff --git a/include/asm-arm/hardware/arm_scu.h b/include/asm-arm/hardware/arm_scu.h
index 9903f60c84b7..7d28eb5a1758 100644
--- a/include/asm-arm/hardware/arm_scu.h
+++ b/include/asm-arm/hardware/arm_scu.h
@@ -1,6 +1,8 @@
 #ifndef ASMARM_HARDWARE_ARM_SCU_H
 #define ASMARM_HARDWARE_ARM_SCU_H
+#include <asm/arch/scu.h>
 /*
 * SCU registers
 */
diff --git a/include/asm-arm/hardware/cache-l2x0.h b/include/asm-arm/hardware/cache-l2x0.h
new file mode 100644
index 000000000000..54029a740396
--- /dev/null
+++ b/include/asm-arm/hardware/cache-l2x0.h
@@ -0,0 +1,56 @@
+/*
+ * include/asm-arm/hardware/cache-l2x0.h
+ *
+ * Copyright (C) 2007 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARM_HARDWARE_L2X0_H
+#define __ASM_ARM_HARDWARE_L2X0_H
+#define L2X0_CACHE_ID                   0x000
+#define L2X0_CACHE_TYPE                 0x004
+#define L2X0_CTRL                       0x100
+#define L2X0_AUX_CTRL                   0x104
+#define L2X0_EVENT_CNT_CTRL             0x200
+#define L2X0_EVENT_CNT1_CFG             0x204
+#define L2X0_EVENT_CNT0_CFG             0x208
+#define L2X0_EVENT_CNT1_VAL             0x20C
+#define L2X0_EVENT_CNT0_VAL             0x210
+#define L2X0_INTR_MASK                  0x214
+#define L2X0_MASKED_INTR_STAT           0x218
+#define L2X0_RAW_INTR_STAT              0x21C
+#define L2X0_INTR_CLEAR                 0x220
+#define L2X0_CACHE_SYNC                 0x730
+#define L2X0_INV_LINE_PA                0x770
+#define L2X0_INV_WAY                    0x77C
+#define L2X0_CLEAN_LINE_PA              0x7B0
+#define L2X0_CLEAN_LINE_IDX             0x7B8
+#define L2X0_CLEAN_WAY                  0x7BC
+#define L2X0_CLEAN_INV_LINE_PA          0x7F0
+#define L2X0_CLEAN_INV_LINE_IDX         0x7F8
+#define L2X0_CLEAN_INV_WAY              0x7FC
+#define L2X0_LOCKDOWN_WAY_D             0x900
+#define L2X0_LOCKDOWN_WAY_I             0x904
+#define L2X0_TEST_OPERATION             0xF00
+#define L2X0_LINE_DATA                  0xF10
+#define L2X0_LINE_TAG                   0xF30
+#define L2X0_DEBUG_CTRL                 0xF40
+#ifndef __ASSEMBLY__
+extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
+#endif
+#endif
diff --git a/include/asm-arm/hardware/gic.h b/include/asm-arm/hardware/gic.h
index 3fa5eb70f64e..966e428ad32c 100644
--- a/include/asm-arm/hardware/gic.h
+++ b/include/asm-arm/hardware/gic.h
@@ -33,8 +33,9 @@
 #define GIC_DIST_SOFTINT                0xf00
 #ifndef __ASSEMBLY__
-void gic_dist_init(void __iomem *base);
+void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
-void gic_cpu_init(void __iomem *base);
+void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
+void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
 void gic_raise_softirq(cpumask_t cpumask, unsigned int irq);
 #endif
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index 13ac8a4cd01f..15141a9caca8 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -37,6 +37,13 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_PERIPHERAL_PHYS_BASE     0xffffe000
 #define IOP3XX_PERIPHERAL_VIRT_BASE     0xfeffe000
 #define IOP3XX_PERIPHERAL_SIZE          0x00002000
+#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
+                                        IOP3XX_PERIPHERAL_SIZE - 1)
+#define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\
+                                        IOP3XX_PERIPHERAL_SIZE - 1)
+#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
+                                        (IOP3XX_PERIPHERAL_PHYS_BASE\
+                                        - IOP3XX_PERIPHERAL_VIRT_BASE))
 #define IOP3XX_REG_ADDR(reg)            (IOP3XX_PERIPHERAL_VIRT_BASE + (reg))
 /* Address Translation Unit  */
@@ -181,14 +188,10 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_TU_TRR1          (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
 #define IOP3XX_TU_TISR          (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
 #define IOP3XX_TU_WDTCR         (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
-#define IOP3XX_TMR_TC           0x01
+#define IOP_TMR_EN          0x02
-#define IOP3XX_TMR_EN           0x02
+#define IOP_TMR_RELOAD      0x04
-#define IOP3XX_TMR_RELOAD       0x04
+#define IOP_TMR_PRIVILEGED 0x08
-#define IOP3XX_TMR_PRIVILEGED   0x09
+#define IOP_TMR_RATIO_1_1  0x00
-#define IOP3XX_TMR_RATIO_1_1    0x00
-#define IOP3XX_TMR_RATIO_4_1    0x10
-#define IOP3XX_TMR_RATIO_8_1    0x20
-#define IOP3XX_TMR_RATIO_16_1   0x30
 /* Application accelerator unit  */
 #define IOP3XX_AAU_ACR          (volatile u32 *)IOP3XX_REG_ADDR(0x0800)
@@ -258,43 +261,63 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_PCI_LOWER_IO_PA          0x90000000
 #define IOP3XX_PCI_LOWER_IO_VA          0xfe000000
 #define IOP3XX_PCI_LOWER_IO_BA          (*IOP3XX_OIOWTVR)
+#define IOP3XX_PCI_UPPER_IO_PA          (IOP3XX_PCI_LOWER_IO_PA +\
+                                        IOP3XX_PCI_IO_WINDOW_SIZE - 1)
+#define IOP3XX_PCI_UPPER_IO_VA          (IOP3XX_PCI_LOWER_IO_VA +\
+                                        IOP3XX_PCI_IO_WINDOW_SIZE - 1)
+#define IOP3XX_PCI_IO_PHYS_TO_VIRT(addr) (((u32) addr -\
+                                        IOP3XX_PCI_LOWER_IO_PA) +\
+                                        IOP3XX_PCI_LOWER_IO_VA)
 #ifndef __ASSEMBLY__
 void iop3xx_map_io(void);
-void iop3xx_init_time(unsigned long);
+void iop_init_cp6_handler(void);
-unsigned long iop3xx_gettimeoffset(void);
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
-extern struct platform_device iop3xx_i2c0_device;
+static inline void write_tmr0(u32 val)
-extern struct platform_device iop3xx_i2c1_device;
+{
+        asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
+}
+static inline void write_tmr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
+}
+static inline u32 read_tcr0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
+        return val;
+}
-extern inline void iop3xx_cp6_enable(void)
+static inline u32 read_tcr1(void)
 {
-        u32 temp;
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
+        return val;
+}
-        asm volatile (
+static inline void write_trr0(u32 val)
-                "mrc    p15, 0, %0, c15, c1, 0\n\t"
+{
-                "orr    %0, %0, #(1 << 6)\n\t"
+        asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
-                "mcr    p15, 0, %0, c15, c1, 0\n\t"
-                "mrc    p15, 0, %0, c15, c1, 0\n\t"
-                "mov    %0, %0\n\t"
-                "sub    pc, pc, #4\n\t"
-                : "=r" (temp) );
 }
-extern inline void iop3xx_cp6_disable(void)
+static inline void write_trr1(u32 val)
 {
-        u32 temp;
+        asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
+}
-        asm volatile (
+static inline void write_tisr(u32 val)
-                "mrc    p15, 0, %0, c15, c1, 0\n\t"
+{
-                "bic    %0, %0, #(1 << 6)\n\t"
+        asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
-                "mcr    p15, 0, %0, c15, c1, 0\n\t"
-                "mrc    p15, 0, %0, c15, c1, 0\n\t"
-                "mov    %0, %0\n\t"
-                "sub    pc, pc, #4\n\t"
-                : "=r" (temp) );
 }
+extern struct platform_device iop3xx_i2c0_device;
+extern struct platform_device iop3xx_i2c1_device;
 #endif
diff --git a/include/asm-arm/hardware/sa1111.h b/include/asm-arm/hardware/sa1111.h
index 6aa0a5b75b69..61b1d05c7df7 100644
--- a/include/asm-arm/hardware/sa1111.h
+++ b/include/asm-arm/hardware/sa1111.h
@@ -29,6 +29,9 @@
 #define _SA1111(x)      ((x) + sa1111->resource.start)
 #endif
+#define sa1111_writel(val,addr) __raw_writel(val, addr)
+#define sa1111_readl(addr)      __raw_readl(addr)
 /*
 * 26 bits of the SA-1110 address bus are available to the SA-1111.
 * Use these when feeding target addresses to the DMA engines.
@@ -45,14 +48,6 @@
 #define SA1111_SAC_DMA_MIN_XFER (0x800)
 /*
- * SA1111 register definitions.
- */
-#define __CCREG(x)      __REGP(SA1111_VBASE + (x))
-#define sa1111_writel(val,addr) __raw_writel(val, addr)
-#define sa1111_readl(addr)      __raw_readl(addr)
-/*
 * System Bus Interface (SBI)
 *
 * Registers
@@ -194,55 +189,37 @@
 *    SADR              Serial Audio Data Register (16 x 32-bit)
 */
-#define _SACR0          _SA1111( 0x0600 )
+#define SA1111_SERAUDIO         0x0600
-#define _SACR1          _SA1111( 0x0604 )
-#define _SACR2          _SA1111( 0x0608 )
+/*
-#define _SASR0          _SA1111( 0x060c )
+ * These are offsets from the above base.
-#define _SASR1          _SA1111( 0x0610 )
+ */
-#define _SASCR          _SA1111( 0x0618 )
+#define SA1111_SACR0            0x00
-#define _L3_CAR         _SA1111( 0x061c )
+#define SA1111_SACR1            0x04
-#define _L3_CDR         _SA1111( 0x0620 )
+#define SA1111_SACR2            0x08
-#define _ACCAR          _SA1111( 0x0624 )
+#define SA1111_SASR0            0x0c
-#define _ACCDR          _SA1111( 0x0628 )
+#define SA1111_SASR1            0x10
-#define _ACSAR          _SA1111( 0x062c )
+#define SA1111_SASCR            0x18
-#define _ACSDR          _SA1111( 0x0630 )
+#define SA1111_L3_CAR           0x1c
-#define _SADTCS         _SA1111( 0x0634 )
+#define SA1111_L3_CDR           0x20
-#define _SADTSA         _SA1111( 0x0638 )
+#define SA1111_ACCAR            0x24
-#define _SADTCA         _SA1111( 0x063c )
+#define SA1111_ACCDR            0x28
-#define _SADTSB         _SA1111( 0x0640 )
+#define SA1111_ACSAR            0x2c
-#define _SADTCB         _SA1111( 0x0644 )
+#define SA1111_ACSDR            0x30
-#define _SADRCS         _SA1111( 0x0648 )
+#define SA1111_SADTCS           0x34
-#define _SADRSA         _SA1111( 0x064c )
+#define SA1111_SADTSA           0x38
-#define _SADRCA         _SA1111( 0x0650 )
+#define SA1111_SADTCA           0x3c
-#define _SADRSB         _SA1111( 0x0654 )
+#define SA1111_SADTSB           0x40
-#define _SADRCB         _SA1111( 0x0658 )
+#define SA1111_SADTCB           0x44
-#define _SAITR          _SA1111( 0x065c )
+#define SA1111_SADRCS           0x48
-#define _SADR           _SA1111( 0x0680 )
+#define SA1111_SADRSA           0x4c
+#define SA1111_SADRCA           0x50
-#define SACR0           __CCREG(0x0600)
+#define SA1111_SADRSB           0x54
-#define SACR1           __CCREG(0x0604)
+#define SA1111_SADRCB           0x58
-#define SACR2           __CCREG(0x0608)
+#define SA1111_SAITR            0x5c
-#define SASR0           __CCREG(0x060c)
+#define SA1111_SADR             0x80
-#define SASR1           __CCREG(0x0610)
-#define SASCR           __CCREG(0x0618)
+#ifndef CONFIG_ARCH_PXA
-#define L3_CAR          __CCREG(0x061c)
-#define L3_CDR          __CCREG(0x0620)
-#define ACCAR           __CCREG(0x0624)
-#define ACCDR           __CCREG(0x0628)
-#define ACSAR           __CCREG(0x062c)
-#define ACSDR           __CCREG(0x0630)
-#define SADTCS          __CCREG(0x0634)
-#define SADTSA          __CCREG(0x0638)
-#define SADTCA          __CCREG(0x063c)
-#define SADTSB          __CCREG(0x0640)
-#define SADTCB          __CCREG(0x0644)
-#define SADRCS          __CCREG(0x0648)
-#define SADRSA          __CCREG(0x064c)
-#define SADRCA          __CCREG(0x0650)
-#define SADRSB          __CCREG(0x0654)
-#define SADRCB          __CCREG(0x0658)
-#define SAITR           __CCREG(0x065c)
-#define SADR            __CCREG(0x0680)
 #define SACR0_ENB       (1<<0)
 #define SACR0_BCKD      (1<<2)
@@ -330,6 +307,8 @@
 #define SAITR_RDBDA     (1<<10)
 #define SAITR_RDBDB     (1<<11)
+#endif  /* !CONFIG_ARCH_PXA */
 /*
 * General-Purpose I/O Interface
 *
diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h
new file mode 100644
index 000000000000..8c1c6162a80c
--- /dev/null
+++ b/include/asm-arm/kexec.h
@@ -0,0 +1,30 @@
+#ifndef _ARM_KEXEC_H
+#define _ARM_KEXEC_H
+#ifdef CONFIG_KEXEC
+/* Maximum physical address we can use pages from */
+#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
+/* Maximum address we can reach in physical address mode */
+#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
+/* Maximum address we can use for the control code buffer */
+#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
+#define KEXEC_CONTROL_CODE_SIZE 4096
+#define KEXEC_ARCH KEXEC_ARCH_ARM
+#ifndef __ASSEMBLY__
+#define MAX_NOTE_BYTES 1024
+struct kimage;
+/* Provide a dummy definition to avoid build failures. */
+static inline void crash_setup_regs(struct pt_regs *newregs,
+                                        struct pt_regs *oldregs) { }
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_KEXEC */
+#endif /* _ARM_KEXEC_H */
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index b8cf2d5ec304..7b2bafce21a2 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -175,19 +175,29 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 #ifndef __ASSEMBLY__
 /*
- * The following macros handle the cache and bufferable bits...
+ * The pgprot_* and protection_map entries will be fixed up in runtime
+ * to include the cachable and bufferable bits based on memory policy,
+ * as well as any architecture dependent bits like global/ASID and SMP
+ * shared mapping bits.
 */
 #define _L_PTE_DEFAULT  L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE
 #define _L_PTE_READ     L_PTE_USER | L_PTE_EXEC
+extern pgprot_t         pgprot_user;
 extern pgprot_t         pgprot_kernel;
-#define PAGE_NONE       __pgprot(_L_PTE_DEFAULT)
+#define PAGE_NONE       pgprot_user
-#define PAGE_COPY       __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
+#define PAGE_COPY       __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
-#define PAGE_SHARED     __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)
+#define PAGE_SHARED     __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \
-#define PAGE_READONLY   __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
+                                 L_PTE_WRITE)
+#define PAGE_READONLY   __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
 #define PAGE_KERNEL     pgprot_kernel
+#define __PAGE_NONE     __pgprot(_L_PTE_DEFAULT)
+#define __PAGE_COPY     __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
+#define __PAGE_SHARED   __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)
+#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
 #endif /* __ASSEMBLY__ */
 /*
@@ -198,23 +208,23 @@ extern pgprot_t		pgprot_kernel;
 *  2) If we could do execute protection, then read is implied
 *  3) write implies read permissions
 */
-#define __P000  PAGE_NONE
+#define __P000  __PAGE_NONE
-#define __P001  PAGE_READONLY
+#define __P001  __PAGE_READONLY
-#define __P010  PAGE_COPY
+#define __P010  __PAGE_COPY
-#define __P011  PAGE_COPY
+#define __P011  __PAGE_COPY
-#define __P100  PAGE_READONLY
+#define __P100  __PAGE_READONLY
-#define __P101  PAGE_READONLY
+#define __P101  __PAGE_READONLY
-#define __P110  PAGE_COPY
+#define __P110  __PAGE_COPY
-#define __P111  PAGE_COPY
+#define __P111  __PAGE_COPY
-#define __S000  PAGE_NONE
+#define __S000  __PAGE_NONE
-#define __S001  PAGE_READONLY
+#define __S001  __PAGE_READONLY
-#define __S010  PAGE_SHARED
+#define __S010  __PAGE_SHARED
-#define __S011  PAGE_SHARED
+#define __S011  __PAGE_SHARED
-#define __S100  PAGE_READONLY
+#define __S100  __PAGE_READONLY
-#define __S101  PAGE_READONLY
+#define __S101  __PAGE_READONLY
-#define __S110  PAGE_SHARED
+#define __S110  __PAGE_SHARED
-#define __S111  PAGE_SHARED
+#define __S111  __PAGE_SHARED
 #ifndef __ASSEMBLY__
 /*
diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/include/asm-arm/plat-s3c24xx/clock.h
new file mode 100644
index 000000000000..f6135dbb9fa9
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/clock.h
@@ -0,0 +1,63 @@
+/* linux/include/asm-arm/plat-s3c24xx/clock.h
+ * linux/arch/arm/mach-s3c2410/clock.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      http://www.simtec.co.uk/products/SWLINUX/
+ *      Written by Ben Dooks, <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+struct clk {
+        struct list_head      list;
+        struct module        *owner;
+        struct clk           *parent;
+        const char           *name;
+        int                   id;
+        int                   usage;
+        unsigned long         rate;
+        unsigned long         ctrlbit;
+        int                 (*enable)(struct clk *, int enable);
+        int                 (*set_rate)(struct clk *c, unsigned long rate);
+        unsigned long       (*get_rate)(struct clk *c);
+        unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
+        int                 (*set_parent)(struct clk *c, struct clk *parent);
+};
+/* other clocks which may be registered by board support */
+extern struct clk s3c24xx_dclk0;
+extern struct clk s3c24xx_dclk1;
+extern struct clk s3c24xx_clkout0;
+extern struct clk s3c24xx_clkout1;
+extern struct clk s3c24xx_uclk;
+extern struct clk clk_usb_bus;
+/* core clock support */
+extern struct clk clk_f;
+extern struct clk clk_h;
+extern struct clk clk_p;
+extern struct clk clk_mpll;
+extern struct clk clk_upll;
+extern struct clk clk_xtal;
+/* exports for arch/arm/mach-s3c2410
+ *
+ * Please DO NOT use these outside of arch/arm/mach-s3c2410
+*/
+extern struct mutex clocks_mutex;
+extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
+extern int s3c24xx_register_clock(struct clk *clk);
+extern int s3c24xx_setup_clocks(unsigned long xtal,
+                                unsigned long fclk,
+                                unsigned long hclk,
+                                unsigned long pclk);
diff --git a/include/asm-arm/plat-s3c24xx/common-smdk.h b/include/asm-arm/plat-s3c24xx/common-smdk.h
new file mode 100644
index 000000000000..58d9094c935c
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/common-smdk.h
@@ -0,0 +1,15 @@
+/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Common code for SMDK2410 and SMDK2440 boards
+ *
+ * http://www.fluff.org/ben/smdk2440/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+extern void smdk_machine_init(void);
diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h
new file mode 100644
index 000000000000..15dd18810905
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/cpu.h
@@ -0,0 +1,70 @@
+/* linux/include/asm-arm/plat-s3c24xx/cpu.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C24XX CPU support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+/* todo - fix when rmk changes iodescs to use `void __iomem *` */
+#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
+#ifndef MHZ
+#define MHZ (1000*1000)
+#endif
+#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
+/* forward declaration */
+struct s3c24xx_uart_resources;
+struct platform_device;
+struct s3c2410_uartcfg;
+struct map_desc;
+/* core initialisation functions */
+extern void s3c24xx_init_irq(void);
+extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
+extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c24xx_init_clocks(int xtal);
+extern void s3c24xx_init_uartdevs(char *name,
+                                  struct s3c24xx_uart_resources *res,
+                                  struct s3c2410_uartcfg *cfg, int no);
+/* the board structure is used at first initialsation time
+ * to get info such as the devices to register for this
+ * board. This is done because platfrom_add_devices() cannot
+ * be called from the map_io entry.
+*/
+struct s3c24xx_board {
+        struct platform_device  **devices;
+        unsigned int              devices_count;
+        struct clk              **clocks;
+        unsigned int              clocks_count;
+};
+extern void s3c24xx_set_board(struct s3c24xx_board *board);
+/* timer for 2410/2440 */
+struct sys_timer;
+extern struct sys_timer s3c24xx_timer;
+/* system device classes */
+extern struct sysdev_class s3c2410_sysclass;
+extern struct sysdev_class s3c2412_sysclass;
+extern struct sysdev_class s3c2440_sysclass;
+extern struct sysdev_class s3c2442_sysclass;
+extern struct sysdev_class s3c2443_sysclass;
diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/include/asm-arm/plat-s3c24xx/devs.h
new file mode 100644
index 000000000000..dddf485fc067
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/devs.h
@@ -0,0 +1,51 @@
+/* linux/include/asm-arm/plat-s3c24xx/devs.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2410 standard platform devices
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/platform_device.h>
+struct s3c24xx_uart_resources {
+        struct resource         *resources;
+        unsigned long            nr_resources;
+};
+extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
+extern struct platform_device *s3c24xx_uart_devs[];
+extern struct platform_device *s3c24xx_uart_src[];
+extern struct platform_device s3c_device_usb;
+extern struct platform_device s3c_device_lcd;
+extern struct platform_device s3c_device_wdt;
+extern struct platform_device s3c_device_i2c;
+extern struct platform_device s3c_device_iis;
+extern struct platform_device s3c_device_rtc;
+extern struct platform_device s3c_device_adc;
+extern struct platform_device s3c_device_sdi;
+extern struct platform_device s3c_device_spi0;
+extern struct platform_device s3c_device_spi1;
+extern struct platform_device s3c_device_nand;
+extern struct platform_device s3c_device_timer0;
+extern struct platform_device s3c_device_timer1;
+extern struct platform_device s3c_device_timer2;
+extern struct platform_device s3c_device_timer3;
+extern struct platform_device s3c_device_usbgadget;
+/* s3c2440 specific devices */
+#ifdef CONFIG_CPU_S3C2440
+extern struct platform_device s3c_device_camif;
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/dma.h b/include/asm-arm/plat-s3c24xx/dma.h
new file mode 100644
index 000000000000..2c59406435e5
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/dma.h
@@ -0,0 +1,77 @@
+/* linux/include/asm-arm/plat-s3c24xx/dma.h
+ *
+ * Copyright (C) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Samsung S3C24XX DMA support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+extern struct sysdev_class dma_sysclass;
+extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
+#define DMA_CH_VALID            (1<<31)
+#define DMA_CH_NEVER            (1<<30)
+struct s3c24xx_dma_addr {
+        unsigned long           from;
+        unsigned long           to;
+};
+/* struct s3c24xx_dma_map
+ *
+ * this holds the mapping information for the channel selected
+ * to be connected to the specified device
+*/
+struct s3c24xx_dma_map {
+        const char              *name;
+        struct s3c24xx_dma_addr  hw_addr;
+        unsigned long            channels[S3C2410_DMA_CHANNELS];
+};
+struct s3c24xx_dma_selection {
+        struct s3c24xx_dma_map  *map;
+        unsigned long            map_size;
+        unsigned long            dcon_mask;
+        void    (*select)(struct s3c2410_dma_chan *chan,
+                          struct s3c24xx_dma_map *map);
+};
+extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
+/* struct s3c24xx_dma_order_ch
+ *
+ * channel map for one of the `enum dma_ch` dma channels. the list
+ * entry contains a set of low-level channel numbers, orred with
+ * DMA_CH_VALID, which are checked in the order in the array.
+*/
+struct s3c24xx_dma_order_ch {
+        unsigned int    list[S3C2410_DMA_CHANNELS];     /* list of channels */
+        unsigned int    flags;                          /* flags */
+};
+/* struct s3c24xx_dma_order
+ *
+ * information provided by either the core or the board to give the
+ * dma system a hint on how to allocate channels
+*/
+struct s3c24xx_dma_order {
+        struct s3c24xx_dma_order_ch     channels[DMACH_MAX];
+};
+extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
+/* DMA init code, called from the cpu support code */
+extern int s3c2410_dma_init(void);
+extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
+                            unsigned int stride);
diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h
new file mode 100644
index 000000000000..8af6d9579b31
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/irq.h
@@ -0,0 +1,107 @@
+/* linux/include/asm-arm/plat-s3c24xx/irq.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C24XX CPU IRQ support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#define irqdbf(x...)
+#define irqdbf2(x...)
+#define EXTINT_OFF (IRQ_EINT4 - 4)
+extern struct irq_chip s3c_irq_level_chip;
+static inline void
+s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
+                int subcheck)
+{
+        unsigned long mask;
+        unsigned long submask;
+        submask = __raw_readl(S3C2410_INTSUBMSK);
+        mask = __raw_readl(S3C2410_INTMSK);
+        submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
+        /* check to see if we need to mask the parent IRQ */
+        if ((submask  & subcheck) == subcheck) {
+                __raw_writel(mask | parentbit, S3C2410_INTMSK);
+        }
+        /* write back masks */
+        __raw_writel(submask, S3C2410_INTSUBMSK);
+}
+static inline void
+s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
+{
+        unsigned long mask;
+        unsigned long submask;
+        submask = __raw_readl(S3C2410_INTSUBMSK);
+        mask = __raw_readl(S3C2410_INTMSK);
+        submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
+        mask &= ~parentbit;
+        /* write back masks */
+        __raw_writel(submask, S3C2410_INTSUBMSK);
+        __raw_writel(mask, S3C2410_INTMSK);
+}
+static inline void
+s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+{
+        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
+        s3c_irqsub_mask(irqno, parentmask, group);
+        __raw_writel(bit, S3C2410_SUBSRCPND);
+        /* only ack parent if we've got all the irqs (seems we must
+         * ack, all and hope that the irq system retriggers ok when
+         * the interrupt goes off again)
+         */
+        if (1) {
+                __raw_writel(parentmask, S3C2410_SRCPND);
+                __raw_writel(parentmask, S3C2410_INTPND);
+        }
+}
+static inline void
+s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+{
+        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
+        __raw_writel(bit, S3C2410_SUBSRCPND);
+        /* only ack parent if we've got all the irqs (seems we must
+         * ack, all and hope that the irq system retriggers ok when
+         * the interrupt goes off again)
+         */
+        if (1) {
+                __raw_writel(parentmask, S3C2410_SRCPND);
+                __raw_writel(parentmask, S3C2410_INTPND);
+        }
+}
+/* exported for use in arch/arm/mach-s3c2410 */
+#ifdef CONFIG_PM
+extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
+#else
+#define s3c_irq_wake NULL
+#endif
+extern int s3c_irqext_type(unsigned int irq, unsigned int type);
diff --git a/include/asm-arm/plat-s3c24xx/pm.h b/include/asm-arm/plat-s3c24xx/pm.h
new file mode 100644
index 000000000000..cc623667e48a
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/pm.h
@@ -0,0 +1,73 @@
+/* linux/include/asm-arm/plat-s3c24xx/pm.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Written by Ben Dooks, <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+/* s3c2410_pm_init
+ *
+ * called from board at initialisation time to setup the power
+ * management
+*/
+#ifdef CONFIG_PM
+extern __init int s3c2410_pm_init(void);
+#else
+static inline int s3c2410_pm_init(void)
+{
+        return 0;
+}
+#endif
+/* configuration for the IRQ mask over sleep */
+extern unsigned long s3c_irqwake_intmask;
+extern unsigned long s3c_irqwake_eintmask;
+/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */
+extern unsigned long s3c_irqwake_intallow;
+extern unsigned long s3c_irqwake_eintallow;
+/* per-cpu sleep functions */
+extern void (*pm_cpu_prep)(void);
+extern void (*pm_cpu_sleep)(void);
+/* Flags for PM Control */
+extern unsigned long s3c_pm_flags;
+/* from sleep.S */
+extern int  s3c2410_cpu_save(unsigned long *saveblk);
+extern void s3c2410_cpu_suspend(void);
+extern void s3c2410_cpu_resume(void);
+extern unsigned long s3c2410_sleep_save_phys;
+/* sleep save info */
+struct sleep_save {
+        void __iomem    *reg;
+        unsigned long   val;
+};
+#define SAVE_ITEM(x) \
+        { .reg = (x) }
+extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count);
+extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count);
+#ifdef CONFIG_PM
+extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
+extern int s3c24xx_irq_resume(struct sys_device *dev);
+#else
+#define s3c24xx_irq_suspend NULL
+#define s3c24xx_irq_resume  NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2400.h b/include/asm-arm/plat-s3c24xx/s3c2400.h
new file mode 100644
index 000000000000..3a5a16821af8
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2400.h
@@ -0,0 +1,31 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2400.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C2400 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ *     09-Fev-2006 LCVR  First version, based on s3c2410.h
+*/
+#ifdef CONFIG_CPU_S3C2400
+extern  int s3c2400_init(void);
+extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c2400_init_clocks(int xtal);
+#else
+#define s3c2400_init_clocks NULL
+#define s3c2400_init_uarts NULL
+#define s3c2400_map_io NULL
+#define s3c2400_init NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2410.h b/include/asm-arm/plat-s3c24xx/s3c2410.h
new file mode 100644
index 000000000000..36de0b835873
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2410.h
@@ -0,0 +1,31 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2410 machine directory
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+#ifdef CONFIG_CPU_S3C2410
+extern  int s3c2410_init(void);
+extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c2410_init_clocks(int xtal);
+extern  int s3c2410_baseclk_add(void);
+#else
+#define s3c2410_init_clocks NULL
+#define s3c2410_init_uarts NULL
+#define s3c2410_map_io NULL
+#define s3c2410_init NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2412.h b/include/asm-arm/plat-s3c24xx/s3c2412.h
new file mode 100644
index 000000000000..3ec97685e781
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2412.h
@@ -0,0 +1,29 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2412 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifdef CONFIG_CPU_S3C2412
+extern  int s3c2412_init(void);
+extern void s3c2412_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c2412_init_clocks(int xtal);
+extern  int s3c2412_baseclk_add(void);
+#else
+#define s3c2412_init_clocks NULL
+#define s3c2412_init_uarts NULL
+#define s3c2412_map_io NULL
+#define s3c2412_init NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2440.h b/include/asm-arm/plat-s3c24xx/s3c2440.h
new file mode 100644
index 000000000000..107853bf9481
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2440.h
@@ -0,0 +1,17 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2440 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifdef CONFIG_CPU_S3C2440
+extern  int s3c2440_init(void);
+#else
+#define s3c2440_init NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2442.h b/include/asm-arm/plat-s3c24xx/s3c2442.h
new file mode 100644
index 000000000000..451a23a2092a
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2442.h
@@ -0,0 +1,17 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2442 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifdef CONFIG_CPU_S3C2442
+extern  int s3c2442_init(void);
+#else
+#define s3c2442_init NULL
+#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2443.h b/include/asm-arm/plat-s3c24xx/s3c2443.h
new file mode 100644
index 000000000000..11d83b5c84e6
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/s3c2443.h
@@ -0,0 +1,32 @@
+/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2443 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifdef CONFIG_CPU_S3C2443
+struct s3c2410_uartcfg;
+extern  int s3c2443_init(void);
+extern void s3c2443_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c2443_init_clocks(int xtal);
+extern  int s3c2443_baseclk_add(void);
+#else
+#define s3c2443_init_clocks NULL
+#define s3c2443_init_uarts NULL
+#define s3c2443_map_io NULL
+#define s3c2443_init NULL
+#endif
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index aa223fc546af..f4386906b200 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -140,6 +140,40 @@ static inline int cpu_is_xsc3(void)
 #define cpu_is_xscale() 1
 #endif
+#define UDBG_UNDEFINED  (1 << 0)
+#define UDBG_SYSCALL    (1 << 1)
+#define UDBG_BADABORT   (1 << 2)
+#define UDBG_SEGV       (1 << 3)
+#define UDBG_BUS        (1 << 4)
+extern unsigned int user_debug;
+#if __LINUX_ARM_ARCH__ >= 4
+#define vectors_high()  (cr_alignment & CR_V)
+#else
+#define vectors_high()  (0)
+#endif
+#if __LINUX_ARM_ARCH__ >= 6
+#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
+                                    : : "r" (0) : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+                                    : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
+                                    : : "r" (0) : "memory")
+#else
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+                                    : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#endif
+#define mb() dmb()
+#define rmb() mb()
+#define wmb() mb()
+#define read_barrier_depends() do { } while(0)
+#define set_mb(var, value)  do { var = value; mb(); } while (0)
+#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 extern unsigned long cr_no_alignment;   /* defined in entry-armv.S */
 extern unsigned long cr_alignment;      /* defined in entry-armv.S */
@@ -154,6 +188,7 @@ static inline void set_cr(unsigned int val)
 {
        asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
          : : "r" (val) : "cc");
+        isb();
 }
 #ifndef CONFIG_SMP
@@ -176,34 +211,9 @@ static inline void set_copro_access(unsigned int val)
 {
        asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
          : : "r" (val) : "cc");
+        isb();
 }
-#define UDBG_UNDEFINED  (1 << 0)
-#define UDBG_SYSCALL    (1 << 1)
-#define UDBG_BADABORT   (1 << 2)
-#define UDBG_SEGV       (1 << 3)
-#define UDBG_BUS        (1 << 4)
-extern unsigned int user_debug;
-#if __LINUX_ARM_ARCH__ >= 4
-#define vectors_high()  (cr_alignment & CR_V)
-#else
-#define vectors_high()  (0)
-#endif
-#if __LINUX_ARM_ARCH__ >= 6
-#define mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
-                                   : : "r" (0) : "memory")
-#else
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-#endif
-#define rmb() mb()
-#define wmb() mb()
-#define read_barrier_depends() do { } while(0)
-#define set_mb(var, value)  do { var = value; mb(); } while (0)
-#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 /*
 * switch_mm() may do a full cache flush over the context switch,
 * so enable interrupts over the context switch to avoid high
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index cd10a0b5f8ae..08c6991dc9c9 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -247,7 +247,7 @@ static inline void local_flush_tlb_all(void)
        const unsigned int __tlb_flag = __cpu_tlb_flags;
        if (tlb_flag(TLB_WB))
-                asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
+                dsb();
        if (tlb_flag(TLB_V3_FULL))
                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
@@ -257,6 +257,15 @@ static inline void local_flush_tlb_all(void)
                asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
        if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
                asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
+        if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
+                     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
+                     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 static inline void local_flush_tlb_mm(struct mm_struct *mm)
@@ -266,7 +275,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
        const unsigned int __tlb_flag = __cpu_tlb_flags;
        if (tlb_flag(TLB_WB))
-                asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
+                dsb();
        if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) {
                if (tlb_flag(TLB_V3_FULL))
@@ -285,6 +294,14 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
                asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
        if (tlb_flag(TLB_V6_I_ASID))
                asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
+        if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
+                     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
+                     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+                dsb();
+        }
 }
 static inline void
@@ -296,7 +313,7 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
        uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
        if (tlb_flag(TLB_WB))
-                asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero));
+                dsb();
        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
                if (tlb_flag(TLB_V3_PAGE))
@@ -317,6 +334,14 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
        if (tlb_flag(TLB_V6_I_PAGE))
                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
+        if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
+                     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
+                     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+                dsb();
+        }
 }
 static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -327,7 +352,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
        kaddr &= PAGE_MASK;
        if (tlb_flag(TLB_WB))
-                asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
+                dsb();
        if (tlb_flag(TLB_V3_PAGE))
                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc");
@@ -347,11 +372,14 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
        if (tlb_flag(TLB_V6_I_PAGE))
                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
-        /* The ARM ARM states that the completion of a TLB maintenance
+        if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
-         * operation is only guaranteed by a DSB instruction
+                     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
-         */
+                     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
-        if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
+                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero) : "cc");
+                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 /*
@@ -369,15 +397,13 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
 */
 static inline void flush_pmd_entry(pmd_t *pmd)
 {
-        const unsigned int zero = 0;
        const unsigned int __tlb_flag = __cpu_tlb_flags;
        if (tlb_flag(TLB_DCLEAN))
                asm("mcr        p15, 0, %0, c7, c10, 1  @ flush_pmd"
                        : : "r" (pmd) : "cc");
        if (tlb_flag(TLB_WB))
-                asm("mcr        p15, 0, %0, c7, c10, 4  @ flush_pmd"
+                dsb();
-                        : : "r" (zero) : "cc");
 }
 static inline void clean_pmd_entry(pmd_t *pmd)
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
index c92df958802e..4c1a3fa9f259 100644
--- a/include/asm-arm/uaccess.h
+++ b/include/asm-arm/uaccess.h
@@ -109,7 +109,7 @@ extern int __get_user_4(void *);
 #define get_user(x,p)                                                   \
        ({                                                              \
-                const register typeof(*(p)) __user *__p asm("r0") = (p);\
+                register const typeof(*(p)) __user *__p asm("r0") = (p);\
                register unsigned long __r2 asm("r2");                  \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
@@ -143,8 +143,8 @@ extern int __put_user_8(void *, unsigned long long);
 #define put_user(x,p)                                                   \
        ({                                                              \
-                const register typeof(*(p)) __r2 asm("r2") = (x);       \
+                register const typeof(*(p)) __r2 asm("r2") = (x);       \
-                const register typeof(*(p)) __user *__p asm("r0") = (p);\
+                register const typeof(*(p)) __user *__p asm("r0") = (p);\
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
                case 1:                                                 \
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index 97e7060000cf..0991b7bc3f78 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -372,6 +372,7 @@
 #define __NR_move_pages                 (__NR_SYSCALL_BASE+344)
 #define __NR_getcpu                     (__NR_SYSCALL_BASE+345)
                                        /* 346 for epoll_pwait */
+#define __NR_sys_kexec_load             (__NR_SYSCALL_BASE+347)
 /*
 * The following SWIs are ARM private.
diff --git a/include/asm-arm26/uaccess.h b/include/asm-arm26/uaccess.h
index 3f2dd1093e58..d64ed84cb2d3 100644
--- a/include/asm-arm26/uaccess.h
+++ b/include/asm-arm26/uaccess.h
@@ -74,7 +74,7 @@ extern int __get_user_bad(void);
 #define get_user(x,p)                                                   \
        ({                                                              \
-                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register const typeof(*(p)) *__p asm("r0") = (p);       \
                register typeof(*(p)) __r1 asm("r1");                   \
                register int __e asm("r0");                             \
                switch (sizeof(*(p))) {                                 \
@@ -139,8 +139,8 @@ extern int __put_user_bad(void);
 #define put_user(x,p)                                                   \
        ({                                                              \
-                const register typeof(*(p)) __r1 asm("r1") = (x);       \
+                register const typeof(*(p)) __r1 asm("r1") = (x);       \
-                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register const typeof(*(p)) *__p asm("r0") = (p);       \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
                case 1:                                                 \
@@ -170,8 +170,8 @@ extern int __put_user_bad(void);
 #define put_user(x,p)                                                   \
        ({                                                              \
-                const register typeof(*(p)) __r1 asm("r1") = (x);       \
+                register const typeof(*(p)) __r1 asm("r1") = (x);       \
-                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register const typeof(*(p)) *__p asm("r0") = (p);       \
                register int __e asm("r0");                             \
                switch (sizeof(*(p))) {                                 \
                case 1:                                                 \
diff --git a/include/asm-avr32/arch-at32ap/at91_pdc.h b/include/asm-avr32/arch-at32ap/at91_pdc.h
deleted file mode 100644
index 79d6e02fa45e..000000000000
--- a/include/asm-avr32/arch-at32ap/at91_pdc.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * include/asm-arm/arch-at91rm9200/at91_pdc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Peripheral Data Controller (PDC) registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef AT91_PDC_H
-#define AT91_PDC_H
-#define AT91_PDC_RPR            0x100   /* Receive Pointer Register */
-#define AT91_PDC_RCR            0x104   /* Receive Counter Register */
-#define AT91_PDC_TPR            0x108   /* Transmit Pointer Register */
-#define AT91_PDC_TCR            0x10c   /* Transmit Counter Register */
-#define AT91_PDC_RNPR           0x110   /* Receive Next Pointer Register */
-#define AT91_PDC_RNCR           0x114   /* Receive Next Counter Register */
-#define AT91_PDC_TNPR           0x118   /* Transmit Next Pointer Register */
-#define AT91_PDC_TNCR           0x11c   /* Transmit Next Counter Register */
-#define AT91_PDC_PTCR           0x120   /* Transfer Control Register */
-#define         AT91_PDC_RXTEN          (1 << 0)        /* Receiver Transfer Enable */
-#define         AT91_PDC_RXTDIS         (1 << 1)        /* Receiver Transfer Disable */
-#define         AT91_PDC_TXTEN          (1 << 8)        /* Transmitter Transfer Enable */
-#define         AT91_PDC_TXTDIS         (1 << 9)        /* Transmitter Transfer Disable */
-#define AT91_PDC_PTSR           0x124   /* Transfer Status Register */
-#endif
diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
index b120ee030c86..1a7b07d436ff 100644
--- a/include/asm-avr32/arch-at32ap/board.h
+++ b/include/asm-avr32/arch-at32ap/board.h
@@ -26,7 +26,9 @@ struct eth_platform_data {
 struct platform_device *
 at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
-struct platform_device *at32_add_device_spi(unsigned int id);
+struct spi_board_info;
+struct platform_device *
+at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
 struct lcdc_platform_data {
        unsigned long fbmem_start;
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index eec47500fa66..c08e81048393 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -28,13 +28,13 @@ static __inline__ void * phys_to_virt(unsigned long address)
 * Generic IO read/write.  These perform native-endian accesses.  Note
 * that some architectures will want to re-define __raw_{read,write}w.
 */
-extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
+extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
-extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
+extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
-extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
+extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
-extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
+extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
-extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
+extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
-extern void __raw_readsl(unsigned int addr, void *data, int longlen);
+extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 static inline void writeb(unsigned char b, volatile void __iomem *addr)
 {
@@ -252,6 +252,9 @@ extern void __iounmap(void __iomem *addr);
 #define ioremap(offset, size)                   \
        __ioremap((offset), (size), 0)
+#define ioremap_nocache(offset, size)           \
+        __ioremap((offset), (size), 0)
 #define iounmap(addr)                           \
        __iounmap(addr)
@@ -263,6 +266,14 @@ extern void __iounmap(void __iomem *addr);
 #define page_to_bus page_to_phys
 #define bus_to_page phys_to_page
+/*
+ * Create a virtual mapping cookie for an IO port range.  There exists
+ * no such thing as port-based I/O on AVR32, so a regular ioremap()
+ * should do what we need.
+ */
+#define ioport_map(port, nr)    ioremap(port, nr)
+#define ioport_unmap(port)      iounmap(port)
 #define dma_cache_wback_inv(_start, _size)      \
        flush_dcache_region(_start, _size)
 #define dma_cache_inv(_start, _size)            \
diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
index 56ed1f9d348a..8f5120471819 100644
--- a/include/asm-avr32/unistd.h
+++ b/include/asm-avr32/unistd.h
@@ -120,7 +120,7 @@
 #define __NR_getitimer          105
 #define __NR_swapoff            106
 #define __NR_sysinfo            107
-#define __NR_ipc                108
+/* 108 was __NR_ipc for a little while */
 #define __NR_sendfile           109
 #define __NR_setdomainname      110
 #define __NR_uname              111
@@ -282,8 +282,21 @@
 #define __NR_vmsplice           264
 #define __NR_epoll_pwait        265
+#define __NR_msgget             266
+#define __NR_msgsnd             267
+#define __NR_msgrcv             268
+#define __NR_msgctl             269
+#define __NR_semget             270
+#define __NR_semop              271
+#define __NR_semctl             272
+#define __NR_semtimedop         273
+#define __NR_shmat              274
+#define __NR_shmget             275
+#define __NR_shmdt              276
+#define __NR_shmctl             277
 #ifdef __KERNEL__
-#define NR_syscalls             266
+#define NR_syscalls             278
 #define __ARCH_WANT_IPC_PARSE_VERSION
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 9d774d07d95b..00c23433b39f 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -183,6 +183,19 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres
 #endif
 /*
+ * A facility to provide batching of the reload of page tables with the
+ * actual context switch code for paravirtualized guests.  By convention,
+ * only one of the lazy modes (CPU, MMU) should be active at any given
+ * time, entry should never be nested, and entry and exits should always
+ * be paired.  This is for sanity of maintaining and reasoning about the
+ * kernel code.
+ */
+#ifndef __HAVE_ARCH_ENTER_LAZY_CPU_MODE
+#define arch_enter_lazy_cpu_mode()      do {} while (0)
+#define arch_leave_lazy_cpu_mode()      do {} while (0)
+#endif
+/*
 * When walking page tables, get the address of the next boundary,
 * or the end address of the range if that comes earlier.  Although no
 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
diff --git a/include/asm-i386/acpi.h b/include/asm-i386/acpi.h
index 5e657eb8946c..449f3f272e07 100644
--- a/include/asm-i386/acpi.h
+++ b/include/asm-i386/acpi.h
@@ -127,6 +127,7 @@ extern int acpi_irq_balance_set(char *str);
 #define acpi_ioapic 0
 static inline void acpi_noirq_set(void) { }
 static inline void acpi_disable_pci(void) { }
+static inline void disable_acpi(void) { }
 #endif  /* !CONFIG_ACPI */
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index 41a44319905f..cc6b1652249a 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -43,6 +43,8 @@ extern void generic_apic_probe(void);
 #define apic_write native_apic_write
 #define apic_write_atomic native_apic_write_atomic
 #define apic_read native_apic_read
+#define setup_boot_clock setup_boot_APIC_clock
+#define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 static __inline fastcall void native_apic_write(unsigned long reg,
@@ -93,9 +95,7 @@ static inline void ack_APIC_irq(void)
        apic_write_around(APIC_EOI, 0);
 }
-extern void (*wait_timer_tick)(void);
+extern int lapic_get_maxlvt(void);
-extern int get_maxlvt(void);
 extern void clear_local_APIC(void);
 extern void connect_bsp_APIC (void);
 extern void disconnect_bsp_APIC (int virt_wire_setup);
@@ -111,14 +111,9 @@ extern void smp_local_timer_interrupt (void);
 extern void setup_boot_APIC_clock (void);
 extern void setup_secondary_APIC_clock (void);
 extern int APIC_init_uniprocessor (void);
-extern void disable_APIC_timer(void);
-extern void enable_APIC_timer(void);
 extern void enable_NMI_through_LVT0 (void * dummy);
-void smp_send_timer_broadcast_ipi(void);
-void switch_APIC_timer_to_ipi(void *cpumask);
-void switch_ipi_to_APIC_timer(void *cpumask);
 #define ARCH_APICTIMER_STOPS_ON_C3      1
 extern int timer_over_8254;
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index 38f1aebbbdb5..c90c7c499302 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -160,7 +160,7 @@ static void __init check_config(void)
 * If we configured ourselves for a TSC, we'd better have one!
 */
 #ifdef CONFIG_X86_TSC
-        if (!cpu_has_tsc)
+        if (!cpu_has_tsc && !tsc_disable)
                panic("Kernel compiled for Pentium+, requires TSC feature!");
 #endif
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index f398cc456448..050831f34f71 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -22,7 +22,7 @@ struct Xgt_desc_struct {
 extern struct Xgt_desc_struct idt_descr;
 DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
+extern struct Xgt_desc_struct early_gdt_descr;
 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
 {
diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h
index 369035dfe4b6..8d33c9bb7c1c 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-i386/elf.h
@@ -90,8 +90,8 @@ typedef struct user_fxsr_struct elf_fpxregset_t;
        pr_reg[6] = regs->eax;                          \
        pr_reg[7] = regs->xds;                          \
        pr_reg[8] = regs->xes;                          \
-        savesegment(fs,pr_reg[9]);                      \
+        pr_reg[9] = regs->xfs;                          \
-        pr_reg[10] = regs->xgs;                         \
+        savesegment(gs,pr_reg[10]);                     \
        pr_reg[11] = regs->orig_eax;                    \
        pr_reg[12] = regs->eip;                         \
        pr_reg[13] = regs->xcs;                         \
diff --git a/include/asm-i386/hpet.h b/include/asm-i386/hpet.h
index e47be9a56cc2..fc03cf9de5c4 100644
--- a/include/asm-i386/hpet.h
+++ b/include/asm-i386/hpet.h
@@ -90,16 +90,19 @@
 #define HPET_MIN_PERIOD (100000UL)
 #define HPET_TICK_RATE  (HZ * 100000UL)
-extern unsigned long hpet_tick;         /* hpet clks count per tick */
 extern unsigned long hpet_address;      /* hpet memory map physical address */
-extern int hpet_use_timer;
+extern int is_hpet_enabled(void);
+#ifdef CONFIG_X86_64
+extern unsigned long hpet_tick; /* hpet clks count per tick */
+extern int hpet_use_timer;
 extern int hpet_rtc_timer_init(void);
 extern int hpet_enable(void);
-extern int hpet_reenable(void);
-extern int is_hpet_enabled(void);
 extern int is_hpet_capable(void);
 extern int hpet_readl(unsigned long a);
+#else
+extern int hpet_enable(void);
+#endif
 #ifdef CONFIG_HPET_EMULATE_RTC
 extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
@@ -110,5 +113,10 @@ extern int hpet_rtc_dropped_irq(void);
 extern int hpet_rtc_timer_init(void);
 extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
 #endif /* CONFIG_HPET_EMULATE_RTC */
+#else
+static inline int hpet_enable(void) { return 0; }
 #endif /* CONFIG_HPET_TIMER */
 #endif /* _I386_HPET_H */
diff --git a/include/asm-i386/i8253.h b/include/asm-i386/i8253.h
index 015d8df07690..6cb0dd4dcdde 100644
--- a/include/asm-i386/i8253.h
+++ b/include/asm-i386/i8253.h
@@ -1,6 +1,21 @@
 #ifndef __ASM_I8253_H__
 #define __ASM_I8253_H__
+#include <linux/clockchips.h>
 extern spinlock_t i8253_lock;
+extern struct clock_event_device *global_clock_event;
+/**
+ * pit_interrupt_hook - hook into timer tick
+ * @regs:       standard registers from interrupt
+ *
+ * Call the global clock event handler.
+ **/
+static inline void pit_interrupt_hook(void)
+{
+        global_clock_event->event_handler(global_clock_event);
+}
 #endif  /* __ASM_I8253_H__ */
diff --git a/include/asm-i386/idle.h b/include/asm-i386/idle.h
new file mode 100644
index 000000000000..87ab93911199
--- /dev/null
+++ b/include/asm-i386/idle.h
@@ -0,0 +1,14 @@
+#ifndef _ASM_I386_IDLE_H
+#define _ASM_I386_IDLE_H 1
+#define IDLE_START 1
+#define IDLE_END 2
+struct notifier_block;
+void idle_notifier_register(struct notifier_block *n);
+void idle_notifier_unregister(struct notifier_block *n);
+void exit_idle(void);
+void enter_idle(void);
+#endif
diff --git a/include/asm-i386/mach-default/do_timer.h b/include/asm-i386/mach-default/do_timer.h
index 7d606e3364ae..56e5689863ae 100644
--- a/include/asm-i386/mach-default/do_timer.h
+++ b/include/asm-i386/mach-default/do_timer.h
@@ -1,86 +1,16 @@
 /* defines for inline arch setup functions */
+#include <linux/clockchips.h>
-#include <asm/apic.h>
 #include <asm/i8259.h>
+#include <asm/i8253.h>
 /**
 * do_timer_interrupt_hook - hook into timer tick
- * @regs:       standard registers from interrupt
 *
- * Description:
+ * Call the pit clock event handler. see asm/i8253.h
- *      This hook is called immediately after the timer interrupt is ack'd.
- *      It's primary purpose is to allow architectures that don't possess
- *      individual per CPU clocks (like the CPU APICs supply) to broadcast the
- *      timer interrupt as a means of triggering reschedules etc.
 **/
 static inline void do_timer_interrupt_hook(void)
 {
-        do_timer(1);
+        pit_interrupt_hook();
-#ifndef CONFIG_SMP
-        update_process_times(user_mode_vm(get_irq_regs()));
-#endif
-/*
- * In the SMP case we use the local APIC timer interrupt to do the
- * profiling, except when we simulate SMP mode on a uniprocessor
- * system, in that case we have to call the local interrupt handler.
- */
-#ifndef CONFIG_X86_LOCAL_APIC
-        profile_tick(CPU_PROFILING);
-#else
-        if (!using_apic_timer)
-                smp_local_timer_interrupt();
-#endif
-}
-/* you can safely undefine this if you don't have the Neptune chipset */
-#define BUGGY_NEPTUN_TIMER
-/**
- * do_timer_overflow - process a detected timer overflow condition
- * @count:      hardware timer interrupt count on overflow
- *
- * Description:
- *      This call is invoked when the jiffies count has not incremented but
- *      the hardware timer interrupt has.  It means that a timer tick interrupt
- *      came along while the previous one was pending, thus a tick was missed
- **/
-static inline int do_timer_overflow(int count)
-{
-        int i;
-        spin_lock(&i8259A_lock);
-        /*
-         * This is tricky when I/O APICs are used;
-         * see do_timer_interrupt().
-         */
-        i = inb(0x20);
-        spin_unlock(&i8259A_lock);
-        
-        /* assumption about timer being IRQ0 */
-        if (i & 0x01) {
-                /*
-                 * We cannot detect lost timer interrupts ... 
-                 * well, that's why we call them lost, don't we? :)
-                 * [hmm, on the Pentium and Alpha we can ... sort of]
-                 */
-                count -= LATCH;
-        } else {
-#ifdef BUGGY_NEPTUN_TIMER
-                /*
-                 * for the Neptun bug we know that the 'latch'
-                 * command doesn't latch the high and low value
-                 * of the counter atomically. Thus we have to 
-                 * substract 256 from the counter 
-                 * ... funny, isnt it? :)
-                 */
-                
-                count -= 256;
-#else
-                printk("do_slow_gettimeoffset(): hardware timer problem?\n");
-#endif
-        }
-        return count;
 }
diff --git a/include/asm-i386/mach-voyager/do_timer.h b/include/asm-i386/mach-voyager/do_timer.h
index 04e69c104a74..60f9dcc15d54 100644
--- a/include/asm-i386/mach-voyager/do_timer.h
+++ b/include/asm-i386/mach-voyager/do_timer.h
@@ -1,25 +1,18 @@
 /* defines for inline arch setup functions */
+#include <linux/clockchips.h>
 #include <asm/voyager.h>
+#include <asm/i8253.h>
+/**
+ * do_timer_interrupt_hook - hook into timer tick
+ * @regs:     standard registers from interrupt
+ *
+ * Call the pit clock event handler. see asm/i8253.h
+ **/
 static inline void do_timer_interrupt_hook(void)
 {
-        do_timer(1);
+        pit_interrupt_hook();
-#ifndef CONFIG_SMP
-        update_process_times(user_mode_vm(irq_regs));
-#endif
        voyager_timer_interrupt();
 }
-static inline int do_timer_overflow(int count)
-{
-        /* can't read the ISR, just assume 1 tick
-           overflow */
-        if(count > LATCH || count < 0) {
-                printk(KERN_ERR "VOYAGER PROBLEM: count is %d, latch is %d\n", count, LATCH);
-                count = LATCH;
-        }
-        count -= LATCH;
-        return count;
-}
diff --git a/include/asm-i386/mce.h b/include/asm-i386/mce.h
index 7cc1a973bf00..b0a02ee34ffd 100644
--- a/include/asm-i386/mce.h
+++ b/include/asm-i386/mce.h
@@ -3,3 +3,5 @@ extern void mcheck_init(struct cpuinfo_x86 *c);
 #else
 #define mcheck_init(c) do {} while(0)
 #endif
+extern int mce_disabled;
diff --git a/include/asm-i386/mmu_context.h b/include/asm-i386/mmu_context.h
index 68ff102d6f5e..e6aa30f8de5b 100644
--- a/include/asm-i386/mmu_context.h
+++ b/include/asm-i386/mmu_context.h
@@ -63,7 +63,7 @@ static inline void switch_mm(struct mm_struct *prev,
 }
 #define deactivate_mm(tsk, mm)                  \
-        asm("movl %0,%%fs": :"r" (0));
+        asm("movl %0,%%gs": :"r" (0));
 #define activate_mm(prev, next) \
        switch_mm((prev),(next),NULL)
diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h
index 770bf6da8c3d..f21349399d14 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-i386/mpspec.h
@@ -23,7 +23,6 @@ extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
 extern int mpc_default_type;
 extern unsigned long mp_lapic_addr;
 extern int pic_mode;
-extern int using_apic_timer;
 #ifdef CONFIG_ACPI
 extern void mp_register_lapic (u8 id, u8 enabled);
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h
index 609a3899475c..6db40d0583f1 100644
--- a/include/asm-i386/msr.h
+++ b/include/asm-i386/msr.h
@@ -307,4 +307,7 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
 #define MSR_CORE_PERF_GLOBAL_CTRL       0x38f
 #define MSR_CORE_PERF_GLOBAL_OVF_CTRL   0x390
+/* Geode defined MSRs */
+#define MSR_GEODE_BUSCONT_CONF0         0x1900
 #endif /* __ASM_MSR_H */
diff --git a/include/asm-i386/paravirt.h b/include/asm-i386/paravirt.h
index 9f06265065f4..6317e0a4d735 100644
--- a/include/asm-i386/paravirt.h
+++ b/include/asm-i386/paravirt.h
@@ -59,90 +59,102 @@ struct paravirt_ops
           convention.  This makes it easier to implement inline
           assembler replacements. */
-        void (fastcall *cpuid)(unsigned int *eax, unsigned int *ebx,
+        void (*cpuid)(unsigned int *eax, unsigned int *ebx,
                      unsigned int *ecx, unsigned int *edx);
-        unsigned long (fastcall *get_debugreg)(int regno);
+        unsigned long (*get_debugreg)(int regno);
-        void (fastcall *set_debugreg)(int regno, unsigned long value);
+        void (*set_debugreg)(int regno, unsigned long value);
-        void (fastcall *clts)(void);
+        void (*clts)(void);
-        unsigned long (fastcall *read_cr0)(void);
+        unsigned long (*read_cr0)(void);
-        void (fastcall *write_cr0)(unsigned long);
+        void (*write_cr0)(unsigned long);
-        unsigned long (fastcall *read_cr2)(void);
+        unsigned long (*read_cr2)(void);
-        void (fastcall *write_cr2)(unsigned long);
+        void (*write_cr2)(unsigned long);
-        unsigned long (fastcall *read_cr3)(void);
+        unsigned long (*read_cr3)(void);
-        void (fastcall *write_cr3)(unsigned long);
+        void (*write_cr3)(unsigned long);
-        unsigned long (fastcall *read_cr4_safe)(void);
+        unsigned long (*read_cr4_safe)(void);
-        unsigned long (fastcall *read_cr4)(void);
+        unsigned long (*read_cr4)(void);
-        void (fastcall *write_cr4)(unsigned long);
+        void (*write_cr4)(unsigned long);
-        unsigned long (fastcall *save_fl)(void);
+        unsigned long (*save_fl)(void);
-        void (fastcall *restore_fl)(unsigned long);
+        void (*restore_fl)(unsigned long);
-        void (fastcall *irq_disable)(void);
+        void (*irq_disable)(void);
-        void (fastcall *irq_enable)(void);
+        void (*irq_enable)(void);
-        void (fastcall *safe_halt)(void);
+        void (*safe_halt)(void);
-        void (fastcall *halt)(void);
+        void (*halt)(void);
-        void (fastcall *wbinvd)(void);
+        void (*wbinvd)(void);
        /* err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
-        u64 (fastcall *read_msr)(unsigned int msr, int *err);
+        u64 (*read_msr)(unsigned int msr, int *err);
-        int (fastcall *write_msr)(unsigned int msr, u64 val);
+        int (*write_msr)(unsigned int msr, u64 val);
-        u64 (fastcall *read_tsc)(void);
+        u64 (*read_tsc)(void);
-        u64 (fastcall *read_pmc)(void);
+        u64 (*read_pmc)(void);
-        void (fastcall *load_tr_desc)(void);
+        void (*load_tr_desc)(void);
-        void (fastcall *load_gdt)(const struct Xgt_desc_struct *);
+        void (*load_gdt)(const struct Xgt_desc_struct *);
-        void (fastcall *load_idt)(const struct Xgt_desc_struct *);
+        void (*load_idt)(const struct Xgt_desc_struct *);
-        void (fastcall *store_gdt)(struct Xgt_desc_struct *);
+        void (*store_gdt)(struct Xgt_desc_struct *);
-        void (fastcall *store_idt)(struct Xgt_desc_struct *);
+        void (*store_idt)(struct Xgt_desc_struct *);
-        void (fastcall *set_ldt)(const void *desc, unsigned entries);
+        void (*set_ldt)(const void *desc, unsigned entries);
-        unsigned long (fastcall *store_tr)(void);
+        unsigned long (*store_tr)(void);
-        void (fastcall *load_tls)(struct thread_struct *t, unsigned int cpu);
+        void (*load_tls)(struct thread_struct *t, unsigned int cpu);
-        void (fastcall *write_ldt_entry)(void *dt, int entrynum,
+        void (*write_ldt_entry)(void *dt, int entrynum,
                                         u32 low, u32 high);
-        void (fastcall *write_gdt_entry)(void *dt, int entrynum,
+        void (*write_gdt_entry)(void *dt, int entrynum,
                                         u32 low, u32 high);
-        void (fastcall *write_idt_entry)(void *dt, int entrynum,
+        void (*write_idt_entry)(void *dt, int entrynum,
                                         u32 low, u32 high);
-        void (fastcall *load_esp0)(struct tss_struct *tss,
+        void (*load_esp0)(struct tss_struct *tss,
                                   struct thread_struct *thread);
-        void (fastcall *set_iopl_mask)(unsigned mask);
+        void (*set_iopl_mask)(unsigned mask);
-        void (fastcall *io_delay)(void);
+        void (*io_delay)(void);
        void (*const_udelay)(unsigned long loops);
 #ifdef CONFIG_X86_LOCAL_APIC
-        void (fastcall *apic_write)(unsigned long reg, unsigned long v);
+        void (*apic_write)(unsigned long reg, unsigned long v);
-        void (fastcall *apic_write_atomic)(unsigned long reg, unsigned long v);
+        void (*apic_write_atomic)(unsigned long reg, unsigned long v);
-        unsigned long (fastcall *apic_read)(unsigned long reg);
+        unsigned long (*apic_read)(unsigned long reg);
+        void (*setup_boot_clock)(void);
+        void (*setup_secondary_clock)(void);
 #endif
-        void (fastcall *flush_tlb_user)(void);
+        void (*flush_tlb_user)(void);
-        void (fastcall *flush_tlb_kernel)(void);
+        void (*flush_tlb_kernel)(void);
-        void (fastcall *flush_tlb_single)(u32 addr);
+        void (*flush_tlb_single)(u32 addr);
-        void (fastcall *set_pte)(pte_t *ptep, pte_t pteval);
+        void (*alloc_pt)(u32 pfn);
-        void (fastcall *set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval);
+        void (*alloc_pd)(u32 pfn);
-        void (fastcall *set_pmd)(pmd_t *pmdp, pmd_t pmdval);
+        void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
-        void (fastcall *pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep);
+        void (*release_pt)(u32 pfn);
-        void (fastcall *pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep);
+        void (*release_pd)(u32 pfn);
+        void (*set_pte)(pte_t *ptep, pte_t pteval);
+        void (*set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval);
+        void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
+        void (*pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep);
+        void (*pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep);
 #ifdef CONFIG_X86_PAE
-        void (fastcall *set_pte_atomic)(pte_t *ptep, pte_t pteval);
+        void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
-        void (fastcall *set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
+        void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
-        void (fastcall *set_pud)(pud_t *pudp, pud_t pudval);
+        void (*set_pud)(pud_t *pudp, pud_t pudval);
-        void (fastcall *pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
+        void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
-        void (fastcall *pmd_clear)(pmd_t *pmdp);
+        void (*pmd_clear)(pmd_t *pmdp);
 #endif
+        void (*set_lazy_mode)(int mode);
        /* These two are jmp to, not actually called. */
-        void (fastcall *irq_enable_sysexit)(void);
+        void (*irq_enable_sysexit)(void);
-        void (fastcall *iret)(void);
+        void (*iret)(void);
+        void (*startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp);
 };
 /* Mark a paravirt probe function. */
@@ -313,13 +325,38 @@ static inline unsigned long apic_read(unsigned long reg)
 {
        return paravirt_ops.apic_read(reg);
 }
+static inline void setup_boot_clock(void)
+{
+        paravirt_ops.setup_boot_clock();
+}
+static inline void setup_secondary_clock(void)
+{
+        paravirt_ops.setup_secondary_clock();
+}
 #endif
+#ifdef CONFIG_SMP
+static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
+                                    unsigned long start_esp)
+{
+        return paravirt_ops.startup_ipi_hook(phys_apicid, start_eip, start_esp);
+}
+#endif
 #define __flush_tlb() paravirt_ops.flush_tlb_user()
 #define __flush_tlb_global() paravirt_ops.flush_tlb_kernel()
 #define __flush_tlb_single(addr) paravirt_ops.flush_tlb_single(addr)
+#define paravirt_alloc_pt(pfn) paravirt_ops.alloc_pt(pfn)
+#define paravirt_release_pt(pfn) paravirt_ops.release_pt(pfn)
+#define paravirt_alloc_pd(pfn) paravirt_ops.alloc_pd(pfn)
+#define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) \
+        paravirt_ops.alloc_pd_clone(pfn, clonepfn, start, count)
+#define paravirt_release_pd(pfn) paravirt_ops.release_pd(pfn)
 static inline void set_pte(pte_t *ptep, pte_t pteval)
 {
        paravirt_ops.set_pte(ptep, pteval);
@@ -372,6 +409,19 @@ static inline void pmd_clear(pmd_t *pmdp)
 }
 #endif
+/* Lazy mode for batching updates / context switch */
+#define PARAVIRT_LAZY_NONE 0
+#define PARAVIRT_LAZY_MMU  1
+#define PARAVIRT_LAZY_CPU  2
+#define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
+#define arch_enter_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_CPU)
+#define arch_leave_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
+#define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
+#define arch_enter_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_MMU)
+#define arch_leave_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
 /* These all sit in the .parainstructions section to tell us what to patch. */
 struct paravirt_patch {
        u8 *instr;              /* original instructions */
diff --git a/include/asm-i386/pda.h b/include/asm-i386/pda.h
index 2ba2736aa109..b12d59a318b7 100644
--- a/include/asm-i386/pda.h
+++ b/include/asm-i386/pda.h
@@ -39,19 +39,19 @@ extern struct i386_pda _proxy_pda;
                if (0) { T__ tmp__; tmp__ = (val); }                    \
                switch (sizeof(_proxy_pda.field)) {                     \
                case 1:                                                 \
-                        asm(op "b %1,%%gs:%c2"                          \
+                        asm(op "b %1,%%fs:%c2"                          \
                            : "+m" (_proxy_pda.field)                   \
                            :"ri" ((T__)val),                           \
                             "i"(pda_offset(field)));                   \
                        break;                                          \
                case 2:                                                 \
-                        asm(op "w %1,%%gs:%c2"                          \
+                        asm(op "w %1,%%fs:%c2"                          \
                            : "+m" (_proxy_pda.field)                   \
                            :"ri" ((T__)val),                           \
                             "i"(pda_offset(field)));                   \
                        break;                                          \
                case 4:                                                 \
-                        asm(op "l %1,%%gs:%c2"                          \
+                        asm(op "l %1,%%fs:%c2"                          \
                            : "+m" (_proxy_pda.field)                   \
                            :"ri" ((T__)val),                           \
                             "i"(pda_offset(field)));                   \
@@ -65,19 +65,19 @@ extern struct i386_pda _proxy_pda;
                typeof(_proxy_pda.field) ret__;                         \
                switch (sizeof(_proxy_pda.field)) {                     \
                case 1:                                                 \
-                        asm(op "b %%gs:%c1,%0"                          \
+                        asm(op "b %%fs:%c1,%0"                          \
                            : "=r" (ret__)                              \
                            : "i" (pda_offset(field)),                  \
                              "m" (_proxy_pda.field));                  \
                        break;                                          \
                case 2:                                                 \
-                        asm(op "w %%gs:%c1,%0"                          \
+                        asm(op "w %%fs:%c1,%0"                          \
                            : "=r" (ret__)                              \
                            : "i" (pda_offset(field)),                  \
                              "m" (_proxy_pda.field));                  \
                        break;                                          \
                case 4:                                                 \
-                        asm(op "l %%gs:%c1,%0"                          \
+                        asm(op "l %%fs:%c1,%0"                          \
                            : "=r" (ret__)                              \
                            : "i" (pda_offset(field)),                  \
                              "m" (_proxy_pda.field));                  \
diff --git a/include/asm-i386/pgalloc.h b/include/asm-i386/pgalloc.h
index 4b1e61359f89..c8dc2d0141a7 100644
--- a/include/asm-i386/pgalloc.h
+++ b/include/asm-i386/pgalloc.h
@@ -5,13 +5,31 @@
 #include <linux/threads.h>
 #include <linux/mm.h>           /* for struct page */
-#define pmd_populate_kernel(mm, pmd, pte) \
+#ifdef CONFIG_PARAVIRT
-                set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
+#include <asm/paravirt.h>
+#else
+#define paravirt_alloc_pt(pfn) do { } while (0)
+#define paravirt_alloc_pd(pfn) do { } while (0)
+#define paravirt_alloc_pd(pfn) do { } while (0)
+#define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) do { } while (0)
+#define paravirt_release_pt(pfn) do { } while (0)
+#define paravirt_release_pd(pfn) do { } while (0)
+#endif
+#define pmd_populate_kernel(mm, pmd, pte)                       \
+do {                                                            \
+        paravirt_alloc_pt(__pa(pte) >> PAGE_SHIFT);             \
+        set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)));           \
+} while (0)
 #define pmd_populate(mm, pmd, pte)                              \
+do {                                                            \
+        paravirt_alloc_pt(page_to_pfn(pte));                    \
        set_pmd(pmd, __pmd(_PAGE_TABLE +                        \
                ((unsigned long long)page_to_pfn(pte) <<        \
-                        (unsigned long long) PAGE_SHIFT)))
+                        (unsigned long long) PAGE_SHIFT)));     \
+} while (0)
 /*
 * Allocate and free page tables.
 */
@@ -32,7 +50,11 @@ static inline void pte_free(struct page *pte)
 }
-#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
+#define __pte_free_tlb(tlb,pte)                                         \
+do {                                                                    \
+        paravirt_release_pt(page_to_pfn(pte));                          \
+        tlb_remove_page((tlb),(pte));                                   \
+} while (0)
 #ifdef CONFIG_X86_PAE
 /*
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 359f10b54f59..edfbe46a5e13 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -257,6 +257,14 @@ static inline void __mwait(unsigned long eax, unsigned long ecx)
                : :"a" (eax), "c" (ecx));
 }
+static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
+{
+        /* "mwait %eax,%ecx;" */
+        asm volatile(
+                "sti; .byte 0x0f,0x01,0xc9;"
+                : :"a" (eax), "c" (ecx));
+}
 extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
 /* from system description table in BIOS.  Mostly for MCA use, but
@@ -424,7 +432,7 @@ struct thread_struct {
        .vm86_info = NULL,                                              \
        .sysenter_cs = __KERNEL_CS,                                     \
        .io_bitmap_ptr = NULL,                                          \
-        .gs = __KERNEL_PDA,                                             \
+        .fs = __KERNEL_PDA,                                             \
 }
 /*
@@ -442,8 +450,8 @@ struct thread_struct {
 }
 #define start_thread(regs, new_eip, new_esp) do {               \
-        __asm__("movl %0,%%fs": :"r" (0));                      \
+        __asm__("movl %0,%%gs": :"r" (0));                      \
-        regs->xgs = 0;                                          \
+        regs->xfs = 0;                                          \
        set_fs(USER_DS);                                        \
        regs->xds = __USER_DS;                                  \
        regs->xes = __USER_DS;                                  \
diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h
index bdbc894339b4..6002597b9e12 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-i386/ptrace.h
@@ -16,8 +16,8 @@ struct pt_regs {
        long eax;
        int  xds;
        int  xes;
-        /* int  xfs; */
+        int  xfs;
-        int  xgs;
+        /* int  xgs; */
        long orig_eax;
        long eip;
        int  xcs;
@@ -49,6 +49,10 @@ static inline int user_mode_vm(struct pt_regs *regs)
 {
        return ((regs->xcs & SEGMENT_RPL_MASK) | (regs->eflags & VM_MASK)) >= USER_RPL;
 }
+static inline int v8086_mode(struct pt_regs *regs)
+{
+        return (regs->eflags & VM_MASK);
+}
 #define instruction_pointer(regs) ((regs)->eip)
 #define regs_return_value(regs) ((regs)->eax)
diff --git a/include/asm-i386/segment.h b/include/asm-i386/segment.h
index 3c796af33776..065f10bfa487 100644
--- a/include/asm-i386/segment.h
+++ b/include/asm-i386/segment.h
@@ -83,14 +83,8 @@
 * The GDT has 32 entries
 */
 #define GDT_ENTRIES 32
 #define GDT_SIZE (GDT_ENTRIES * 8)
-/* Matches __KERNEL_CS and __USER_CS (they must be 2 entries apart) */
-#define SEGMENT_IS_FLAT_CODE(x)  (((x) & 0xec) == GDT_ENTRY_KERNEL_CS * 8)
-/* Matches PNP_CS32 and PNP_CS16 (they must be consecutive) */
-#define SEGMENT_IS_PNP_CODE(x)   (((x) & 0xf4) == GDT_ENTRY_PNPBIOS_BASE * 8)
 /* Simple and small GDT entries for booting only */
 #define GDT_ENTRY_BOOT_CS               2
@@ -134,4 +128,17 @@
 #ifndef CONFIG_PARAVIRT
 #define get_kernel_rpl()  0
 #endif
+/*
+ * Matching rules for certain types of segments.
+ */
+/* Matches only __KERNEL_CS, ignoring PnP / USER / APM segments */
+#define SEGMENT_IS_KERNEL_CODE(x) (((x) & 0xfc) == GDT_ENTRY_KERNEL_CS * 8)
+/* Matches __KERNEL_CS and __USER_CS (they must be 2 entries apart) */
+#define SEGMENT_IS_FLAT_CODE(x)  (((x) & 0xec) == GDT_ENTRY_KERNEL_CS * 8)
+/* Matches PNP_CS32 and PNP_CS16 (they must be consecutive) */
+#define SEGMENT_IS_PNP_CODE(x)   (((x) & 0xf4) == GDT_ENTRY_PNPBIOS_BASE * 8)
 #endif
diff --git a/include/asm-i386/setup.h b/include/asm-i386/setup.h
index 76316275d6f9..0e8077cbfdac 100644
--- a/include/asm-i386/setup.h
+++ b/include/asm-i386/setup.h
@@ -77,6 +77,8 @@ int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map);
 void __init add_memory_region(unsigned long long start,
                              unsigned long long size, int type);
+extern unsigned long init_pg_tables_end;
 #endif /* __ASSEMBLY__ */
 #endif  /*  __KERNEL__  */
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 64fe624c02ca..6bf0033a301c 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -52,6 +52,11 @@ extern void cpu_exit_clear(void);
 extern void cpu_uninit(void);
 #endif
+#ifndef CONFIG_PARAVIRT
+#define startup_ipi_hook(phys_apicid, start_eip, start_esp)             \
+do { } while (0)
+#endif
 /*
 * This function is needed by all SMP systems. It must _always_ be valid
 * from the initial startup. We map APIC_BASE very early in page_setup(),
diff --git a/include/asm-i386/time.h b/include/asm-i386/time.h
index ea8065af825a..571b4294dc2e 100644
--- a/include/asm-i386/time.h
+++ b/include/asm-i386/time.h
@@ -30,6 +30,7 @@ static inline int native_set_wallclock(unsigned long nowtime)
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
+extern unsigned long long native_sched_clock(void);
 #else /* !CONFIG_PARAVIRT */
 #define get_wallclock() native_get_wallclock()
diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h
index d0ebd05f8516..4752c3a6a708 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-i386/timer.h
@@ -8,6 +8,9 @@ void setup_pit_timer(void);
 /* Modifiers for buggy PIT handling */
 extern int pit_latch_buggy;
 extern int timer_ack;
+extern int no_timer_check;
+extern unsigned long long (*custom_sched_clock)(void);
+extern int no_sync_cmos_clock;
 extern int recalibrate_cpu_khz(void);
 #endif
diff --git a/include/asm-i386/tsc.h b/include/asm-i386/tsc.h
index c13933185c1c..e997891cc7cc 100644
--- a/include/asm-i386/tsc.h
+++ b/include/asm-i386/tsc.h
@@ -1,48 +1 @@
-/*
+#include <asm-x86_64/tsc.h>
- * linux/include/asm-i386/tsc.h
- *
- * i386 TSC related functions
- */
-#ifndef _ASM_i386_TSC_H
-#define _ASM_i386_TSC_H
-#include <asm/processor.h>
-/*
- * Standard way to access the cycle counter on i586+ CPUs.
- * Currently only used on SMP.
- *
- * If you really have a SMP machine with i486 chips or older,
- * compile for that, and this will just always return zero.
- * That's ok, it just means that the nicer scheduling heuristics
- * won't work for you.
- *
- * We only use the low 32 bits, and we'd simply better make sure
- * that we reschedule before that wraps. Scheduling at least every
- * four billion cycles just basically sounds like a good idea,
- * regardless of how fast the machine is.
- */
-typedef unsigned long long cycles_t;
-extern unsigned int cpu_khz;
-extern unsigned int tsc_khz;
-static inline cycles_t get_cycles(void)
-{
-        unsigned long long ret = 0;
-#ifndef CONFIG_X86_TSC
-        if (!cpu_has_tsc)
-                return 0;
-#endif
-#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
-        rdtscll(ret);
-#endif
-        return ret;
-}
-extern void tsc_init(void);
-extern void mark_tsc_unstable(void);
-#endif
diff --git a/include/asm-i386/vmi.h b/include/asm-i386/vmi.h
new file mode 100644
index 000000000000..43c89333037e
--- /dev/null
+++ b/include/asm-i386/vmi.h
@@ -0,0 +1,262 @@
+/*
+ * VMI interface definition
+ *
+ * Copyright (C) 2005, VMware, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Maintained by: Zachary Amsden zach@vmware.com
+ *
+ */
+#include <linux/types.h>
+/*
+ *---------------------------------------------------------------------
+ *
+ *  VMI Option ROM API
+ *
+ *---------------------------------------------------------------------
+ */
+#define VMI_SIGNATURE 0x696d5663   /* "cVmi" */
+#define PCI_VENDOR_ID_VMWARE            0x15AD
+#define PCI_DEVICE_ID_VMWARE_VMI        0x0801
+/*
+ * We use two version numbers for compatibility, with the major
+ * number signifying interface breakages, and the minor number
+ * interface extensions.
+ */
+#define VMI_API_REV_MAJOR       3
+#define VMI_API_REV_MINOR       0
+#define VMI_CALL_CPUID                  0
+#define VMI_CALL_WRMSR                  1
+#define VMI_CALL_RDMSR                  2
+#define VMI_CALL_SetGDT                 3
+#define VMI_CALL_SetLDT                 4
+#define VMI_CALL_SetIDT                 5
+#define VMI_CALL_SetTR                  6
+#define VMI_CALL_GetGDT                 7
+#define VMI_CALL_GetLDT                 8
+#define VMI_CALL_GetIDT                 9
+#define VMI_CALL_GetTR                  10
+#define VMI_CALL_WriteGDTEntry          11
+#define VMI_CALL_WriteLDTEntry          12
+#define VMI_CALL_WriteIDTEntry          13
+#define VMI_CALL_UpdateKernelStack      14
+#define VMI_CALL_SetCR0                 15
+#define VMI_CALL_SetCR2                 16
+#define VMI_CALL_SetCR3                 17
+#define VMI_CALL_SetCR4                 18
+#define VMI_CALL_GetCR0                 19
+#define VMI_CALL_GetCR2                 20
+#define VMI_CALL_GetCR3                 21
+#define VMI_CALL_GetCR4                 22
+#define VMI_CALL_WBINVD                 23
+#define VMI_CALL_SetDR                  24
+#define VMI_CALL_GetDR                  25
+#define VMI_CALL_RDPMC                  26
+#define VMI_CALL_RDTSC                  27
+#define VMI_CALL_CLTS                   28
+#define VMI_CALL_EnableInterrupts       29
+#define VMI_CALL_DisableInterrupts      30
+#define VMI_CALL_GetInterruptMask       31
+#define VMI_CALL_SetInterruptMask       32
+#define VMI_CALL_IRET                   33
+#define VMI_CALL_SYSEXIT                34
+#define VMI_CALL_Halt                   35
+#define VMI_CALL_Reboot                 36
+#define VMI_CALL_Shutdown               37
+#define VMI_CALL_SetPxE                 38
+#define VMI_CALL_SetPxELong             39
+#define VMI_CALL_UpdatePxE              40
+#define VMI_CALL_UpdatePxELong          41
+#define VMI_CALL_MachineToPhysical      42
+#define VMI_CALL_PhysicalToMachine      43
+#define VMI_CALL_AllocatePage           44
+#define VMI_CALL_ReleasePage            45
+#define VMI_CALL_InvalPage              46
+#define VMI_CALL_FlushTLB               47
+#define VMI_CALL_SetLinearMapping       48
+#define VMI_CALL_SetIOPLMask            61
+#define VMI_CALL_SetInitialAPState      62
+#define VMI_CALL_APICWrite              63
+#define VMI_CALL_APICRead               64
+#define VMI_CALL_SetLazyMode            73
+/*
+ *---------------------------------------------------------------------
+ *
+ * MMU operation flags
+ *
+ *---------------------------------------------------------------------
+ */
+/* Flags used by VMI_{Allocate|Release}Page call */
+#define VMI_PAGE_PAE             0x10  /* Allocate PAE shadow */
+#define VMI_PAGE_CLONE           0x20  /* Clone from another shadow */
+#define VMI_PAGE_ZEROED          0x40  /* Page is pre-zeroed */
+/* Flags shared by Allocate|Release Page and PTE updates */
+#define VMI_PAGE_PT              0x01
+#define VMI_PAGE_PD              0x02
+#define VMI_PAGE_PDP             0x04
+#define VMI_PAGE_PML4            0x08
+#define VMI_PAGE_NORMAL          0x00 /* for debugging */
+/* Flags used by PTE updates */
+#define VMI_PAGE_CURRENT_AS      0x10 /* implies VMI_PAGE_VA_MASK is valid */
+#define VMI_PAGE_DEFER           0x20 /* may queue update until TLB inval */
+#define VMI_PAGE_VA_MASK         0xfffff000
+#ifdef CONFIG_X86_PAE
+#define VMI_PAGE_L1             (VMI_PAGE_PT | VMI_PAGE_PAE | VMI_PAGE_ZEROED)
+#define VMI_PAGE_L2             (VMI_PAGE_PD | VMI_PAGE_PAE | VMI_PAGE_ZEROED)
+#else
+#define VMI_PAGE_L1             (VMI_PAGE_PT | VMI_PAGE_ZEROED)
+#define VMI_PAGE_L2             (VMI_PAGE_PD | VMI_PAGE_ZEROED)
+#endif
+/* Flags used by VMI_FlushTLB call */
+#define VMI_FLUSH_TLB            0x01
+#define VMI_FLUSH_GLOBAL         0x02
+/*
+ *---------------------------------------------------------------------
+ *
+ *  VMI relocation definitions for ROM call get_reloc
+ *
+ *---------------------------------------------------------------------
+ */
+/* VMI Relocation types */
+#define VMI_RELOCATION_NONE     0
+#define VMI_RELOCATION_CALL_REL 1
+#define VMI_RELOCATION_JUMP_REL 2
+#define VMI_RELOCATION_NOP      3
+#ifndef __ASSEMBLY__
+struct vmi_relocation_info {
+        unsigned char           *eip;
+        unsigned char           type;
+        unsigned char           reserved[3];
+};
+#endif
+/*
+ *---------------------------------------------------------------------
+ *
+ *  Generic ROM structures and definitions
+ *
+ *---------------------------------------------------------------------
+ */
+#ifndef __ASSEMBLY__
+struct vrom_header {
+        u16     rom_signature;  // option ROM signature
+        u8      rom_length;     // ROM length in 512 byte chunks
+        u8      rom_entry[4];   // 16-bit code entry point
+        u8      rom_pad0;       // 4-byte align pad
+        u32     vrom_signature; // VROM identification signature
+        u8      api_version_min;// Minor version of API
+        u8      api_version_maj;// Major version of API
+        u8      jump_slots;     // Number of jump slots
+        u8      reserved1;      // Reserved for expansion
+        u32     virtual_top;    // Hypervisor virtual address start
+        u16     reserved2;      // Reserved for expansion
+        u16     license_offs;   // Offset to License string
+        u16     pci_header_offs;// Offset to PCI OPROM header
+        u16     pnp_header_offs;// Offset to PnP OPROM header
+        u32     rom_pad3;       // PnP reserverd / VMI reserved
+        u8      reserved[96];   // Reserved for headers
+        char    vmi_init[8];    // VMI_Init jump point
+        char    get_reloc[8];   // VMI_GetRelocationInfo jump point
+} __attribute__((packed));
+struct pnp_header {
+        char sig[4];
+        char rev;
+        char size;
+        short next;
+        short res;
+        long devID;
+        unsigned short manufacturer_offset;
+        unsigned short product_offset;
+} __attribute__((packed));
+struct pci_header {
+        char sig[4];
+        short vendorID;
+        short deviceID;
+        short vpdData;
+        short size;
+        char rev;
+        char class;
+        char subclass;
+        char interface;
+        short chunks;
+        char rom_version_min;
+        char rom_version_maj;
+        char codetype;
+        char lastRom;
+        short reserved;
+} __attribute__((packed));
+/* Function prototypes for bootstrapping */
+extern void vmi_init(void);
+extern void vmi_bringup(void);
+extern void vmi_apply_boot_page_allocations(void);
+/* State needed to start an application processor in an SMP system. */
+struct vmi_ap_state {
+        u32 cr0;
+        u32 cr2;
+        u32 cr3;
+        u32 cr4;
+        u64 efer;
+        u32 eip;
+        u32 eflags;
+        u32 eax;
+        u32 ebx;
+        u32 ecx;
+        u32 edx;
+        u32 esp;
+        u32 ebp;
+        u32 esi;
+        u32 edi;
+        u16 cs;
+        u16 ss;
+        u16 ds;
+        u16 es;
+        u16 fs;
+        u16 gs;
+        u16 ldtr;
+        u16 gdtr_limit;
+        u32 gdtr_base;
+        u32 idtr_base;
+        u16 idtr_limit;
+};
+#endif
diff --git a/include/asm-i386/vmi_time.h b/include/asm-i386/vmi_time.h
new file mode 100644
index 000000000000..c12931211007
--- /dev/null
+++ b/include/asm-i386/vmi_time.h
@@ -0,0 +1,103 @@
+/*
+ * VMI Time wrappers
+ *
+ * Copyright (C) 2006, VMware, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Send feedback to dhecht@vmware.com
+ *
+ */
+#ifndef __VMI_TIME_H
+#define __VMI_TIME_H
+/*
+ * Raw VMI call indices for timer functions
+ */
+#define VMI_CALL_GetCycleFrequency      66
+#define VMI_CALL_GetCycleCounter        67
+#define VMI_CALL_SetAlarm               68
+#define VMI_CALL_CancelAlarm            69
+#define VMI_CALL_GetWallclockTime       70
+#define VMI_CALL_WallclockUpdated       71
+/* Cached VMI timer operations */
+extern struct vmi_timer_ops {
+        u64 (*get_cycle_frequency)(void);
+        u64 (*get_cycle_counter)(int);
+        u64 (*get_wallclock)(void);
+        int (*wallclock_updated)(void);
+        void (*set_alarm)(u32 flags, u64 expiry, u64 period);
+        void (*cancel_alarm)(u32 flags);
+} vmi_timer_ops;
+/* Prototypes */
+extern void __init vmi_time_init(void);
+extern unsigned long vmi_get_wallclock(void);
+extern int vmi_set_wallclock(unsigned long now);
+extern unsigned long long vmi_sched_clock(void);
+#ifdef CONFIG_X86_LOCAL_APIC
+extern void __init vmi_timer_setup_boot_alarm(void);
+extern void __init vmi_timer_setup_secondary_alarm(void);
+extern void apic_vmi_timer_interrupt(void);
+#endif
+#ifdef CONFIG_NO_IDLE_HZ
+extern int vmi_stop_hz_timer(void);
+extern void vmi_account_time_restart_hz_timer(void);
+#endif
+/*
+ * When run under a hypervisor, a vcpu is always in one of three states:
+ * running, halted, or ready.  The vcpu is in the 'running' state if it
+ * is executing.  When the vcpu executes the halt interface, the vcpu
+ * enters the 'halted' state and remains halted until there is some work
+ * pending for the vcpu (e.g. an alarm expires, host I/O completes on
+ * behalf of virtual I/O).  At this point, the vcpu enters the 'ready'
+ * state (waiting for the hypervisor to reschedule it).  Finally, at any
+ * time when the vcpu is not in the 'running' state nor the 'halted'
+ * state, it is in the 'ready' state.
+ *
+ * Real time is advances while the vcpu is 'running', 'ready', or
+ * 'halted'.  Stolen time is the time in which the vcpu is in the
+ * 'ready' state.  Available time is the remaining time -- the vcpu is
+ * either 'running' or 'halted'.
+ *
+ * All three views of time are accessible through the VMI cycle
+ * counters.
+ */
+/* The cycle counters. */
+#define VMI_CYCLES_REAL         0
+#define VMI_CYCLES_AVAILABLE    1
+#define VMI_CYCLES_STOLEN       2
+/* The alarm interface 'flags' bits */
+#define VMI_ALARM_COUNTERS      2
+#define VMI_ALARM_COUNTER_MASK  0x000000ff
+#define VMI_ALARM_WIRED_IRQ0    0x00000000
+#define VMI_ALARM_WIRED_LVTT    0x00010000
+#define VMI_ALARM_IS_ONESHOT    0x00000000
+#define VMI_ALARM_IS_PERIODIC   0x00000100
+#define CONFIG_VMI_ALARM_HZ     100
+#endif
diff --git a/include/asm-ia64/kexec.h b/include/asm-ia64/kexec.h
index 01c36b004747..f2ad469a6ddf 100644
--- a/include/asm-ia64/kexec.h
+++ b/include/asm-ia64/kexec.h
@@ -23,7 +23,7 @@
 extern struct kimage *ia64_kimage;
 DECLARE_PER_CPU(u64, ia64_mca_pal_base);
-const extern unsigned int relocate_new_kernel_size;
+extern const unsigned int relocate_new_kernel_size;
 extern void relocate_new_kernel(unsigned long, unsigned long,
                struct ia64_boot_param *, unsigned long);
 static inline void
diff --git a/include/asm-ia64/libata-portmap.h b/include/asm-ia64/libata-portmap.h
new file mode 100644
index 000000000000..0e00c9a9f410
--- /dev/null
+++ b/include/asm-ia64/libata-portmap.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_IA64_LIBATA_PORTMAP_H
+#define __ASM_IA64_LIBATA_PORTMAP_H
+#define ATA_PRIMARY_CMD         0x1F0
+#define ATA_PRIMARY_CTL         0x3F6
+#define ATA_PRIMARY_IRQ(dev)    isa_irq_to_vector(14)
+#define ATA_SECONDARY_CMD       0x170
+#define ATA_SECONDARY_CTL       0x376
+#define ATA_SECONDARY_IRQ(dev)  isa_irq_to_vector(15)
+#endif
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index bc768153f3c9..e43021a99a20 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -32,7 +32,7 @@
 #define PAL_CACHE_FLUSH         1       /* flush i/d cache */
 #define PAL_CACHE_INFO          2       /* get detailed i/d cache info */
 #define PAL_CACHE_INIT          3       /* initialize i/d cache */
-#define PAL_CACHE_SUMMARY       4       /* get summary of cache heirarchy */
+#define PAL_CACHE_SUMMARY       4       /* get summary of cache hierarchy */
 #define PAL_MEM_ATTRIB          5       /* list supported memory attributes */
 #define PAL_PTCE_INFO           6       /* purge TLB info */
 #define PAL_VM_INFO             7       /* return supported virtual memory features */
@@ -113,14 +113,14 @@ typedef s64				pal_status_t;
                                                 */
 #define PAL_STATUS_REQUIRES_MEMORY      (-9)    /* Call requires PAL memory buffer */
-/* Processor cache level in the heirarchy */
+/* Processor cache level in the hierarchy */
 typedef u64                             pal_cache_level_t;
 #define PAL_CACHE_LEVEL_L0              0       /* L0 */
 #define PAL_CACHE_LEVEL_L1              1       /* L1 */
 #define PAL_CACHE_LEVEL_L2              2       /* L2 */
-/* Processor cache type at a particular level in the heirarchy */
+/* Processor cache type at a particular level in the hierarchy */
 typedef u64                             pal_cache_type_t;
 #define PAL_CACHE_TYPE_INSTRUCTION      1       /* Instruction cache */
@@ -272,14 +272,14 @@ typedef struct pal_cache_protection_info_s {
 #define PAL_CACHE_PROT_METHOD_ECC               3       /* ECC protection */
-/* Processor cache line identification in the heirarchy */
+/* Processor cache line identification in the hierarchy */
 typedef union pal_cache_line_id_u {
        u64                     pclid_data;
        struct {
                u64             cache_type      : 8,    /* 7-0 cache type */
                                level           : 8,    /* 15-8 level of the
                                                         * cache in the
-                                                         * heirarchy.
+                                                         * hierarchy.
                                                         */
                                way             : 8,    /* 23-16 way in the set
                                                         */
@@ -292,7 +292,7 @@ typedef union pal_cache_line_id_u {
                u64             cache_type      : 8,    /* 7-0 cache type */
                                level           : 8,    /* 15-8 level of the
                                                         * cache in the
-                                                         * heirarchy.
+                                                         * hierarchy.
                                                         */
                                way             : 8,    /* 23-16 way in the set
                                                         */
@@ -978,7 +978,7 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
        return iprv.status;
 }
-/* Return summary information about the heirarchy of caches controlled by the processor */
+/* Return summary information about the hierarchy of caches controlled by the processor */
 static inline s64
 ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches)
 {
diff --git a/include/asm-mips/abi.h b/include/asm-mips/abi.h
index 1ce0518ace2e..1dd74fbdc09b 100644
--- a/include/asm-mips/abi.h
+++ b/include/asm-mips/abi.h
@@ -13,13 +13,13 @@
 #include <asm/siginfo.h>
 struct mips_abi {
-        void (* const do_signal)(struct pt_regs *regs);
        int (* const setup_frame)(struct k_sigaction * ka,
                                  struct pt_regs *regs, int signr,
                                  sigset_t *set);
        int (* const setup_rt_frame)(struct k_sigaction * ka,
                               struct pt_regs *regs, int signr,
                               sigset_t *set, siginfo_t *info);
+        const unsigned long     restart;
 };
 #endif /* _ASM_ABI_H */
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 06c08228a525..89436b96ad66 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (c) 1994 - 1997, 1999, 2000, 06  Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (c) 1994 - 1997, 99, 2000, 06, 07  Ralf Baechle (ralf@linux-mips.org)
 * Copyright (c) 1999, 2000  Silicon Graphics, Inc.
 */
 #ifndef _ASM_BITOPS_H
@@ -24,11 +24,15 @@
 #define SZLONG_MASK 31UL
 #define __LL            "ll     "
 #define __SC            "sc     "
+#define __INS           "ins    "
+#define __EXT           "ext    "
 #elif (_MIPS_SZLONG == 64)
 #define SZLONG_LOG 6
 #define SZLONG_MASK 63UL
 #define __LL            "lld    "
 #define __SC            "scd    "
+#define __INS           "dins    "
+#define __EXT           "dext    "
 #endif
 /*
@@ -62,6 +66,19 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                "       .set    mips0                                   \n"
                : "=&r" (temp), "=m" (*m)
                : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+#ifdef CONFIG_CPU_MIPSR2
+        } else if (__builtin_constant_p(nr)) {
+                __asm__ __volatile__(
+                "1:     " __LL "%0, %1                  # set_bit       \n"
+                "       " __INS "%0, %4, %2, 1                          \n"
+                "       " __SC "%0, %1                                  \n"
+                "       beqz    %0, 2f                                  \n"
+                "       .subsection 2                                   \n"
+                "2:     b       1b                                      \n"
+                "       .previous                                       \n"
+                : "=&r" (temp), "=m" (*m)
+                : "ir" (nr & SZLONG_MASK), "m" (*m), "r" (~0));
+#endif /* CONFIG_CPU_MIPSR2 */
        } else if (cpu_has_llsc) {
                __asm__ __volatile__(
                "       .set    mips3                                   \n"
@@ -113,6 +130,19 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                "       .set    mips0                                   \n"
                : "=&r" (temp), "=m" (*m)
                : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
+#ifdef CONFIG_CPU_MIPSR2
+        } else if (__builtin_constant_p(nr)) {
+                __asm__ __volatile__(
+                "1:     " __LL "%0, %1                  # clear_bit     \n"
+                "       " __INS "%0, $0, %2, 1                          \n"
+                "       " __SC "%0, %1                                  \n"
+                "       beqz    %0, 2f                                  \n"
+                "       .subsection 2                                   \n"
+                "2:     b       1b                                      \n"
+                "       .previous                                       \n"
+                : "=&r" (temp), "=m" (*m)
+                : "ir" (nr & SZLONG_MASK), "m" (*m));
+#endif /* CONFIG_CPU_MIPSR2 */
        } else if (cpu_has_llsc) {
                __asm__ __volatile__(
                "       .set    mips3                                   \n"
@@ -291,6 +321,26 @@ static inline int test_and_clear_bit(unsigned long nr,
                : "memory");
                return res != 0;
+#ifdef CONFIG_CPU_MIPSR2
+        } else if (__builtin_constant_p(nr)) {
+                unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+                unsigned long temp, res;
+                __asm__ __volatile__(
+                "1:     " __LL  "%0, %1         # test_and_clear_bit    \n"
+                "       " __EXT "%2, %0, %3, 1                          \n"
+                "       " __INS "%0, $0, %3, 1                          \n"
+                "       " __SC  "%0, %1                                 \n"
+                "       beqz    %0, 2f                                  \n"
+                "       .subsection 2                                   \n"
+                "2:     b       1b                                      \n"
+                "       .previous                                       \n"
+                : "=&r" (temp), "=m" (*m), "=&r" (res)
+                : "ri" (nr & SZLONG_MASK), "m" (*m)
+                : "memory");
+                return res;
+#endif
        } else if (cpu_has_llsc) {
                unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                unsigned long temp, res;
diff --git a/include/asm-mips/compat-signal.h b/include/asm-mips/compat-signal.h
index 672077084aa1..6599a901b63e 100644
--- a/include/asm-mips/compat-signal.h
+++ b/include/asm-mips/compat-signal.h
@@ -5,6 +5,11 @@
 #include <linux/compat.h>
 #include <linux/compiler.h>
+#include <asm/signal.h>
+#include <asm/siginfo.h>
+#include <asm/uaccess.h>
 static inline int __copy_conv_sigset_to_user(compat_sigset_t __user *d,
        const sigset_t *s)
 {
@@ -33,9 +38,6 @@ static inline int __copy_conv_sigset_from_user(sigset_t *d,
        BUG_ON(sizeof(*d) != sizeof(*s));
        BUG_ON(_NSIG_WORDS != 2);
-        if (unlikely(!access_ok(VERIFY_READ, d, sizeof(*d))))
-                return -EFAULT;
 #ifdef CONFIG_CPU_BIG_ENDIAN
        err  = __get_user(u->c.sig[1], &s->sig[0]);
        err |= __get_user(u->c.sig[0], &s->sig[1]);
diff --git a/include/asm-mips/ds1216.h b/include/asm-mips/ds1216.h
new file mode 100644
index 000000000000..1ff8b73f7a6a
--- /dev/null
+++ b/include/asm-mips/ds1216.h
@@ -0,0 +1,31 @@
+#ifndef _DS1216_H
+#define _DS1216_H
+extern volatile unsigned char *ds1216_base;
+unsigned long ds1216_get_cmos_time(void);
+int ds1216_set_rtc_mmss(unsigned long nowtime);
+#define DS1216_SEC_BYTE         1
+#define DS1216_MIN_BYTE         2
+#define DS1216_HOUR_BYTE        3
+#define DS1216_HOUR_MASK        (0x1f)
+#define DS1216_AMPM_MASK        (1<<5)
+#define DS1216_1224_MASK        (1<<7)
+#define DS1216_DAY_BYTE         4
+#define DS1216_DAY_MASK         (0x7)
+#define DS1216_DATE_BYTE        5
+#define DS1216_DATE_MASK        (0x3f)
+#define DS1216_MONTH_BYTE       6
+#define DS1216_MONTH_MASK       (0x1f)
+#define DS1216_YEAR_BYTE        7
+#define DS1216_SEC(buf)         (buf[DS1216_SEC_BYTE])
+#define DS1216_MIN(buf)         (buf[DS1216_MIN_BYTE])
+#define DS1216_HOUR(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_HOUR_MASK)
+#define DS1216_AMPM(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_AMPM_MASK)
+#define DS1216_1224(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_1224_MASK)
+#define DS1216_DATE(buf)        (buf[DS1216_DATE_BYTE] & DS1216_DATE_MASK)
+#define DS1216_MONTH(buf)       (buf[DS1216_MONTH_BYTE] & DS1216_MONTH_MASK)
+#define DS1216_YEAR(buf)        (buf[DS1216_YEAR_BYTE])
+#endif
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index b6a2eb816628..92ec2618560c 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -20,6 +20,7 @@
 #include <asm/byteorder.h>
 #include <asm/cpu.h>
 #include <asm/cpu-features.h>
+#include <asm-generic/iomap.h>
 #include <asm/page.h>
 #include <asm/pgtable-bits.h>
 #include <asm/processor.h>
@@ -518,34 +519,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
 }
 /*
- * Memory Mapped I/O
- */
-#define ioread8(addr)           readb(addr)
-#define ioread16(addr)          readw(addr)
-#define ioread32(addr)          readl(addr)
-#define iowrite8(b,addr)        writeb(b,addr)
-#define iowrite16(w,addr)       writew(w,addr)
-#define iowrite32(l,addr)       writel(l,addr)
-#define ioread8_rep(a,b,c)      readsb(a,b,c)
-#define ioread16_rep(a,b,c)     readsw(a,b,c)
-#define ioread32_rep(a,b,c)     readsl(a,b,c)
-#define iowrite8_rep(a,b,c)     writesb(a,b,c)
-#define iowrite16_rep(a,b,c)    writesw(a,b,c)
-#define iowrite32_rep(a,b,c)    writesl(a,b,c)
-/* Create a virtual mapping cookie for an IO port range */
-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
-extern void ioport_unmap(void __iomem *);
-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
-struct pci_dev;
-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
-/*
 * ISA space is 'always mapped' on currently supported MIPS systems, no need
 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h
index 11410ae10d36..7e07283140a3 100644
--- a/include/asm-mips/mach-rm/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h
@@ -21,9 +21,7 @@
 #define cpu_has_watch           0
 #define cpu_has_mips16          0
 #define cpu_has_divec           0
-#define cpu_has_vce             0
 #define cpu_has_cache_cdex_p    1
-#define cpu_has_cache_cdex_s    0
 #define cpu_has_prefetch        0
 #define cpu_has_mcheck          0
 #define cpu_has_ejtag           0
@@ -35,9 +33,6 @@
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
-#define cpu_dcache_line_size()  32
-#define cpu_icache_line_size()  32
 #define cpu_has_mips32r1        0
 #define cpu_has_mips32r2        0
 #define cpu_has_mips64r1        0
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 7f0f120ca07c..3eea3ba0fca5 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -32,6 +32,7 @@ struct pci_controller {
        unsigned long mem_offset;
        struct resource *io_resource;
        unsigned long io_offset;
+        unsigned long io_map_base;
        unsigned int index;
        /* For compatibility with current (as of July 2003) pciutils
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index af121c67dc71..5685d4fc7881 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -130,4 +130,6 @@ static inline void pmd_free(pmd_t *pmd)
 #define check_pgt_cache()       do { } while (0)
+extern void pagetable_init(void);
 #endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index 3c175a7e4345..972947474eb7 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -42,6 +42,7 @@ struct sigcontext {
 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
+#include <linux/posix_types.h>
 /*
 * Keep this struct definition in sync with the sigcontext fragment
 * in arch/mips/tools/offset.c
@@ -53,27 +54,25 @@ struct sigcontext {
 * entries, add sc_dsp and sc_reserved for padding.  No prisoners.
 */
 struct sigcontext {
-        unsigned long   sc_regs[32];
+        __u64   sc_regs[32];
-        unsigned long   sc_fpregs[32];
+        __u64   sc_fpregs[32];
-        unsigned long   sc_mdhi;
+        __u64   sc_mdhi;
-        unsigned long   sc_hi1;
+        __u64   sc_hi1;
-        unsigned long   sc_hi2;
+        __u64   sc_hi2;
-        unsigned long   sc_hi3;
+        __u64   sc_hi3;
-        unsigned long   sc_mdlo;
+        __u64   sc_mdlo;
-        unsigned long   sc_lo1;
+        __u64   sc_lo1;
-        unsigned long   sc_lo2;
+        __u64   sc_lo2;
-        unsigned long   sc_lo3;
+        __u64   sc_lo3;
-        unsigned long   sc_pc;
+        __u64   sc_pc;
-        unsigned int    sc_fpc_csr;
+        __u32   sc_fpc_csr;
-        unsigned int    sc_used_math;
+        __u32   sc_used_math;
-        unsigned int    sc_dsp;
+        __u32   sc_dsp;
-        unsigned int    sc_reserved;
+        __u32   sc_reserved;
 };
 #ifdef __KERNEL__
-#include <linux/posix_types.h>
 struct sigcontext32 {
        __u32           sc_regmask;     /* Unused */
        __u32           sc_status;      /* Unused */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8b391a2f0814..7a28989f7ee3 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -137,23 +137,6 @@ typedef struct sigaltstack {
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
-struct pt_regs;
-extern void do_signal(struct pt_regs *regs);
-extern void do_signal32(struct pt_regs *regs);
-extern int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set);
-extern int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set, siginfo_t *info);
-extern int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set);
-extern int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set, siginfo_t *info);
-extern int setup_rt_frame_n32(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set, siginfo_t *info);
 #endif /* __KERNEL__ */
 #endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index b9ba54d0dd35..62f9be6f7320 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -6,12 +6,72 @@
 * for more details.
 *
 * Copyright (C) 1997, 1998 by Ralf Baechle
+ * Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
 */
 #ifndef __ASM_SNI_H
 #define __ASM_SNI_H
+extern unsigned int sni_brd_type;
+#define SNI_BRD_10                 2
+#define SNI_BRD_10NEW              3
+#define SNI_BRD_TOWER_OASIC        4
+#define SNI_BRD_MINITOWER          5
+#define SNI_BRD_PCI_TOWER          6
+#define SNI_BRD_RM200              7
+#define SNI_BRD_PCI_MTOWER         8
+#define SNI_BRD_PCI_DESKTOP        9
+#define SNI_BRD_PCI_TOWER_CPLUS   10
+#define SNI_BRD_PCI_MTOWER_CPLUS  11
+/* RM400 cpu types */
+#define SNI_CPU_M8021           0x01
+#define SNI_CPU_M8030           0x04
+#define SNI_CPU_M8031           0x06
+#define SNI_CPU_M8034           0x0f
+#define SNI_CPU_M8037           0x07
+#define SNI_CPU_M8040           0x05
+#define SNI_CPU_M8043           0x09
+#define SNI_CPU_M8050           0x0b
+#define SNI_CPU_M8053           0x0d
 #define SNI_PORT_BASE           0xb4000000
+#ifndef __MIPSEL__
+/*
+ * ASIC PCI registers for big endian configuration.
+ */
+#define PCIMT_UCONF             0xbfff0004
+#define PCIMT_IOADTIMEOUT2      0xbfff000c
+#define PCIMT_IOMEMCONF         0xbfff0014
+#define PCIMT_IOMMU             0xbfff001c
+#define PCIMT_IOADTIMEOUT1      0xbfff0024
+#define PCIMT_DMAACCESS         0xbfff002c
+#define PCIMT_DMAHIT            0xbfff0034
+#define PCIMT_ERRSTATUS         0xbfff003c
+#define PCIMT_ERRADDR           0xbfff0044
+#define PCIMT_SYNDROME          0xbfff004c
+#define PCIMT_ITPEND            0xbfff0054
+#define  IT_INT2                0x01
+#define  IT_INTD                0x02
+#define  IT_INTC                0x04
+#define  IT_INTB                0x08
+#define  IT_INTA                0x10
+#define  IT_EISA                0x20
+#define  IT_SCSI                0x40
+#define  IT_ETH                 0x80
+#define PCIMT_IRQSEL            0xbfff005c
+#define PCIMT_TESTMEM           0xbfff0064
+#define PCIMT_ECCREG            0xbfff006c
+#define PCIMT_CONFIG_ADDRESS    0xbfff0074
+#define PCIMT_ASIC_ID           0xbfff007c      /* read */
+#define PCIMT_SOFT_RESET        0xbfff007c      /* write */
+#define PCIMT_PIA_OE            0xbfff0084
+#define PCIMT_PIA_DATAOUT       0xbfff008c
+#define PCIMT_PIA_DATAIN        0xbfff0094
+#define PCIMT_CACHECONF         0xbfff009c
+#define PCIMT_INVSPACE          0xbfff00a4
+#else
 /*
 * ASIC PCI registers for little endian configuration.
 */
@@ -45,6 +105,8 @@
 #define PCIMT_PIA_DATAIN        0xbfff0090
 #define PCIMT_CACHECONF         0xbfff0098
 #define PCIMT_INVSPACE          0xbfff00a0
+#endif
 #define PCIMT_PCI_CONF          0xbfff0100
 /*
@@ -73,6 +135,36 @@
 #define PCIMT_PWDN              0xbfdf0000
 /*
+ * A20R based boards
+ */
+#define A20R_PT_CLOCK_BASE      0xbc040000
+#define A20R_PT_TIM0_ACK        0xbc050000
+#define A20R_PT_TIM1_ACK        0xbc060000
+#define SNI_MIPS_IRQ_CPU_BASE   16
+#define SNI_MIPS_IRQ_CPU_TIMER  (SNI_MIPS_IRQ_CPU_BASE+7)
+#define SNI_A20R_IRQ_BASE       SNI_MIPS_IRQ_CPU_BASE
+#define SNI_A20R_IRQ_TIMER      (SNI_A20R_IRQ_BASE+5)
+#define SNI_DS1216_A20R_BASE    0xbc081ffc
+#define SNI_DS1216_RM200_BASE   0xbcd41ffc
+#define SNI_PCIT_INT_REG        0xbfff000c
+#define SNI_PCIT_INT_START      24
+#define SNI_PCIT_INT_END        30
+#define PCIT_IRQ_ETHERNET       (SNI_MIPS_IRQ_CPU_BASE + 5)
+#define PCIT_IRQ_INTA           (SNI_PCIT_INT_START + 0)
+#define PCIT_IRQ_INTB           (SNI_PCIT_INT_START + 1)
+#define PCIT_IRQ_INTC           (SNI_PCIT_INT_START + 2)
+#define PCIT_IRQ_INTD           (SNI_PCIT_INT_START + 3)
+#define PCIT_IRQ_SCSI0          (SNI_PCIT_INT_START + 4)
+#define PCIT_IRQ_SCSI1          (SNI_PCIT_INT_START + 5)
+/*
 * Interrupt 0-16 are EISA interrupts.  Interrupts from 16 on are assigned
 * to the other interrupts generated by ASIC PCI.
 *
@@ -80,18 +172,22 @@
 * ASIC PCI interrupt.
 */
 #define PCIMT_KEYBOARD_IRQ       1
-#define PCIMT_IRQ_INT2          16
+#define PCIMT_IRQ_INT2          24
-#define PCIMT_IRQ_INTD          17
+#define PCIMT_IRQ_INTD          25
-#define PCIMT_IRQ_INTC          18
+#define PCIMT_IRQ_INTC          26
-#define PCIMT_IRQ_INTB          19
+#define PCIMT_IRQ_INTB          27
-#define PCIMT_IRQ_INTA          20
+#define PCIMT_IRQ_INTA          28
-#define PCIMT_IRQ_EISA          21
+#define PCIMT_IRQ_EISA          29
-#define PCIMT_IRQ_SCSI          22
+#define PCIMT_IRQ_SCSI          30
-#define PCIMT_IRQ_ETHERNET      23
+#define PCIMT_IRQ_ETHERNET      (SNI_MIPS_IRQ_CPU_BASE+6)
+#if 0
 #define PCIMT_IRQ_TEMPERATURE   24
 #define PCIMT_IRQ_EISA_NMI      25
 #define PCIMT_IRQ_POWER_OFF     26
 #define PCIMT_IRQ_BUTTON        27
+#endif
 /*
 * Base address for the mapped 16mb EISA bus segment.
@@ -101,4 +197,24 @@
 /* PCI EISA Interrupt acknowledge  */
 #define PCIMT_INT_ACKNOWLEDGE   0xba000000
+/* board specific init functions */
+extern void sni_a20r_init (void);
+extern void sni_pcit_init (void);
+extern void sni_rm200_init (void);
+extern void sni_pcimt_init (void);
+/* board specific irq init functions */
+extern void sni_a20r_irq_init (void);
+extern void sni_pcit_irq_init (void);
+extern void sni_pcit_cplus_irq_init (void);
+extern void sni_rm200_irq_init (void);
+extern void sni_pcimt_irq_init (void);
+/* timer inits */
+extern void sni_cpu_time_init(void);
+/* common irq stuff */
+extern void (*sni_hwint)(void);
+extern struct irqaction sni_isa_irq;
 #endif /* __ASM_SNI_H */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 3eff8d8fe28a..c62c20e7b5c6 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -435,8 +435,32 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
        __cu_len;                                                       \
 })
-#define __copy_to_user_inatomic __copy_to_user
+#define __copy_to_user_inatomic(to,from,n)                              \
-#define __copy_from_user_inatomic __copy_from_user
+({                                                                      \
+        void __user *__cu_to;                                           \
+        const void *__cu_from;                                          \
+        long __cu_len;                                                  \
+                                                                        \
+        __cu_to = (to);                                                 \
+        __cu_from = (from);                                             \
+        __cu_len = (n);                                                 \
+        __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \
+        __cu_len;                                                       \
+})
+#define __copy_from_user_inatomic(to,from,n)                            \
+({                                                                      \
+        void *__cu_to;                                                  \
+        const void __user *__cu_from;                                   \
+        long __cu_len;                                                  \
+                                                                        \
+        __cu_to = (to);                                                 \
+        __cu_from = (from);                                             \
+        __cu_len = (n);                                                 \
+        __cu_len = __invoke_copy_from_user_inatomic(__cu_to, __cu_from, \
+                                                    __cu_len);          \
+        __cu_len;                                                       \
+})
 /*
 * copy_to_user: - Copy a block of data into user space.
@@ -490,6 +514,29 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
        __cu_len_r;                                                     \
 })
+#define __invoke_copy_from_user_inatomic(to,from,n)                     \
+({                                                                      \
+        register void *__cu_to_r __asm__ ("$4");                        \
+        register const void __user *__cu_from_r __asm__ ("$5");         \
+        register long __cu_len_r __asm__ ("$6");                        \
+                                                                        \
+        __cu_to_r = (to);                                               \
+        __cu_from_r = (from);                                           \
+        __cu_len_r = (n);                                               \
+        __asm__ __volatile__(                                           \
+        ".set\tnoreorder\n\t"                                           \
+        __MODULE_JAL(__copy_user_inatomic)                              \
+        ".set\tnoat\n\t"                                                \
+        __UA_ADDU "\t$1, %1, %2\n\t"                                    \
+        ".set\tat\n\t"                                                  \
+        ".set\treorder"                                                 \
+        : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r)       \
+        :                                                               \
+        : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",         \
+          "memory");                                                    \
+        __cu_len_r;                                                     \
+})
 /*
 * __copy_from_user: - Copy a block of data from user space, with less checking.
 * @to:   Destination address, in kernel space.
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index f038e33e6d48..2ce4b6b7b348 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -165,7 +165,8 @@ static __inline__ int atomic_dec_return(atomic_t *v)
        return t;
 }
-#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
+#define atomic_cmpxchg(v, o, n) \
+        ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
 /**
@@ -413,6 +414,43 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
        return t;
 }
+#define atomic64_cmpxchg(v, o, n) \
+        ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
+#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
+/**
+ * atomic64_add_unless - add unless the number is a given value
+ * @v: pointer of type atomic64_t
+ * @a: the amount to add to v...
+ * @u: ...unless v is equal to u.
+ *
+ * Atomically adds @a to @v, so long as it was not @u.
+ * Returns non-zero if @v was not @u, and zero otherwise.
+ */
+static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
+{
+        long t;
+        __asm__ __volatile__ (
+        LWSYNC_ON_SMP
+"1:     ldarx   %0,0,%1         # atomic_add_unless\n\
+        cmpd    0,%0,%3 \n\
+        beq-    2f \n\
+        add     %0,%2,%0 \n"
+"       stdcx.  %0,0,%1 \n\
+        bne-    1b \n"
+        ISYNC_ON_SMP
+"       subf    %0,%2,%0 \n\
+2:"
+        : "=&r" (t)
+        : "r" (&v->counter), "r" (a), "r" (u)
+        : "cc", "memory");
+        return t != u;
+}
+#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
 #endif /* __powerpc64__ */
 #include <asm-generic/atomic.h>
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index d7a1bc1551c6..05af081222f6 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -26,8 +26,8 @@ typedef struct {} dcr_host_t;
 #define DCR_MAP_OK(host)        (1)
-#define dcr_map(dev, dcr_n, dcr_c)      {}
+#define dcr_map(dev, dcr_n, dcr_c)      ((dcr_host_t){})
-#define dcr_unmap(host, dcr_n, dcr_c)   {}
+#define dcr_unmap(host, dcr_n, dcr_c)   do {} while (0)
 #define dcr_read(host, dcr_n)           mfdcr(dcr_n)
 #define dcr_write(host, dcr_n, value)   mtdcr(dcr_n, value)
diff --git a/include/asm-powerpc/pmi.h b/include/asm-powerpc/pmi.h
new file mode 100644
index 000000000000..cb0f8aa43088
--- /dev/null
+++ b/include/asm-powerpc/pmi.h
@@ -0,0 +1,67 @@
+#ifndef _POWERPC_PMI_H
+#define _POWERPC_PMI_H
+/*
+ * Definitions for talking with PMI device on PowerPC
+ *
+ * PMI (Platform Management Interrupt) is a way to communicate
+ * with the BMC (Baseboard Management Controller) via interrupts.
+ * Unlike IPMI it is bidirectional and has a low latency.
+ *
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
+ *
+ * Author: Christian Krafft <krafft@de.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifdef __KERNEL__
+#include <asm/of_device.h>
+#define PMI_TYPE_FREQ_CHANGE    0x01
+#define PMI_READ_TYPE           0
+#define PMI_READ_DATA0          1
+#define PMI_READ_DATA1          2
+#define PMI_READ_DATA2          3
+#define PMI_WRITE_TYPE          4
+#define PMI_WRITE_DATA0         5
+#define PMI_WRITE_DATA1         6
+#define PMI_WRITE_DATA2         7
+#define PMI_ACK                 0x80
+#define PMI_TIMEOUT             100
+typedef struct {
+        u8      type;
+        u8      data0;
+        u8      data1;
+        u8      data2;
+} pmi_message_t;
+struct pmi_handler {
+        struct list_head node;
+        u8 type;
+        void (*handle_pmi_message) (struct of_device *, pmi_message_t);
+};
+void pmi_register_handler(struct of_device *, struct pmi_handler *);
+void pmi_unregister_handler(struct of_device *, struct pmi_handler *);
+void pmi_send_message(struct of_device *, pmi_message_t);
+#endif /* __KERNEL__ */
+#endif /* _POWERPC_PMI_H */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 0afee17f33b4..020ed015a94b 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -255,6 +255,8 @@ extern void kdump_move_device_tree(void);
 /* CPU OF node matching */
 struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
+/* Get the MAC address */
+extern const void *of_get_mac_address(struct device_node *np);
 /*
 * OF interrupt mapping
diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h
index e5982ad46576..821581a8b643 100644
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -355,13 +355,7 @@ extern struct bus_type ps3_system_bus_type;
 /* vuart routines */
-struct ps3_vuart_stats {
+struct ps3_vuart_port_priv;
-        unsigned long bytes_written;
-        unsigned long bytes_read;
-        unsigned long tx_interrupts;
-        unsigned long rx_interrupts;
-        unsigned long disconnect_interrupts;
-};
 /**
 * struct ps3_vuart_port_device - a device on a vuart port
@@ -370,24 +364,17 @@ struct ps3_vuart_stats {
 struct ps3_vuart_port_device {
        enum ps3_match_id match_id;
        struct device core;
+        struct ps3_vuart_port_priv* priv; /* private driver variables */
-        /* private driver variables */
-        unsigned int port_number;
-        u64 interrupt_mask;
-        struct {
-                spinlock_t lock;
-                struct list_head head;
-        } tx_list;
-        struct {
-                unsigned long bytes_held;
-                spinlock_t lock;
-                struct list_head head;
-        } rx_list;
-        struct ps3_vuart_stats stats;
 };
 int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev);
+/* system manager */
+void ps3_sys_manager_restart(void);
+void ps3_sys_manager_power_off(void);
 struct ps3_prealloc {
    const char *name;
    void *address;
diff --git a/include/asm-powerpc/ucc_slow.h b/include/asm-powerpc/ucc_slow.h
index 1babad99c719..fdaac9d762bb 100644
--- a/include/asm-powerpc/ucc_slow.h
+++ b/include/asm-powerpc/ucc_slow.h
@@ -150,7 +150,7 @@ struct ucc_slow_info {
        int ucc_num;
        enum qe_clock rx_clock;
        enum qe_clock tx_clock;
-        struct ucc_slow *regs;
+        u32 regs;
        int irq;
        u16 uccm_mask;
        int data_mem_part;
@@ -199,9 +199,9 @@ struct ucc_slow_private {
                                   and length for first BD in a frame */
        u32 tx_base_offset;     /* first BD in Tx BD table offset (In MURAM) */
        u32 rx_base_offset;     /* first BD in Rx BD table offset (In MURAM) */
-        u8 *confBd;             /* next BD for confirm after Tx */
+        struct qe_bd *confBd;   /* next BD for confirm after Tx */
-        u8 *tx_bd;              /* next BD for new Tx request */
+        struct qe_bd *tx_bd;    /* next BD for new Tx request */
-        u8 *rx_bd;              /* next BD to collect after Rx */
+        struct qe_bd *rx_bd;    /* next BD to collect after Rx */
        void *p_rx_frame;       /* accumulating receive frame */
        u16 *p_ucce;            /* a pointer to the event register in memory.
                                 */
diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h
index af20c7462485..c17bdbf22067 100644
--- a/include/asm-s390/atomic.h
+++ b/include/asm-s390/atomic.h
@@ -215,6 +215,8 @@ static __inline__ void atomic64_set_mask(unsigned long mask, atomic64_t * v)
               __CSG_LOOP(v, mask, "ogr");
 }
+#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
 static __inline__ long long atomic64_cmpxchg(atomic64_t *v,
                                             long long old, long long new)
 {
diff --git a/include/asm-s390/ipl.h b/include/asm-s390/ipl.h
new file mode 100644
index 000000000000..5650d3d4ae46
--- /dev/null
+++ b/include/asm-s390/ipl.h
@@ -0,0 +1,113 @@
+/*
+ * s390 (re)ipl support
+ *
+ * Copyright IBM Corp. 2007
+ */
+#ifndef _ASM_S390_IPL_H
+#define _ASM_S390_IPL_H
+#include <asm/types.h>
+#define IPL_PARMBLOCK_ORIGIN    0x2000
+#define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \
+                              sizeof(struct ipl_block_fcp))
+#define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \
+                              sizeof(struct ipl_block_ccw))
+#define IPL_MAX_SUPPORTED_VERSION (0)
+#define IPL_PARMBLOCK_START     ((struct ipl_parameter_block *) \
+                                 IPL_PARMBLOCK_ORIGIN)
+#define IPL_PARMBLOCK_SIZE      (IPL_PARMBLOCK_START->hdr.len)
+struct ipl_list_hdr {
+        u32 len;
+        u8  reserved1[3];
+        u8  version;
+        u32 blk0_len;
+        u8  pbt;
+        u8  flags;
+        u16 reserved2;
+} __attribute__((packed));
+struct ipl_block_fcp {
+        u8  reserved1[313-1];
+        u8  opt;
+        u8  reserved2[3];
+        u16 reserved3;
+        u16 devno;
+        u8  reserved4[4];
+        u64 wwpn;
+        u64 lun;
+        u32 bootprog;
+        u8  reserved5[12];
+        u64 br_lba;
+        u32 scp_data_len;
+        u8  reserved6[260];
+        u8  scp_data[];
+} __attribute__((packed));
+struct ipl_block_ccw {
+        u8  load_param[8];
+        u8  reserved1[84];
+        u8  reserved2[2];
+        u16 devno;
+        u8  vm_flags;
+        u8  reserved3[3];
+        u32 vm_parm_len;
+} __attribute__((packed));
+struct ipl_parameter_block {
+        struct ipl_list_hdr hdr;
+        union {
+                struct ipl_block_fcp fcp;
+                struct ipl_block_ccw ccw;
+        } ipl_info;
+} __attribute__((packed));
+/*
+ * IPL validity flags and parameters as detected in head.S
+ */
+extern u32 ipl_flags;
+extern u16 ipl_devno;
+extern void do_reipl(void);
+extern void ipl_save_parameters(void);
+enum {
+        IPL_DEVNO_VALID         = 1,
+        IPL_PARMBLOCK_VALID     = 2,
+        IPL_NSS_VALID           = 4,
+};
+/*
+ * DIAG 308 support
+ */
+enum diag308_subcode  {
+        DIAG308_REL_HSA = 2,
+        DIAG308_IPL     = 3,
+        DIAG308_DUMP    = 4,
+        DIAG308_SET     = 5,
+        DIAG308_STORE   = 6,
+};
+enum diag308_ipl_type {
+        DIAG308_IPL_TYPE_FCP    = 0,
+        DIAG308_IPL_TYPE_CCW    = 2,
+};
+enum diag308_opt {
+        DIAG308_IPL_OPT_IPL     = 0x10,
+        DIAG308_IPL_OPT_DUMP    = 0x20,
+};
+enum diag308_rc {
+        DIAG308_RC_OK   = 1,
+};
+extern int diag308(unsigned long subcode, void *addr);
+#endif /* _ASM_S390_IPL_H */
diff --git a/include/asm-s390/local.h b/include/asm-s390/local.h
index 86745a1b29bb..c11c530f74d0 100644
--- a/include/asm-s390/local.h
+++ b/include/asm-s390/local.h
@@ -1,58 +1 @@
-#ifndef _ASM_LOCAL_H
+#include <asm-generic/local.h>
-#define _ASM_LOCAL_H
-#include <linux/percpu.h>
-#include <asm/atomic.h>
-#ifndef __s390x__
-typedef atomic_t local_t;
-#define LOCAL_INIT(i)   ATOMIC_INIT(i)
-#define local_read(v)   atomic_read(v)
-#define local_set(v,i)  atomic_set(v,i)
-#define local_inc(v)    atomic_inc(v)
-#define local_dec(v)    atomic_dec(v)
-#define local_add(i, v) atomic_add(i, v)
-#define local_sub(i, v) atomic_sub(i, v)
-#else
-typedef atomic64_t local_t;
-#define LOCAL_INIT(i)   ATOMIC64_INIT(i)
-#define local_read(v)   atomic64_read(v)
-#define local_set(v,i)  atomic64_set(v,i)
-#define local_inc(v)    atomic64_inc(v)
-#define local_dec(v)    atomic64_dec(v)
-#define local_add(i, v) atomic64_add(i, v)
-#define local_sub(i, v) atomic64_sub(i, v)
-#endif
-#define __local_inc(v)          ((v)->counter++)
-#define __local_dec(v)          ((v)->counter--)
-#define __local_add(i,v)        ((v)->counter+=(i))
-#define __local_sub(i,v)        ((v)->counter-=(i))
-/*
- * Use these for per-cpu local_t variables: on some archs they are
- * much more efficient than these naive implementations.  Note they take
- * a variable, not an address.
- */
-#define cpu_local_read(v)       local_read(&__get_cpu_var(v))
-#define cpu_local_set(v, i)     local_set(&__get_cpu_var(v), (i))
-#define cpu_local_inc(v)        local_inc(&__get_cpu_var(v))
-#define cpu_local_dec(v)        local_dec(&__get_cpu_var(v))
-#define cpu_local_add(i, v)     local_add((i), &__get_cpu_var(v))
-#define cpu_local_sub(i, v)     local_sub((i), &__get_cpu_var(v))
-#define __cpu_local_inc(v)      __local_inc(&__get_cpu_var(v))
-#define __cpu_local_dec(v)      __local_dec(&__get_cpu_var(v))
-#define __cpu_local_add(i, v)   __local_add((i), &__get_cpu_var(v))
-#define __cpu_local_sub(i, v)   __local_sub((i), &__get_cpu_var(v))
-#endif /* _ASM_LOCAL_H */
diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h
index 4c1b73940351..33b80ced4bc1 100644
--- a/include/asm-s390/processor.h
+++ b/include/asm-s390/processor.h
@@ -36,6 +36,11 @@ typedef struct
        unsigned int unused  : 16;
 } __attribute__ ((packed)) cpuid_t;
+static inline void get_cpu_id(cpuid_t *ptr)
+{
+        asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
+}
 struct cpuinfo_S390
 {
        cpuid_t  cpu_id;
diff --git a/include/asm-s390/sections.h b/include/asm-s390/sections.h
index 1c5a2c4ccdad..fbd9116eb17b 100644
--- a/include/asm-s390/sections.h
+++ b/include/asm-s390/sections.h
@@ -3,6 +3,6 @@
 #include <asm-generic/sections.h>
-extern char _eshared[];
+extern char _eshared[], _ehead[];
 #endif
diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h
index 3388bb52597c..44c7aee2bd34 100644
--- a/include/asm-s390/setup.h
+++ b/include/asm-s390/setup.h
@@ -16,7 +16,6 @@
 #define PARMAREA                0x10400
 #define MEMORY_CHUNKS           16      /* max 0x7fff */
-#define IPL_PARMBLOCK_ORIGIN    0x2000
 #ifndef __ASSEMBLY__
@@ -97,82 +96,9 @@ extern char vmpoff_cmd[];
 #define SET_CONSOLE_3215        do { console_mode = 2; } while (0)
 #define SET_CONSOLE_3270        do { console_mode = 3; } while (0)
-struct ipl_list_hdr {
-        u32 len;
-        u8  reserved1[3];
-        u8  version;
-        u32 blk0_len;
-        u8  pbt;
-        u8  flags;
-        u16 reserved2;
-} __attribute__((packed));
-struct ipl_block_fcp {
-        u8  reserved1[313-1];
-        u8  opt;
-        u8  reserved2[3];
-        u16 reserved3;
-        u16 devno;
-        u8  reserved4[4];
-        u64 wwpn;
-        u64 lun;
-        u32 bootprog;
-        u8  reserved5[12];
-        u64 br_lba;
-        u32 scp_data_len;
-        u8  reserved6[260];
-        u8  scp_data[];
-} __attribute__((packed));
-struct ipl_block_ccw {
-        u8  load_param[8];
-        u8  reserved1[84];
-        u8  reserved2[2];
-        u16 devno;
-        u8  vm_flags;
-        u8  reserved3[3];
-        u32 vm_parm_len;
-} __attribute__((packed));
-struct ipl_parameter_block {
-        struct ipl_list_hdr hdr;
-        union {
-                struct ipl_block_fcp fcp;
-                struct ipl_block_ccw ccw;
-        } ipl_info;
-} __attribute__((packed));
-#define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \
-                              sizeof(struct ipl_block_fcp))
-#define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \
-                              sizeof(struct ipl_block_ccw))
-#define IPL_MAX_SUPPORTED_VERSION (0)
-/*
- * IPL validity flags and parameters as detected in head.S
- */
-extern u32 ipl_flags;
-extern u16 ipl_devno;
-extern void do_reipl(void);
-extern void ipl_save_parameters(void);
-enum {
-        IPL_DEVNO_VALID = 1,
-        IPL_PARMBLOCK_VALID = 2,
-        IPL_NSS_VALID = 4,
-};
 #define NSS_NAME_SIZE   8
 extern char kernel_nss_name[];
-#define IPL_PARMBLOCK_START     ((struct ipl_parameter_block *) \
-                                 IPL_PARMBLOCK_ORIGIN)
-#define IPL_PARMBLOCK_SIZE      (IPL_PARMBLOCK_START->hdr.len)
 #else /* __ASSEMBLY__ */
 #ifndef __s390x__
diff --git a/include/asm-sh/Kbuild b/include/asm-sh/Kbuild
index c68e1680da01..76a8ccf254a5 100644
--- a/include/asm-sh/Kbuild
+++ b/include/asm-sh/Kbuild
@@ -1 +1,3 @@
 include include/asm-generic/Kbuild.asm
+header-y += cpu-features.h
diff --git a/include/asm-sh/bigsur/bigsur.h b/include/asm-sh/bigsur/bigsur.h
deleted file mode 100644
index 427245f93589..000000000000
--- a/include/asm-sh/bigsur/bigsur.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- *
- * Hitachi Big Sur Eval Board support
- *
- * Dustin McIntire (dustin@sensoria.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * Derived from Hitachi SH7751 reference manual
- * 
- */
-#ifndef _ASM_BIGSUR_H_
-#define _ASM_BIGSUR_H_
-#include <asm/irq.h>
-#include <asm/hd64465/hd64465.h>
-/* 7751 Internal IRQ's used by external CPLD controller */
-#define BIGSUR_IRQ_LOW  0
-#define BIGSUR_IRQ_NUM  14         /* External CPLD level 1 IRQs */
-#define BIGSUR_IRQ_HIGH (BIGSUR_IRQ_LOW + BIGSUR_IRQ_NUM)
-#define BIGSUR_2NDLVL_IRQ_LOW   (HD64465_IRQ_BASE+HD64465_IRQ_NUM)  
-#define BIGSUR_2NDLVL_IRQ_NUM   32 /* Level 2 IRQs = 4 regs * 8 bits */
-#define BIGSUR_2NDLVL_IRQ_HIGH  (BIGSUR_2NDLVL_IRQ_LOW + \
-                                 BIGSUR_2NDLVL_IRQ_NUM)
-/* PCI interrupt base number (A_INTA-A_INTD) */
-#define BIGSUR_SH7751_PCI_IRQ_BASE  (BIGSUR_2NDLVL_IRQ_LOW+10)  
-/* CPLD registers and external chip addresses */
-#define BIGSUR_HD64464_ADDR     0xB2000000
-#define BIGSUR_DGDR     0xB1FFFE00
-#define BIGSUR_BIDR     0xB1FFFD00
-#define BIGSUR_CSLR     0xB1FFFC00
-#define BIGSUR_SW1R     0xB1FFFB00
-#define BIGSUR_DBGR     0xB1FFFA00
-#define BIGSUR_BDTR     0xB1FFF900
-#define BIGSUR_BDRR     0xB1FFF800
-#define BIGSUR_PPR1     0xB1FFF700
-#define BIGSUR_PPR2     0xB1FFF600
-#define BIGSUR_IDE2     0xB1FFF500
-#define BIGSUR_IDE3     0xB1FFF400
-#define BIGSUR_SPCR     0xB1FFF300
-#define BIGSUR_ETHR     0xB1FE0000
-#define BIGSUR_PPDR     0xB1FDFF00
-#define BIGSUR_ICTL     0xB1FDFE00
-#define BIGSUR_ICMD     0xB1FDFD00
-#define BIGSUR_DMA0     0xB1FDFC00
-#define BIGSUR_DMA1     0xB1FDFB00
-#define BIGSUR_IRQ0     0xB1FDFA00
-#define BIGSUR_IRQ1     0xB1FDF900
-#define BIGSUR_IRQ2     0xB1FDF800
-#define BIGSUR_IRQ3     0xB1FDF700
-#define BIGSUR_IMR0     0xB1FDF600
-#define BIGSUR_IMR1     0xB1FDF500
-#define BIGSUR_IMR2     0xB1FDF400
-#define BIGSUR_IMR3     0xB1FDF300
-#define BIGSUR_IRLMR0   0xB1FDF200
-#define BIGSUR_IRLMR1   0xB1FDF100
-#define BIGSUR_V320USC_ADDR  0xB1000000
-#define BIGSUR_HD64465_ADDR  0xB0000000
-#define BIGSUR_INTERNAL_BASE 0xB0000000
-/* SMC ethernet card parameters */
-#define BIGSUR_ETHER_IOPORT             0x220
-/* IDE register paramters */
-#define BIGSUR_IDECMD_IOPORT    0x1f0
-#define BIGSUR_IDECTL_IOPORT    0x1f8
-/* LED bit position in BIGSUR_CSLR */
-#define BIGSUR_LED  (1<<4)
-/* PCI: default LOCAL memory window sizes (seen from PCI bus) */
-#define BIGSUR_LSR0_SIZE    (64*(1<<20)) //64MB
-#define BIGSUR_LSR1_SIZE    (64*(1<<20)) //64MB
-#endif /* _ASM_BIGSUR_H_ */
diff --git a/include/asm-sh/bigsur/io.h b/include/asm-sh/bigsur/io.h
deleted file mode 100644
index 1470ac8d4a39..000000000000
--- a/include/asm-sh/bigsur/io.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * include/asm-sh/bigsur/io.h
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- * Derived from io_hd64465.h, which bore the message:
- * By Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc. 
- * and from io_hd64461.h, which bore the message:
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * IO functions for a Hitachi Big Sur Evaluation Board.
- */
-#ifndef _ASM_SH_IO_BIGSUR_H
-#define _ASM_SH_IO_BIGSUR_H
-#include <linux/types.h>
-extern unsigned long bigsur_isa_port2addr(unsigned long offset);
-extern int bigsur_irq_demux(int irq);
-/* Provision for generic secondary demux step -- used by PCMCIA code */
-extern void bigsur_register_irq_demux(int irq,
-                int (*demux)(int irq, void *dev), void *dev);
-extern void bigsur_unregister_irq_demux(int irq);
-/* Set this variable to 1 to see port traffic */
-extern int bigsur_io_debug;
-/* Map a range of ports to a range of kernel virtual memory. */
-extern void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift);
-extern void bigsur_port_unmap(u32 baseport, u32 nports);
-#endif /* _ASM_SH_IO_BIGSUR_H */
diff --git a/include/asm-sh/bigsur/serial.h b/include/asm-sh/bigsur/serial.h
deleted file mode 100644
index a08fa82fe45a..000000000000
--- a/include/asm-sh/bigsur/serial.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * include/asm-sh/bigsur/serial.h
- *
- * Configuration details for Big Sur 16550 based serial ports 
- * i.e. HD64465, PCMCIA, etc.
- */
-#ifndef _ASM_SERIAL_BIGSUR_H
-#define _ASM_SERIAL_BIGSUR_H
-#include <asm/hd64465.h>
-#define BASE_BAUD (3379200 / 16)
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define SERIAL_PORT_DFNS                   \
-        /* UART CLK   PORT IRQ     FLAGS        */                      \
-        { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ 
-/* XXX: This should be moved ino irq.h */
-#define irq_cannonicalize(x) (x)
-#endif /* _ASM_SERIAL_BIGSUR_H */
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index a294997a8412..5a117ec43c77 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -19,9 +19,9 @@ static void __init check_bugs(void)
        extern unsigned long loops_per_jiffy;
        char *p = &init_utsname()->machine[2]; /* "sh" */
-        cpu_data->loops_per_jiffy = loops_per_jiffy;
+        current_cpu_data.loops_per_jiffy = loops_per_jiffy;
-        switch (cpu_data->type) {
+        switch (current_cpu_data.type) {
        case CPU_SH7604 ... CPU_SH7619:
                *p++ = '2';
                break;
@@ -54,7 +54,7 @@ static void __init check_bugs(void)
                break;
        }
-        printk("CPU: %s\n", get_cpu_subtype());
+        printk("CPU: %s\n", get_cpu_subtype(&current_cpu_data));
 #ifndef __LITTLE_ENDIAN__
        /* 'eb' means 'Endian Big' */
diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h
index 07f62ec9ff0c..22f12634975b 100644
--- a/include/asm-sh/cacheflush.h
+++ b/include/asm-sh/cacheflush.h
@@ -30,5 +30,8 @@ extern void __flush_invalidate_region(void *start, int size);
 #define HAVE_ARCH_UNMAPPED_AREA
+/* Page flag for lazy dcache write-back for the aliasing UP caches */
+#define PG_dcache_dirty PG_arch_1
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_CACHEFLUSH_H */
diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h
index f70d8ef76a15..6fabbba228de 100644
--- a/include/asm-sh/cpu-sh3/cacheflush.h
+++ b/include/asm-sh/cpu-sh3/cacheflush.h
@@ -36,8 +36,6 @@
 /* 32KB cache, 4kb PAGE sizes need to check bit 12 */
 #define CACHE_ALIAS 0x00001000
-#define PG_mapped       PG_arch_1
 void flush_cache_all(void);
 void flush_cache_mm(struct mm_struct *mm);
 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h
index b01a10f31225..b3746a936a09 100644
--- a/include/asm-sh/cpu-sh4/cacheflush.h
+++ b/include/asm-sh/cpu-sh4/cacheflush.h
@@ -17,6 +17,7 @@
 *  so we need them.
 */
 void flush_cache_all(void);
+void flush_dcache_all(void);
 void flush_cache_mm(struct mm_struct *mm);
 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
 void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
@@ -38,16 +39,4 @@ void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
 /* Initialization of P3 area for copy_user_page */
 void p3_cache_init(void);
-#define PG_mapped       PG_arch_1
-#ifdef CONFIG_MMU
-extern int remap_area_pages(unsigned long addr, unsigned long phys_addr,
-                            unsigned long size, unsigned long flags);
-#else /* CONFIG_MMU */
-static inline int remap_area_pages(unsigned long addr, unsigned long phys_addr,
-                                   unsigned long size, unsigned long flags)
-{
-        return 0;
-}
-#endif /* CONFIG_MMU */
 #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h
index 3e4b3e6d80c0..c135e9cebd9c 100644
--- a/include/asm-sh/cpu-sh4/dma.h
+++ b/include/asm-sh/cpu-sh4/dma.h
@@ -3,6 +3,17 @@
 #define DMAOR_INIT      ( 0x8000 | DMAOR_DME )
+/* SH7751/7760/7780 DMA IRQ sources */
+#define DMTE0_IRQ       34
+#define DMTE1_IRQ       35
+#define DMTE2_IRQ       36
+#define DMTE3_IRQ       37
+#define DMTE4_IRQ       44
+#define DMTE5_IRQ       45
+#define DMTE6_IRQ       46
+#define DMTE7_IRQ       47
+#define DMAE_IRQ        38
 #ifdef CONFIG_CPU_SH4A
 #define SH_DMAC_BASE    0xfc808020
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index 8d0867b98e05..d3bc7818bbbe 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -53,6 +53,10 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
        consistent_free(vaddr, size);
 }
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_is_consistent(d, h) (1)
 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                                  enum dma_data_direction dir)
 {
diff --git a/include/asm-sh/ec3104/ec3104.h b/include/asm-sh/ec3104/ec3104.h
deleted file mode 100644
index 639cfa489c8f..000000000000
--- a/include/asm-sh/ec3104/ec3104.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#ifndef __ASM_EC3104_H
-#define __ASM_EC3104_H
-/*
- * Most of the register set is at 0xb0ec0000 - 0xb0ecffff.
- *
- * as far as I've figured it out the register map is:
- * 0xb0ec0000 - id string
- * 0xb0ec0XXX - power management
- * 0xb0ec1XXX - interrupt control
- * 0xb0ec3XXX - ps2 port (touch pad on aero 8000)
- * 0xb0ec6XXX - i2c
- * 0xb0ec7000 - first serial port (proprietary connector on aero 8000)
- * 0xb0ec8000 - second serial port
- * 0xb0ec9000 - third serial port
- * 0xb0eca000 - fourth serial port (keyboard controller on aero 8000)
- * 0xb0eccXXX - GPIO
- * 0xb0ecdXXX - GPIO
- */
-#define EC3104_BASE     0xb0ec0000
-#define EC3104_SER4_DATA        (EC3104_BASE+0xa000)
-#define EC3104_SER4_IIR         (EC3104_BASE+0xa008)
-#define EC3104_SER4_MCR         (EC3104_BASE+0xa010)
-#define EC3104_SER4_LSR         (EC3104_BASE+0xa014)
-#define EC3104_SER4_MSR         (EC3104_BASE+0xa018)
-/*
- * our ISA bus.  this seems to be real ISA.
- */
-#define EC3104_ISA_BASE 0xa5000000
-#define EC3104_IRQ      11
-#define EC3104_IRQBASE  64
-#define EC3104_IRQ_SER1 EC3104_IRQBASE + 7
-#define EC3104_IRQ_SER2 EC3104_IRQBASE + 8
-#define EC3104_IRQ_SER3 EC3104_IRQBASE + 9
-#define EC3104_IRQ_SER4 EC3104_IRQBASE + 10
-#endif /* __ASM_EC3104_H */
diff --git a/include/asm-sh/ec3104/io.h b/include/asm-sh/ec3104/io.h
deleted file mode 100644
index ea5c8e65ac11..000000000000
--- a/include/asm-sh/ec3104/io.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _ASM_SH_IO_EC3104_H
-#define _ASM_SH_IO_EC3104_H
-#include <linux/types.h>
-extern unsigned char ec3104_inb(unsigned long port);
-extern unsigned short ec3104_inw(unsigned long port);
-extern unsigned long ec3104_inl(unsigned long port);
-extern void ec3104_outb(unsigned char value, unsigned long port);
-extern void ec3104_outw(unsigned short value, unsigned long port);
-extern void ec3104_outl(unsigned long value, unsigned long port);
-extern int ec3104_irq_demux(int irq);
-#endif /* _ASM_SH_IO_EC3104_H */
diff --git a/include/asm-sh/ec3104/keyboard.h b/include/asm-sh/ec3104/keyboard.h
deleted file mode 100644
index c1253a683197..000000000000
--- a/include/asm-sh/ec3104/keyboard.h
+++ /dev/null
@@ -1,15 +0,0 @@
-extern unsigned char ec3104_kbd_sysrq_xlate[];
-extern int ec3104_kbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int ec3104_kbd_getkeycode(unsigned int scancode);
-extern int ec3104_kbd_translate(unsigned char, unsigned char *, char);
-extern char ec3104_kbd_unexpected_up(unsigned char);
-extern void ec3104_kbd_leds(unsigned char);
-extern void ec3104_kbd_init_hw(void);
-#define kbd_sysrq_xlate ec3104_kbd_sysrq_xlate
-#define kbd_setkeycode ec3104_kbd_setkeycode
-#define kbd_getkeycode ec3104_kbd_getkeycode
-#define kbd_translate ec3104_kbd_translate
-#define kbd_unexpected_up ec3104_kbd_unexpected_up
-#define kbd_leds ec3104_kbd_leds
-#define kbd_init_hw ec3104_kbd_init_hw
diff --git a/include/asm-sh/ec3104/serial.h b/include/asm-sh/ec3104/serial.h
deleted file mode 100644
index cfe4d78ec1ee..000000000000
--- a/include/asm-sh/ec3104/serial.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#include <asm/ec3104.h>
-/* Naturally we don't know the exact value but 115200 baud has a divisor
- * of 9 and 19200 baud has a divisor of 52, so this seems like a good
- * guess.  */
-#define BASE_BAUD (16800000 / 16)
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-/* there is a fourth serial port with the expected values as well, but
- * it's got the keyboard controller behind it so we can't really use it
- * (without moving the keyboard driver to userspace, which doesn't sound
- * like a very good idea) */
-#define SERIAL_PORT_DFNS                        \
-        /* UART CLK   PORT IRQ     FLAGS        */                      \
-        { 0, BASE_BAUD, 0x11C00, EC3104_IRQBASE+7, STD_COM_FLAGS }, /* ttyS0 */ \
-        { 0, BASE_BAUD, 0x12000, EC3104_IRQBASE+8, STD_COM_FLAGS }, /* ttyS1 */ \
-        { 0, BASE_BAUD, 0x12400, EC3104_IRQBASE+9, STD_COM_FLAGS }, /* ttyS2 */
-/* XXX: This should be moved ino irq.h */
-#define irq_cannonicalize(x) (x)
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index bff965ef4b95..8ccf7ae593ef 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -66,12 +66,8 @@
 /* 3. OFFCHIP_NR_IRQS */
 #if defined(CONFIG_HD64461)
 # define OFFCHIP_NR_IRQS 18
-#elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */
-# define OFFCHIP_NR_IRQS 48
 #elif defined(CONFIG_HD64465)
 # define OFFCHIP_NR_IRQS 16
-#elif defined (CONFIG_SH_EC3104)
-# define OFFCHIP_NR_IRQS 16
 #elif defined (CONFIG_SH_DREAMCAST)
 # define OFFCHIP_NR_IRQS 96
 #elif defined (CONFIG_SH_TITAN)
diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h
index 7b26f53fe343..0095c665d272 100644
--- a/include/asm-sh/kgdb.h
+++ b/include/asm-sh/kgdb.h
@@ -85,10 +85,10 @@ extern int     setjmp(jmp_buf __jmpb);
 #define KGDB_PRINTK(...) printk("KGDB: " __VA_ARGS__)
 /* Forced breakpoint */
-#define BREAKPOINT() do {                                     \
+#define BREAKPOINT()                                    \
-  if (kgdb_enabled) {                                         \
+do {                                                    \
-    asm volatile("trapa   #0xff");                            \
+        if (kgdb_enabled)                               \
-  }                                                           \
+                __asm__ __volatile__("trapa   #0x3c");  \
 } while (0)
 /* KGDB should be able to flush all kernel text space */
diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h
index cf47df79bb94..eb0358c097d0 100644
--- a/include/asm-sh/mmu.h
+++ b/include/asm-sh/mmu.h
@@ -1,25 +1,19 @@
 #ifndef __MMU_H
 #define __MMU_H
-#if !defined(CONFIG_MMU)
+/* Default "unsigned long" context */
+typedef unsigned long mm_context_id_t[NR_CPUS];
 typedef struct {
+#ifdef CONFIG_MMU
+        mm_context_id_t         id;
+        void                    *vdso;
+#else
        struct vm_list_struct   *vmlist;
        unsigned long           end_brk;
+#endif
 } mm_context_t;
-#else
-/* Default "unsigned long" context */
-typedef unsigned long mm_context_id_t;
-typedef struct {
-        mm_context_id_t id;
-        void *vdso;
-} mm_context_t;
-#endif /* CONFIG_MMU */
 /*
 * Privileged Space Mapping Buffer (PMB) definitions
 */
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index 46f04e23bd45..342024425b7d 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 1999 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
 *
 * ASID handling idea taken from MIPS implementation.
 */
@@ -19,11 +19,6 @@
 *    (b) ASID (Address Space IDentifier)
 */
-/*
- * Cache of MMU context last used.
- */
-extern unsigned long mmu_context_cache;
 #define MMU_CONTEXT_ASID_MASK           0x000000ff
 #define MMU_CONTEXT_VERSION_MASK        0xffffff00
 #define MMU_CONTEXT_FIRST_VERSION       0x00000100
@@ -32,6 +27,11 @@ extern unsigned long mmu_context_cache;
 /* ASID is 8-bit value, so it can't be 0x100 */
 #define MMU_NO_ASID                     0x100
+#define cpu_context(cpu, mm)    ((mm)->context.id[cpu])
+#define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & \
+                                 MMU_CONTEXT_ASID_MASK)
+#define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
 /*
 * Virtual Page Number mask
 */
@@ -41,18 +41,17 @@ extern unsigned long mmu_context_cache;
 /*
 * Get MMU context if needed.
 */
-static inline void get_mmu_context(struct mm_struct *mm)
+static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
 {
-        unsigned long mc = mmu_context_cache;
+        unsigned long asid = asid_cache(cpu);
        /* Check if we have old version of context. */
-        if (((mm->context.id ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
+        if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0)
                /* It's up to date, do nothing */
                return;
        /* It's old, we need to get new context with new version. */
-        mc = ++mmu_context_cache;
+        if (!(++asid & MMU_CONTEXT_ASID_MASK)) {
-        if (!(mc & MMU_CONTEXT_ASID_MASK)) {
                /*
                 * We exhaust ASID of this version.
                 * Flush all TLB and start new cycle.
@@ -63,10 +62,11 @@ static inline void get_mmu_context(struct mm_struct *mm)
                 * Fix version; Note that we avoid version #0
                 * to distingush NO_CONTEXT.
                 */
-                if (!mc)
+                if (!asid)
-                        mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
+                        asid = MMU_CONTEXT_FIRST_VERSION;
        }
-        mm->context.id = mc;
+        cpu_context(cpu, mm) = asid_cache(cpu) = asid;
 }
 /*
@@ -74,9 +74,13 @@ static inline void get_mmu_context(struct mm_struct *mm)
 * instance.
 */
 static inline int init_new_context(struct task_struct *tsk,
-                                       struct mm_struct *mm)
+                                   struct mm_struct *mm)
 {
-        mm->context.id = NO_CONTEXT;
+        int i;
+        for (i = 0; i < num_online_cpus(); i++)
+                cpu_context(i, mm) = NO_CONTEXT;
        return 0;
 }
@@ -117,10 +121,10 @@ static inline unsigned long get_asid(void)
 * After we have set current->mm to a new value, this activates
 * the context for the new mm so we see the new mappings.
 */
-static inline void activate_context(struct mm_struct *mm)
+static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
 {
-        get_mmu_context(mm);
+        get_mmu_context(mm, cpu);
-        set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK);
+        set_asid(cpu_asid(cpu, mm));
 }
 /* MMU_TTB is used for optimizing the fault handling. */
@@ -138,10 +142,15 @@ static inline void switch_mm(struct mm_struct *prev,
                             struct mm_struct *next,
                             struct task_struct *tsk)
 {
+        unsigned int cpu = smp_processor_id();
        if (likely(prev != next)) {
+                cpu_set(cpu, next->cpu_vm_mask);
                set_TTB(next->pgd);
-                activate_context(next);
+                activate_context(next, cpu);
-        }
+        } else
+                if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
+                        activate_context(next, cpu);
 }
 #define deactivate_mm(tsk,mm)   do { } while (0)
@@ -159,7 +168,7 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 #define destroy_context(mm)             do { } while (0)
 #define set_asid(asid)                  do { } while (0)
 #define get_asid()                      (0)
-#define activate_context(mm)            do { } while (0)
+#define activate_context(mm,cpu)        do { } while (0)
 #define switch_mm(prev,next,tsk)        do { } while (0)
 #define deactivate_mm(tsk,mm)           do { } while (0)
 #define activate_mm(prev,next)          do { } while (0)
@@ -174,14 +183,16 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 */
 static inline void enable_mmu(void)
 {
+        unsigned int cpu = smp_processor_id();
        /* Enable MMU */
        ctrl_outl(MMU_CONTROL_INIT, MMUCR);
        ctrl_barrier();
-        if (mmu_context_cache == NO_CONTEXT)
+        if (asid_cache(cpu) == NO_CONTEXT)
-                mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
+                asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION;
-        set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
+        set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK);
 }
 static inline void disable_mmu(void)
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 380fd62dd05a..ac4b4677f28c 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -13,6 +13,8 @@
   [ P4 control   ]             0xE0000000
 */
+#ifdef __KERNEL__
 /* PAGE_SHIFT determines the page size */
 #if defined(CONFIG_PAGE_SIZE_4KB)
 # define PAGE_SHIFT     12
@@ -51,7 +53,6 @@
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT-PAGE_SHIFT)
 #endif
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 extern void (*clear_page)(void *to);
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 036ca2843866..9214c015fe14 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -43,17 +43,17 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 /* PGD bits */
 #define PGDIR_SHIFT     (PTE_SHIFT + PTE_BITS)
 #define PGDIR_BITS      (32 - PGDIR_SHIFT)
-#define PGDIR_SIZE      (1 << PGDIR_SHIFT)
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 /* Entries per level */
-#define PTRS_PER_PTE    (PAGE_SIZE / 4)
+#define PTRS_PER_PTE    (PAGE_SIZE / (1 << PTE_MAGNITUDE))
 #define PTRS_PER_PGD    (PAGE_SIZE / 4)
 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
 #define FIRST_USER_ADDRESS      0
-#define PTE_PHYS_MASK   0x1ffff000
+#define PTE_PHYS_MASK           (0x20000000 - PAGE_SIZE)
 /*
 * First 1MB map is used by fixed purpose.
@@ -583,11 +583,6 @@ struct mm_struct;
 extern unsigned int kobjsize(const void *objp);
 #endif /* !CONFIG_MMU */
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
-#endif
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 extern void paging_init(void);
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index e29f2abb92de..3e46a7afe764 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -27,8 +27,6 @@
 #define CCN_CVR         0xff000040
 #define CCN_PRR         0xff000044
-const char *get_cpu_subtype(void);
 /*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *
@@ -66,6 +64,7 @@ enum cpu_type {
 struct sh_cpuinfo {
        unsigned int type;
        unsigned long loops_per_jiffy;
+        unsigned long asid_cache;
        struct cache_info icache;       /* Primary I-cache */
        struct cache_info dcache;       /* Primary D-cache */
@@ -288,5 +287,8 @@ extern int vsyscall_init(void);
 #define vsyscall_init() do { } while (0)
 #endif
+/* arch/sh/kernel/setup.c */
+const char *get_cpu_subtype(struct sh_cpuinfo *c);
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_PROCESSOR_H */
diff --git a/include/asm-sh/rts7751r2d.h b/include/asm-sh/rts7751r2d.h
index 796b8fcb81a8..10565ac7966a 100644
--- a/include/asm-sh/rts7751r2d.h
+++ b/include/asm-sh/rts7751r2d.h
@@ -68,6 +68,10 @@
 #define IRQ_PCISLOT2    10              /* PCI Slot #2 IRQ */
 #define IRQ_EXTENTION   11              /* EXTn IRQ */
+/* arch/sh/boards/renesas/rts7751r2d/irq.c */
+void init_rts7751r2d_IRQ(void);
+int rts7751r2d_irq_demux(int);
 #define __IO_PREFIX rts7751r2d
 #include <asm/io_generic.h>
diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h
index 8734590d27e8..21f6d330f189 100644
--- a/include/asm-sh/serial.h
+++ b/include/asm-sh/serial.h
@@ -9,11 +9,6 @@
 #include <linux/kernel.h>
-#ifdef CONFIG_SH_EC3104
-#include <asm/serial-ec3104.h>
-#elif defined (CONFIG_SH_BIGSUR)
-#include <asm/serial-bigsur.h>
-#else
 /*
 * This assumes you have a 1.8432 MHz clock for your UART.
 *
@@ -34,12 +29,8 @@
 #else
-#define SERIAL_PORT_DFNS                        \
+#define SERIAL_PORT_DFNS
-        /* UART CLK   PORT IRQ     FLAGS        */                      \
-        { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },      /* ttyS0 */     \
-        { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }       /* ttyS1 */
 #endif
-#endif
 #endif /* _ASM_SERIAL_H */
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 879f741105db..279e70a77c75 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -32,12 +32,20 @@ struct thread_info {
 #define PREEMPT_ACTIVE          0x10000000
-#ifdef CONFIG_4KSTACKS
+#if defined(CONFIG_4KSTACKS)
-#define THREAD_SIZE             (PAGE_SIZE)
+#define THREAD_SIZE_ORDER       (0)
+#elif defined(CONFIG_PAGE_SIZE_4KB)
+#define THREAD_SIZE_ORDER       (1)
+#elif defined(CONFIG_PAGE_SIZE_8KB)
+#define THREAD_SIZE_ORDER       (1)
+#elif defined(CONFIG_PAGE_SIZE_64KB)
+#define THREAD_SIZE_ORDER       (0)
 #else
-#define THREAD_SIZE             (PAGE_SIZE * 2)
+#error "Unknown thread size"
 #endif
-#define STACK_WARN              (THREAD_SIZE / 8)
+#define THREAD_SIZE     (PAGE_SIZE << THREAD_SIZE_ORDER)
+#define STACK_WARN      (THREAD_SIZE >> 3)
 /*
 * macros/functions for gaining access to the thread information structure
diff --git a/include/asm-sh/tlbflush.h b/include/asm-sh/tlbflush.h
index 28c073b0fbab..455fb8da441e 100644
--- a/include/asm-sh/tlbflush.h
+++ b/include/asm-sh/tlbflush.h
@@ -4,7 +4,6 @@
 /*
 * TLB flushing:
 *
- *  - flush_tlb() flushes the current mm struct TLBs
 *  - flush_tlb_all() flushes all processes TLBs
 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
 *  - flush_tlb_page(vma, vmaddr) flushes one page
@@ -12,20 +11,45 @@
 *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
 *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
 */
+extern void local_flush_tlb_all(void);
+extern void local_flush_tlb_mm(struct mm_struct *mm);
+extern void local_flush_tlb_range(struct vm_area_struct *vma,
+                                  unsigned long start,
+                                  unsigned long end);
+extern void local_flush_tlb_page(struct vm_area_struct *vma,
+                                 unsigned long page);
+extern void local_flush_tlb_kernel_range(unsigned long start,
+                                         unsigned long end);
+extern void local_flush_tlb_one(unsigned long asid, unsigned long page);
+#ifdef CONFIG_SMP
-extern void flush_tlb(void);
 extern void flush_tlb_all(void);
 extern void flush_tlb_mm(struct mm_struct *mm);
 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
                            unsigned long end);
 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
-extern void __flush_tlb_page(unsigned long asid, unsigned long page);
+extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+extern void flush_tlb_one(unsigned long asid, unsigned long page);
+#else
+#define flush_tlb_all()                 local_flush_tlb_all()
+#define flush_tlb_mm(mm)                local_flush_tlb_mm(mm)
+#define flush_tlb_page(vma, page)       local_flush_tlb_page(vma, page)
+#define flush_tlb_one(asid, page)       local_flush_tlb_one(asid, page)
+#define flush_tlb_range(vma, start, end)        \
+        local_flush_tlb_range(vma, start, end)
+#define flush_tlb_kernel_range(start, end)      \
+        local_flush_tlb_kernel_range(start, end)
+#endif /* CONFIG_SMP */
 static inline void flush_tlb_pgtables(struct mm_struct *mm,
                                      unsigned long start, unsigned long end)
-{ /* Nothing to do */
+{
+        /* Nothing to do */
 }
-extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
 #endif /* __ASM_SH_TLBFLUSH_H */
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 694f51f47941..ae9bbdeefbe1 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -17,7 +17,7 @@
 /* User Break Controller */
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
    defined(CONFIG_CPU_SUBTYPE_SH7300)
-#define UBC_TYPE_SH7729 (cpu_data->type == CPU_SH7729)
+#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
 #else
 #define UBC_TYPE_SH7729 0
 #endif
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index f982073dc6c6..17f527bfd455 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -292,22 +292,22 @@
 #define __NR_mq_getsetattr      (__NR_mq_open+5)
 #define __NR_kexec_load         283
 #define __NR_waitid             284
-/* #define __NR_sys_setaltroot  285 */
+#define __NR_add_key            285
-#define __NR_add_key            286
+#define __NR_request_key        286
-#define __NR_request_key        287
+#define __NR_keyctl             287
-#define __NR_keyctl             288
+#define __NR_ioprio_set         288
-#define __NR_ioprio_set         289
+#define __NR_ioprio_get         289
-#define __NR_ioprio_get         290
+#define __NR_inotify_init       290
-#define __NR_inotify_init       291
+#define __NR_inotify_add_watch  291
-#define __NR_inotify_add_watch  292
+#define __NR_inotify_rm_watch   292
-#define __NR_inotify_rm_watch   293
+/* 293 is unused */
 #define __NR_migrate_pages      294
 #define __NR_openat             295
 #define __NR_mkdirat            296
 #define __NR_mknodat            297
 #define __NR_fchownat           298
 #define __NR_futimesat          299
-#define __NR_newfstatat         300
+#define __NR_fstatat64          300
 #define __NR_unlinkat           301
 #define __NR_renameat           302
 #define __NR_linkat             303
diff --git a/include/asm-sh/voyagergx.h b/include/asm-sh/voyagergx.h
index 99b0807d1c9f..64c936b22715 100644
--- a/include/asm-sh/voyagergx.h
+++ b/include/asm-sh/voyagergx.h
@@ -308,6 +308,9 @@
 #define AC97C_READ                      (1 << 19)
 #define AC97C_WD_BIT                    (1 << 2)
 #define AC97C_INDEX_MASK                0x7f
-/* -------------------------------------------------------------------- */
+/* arch/sh/cchips/voyagergx/consistent.c */
+void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
+int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
 #endif /* _VOYAGER_GX_REG_H */
diff --git a/include/asm-x86_64/bitops.h b/include/asm-x86_64/bitops.h
index 8da9609070f4..d4dbbe5f7bd9 100644
--- a/include/asm-x86_64/bitops.h
+++ b/include/asm-x86_64/bitops.h
@@ -7,7 +7,7 @@
 #include <asm/alternative.h>
-#if __GNUC__ < 4 || __GNUC_MINOR__ < 1
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
 /* Technically wrong, but this avoids compilation errors on some gcc
   versions. */
 #define ADDR "=m" (*(volatile long *) addr)
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h
index 49dbab09ef2b..d2af227f06d0 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86_64/dma-mapping.h
@@ -66,6 +66,9 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 extern void *dma_alloc_coherent(struct device *dev, size_t size,
                                dma_addr_t *dma_handle, gfp_t gfp);
 extern void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
diff --git a/include/asm-x86_64/e820.h b/include/asm-x86_64/e820.h
index fa2086774105..6216fa3f2802 100644
--- a/include/asm-x86_64/e820.h
+++ b/include/asm-x86_64/e820.h
@@ -46,6 +46,7 @@ extern void e820_mark_nosave_regions(void);
 extern void e820_print_map(char *who);
 extern int e820_any_mapped(unsigned long start, unsigned long end, unsigned type);
 extern int e820_all_mapped(unsigned long start, unsigned long end, unsigned type);
+extern unsigned long e820_hole_size(unsigned long start, unsigned long end);
 extern void e820_setup_gap(void);
 extern void e820_register_active_regions(int nid,
@@ -56,6 +57,7 @@ extern void finish_e820_parsing(void);
 extern struct e820map e820;
 extern unsigned ebda_addr, ebda_size;
+extern unsigned long nodemap_addr, nodemap_size;
 #endif/*!__ASSEMBLY__*/
 #endif/*__E820_HEADER*/
diff --git a/include/asm-x86_64/hpet.h b/include/asm-x86_64/hpet.h
index b39098408b69..59a66f084611 100644
--- a/include/asm-x86_64/hpet.h
+++ b/include/asm-x86_64/hpet.h
@@ -56,8 +56,15 @@
 extern int is_hpet_enabled(void);
 extern int hpet_rtc_timer_init(void);
 extern int apic_is_clustered_box(void);
+extern int hpet_arch_init(void);
+extern int hpet_timer_stop_set_go(unsigned long tick);
+extern int hpet_reenable(void);
+extern unsigned int hpet_calibrate_tsc(void);
 extern int hpet_use_timer;
+extern unsigned long hpet_address;
+extern unsigned long hpet_period;
+extern unsigned long hpet_tick;
 #ifdef CONFIG_HPET_EMULATE_RTC
 extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h
index 179cce755aa7..552df5f10a6d 100644
--- a/include/asm-x86_64/hw_irq.h
+++ b/include/asm-x86_64/hw_irq.h
@@ -91,7 +91,7 @@ extern void enable_8259A_irq(unsigned int irq);
 extern int i8259A_irq_pending(unsigned int irq);
 extern void make_8259A_irq(unsigned int irq);
 extern void init_8259A(int aeoi);
-extern void FASTCALL(send_IPI_self(int vector));
+extern void send_IPI_self(int vector);
 extern void init_VISWS_APIC_irqs(void);
 extern void setup_IO_APIC(void);
 extern void disable_IO_APIC(void);
diff --git a/include/asm-x86_64/io.h b/include/asm-x86_64/io.h
index f5d84bb7c948..de2cd9a2303a 100644
--- a/include/asm-x86_64/io.h
+++ b/include/asm-x86_64/io.h
@@ -100,7 +100,7 @@ __OUTS(l)
 #define IO_SPACE_LIMIT 0xffff
-#if defined(__KERNEL__) && __x86_64__
+#if defined(__KERNEL__) && defined(__x86_64__)
 #include <linux/vmalloc.h>
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h
index 561ecbfd4cb5..f4fb238c89f1 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86_64/io_apic.h
@@ -85,18 +85,8 @@ struct IO_APIC_route_entry {
                mask            :  1,   /* 0: enabled, 1: disabled */
                __reserved_2    : 15;
-        union {         struct { __u32
+        __u32   __reserved_3    : 24,
-                                        __reserved_1    : 24,
+                dest            :  8;
-                                        physical_dest   :  4,
-                                        __reserved_2    :  4;
-                        } physical;
-                        struct { __u32
-                                        __reserved_1    : 24,
-                                        logical_dest    :  8;
-                        } logical;
-        } dest;
 } __attribute__ ((packed));
 /*
diff --git a/include/asm-x86_64/mce.h b/include/asm-x86_64/mce.h
index 5a11146d6d9c..177e92b4019b 100644
--- a/include/asm-x86_64/mce.h
+++ b/include/asm-x86_64/mce.h
@@ -103,6 +103,8 @@ void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
 extern atomic_t mce_entry;
+extern void do_machine_check(struct pt_regs *, long);
 #endif
 #endif
diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86_64/mmzone.h
index c38ebdf6f426..fb558fb1d211 100644
--- a/include/asm-x86_64/mmzone.h
+++ b/include/asm-x86_64/mmzone.h
@@ -11,24 +11,25 @@
 #include <asm/smp.h>
-/* Should really switch to dynamic allocation at some point */
-#define NODEMAPSIZE 0x4fff
 /* Simple perfect hash to map physical addresses to node numbers */
 struct memnode {
        int shift;
-        u8 map[NODEMAPSIZE];
+        unsigned int mapsize;
-} ____cacheline_aligned;
+        u8 *map;
+        u8 embedded_map[64-16];
+} ____cacheline_aligned; /* total size = 64 bytes */
 extern struct memnode memnode;
 #define memnode_shift memnode.shift
 #define memnodemap memnode.map
+#define memnodemapsize memnode.mapsize
 extern struct pglist_data *node_data[];
 static inline __attribute__((pure)) int phys_to_nid(unsigned long addr) 
 { 
        unsigned nid; 
-        VIRTUAL_BUG_ON((addr >> memnode_shift) >= NODEMAPSIZE);
+        VIRTUAL_BUG_ON(!memnodemap);
+        VIRTUAL_BUG_ON((addr >> memnode_shift) >= memnodemapsize);
        nid = memnodemap[addr >> memnode_shift]; 
        VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]); 
        return nid; 
@@ -46,5 +47,10 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
 extern int pfn_valid(unsigned long pfn);
 #endif
+#ifdef CONFIG_NUMA_EMU
+#define FAKE_NODE_MIN_SIZE      (64*1024*1024)
+#define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1ul))
+#endif
 #endif
 #endif
diff --git a/include/asm-x86_64/mutex.h b/include/asm-x86_64/mutex.h
index 16396b1de3e4..6c2949a3c677 100644
--- a/include/asm-x86_64/mutex.h
+++ b/include/asm-x86_64/mutex.h
@@ -21,7 +21,7 @@ do {									\
        unsigned long dummy;                                            \
                                                                        \
        typecheck(atomic_t *, v);                                       \
-        typecheck_fn(fastcall void (*)(atomic_t *), fail_fn);           \
+        typecheck_fn(void (*)(atomic_t *), fail_fn);                    \
                                                                        \
        __asm__ __volatile__(                                           \
                LOCK_PREFIX "   decl (%%rdi)    \n"                     \
@@ -47,7 +47,7 @@ do {									\
 */
 static inline int
 __mutex_fastpath_lock_retval(atomic_t *count,
-                             int fastcall (*fail_fn)(atomic_t *))
+                             int (*fail_fn)(atomic_t *))
 {
        if (unlikely(atomic_dec_return(count) < 0))
                return fail_fn(count);
@@ -67,7 +67,7 @@ do {									\
        unsigned long dummy;                                            \
                                                                        \
        typecheck(atomic_t *, v);                                       \
-        typecheck_fn(fastcall void (*)(atomic_t *), fail_fn);           \
+        typecheck_fn(void (*)(atomic_t *), fail_fn);                    \
                                                                        \
        __asm__ __volatile__(                                           \
                LOCK_PREFIX "   incl (%%rdi)    \n"                     \
diff --git a/include/asm-x86_64/pgalloc.h b/include/asm-x86_64/pgalloc.h
index 43d4c333a8b1..4e28b6060a5e 100644
--- a/include/asm-x86_64/pgalloc.h
+++ b/include/asm-x86_64/pgalloc.h
@@ -18,11 +18,6 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *p
        set_pmd(pmd, __pmd(_PAGE_TABLE | (page_to_pfn(pte) << PAGE_SHIFT)));
 }
-static inline pmd_t *get_pmd(void)
-{
-        return (pmd_t *)get_zeroed_page(GFP_KERNEL);
-}
 static inline void pmd_free(pmd_t *pmd)
 {
        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 59901c690a0d..730bd6028416 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -359,15 +359,6 @@ static inline int pmd_large(pmd_t pte) {
 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 #define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
 
-/* physical address -> PTE */
-static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
-{ 
-        pte_t pte;
-        pte_val(pte) = physpage | pgprot_val(pgprot); 
-        pte_val(pte) &= __supported_pte_mask;
-        return pte; 
-}
- 
 /* Change flags of a PTE */
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 { 
diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h
index a6d2ff5c69b7..f54f3abf93ce 100644
--- a/include/asm-x86_64/proto.h
+++ b/include/asm-x86_64/proto.h
@@ -45,11 +45,7 @@ extern u32 pmtmr_ioport;
 #else
 #define pmtmr_ioport 0
 #endif
-extern unsigned long long monotonic_base;
-extern int sysctl_vsyscall;
 extern int nohpet;
-extern unsigned long vxtime_hz;
-extern void time_init_gtod(void);
 extern void early_printk(const char *fmt, ...) __attribute__((format(printf,1,2)));
@@ -91,8 +87,6 @@ extern void check_efer(void);
 extern int unhandled_signal(struct task_struct *tsk, int sig);
-extern int unsynchronized_tsc(void);
 extern void select_idle_routine(const struct cpuinfo_x86 *c);
 extern unsigned long table_start, table_end;
diff --git a/include/asm-x86_64/timex.h b/include/asm-x86_64/timex.h
index b9e5320b7625..8c6808a3fba4 100644
--- a/include/asm-x86_64/timex.h
+++ b/include/asm-x86_64/timex.h
@@ -12,38 +12,21 @@
 #include <asm/hpet.h>
 #include <asm/system.h>
 #include <asm/processor.h>
+#include <asm/tsc.h>
 #include <linux/compiler.h>
 #define CLOCK_TICK_RATE PIT_TICK_RATE   /* Underlying HZ */
-typedef unsigned long long cycles_t;
-static inline cycles_t get_cycles (void)
-{
-        unsigned long long ret;
-        rdtscll(ret);
-        return ret;
-}
-/* Like get_cycles, but make sure the CPU is synchronized. */
-static __always_inline cycles_t get_cycles_sync(void)
-{
-        unsigned long long ret;
-        unsigned eax;
-        /* Don't do an additional sync on CPUs where we know
-           RDTSC is already synchronous. */
-        alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
-                          "=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
-        rdtscll(ret);
-        return ret;
-}
-extern unsigned int cpu_khz;
 extern int read_current_timer(unsigned long *timer_value);
 #define ARCH_HAS_READ_CURRENT_TIMER     1
-extern struct vxtime_data vxtime;
+#define USEC_PER_TICK (USEC_PER_SEC / HZ)
+#define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
+#define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
+#define NS_SCALE        10 /* 2^10, carefully chosen */
+#define US_SCALE        32 /* 2^32, arbitralrily chosen */
+extern void mark_tsc_unstable(void);
+extern void set_cyc2ns_scale(unsigned long khz);
 #endif
diff --git a/include/asm-x86_64/tsc.h b/include/asm-x86_64/tsc.h
new file mode 100644
index 000000000000..9a0a368852c7
--- /dev/null
+++ b/include/asm-x86_64/tsc.h
@@ -0,0 +1,66 @@
+/*
+ * linux/include/asm-x86_64/tsc.h
+ *
+ * x86_64 TSC related functions
+ */
+#ifndef _ASM_x86_64_TSC_H
+#define _ASM_x86_64_TSC_H
+#include <asm/processor.h>
+/*
+ * Standard way to access the cycle counter.
+ */
+typedef unsigned long long cycles_t;
+extern unsigned int cpu_khz;
+extern unsigned int tsc_khz;
+static inline cycles_t get_cycles(void)
+{
+        unsigned long long ret = 0;
+#ifndef CONFIG_X86_TSC
+        if (!cpu_has_tsc)
+                return 0;
+#endif
+#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
+        rdtscll(ret);
+#endif
+        return ret;
+}
+/* Like get_cycles, but make sure the CPU is synchronized. */
+static __always_inline cycles_t get_cycles_sync(void)
+{
+        unsigned long long ret;
+#ifdef X86_FEATURE_SYNC_RDTSC
+        unsigned eax;
+        /*
+         * Don't do an additional sync on CPUs where we know
+         * RDTSC is already synchronous:
+         */
+        alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
+                          "=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
+#else
+        sync_core();
+#endif
+        rdtscll(ret);
+        return ret;
+}
+extern void tsc_init(void);
+extern void mark_tsc_unstable(void);
+extern int unsynchronized_tsc(void);
+/*
+ * Boot-time check whether the TSCs are synchronized across
+ * all CPUs/cores:
+ */
+extern void check_tsc_sync_source(int cpu);
+extern void check_tsc_sync_target(void);
+#endif
diff --git a/include/asm-x86_64/uaccess.h b/include/asm-x86_64/uaccess.h
index 8079e29c14fd..1981f70fcad1 100644
--- a/include/asm-x86_64/uaccess.h
+++ b/include/asm-x86_64/uaccess.h
@@ -367,4 +367,18 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size)
        return copy_user_generic((__force void *)dst, src, size);
 }
+#define ARCH_HAS_NOCACHE_UACCESS 1
+extern long __copy_user_nocache(void *dst, const void __user *src, unsigned size, int zerorest);
+static inline int __copy_from_user_nocache(void *dst, const void __user *src, unsigned size)
+{
+        might_sleep();
+        return __copy_user_nocache(dst, (__force void *)src, size, 1);
+}
+static inline int __copy_from_user_inatomic_nocache(void *dst, const void __user *src, unsigned size)
+{
+        return __copy_user_nocache(dst, (__force void *)src, size, 0);
+}
 #endif /* __X86_64_UACCESS_H */
diff --git a/include/asm-x86_64/vsyscall.h b/include/asm-x86_64/vsyscall.h
index 05cb8dd200de..82b4afe65c91 100644
--- a/include/asm-x86_64/vsyscall.h
+++ b/include/asm-x86_64/vsyscall.h
@@ -16,51 +16,27 @@ enum vsyscall_num {
 #ifdef __KERNEL__
 #include <linux/seqlock.h>
-#define __section_vxtime __attribute__ ((unused, __section__ (".vxtime"), aligned(16)))
 #define __section_vgetcpu_mode __attribute__ ((unused, __section__ (".vgetcpu_mode"), aligned(16)))
 #define __section_jiffies __attribute__ ((unused, __section__ (".jiffies"), aligned(16)))
-#define __section_sys_tz __attribute__ ((unused, __section__ (".sys_tz"), aligned(16)))
-#define __section_sysctl_vsyscall __attribute__ ((unused, __section__ (".sysctl_vsyscall"), aligned(16)))
-#define __section_xtime __attribute__ ((unused, __section__ (".xtime"), aligned(16)))
-#define __section_xtime_lock __attribute__ ((unused, __section__ (".xtime_lock"), aligned(16)))
-#define VXTIME_TSC      1
+/* Definitions for CONFIG_GENERIC_TIME definitions */
-#define VXTIME_HPET     2
+#define __section_vsyscall_gtod_data __attribute__ \
-#define VXTIME_PMTMR    3
+        ((unused, __section__ (".vsyscall_gtod_data"),aligned(16)))
+#define __vsyscall_fn __attribute__ ((unused,__section__(".vsyscall_fn")))
 #define VGETCPU_RDTSCP  1
 #define VGETCPU_LSL     2
-struct vxtime_data {
-        long hpet_address;      /* HPET base address */
-        int last;
-        unsigned long last_tsc;
-        long quot;
-        long tsc_quot;
-        int mode;
-};
 #define hpet_readl(a)           readl((const void __iomem *)fix_to_virt(FIX_HPET_BASE) + a)
 #define hpet_writel(d,a)        writel(d, (void __iomem *)fix_to_virt(FIX_HPET_BASE) + a)
-/* vsyscall space (readonly) */
-extern struct vxtime_data __vxtime;
 extern int __vgetcpu_mode;
-extern struct timespec __xtime;
 extern volatile unsigned long __jiffies;
-extern struct timezone __sys_tz;
-extern seqlock_t __xtime_lock;
 /* kernel space (writeable) */
-extern struct vxtime_data vxtime;
 extern int vgetcpu_mode;
 extern struct timezone sys_tz;
-extern int sysctl_vsyscall;
+extern struct vsyscall_gtod_data_t vsyscall_gtod_data;
-extern seqlock_t xtime_lock;
-extern int sysctl_vsyscall;
-#define ARCH_HAVE_XTIME_LOCK 1
 #endif /* __KERNEL__ */
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 815f1fb4ce21..8bcfaa4c66ae 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -75,7 +75,7 @@ enum acpi_address_range_id {
 typedef int (*acpi_table_handler) (struct acpi_table_header *table);
-typedef int (*acpi_madt_entry_handler) (struct acpi_subtable_header *header, const unsigned long end);
+typedef int (*acpi_table_entry_handler) (struct acpi_subtable_header *header, const unsigned long end);
 char * __acpi_map_table (unsigned long phys_addr, unsigned long size);
 unsigned long acpi_find_rsdp (void);
@@ -85,8 +85,10 @@ int acpi_numa_init (void);
 int acpi_table_init (void);
 int acpi_table_parse (char *id, acpi_table_handler handler);
-int acpi_table_parse_madt (enum acpi_madt_type id, acpi_madt_entry_handler handler, unsigned int max_entries);
+int __init acpi_table_parse_entries(char *id, unsigned long table_size,
-int acpi_table_parse_srat (enum acpi_srat_type id, acpi_madt_entry_handler handler, unsigned int max_entries);
+        int entry_id, acpi_table_entry_handler handler, unsigned int max_entries);
+int acpi_table_parse_madt (enum acpi_madt_type id, acpi_table_entry_handler handler, unsigned int max_entries);
+int acpi_table_parse_srat (enum acpi_srat_type id, acpi_table_entry_handler handler, unsigned int max_entries);
 int acpi_parse_mcfg (struct acpi_table_header *header);
 void acpi_table_print_madt_entry (struct acpi_subtable_header *madt);
 void acpi_table_print_srat_entry (struct acpi_subtable_header *srat);
diff --git a/include/linux/acpi_pmtmr.h b/include/linux/acpi_pmtmr.h
new file mode 100644
index 000000000000..1d0ef1ae8036
--- /dev/null
+++ b/include/linux/acpi_pmtmr.h
@@ -0,0 +1,38 @@
+#ifndef _ACPI_PMTMR_H_
+#define _ACPI_PMTMR_H_
+#include <linux/clocksource.h>
+/* Number of PMTMR ticks expected during calibration run */
+#define PMTMR_TICKS_PER_SEC 3579545
+/* limit it to 24 bits */
+#define ACPI_PM_MASK CLOCKSOURCE_MASK(24)
+/* Overrun value */
+#define ACPI_PM_OVRRUN  (1<<24)
+#ifdef CONFIG_X86_PM_TIMER
+extern u32 acpi_pm_read_verified(void);
+extern u32 pmtmr_ioport;
+static inline u32 acpi_pm_read_early(void)
+{
+        if (!pmtmr_ioport)
+                return 0;
+        /* mask the output to 24 bits */
+        return acpi_pm_read_verified() & ACPI_PM_MASK;
+}
+#else
+static inline u32 acpi_pm_read_early(void)
+{
+        return 0;
+}
+#endif
+#endif
diff --git a/include/linux/agp_backend.h b/include/linux/agp_backend.h
index a5c8bb5d80ba..abc521cfb084 100644
--- a/include/linux/agp_backend.h
+++ b/include/linux/agp_backend.h
@@ -87,10 +87,15 @@ struct agp_memory {
        u32 physical;
        u8 is_bound;
        u8 is_flushed;
+        u8 vmalloc_flag;
 };
 #define AGP_NORMAL_MEMORY 0
+#define AGP_USER_TYPES (1 << 16)
+#define AGP_USER_MEMORY (AGP_USER_TYPES)
+#define AGP_USER_CACHED_MEMORY (AGP_USER_TYPES + 1)
 extern struct agp_bridge_data *agp_bridge;
 extern struct list_head agp_bridges;
diff --git a/include/linux/ata.h b/include/linux/ata.h
index 18e401ff7eaf..272736e37990 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -352,7 +352,7 @@ static inline int ata_drive_40wire(const u16 *dev_id)
 {
        if (ata_id_major_version(dev_id) >= 5 && ata_id_is_sata(dev_id))
                return 0;       /* SATA */
-        if (dev_id[93] & 0x4000)
+        if ((dev_id[93] & 0xE000) == 0x6000)
                return 0;       /* 80 wire */
        return 1;
 }
diff --git a/include/linux/atmel_pdc.h b/include/linux/atmel_pdc.h
new file mode 100644
index 000000000000..5058a31d2ce8
--- /dev/null
+++ b/include/linux/atmel_pdc.h
@@ -0,0 +1,36 @@
+/*
+ * include/linux/atmel_pdc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Peripheral Data Controller (PDC) registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef ATMEL_PDC_H
+#define ATMEL_PDC_H
+#define ATMEL_PDC_RPR           0x100   /* Receive Pointer Register */
+#define ATMEL_PDC_RCR           0x104   /* Receive Counter Register */
+#define ATMEL_PDC_TPR           0x108   /* Transmit Pointer Register */
+#define ATMEL_PDC_TCR           0x10c   /* Transmit Counter Register */
+#define ATMEL_PDC_RNPR          0x110   /* Receive Next Pointer Register */
+#define ATMEL_PDC_RNCR          0x114   /* Receive Next Counter Register */
+#define ATMEL_PDC_TNPR          0x118   /* Transmit Next Pointer Register */
+#define ATMEL_PDC_TNCR          0x11c   /* Transmit Next Counter Register */
+#define ATMEL_PDC_PTCR          0x120   /* Transfer Control Register */
+#define         ATMEL_PDC_RXTEN         (1 << 0)        /* Receiver Transfer Enable */
+#define         ATMEL_PDC_RXTDIS        (1 << 1)        /* Receiver Transfer Disable */
+#define         ATMEL_PDC_TXTEN         (1 << 8)        /* Transmitter Transfer Enable */
+#define         ATMEL_PDC_TXTDIS        (1 << 9)        /* Transmitter Transfer Disable */
+#define ATMEL_PDC_PTSR          0x124   /* Transfer Status Register */
+#endif
diff --git a/include/linux/audit.h b/include/linux/audit.h
index 0e07db6cc0d0..229fa012c893 100644
--- a/include/linux/audit.h
+++ b/include/linux/audit.h
@@ -89,6 +89,7 @@
 #define AUDIT_MQ_NOTIFY         1314    /* POSIX MQ notify record type */
 #define AUDIT_MQ_GETSETATTR     1315    /* POSIX MQ get/set attribute record type */
 #define AUDIT_KERNEL_OTHER      1316    /* For use by 3rd party modules */
+#define AUDIT_FD_PAIR           1317    /* audit record for pipe/socketpair */
 #define AUDIT_AVC               1400    /* SE Linux avc denial or grant */
 #define AUDIT_SELINUX_ERR       1401    /* Internal SE Linux Errors */
@@ -387,6 +388,7 @@ extern int __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, mode
 extern int audit_bprm(struct linux_binprm *bprm);
 extern int audit_socketcall(int nargs, unsigned long *args);
 extern int audit_sockaddr(int len, void *addr);
+extern int __audit_fd_pair(int fd1, int fd2);
 extern int audit_avc_path(struct dentry *dentry, struct vfsmount *mnt);
 extern int audit_set_macxattr(const char *name);
 extern int __audit_mq_open(int oflag, mode_t mode, struct mq_attr __user *u_attr);
@@ -401,6 +403,12 @@ static inline int audit_ipc_obj(struct kern_ipc_perm *ipcp)
                return __audit_ipc_obj(ipcp);
        return 0;
 }
+static inline int audit_fd_pair(int fd1, int fd2)
+{
+        if (unlikely(!audit_dummy_context()))
+                return __audit_fd_pair(fd1, fd2);
+        return 0;
+}
 static inline int audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mode)
 {
        if (unlikely(!audit_dummy_context()))
@@ -459,6 +467,7 @@ extern int audit_n_rules;
 #define audit_ipc_set_perm(q,u,g,m) ({ 0; })
 #define audit_bprm(p) ({ 0; })
 #define audit_socketcall(n,a) ({ 0; })
+#define audit_fd_pair(n,a) ({ 0; })
 #define audit_sockaddr(len, addr) ({ 0; })
 #define audit_avc_path(dentry, mnt) ({ 0; })
 #define audit_set_macxattr(n) do { ; } while (0)
diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h
index 0a6bc52ffe88..31a29541b504 100644
--- a/include/linux/auto_fs4.h
+++ b/include/linux/auto_fs4.h
@@ -59,6 +59,13 @@ struct autofs_packet_expire_multi {
        char name[NAME_MAX+1];
 };
+union autofs_packet_union {
+        struct autofs_packet_hdr hdr;
+        struct autofs_packet_missing missing;
+        struct autofs_packet_expire expire;
+        struct autofs_packet_expire_multi expire_multi;
+};
 /* autofs v5 common packet struct */
 struct autofs_v5_packet {
        struct autofs_packet_hdr hdr;
@@ -78,12 +85,13 @@ typedef struct autofs_v5_packet autofs_packet_expire_indirect_t;
 typedef struct autofs_v5_packet autofs_packet_missing_direct_t;
 typedef struct autofs_v5_packet autofs_packet_expire_direct_t;
-union autofs_packet_union {
+union autofs_v5_packet_union {
        struct autofs_packet_hdr hdr;
-        struct autofs_packet_missing missing;
-        struct autofs_packet_expire expire;
-        struct autofs_packet_expire_multi expire_multi;
        struct autofs_v5_packet v5_packet;
+        autofs_packet_missing_indirect_t missing_indirect;
+        autofs_packet_expire_indirect_t expire_indirect;
+        autofs_packet_missing_direct_t missing_direct;
+        autofs_packet_expire_direct_t expire_direct;
 };
 #define AUTOFS_IOC_EXPIRE_MULTI         _IOW(0x93,0x66,int)
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index a5cf1beacb44..1023ba0d6e55 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -9,17 +9,28 @@
 #define _LINUX_BACKLIGHT_H
 #include <linux/device.h>
+#include <linux/mutex.h>
 #include <linux/notifier.h>
+/* Notes on locking:
+ *
+ * backlight_device->ops_lock is an internal backlight lock protecting the
+ * ops pointer and no code outside the core should need to touch it.
+ *
+ * Access to update_status() is serialised by the update_lock mutex since
+ * most drivers seem to need this and historically get it wrong.
+ *
+ * Most drivers don't need locking on their get_brightness() method.
+ * If yours does, you need to implement it in the driver. You can use the
+ * update_lock mutex if appropriate.
+ *
+ * Any other use of the locks below is probably wrong.
+ */
 struct backlight_device;
 struct fb_info;
-/* This structure defines all the properties of a backlight
+struct backlight_ops {
-   (usually attached to a LCD). */
-struct backlight_properties {
-        /* Owner module */
-        struct module *owner;
        /* Notify the backlight driver some property has changed */
        int (*update_status)(struct backlight_device *);
        /* Return the current backlight brightness (accounting for power,
@@ -28,7 +39,10 @@ struct backlight_properties {
        /* Check if given framebuffer device is the one bound to this backlight;
           return 0 if not, !=0 if it is. If NULL, backlight always matches the fb. */
        int (*check_fb)(struct fb_info *);
+};
+/* This structure defines all the properties of a backlight */
+struct backlight_properties {
        /* Current User requested brightness (0 - max_brightness) */
        int brightness;
        /* Maximal value for brightness (read-only) */
@@ -41,20 +55,34 @@ struct backlight_properties {
 };
 struct backlight_device {
-        /* This protects the 'props' field. If 'props' is NULL, the driver that
+        /* Backlight properties */
+        struct backlight_properties props;
+        /* Serialise access to update_status method */
+        struct mutex update_lock;
+        /* This protects the 'ops' field. If 'ops' is NULL, the driver that
           registered this device has been unloaded, and if class_get_devdata()
           points to something in the body of that driver, it is also invalid. */
-        struct semaphore sem;
+        struct mutex ops_lock;
-        /* If this is NULL, the backing module is unloaded */
+        struct backlight_ops *ops;
-        struct backlight_properties *props;
        /* The framebuffer notifier block */
        struct notifier_block fb_notif;
        /* The class device structure */
        struct class_device class_dev;
 };
+static inline void backlight_update_status(struct backlight_device *bd)
+{
+        mutex_lock(&bd->update_lock);
+        if (bd->ops && bd->ops->update_status)
+                bd->ops->update_status(bd);
+        mutex_unlock(&bd->update_lock);
+}
 extern struct backlight_device *backlight_device_register(const char *name,
-        struct device *dev,void *devdata,struct backlight_properties *bp);
+        struct device *dev, void *devdata, struct backlight_ops *ops);
 extern void backlight_device_unregister(struct backlight_device *bd);
 #define to_backlight_device(obj) container_of(obj, struct backlight_device, class_dev)
diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h
index c1e82c514443..2d956cd566ae 100644
--- a/include/linux/binfmts.h
+++ b/include/linux/binfmts.h
@@ -59,6 +59,7 @@ struct linux_binfmt {
        int (*load_shlib)(struct file *);
        int (*core_dump)(long signr, struct pt_regs * regs, struct file * file);
        unsigned long min_coredump;     /* minimal dump size */
+        int hasvdso;
 };
 extern int register_binfmt(struct linux_binfmt *);
diff --git a/include/linux/cdrom.h b/include/linux/cdrom.h
index bbbe7b4da0bb..f50f04bdbc16 100644
--- a/include/linux/cdrom.h
+++ b/include/linux/cdrom.h
@@ -939,7 +939,7 @@ struct cdrom_device_info {
        int speed;                      /* maximum speed for reading data */
        int capacity;                   /* number of discs in jukebox */
 /* device-related storage */
-        int options             : 30;   /* options flags */
+        unsigned int options    : 30;   /* options flags */
        unsigned mc_flags       : 2;    /* media change buffer flags */
        int use_count;                  /* number of times device opened */
        char name[20];                  /* name of the device type */
diff --git a/include/linux/cfag12864b.h b/include/linux/cfag12864b.h
index 0bc45e69da5a..1605dd8aa646 100644
--- a/include/linux/cfag12864b.h
+++ b/include/linux/cfag12864b.h
@@ -73,5 +73,10 @@ extern void cfag12864b_disable(void);
 */
 extern unsigned char cfag12864b_isenabled(void);
+/*
+ * Is the module inited?
+ */
+extern unsigned char cfag12864b_isinited(void);
 #endif /* _CFAG12864B_H_ */
diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h
new file mode 100644
index 000000000000..4ea7e7bcfafe
--- /dev/null
+++ b/include/linux/clockchips.h
@@ -0,0 +1,142 @@
+/*  linux/include/linux/clockchips.h
+ *
+ *  This file contains the structure definitions for clockchips.
+ *
+ *  If you are not a clockchip, or the time of day code, you should
+ *  not be including this file!
+ */
+#ifndef _LINUX_CLOCKCHIPS_H
+#define _LINUX_CLOCKCHIPS_H
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+#include <linux/clocksource.h>
+#include <linux/cpumask.h>
+#include <linux/ktime.h>
+#include <linux/notifier.h>
+struct clock_event_device;
+/* Clock event mode commands */
+enum clock_event_mode {
+        CLOCK_EVT_MODE_UNUSED = 0,
+        CLOCK_EVT_MODE_SHUTDOWN,
+        CLOCK_EVT_MODE_PERIODIC,
+        CLOCK_EVT_MODE_ONESHOT,
+};
+/* Clock event notification values */
+enum clock_event_nofitiers {
+        CLOCK_EVT_NOTIFY_ADD,
+        CLOCK_EVT_NOTIFY_BROADCAST_ON,
+        CLOCK_EVT_NOTIFY_BROADCAST_OFF,
+        CLOCK_EVT_NOTIFY_BROADCAST_ENTER,
+        CLOCK_EVT_NOTIFY_BROADCAST_EXIT,
+        CLOCK_EVT_NOTIFY_SUSPEND,
+        CLOCK_EVT_NOTIFY_RESUME,
+        CLOCK_EVT_NOTIFY_CPU_DEAD,
+};
+/*
+ * Clock event features
+ */
+#define CLOCK_EVT_FEAT_PERIODIC         0x000001
+#define CLOCK_EVT_FEAT_ONESHOT          0x000002
+/*
+ * x86(64) specific misfeatures:
+ *
+ * - Clockevent source stops in C3 State and needs broadcast support.
+ * - Local APIC timer is used as a dummy device.
+ */
+#define CLOCK_EVT_FEAT_C3STOP           0x000004
+#define CLOCK_EVT_FEAT_DUMMY            0x000008
+/**
+ * struct clock_event_device - clock event device descriptor
+ * @name:               ptr to clock event name
+ * @hints:              usage hints
+ * @max_delta_ns:       maximum delta value in ns
+ * @min_delta_ns:       minimum delta value in ns
+ * @mult:               nanosecond to cycles multiplier
+ * @shift:              nanoseconds to cycles divisor (power of two)
+ * @rating:             variable to rate clock event devices
+ * @irq:                irq number (only for non cpu local devices)
+ * @cpumask:            cpumask to indicate for which cpus this device works
+ * @set_next_event:     set next event
+ * @set_mode:           set mode function
+ * @evthandler:         Assigned by the framework to be called by the low
+ *                      level handler of the event source
+ * @broadcast:          function to broadcast events
+ * @list:               list head for the management code
+ * @mode:               operating mode assigned by the management code
+ * @next_event:         local storage for the next event in oneshot mode
+ */
+struct clock_event_device {
+        const char              *name;
+        unsigned int            features;
+        unsigned long           max_delta_ns;
+        unsigned long           min_delta_ns;
+        unsigned long           mult;
+        int                     shift;
+        int                     rating;
+        int                     irq;
+        cpumask_t               cpumask;
+        int                     (*set_next_event)(unsigned long evt,
+                                                  struct clock_event_device *);
+        void                    (*set_mode)(enum clock_event_mode mode,
+                                            struct clock_event_device *);
+        void                    (*event_handler)(struct clock_event_device *);
+        void                    (*broadcast)(cpumask_t mask);
+        struct list_head        list;
+        enum clock_event_mode   mode;
+        ktime_t                 next_event;
+};
+/*
+ * Calculate a multiplication factor for scaled math, which is used to convert
+ * nanoseconds based values to clock ticks:
+ *
+ * clock_ticks = (nanoseconds * factor) >> shift.
+ *
+ * div_sc is the rearranged equation to calculate a factor from a given clock
+ * ticks / nanoseconds ratio:
+ *
+ * factor = (clock_ticks << shift) / nanoseconds
+ */
+static inline unsigned long div_sc(unsigned long ticks, unsigned long nsec,
+                                   int shift)
+{
+        uint64_t tmp = ((uint64_t)ticks) << shift;
+        do_div(tmp, nsec);
+        return (unsigned long) tmp;
+}
+/* Clock event layer functions */
+extern unsigned long clockevent_delta2ns(unsigned long latch,
+                                         struct clock_event_device *evt);
+extern void clockevents_register_device(struct clock_event_device *dev);
+extern void clockevents_exchange_device(struct clock_event_device *old,
+                                        struct clock_event_device *new);
+extern
+struct clock_event_device *clockevents_request_device(unsigned int features,
+                                                      cpumask_t cpumask);
+extern void clockevents_release_device(struct clock_event_device *dev);
+extern void clockevents_set_mode(struct clock_event_device *dev,
+                                 enum clock_event_mode mode);
+extern int clockevents_register_notifier(struct notifier_block *nb);
+extern void clockevents_unregister_notifier(struct notifier_block *nb);
+extern int clockevents_program_event(struct clock_event_device *dev,
+                                     ktime_t expires, ktime_t now);
+extern void clockevents_notify(unsigned long reason, void *arg);
+#else
+static inline void clockevents_resume_events(void) { }
+#define clockevents_notify(reason, arg) do { } while (0)
+#endif
+#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 1622d23a8dc3..daa4940cc0f1 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -12,11 +12,13 @@
 #include <linux/timex.h>
 #include <linux/time.h>
 #include <linux/list.h>
+#include <linux/timer.h>
 #include <asm/div64.h>
 #include <asm/io.h>
 /* clocksource cycle base type */
 typedef u64 cycle_t;
+struct clocksource;
 /**
 * struct clocksource - hardware abstraction for a free running counter
@@ -44,8 +46,8 @@ typedef u64 cycle_t;
 *                      subtraction of non 64 bit counters
 * @mult:               cycle to nanosecond multiplier
 * @shift:              cycle to nanosecond divisor (power of two)
- * @update_callback:    called when safe to alter clocksource values
+ * @flags:              flags describing special properties
- * @is_continuous:      defines if clocksource is free-running.
+ * @vread:              vsyscall based read
 * @cycle_interval:     Used internally by timekeeping core, please ignore.
 * @xtime_interval:     Used internally by timekeeping core, please ignore.
 */
@@ -57,15 +59,30 @@ struct clocksource {
        cycle_t mask;
        u32 mult;
        u32 shift;
-        int (*update_callback)(void);
+        unsigned long flags;
-        int is_continuous;
+        cycle_t (*vread)(void);
        /* timekeeping specific data, ignore */
        cycle_t cycle_last, cycle_interval;
        u64 xtime_nsec, xtime_interval;
        s64 error;
+#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
+        /* Watchdog related data, used by the framework */
+        struct list_head wd_list;
+        cycle_t wd_last;
+#endif
 };
+/*
+ * Clock source flags bits::
+ */
+#define CLOCK_SOURCE_IS_CONTINUOUS              0x01
+#define CLOCK_SOURCE_MUST_VERIFY                0x02
+#define CLOCK_SOURCE_WATCHDOG                   0x10
+#define CLOCK_SOURCE_VALID_FOR_HRES             0x20
 /* simplify initialization of mask field */
 #define CLOCKSOURCE_MASK(bits) (cycle_t)(bits<64 ? ((1ULL<<bits)-1) : -1)
@@ -178,8 +195,16 @@ static inline void clocksource_calculate_interval(struct clocksource *c,
 /* used to install a new clocksource */
-int clocksource_register(struct clocksource*);
+extern int clocksource_register(struct clocksource*);
-void clocksource_reselect(void);
+extern struct clocksource* clocksource_get_next(void);
-struct clocksource* clocksource_get_next(void);
+extern void clocksource_change_rating(struct clocksource *cs, int rating);
+#ifdef CONFIG_GENERIC_TIME_VSYSCALL
+extern void update_vsyscall(struct timespec *ts, struct clocksource *c);
+#else
+static inline void update_vsyscall(struct timespec *ts, struct clocksource *c)
+{
+}
+#endif
 #endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 7f008f6bfdc3..0899e2cdcdd1 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -84,9 +84,6 @@ struct cpufreq_policy {
        unsigned int            policy; /* see above */
        struct cpufreq_governor *governor; /* see below */
-        struct mutex            lock;   /* CPU ->setpolicy or ->target may
-                                           only be called once a time */
        struct work_struct      update; /* if update_policy() needs to be
                                         * called, but you're in IRQ context */
@@ -172,11 +169,16 @@ extern int __cpufreq_driver_target(struct cpufreq_policy *policy,
                                   unsigned int relation);
-extern int cpufreq_driver_getavg(struct cpufreq_policy *policy);
+extern int __cpufreq_driver_getavg(struct cpufreq_policy *policy);
 int cpufreq_register_governor(struct cpufreq_governor *governor);
 void cpufreq_unregister_governor(struct cpufreq_governor *governor);
+int lock_policy_rwsem_read(int cpu);
+int lock_policy_rwsem_write(int cpu);
+void unlock_policy_rwsem_read(int cpu);
+void unlock_policy_rwsem_write(int cpu);
 /*********************************************************************
 *                      CPUFREQ DRIVER INTERFACE                     *
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index d0e8c8b0e34d..23f55140ccd5 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -398,11 +398,11 @@ extern cpumask_t cpu_present_map;
 #endif
 #ifdef CONFIG_SMP
-int highest_possible_processor_id(void);
+extern int nr_cpu_ids;
 #define any_online_cpu(mask) __any_online_cpu(&(mask))
 int __any_online_cpu(const cpumask_t *mask);
 #else
-#define highest_possible_processor_id() 0
+#define nr_cpu_ids                      1
 #define any_online_cpu(mask)            0
 #endif
diff --git a/include/linux/debugfs.h b/include/linux/debugfs.h
index 047567d34ca7..9fa0983d1aa8 100644
--- a/include/linux/debugfs.h
+++ b/include/linux/debugfs.h
@@ -33,6 +33,9 @@ struct dentry *debugfs_create_file(const char *name, mode_t mode,
 struct dentry *debugfs_create_dir(const char *name, struct dentry *parent);
+struct dentry *debugfs_create_symlink(const char *name, struct dentry *parent,
+                                      const char *dest);
 void debugfs_remove(struct dentry *dentry);
 struct dentry *debugfs_create_u8(const char *name, mode_t mode,
@@ -70,6 +73,13 @@ static inline struct dentry *debugfs_create_dir(const char *name,
        return ERR_PTR(-ENODEV);
 }
+static inline struct dentry *debugfs_create_symlink(const char *name,
+                                                    struct dentry *parent,
+                                                    const char *dest)
+{
+        return ERR_PTR(-ENODEV);
+}
 static inline void debugfs_remove(struct dentry *dentry)
 { }
diff --git a/include/linux/device.h b/include/linux/device.h
index 26e4692f2d1a..d1a3a27c3988 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -2,6 +2,7 @@
 * device.h - generic, centralized driver model
 *
 * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org>
+ * Copyright (c) 2004-2007 Greg Kroah-Hartman <gregkh@suse.de>
 *
 * This file is released under the GPLv2
 *
@@ -101,7 +102,7 @@ extern int bus_unregister_notifier(struct bus_type *bus,
 #define BUS_NOTIFY_UNBIND_DRIVER        0x00000004 /* driver about to be
                                                      unbound */
-/* driverfs interface for exporting bus attributes */
+/* sysfs interface for exporting bus attributes */
 struct bus_attribute {
        struct attribute        attr;
@@ -146,7 +147,7 @@ extern void put_driver(struct device_driver * drv);
 extern struct device_driver *driver_find(const char *name, struct bus_type *bus);
 extern int driver_probe_done(void);
-/* driverfs interface for exporting driver attributes */
+/* sysfs interface for exporting driver attributes */
 struct driver_attribute {
        struct attribute        attr;
diff --git a/include/linux/ext4_fs_extents.h b/include/linux/ext4_fs_extents.h
index a41cc24568ca..7eb1d73fc5d1 100644
--- a/include/linux/ext4_fs_extents.h
+++ b/include/linux/ext4_fs_extents.h
@@ -22,12 +22,12 @@
 #include <linux/ext4_fs.h>
 /*
- * With AGRESSIVE_TEST defined, the capacity of index/leaf blocks
+ * With AGGRESSIVE_TEST defined, the capacity of index/leaf blocks
 * becomes very small, so index split, in-depth growing and
 * other hard changes happen much more often.
 * This is for debug purposes only.
 */
-#define AGRESSIVE_TEST_
+#define AGGRESSIVE_TEST_
 /*
 * With EXTENTS_STATS defined, the number of blocks and extents
diff --git a/include/linux/fb.h b/include/linux/fb.h
index a78e25683f82..be913ec87169 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -516,13 +516,15 @@ struct fb_cursor_user {
 #define FB_EVENT_GET_CONSOLE_MAP        0x07
 /*      CONSOLE-SPECIFIC: set console to framebuffer mapping */
 #define FB_EVENT_SET_CONSOLE_MAP        0x08
-/*      A display blank is requested       */
+/*      A hardware display blank change occured */
 #define FB_EVENT_BLANK                  0x09
 /*      Private modelist is to be replaced */
 #define FB_EVENT_NEW_MODELIST           0x0A
 /*      The resolution of the passed in fb_info about to change and
        all vc's should be changed         */
 #define FB_EVENT_MODE_CHANGE_ALL        0x0B
+/*      A software display blank change occured */
+#define FB_EVENT_CONBLANK               0x0C
 struct fb_event {
        struct fb_info *info;
@@ -767,16 +769,13 @@ struct fb_info {
        struct fb_videomode *mode;      /* current mode */
 #ifdef CONFIG_FB_BACKLIGHT
-        /* Lock ordering:
-         * bl_mutex (protects bl_dev and bl_curve)
-         *   bl_dev->sem (backlight class)
-         */
-        struct mutex bl_mutex;
        /* assigned backlight device */
+        /* set before framebuffer registration, 
+           remove after unregister */
        struct backlight_device *bl_dev;
        /* Backlight level curve */
+        struct mutex bl_curve_mutex;    
        u8 bl_curve[FB_BACKLIGHT_LEVELS];
 #endif
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 612472aaa79c..7803014f3a11 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -106,7 +106,7 @@ static inline void account_system_vtime(struct task_struct *tsk)
 * always balanced, so the interrupted value of ->hardirq_context
 * will always be restored.
 */
-#define irq_enter()                                     \
+#define __irq_enter()                                   \
        do {                                            \
                account_system_vtime(current);          \
                add_preempt_count(HARDIRQ_OFFSET);      \
@@ -114,6 +114,11 @@ static inline void account_system_vtime(struct task_struct *tsk)
        } while (0)
 /*
+ * Enter irq context (on NO_HZ, update jiffies):
+ */
+extern void irq_enter(void);
+/*
 * Exit irq context without processing softirqs:
 */
 #define __irq_exit()                                    \
@@ -128,7 +133,7 @@ static inline void account_system_vtime(struct task_struct *tsk)
 */
 extern void irq_exit(void);
-#define nmi_enter()             do { lockdep_off(); irq_enter(); } while (0)
+#define nmi_enter()             do { lockdep_off(); __irq_enter(); } while (0)
 #define nmi_exit()              do { __irq_exit(); lockdep_on(); } while (0)
 #endif /* LINUX_HARDIRQ_H */
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index fca93025ab51..37f9279192a9 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -21,22 +21,72 @@
 #include <linux/list.h>
 #include <linux/wait.h>
+struct hrtimer_clock_base;
+struct hrtimer_cpu_base;
 /*
 * Mode arguments of xxx_hrtimer functions:
 */
 enum hrtimer_mode {
-        HRTIMER_ABS,    /* Time value is absolute */
+        HRTIMER_MODE_ABS,       /* Time value is absolute */
-        HRTIMER_REL,    /* Time value is relative to now */
+        HRTIMER_MODE_REL,       /* Time value is relative to now */
 };
+/*
+ * Return values for the callback function
+ */
 enum hrtimer_restart {
-        HRTIMER_NORESTART,
+        HRTIMER_NORESTART,      /* Timer is not restarted */
-        HRTIMER_RESTART,
+        HRTIMER_RESTART,        /* Timer must be restarted */
 };
-#define HRTIMER_INACTIVE        ((void *)1UL)
+/*
+ * hrtimer callback modes:
+ *
+ *      HRTIMER_CB_SOFTIRQ:             Callback must run in softirq context
+ *      HRTIMER_CB_IRQSAFE:             Callback may run in hardirq context
+ *      HRTIMER_CB_IRQSAFE_NO_RESTART:  Callback may run in hardirq context and
+ *                                      does not restart the timer
+ *      HRTIMER_CB_IRQSAFE_NO_SOFTIRQ:  Callback must run in softirq context
+ *                                      Special mode for tick emultation
+ */
+enum hrtimer_cb_mode {
+        HRTIMER_CB_SOFTIRQ,
+        HRTIMER_CB_IRQSAFE,
+        HRTIMER_CB_IRQSAFE_NO_RESTART,
+        HRTIMER_CB_IRQSAFE_NO_SOFTIRQ,
+};
-struct hrtimer_base;
+/*
+ * Values to track state of the timer
+ *
+ * Possible states:
+ *
+ * 0x00         inactive
+ * 0x01         enqueued into rbtree
+ * 0x02         callback function running
+ * 0x04         callback pending (high resolution mode)
+ *
+ * Special case:
+ * 0x03         callback function running and enqueued
+ *              (was requeued on another CPU)
+ * The "callback function running and enqueued" status is only possible on
+ * SMP. It happens for example when a posix timer expired and the callback
+ * queued a signal. Between dropping the lock which protects the posix timer
+ * and reacquiring the base lock of the hrtimer, another CPU can deliver the
+ * signal and rearm the timer. We have to preserve the callback running state,
+ * as otherwise the timer could be removed before the softirq code finishes the
+ * the handling of the timer.
+ *
+ * The HRTIMER_STATE_ENQUEUE bit is always or'ed to the current state to
+ * preserve the HRTIMER_STATE_CALLBACK bit in the above scenario.
+ *
+ * All state transitions are protected by cpu_base->lock.
+ */
+#define HRTIMER_STATE_INACTIVE  0x00
+#define HRTIMER_STATE_ENQUEUED  0x01
+#define HRTIMER_STATE_CALLBACK  0x02
+#define HRTIMER_STATE_PENDING   0x04
 /**
 * struct hrtimer - the basic hrtimer structure
@@ -46,14 +96,34 @@ struct hrtimer_base;
 *              which the timer is based.
 * @function:   timer expiry callback function
 * @base:       pointer to the timer base (per cpu and per clock)
+ * @state:      state information (See bit values above)
+ * @cb_mode:    high resolution timer feature to select the callback execution
+ *               mode
+ * @cb_entry:   list head to enqueue an expired timer into the callback list
+ * @start_site: timer statistics field to store the site where the timer
+ *              was started
+ * @start_comm: timer statistics field to store the name of the process which
+ *              started the timer
+ * @start_pid: timer statistics field to store the pid of the task which
+ *              started the timer
 *
- * The hrtimer structure must be initialized by init_hrtimer_#CLOCKTYPE()
+ * The hrtimer structure must be initialized by hrtimer_init()
 */
 struct hrtimer {
-        struct rb_node          node;
+        struct rb_node                  node;
-        ktime_t                 expires;
+        ktime_t                         expires;
-        int                     (*function)(struct hrtimer *);
+        enum hrtimer_restart            (*function)(struct hrtimer *);
-        struct hrtimer_base     *base;
+        struct hrtimer_clock_base       *base;
+        unsigned long                   state;
+#ifdef CONFIG_HIGH_RES_TIMERS
+        enum hrtimer_cb_mode            cb_mode;
+        struct list_head                cb_entry;
+#endif
+#ifdef CONFIG_TIMER_STATS
+        void                            *start_site;
+        char                            start_comm[16];
+        int                             start_pid;
+#endif
 };
 /**
@@ -70,37 +140,114 @@ struct hrtimer_sleeper {
 /**
 * struct hrtimer_base - the timer base for a specific clock
- * @index:              clock type index for per_cpu support when moving a timer
+ * @index:              clock type index for per_cpu support when moving a
- *                      to a base on another cpu.
+ *                      timer to a base on another cpu.
- * @lock:               lock protecting the base and associated timers
 * @active:             red black tree root node for the active timers
 * @first:              pointer to the timer node which expires first
 * @resolution:         the resolution of the clock, in nanoseconds
 * @get_time:           function to retrieve the current time of the clock
 * @get_softirq_time:   function to retrieve the current time from the softirq
- * @curr_timer:         the timer which is executing a callback right now
 * @softirq_time:       the time when running the hrtimer queue in the softirq
- * @lock_key:           the lock_class_key for use with lockdep
+ * @cb_pending:         list of timers where the callback is pending
+ * @offset:             offset of this clock to the monotonic base
+ * @reprogram:          function to reprogram the timer event
 */
-struct hrtimer_base {
+struct hrtimer_clock_base {
+        struct hrtimer_cpu_base *cpu_base;
        clockid_t               index;
-        spinlock_t              lock;
        struct rb_root          active;
        struct rb_node          *first;
        ktime_t                 resolution;
        ktime_t                 (*get_time)(void);
        ktime_t                 (*get_softirq_time)(void);
-        struct hrtimer          *curr_timer;
        ktime_t                 softirq_time;
-        struct lock_class_key lock_key;
+#ifdef CONFIG_HIGH_RES_TIMERS
+        ktime_t                 offset;
+        int                     (*reprogram)(struct hrtimer *t,
+                                             struct hrtimer_clock_base *b,
+                                             ktime_t n);
+#endif
+};
+#define HRTIMER_MAX_CLOCK_BASES 2
+/*
+ * struct hrtimer_cpu_base - the per cpu clock bases
+ * @lock:               lock protecting the base and associated clock bases
+ *                      and timers
+ * @lock_key:           the lock_class_key for use with lockdep
+ * @clock_base:         array of clock bases for this cpu
+ * @curr_timer:         the timer which is executing a callback right now
+ * @expires_next:       absolute time of the next event which was scheduled
+ *                      via clock_set_next_event()
+ * @hres_active:        State of high resolution mode
+ * @check_clocks:       Indictator, when set evaluate time source and clock
+ *                      event devices whether high resolution mode can be
+ *                      activated.
+ * @cb_pending:         Expired timers are moved from the rbtree to this
+ *                      list in the timer interrupt. The list is processed
+ *                      in the softirq.
+ * @nr_events:          Total number of timer interrupt events
+ */
+struct hrtimer_cpu_base {
+        spinlock_t                      lock;
+        struct lock_class_key           lock_key;
+        struct hrtimer_clock_base       clock_base[HRTIMER_MAX_CLOCK_BASES];
+#ifdef CONFIG_HIGH_RES_TIMERS
+        ktime_t                         expires_next;
+        int                             hres_active;
+        struct list_head                cb_pending;
+        unsigned long                   nr_events;
+#endif
 };
+#ifdef CONFIG_HIGH_RES_TIMERS
+struct clock_event_device;
+extern void clock_was_set(void);
+extern void hrtimer_interrupt(struct clock_event_device *dev);
+/*
+ * In high resolution mode the time reference must be read accurate
+ */
+static inline ktime_t hrtimer_cb_get_time(struct hrtimer *timer)
+{
+        return timer->base->get_time();
+}
+/*
+ * The resolution of the clocks. The resolution value is returned in
+ * the clock_getres() system call to give application programmers an
+ * idea of the (in)accuracy of timers. Timer values are rounded up to
+ * this resolution values.
+ */
+# define KTIME_HIGH_RES         (ktime_t) { .tv64 = 1 }
+# define KTIME_MONOTONIC_RES    KTIME_HIGH_RES
+#else
+# define KTIME_MONOTONIC_RES    KTIME_LOW_RES
 /*
 * clock_was_set() is a NOP for non- high-resolution systems. The
 * time-sorted order guarantees that a timer does not expire early and
 * is expired in the next softirq when the clock was advanced.
 */
-#define clock_was_set()         do { } while (0)
+static inline void clock_was_set(void) { }
+/*
+ * In non high resolution mode the time reference is taken from
+ * the base softirq time variable.
+ */
+static inline ktime_t hrtimer_cb_get_time(struct hrtimer *timer)
+{
+        return timer->base->softirq_time;
+}
+#endif
+extern ktime_t ktime_get(void);
+extern ktime_t ktime_get_real(void);
 /* Exported timer functions: */
@@ -114,19 +261,33 @@ extern int hrtimer_start(struct hrtimer *timer, ktime_t tim,
 extern int hrtimer_cancel(struct hrtimer *timer);
 extern int hrtimer_try_to_cancel(struct hrtimer *timer);
-#define hrtimer_restart(timer) hrtimer_start((timer), (timer)->expires, HRTIMER_ABS)
+static inline int hrtimer_restart(struct hrtimer *timer)
+{
+        return hrtimer_start(timer, timer->expires, HRTIMER_MODE_ABS);
+}
 /* Query timers: */
 extern ktime_t hrtimer_get_remaining(const struct hrtimer *timer);
 extern int hrtimer_get_res(const clockid_t which_clock, struct timespec *tp);
-#ifdef CONFIG_NO_IDLE_HZ
 extern ktime_t hrtimer_get_next_event(void);
-#endif
+/*
+ * A timer is active, when it is enqueued into the rbtree or the callback
+ * function is running.
+ */
 static inline int hrtimer_active(const struct hrtimer *timer)
 {
-        return rb_parent(&timer->node) != &timer->node;
+        return timer->state != HRTIMER_STATE_INACTIVE;
+}
+/*
+ * Helper function to check, whether the timer is on one of the queues
+ */
+static inline int hrtimer_is_queued(struct hrtimer *timer)
+{
+        return timer->state &
+                (HRTIMER_STATE_ENQUEUED | HRTIMER_STATE_PENDING);
 }
 /* Forward a hrtimer so it expires after now: */
@@ -149,4 +310,53 @@ extern void hrtimer_run_queues(void);
 /* Bootup initialization: */
 extern void __init hrtimers_init(void);
+#if BITS_PER_LONG < 64
+extern unsigned long ktime_divns(const ktime_t kt, s64 div);
+#else /* BITS_PER_LONG < 64 */
+# define ktime_divns(kt, div)           (unsigned long)((kt).tv64 / (div))
+#endif
+/* Show pending timers: */
+extern void sysrq_timer_list_show(void);
+/*
+ * Timer-statistics info:
+ */
+#ifdef CONFIG_TIMER_STATS
+extern void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
+                                     void *timerf, char * comm);
+static inline void timer_stats_account_hrtimer(struct hrtimer *timer)
+{
+        timer_stats_update_stats(timer, timer->start_pid, timer->start_site,
+                                 timer->function, timer->start_comm);
+}
+extern void __timer_stats_hrtimer_set_start_info(struct hrtimer *timer,
+                                                 void *addr);
+static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer)
+{
+        __timer_stats_hrtimer_set_start_info(timer, __builtin_return_address(0));
+}
+static inline void timer_stats_hrtimer_clear_start_info(struct hrtimer *timer)
+{
+        timer->start_site = NULL;
+}
+#else
+static inline void timer_stats_account_hrtimer(struct hrtimer *timer)
+{
+}
+static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer)
+{
+}
+static inline void timer_stats_hrtimer_clear_start_info(struct hrtimer *timer)
+{
+}
+#endif
 #endif
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 04e0fa97ac99..79c028251c70 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -636,7 +636,6 @@ typedef struct ide_drive_s {
        unsigned int    bios_cyl;       /* BIOS/fdisk/LILO number of cyls */
        unsigned int    cyl;            /* "real" number of cyls */
        unsigned int    drive_data;     /* use by tuneproc/selectproc */
-        unsigned int    usage;          /* current "open()" count for drive */
        unsigned int    failures;       /* current failure count */
        unsigned int    max_failures;   /* maximum allowed failure count */
        u64             probed_capacity;/* initial reported media capacity (ide-cd only currently) */
@@ -736,23 +735,22 @@ typedef struct hwif_s {
        int (*ide_dma_end)(ide_drive_t *drive);
        int (*ide_dma_check)(ide_drive_t *drive);
        int (*ide_dma_on)(ide_drive_t *drive);
-        int (*ide_dma_off_quietly)(ide_drive_t *drive);
+        void (*dma_off_quietly)(ide_drive_t *drive);
        int (*ide_dma_test_irq)(ide_drive_t *drive);
-        int (*ide_dma_host_on)(ide_drive_t *drive);
+        void (*ide_dma_clear_irq)(ide_drive_t *drive);
-        int (*ide_dma_host_off)(ide_drive_t *drive);
+        void (*dma_host_on)(ide_drive_t *drive);
+        void (*dma_host_off)(ide_drive_t *drive);
        int (*ide_dma_lostirq)(ide_drive_t *drive);
        int (*ide_dma_timeout)(ide_drive_t *drive);
        void (*OUTB)(u8 addr, unsigned long port);
        void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
        void (*OUTW)(u16 addr, unsigned long port);
-        void (*OUTL)(u32 addr, unsigned long port);
        void (*OUTSW)(unsigned long port, void *addr, u32 count);
        void (*OUTSL)(unsigned long port, void *addr, u32 count);
        u8  (*INB)(unsigned long port);
        u16 (*INW)(unsigned long port);
-        u32 (*INL)(unsigned long port);
        void (*INSW)(unsigned long port, void *addr, u32 count);
        void (*INSL)(unsigned long port, void *addr, u32 count);
@@ -774,7 +772,6 @@ typedef struct hwif_s {
        unsigned int cursg;
        unsigned int cursg_ofs;
-        int             mmio;           /* hosts iomio (0) or custom (2) select */
        int             rqsize;         /* max sectors per request */
        int             irq;            /* our irq number */
@@ -802,12 +799,11 @@ typedef struct hwif_s {
        unsigned        udma_four  : 1; /* 1=ATA-66 capable, 0=default */
        unsigned        no_lba48   : 1; /* 1 = cannot do LBA48 */
        unsigned        no_lba48_dma : 1; /* 1 = cannot do LBA48 DMA */
-        unsigned        no_dsc     : 1; /* 0 default, 1 dsc_overlap disabled */
        unsigned        auto_poll  : 1; /* supports nop auto-poll */
        unsigned        sg_mapped  : 1; /* sg_table and sg_nents are ready */
        unsigned        no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
        unsigned        err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */
-        unsigned        atapi_irq_bogon : 1; /* Generates spurious DMA interrupts in PIO mode */
+        unsigned        mmio       : 1; /* host uses MMIO */
        struct device   gendev;
        struct completion gendev_rel_comp; /* To deal with device release() */
@@ -1280,8 +1276,9 @@ int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
 int __ide_dma_bad_drive(ide_drive_t *);
 int __ide_dma_good_drive(ide_drive_t *);
 int ide_use_dma(ide_drive_t *);
-int __ide_dma_off(ide_drive_t *);
+void ide_dma_off(ide_drive_t *);
 void ide_dma_verbose(ide_drive_t *);
+int ide_set_dma(ide_drive_t *);
 ide_startstop_t ide_dma_intr(ide_drive_t *);
 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
@@ -1291,9 +1288,9 @@ extern void ide_destroy_dmatable(ide_drive_t *);
 extern int ide_release_dma(ide_hwif_t *);
 extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
-extern int __ide_dma_host_off(ide_drive_t *);
+void ide_dma_host_off(ide_drive_t *);
-extern int __ide_dma_off_quietly(ide_drive_t *);
+void ide_dma_off_quietly(ide_drive_t *);
-extern int __ide_dma_host_on(ide_drive_t *);
+void ide_dma_host_on(ide_drive_t *);
 extern int __ide_dma_on(ide_drive_t *);
 extern int __ide_dma_check(ide_drive_t *);
 extern int ide_dma_setup(ide_drive_t *);
@@ -1305,8 +1302,9 @@ extern int __ide_dma_timeout(ide_drive_t *);
 #else
 static inline int ide_use_dma(ide_drive_t *drive) { return 0; }
-static inline int __ide_dma_off(ide_drive_t *drive) { return 0; }
+static inline void ide_dma_off(ide_drive_t *drive) { ; }
 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
+static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
 #endif /* CONFIG_BLK_DEV_IDEDMA */
 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
@@ -1354,6 +1352,7 @@ extern int ide_dma_enable(ide_drive_t *drive);
 extern char *ide_xfer_verbose(u8 xfer_rate);
 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
+int ide_use_fast_pio(ide_drive_t *);
 u8 ide_dump_status(ide_drive_t *, const char *, u8);
@@ -1367,7 +1366,6 @@ typedef struct ide_pio_data_s {
        u8 pio_mode;
        u8 use_iordy;
        u8 overridden;
-        u8 blacklisted;
        unsigned int cycle_time;
 } ide_pio_data_t;
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 5a8ba0b8ccba..838cf5a5bd7f 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -42,6 +42,8 @@
 * IRQF_SHARED - allow sharing the irq among several devices
 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
+ * IRQF_PERCPU - Interrupt is per cpu
+ * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
 */
 #define IRQF_DISABLED           0x00000020
 #define IRQF_SAMPLE_RANDOM      0x00000040
@@ -49,6 +51,7 @@
 #define IRQF_PROBE_SHARED       0x00000100
 #define IRQF_TIMER              0x00000200
 #define IRQF_PERCPU             0x00000400
+#define IRQF_NOBALANCING        0x00000800
 /*
 * Migration helpers. Scheduled for removal in 1/2007
@@ -239,6 +242,9 @@ enum
        BLOCK_SOFTIRQ,
        TASKLET_SOFTIRQ,
        SCHED_SOFTIRQ,
+#ifdef CONFIG_HIGH_RES_TIMERS
+        HRTIMER_SOFTIRQ,
+#endif
 };
 /* softirq mask and active fields moved to irq_cpustat_t in
@@ -417,4 +423,13 @@ extern int probe_irq_off(unsigned long);	/* returns 0 or negative on failure */
 extern unsigned int probe_irq_mask(unsigned long);      /* returns mask of ISA interrupts */
 #endif
+#ifdef CONFIG_PROC_FS
+/* Initialize /proc/irq/ */
+extern void init_irq_proc(void);
+#else
+static inline void init_irq_proc(void)
+{
+}
+#endif
 #endif
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 5504b671357f..aa5b3e6178a0 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -31,7 +31,7 @@ typedef	void fastcall (*irq_flow_handler_t)(unsigned int irq,
 /*
 * IRQ line status.
 *
- * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
+ * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
 *
 * IRQ types
 */
@@ -45,28 +45,30 @@ typedef	void fastcall (*irq_flow_handler_t)(unsigned int irq,
 #define IRQ_TYPE_PROBE          0x00000010      /* Probing in progress */
 /* Internal flags */
-#define IRQ_INPROGRESS          0x00010000      /* IRQ handler active - do not enter! */
+#define IRQ_INPROGRESS          0x00000100      /* IRQ handler active - do not enter! */
-#define IRQ_DISABLED            0x00020000      /* IRQ disabled - do not enter! */
+#define IRQ_DISABLED            0x00000200      /* IRQ disabled - do not enter! */
-#define IRQ_PENDING             0x00040000      /* IRQ pending - replay on enable */
+#define IRQ_PENDING             0x00000400      /* IRQ pending - replay on enable */
-#define IRQ_REPLAY              0x00080000      /* IRQ has been replayed but not acked yet */
+#define IRQ_REPLAY              0x00000800      /* IRQ has been replayed but not acked yet */
-#define IRQ_AUTODETECT          0x00100000      /* IRQ is being autodetected */
+#define IRQ_AUTODETECT          0x00001000      /* IRQ is being autodetected */
-#define IRQ_WAITING             0x00200000      /* IRQ not yet seen - for autodetection */
+#define IRQ_WAITING             0x00002000      /* IRQ not yet seen - for autodetection */
-#define IRQ_LEVEL               0x00400000      /* IRQ level triggered */
+#define IRQ_LEVEL               0x00004000      /* IRQ level triggered */
-#define IRQ_MASKED              0x00800000      /* IRQ masked - shouldn't be seen again */
+#define IRQ_MASKED              0x00008000      /* IRQ masked - shouldn't be seen again */
-#define IRQ_PER_CPU             0x01000000      /* IRQ is per CPU */
+#define IRQ_PER_CPU             0x00010000      /* IRQ is per CPU */
+#define IRQ_NOPROBE             0x00020000      /* IRQ is not valid for probing */
+#define IRQ_NOREQUEST           0x00040000      /* IRQ cannot be requested */
+#define IRQ_NOAUTOEN            0x00080000      /* IRQ will not be enabled on request irq */
+#define IRQ_WAKEUP              0x00100000      /* IRQ triggers system wakeup */
+#define IRQ_MOVE_PENDING        0x00200000      /* need to re-target IRQ destination */
+#define IRQ_NO_BALANCING        0x00400000      /* IRQ is excluded from balancing */
 #ifdef CONFIG_IRQ_PER_CPU
 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
+# define IRQ_NO_BALANCING_MASK  (IRQ_PER_CPU | IRQ_NO_BALANCING)
 #else
 # define CHECK_IRQ_PER_CPU(var) 0
+# define IRQ_NO_BALANCING_MASK  IRQ_NO_BALANCING
 #endif
-#define IRQ_NOPROBE             0x02000000      /* IRQ is not valid for probing */
-#define IRQ_NOREQUEST           0x04000000      /* IRQ cannot be requested */
-#define IRQ_NOAUTOEN            0x08000000      /* IRQ will not be enabled on request irq */
-#define IRQ_DELAYED_DISABLE     0x10000000      /* IRQ disable (masking) happens delayed. */
-#define IRQ_WAKEUP              0x20000000      /* IRQ triggers system wakeup */
-#define IRQ_MOVE_PENDING        0x40000000      /* need to re-target IRQ destination */
 struct proc_dir_entry;
 struct msi_desc;
@@ -127,6 +129,7 @@ struct irq_chip {
 *
 * @handle_irq:         highlevel irq-events handler [if NULL, __do_IRQ()]
 * @chip:               low level interrupt hardware access
+ * @msi_desc:           MSI descriptor
 * @handler_data:       per-IRQ data for the irq_chip methods
 * @chip_data:          platform-specific per-chip private data for the chip
 *                      methods, to allow shared chip implementations
@@ -235,11 +238,21 @@ static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
 #endif /* CONFIG_GENERIC_PENDING_IRQ */
+extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
+extern int irq_can_set_affinity(unsigned int irq);
 #else /* CONFIG_SMP */
 #define move_native_irq(x)
 #define move_masked_irq(x)
+static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
+{
+        return -EINVAL;
+}
+static inline int irq_can_set_affinity(unsigned int irq) { return 0; }
 #endif /* CONFIG_SMP */
 #ifdef CONFIG_IRQBALANCE
@@ -261,6 +274,11 @@ static inline int select_smp_affinity(unsigned int irq)
 extern int no_irq_affinity;
+static inline int irq_balancing_disabled(unsigned int irq)
+{
+        return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
+}
 /* Handle irq action chains: */
 extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
@@ -310,9 +328,6 @@ extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
 /* Resending of interrupts :*/
 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
-/* Initialize /proc/irq/ */
-extern void init_irq_proc(void);
 /* Enable/disable irq debugging output: */
 extern int noirqdebug_setup(char *str);
diff --git a/include/linux/jffs.h b/include/linux/jffs.h
deleted file mode 100644
index 92213215277f..000000000000
--- a/include/linux/jffs.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * JFFS -- Journalling Flash File System, Linux implementation.
- *
- * Copyright (C) 1999, 2000  Axis Communications AB.
- *
- * Created by Finn Hakansson <finn@axis.com>.
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * $Id: jffs.h,v 1.20 2001/09/18 21:33:37 dwmw2 Exp $
- *
- * Ported to Linux 2.3.x and MTD:
- * Copyright (C) 2000  Alexander Larsson (alex@cendio.se), Cendio Systems AB
- *
- */
-#ifndef __LINUX_JFFS_H__
-#define __LINUX_JFFS_H__
-#include <linux/types.h>
-#include <linux/completion.h>
-#define JFFS_VERSION_STRING "1.0"
-/* This is a magic number that is used as an identification number for
-   this file system.  It is written to the super_block structure.  */
-#define JFFS_MAGIC_SB_BITMASK 0x07c0  /* 1984 */
-/* This is a magic number that every on-flash raw inode begins with.  */
-#define JFFS_MAGIC_BITMASK 0x34383931 /* "1984" */
-/* These two bitmasks are the valid ones for the flash memories we have
-   for the moment.  */
-#define JFFS_EMPTY_BITMASK 0xffffffff
-#define JFFS_DIRTY_BITMASK 0x00000000
-/* This is the inode number of the root node.  */
-#define JFFS_MIN_INO 1
-/* How many slots in the file hash table should we have?  */
-#define JFFS_HASH_SIZE 40
-/* Don't use more than 254 bytes as the maximum allowed length of a file's
-   name due to errors that could occur during the scanning of the flash
-   memory. In fact, a name length of 255 or 0xff, could be the result of
-   an uncompleted write.  For instance, if a raw inode is written to the
-   flash memory and there is a power lossage just before the length of
-   the name is written, the length 255 would be interpreted as an illegal
-   value.  */
-#define JFFS_MAX_NAME_LEN 254
-/* Commands for ioctl().  */
-#define JFFS_IOCTL_MAGIC 't'
-#define JFFS_PRINT_HASH _IO(JFFS_IOCTL_MAGIC, 90)
-#define JFFS_PRINT_TREE _IO(JFFS_IOCTL_MAGIC, 91)
-#define JFFS_GET_STATUS _IO(JFFS_IOCTL_MAGIC, 92)
-/* XXX: This is something that we should try to get rid of in the future.  */
-#define JFFS_MODIFY_INODE 0x01
-#define JFFS_MODIFY_NAME  0x02
-#define JFFS_MODIFY_DATA  0x04
-#define JFFS_MODIFY_EXIST 0x08
-struct jffs_control;
-/* The JFFS raw inode structure: Used for storage on physical media.  */
-/* Perhaps the uid, gid, atime, mtime and ctime members should have
-   more space due to future changes in the Linux kernel. Anyhow, since
-   a user of this filesystem probably have to fix a large number of
-   other things, we have decided to not be forward compatible.  */
-struct jffs_raw_inode
-{
-        __u32 magic;      /* A constant magic number.  */
-        __u32 ino;        /* Inode number.  */
-        __u32 pino;       /* Parent's inode number.  */
-        __u32 version;    /* Version number.  */
-        __u32 mode;       /* The file's type or mode.  */
-        __u16 uid;        /* The file's owner.  */
-        __u16 gid;        /* The file's group.  */
-        __u32 atime;      /* Last access time.  */
-        __u32 mtime;      /* Last modification time.  */
-        __u32 ctime;      /* Creation time.  */
-        __u32 offset;     /* Where to begin to write.  */
-        __u32 dsize;      /* Size of the node's data.  */
-        __u32 rsize;      /* How much are going to be replaced?  */
-        __u8 nsize;       /* Name length.  */
-        __u8 nlink;       /* Number of links.  */
-        __u8 spare : 6;   /* For future use.  */
-        __u8 rename : 1;  /* Rename to a name of an already existing file?  */
-        __u8 deleted : 1; /* Has this file been deleted?  */
-        __u8 accurate;    /* The inode is obsolete if accurate == 0.  */
-        __u32 dchksum;    /* Checksum for the data.  */
-        __u16 nchksum;    /* Checksum for the name.  */
-        __u16 chksum;     /* Checksum for the raw inode.  */
-};
-/* Define the offset of the accurate byte in struct jffs_raw_inode.  */
-#define JFFS_RAW_INODE_ACCURATE_OFFSET (sizeof(struct jffs_raw_inode) \
-                                        - 2 * sizeof(__u32) - sizeof(__u8))
-/* Define the offset of the chksum member in struct jffs_raw_inode.  */
-#define JFFS_RAW_INODE_CHKSUM_OFFSET (sizeof(struct jffs_raw_inode) \
-                                      - sizeof(__u16))
-/* Define the offset of the dchksum member in struct jffs_raw_inode.  */
-#define JFFS_RAW_INODE_DCHKSUM_OFFSET (sizeof(struct jffs_raw_inode)   \
-                                       - sizeof(__u16) - sizeof(__u16) \
-                                       - sizeof(__u32))
-/* The RAM representation of the node.  The names of pointers to
-   jffs_nodes are very often just called `n' in the source code.  */
-struct jffs_node
-{
-        __u32 ino;          /* Inode number.  */
-        __u32 version;      /* Version number.  */
-        __u32 data_offset;  /* Logic location of the data to insert.  */
-        __u32 data_size;    /* The amount of data this node inserts.  */
-        __u32 removed_size; /* The amount of data that this node removes.  */
-        __u32 fm_offset;    /* Physical location of the data in the actual
-                               flash memory data chunk.  */
-        __u8 name_size;     /* Size of the name.  */
-        struct jffs_fm *fm; /* Physical memory information.  */
-        struct jffs_node *version_prev;
-        struct jffs_node *version_next;
-        struct jffs_node *range_prev;
-        struct jffs_node *range_next;
-};
-/* The RAM representation of a file (plain files, directories,
-   links, etc.).  Pointers to jffs_files are normally named `f'
-   in the JFFS source code.  */
-struct jffs_file
-{
-        __u32 ino;    /* Inode number.  */
-        __u32 pino;   /* Parent's inode number.  */
-        __u32 mode;   /* file_type, mode  */
-        __u16 uid;    /* owner  */
-        __u16 gid;    /* group  */
-        __u32 atime;  /* Last access time.  */
-        __u32 mtime;  /* Last modification time.  */
-        __u32 ctime;  /* Creation time.  */
-        __u8 nsize;   /* Name length.  */
-        __u8 nlink;   /* Number of links.  */
-        __u8 deleted; /* Has this file been deleted?  */
-        char *name;   /* The name of this file; NULL-terminated.  */
-        __u32 size;   /* The total size of the file's data.  */
-        __u32 highest_version; /* The highest version number of this file.  */
-        struct jffs_control *c;
-        struct jffs_file *parent;   /* Reference to the parent directory.  */
-        struct jffs_file *children; /* Always NULL for plain files.  */
-        struct jffs_file *sibling_prev; /* Siblings in the same directory.  */
-        struct jffs_file *sibling_next;
-        struct list_head hash;    /* hash list.  */
-        struct jffs_node *range_head;   /* The final data.  */
-        struct jffs_node *range_tail;   /* The first data.  */
-        struct jffs_node *version_head; /* The youngest node.  */
-        struct jffs_node *version_tail; /* The oldest node.  */
-};
-/* This is just a definition of a simple list used for keeping track of
-   files deleted due to a rename.  This list is only used during the
-   mounting of the file system and only if there have been rename operations
-   earlier.  */
-struct jffs_delete_list
-{
-        __u32 ino;
-        struct jffs_delete_list *next;
-};
-/* A struct for the overall file system control.  Pointers to
-   jffs_control structs are named `c' in the source code.  */
-struct jffs_control
-{
-        struct super_block *sb;         /* Reference to the VFS super block.  */
-        struct jffs_file *root;         /* The root directory file.  */
-        struct list_head *hash;         /* Hash table for finding files by ino.  */
-        struct jffs_fmcontrol *fmc;     /* Flash memory control structure.  */
-        __u32 hash_len;                 /* The size of the hash table.  */
-        __u32 next_ino;                 /* Next inode number to use for new files.  */
-        __u16 building_fs;              /* Is the file system being built right now?  */
-        struct jffs_delete_list *delete_list; /* Track deleted files.  */
-        pid_t thread_pid;               /* GC thread's PID */
-        struct task_struct *gc_task;    /* GC task struct */
-        struct completion gc_thread_comp; /* GC thread exit mutex */
-        __u32 gc_minfree_threshold;     /* GC trigger thresholds */
-        __u32 gc_maxdirty_threshold;
-};
-/* Used to inform about flash status.  */
-struct jffs_flash_status
-{
-        __u32 size;
-        __u32 used;
-        __u32 dirty;
-        __u32 begin;
-        __u32 end;
-};
-/* This stuff could be used for finding memory leaks.  */
-#define JFFS_MEMORY_DEBUG 0
-extern long no_jffs_node;
-#if defined(JFFS_MEMORY_DEBUG) && JFFS_MEMORY_DEBUG
-extern long no_jffs_control;
-extern long no_jffs_raw_inode;
-extern long no_jffs_node_ref;
-extern long no_jffs_fm;
-extern long no_jffs_fmcontrol;
-extern long no_hash;
-extern long no_name;
-#define DJM(x) x
-#else
-#define DJM(x)
-#endif
-#endif /* __LINUX_JFFS_H__ */
diff --git a/include/linux/jiffies.h b/include/linux/jiffies.h
index 0ec6e28bccd2..c080f61fb024 100644
--- a/include/linux/jiffies.h
+++ b/include/linux/jiffies.h
@@ -142,13 +142,13 @@ static inline u64 get_jiffies_64(void)
 *
 * And some not so obvious.
 *
- * Note that we don't want to return MAX_LONG, because
+ * Note that we don't want to return LONG_MAX, because
 * for various timeout reasons we often end up having
 * to wait "jiffies+1" in order to guarantee that we wait
 * at _least_ "jiffies" - so "jiffies+1" had better still
 * be positive.
 */
-#define MAX_JIFFY_OFFSET ((~0UL >> 1)-1)
+#define MAX_JIFFY_OFFSET ((LONG_MAX >> 1)-1)
 /*
 * We want to do realistic conversions of time so we need to use the same
@@ -259,207 +259,23 @@ static inline u64 get_jiffies_64(void)
 #endif
 /*
- * Convert jiffies to milliseconds and back.
+ * Convert various time units to each other:
- *
- * Avoid unnecessary multiplications/divisions in the
- * two most common HZ cases:
- */
-static inline unsigned int jiffies_to_msecs(const unsigned long j)
-{
-#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
-        return (MSEC_PER_SEC / HZ) * j;
-#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
-        return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
-#else
-        return (j * MSEC_PER_SEC) / HZ;
-#endif
-}
-static inline unsigned int jiffies_to_usecs(const unsigned long j)
-{
-#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ)
-        return (USEC_PER_SEC / HZ) * j;
-#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC)
-        return (j + (HZ / USEC_PER_SEC) - 1)/(HZ / USEC_PER_SEC);
-#else
-        return (j * USEC_PER_SEC) / HZ;
-#endif
-}
-static inline unsigned long msecs_to_jiffies(const unsigned int m)
-{
-        if (m > jiffies_to_msecs(MAX_JIFFY_OFFSET))
-                return MAX_JIFFY_OFFSET;
-#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
-        return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ);
-#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
-        return m * (HZ / MSEC_PER_SEC);
-#else
-        return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC;
-#endif
-}
-static inline unsigned long usecs_to_jiffies(const unsigned int u)
-{
-        if (u > jiffies_to_usecs(MAX_JIFFY_OFFSET))
-                return MAX_JIFFY_OFFSET;
-#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ)
-        return (u + (USEC_PER_SEC / HZ) - 1) / (USEC_PER_SEC / HZ);
-#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC)
-        return u * (HZ / USEC_PER_SEC);
-#else
-        return (u * HZ + USEC_PER_SEC - 1) / USEC_PER_SEC;
-#endif
-}
-/*
- * The TICK_NSEC - 1 rounds up the value to the next resolution.  Note
- * that a remainder subtract here would not do the right thing as the
- * resolution values don't fall on second boundries.  I.e. the line:
- * nsec -= nsec % TICK_NSEC; is NOT a correct resolution rounding.
- *
- * Rather, we just shift the bits off the right.
- *
- * The >> (NSEC_JIFFIE_SC - SEC_JIFFIE_SC) converts the scaled nsec
- * value to a scaled second value.
- */
-static __inline__ unsigned long
-timespec_to_jiffies(const struct timespec *value)
-{
-        unsigned long sec = value->tv_sec;
-        long nsec = value->tv_nsec + TICK_NSEC - 1;
-        if (sec >= MAX_SEC_IN_JIFFIES){
-                sec = MAX_SEC_IN_JIFFIES;
-                nsec = 0;
-        }
-        return (((u64)sec * SEC_CONVERSION) +
-                (((u64)nsec * NSEC_CONVERSION) >>
-                 (NSEC_JIFFIE_SC - SEC_JIFFIE_SC))) >> SEC_JIFFIE_SC;
-}
-static __inline__ void
-jiffies_to_timespec(const unsigned long jiffies, struct timespec *value)
-{
-        /*
-         * Convert jiffies to nanoseconds and separate with
-         * one divide.
-         */
-        u64 nsec = (u64)jiffies * TICK_NSEC;
-        value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_nsec);
-}
-/* Same for "timeval"
- *
- * Well, almost.  The problem here is that the real system resolution is
- * in nanoseconds and the value being converted is in micro seconds.
- * Also for some machines (those that use HZ = 1024, in-particular),
- * there is a LARGE error in the tick size in microseconds.
- * The solution we use is to do the rounding AFTER we convert the
- * microsecond part.  Thus the USEC_ROUND, the bits to be shifted off.
- * Instruction wise, this should cost only an additional add with carry
- * instruction above the way it was done above.
- */
-static __inline__ unsigned long
-timeval_to_jiffies(const struct timeval *value)
-{
-        unsigned long sec = value->tv_sec;
-        long usec = value->tv_usec;
-        if (sec >= MAX_SEC_IN_JIFFIES){
-                sec = MAX_SEC_IN_JIFFIES;
-                usec = 0;
-        }
-        return (((u64)sec * SEC_CONVERSION) +
-                (((u64)usec * USEC_CONVERSION + USEC_ROUND) >>
-                 (USEC_JIFFIE_SC - SEC_JIFFIE_SC))) >> SEC_JIFFIE_SC;
-}
-static __inline__ void
-jiffies_to_timeval(const unsigned long jiffies, struct timeval *value)
-{
-        /*
-         * Convert jiffies to nanoseconds and separate with
-         * one divide.
-         */
-        u64 nsec = (u64)jiffies * TICK_NSEC;
-        long tv_usec;
-        value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tv_usec);
-        tv_usec /= NSEC_PER_USEC;
-        value->tv_usec = tv_usec;
-}
-/*
- * Convert jiffies/jiffies_64 to clock_t and back.
 */
-static inline clock_t jiffies_to_clock_t(long x)
+extern unsigned int jiffies_to_msecs(const unsigned long j);
-{
+extern unsigned int jiffies_to_usecs(const unsigned long j);
-#if (TICK_NSEC % (NSEC_PER_SEC / USER_HZ)) == 0
+extern unsigned long msecs_to_jiffies(const unsigned int m);
-        return x / (HZ / USER_HZ);
+extern unsigned long usecs_to_jiffies(const unsigned int u);
-#else
+extern unsigned long timespec_to_jiffies(const struct timespec *value);
-        u64 tmp = (u64)x * TICK_NSEC;
+extern void jiffies_to_timespec(const unsigned long jiffies,
-        do_div(tmp, (NSEC_PER_SEC / USER_HZ));
+                                struct timespec *value);
-        return (long)tmp;
+extern unsigned long timeval_to_jiffies(const struct timeval *value);
-#endif
+extern void jiffies_to_timeval(const unsigned long jiffies,
-}
+                               struct timeval *value);
+extern clock_t jiffies_to_clock_t(long x);
-static inline unsigned long clock_t_to_jiffies(unsigned long x)
+extern unsigned long clock_t_to_jiffies(unsigned long x);
-{
+extern u64 jiffies_64_to_clock_t(u64 x);
-#if (HZ % USER_HZ)==0
+extern u64 nsec_to_clock_t(u64 x);
-        if (x >= ~0UL / (HZ / USER_HZ))
-                return ~0UL;
+#define TIMESTAMP_SIZE  30
-        return x * (HZ / USER_HZ);
-#else
-        u64 jif;
-        /* Don't worry about loss of precision here .. */
-        if (x >= ~0UL / HZ * USER_HZ)
-                return ~0UL;
-        /* .. but do try to contain it here */
-        jif = x * (u64) HZ;
-        do_div(jif, USER_HZ);
-        return jif;
-#endif
-}
-static inline u64 jiffies_64_to_clock_t(u64 x)
-{
-#if (TICK_NSEC % (NSEC_PER_SEC / USER_HZ)) == 0
-        do_div(x, HZ / USER_HZ);
-#else
-        /*
-         * There are better ways that don't overflow early,
-         * but even this doesn't overflow in hundreds of years
-         * in 64 bits, so..
-         */
-        x *= TICK_NSEC;
-        do_div(x, (NSEC_PER_SEC / USER_HZ));
-#endif
-        return x;
-}
-static inline u64 nsec_to_clock_t(u64 x)
-{
-#if (NSEC_PER_SEC % USER_HZ) == 0
-        do_div(x, (NSEC_PER_SEC / USER_HZ));
-#elif (USER_HZ % 512) == 0
-        x *= USER_HZ/512;
-        do_div(x, (NSEC_PER_SEC / 512));
-#else
-        /*
-         * max relative error 5.7e-8 (1.8s per year) for USER_HZ <= 1024,
-         * overflow after 64.99 years.
-         * exact for HZ=60, 72, 90, 120, 144, 180, 300, 600, 900, ...
-         */
-        x *= 9;
-        do_div(x, (unsigned long)((9ull * NSEC_PER_SEC + (USER_HZ/2))
-                                  / USER_HZ));
-#endif
-        return x;
-}
 #endif
diff --git a/include/linux/kdev_t.h b/include/linux/kdev_t.h
index bceea527dd37..4c2c3737e415 100644
--- a/include/linux/kdev_t.h
+++ b/include/linux/kdev_t.h
@@ -87,6 +87,7 @@ static inline unsigned sysv_minor(u32 dev)
        return dev & 0x3ffff;
 }
+bool is_lanana_major(unsigned int major);
 #else /* __KERNEL__ */
diff --git a/include/linux/kexec.h b/include/linux/kexec.h
index d02425cdd801..696e5ec63f77 100644
--- a/include/linux/kexec.h
+++ b/include/linux/kexec.h
@@ -125,6 +125,7 @@ extern struct kimage *kexec_crash_image;
 #define KEXEC_ARCH_PPC     (20 << 16)
 #define KEXEC_ARCH_PPC64   (21 << 16)
 #define KEXEC_ARCH_IA_64   (50 << 16)
+#define KEXEC_ARCH_ARM     (40 << 16)
 #define KEXEC_ARCH_S390    (22 << 16)
 #define KEXEC_ARCH_SH      (42 << 16)
 #define KEXEC_ARCH_MIPS_LE (10 << 16)
diff --git a/include/linux/kmod.h b/include/linux/kmod.h
index 10f505c8431d..cc8e674ae27a 100644
--- a/include/linux/kmod.h
+++ b/include/linux/kmod.h
@@ -28,8 +28,10 @@
 #ifdef CONFIG_KMOD
 /* modprobe exit status on success, -ve on error.  Return value
 * usually useless though. */
+extern void kmod_sysfs_init(void);
 extern int request_module(const char * name, ...) __attribute__ ((format (printf, 1, 2)));
 #else
+static inline void kmod_sysfs_init(void) {};
 static inline int request_module(const char * name, ...) { return -ENOSYS; }
 #endif
diff --git a/include/linux/ks0108.h b/include/linux/ks0108.h
index 8047d4b17bf1..a2c54acceb4e 100644
--- a/include/linux/ks0108.h
+++ b/include/linux/ks0108.h
@@ -43,4 +43,7 @@ extern void ks0108_address(unsigned char address);
 /* Set the controller's current page (0..7) */
 extern void ks0108_page(unsigned char page);
+/* Is the module inited? */
+extern unsigned char ks0108_isinited(void);
 #endif /* _KS0108_H_ */
diff --git a/include/linux/ktime.h b/include/linux/ktime.h
index 7444a6326231..c68c7ac6b232 100644
--- a/include/linux/ktime.h
+++ b/include/linux/ktime.h
@@ -261,8 +261,7 @@ static inline s64 ktime_to_ns(const ktime_t kt)
 * idea of the (in)accuracy of timers. Timer values are rounded up to
 * this resolution values.
 */
-#define KTIME_REALTIME_RES      (ktime_t){ .tv64 = TICK_NSEC }
+#define KTIME_LOW_RES           (ktime_t){ .tv64 = TICK_NSEC }
-#define KTIME_MONOTONIC_RES     (ktime_t){ .tv64 = TICK_NSEC }
 /* Get the monotonic time in timespec format: */
 extern void ktime_get_ts(struct timespec *ts);
diff --git a/include/linux/lcd.h b/include/linux/lcd.h
index d739b2e7eac2..598793c0745b 100644
--- a/include/linux/lcd.h
+++ b/include/linux/lcd.h
@@ -9,22 +9,38 @@
 #define _LINUX_LCD_H
 #include <linux/device.h>
+#include <linux/mutex.h>
 #include <linux/notifier.h>
+/* Notes on locking:
+ *
+ * lcd_device->ops_lock is an internal backlight lock protecting the ops
+ * field and no code outside the core should need to touch it.
+ *
+ * Access to set_power() is serialised by the update_lock mutex since
+ * most drivers seem to need this and historically get it wrong.
+ *
+ * Most drivers don't need locking on their get_power() method.
+ * If yours does, you need to implement it in the driver. You can use the
+ * update_lock mutex if appropriate.
+ *
+ * Any other use of the locks below is probably wrong.
+ */
 struct lcd_device;
 struct fb_info;
-/* This structure defines all the properties of a LCD flat panel. */
 struct lcd_properties {
-        /* Owner module */
+        /* The maximum value for contrast (read-only) */
-        struct module *owner;
+        int max_contrast;
+};
+struct lcd_ops {
        /* Get the LCD panel power status (0: full on, 1..3: controller
           power on, flat panel power off, 4: full off), see FB_BLANK_XXX */
        int (*get_power)(struct lcd_device *);
        /* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */
        int (*set_power)(struct lcd_device *, int power);
-        /* The maximum value for contrast (read-only) */
-        int max_contrast;
        /* Get the current contrast setting (0-max_contrast) */
        int (*get_contrast)(struct lcd_device *);
        /* Set LCD panel contrast */
@@ -35,20 +51,31 @@ struct lcd_properties {
 };
 struct lcd_device {
-        /* This protects the 'props' field. If 'props' is NULL, the driver that
+        struct lcd_properties props;
+        /* This protects the 'ops' field. If 'ops' is NULL, the driver that
           registered this device has been unloaded, and if class_get_devdata()
           points to something in the body of that driver, it is also invalid. */
-        struct semaphore sem;
+        struct mutex ops_lock;
        /* If this is NULL, the backing module is unloaded */
-        struct lcd_properties *props;
+        struct lcd_ops *ops;
+        /* Serialise access to set_power method */
+        struct mutex update_lock;
        /* The framebuffer notifier block */
        struct notifier_block fb_notif;
        /* The class device structure */
        struct class_device class_dev;
 };
+static inline void lcd_set_power(struct lcd_device *ld, int power)
+{
+        mutex_lock(&ld->update_lock);
+        if (ld->ops && ld->ops->set_power)
+                ld->ops->set_power(ld, power);
+        mutex_unlock(&ld->update_lock);
+}
 extern struct lcd_device *lcd_device_register(const char *name,
-        void *devdata, struct lcd_properties *lp);
+        void *devdata, struct lcd_ops *ops);
 extern void lcd_device_unregister(struct lcd_device *ld);
 #define to_lcd_device(obj) container_of(obj, struct lcd_device, class_dev)
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 596e0c18887d..86762a9f52ba 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -35,6 +35,7 @@
 #include <linux/ata.h>
 #include <linux/workqueue.h>
 #include <scsi/scsi_host.h>
+#include <linux/acpi.h>
 /*
 * Define if arch has non-standard setup.  This is a _PCI_ standard
@@ -172,6 +173,7 @@ enum {
        ATA_FLAG_DEBUGMSG       = (1 << 13),
        ATA_FLAG_SETXFER_POLLING= (1 << 14), /* use polling for SETXFER */
        ATA_FLAG_IGN_SIMPLEX    = (1 << 15), /* ignore SIMPLEX */
+        ATA_FLAG_NO_IORDY       = (1 << 16), /* controller lacks iordy */
        /* The following flag belongs to ap->pflags but is kept in
         * ap->flags because it's referenced in many LLDs and will be
@@ -494,6 +496,10 @@ struct ata_device {
        /* error history */
        struct ata_ering        ering;
        unsigned int            horkage;        /* List of broken features */
+#ifdef CONFIG_SATA_ACPI
+        /* ACPI objects info */
+        acpi_handle obj_handle;
+#endif
 };
 /* Offset into struct ata_device.  Fields above it are maintained
diff --git a/include/linux/log2.h b/include/linux/log2.h
index 99922bedfcc9..57e641e19a81 100644
--- a/include/linux/log2.h
+++ b/include/linux/log2.h
@@ -152,7 +152,7 @@ unsigned long __roundup_pow_of_two(unsigned long n)
 * roundup_pow_of_two - round the given value up to nearest power of two
 * @n - parameter
 *
- * round the given balue up to the nearest power of two
+ * round the given value up to the nearest power of two
 * - the result is undefined when n == 0
 * - this can be used to initialise global variables from constant data
 */
diff --git a/include/linux/minix_fs.h b/include/linux/minix_fs.h
index 9850d513ff60..0e39745f5111 100644
--- a/include/linux/minix_fs.h
+++ b/include/linux/minix_fs.h
@@ -78,8 +78,7 @@ struct minix_super_block {
 * V3 minix super-block data on disk
 */
 struct minix3_super_block {
-        __u16 s_ninodes;
+        __u32 s_ninodes;
-        __u16 s_nzones;
        __u16 s_pad0;
        __u16 s_imap_blocks;
        __u16 s_zmap_blocks;
diff --git a/include/linux/module.h b/include/linux/module.h
index 419d3ef293dd..95679eb8571e 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -76,8 +76,6 @@ void sort_extable(struct exception_table_entry *start,
                  struct exception_table_entry *finish);
 void sort_main_extable(void);
-extern struct subsystem module_subsys;
 #ifdef MODULE
 #define MODULE_GENERIC_TABLE(gtype,name)                        \
 extern const struct gtype##_id __mod_##gtype##_table            \
@@ -467,10 +465,6 @@ int unregister_module_notifier(struct notifier_block * nb);
 extern void print_modules(void);
-struct device_driver;
-void module_add_driver(struct module *, struct device_driver *);
-void module_remove_driver(struct device_driver *);
 #else /* !CONFIG_MODULES... */
 #define EXPORT_SYMBOL(sym)
 #define EXPORT_SYMBOL_GPL(sym)
@@ -568,18 +562,59 @@ static inline void print_modules(void)
 {
 }
+#endif /* CONFIG_MODULES */
 struct device_driver;
+#ifdef CONFIG_SYSFS
 struct module;
-static inline void module_add_driver(struct module *module, struct device_driver *driver)
+extern struct subsystem module_subsys;
+int mod_sysfs_init(struct module *mod);
+int mod_sysfs_setup(struct module *mod,
+                           struct kernel_param *kparam,
+                           unsigned int num_params);
+int module_add_modinfo_attrs(struct module *mod);
+void module_remove_modinfo_attrs(struct module *mod);
+#else /* !CONFIG_SYSFS */
+static inline int mod_sysfs_init(struct module *mod)
 {
+        return 0;
 }
-static inline void module_remove_driver(struct device_driver *driver)
+static inline int mod_sysfs_setup(struct module *mod,
+                           struct kernel_param *kparam,
+                           unsigned int num_params)
 {
+        return 0;
 }
-#endif /* CONFIG_MODULES */
+static inline int module_add_modinfo_attrs(struct module *mod)
+{
+        return 0;
+}
+static inline void module_remove_modinfo_attrs(struct module *mod)
+{ }
+#endif /* CONFIG_SYSFS */
+#if defined(CONFIG_SYSFS) && defined(CONFIG_MODULES)
+void module_add_driver(struct module *mod, struct device_driver *drv);
+void module_remove_driver(struct device_driver *drv);
+#else /* not both CONFIG_SYSFS && CONFIG_MODULES */
+static inline void module_add_driver(struct module *mod, struct device_driver *drv)
+{ }
+static inline void module_remove_driver(struct device_driver *drv)
+{ }
+#endif
 #define symbol_request(x) try_then_request_module(symbol_get(x), "symbol:" #x)
diff --git a/include/linux/moduleparam.h b/include/linux/moduleparam.h
index 4a189dadb160..c83588c8d08b 100644
--- a/include/linux/moduleparam.h
+++ b/include/linux/moduleparam.h
@@ -59,7 +59,7 @@ struct kparam_array
 };
 /* This is the fundamental function for registering boot/module
-   parameters.  perm sets the visibility in driverfs: 000 means it's
+   parameters.  perm sets the visibility in sysfs: 000 means it's
   not there, read bits mean it's readable, write bits mean it's
   writable. */
 #define __module_param_call(prefix, name, set, get, arg, perm)          \
@@ -169,10 +169,22 @@ extern int param_get_string(char *buffer, struct kernel_param *kp);
 struct module;
+#if defined(CONFIG_SYSFS) && defined(CONFIG_MODULES)
 extern int module_param_sysfs_setup(struct module *mod,
                                    struct kernel_param *kparam,
                                    unsigned int num_params);
 extern void module_param_sysfs_remove(struct module *mod);
+#else
+static inline int module_param_sysfs_setup(struct module *mod,
+                             struct kernel_param *kparam,
+                             unsigned int num_params)
+{
+        return 0;
+}
+static inline void module_param_sysfs_remove(struct module *mod)
+{ }
+#endif
 #endif /* _LINUX_MODULE_PARAMS_H */
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index 1221b7c44158..fff8c53e5434 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -92,6 +92,13 @@ struct nand_bbt_descr {
 */
 #define ONENAND_BADBLOCK_POS    0
+/*
+ * Bad block scanning errors
+ */
+#define ONENAND_BBT_READ_ERROR          1
+#define ONENAND_BBT_READ_ECC_ERROR      2
+#define ONENAND_BBT_READ_FATAL_ERROR    4
 /**
 * struct bbm_info - [GENERIC] Bad Block Table data structure
 * @bbt_erase_shift:    [INTERN] number of address bits in a bbt entry
diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h
index 28d461d862bd..81f3a314dd76 100644
--- a/include/linux/mtd/map.h
+++ b/include/linux/mtd/map.h
@@ -183,7 +183,7 @@ typedef union {
 struct map_info {
        char *name;
        unsigned long size;
-        unsigned long phys;
+        resource_size_t phys;
 #define NO_XIP (-1UL)
        void __iomem *virt;
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index d644e57703ad..6a8570be331b 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -85,6 +85,10 @@ typedef enum {
 *              mode = MTD_OOB_PLACE)
 * @datbuf:     data buffer - if NULL only oob data are read/written
 * @oobbuf:     oob data buffer
+ *
+ * Note, it is allowed to read more then one OOB area at one go, but not write.
+ * The interface assumes that the OOB write requests program only one page's
+ * OOB area.
 */
 struct mtd_oob_ops {
        mtd_oob_mode_t  mode;
@@ -117,18 +121,6 @@ struct mtd_info {
        u_int32_t writesize;
        u_int32_t oobsize;   // Amount of OOB data per block (e.g. 16)
-        u_int32_t ecctype;
-        u_int32_t eccsize;
-        /*
-         * Reuse some of the above unused fields in the case of NOR flash
-         * with configurable programming regions to avoid modifying the
-         * user visible structure layout/size.  Only valid when the
-         * MTD_PROGRAM_REGIONS flag is set.
-         * (Maybe we should have an union for those?)
-         */
-#define MTD_PROGREGION_CTRLMODE_VALID(mtd)  (mtd)->oobsize
-#define MTD_PROGREGION_CTRLMODE_INVALID(mtd)  (mtd)->ecctype
        // Kernel-only stuff starts here.
        char *name;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 2071b02f0526..97523887fe5d 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -343,6 +343,7 @@ struct nand_buffers {
 * @options:            [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
 *                      special functionality. See the defines for further explanation
 * @badblockpos:        [INTERN] position of the bad block marker in the oob area
+ * @cellinfo:           [INTERN] MLC/multichip data from chip ident
 * @numchips:           [INTERN] number of physical chips
 * @chipsize:           [INTERN] the size of one chip for multichip arrays
 * @pagemask:           [INTERN] page number mask = number of (pages / chip) - 1
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index f775a7af3890..d8af8a95e58d 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -1,7 +1,7 @@
 /*
 *  linux/include/linux/mtd/onenand.h
 *
- *  Copyright (C) 2005-2006 Samsung Electronics
+ *  Copyright (C) 2005-2007 Samsung Electronics
 *  Kyungmin Park <kyungmin.park@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
@@ -42,14 +42,10 @@ typedef enum {
 /**
 * struct onenand_bufferram - OneNAND BufferRAM Data
- * @block:              block address in BufferRAM
+ * @blockpage:          block & page address in BufferRAM
- * @page:               page address in BufferRAM
- * @valid:              valid flag
 */
 struct onenand_bufferram {
-        int block;
+        int     blockpage;
-        int page;
-        int valid;
 };
 /**
@@ -63,7 +59,6 @@ struct onenand_bufferram {
 *                      partly be set to inform onenand_scan about
 * @erase_shift:        [INTERN] number of address bits in a block
 * @page_shift:         [INTERN] number of address bits in a page
- * @ppb_shift:          [INTERN] number of address bits in a pages per block
 * @page_mask:          [INTERN] a page per block mask
 * @bufferram_index:    [INTERN] BufferRAM index
 * @bufferram:          [INTERN] BufferRAM info
@@ -103,7 +98,6 @@ struct onenand_chip {
        unsigned int            erase_shift;
        unsigned int            page_shift;
-        unsigned int            ppb_shift;      /* Pages per block shift */
        unsigned int            page_mask;
        unsigned int            bufferram_index;
@@ -150,6 +144,9 @@ struct onenand_chip {
 #define ONENAND_SET_SYS_CFG1(v, this)                                   \
        (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
+#define ONENAND_IS_DDP(this)                                            \
+        (this->device_id & ONENAND_DEVICE_IS_DDP)
 /* Check byte access in OneNAND */
 #define ONENAND_CHECK_BYTE_ACCESS(addr)         (addr & 0x1)
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index e31c8f5d4271..af94719890e7 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -3,7 +3,8 @@
 *
 *  OneNAND Register header file
 *
- *  Copyright (C) 2005-2006 Samsung Electronics
+ *  Copyright (C) 2005-2007 Samsung Electronics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
@@ -80,9 +81,11 @@
 #define ONENAND_VERSION_PROCESS_SHIFT   (8)
 /*
- * Start Address 1 F100h (R/W)
+ * Start Address 1 F100h (R/W) & Start Address 2 F101h (R/W)
 */
 #define ONENAND_DDP_SHIFT               (15)
+#define ONENAND_DDP_CHIP0               (0)
+#define ONENAND_DDP_CHIP1               (1 << ONENAND_DDP_SHIFT)
 /*
 * Start Address 8 F107h (R/W)
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index 86831e3594f6..0dc07d5f3354 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -18,9 +18,10 @@
 #define __LINUX_MTD_PHYSMAP__
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
+struct map_info;
 struct physmap_flash_data {
        unsigned int            width;
        void                    (*set_vpp)(struct map_info *, int);
diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h
index db05182ca0e8..1be5be88debe 100644
--- a/include/linux/nfs4.h
+++ b/include/linux/nfs4.h
@@ -105,12 +105,11 @@ struct nfs4_ace {
        uint32_t        access_mask;
        int             whotype;
        uid_t           who;
-        struct list_head l_ace;
 };
 struct nfs4_acl {
        uint32_t        naces;
-        struct list_head ace_head;
+        struct nfs4_ace aces[0];
 };
 typedef struct { char data[NFS4_VERIFIER_SIZE]; } nfs4_verifier;
diff --git a/include/linux/nfs4_acl.h b/include/linux/nfs4_acl.h
index 22aff4d01f20..409b6e02f337 100644
--- a/include/linux/nfs4_acl.h
+++ b/include/linux/nfs4_acl.h
@@ -39,9 +39,12 @@
 #include <linux/posix_acl.h>
-struct nfs4_acl *nfs4_acl_new(void);
+/* Maximum ACL we'll accept from client; chosen (somewhat arbitrarily) to
-void nfs4_acl_free(struct nfs4_acl *);
+ * fit in a page: */
-int nfs4_acl_add_ace(struct nfs4_acl *, u32, u32, u32, int, uid_t);
+#define NFS4_ACL_MAX 170
+struct nfs4_acl *nfs4_acl_new(int);
+void nfs4_acl_add_ace(struct nfs4_acl *, u32, u32, u32, int, uid_t);
 int nfs4_acl_get_whotype(char *, u32);
 int nfs4_acl_write_who(int who, char *p);
 int nfs4_acl_permission(struct nfs4_acl *acl, uid_t owner, gid_t group,
diff --git a/include/linux/nmi.h b/include/linux/nmi.h
index acb4ed130247..29af2d5df097 100644
--- a/include/linux/nmi.h
+++ b/include/linux/nmi.h
@@ -17,8 +17,15 @@
 #ifdef ARCH_HAS_NMI_WATCHDOG
 #include <asm/nmi.h>
 extern void touch_nmi_watchdog(void);
+extern void acpi_nmi_disable(void);
+extern void acpi_nmi_enable(void);
 #else
-# define touch_nmi_watchdog() touch_softlockup_watchdog()
+static inline void touch_nmi_watchdog(void)
+{
+        touch_softlockup_watchdog();
+}
+static inline void acpi_nmi_disable(void) { }
+static inline void acpi_nmi_enable(void) { }
 #endif
 #ifndef trigger_all_cpu_backtrace
diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h
index b1063e9cdb1b..52c54a5720f3 100644
--- a/include/linux/nodemask.h
+++ b/include/linux/nodemask.h
@@ -352,7 +352,7 @@ extern nodemask_t node_possible_map;
 #define node_possible(node)     node_isset((node), node_possible_map)
 #define first_online_node       first_node(node_online_map)
 #define next_online_node(nid)   next_node((nid), node_online_map)
-int highest_possible_node_id(void);
+extern int nr_node_ids;
 #else
 #define num_online_nodes()      1
 #define num_possible_nodes()    1
@@ -360,7 +360,7 @@ int highest_possible_node_id(void);
 #define node_possible(node)     ((node) == 0)
 #define first_online_node       0
 #define next_online_node(nid)   (MAX_NUMNODES)
-#define highest_possible_node_id()      0
+#define nr_node_ids             1
 #endif
 #define any_online_node(mask)                   \
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 98c8765a488e..2c4b6842dfb9 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -854,5 +854,8 @@ extern int pci_pci_problems;
 #define PCIPCI_ALIMAGIK         32      /* Need low latency setting */
 #define PCIAGP_FAIL             64      /* No PCI to AGP DMA */
+extern unsigned long pci_cardbus_io_size;
+extern unsigned long pci_cardbus_mem_size;
 #endif /* __KERNEL__ */
 #endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 182a96f77c84..600308fdf9ce 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2089,6 +2089,7 @@
 #define PCI_VENDOR_ID_PASEMI            0x1959
 #define PCI_VENDOR_ID_ATTANSIC          0x1969
+#define PCI_DEVICE_ID_ATTANSIC_L1       0x1048
 #define PCI_VENDOR_ID_JMICRON           0x197B
 #define PCI_DEVICE_ID_JMICRON_JMB360    0x2360
diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h
index 6b0648cfdffc..52c9eb9b6df2 100644
--- a/include/linux/seqlock.h
+++ b/include/linux/seqlock.h
@@ -2,7 +2,7 @@
 #define __LINUX_SEQLOCK_H
 /*
 * Reader/writer consistent mechanism without starving writers. This type of
- * lock for data where the reader wants a consitent set of information
+ * lock for data where the reader wants a consistent set of information
 * and is willing to retry if the information changes.  Readers never
 * block but they may have to retry if a writer is in
 * progress. Writers do not wait for readers. 
diff --git a/include/linux/serio.h b/include/linux/serio.h
index ac2c70e7f760..1ebf0455e224 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -108,12 +108,6 @@ static inline void serio_drv_write_wakeup(struct serio *serio)
                serio->drv->write_wakeup(serio);
 }
-static inline void serio_cleanup(struct serio *serio)
-{
-        if (serio->drv && serio->drv->cleanup)
-                serio->drv->cleanup(serio);
-}
 /*
 * Use the following functions to manipulate serio's per-port
 * driver-specific data.
diff --git a/include/linux/sm501-regs.h b/include/linux/sm501-regs.h
new file mode 100644
index 000000000000..cc9be4a11861
--- /dev/null
+++ b/include/linux/sm501-regs.h
@@ -0,0 +1,357 @@
+/* sm501-regs.h
+ *
+ * Copyright 2006 Simtec Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Silicon Motion SM501 register definitions
+*/
+/* System Configuration area */
+/* System config base */
+#define SM501_SYS_CONFIG                (0x000000)
+/* config 1 */
+#define SM501_SYSTEM_CONTROL            (0x000000)
+#define SM501_MISC_CONTROL              (0x000004)
+#define SM501_MISC_BUS_SH               (0x0)
+#define SM501_MISC_BUS_PCI              (0x1)
+#define SM501_MISC_BUS_XSCALE           (0x2)
+#define SM501_MISC_BUS_NEC              (0x6)
+#define SM501_MISC_BUS_MASK             (0x7)
+#define SM501_MISC_VR_62MB              (1<<3)
+#define SM501_MISC_CDR_RESET            (1<<7)
+#define SM501_MISC_USB_LB               (1<<8)
+#define SM501_MISC_USB_SLAVE            (1<<9)
+#define SM501_MISC_BL_1                 (1<<10)
+#define SM501_MISC_MC                   (1<<11)
+#define SM501_MISC_DAC_POWER            (1<<12)
+#define SM501_MISC_IRQ_INVERT           (1<<16)
+#define SM501_MISC_SH                   (1<<17)
+#define SM501_MISC_HOLD_EMPTY           (0<<18)
+#define SM501_MISC_HOLD_8               (1<<18)
+#define SM501_MISC_HOLD_16              (2<<18)
+#define SM501_MISC_HOLD_24              (3<<18)
+#define SM501_MISC_HOLD_32              (4<<18)
+#define SM501_MISC_HOLD_MASK            (7<<18)
+#define SM501_MISC_FREQ_12              (1<<24)
+#define SM501_MISC_PNL_24BIT            (1<<25)
+#define SM501_MISC_8051_LE              (1<<26)
+#define SM501_GPIO31_0_CONTROL          (0x000008)
+#define SM501_GPIO63_32_CONTROL         (0x00000C)
+#define SM501_DRAM_CONTROL              (0x000010)
+/* command list */
+#define SM501_ARBTRTN_CONTROL           (0x000014)
+/* command list */
+#define SM501_COMMAND_LIST_STATUS       (0x000024)
+/* interrupt debug */
+#define SM501_RAW_IRQ_STATUS            (0x000028)
+#define SM501_RAW_IRQ_CLEAR             (0x000028)
+#define SM501_IRQ_STATUS                (0x00002C)
+#define SM501_IRQ_MASK                  (0x000030)
+#define SM501_DEBUG_CONTROL             (0x000034)
+/* power management */
+#define SM501_CURRENT_GATE              (0x000038)
+#define SM501_CURRENT_CLOCK             (0x00003C)
+#define SM501_POWER_MODE_0_GATE         (0x000040)
+#define SM501_POWER_MODE_0_CLOCK        (0x000044)
+#define SM501_POWER_MODE_1_GATE         (0x000048)
+#define SM501_POWER_MODE_1_CLOCK        (0x00004C)
+#define SM501_SLEEP_MODE_GATE           (0x000050)
+#define SM501_POWER_MODE_CONTROL        (0x000054)
+/* power gates for units within the 501 */
+#define SM501_GATE_HOST                 (0)
+#define SM501_GATE_MEMORY               (1)
+#define SM501_GATE_DISPLAY              (2)
+#define SM501_GATE_2D_ENGINE            (3)
+#define SM501_GATE_CSC                  (4)
+#define SM501_GATE_ZVPORT               (5)
+#define SM501_GATE_GPIO                 (6)
+#define SM501_GATE_UART0                (7)
+#define SM501_GATE_UART1                (8)
+#define SM501_GATE_SSP                  (10)
+#define SM501_GATE_USB_HOST             (11)
+#define SM501_GATE_USB_GADGET           (12)
+#define SM501_GATE_UCONTROLLER          (17)
+#define SM501_GATE_AC97                 (18)
+/* panel clock */
+#define SM501_CLOCK_P2XCLK              (24)
+/* crt clock */
+#define SM501_CLOCK_V2XCLK              (16)
+/* main clock */
+#define SM501_CLOCK_MCLK                (8)
+/* SDRAM controller clock */
+#define SM501_CLOCK_M1XCLK              (0)
+/* config 2 */
+#define SM501_PCI_MASTER_BASE           (0x000058)
+#define SM501_ENDIAN_CONTROL            (0x00005C)
+#define SM501_DEVICEID                  (0x000060)
+/* 0x050100A0 */
+#define SM501_PLLCLOCK_COUNT            (0x000064)
+#define SM501_MISC_TIMING               (0x000068)
+#define SM501_CURRENT_SDRAM_CLOCK       (0x00006C)
+/* GPIO base */
+#define SM501_GPIO                      (0x010000)
+#define SM501_GPIO_DATA_LOW             (0x00)
+#define SM501_GPIO_DATA_HIGH            (0x04)
+#define SM501_GPIO_DDR_LOW              (0x08)
+#define SM501_GPIO_DDR_HIGH             (0x0C)
+#define SM501_GPIO_IRQ_SETUP            (0x10)
+#define SM501_GPIO_IRQ_STATUS           (0x14)
+#define SM501_GPIO_IRQ_RESET            (0x14)
+/* I2C controller base */
+#define SM501_I2C                       (0x010040)
+#define SM501_I2C_BYTE_COUNT            (0x00)
+#define SM501_I2C_CONTROL               (0x01)
+#define SM501_I2C_STATUS                (0x02)
+#define SM501_I2C_RESET                 (0x02)
+#define SM501_I2C_SLAVE_ADDRESS         (0x03)
+#define SM501_I2C_DATA                  (0x04)
+/* SSP base */
+#define SM501_SSP                       (0x020000)
+/* Uart 0 base */
+#define SM501_UART0                     (0x030000)
+/* Uart 1 base */
+#define SM501_UART1                     (0x030020)
+/* USB host port base */
+#define SM501_USB_HOST                  (0x040000)
+/* USB slave/gadget base */
+#define SM501_USB_GADGET                (0x060000)
+/* USB slave/gadget data port base */
+#define SM501_USB_GADGET_DATA           (0x070000)
+/* Display contoller/video engine base */
+#define SM501_DC                        (0x080000)
+/* common defines for the SM501 address registers */
+#define SM501_ADDR_FLIP                 (1<<31)
+#define SM501_ADDR_EXT                  (1<<27)
+#define SM501_ADDR_CS1                  (1<<26)
+#define SM501_ADDR_MASK                 (0x3f << 26)
+#define SM501_FIFO_MASK                 (0x3 << 16)
+#define SM501_FIFO_1                    (0x0 << 16)
+#define SM501_FIFO_3                    (0x1 << 16)
+#define SM501_FIFO_7                    (0x2 << 16)
+#define SM501_FIFO_11                   (0x3 << 16)
+/* common registers for panel and the crt */
+#define SM501_OFF_DC_H_TOT              (0x000)
+#define SM501_OFF_DC_V_TOT              (0x008)
+#define SM501_OFF_DC_H_SYNC             (0x004)
+#define SM501_OFF_DC_V_SYNC             (0x00C)
+#define SM501_DC_PANEL_CONTROL          (0x000)
+#define SM501_DC_PANEL_CONTROL_FPEN     (1<<27)
+#define SM501_DC_PANEL_CONTROL_BIAS     (1<<26)
+#define SM501_DC_PANEL_CONTROL_DATA     (1<<25)
+#define SM501_DC_PANEL_CONTROL_VDD      (1<<24)
+#define SM501_DC_PANEL_CONTROL_DP       (1<<23)
+#define SM501_DC_PANEL_CONTROL_TFT_888  (0<<21)
+#define SM501_DC_PANEL_CONTROL_TFT_333  (1<<21)
+#define SM501_DC_PANEL_CONTROL_TFT_444  (2<<21)
+#define SM501_DC_PANEL_CONTROL_DE       (1<<20)
+#define SM501_DC_PANEL_CONTROL_LCD_TFT  (0<<18)
+#define SM501_DC_PANEL_CONTROL_LCD_STN8 (1<<18)
+#define SM501_DC_PANEL_CONTROL_LCD_STN12 (2<<18)
+#define SM501_DC_PANEL_CONTROL_CP       (1<<14)
+#define SM501_DC_PANEL_CONTROL_VSP      (1<<13)
+#define SM501_DC_PANEL_CONTROL_HSP      (1<<12)
+#define SM501_DC_PANEL_CONTROL_CK       (1<<9)
+#define SM501_DC_PANEL_CONTROL_TE       (1<<8)
+#define SM501_DC_PANEL_CONTROL_VPD      (1<<7)
+#define SM501_DC_PANEL_CONTROL_VP       (1<<6)
+#define SM501_DC_PANEL_CONTROL_HPD      (1<<5)
+#define SM501_DC_PANEL_CONTROL_HP       (1<<4)
+#define SM501_DC_PANEL_CONTROL_GAMMA    (1<<3)
+#define SM501_DC_PANEL_CONTROL_EN       (1<<2)
+#define SM501_DC_PANEL_CONTROL_8BPP     (0<<0)
+#define SM501_DC_PANEL_CONTROL_16BPP    (1<<0)
+#define SM501_DC_PANEL_CONTROL_32BPP    (2<<0)
+#define SM501_DC_PANEL_PANNING_CONTROL  (0x004)
+#define SM501_DC_PANEL_COLOR_KEY        (0x008)
+#define SM501_DC_PANEL_FB_ADDR          (0x00C)
+#define SM501_DC_PANEL_FB_OFFSET        (0x010)
+#define SM501_DC_PANEL_FB_WIDTH         (0x014)
+#define SM501_DC_PANEL_FB_HEIGHT        (0x018)
+#define SM501_DC_PANEL_TL_LOC           (0x01C)
+#define SM501_DC_PANEL_BR_LOC           (0x020)
+#define SM501_DC_PANEL_H_TOT            (0x024)
+#define SM501_DC_PANEL_H_SYNC           (0x028)
+#define SM501_DC_PANEL_V_TOT            (0x02C)
+#define SM501_DC_PANEL_V_SYNC           (0x030)
+#define SM501_DC_PANEL_CUR_LINE         (0x034)
+#define SM501_DC_VIDEO_CONTROL          (0x040)
+#define SM501_DC_VIDEO_FB0_ADDR         (0x044)
+#define SM501_DC_VIDEO_FB_WIDTH         (0x048)
+#define SM501_DC_VIDEO_FB0_LAST_ADDR    (0x04C)
+#define SM501_DC_VIDEO_TL_LOC           (0x050)
+#define SM501_DC_VIDEO_BR_LOC           (0x054)
+#define SM501_DC_VIDEO_SCALE            (0x058)
+#define SM501_DC_VIDEO_INIT_SCALE       (0x05C)
+#define SM501_DC_VIDEO_YUV_CONSTANTS    (0x060)
+#define SM501_DC_VIDEO_FB1_ADDR         (0x064)
+#define SM501_DC_VIDEO_FB1_LAST_ADDR    (0x068)
+#define SM501_DC_VIDEO_ALPHA_CONTROL    (0x080)
+#define SM501_DC_VIDEO_ALPHA_FB_ADDR    (0x084)
+#define SM501_DC_VIDEO_ALPHA_FB_OFFSET  (0x088)
+#define SM501_DC_VIDEO_ALPHA_FB_LAST_ADDR       (0x08C)
+#define SM501_DC_VIDEO_ALPHA_TL_LOC     (0x090)
+#define SM501_DC_VIDEO_ALPHA_BR_LOC     (0x094)
+#define SM501_DC_VIDEO_ALPHA_SCALE      (0x098)
+#define SM501_DC_VIDEO_ALPHA_INIT_SCALE (0x09C)
+#define SM501_DC_VIDEO_ALPHA_CHROMA_KEY (0x0A0)
+#define SM501_DC_VIDEO_ALPHA_COLOR_LOOKUP       (0x0A4)
+#define SM501_DC_PANEL_HWC_BASE         (0x0F0)
+#define SM501_DC_PANEL_HWC_ADDR         (0x0F0)
+#define SM501_DC_PANEL_HWC_LOC          (0x0F4)
+#define SM501_DC_PANEL_HWC_COLOR_1_2    (0x0F8)
+#define SM501_DC_PANEL_HWC_COLOR_3      (0x0FC)
+#define SM501_HWC_EN                    (1<<31)
+#define SM501_OFF_HWC_ADDR              (0x00)
+#define SM501_OFF_HWC_LOC               (0x04)
+#define SM501_OFF_HWC_COLOR_1_2         (0x08)
+#define SM501_OFF_HWC_COLOR_3           (0x0C)
+#define SM501_DC_ALPHA_CONTROL          (0x100)
+#define SM501_DC_ALPHA_FB_ADDR          (0x104)
+#define SM501_DC_ALPHA_FB_OFFSET        (0x108)
+#define SM501_DC_ALPHA_TL_LOC           (0x10C)
+#define SM501_DC_ALPHA_BR_LOC           (0x110)
+#define SM501_DC_ALPHA_CHROMA_KEY       (0x114)
+#define SM501_DC_ALPHA_COLOR_LOOKUP     (0x118)
+#define SM501_DC_CRT_CONTROL            (0x200)
+#define SM501_DC_CRT_CONTROL_TVP        (1<<15)
+#define SM501_DC_CRT_CONTROL_CP         (1<<14)
+#define SM501_DC_CRT_CONTROL_VSP        (1<<13)
+#define SM501_DC_CRT_CONTROL_HSP        (1<<12)
+#define SM501_DC_CRT_CONTROL_VS         (1<<11)
+#define SM501_DC_CRT_CONTROL_BLANK      (1<<10)
+#define SM501_DC_CRT_CONTROL_SEL        (1<<9)
+#define SM501_DC_CRT_CONTROL_TE         (1<<8)
+#define SM501_DC_CRT_CONTROL_PIXEL_MASK (0xF << 4)
+#define SM501_DC_CRT_CONTROL_GAMMA      (1<<3)
+#define SM501_DC_CRT_CONTROL_ENABLE     (1<<2)
+#define SM501_DC_CRT_CONTROL_8BPP       (0<<0)
+#define SM501_DC_CRT_CONTROL_16BPP      (1<<0)
+#define SM501_DC_CRT_CONTROL_32BPP      (2<<0)
+#define SM501_DC_CRT_FB_ADDR            (0x204)
+#define SM501_DC_CRT_FB_OFFSET          (0x208)
+#define SM501_DC_CRT_H_TOT              (0x20C)
+#define SM501_DC_CRT_H_SYNC             (0x210)
+#define SM501_DC_CRT_V_TOT              (0x214)
+#define SM501_DC_CRT_V_SYNC             (0x218)
+#define SM501_DC_CRT_SIGNATURE_ANALYZER (0x21C)
+#define SM501_DC_CRT_CUR_LINE           (0x220)
+#define SM501_DC_CRT_MONITOR_DETECT     (0x224)
+#define SM501_DC_CRT_HWC_BASE           (0x230)
+#define SM501_DC_CRT_HWC_ADDR           (0x230)
+#define SM501_DC_CRT_HWC_LOC            (0x234)
+#define SM501_DC_CRT_HWC_COLOR_1_2      (0x238)
+#define SM501_DC_CRT_HWC_COLOR_3        (0x23C)
+#define SM501_DC_PANEL_PALETTE          (0x400)
+#define SM501_DC_VIDEO_PALETTE          (0x800)
+#define SM501_DC_CRT_PALETTE            (0xC00)
+/* Zoom Video port base */
+#define SM501_ZVPORT                    (0x090000)
+/* AC97/I2S base */
+#define SM501_AC97                      (0x0A0000)
+/* 8051 micro controller base */
+#define SM501_UCONTROLLER               (0x0B0000)
+/* 8051 micro controller SRAM base */
+#define SM501_UCONTROLLER_SRAM          (0x0C0000)
+/* DMA base */
+#define SM501_DMA                       (0x0D0000)
+/* 2d engine base */
+#define SM501_2D_ENGINE                 (0x100000)
+#define SM501_2D_SOURCE                 (0x00)
+#define SM501_2D_DESTINATION            (0x04)
+#define SM501_2D_DIMENSION              (0x08)
+#define SM501_2D_CONTROL                (0x0C)
+#define SM501_2D_PITCH                  (0x10)
+#define SM501_2D_FOREGROUND             (0x14)
+#define SM501_2D_BACKGROUND             (0x18)
+#define SM501_2D_STRETCH                (0x1C)
+#define SM501_2D_COLOR_COMPARE          (0x20)
+#define SM501_2D_COLOR_COMPARE_MASK     (0x24)
+#define SM501_2D_MASK                   (0x28)
+#define SM501_2D_CLIP_TL                (0x2C)
+#define SM501_2D_CLIP_BR                (0x30)
+#define SM501_2D_MONO_PATTERN_LOW       (0x34)
+#define SM501_2D_MONO_PATTERN_HIGH      (0x38)
+#define SM501_2D_WINDOW_WIDTH           (0x3C)
+#define SM501_2D_SOURCE_BASE            (0x40)
+#define SM501_2D_DESTINATION_BASE       (0x44)
+#define SM501_2D_ALPHA                  (0x48)
+#define SM501_2D_WRAP                   (0x4C)
+#define SM501_2D_STATUS                 (0x50)
+#define SM501_CSC_Y_SOURCE_BASE         (0xC8)
+#define SM501_CSC_CONSTANTS             (0xCC)
+#define SM501_CSC_Y_SOURCE_X            (0xD0)
+#define SM501_CSC_Y_SOURCE_Y            (0xD4)
+#define SM501_CSC_U_SOURCE_BASE         (0xD8)
+#define SM501_CSC_V_SOURCE_BASE         (0xDC)
+#define SM501_CSC_SOURCE_DIMENSION      (0xE0)
+#define SM501_CSC_SOURCE_PITCH          (0xE4)
+#define SM501_CSC_DESTINATION           (0xE8)
+#define SM501_CSC_DESTINATION_DIMENSION (0xEC)
+#define SM501_CSC_DESTINATION_PITCH     (0xF0)
+#define SM501_CSC_SCALE_FACTOR          (0xF4)
+#define SM501_CSC_DESTINATION_BASE      (0xF8)
+#define SM501_CSC_CONTROL               (0xFC)
+/* 2d engine data port base */
+#define SM501_2D_ENGINE_DATA            (0x110000)
diff --git a/include/linux/sm501.h b/include/linux/sm501.h
new file mode 100644
index 000000000000..9e3aaad6fe4d
--- /dev/null
+++ b/include/linux/sm501.h
@@ -0,0 +1,170 @@
+/* include/linux/sm501.h
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      Vincent Sanders <vince@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+extern int sm501_unit_power(struct device *dev,
+                            unsigned int unit, unsigned int to);
+extern unsigned long sm501_set_clock(struct device *dev,
+                                     int clksrc, unsigned long freq);
+extern unsigned long sm501_find_clock(int clksrc, unsigned long req_freq);
+/* sm501_misc_control
+ *
+ * Modify the SM501's MISC_CONTROL register
+*/
+extern int sm501_misc_control(struct device *dev,
+                              unsigned long set, unsigned long clear);
+/* sm501_modify_reg
+ *
+ * Modify a register in the SM501 which may be shared with other
+ * drivers.
+*/
+extern unsigned long sm501_modify_reg(struct device *dev,
+                                      unsigned long reg,
+                                      unsigned long set,
+                                      unsigned long clear);
+/* sm501_gpio_set
+ *
+ * set the state of the given GPIO line
+*/
+extern void sm501_gpio_set(struct device *dev,
+                           unsigned long gpio,
+                           unsigned int to,
+                           unsigned int dir);
+/* sm501_gpio_get
+ *
+ * get the state of the given GPIO line
+*/
+extern unsigned long sm501_gpio_get(struct device *dev,
+                                    unsigned long gpio);
+/* Platform data definitions */
+#define SM501FB_FLAG_USE_INIT_MODE      (1<<0)
+#define SM501FB_FLAG_DISABLE_AT_EXIT    (1<<1)
+#define SM501FB_FLAG_USE_HWCURSOR       (1<<2)
+#define SM501FB_FLAG_USE_HWACCEL        (1<<3)
+struct sm501_platdata_fbsub {
+        struct fb_videomode     *def_mode;
+        unsigned int             def_bpp;
+        unsigned long            max_mem;
+        unsigned int             flags;
+};
+enum sm501_fb_routing {
+        SM501_FB_OWN            = 0,    /* CRT=>CRT, Panel=>Panel */
+        SM501_FB_CRT_PANEL      = 1,    /* Panel=>CRT, Panel=>Panel */
+};
+/* sm501_platdata_fb flag field bit definitions */
+#define SM501_FBPD_SWAP_FB_ENDIAN       (1<<0)  /* need to endian swap */
+/* sm501_platdata_fb
+ *
+ * configuration data for the framebuffer driver
+*/
+struct sm501_platdata_fb {
+        enum sm501_fb_routing            fb_route;
+        unsigned int                     flags;
+        struct sm501_platdata_fbsub     *fb_crt;
+        struct sm501_platdata_fbsub     *fb_pnl;
+};
+/* gpio i2c */
+struct sm501_platdata_gpio_i2c {
+        unsigned int            pin_sda;
+        unsigned int            pin_scl;
+};
+/* sm501_initdata
+ *
+ * use for initialising values that may not have been setup
+ * before the driver is loaded.
+*/
+struct sm501_reg_init {
+        unsigned long           set;
+        unsigned long           mask;
+};
+#define SM501_USE_USB_HOST      (1<<0)
+#define SM501_USE_USB_SLAVE     (1<<1)
+#define SM501_USE_SSP0          (1<<2)
+#define SM501_USE_SSP1          (1<<3)
+#define SM501_USE_UART0         (1<<4)
+#define SM501_USE_UART1         (1<<5)
+#define SM501_USE_FBACCEL       (1<<6)
+#define SM501_USE_AC97          (1<<7)
+#define SM501_USE_I2S           (1<<8)
+#define SM501_USE_ALL           (0xffffffff)
+struct sm501_initdata {
+        struct sm501_reg_init   gpio_low;
+        struct sm501_reg_init   gpio_high;
+        struct sm501_reg_init   misc_timing;
+        struct sm501_reg_init   misc_control;
+        unsigned long           devices;
+        unsigned long           mclk;           /* non-zero to modify */
+        unsigned long           m1xclk;         /* non-zero to modify */
+};
+/* sm501_init_gpio
+ *
+ * default gpio settings
+*/
+struct sm501_init_gpio {
+        struct sm501_reg_init   gpio_data_low;
+        struct sm501_reg_init   gpio_data_high;
+        struct sm501_reg_init   gpio_ddr_low;
+        struct sm501_reg_init   gpio_ddr_high;
+};
+/* sm501_platdata
+ *
+ * This is passed with the platform device to allow the board
+ * to control the behaviour of the SM501 driver(s) which attach
+ * to the device.
+ *
+*/
+struct sm501_platdata {
+        struct sm501_initdata           *init;
+        struct sm501_init_gpio          *init_gpiop;
+        struct sm501_platdata_fb        *fb;
+        struct sm501_platdata_gpio_i2c  *gpio_i2c;
+        unsigned int                     gpio_i2c_nr;
+};
diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h
index de9fc576fa1c..3069ecca0129 100644
--- a/include/linux/sunrpc/sched.h
+++ b/include/linux/sunrpc/sched.h
@@ -150,10 +150,10 @@ struct rpc_call_ops {
 #define RPC_TASK_HAS_TIMER      3
 #define RPC_TASK_ACTIVE         4
-#define RPC_IS_RUNNING(t)       (test_bit(RPC_TASK_RUNNING, &(t)->tk_runstate))
+#define RPC_IS_RUNNING(t)       test_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
-#define rpc_set_running(t)      (set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate))
+#define rpc_set_running(t)      set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
 #define rpc_test_and_set_running(t) \
-                                (test_and_set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate))
+                                test_and_set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
 #define rpc_clear_running(t)    \
        do { \
                smp_mb__before_clear_bit(); \
@@ -161,8 +161,8 @@ struct rpc_call_ops {
                smp_mb__after_clear_bit(); \
        } while (0)
-#define RPC_IS_QUEUED(t)        (test_bit(RPC_TASK_QUEUED, &(t)->tk_runstate))
+#define RPC_IS_QUEUED(t)        test_bit(RPC_TASK_QUEUED, &(t)->tk_runstate)
-#define rpc_set_queued(t)       (set_bit(RPC_TASK_QUEUED, &(t)->tk_runstate))
+#define rpc_set_queued(t)       set_bit(RPC_TASK_QUEUED, &(t)->tk_runstate)
 #define rpc_clear_queued(t)     \
        do { \
                smp_mb__before_clear_bit(); \
@@ -179,7 +179,7 @@ struct rpc_call_ops {
                smp_mb__after_clear_bit(); \
        } while (0)
-#define RPC_IS_ACTIVATED(t)     (test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate))
+#define RPC_IS_ACTIVATED(t)     test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate)
 /*
 * Task priorities.
diff --git a/include/linux/swapops.h b/include/linux/swapops.h
index ec639aa3a1d3..ceb6cc5ceebb 100644
--- a/include/linux/swapops.h
+++ b/include/linux/swapops.h
@@ -108,7 +108,10 @@ extern void migration_entry_wait(struct mm_struct *mm, pmd_t *pmd,
 #else
 #define make_migration_entry(page, write) swp_entry(0, 0)
-#define is_migration_entry(swp) 0
+static inline int is_migration_entry(swp_entry_t swp)
+{
+        return 0;
+}
 #define migration_entry_to_page(swp) NULL
 static inline void make_migration_entry_read(swp_entry_t *entryp) { }
 static inline void migration_entry_wait(struct mm_struct *mm, pmd_t *pmd,
diff --git a/include/linux/tick.h b/include/linux/tick.h
new file mode 100644
index 000000000000..9a7252e089b9
--- /dev/null
+++ b/include/linux/tick.h
@@ -0,0 +1,109 @@
+/*  linux/include/linux/tick.h
+ *
+ *  This file contains the structure definitions for tick related functions
+ *
+ */
+#ifndef _LINUX_TICK_H
+#define _LINUX_TICK_H
+#include <linux/clockchips.h>
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+enum tick_device_mode {
+        TICKDEV_MODE_PERIODIC,
+        TICKDEV_MODE_ONESHOT,
+};
+struct tick_device {
+        struct clock_event_device *evtdev;
+        enum tick_device_mode mode;
+};
+enum tick_nohz_mode {
+        NOHZ_MODE_INACTIVE,
+        NOHZ_MODE_LOWRES,
+        NOHZ_MODE_HIGHRES,
+};
+/**
+ * struct tick_sched - sched tick emulation and no idle tick control/stats
+ * @sched_timer:        hrtimer to schedule the periodic tick in high
+ *                      resolution mode
+ * @idle_tick:          Store the last idle tick expiry time when the tick
+ *                      timer is modified for idle sleeps. This is necessary
+ *                      to resume the tick timer operation in the timeline
+ *                      when the CPU returns from idle
+ * @tick_stopped:       Indicator that the idle tick has been stopped
+ * @idle_jiffies:       jiffies at the entry to idle for idle time accounting
+ * @idle_calls:         Total number of idle calls
+ * @idle_sleeps:        Number of idle calls, where the sched tick was stopped
+ * @idle_entrytime:     Time when the idle call was entered
+ * @idle_sleeptime:     Sum of the time slept in idle with sched tick stopped
+ */
+struct tick_sched {
+        struct hrtimer                  sched_timer;
+        unsigned long                   check_clocks;
+        enum tick_nohz_mode             nohz_mode;
+        ktime_t                         idle_tick;
+        int                             tick_stopped;
+        unsigned long                   idle_jiffies;
+        unsigned long                   idle_calls;
+        unsigned long                   idle_sleeps;
+        ktime_t                         idle_entrytime;
+        ktime_t                         idle_sleeptime;
+        unsigned long                   last_jiffies;
+        unsigned long                   next_jiffies;
+        ktime_t                         idle_expires;
+};
+extern void __init tick_init(void);
+extern int tick_is_oneshot_available(void);
+extern struct tick_device *tick_get_device(int cpu);
+# ifdef CONFIG_HIGH_RES_TIMERS
+extern int tick_init_highres(void);
+extern int tick_program_event(ktime_t expires, int force);
+extern void tick_setup_sched_timer(void);
+extern void tick_cancel_sched_timer(int cpu);
+# else
+static inline void tick_cancel_sched_timer(int cpu) { }
+# endif /* HIGHRES */
+# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+extern struct tick_device *tick_get_broadcast_device(void);
+extern cpumask_t *tick_get_broadcast_mask(void);
+#  ifdef CONFIG_TICK_ONESHOT
+extern cpumask_t *tick_get_broadcast_oneshot_mask(void);
+#  endif
+# endif /* BROADCAST */
+# ifdef CONFIG_TICK_ONESHOT
+extern void tick_clock_notify(void);
+extern int tick_check_oneshot_change(int allow_nohz);
+extern struct tick_sched *tick_get_tick_sched(int cpu);
+# else
+static inline void tick_clock_notify(void) { }
+static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
+# endif
+#else /* CONFIG_GENERIC_CLOCKEVENTS */
+static inline void tick_init(void) { }
+static inline void tick_cancel_sched_timer(int cpu) { }
+static inline void tick_clock_notify(void) { }
+static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
+# ifdef CONFIG_NO_HZ
+extern void tick_nohz_stop_sched_tick(void);
+extern void tick_nohz_restart_sched_tick(void);
+extern void tick_nohz_update_jiffies(void);
+# else
+static inline void tick_nohz_stop_sched_tick(void) { }
+static inline void tick_nohz_restart_sched_tick(void) { }
+static inline void tick_nohz_update_jiffies(void) { }
+# endif /* !NO_HZ */
+#endif
diff --git a/include/linux/time.h b/include/linux/time.h
index 55cee172d723..8ea8dea713c7 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -90,8 +90,9 @@ static inline struct timespec timespec_sub(struct timespec lhs,
 extern struct timespec xtime;
 extern struct timespec wall_to_monotonic;
-extern seqlock_t xtime_lock;
+extern seqlock_t xtime_lock __attribute__((weak));
+extern unsigned long read_persistent_clock(void);
 void timekeeping_init(void);
 static inline unsigned long get_seconds(void)
diff --git a/include/linux/timer.h b/include/linux/timer.h
index fb5edaaf0ebd..719113b652dd 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -2,6 +2,7 @@
 #define _LINUX_TIMER_H
 #include <linux/list.h>
+#include <linux/ktime.h>
 #include <linux/spinlock.h>
 #include <linux/stddef.h>
@@ -15,6 +16,11 @@ struct timer_list {
        unsigned long data;
        struct tvec_t_base_s *base;
+#ifdef CONFIG_TIMER_STATS
+        void *start_site;
+        char start_comm[16];
+        int start_pid;
+#endif
 };
 extern struct tvec_t_base_s boot_tvec_bases;
@@ -61,7 +67,65 @@ extern int del_timer(struct timer_list * timer);
 extern int __mod_timer(struct timer_list *timer, unsigned long expires);
 extern int mod_timer(struct timer_list *timer, unsigned long expires);
+/*
+ * Return when the next timer-wheel timeout occurs (in absolute jiffies),
+ * locks the timer base:
+ */
 extern unsigned long next_timer_interrupt(void);
+/*
+ * Return when the next timer-wheel timeout occurs (in absolute jiffies),
+ * locks the timer base and does the comparison against the given
+ * jiffie.
+ */
+extern unsigned long get_next_timer_interrupt(unsigned long now);
+/*
+ * Timer-statistics info:
+ */
+#ifdef CONFIG_TIMER_STATS
+extern void init_timer_stats(void);
+extern void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
+                                     void *timerf, char * comm);
+static inline void timer_stats_account_timer(struct timer_list *timer)
+{
+        timer_stats_update_stats(timer, timer->start_pid, timer->start_site,
+                                 timer->function, timer->start_comm);
+}
+extern void __timer_stats_timer_set_start_info(struct timer_list *timer,
+                                               void *addr);
+static inline void timer_stats_timer_set_start_info(struct timer_list *timer)
+{
+        __timer_stats_timer_set_start_info(timer, __builtin_return_address(0));
+}
+static inline void timer_stats_timer_clear_start_info(struct timer_list *timer)
+{
+        timer->start_site = NULL;
+}
+#else
+static inline void init_timer_stats(void)
+{
+}
+static inline void timer_stats_account_timer(struct timer_list *timer)
+{
+}
+static inline void timer_stats_timer_set_start_info(struct timer_list *timer)
+{
+}
+static inline void timer_stats_timer_clear_start_info(struct timer_list *timer)
+{
+}
+#endif
+extern void delayed_work_timer_fn(unsigned long __data);
 /**
 * add_timer - start a timer
@@ -96,7 +160,7 @@ static inline void add_timer(struct timer_list *timer)
 extern void init_timers(void);
 extern void run_local_timers(void);
 struct hrtimer;
-extern int it_real_fn(struct hrtimer *);
+extern enum hrtimer_restart it_real_fn(struct hrtimer *);
 unsigned long __round_jiffies(unsigned long j, int cpu);
 unsigned long __round_jiffies_relative(unsigned long j, int cpu);
diff --git a/include/linux/timex.h b/include/linux/timex.h
index 9a24e500c311..da929dbbea2a 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -286,6 +286,13 @@ static inline void time_interpolator_update(long delta_nsec)
 #define TICK_LENGTH_SHIFT       32
+#ifdef CONFIG_NO_HZ
+#define NTP_INTERVAL_FREQ  (2)
+#else
+#define NTP_INTERVAL_FREQ  (HZ)
+#endif
+#define NTP_INTERVAL_LENGTH (NSEC_PER_SEC/NTP_INTERVAL_FREQ)
 /* Returns how long ticks are at present, in ns / 2^(SHIFT_SCALE-10). */
 extern u64 current_tick_length(void);
diff --git a/include/linux/usb.h b/include/linux/usb.h
index b5c226a87ed8..a8e8d1ecebb1 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -935,7 +935,7 @@ struct usb_iso_packet_descriptor {
        unsigned int offset;
        unsigned int length;            /* expected length */
        unsigned int actual_length;
-        unsigned int status;
+        int status;
 };
 struct urb;
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index ba617c372455..956edf3bbecb 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -73,6 +73,13 @@ struct usb_cdc_acm_descriptor {
        __u8    bmCapabilities;
 } __attribute__ ((packed));
+/* capabilities from 5.2.3.3 */
+#define USB_CDC_COMM_FEATURE    0x01
+#define USB_CDC_CAP_LINE        0x02
+#define USB_CDC_CAP_BRK 0x04
+#define USB_CDC_CAP_NOTIFY      0x08
 /* "Union Functional Descriptor" from CDC spec 5.2.3.8 */
 struct usb_cdc_union_desc {
        __u8    bLength;
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index ae7833749fa2..245c72531228 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -367,7 +367,7 @@ struct usb_debug_descriptor {
        /* bulk endpoints with 8 byte maxpacket */
        __u8  bDebugInEndpoint;
        __u8  bDebugOutEndpoint;
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -396,7 +396,7 @@ struct usb_security_descriptor {
        __le16 wTotalLength;
        __u8  bNumEncryptionTypes;
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -410,7 +410,7 @@ struct usb_key_descriptor {
        __u8  tTKID[3];
        __u8  bReserved;
        __u8  bKeyData[0];
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -426,7 +426,7 @@ struct usb_encryption_descriptor {
 #define USB_ENC_TYPE_RSA_1              3       /* rsa3072/sha1 auth */
        __u8  bEncryptionValue;         /* use in SET_ENCRYPTION */
        __u8  bAuthKeyIndex;
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -438,7 +438,7 @@ struct usb_bos_descriptor {
        __le16 wTotalLength;
        __u8  bNumDeviceCaps;
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -447,7 +447,7 @@ struct usb_dev_cap_header {
        __u8  bLength;
        __u8  bDescriptorType;
        __u8  bDevCapabilityType;
-};
+} __attribute__((packed));
 #define USB_CAP_TYPE_WIRELESS_USB       1
@@ -475,7 +475,7 @@ struct usb_wireless_cap_descriptor {	/* Ultra Wide Band */
        __u8  bmFFITXPowerInfo; /* FFI power levels */
        __le16 bmBandGroup;
        __u8  bReserved;
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -496,7 +496,7 @@ struct usb_wireless_ep_comp_descriptor {
 #define USB_ENDPOINT_SWITCH_NO          0
 #define USB_ENDPOINT_SWITCH_SWITCH      1
 #define USB_ENDPOINT_SWITCH_SCALE       2
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -512,7 +512,7 @@ struct usb_handshake {
        __u8 CDID[16];
        __u8 nonce[16];
        __u8 MIC[8];
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
@@ -524,7 +524,7 @@ struct usb_connection_context {
        __u8 CHID[16];          /* persistent host id */
        __u8 CDID[16];          /* device id (unique w/in host context) */
        __u8 CK[16];            /* connection key */
-};
+} __attribute__((packed));
 /*-------------------------------------------------------------------------*/
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 33dcd8576696..32acbae28d24 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -54,6 +54,8 @@
 * @write_wait: a wait_queue_head_t used by the port.
 * @work: work queue entry for the line discipline waking up.
 * @open_count: number of times this port has been opened.
+ * @throttled: nonzero if the read urb is inactive to throttle the device
+ * @throttle_req: nonzero if the tty wants to throttle us
 *
 * This structure is used by the usb-serial core and drivers for the specific
 * ports of a device.
@@ -88,6 +90,8 @@ struct usb_serial_port {
        wait_queue_head_t       write_wait;
        struct work_struct      work;
        int                     open_count;
+        char                    throttled;
+        char                    throttle_req;
        struct device           dev;
 };
 #define to_usb_serial_port(d) container_of(d, struct usb_serial_port, dev)
@@ -269,6 +273,8 @@ extern int usb_serial_generic_write_room (struct usb_serial_port *port);
 extern int usb_serial_generic_chars_in_buffer (struct usb_serial_port *port);
 extern void usb_serial_generic_read_bulk_callback (struct urb *urb);
 extern void usb_serial_generic_write_bulk_callback (struct urb *urb);
+extern void usb_serial_generic_throttle (struct usb_serial_port *port);
+extern void usb_serial_generic_unthrottle (struct usb_serial_port *port);
 extern void usb_serial_generic_shutdown (struct usb_serial *serial);
 extern int usb_serial_generic_register (int debug);
 extern void usb_serial_generic_deregister (void);
diff --git a/include/linux/usb_usual.h b/include/linux/usb_usual.h
index 2ae76fe52ff7..1b792b9286ba 100644
--- a/include/linux/usb_usual.h
+++ b/include/linux/usb_usual.h
@@ -46,7 +46,9 @@
        US_FLAG(MAX_SECTORS_64, 0x00000400)                     \
                /* Sets max_sectors to 64    */                 \
        US_FLAG(IGNORE_DEVICE,  0x00000800)                     \
-                /* Don't claim device */
+                /* Don't claim device */                        \
+        US_FLAG(CAPACITY_HEURISTICS,    0x00001000)             \
+                /* sometimes sizes is too big */
 #define US_FLAG(name, value)    US_FL_##name = value ,
 enum { US_DO_ALL_FLAGS };
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 617d8a1c59ae..342dd5a7e8bb 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -159,9 +159,9 @@ struct usbdevfs_ioctl32 {
 #define USBDEVFS_SUBMITURB32       _IOR('U', 10, struct usbdevfs_urb32)
 #define USBDEVFS_DISCARDURB        _IO('U', 11)
 #define USBDEVFS_REAPURB           _IOW('U', 12, void *)
-#define USBDEVFS_REAPURB32         _IOW('U', 12, u32)
+#define USBDEVFS_REAPURB32         _IOW('U', 12, __u32)
 #define USBDEVFS_REAPURBNDELAY     _IOW('U', 13, void *)
-#define USBDEVFS_REAPURBNDELAY32   _IOW('U', 13, u32)
+#define USBDEVFS_REAPURBNDELAY32   _IOW('U', 13, __u32)
 #define USBDEVFS_DISCSIGNAL        _IOR('U', 14, struct usbdevfs_disconnectsignal)
 #define USBDEVFS_CLAIMINTERFACE    _IOR('U', 15, unsigned int)
 #define USBDEVFS_RELEASEINTERFACE  _IOR('U', 16, unsigned int)
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index d94e2683be52..65a165f918c9 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1,5 +1,45 @@
 /*
- *      Video for Linux Two
+ *  Video for Linux Two header file
+ *
+ *  Copyright (C) 1999-2007 the contributors
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  Alternatively you can redistribute this file under the terms of the
+ *  BSD license as stated below:
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in
+ *     the documentation and/or other materials provided with the
+ *     distribution.
+ *  3. The names of its contributors may not be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *      Header file for v4l or V4L2 drivers and applications
 * with public API.
@@ -8,8 +48,9 @@
 *
 *      See http://linuxtv.org for more info
 *
- *      Author: Bill Dirks <bdirks@pacbell.net>
+ *      Author: Bill Dirks <bill@thedirks.org>
 *              Justin Schoeman
+ *              Hans Verkuil <hverkuil@xs4all.nl>
 *              et al.
 */
 #ifndef __LINUX_VIDEODEV2_H
@@ -90,11 +131,8 @@ enum v4l2_buf_type {
        V4L2_BUF_TYPE_VIDEO_OVERLAY      = 3,
        V4L2_BUF_TYPE_VBI_CAPTURE        = 4,
        V4L2_BUF_TYPE_VBI_OUTPUT         = 5,
-#if 1
-        /* Experimental Sliced VBI */
        V4L2_BUF_TYPE_SLICED_VBI_CAPTURE = 6,
        V4L2_BUF_TYPE_SLICED_VBI_OUTPUT  = 7,
-#endif
        V4L2_BUF_TYPE_PRIVATE            = 0x80,
 };
@@ -186,10 +224,8 @@ struct v4l2_capability
 #define V4L2_CAP_VIDEO_OVERLAY          0x00000004  /* Can do video overlay */
 #define V4L2_CAP_VBI_CAPTURE            0x00000010  /* Is a raw VBI capture device */
 #define V4L2_CAP_VBI_OUTPUT             0x00000020  /* Is a raw VBI output device */
-#if 1
 #define V4L2_CAP_SLICED_VBI_CAPTURE     0x00000040  /* Is a sliced VBI capture device */
 #define V4L2_CAP_SLICED_VBI_OUTPUT      0x00000080  /* Is a sliced VBI output device */
-#endif
 #define V4L2_CAP_RDS_CAPTURE            0x00000100  /* RDS data capture */
 #define V4L2_CAP_TUNER                  0x00010000  /* has a tuner */
@@ -1179,7 +1215,6 @@ struct v4l2_vbi_format
 #define V4L2_VBI_UNSYNC         (1<< 0)
 #define V4L2_VBI_INTERLACED     (1<< 1)
-#if 1
 /* Sliced VBI
 *
 *    This implements is a proposal V4L2 API to allow SLICED VBI
@@ -1212,7 +1247,6 @@ struct v4l2_sliced_vbi_format
 #define V4L2_SLICED_VBI_525             (V4L2_SLICED_CAPTION_525)
 #define V4L2_SLICED_VBI_625             (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625)
 struct v4l2_sliced_vbi_cap
 {
        __u16   service_set;
@@ -1233,7 +1267,6 @@ struct v4l2_sliced_vbi_data
        __u32   reserved;       /* must be 0 */
        __u8    data[48];
 };
-#endif
 /*
 *      A G G R E G A T E   S T R U C T U R E S
@@ -1249,9 +1282,7 @@ struct v4l2_format
                struct v4l2_pix_format          pix;     // V4L2_BUF_TYPE_VIDEO_CAPTURE
                struct v4l2_window              win;     // V4L2_BUF_TYPE_VIDEO_OVERLAY
                struct v4l2_vbi_format          vbi;     // V4L2_BUF_TYPE_VBI_CAPTURE
-#if 1
                struct v4l2_sliced_vbi_format   sliced;  // V4L2_BUF_TYPE_SLICED_VBI_CAPTURE
-#endif
                __u8    raw_data[200];                   // user-defined
        } fmt;
 };
@@ -1271,6 +1302,17 @@ struct v4l2_streamparm
 };
 /*
+ *      A D V A N C E D   D E B U G G I N G
+ */
+/* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */
+struct v4l2_register {
+        __u64 reg;
+        __u32 i2c_id; /* I2C driver ID of the I2C chip, or 0 for the host */
+        __u32 val;
+};
+/*
 *      I O C T L   C O D E S   F O R   V I D E O   D E V I C E S
 *
 */
@@ -1328,9 +1370,7 @@ struct v4l2_streamparm
 #define VIDIOC_ENUMAUDOUT       _IOWR ('V', 66, struct v4l2_audioout)
 #define VIDIOC_G_PRIORITY       _IOR  ('V', 67, enum v4l2_priority)
 #define VIDIOC_S_PRIORITY       _IOW  ('V', 68, enum v4l2_priority)
-#if 1
 #define VIDIOC_G_SLICED_VBI_CAP _IOWR ('V', 69, struct v4l2_sliced_vbi_cap)
-#endif
 #define VIDIOC_LOG_STATUS       _IO   ('V', 70)
 #define VIDIOC_G_EXT_CTRLS      _IOWR ('V', 71, struct v4l2_ext_controls)
 #define VIDIOC_S_EXT_CTRLS      _IOWR ('V', 72, struct v4l2_ext_controls)
@@ -1339,6 +1379,9 @@ struct v4l2_streamparm
 #define VIDIOC_ENUM_FRAMESIZES  _IOWR ('V', 74, struct v4l2_frmsizeenum)
 #define VIDIOC_ENUM_FRAMEINTERVALS      _IOWR ('V', 75, struct v4l2_frmivalenum)
 #endif
+/* only implemented if CONFIG_VIDEO_ADV_DEBUG is defined */
+#define VIDIOC_DBG_S_REGISTER   _IOW ('d', 100, struct v4l2_register)
+#define VIDIOC_DBG_G_REGISTER   _IOWR('d', 101, struct v4l2_register)
 #ifdef __OLD_VIDIOC_
 /* for compatibility, will go away some day */
diff --git a/include/linux/wireless.h b/include/linux/wireless.h
index 7c269f4992eb..447c52beb691 100644
--- a/include/linux/wireless.h
+++ b/include/linux/wireless.h
@@ -334,7 +334,7 @@
 * separate range because of collisions with other tools such as
 * 'mii-tool'.
 * We now have 32 commands, so a bit more space ;-).
- * Also, all 'odd' commands are only usable by root and don't return the
+ * Also, all 'even' commands are only usable by root and don't return the
 * content of ifr/iwr to user (but you are not obliged to use the set/get
 * convention, just use every other two command). More details in iwpriv.c.
 * And I repeat : you are not forced to use them with iwpriv, but you
@@ -348,7 +348,7 @@
 #define SIOCIWLAST      SIOCIWLASTPRIV          /* 0x8BFF */
 #define IW_IOCTL_IDX(cmd)       ((cmd) - SIOCIWFIRST)
-/* Even : get (world access), odd : set (root access) */
+/* Odd : get (world access), even : set (root access) */
 #define IW_IS_SET(cmd)  (!((cmd) & 0x1))
 #define IW_IS_GET(cmd)  ((cmd) & 0x1)
diff --git a/include/media/cx2341x.h b/include/media/cx2341x.h
index ecad55bf0162..d758a52cf556 100644
--- a/include/media/cx2341x.h
+++ b/include/media/cx2341x.h
@@ -57,7 +57,6 @@ struct cx2341x_mpeg_params {
        u16 video_b_frames;
        u16 video_gop_size;
        u16 video_gop_closure;
-        u16 video_pulldown;
        enum v4l2_mpeg_video_bitrate_mode video_bitrate_mode;
        u32 video_bitrate;
        u32 video_bitrate_peak;
@@ -121,8 +120,6 @@ void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix);
 #define CX2341X_DEC_SET_DISPLAY_BUFFERS         0x18
 #define CX2341X_DEC_EXTRACT_VBI                 0x19
 #define CX2341X_DEC_SET_DECODER_SOURCE          0x1a
-#define CX2341X_DEC_SET_AUDIO_OUTPUT            0x1b
-#define CX2341X_DEC_SET_AV_DELAY                0x1c
 #define CX2341X_DEC_SET_PREBUFFERING            0x1e
 /* MPEG encoder API */
@@ -141,7 +138,6 @@ void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix);
 #define CX2341X_ENC_SET_DNR_FILTER_PROPS        0x9d
 #define CX2341X_ENC_SET_CORING_LEVELS           0x9f
 #define CX2341X_ENC_SET_SPATIAL_FILTER_TYPE     0xa1
-#define CX2341X_ENC_SET_3_2_PULLDOWN            0xb1
 #define CX2341X_ENC_SET_VBI_LINE                0xb7
 #define CX2341X_ENC_SET_STREAM_TYPE             0xb9
 #define CX2341X_ENC_SET_OUTPUT_PORT             0xbb
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index 4bb0ad810179..9807a7c15830 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -36,6 +36,11 @@
 #define IR_KEYCODE(tab,code)    (((unsigned)code < IR_KEYTAB_SIZE) \
                                 ? tab[code] : KEY_RESERVED)
+#define RC5_START(x)    (((x)>>12)&3)
+#define RC5_TOGGLE(x)   (((x)>>11)&1)
+#define RC5_ADDR(x)     (((x)>>6)&31)
+#define RC5_INSTR(x)    ((x)&63)
 struct ir_input_state {
        /* configuration */
        int                ir_type;
@@ -48,6 +53,40 @@ struct ir_input_state {
        int                keypressed;  /* current state */
 };
+/* this was saa7134_ir and bttv_ir, moved here for
+ * rc5 decoding. */
+struct card_ir {
+        struct input_dev        *dev;
+        struct ir_input_state   ir;
+        char                    name[32];
+        char                    phys[32];
+        /* Usual gpio signalling */
+        u32                     mask_keycode;
+        u32                     mask_keydown;
+        u32                     mask_keyup;
+        u32                     polling;
+        u32                     last_gpio;
+        int                     shift_by;
+        int                     start; // What should RC5_START() be
+        int                     addr; // What RC5_ADDR() should be.
+        int                     rc5_key_timeout;
+        int                     rc5_remote_gap;
+        struct work_struct      work;
+        struct timer_list       timer;
+        /* RC5 gpio */
+        u32 rc5_gpio;
+        struct timer_list timer_end;    /* timer_end for code completion */
+        struct timer_list timer_keyup;  /* timer_end for key release */
+        u32 last_rc5;                   /* last good rc5 code */
+        u32 last_bit;                   /* last raw bit seen */
+        u32 code;                       /* raw code under construction */
+        struct timeval base_time;       /* time of last seen code */
+        int active;                     /* building raw code */
+};
 void ir_input_init(struct input_dev *dev, struct ir_input_state *ir,
                   int ir_type, IR_KEYTAB_TYPE *ir_codes);
 void ir_input_nokey(struct input_dev *dev, struct ir_input_state *ir);
@@ -58,6 +97,10 @@ int  ir_dump_samples(u32 *samples, int count);
 int  ir_decode_biphase(u32 *samples, int count, int low, int high);
 int  ir_decode_pulsedistance(u32 *samples, int count, int low, int high);
+u32 ir_rc5_decode(unsigned int code);
+void ir_rc5_timer_end(unsigned long data);
+void ir_rc5_timer_keyup(unsigned long data);
 /* Keymaps to be used by other modules */
 extern IR_KEYTAB_TYPE ir_codes_empty[IR_KEYTAB_SIZE];
@@ -94,6 +137,9 @@ extern IR_KEYTAB_TYPE ir_codes_npgtech[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_norwood[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_proteus_2309[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_budget_ci_old[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_asus_pc39[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_encore_enltv[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_tt_1500[IR_KEYTAB_SIZE];
 #endif
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index 9f0e2285a099..f677dfb9d373 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -42,5 +42,8 @@
 #define SAA7115_FREQ_FL_CGCDIV (1 << 1)    /* SA 3A[6], CGCDIV, SAA7115 only */
 #define SAA7115_FREQ_FL_APLL   (1 << 2)    /* SA 3A[3], APLL, SAA7114/5 only */
+#define SAA7115_IPORT_ON    1
+#define SAA7115_IPORT_OFF   0
 #endif
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 91b19921f958..244e440edb53 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -64,9 +64,6 @@
 /* Prints the ioctl in a human-readable format */
 extern void v4l_printk_ioctl(unsigned int cmd);
-/* Prints the ioctl and arg in a human-readable format */
-extern void v4l_printk_ioctl_arg(char *s,unsigned int cmd, void *arg);
 /* Use this macro for non-I2C drivers. Pass the driver name as the first arg. */
 #define v4l_print_ioctl(name, cmd)               \
        do {                                     \
@@ -99,13 +96,6 @@ u32 v4l2_ctrl_next(const u32 * const *ctrl_classes, u32 id);
 /* Internal ioctls */
-/* VIDIOC_INT_G_REGISTER and VIDIOC_INT_S_REGISTER */
-struct v4l2_register {
-        u32 i2c_id;             /* I2C driver ID of the I2C chip. 0 for the I2C adapter. */
-        unsigned long reg;
-        u32 val;
-};
 /* VIDIOC_INT_DECODE_VBI_LINE */
 struct v4l2_decode_vbi_line {
        u32 is_second_field;    /* Set to 0 for the first (odd) field,
@@ -175,9 +165,7 @@ enum v4l2_chip_ident {
   Replacement of TUNER_SET_STANDBY. */
 #define VIDIOC_INT_S_STANDBY         _IOW('d', 94, u32)
-/* only implemented if CONFIG_VIDEO_ADV_DEBUG is defined */
+/* 100, 101 used by  VIDIOC_DBG_[SG]_REGISTER */
-#define VIDIOC_INT_S_REGISTER           _IOW ('d', 100, struct v4l2_register)
-#define VIDIOC_INT_G_REGISTER           _IOWR('d', 101, struct v4l2_register)
 /* Generic reset command. The argument selects which subsystems to reset.
   Passing 0 will always reset the whole chip. */
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index fb96472a1bd3..aeec56992ef5 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -296,6 +296,15 @@ struct video_device
        int (*vidioc_log_status)       (struct file *file, void *fh);
+        /* Debugging ioctls */
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+        int (*vidioc_g_register)       (struct file *file, void *fh,
+                                        struct v4l2_register *reg);
+        int (*vidioc_s_register)       (struct file *file, void *fh,
+                                        struct v4l2_register *reg);
+#endif
 #ifdef OBSOLETE_OWNER /* to be removed soon */
 /* obsolete -- fops->owner is used instead */
 struct module *owner;
diff --git a/include/media/video-buf.h b/include/media/video-buf.h
index 1115a256969f..d6f079476db3 100644
--- a/include/media/video-buf.h
+++ b/include/media/video-buf.h
@@ -78,6 +78,9 @@ struct videobuf_dmabuf {
        /* for kernel buffers */
        void                *vmalloc;
+        /* Stores the userspace pointer to vmalloc area */
+        void                *varea;
        /* for overlay buffers (pci-pci dma) */
        dma_addr_t          bus_addr;
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index f913c30d7b89..8e501a75a764 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -36,12 +36,6 @@ struct mtd_oob_buf {
 #define MTD_CAP_NORFLASH        (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
 #define MTD_CAP_NANDFLASH       (MTD_WRITEABLE)
-// Types of automatic ECC/Checksum available
-#define MTD_ECC_NONE            0       // No automatic ECC available
-#define MTD_ECC_RS_DiskOnChip   1       // Automatic ECC on DiskOnChip
-#define MTD_ECC_SW              2       // SW ECC for Toshiba & Samsung devices
 /* ECC byte placement */
 #define MTD_NANDECC_OFF         0       // Switch off ECC (Not recommended)
 #define MTD_NANDECC_PLACE       1       // Use the given placement in the structure (YAFFS1 legacy mode)
@@ -61,6 +55,8 @@ struct mtd_info_user {
        uint32_t erasesize;
        uint32_t writesize;
        uint32_t oobsize;   // Amount of OOB data per block (e.g. 16)
+        /* The below two fields are obsolete and broken, do not use them
+         * (TODO: remove at some point) */
        uint32_t ecctype;
        uint32_t eccsize;
 };
diff --git a/include/pcmcia/ciscode.h b/include/pcmcia/ciscode.h
index c1da8558339a..eae7e2e84497 100644
--- a/include/pcmcia/ciscode.h
+++ b/include/pcmcia/ciscode.h
@@ -95,6 +95,7 @@
 #define PRODID_QUATECH_DUAL_RS232       0x0012
 #define PRODID_QUATECH_DUAL_RS232_D1    0x0007
 #define PRODID_QUATECH_DUAL_RS232_D2    0x0052
+#define PRODID_QUATECH_DUAL_RS232_G     0x004d
 #define PRODID_QUATECH_QUAD_RS232       0x001b
 #define PRODID_QUATECH_DUAL_RS422       0x000e
 #define PRODID_QUATECH_QUAD_RS422       0x0045
diff --git a/include/rdma/ib_addr.h b/include/rdma/ib_addr.h
index c094e5012862..c36750ff6ae8 100644
--- a/include/rdma/ib_addr.h
+++ b/include/rdma/ib_addr.h
@@ -110,6 +110,12 @@ static inline void ib_addr_set_pkey(struct rdma_dev_addr *dev_addr, u16 pkey)
        dev_addr->broadcast[9] = (unsigned char) pkey;
 }
+static inline void ib_addr_get_mgid(struct rdma_dev_addr *dev_addr,
+                                    union ib_gid *gid)
+{
+        memcpy(gid, dev_addr->broadcast + 4, sizeof *gid);
+}
 static inline void ib_addr_get_sgid(struct rdma_dev_addr *dev_addr,
                                    union ib_gid *gid)
 {
diff --git a/include/rdma/ib_sa.h b/include/rdma/ib_sa.h
index 97715b0c20b6..5e26b2f53f86 100644
--- a/include/rdma/ib_sa.h
+++ b/include/rdma/ib_sa.h
@@ -285,18 +285,6 @@ int ib_sa_path_rec_get(struct ib_sa_client *client,
                       void *context,
                       struct ib_sa_query **query);
-int ib_sa_mcmember_rec_query(struct ib_sa_client *client,
-                             struct ib_device *device, u8 port_num,
-                             u8 method,
-                             struct ib_sa_mcmember_rec *rec,
-                             ib_sa_comp_mask comp_mask,
-                             int timeout_ms, gfp_t gfp_mask,
-                             void (*callback)(int status,
-                                              struct ib_sa_mcmember_rec *resp,
-                                              void *context),
-                             void *context,
-                             struct ib_sa_query **query);
 int ib_sa_service_rec_query(struct ib_sa_client *client,
                         struct ib_device *device, u8 port_num,
                         u8 method,
@@ -309,93 +297,82 @@ int ib_sa_service_rec_query(struct ib_sa_client *client,
                         void *context,
                         struct ib_sa_query **sa_query);
+struct ib_sa_multicast {
+        struct ib_sa_mcmember_rec rec;
+        ib_sa_comp_mask         comp_mask;
+        int                     (*callback)(int status,
+                                            struct ib_sa_multicast *multicast);
+        void                    *context;
+};
 /**
- * ib_sa_mcmember_rec_set - Start an MCMember set query
+ * ib_sa_join_multicast - Initiates a join request to the specified multicast
- * @client:SA client
+ *   group.
- * @device:device to send query on
+ * @client: SA client
- * @port_num: port number to send query on
+ * @device: Device associated with the multicast group.
- * @rec:MCMember Record to send in query
+ * @port_num: Port on the specified device to associate with the multicast
- * @comp_mask:component mask to send in query
+ *   group.
- * @timeout_ms:time to wait for response
+ * @rec: SA multicast member record specifying group attributes.
- * @gfp_mask:GFP mask to use for internal allocations
+ * @comp_mask: Component mask indicating which group attributes of %rec are
- * @callback:function called when query completes, times out or is
+ *   valid.
- * canceled
+ * @gfp_mask: GFP mask for memory allocations.
- * @context:opaque user context passed to callback
+ * @callback: User callback invoked once the join operation completes.
- * @sa_query:query context, used to cancel query
+ * @context: User specified context stored with the ib_sa_multicast structure.
 *
- * Send an MCMember Set query to the SA (eg to join a multicast
+ * This call initiates a multicast join request with the SA for the specified
- * group).  The callback function will be called when the query
+ * multicast group.  If the join operation is started successfully, it returns
- * completes (or fails); status is 0 for a successful response, -EINTR
+ * an ib_sa_multicast structure that is used to track the multicast operation.
- * if the query is canceled, -ETIMEDOUT is the query timed out, or
+ * Users must free this structure by calling ib_free_multicast, even if the
- * -EIO if an error occurred sending the query.  The resp parameter of
+ * join operation later fails.  (The callback status is non-zero.)
- * the callback is only valid if status is 0.
 *
- * If the return value of ib_sa_mcmember_rec_set() is negative, it is
+ * If the join operation fails; status will be non-zero, with the following
- * an error code.  Otherwise it is a query ID that can be used to
+ * failures possible:
- * cancel the query.
+ * -ETIMEDOUT: The request timed out.
+ * -EIO: An error occurred sending the query.
+ * -EINVAL: The MCMemberRecord values differed from the existing group's.
+ * -ENETRESET: Indicates that an fatal error has occurred on the multicast
+ *   group, and the user must rejoin the group to continue using it.
 */
-static inline int
+struct ib_sa_multicast *ib_sa_join_multicast(struct ib_sa_client *client,
-ib_sa_mcmember_rec_set(struct ib_sa_client *client,
+                                             struct ib_device *device, u8 port_num,
-                       struct ib_device *device, u8 port_num,
+                                             struct ib_sa_mcmember_rec *rec,
-                       struct ib_sa_mcmember_rec *rec,
+                                             ib_sa_comp_mask comp_mask, gfp_t gfp_mask,
-                       ib_sa_comp_mask comp_mask,
+                                             int (*callback)(int status,
-                       int timeout_ms, gfp_t gfp_mask,
+                                                             struct ib_sa_multicast
-                       void (*callback)(int status,
+                                                                    *multicast),
-                                        struct ib_sa_mcmember_rec *resp,
+                                             void *context);
-                                        void *context),
-                       void *context,
-                       struct ib_sa_query **query)
-{
-        return ib_sa_mcmember_rec_query(client, device, port_num,
-                                        IB_MGMT_METHOD_SET,
-                                        rec, comp_mask,
-                                        timeout_ms, gfp_mask, callback,
-                                        context, query);
-}
 /**
- * ib_sa_mcmember_rec_delete - Start an MCMember delete query
+ * ib_free_multicast - Frees the multicast tracking structure, and releases
- * @client:SA client
+ *    any reference on the multicast group.
- * @device:device to send query on
+ * @multicast: Multicast tracking structure allocated by ib_join_multicast.
- * @port_num: port number to send query on
- * @rec:MCMember Record to send in query
- * @comp_mask:component mask to send in query
- * @timeout_ms:time to wait for response
- * @gfp_mask:GFP mask to use for internal allocations
- * @callback:function called when query completes, times out or is
- * canceled
- * @context:opaque user context passed to callback
- * @sa_query:query context, used to cancel query
- *
- * Send an MCMember Delete query to the SA (eg to leave a multicast
- * group).  The callback function will be called when the query
- * completes (or fails); status is 0 for a successful response, -EINTR
- * if the query is canceled, -ETIMEDOUT is the query timed out, or
- * -EIO if an error occurred sending the query.  The resp parameter of
- * the callback is only valid if status is 0.
 *
- * If the return value of ib_sa_mcmember_rec_delete() is negative, it
+ * This call blocks until the multicast identifier is destroyed.  It may
- * is an error code.  Otherwise it is a query ID that can be used to
+ * not be called from within the multicast callback; however, returning a non-
- * cancel the query.
+ * zero value from the callback will result in destroying the multicast
+ * tracking structure.
+ */
+void ib_sa_free_multicast(struct ib_sa_multicast *multicast);
+/**
+ * ib_get_mcmember_rec - Looks up a multicast member record by its MGID and
+ *   returns it if found.
+ * @device: Device associated with the multicast group.
+ * @port_num: Port on the specified device to associate with the multicast
+ *   group.
+ * @mgid: MGID of multicast group.
+ * @rec: Location to copy SA multicast member record.
 */
-static inline int
+int ib_sa_get_mcmember_rec(struct ib_device *device, u8 port_num,
-ib_sa_mcmember_rec_delete(struct ib_sa_client *client,
+                           union ib_gid *mgid, struct ib_sa_mcmember_rec *rec);
-                          struct ib_device *device, u8 port_num,
-                          struct ib_sa_mcmember_rec *rec,
+/**
-                          ib_sa_comp_mask comp_mask,
+ * ib_init_ah_from_mcmember - Initialize address handle attributes based on
-                          int timeout_ms, gfp_t gfp_mask,
+ * an SA multicast member record.
-                          void (*callback)(int status,
+ */
-                                           struct ib_sa_mcmember_rec *resp,
+int ib_init_ah_from_mcmember(struct ib_device *device, u8 port_num,
-                                           void *context),
+                             struct ib_sa_mcmember_rec *rec,
-                          void *context,
+                             struct ib_ah_attr *ah_attr);
-                          struct ib_sa_query **query)
-{
-        return ib_sa_mcmember_rec_query(client, device, port_num,
-                                        IB_SA_METHOD_DELETE,
-                                        rec, comp_mask,
-                                        timeout_ms, gfp_mask, callback,
-                                        context, query);
-}
 /**
 * ib_init_ah_from_path - Initialize address handle attributes based on an SA
diff --git a/include/rdma/rdma_cm.h b/include/rdma/rdma_cm.h
index 36cd8a8526a0..2d6a7705eae7 100644
--- a/include/rdma/rdma_cm.h
+++ b/include/rdma/rdma_cm.h
@@ -52,10 +52,13 @@ enum rdma_cm_event_type {
        RDMA_CM_EVENT_ESTABLISHED,
        RDMA_CM_EVENT_DISCONNECTED,
        RDMA_CM_EVENT_DEVICE_REMOVAL,
+        RDMA_CM_EVENT_MULTICAST_JOIN,
+        RDMA_CM_EVENT_MULTICAST_ERROR
 };
 enum rdma_port_space {
        RDMA_PS_SDP  = 0x0001,
+        RDMA_PS_IPOIB= 0x0002,
        RDMA_PS_TCP  = 0x0106,
        RDMA_PS_UDP  = 0x0111,
        RDMA_PS_SCTP = 0x0183
@@ -294,5 +297,21 @@ int rdma_reject(struct rdma_cm_id *id, const void *private_data,
 */
 int rdma_disconnect(struct rdma_cm_id *id);
-#endif /* RDMA_CM_H */
+/**
+ * rdma_join_multicast - Join the multicast group specified by the given
+ *   address.
+ * @id: Communication identifier associated with the request.
+ * @addr: Multicast address identifying the group to join.
+ * @context: User-defined context associated with the join request, returned
+ * to the user through the private_data pointer in multicast events.
+ */
+int rdma_join_multicast(struct rdma_cm_id *id, struct sockaddr *addr,
+                        void *context);
+/**
+ * rdma_leave_multicast - Leave the multicast group specified by the given
+ *   address.
+ */
+void rdma_leave_multicast(struct rdma_cm_id *id, struct sockaddr *addr);
+#endif /* RDMA_CM_H */
diff --git a/include/rdma/rdma_cm_ib.h b/include/rdma/rdma_cm_ib.h
index 9b176df1d667..950424b38f16 100644
--- a/include/rdma/rdma_cm_ib.h
+++ b/include/rdma/rdma_cm_ib.h
@@ -44,7 +44,7 @@
 int rdma_set_ib_paths(struct rdma_cm_id *id,
                      struct ib_sa_path_rec *path_rec, int num_paths);
-/* Global qkey for UD QPs and multicast groups. */
+/* Global qkey for UDP QPs and multicast groups. */
-#define RDMA_UD_QKEY 0x01234567
+#define RDMA_UDP_QKEY 0x01234567
 #endif /* RDMA_CM_IB_H */
diff --git a/include/rdma/rdma_user_cm.h b/include/rdma/rdma_user_cm.h
index 9572ab8eeac1..f632b0c007c9 100644
--- a/include/rdma/rdma_user_cm.h
+++ b/include/rdma/rdma_user_cm.h
@@ -38,7 +38,7 @@
 #include <rdma/ib_user_verbs.h>
 #include <rdma/ib_user_sa.h>
-#define RDMA_USER_CM_ABI_VERSION        3
+#define RDMA_USER_CM_ABI_VERSION        4
 #define RDMA_MAX_PRIVATE_DATA           256
@@ -58,7 +58,9 @@ enum {
        RDMA_USER_CM_CMD_GET_EVENT,
        RDMA_USER_CM_CMD_GET_OPTION,
        RDMA_USER_CM_CMD_SET_OPTION,
-        RDMA_USER_CM_CMD_NOTIFY
+        RDMA_USER_CM_CMD_NOTIFY,
+        RDMA_USER_CM_CMD_JOIN_MCAST,
+        RDMA_USER_CM_CMD_LEAVE_MCAST
 };
 /*
@@ -188,6 +190,13 @@ struct rdma_ucm_notify {
        __u32 event;
 };
+struct rdma_ucm_join_mcast {
+        __u64 response;         /* rdma_ucm_create_id_resp */
+        __u64 uid;
+        struct sockaddr_in6 addr;
+        __u32 id;
+};
 struct rdma_ucm_get_event {
        __u64 response;
 };
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index ebf31b16dc49..9dd37e2f5a84 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -122,6 +122,7 @@ struct scsi_device {
        unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
        unsigned select_no_atn:1;
        unsigned fix_capacity:1;        /* READ_CAPACITY is too high by 1 */
+        unsigned guess_capacity:1;      /* READ_CAPACITY might be too high by 1 */
        unsigned retry_hwerror:1;       /* Retry HARDWARE_ERROR */
        unsigned int device_blocked;    /* Device returned QUEUE_FULL. */
diff --git a/include/scsi/scsi_tgt_if.h b/include/scsi/scsi_tgt_if.h
index 46d5e70d7215..07d6e77ae895 100644
--- a/include/scsi/scsi_tgt_if.h
+++ b/include/scsi/scsi_tgt_if.h
@@ -83,8 +83,5 @@ struct tgt_event {
 } __attribute__ ((aligned (sizeof(uint64_t))));
 #define TGT_RING_SIZE (1UL << 16)
-#define TGT_RING_PAGES (TGT_RING_SIZE >> PAGE_SHIFT)
-#define TGT_EVENT_PER_PAGE (PAGE_SIZE / sizeof(struct tgt_event))
-#define TGT_MAX_EVENTS (TGT_EVENT_PER_PAGE * TGT_RING_PAGES)
 #endif
diff --git a/include/scsi/scsi_transport.h b/include/scsi/scsi_transport.h
index cca1d4926d2a..3c18baa65a72 100644
--- a/include/scsi/scsi_transport.h
+++ b/include/scsi/scsi_transport.h
@@ -22,6 +22,7 @@
 #include <linux/transport_class.h>
 #include <scsi/scsi_host.h>
+#include <scsi/scsi_device.h>
 struct scsi_transport_template {
        /* the attribute containers */
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index eb7ce96ddf3a..23e45a4cf0e4 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -628,7 +628,7 @@
 #define FXWC_SPDIFLEFT          (1<<22)         /* 0x00400000 */
 #define FXWC_SPDIFRIGHT         (1<<23)         /* 0x00800000 */
-#define A_TBLSZ `               0x43    /* Effects Tank Internal Table Size. Only low byte or register used */
+#define A_TBLSZ                 0x43    /* Effects Tank Internal Table Size. Only low byte or register used */
 #define TCBS                    0x44            /* Tank cache buffer size register                      */
 #define TCBS_MASK               0x00000007      /* Tank cache buffer size field                         */
diff --git a/include/sound/version.h b/include/sound/version.h
index c39b3802cf18..a9ba7ee69939 100644
--- a/include/sound/version.h
+++ b/include/sound/version.h
@@ -1,3 +1,3 @@
 /* include/version.h.  Generated by alsa/ksync script.  */
 #define CONFIG_SND_VERSION "1.0.14rc2"
-#define CONFIG_SND_DATE " (Fri Feb 09 13:50:10 2007 UTC)"
+#define CONFIG_SND_DATE " (Wed Feb 14 07:42:13 2007 UTC)"