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-rw-r--r--include/asm-sh/cpu-sh4/freq.h4
-rw-r--r--include/asm-sh/pci.h2
-rw-r--r--include/asm-sh/r7780rp.h68
3 files changed, 57 insertions, 17 deletions
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index 602d061ca2dc..99402547ed06 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -14,6 +14,10 @@
14#define FRQCR 0xa4150000 14#define FRQCR 0xa4150000
15#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 15#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
16#define FRQCR 0xffc80000 16#define FRQCR 0xffc80000
17#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
18#define FRQCR0 0xffc80000
19#define FRQCR1 0xffc80004
20#define FRQMR1 0xffc80014
17#else 21#else
18#define FRQCR 0xffc00000 22#define FRQCR 0xffc00000
19#endif 23#endif
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index 6ccc948fe216..b1f9a9e0231e 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -35,7 +35,7 @@ extern struct pci_channel board_pci_channels[];
35/* 35/*
36 * I/O routine helpers 36 * I/O routine helpers
37 */ 37 */
38#ifdef CONFIG_CPU_SUBTYPE_SH7780 38#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
39#define PCI_IO_AREA 0xFE400000 39#define PCI_IO_AREA 0xFE400000
40#define PCI_IO_SIZE 0x00400000 40#define PCI_IO_SIZE 0x00400000
41#else 41#else
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index c18f648a7995..8c0721965a5e 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -1,17 +1,11 @@
1#ifndef __ASM_SH_RENESAS_R7780RP_H 1#ifndef __ASM_SH_RENESAS_R7780RP_H
2#define __ASM_SH_RENESAS_R7780RP_H 2#define __ASM_SH_RENESAS_R7780RP_H
3 3
4/*
5 * linux/include/asm-sh/r7780rp.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Solutions Highlander R7780RP support
10 */
11
12/* Box specific addresses. */ 4/* Box specific addresses. */
13#if defined(CONFIG_SH_R7780MP) 5#if defined(CONFIG_SH_R7780MP)
14#define PA_BCR 0xa4000000 /* FPGA */ 6#define PA_BCR 0xa4000000 /* FPGA */
7#define PA_SDPOW (-1)
8
15#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ 9#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
16#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ 10#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
17#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ 11#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
@@ -70,18 +64,12 @@
70#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ 64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
71#define PA_PMR (PA_BCR+0x0900) /* */ 65#define PA_PMR (PA_BCR+0x0900) /* */
72 66
73#define PA_AX88796L 0xa4100400 /* AX88796L Area */
74#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
75#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
76#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
77
78#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ 67#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
79 68
80#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ 69#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */
81#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ 70#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */
82#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ 71#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */
83#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ 72#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */
84// #define IRQ_CFINST 0 /* CF Card Insert IRQ */
85#define IRQ_TP 2 /* Touch Panel IRQ */ 73#define IRQ_TP 2 /* Touch Panel IRQ */
86#define IRQ_SCI1 3 /* SCI1 IRQ */ 74#define IRQ_SCI1 3 /* SCI1 IRQ */
87#define IRQ_SCI0 4 /* SCI0 IRQ */ 75#define IRQ_SCI0 4 /* SCI0 IRQ */
@@ -95,7 +83,7 @@
95#define IRQ_ONETH 13 /* On board Ethernet IRQ */ 83#define IRQ_ONETH 13 /* On board Ethernet IRQ */
96#define IRQ_PSW 14 /* Push Switch IRQ */ 84#define IRQ_PSW 14 /* Push Switch IRQ */
97 85
98#else /* R7780RP */ 86#elif defined(CONFIG_SH_R7780RP)
99 87
100#define PA_BCR 0xa5000000 /* FPGA */ 88#define PA_BCR 0xa5000000 /* FPGA */
101#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ 89#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
@@ -163,7 +151,55 @@
163#define IRQ_PSW 13 /* Push Switch IRQ */ 151#define IRQ_PSW 13 /* Push Switch IRQ */
164#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ 152#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */
165 153
166#endif /* CONFIG_SH_R7780MP */ 154#elif defined(CONFIG_SH_R7785RP)
155#define PA_BCR 0xa4000000 /* FPGA */
156#define PA_SDPOW (-1)
157
158#define PA_PCISCR (PA_BCR+0x0000)
159#define PA_IRLPRA (PA_BCR+0x0002)
160#define PA_IRLPRB (PA_BCR+0x0004)
161#define PA_IRLPRC (PA_BCR+0x0006)
162#define PA_IRLPRD (PA_BCR+0x0008)
163#define IRLCNTR1 (PA_BCR+0x0010)
164#define PA_IRLPRE (PA_BCR+0x000a)
165#define PA_IRLPRF (PA_BCR+0x000c)
166#define PA_EXIRLCR (PA_BCR+0x000e)
167#define PA_IRLMCR1 (PA_BCR+0x0010)
168#define PA_IRLMCR2 (PA_BCR+0x0012)
169#define PA_IRLSSR1 (PA_BCR+0x0014)
170#define PA_IRLSSR2 (PA_BCR+0x0016)
171#define PA_CFTCR (PA_BCR+0x0100)
172#define PA_CFPCR (PA_BCR+0x0102)
173#define PA_PCICR (PA_BCR+0x0110)
174#define PA_IVDRCTL (PA_BCR+0x0112)
175#define PA_IVDRSR (PA_BCR+0x0114)
176#define PA_PDRSTCR (PA_BCR+0x0116)
177#define PA_POFF (PA_BCR+0x0120)
178#define PA_LCDCR (PA_BCR+0x0130)
179#define PA_TPCR (PA_BCR+0x0140)
180#define PA_TPCKCR (PA_BCR+0x0142)
181#define PA_TPRSTR (PA_BCR+0x0144)
182#define PA_TPXPDR (PA_BCR+0x0146)
183#define PA_TPYPDR (PA_BCR+0x0148)
184#define PA_GPIOPFR (PA_BCR+0x0150)
185#define PA_GPIODR (PA_BCR+0x0152)
186#define PA_OBLED (PA_BCR+0x0154)
187#define PA_SWSR (PA_BCR+0x0156)
188#define PA_VERREG (PA_BCR+0x0158)
189#define PA_SMCR (PA_BCR+0x0200)
190#define PA_SMSMADR (PA_BCR+0x0202)
191#define PA_SMMR (PA_BCR+0x0204)
192#define PA_SMSADR1 (PA_BCR+0x0206)
193#define PA_SMSADR32 (PA_BCR+0x0244)
194#define PA_SMTRDR1 (PA_BCR+0x0246)
195#define PA_SMTRDR16 (PA_BCR+0x0264)
196#define PA_CU3MDR (PA_BCR+0x0300)
197#define PA_CU5MDR (PA_BCR+0x0302)
198#define PA_MMSR (PA_BCR+0x0400)
199#endif
200
201void make_r7780rp_irq(unsigned int irq);
202void highlander_init_irq(void);
167 203
168#define __IO_PREFIX r7780rp 204#define __IO_PREFIX r7780rp
169#include <asm/io_generic.h> 205#include <asm/io_generic.h>