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-rw-r--r--include/acpi/actbl.h1
-rw-r--r--include/linux/iommu-helper.h1
-rw-r--r--include/linux/pci-aspm.h5
-rw-r--r--include/linux/pci.h2
-rw-r--r--include/linux/pci_regs.h1
5 files changed, 10 insertions, 0 deletions
diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index 1ebbe883f786..13a3d9ad92db 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -277,6 +277,7 @@ enum acpi_prefered_pm_profiles {
277#define BAF_LEGACY_DEVICES 0x0001 277#define BAF_LEGACY_DEVICES 0x0001
278#define BAF_8042_KEYBOARD_CONTROLLER 0x0002 278#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
279#define BAF_MSI_NOT_SUPPORTED 0x0008 279#define BAF_MSI_NOT_SUPPORTED 0x0008
280#define BAF_PCIE_ASPM_CONTROL 0x0010
280 281
281#define FADT2_REVISION_ID 3 282#define FADT2_REVISION_ID 3
282#define FADT2_MINUS_REVISION_ID 2 283#define FADT2_MINUS_REVISION_ID 2
diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h
index c975caf75385..f8598f583944 100644
--- a/include/linux/iommu-helper.h
+++ b/include/linux/iommu-helper.h
@@ -8,3 +8,4 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
8 unsigned long align_mask); 8 unsigned long align_mask);
9extern void iommu_area_free(unsigned long *map, unsigned long start, 9extern void iommu_area_free(unsigned long *map, unsigned long start,
10 unsigned int nr); 10 unsigned int nr);
11extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len);
diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h
index a1a1e618e996..91ba0b338b47 100644
--- a/include/linux/pci-aspm.h
+++ b/include/linux/pci-aspm.h
@@ -27,6 +27,7 @@ extern void pcie_aspm_init_link_state(struct pci_dev *pdev);
27extern void pcie_aspm_exit_link_state(struct pci_dev *pdev); 27extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
28extern void pcie_aspm_pm_state_change(struct pci_dev *pdev); 28extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
29extern void pci_disable_link_state(struct pci_dev *pdev, int state); 29extern void pci_disable_link_state(struct pci_dev *pdev, int state);
30extern void pcie_no_aspm(void);
30#else 31#else
31static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) 32static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
32{ 33{
@@ -40,6 +41,10 @@ static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev)
40static inline void pci_disable_link_state(struct pci_dev *pdev, int state) 41static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
41{ 42{
42} 43}
44
45static inline void pcie_no_aspm(void)
46{
47}
43#endif 48#endif
44 49
45#ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */ 50#ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 1d296d31abe0..825be3878f68 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -124,6 +124,8 @@ enum pci_dev_flags {
124 * generation too. 124 * generation too.
125 */ 125 */
126 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, 126 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
127 /* Device configuration is irrevocably lost if disabled into D3 */
128 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
127}; 129};
128 130
129typedef unsigned short __bitwise pci_bus_flags_t; 131typedef unsigned short __bitwise pci_bus_flags_t;
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 19958b929905..450684f7eaac 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -374,6 +374,7 @@
374#define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */ 374#define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */
375#define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */ 375#define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */
376#define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */ 376#define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */
377#define PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */
377#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ 378#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
378#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ 379#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
379#define PCI_EXP_DEVCTL 8 /* Device Control */ 380#define PCI_EXP_DEVCTL 8 /* Device Control */