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-rw-r--r--include/asm-ia64/pal.h10
-rw-r--r--include/asm-ia64/processor.h1
2 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 20a8d618c845..d1587e4f5759 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -78,6 +78,7 @@
78#define PAL_VM_TR_READ 261 /* read contents of translation register */ 78#define PAL_VM_TR_READ 261 /* read contents of translation register */
79#define PAL_GET_PSTATE 262 /* get the current P-state */ 79#define PAL_GET_PSTATE 262 /* get the current P-state */
80#define PAL_SET_PSTATE 263 /* set the P-state */ 80#define PAL_SET_PSTATE 263 /* set the P-state */
81#define PAL_BRAND_INFO 274 /* Processor branding information */
81 82
82#ifndef __ASSEMBLY__ 83#ifndef __ASSEMBLY__
83 84
@@ -1133,6 +1134,15 @@ ia64_pal_set_pstate (u64 pstate_index)
1133 return iprv.status; 1134 return iprv.status;
1134} 1135}
1135 1136
1137/* Processor branding information*/
1138static inline s64
1139ia64_pal_get_brand_info (char *brand_info)
1140{
1141 struct ia64_pal_retval iprv;
1142 PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0);
1143 return iprv.status;
1144}
1145
1136/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are 1146/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
1137 * suspended, but cache and TLB coherency is maintained. 1147 * suspended, but cache and TLB coherency is maintained.
1138 */ 1148 */
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 265f4824db0e..ead68f8eb883 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -163,6 +163,7 @@ struct cpuinfo_ia64 {
163 __u8 family; 163 __u8 family;
164 __u8 archrev; 164 __u8 archrev;
165 char vendor[16]; 165 char vendor[16];
166 char *model_name;
166 167
167#ifdef CONFIG_NUMA 168#ifdef CONFIG_NUMA
168 struct ia64_node_data *node_data; 169 struct ia64_node_data *node_data;