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-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h36
-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_usart.h123
-rw-r--r--include/asm-arm/byteorder.h11
-rw-r--r--include/asm-arm/mach/serial_at91rm9200.h36
-rw-r--r--include/asm-arm/memory.h9
-rw-r--r--include/linux/serial_core.h3
6 files changed, 217 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h b/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h
new file mode 100644
index 000000000000..ce1150d4438d
--- /dev/null
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h
@@ -0,0 +1,36 @@
1/*
2 * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Peripheral Data Controller (PDC) registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91RM9200_PDC_H
17#define AT91RM9200_PDC_H
18
19#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
20#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
21#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
22#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
23#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
24#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
25#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
26#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
27
28#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
29#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
30#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
31#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
32#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
33
34#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
35
36#endif
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_usart.h b/include/asm-arm/arch-at91rm9200/at91rm9200_usart.h
new file mode 100644
index 000000000000..79f851e31b9c
--- /dev/null
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_usart.h
@@ -0,0 +1,123 @@
1/*
2 * include/asm-arm/arch-at91rm9200/at91rm9200_usart.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * USART registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91RM9200_USART_H
17#define AT91RM9200_USART_H
18
19#define AT91_US_CR 0x00 /* Control Register */
20#define AT91_US_RSTRX (1 << 2) /* Reset Receiver */
21#define AT91_US_RSTTX (1 << 3) /* Reset Transmitter */
22#define AT91_US_RXEN (1 << 4) /* Receiver Enable */
23#define AT91_US_RXDIS (1 << 5) /* Receiver Disable */
24#define AT91_US_TXEN (1 << 6) /* Transmitter Enable */
25#define AT91_US_TXDIS (1 << 7) /* Transmitter Disable */
26#define AT91_US_RSTSTA (1 << 8) /* Reset Status Bits */
27#define AT91_US_STTBRK (1 << 9) /* Start Break */
28#define AT91_US_STPBRK (1 << 10) /* Stop Break */
29#define AT91_US_STTTO (1 << 11) /* Start Time-out */
30#define AT91_US_SENDA (1 << 12) /* Send Address */
31#define AT91_US_RSTIT (1 << 13) /* Reset Iterations */
32#define AT91_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
33#define AT91_US_RETTO (1 << 15) /* Rearm Time-out */
34#define AT91_US_DTREN (1 << 16) /* Data Terminal Ready Enable */
35#define AT91_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable */
36#define AT91_US_RTSEN (1 << 18) /* Request To Send Enable */
37#define AT91_US_RTSDIS (1 << 19) /* Request To Send Disable */
38
39#define AT91_US_MR 0x04 /* Mode Register */
40#define AT91_US_USMODE (0xf << 0) /* Mode of the USART */
41#define AT91_US_USMODE_NORMAL 0
42#define AT91_US_USMODE_RS485 1
43#define AT91_US_USMODE_HWHS 2
44#define AT91_US_USMODE_MODEM 3
45#define AT91_US_USMODE_ISO7816_T0 4
46#define AT91_US_USMODE_ISO7816_T1 6
47#define AT91_US_USMODE_IRDA 8
48#define AT91_US_USCLKS (3 << 4) /* Clock Selection */
49#define AT91_US_CHRL (3 << 6) /* Character Length */
50#define AT91_US_CHRL_5 (0 << 6)
51#define AT91_US_CHRL_6 (1 << 6)
52#define AT91_US_CHRL_7 (2 << 6)
53#define AT91_US_CHRL_8 (3 << 6)
54#define AT91_US_SYNC (1 << 8) /* Synchronous Mode Select */
55#define AT91_US_PAR (7 << 9) /* Parity Type */
56#define AT91_US_PAR_EVEN (0 << 9)
57#define AT91_US_PAR_ODD (1 << 9)
58#define AT91_US_PAR_SPACE (2 << 9)
59#define AT91_US_PAR_MARK (3 << 9)
60#define AT91_US_PAR_NONE (4 << 9)
61#define AT91_US_PAR_MULTI_DROP (6 << 9)
62#define AT91_US_NBSTOP (3 << 12) /* Number of Stop Bits */
63#define AT91_US_NBSTOP_1 (0 << 12)
64#define AT91_US_NBSTOP_1_5 (1 << 12)
65#define AT91_US_NBSTOP_2 (2 << 12)
66#define AT91_US_CHMODE (3 << 14) /* Channel Mode */
67#define AT91_US_CHMODE_NORMAL (0 << 14)
68#define AT91_US_CHMODE_ECHO (1 << 14)
69#define AT91_US_CHMODE_LOC_LOOP (2 << 14)
70#define AT91_US_CHMODE_REM_LOOP (3 << 14)
71#define AT91_US_MSBF (1 << 16) /* Bit Order */
72#define AT91_US_MODE9 (1 << 17) /* 9-bit Character Length */
73#define AT91_US_CLKO (1 << 18) /* Clock Output Select */
74#define AT91_US_OVER (1 << 19) /* Oversampling Mode */
75#define AT91_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
76#define AT91_US_DSNACK (1 << 21) /* Disable Successive NACK */
77#define AT91_US_MAX_ITER (7 << 24) /* Max Iterations */
78#define AT91_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
79
80#define AT91_US_IER 0x08 /* Interrupt Enable Register */
81#define AT91_US_RXRDY (1 << 0) /* Receiver Ready */
82#define AT91_US_TXRDY (1 << 1) /* Transmitter Ready */
83#define AT91_US_RXBRK (1 << 2) /* Break Received / End of Break */
84#define AT91_US_ENDRX (1 << 3) /* End of Receiver Transfer */
85#define AT91_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
86#define AT91_US_OVRE (1 << 5) /* Overrun Error */
87#define AT91_US_FRAME (1 << 6) /* Framing Error */
88#define AT91_US_PARE (1 << 7) /* Parity Error */
89#define AT91_US_TIMEOUT (1 << 8) /* Receiver Time-out */
90#define AT91_US_TXEMPTY (1 << 9) /* Transmitter Empty */
91#define AT91_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
92#define AT91_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
93#define AT91_US_RXBUFF (1 << 12) /* Reception Buffer Full */
94#define AT91_US_NACK (1 << 13) /* Non Acknowledge */
95#define AT91_US_RIIC (1 << 16) /* Ring Indicator Input Change */
96#define AT91_US_DSRIC (1 << 17) /* Data Set Ready Input Change */
97#define AT91_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change */
98#define AT91_US_CTSIC (1 << 19) /* Clear to Send Input Change */
99#define AT91_US_RI (1 << 20) /* RI */
100#define AT91_US_DSR (1 << 21) /* DSR */
101#define AT91_US_DCD (1 << 22) /* DCD */
102#define AT91_US_CTS (1 << 23) /* CTS */
103
104#define AT91_US_IDR 0x0c /* Interrupt Disable Register */
105#define AT91_US_IMR 0x10 /* Interrupt Mask Register */
106#define AT91_US_CSR 0x14 /* Channel Status Register */
107#define AT91_US_RHR 0x18 /* Receiver Holding Register */
108#define AT91_US_THR 0x1c /* Transmitter Holding Register */
109
110#define AT91_US_BRGR 0x20 /* Baud Rate Generator Register */
111#define AT91_US_CD (0xffff << 0) /* Clock Divider */
112
113#define AT91_US_RTOR 0x24 /* Receiver Time-out Register */
114#define AT91_US_TO (0xffff << 0) /* Time-out Value */
115
116#define AT91_US_TTGR 0x28 /* Transmitter Timeguard Register */
117#define AT91_US_TG (0xff << 0) /* Timeguard Value */
118
119#define AT91_US_FIDI 0x40 /* FI DI Ratio Register */
120#define AT91_US_NER 0x44 /* Number of Errors Register */
121#define AT91_US_IF 0x4c /* IrDA Filter Register */
122
123#endif
diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h
index 741f5bc5d016..17eaf8bdf092 100644
--- a/include/asm-arm/byteorder.h
+++ b/include/asm-arm/byteorder.h
@@ -22,7 +22,16 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
22{ 22{
23 __u32 t; 23 __u32 t;
24 24
25 t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ 25 if (__builtin_constant_p(x)) {
26 t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
27 } else {
28 /*
29 * The compiler needs a bit of a hint here to always do the
30 * right thing and not screw it up to different degrees
31 * depending on the gcc version.
32 */
33 asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
34 }
26 x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */ 35 x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
27 t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */ 36 t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
28 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */ 37 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
diff --git a/include/asm-arm/mach/serial_at91rm9200.h b/include/asm-arm/mach/serial_at91rm9200.h
new file mode 100644
index 000000000000..98f4b0cb883c
--- /dev/null
+++ b/include/asm-arm/mach/serial_at91rm9200.h
@@ -0,0 +1,36 @@
1/*
2 * linux/include/asm-arm/mach/serial_at91rm9200.h
3 *
4 * Based on serial_sa1100.h by Nicolas Pitre
5 *
6 * Copyright (C) 2002 ATMEL Rousset
7 *
8 * Low level machine dependent UART functions.
9 */
10#include <linux/config.h>
11
12struct uart_port;
13
14/*
15 * This is a temporary structure for registering these
16 * functions; it is intended to be discarded after boot.
17 */
18struct at91rm9200_port_fns {
19 void (*set_mctrl)(struct uart_port *, u_int);
20 u_int (*get_mctrl)(struct uart_port *);
21 void (*enable_ms)(struct uart_port *);
22 void (*pm)(struct uart_port *, u_int, u_int);
23 int (*set_wake)(struct uart_port *, u_int);
24 int (*open)(struct uart_port *);
25 void (*close)(struct uart_port *);
26};
27
28#if defined(CONFIG_SERIAL_AT91)
29void at91_register_uart_fns(struct at91rm9200_port_fns *fns);
30void at91_register_uart(int idx, int port);
31#else
32#define at91_register_uart_fns(fns) do { } while (0)
33#define at91_register_uart(idx,port) do { } while (0)
34#endif
35
36
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
index 3d7f08bd9030..b4e1146ab682 100644
--- a/include/asm-arm/memory.h
+++ b/include/asm-arm/memory.h
@@ -25,6 +25,7 @@
25#include <linux/config.h> 25#include <linux/config.h>
26#include <linux/compiler.h> 26#include <linux/compiler.h>
27#include <asm/arch/memory.h> 27#include <asm/arch/memory.h>
28#include <asm/sizes.h>
28 29
29#ifndef TASK_SIZE 30#ifndef TASK_SIZE
30/* 31/*
@@ -48,6 +49,14 @@
48#endif 49#endif
49 50
50/* 51/*
52 * Size of DMA-consistent memory region. Must be multiple of 2M,
53 * between 2MB and 14MB inclusive.
54 */
55#ifndef CONSISTENT_DMA_SIZE
56#define CONSISTENT_DMA_SIZE SZ_2M
57#endif
58
59/*
51 * Physical vs virtual RAM address space conversion. These are 60 * Physical vs virtual RAM address space conversion. These are
52 * private definitions which should NOT be used outside memory.h 61 * private definitions which should NOT be used outside memory.h
53 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 62 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index e3710d7e260a..a8187c3c8a7b 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -67,6 +67,9 @@
67/* Parisc type numbers. */ 67/* Parisc type numbers. */
68#define PORT_MUX 48 68#define PORT_MUX 48
69 69
70/* Atmel AT91RM9200 SoC */
71#define PORT_AT91RM9200 49
72
70/* Macintosh Zilog type numbers */ 73/* Macintosh Zilog type numbers */
71#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 74#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
72#define PORT_PMAC_ZILOG 51 75#define PORT_PMAC_ZILOG 51
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 14:24:35 -0500