195 files changed, 4181 insertions, 1960 deletions

diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h
new file mode 100644
index 000000000000..81a8937486cb
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa3xx_nand.h
@@ -0,0 +1,18 @@
+#ifndef __ASM_ARCH_PXA3XX_NAND_H
+#define __ASM_ARCH_PXA3XX_NAND_H
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+struct pxa3xx_nand_platform_data {
+
+        /* the data flash bus is shared between the Static Memory
+         * Controller and the Data Flash Controller,  the arbiter
+         * controls the ownership of the bus
+         */
+        int     enable_arbiter;
+
+        struct mtd_partition *parts;
+        unsigned int    nr_parts;
+};
+#endif /* __ASM_ARCH_PXA3XX_NAND_H */
diff --git a/include/asm-arm/plat-s3c/nand.h b/include/asm-arm/plat-s3c/nand.h
index 8816f7f9cee1..ad6bbe90616e 100644
--- a/include/asm-arm/plat-s3c/nand.h
+++ b/include/asm-arm/plat-s3c/nand.h
@@ -22,11 +22,14 @@
 */
 
 struct s3c2410_nand_set {
+        unsigned int            disable_ecc : 1;
+
         int                     nr_chips;
         int                     nr_partitions;
         char                    *name;
         int                     *nr_map;
         struct mtd_partition    *partitions;
+        struct nand_ecclayout   *ecc_layout;
 };
 
 struct s3c2410_platform_nand {
@@ -36,6 +39,8 @@ struct s3c2410_platform_nand {
         int     twrph0; /* active time for nWE/nOE */
         int     twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
 
+        unsigned int    ignore_unset_ecc : 1;
+
         int                     nr_sets;
         struct s3c2410_nand_set *sets;
 
diff --git a/include/asm-blackfin/.gitignore b/include/asm-blackfin/.gitignore
new file mode 100644
index 000000000000..7858564a4466
--- /dev/null
+++ b/include/asm-blackfin/.gitignore
@@ -0,0 +1 @@
++mach
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index 5dba3a735596..716df7c85923 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -112,20 +112,10 @@ extern void init_leds(void);
 
 extern const char bfin_board_name[];
 extern unsigned long wall_jiffies;
-extern unsigned long ipdt_table[];
-extern unsigned long dpdt_table[];
-extern unsigned long icplb_table[];
-extern unsigned long dcplb_table[];
-
-extern unsigned long ipdt_swapcount_table[];
-extern unsigned long dpdt_swapcount_table[];
-
-extern unsigned long table_start, table_end;
 
 extern unsigned long bfin_sic_iwr[];
 extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
 extern struct file_operations dpmc_fops;
-extern char _start;
 extern unsigned long _ramstart, _ramend, _rambase;
 extern unsigned long memory_start, memory_end, physical_mem_end;
 extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
diff --git a/include/asm-blackfin/bug.h b/include/asm-blackfin/bug.h
index 41e53b29f167..6d3e11b1fc57 100644
--- a/include/asm-blackfin/bug.h
+++ b/include/asm-blackfin/bug.h
@@ -1,4 +1,17 @@
 #ifndef _BLACKFIN_BUG_H
 #define _BLACKFIN_BUG_H
+
+#ifdef CONFIG_BUG
+#define HAVE_ARCH_BUG
+
+#define BUG() do { \
+        dump_bfin_trace_buffer(); \
+        printk(KERN_EMERG "BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+        panic("BUG!"); \
+} while (0)
+
+#endif
+
 #include <asm-generic/bug.h>
+
 #endif
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h
index 654375c2b746..5b0da9a69b67 100644
--- a/include/asm-blackfin/cplb.h
+++ b/include/asm-blackfin/cplb.h
@@ -74,32 +74,6 @@
 #define ASYNC_MEMORY_CPLB_COVERAGE      ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
                                  ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M)
 
-/*
-* Number of required data CPLB switchtable entries
-* MEMSIZE / 4 (we mostly install 4M page size CPLBs
-* approx 16 for smaller 1MB page size CPLBs for allignment purposes
-* 1 for L1 Data Memory
-* possibly 1 for L2 Data Memory
-* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
-* 1 for ASYNC Memory
-*/
-
-
-#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \
-                                 + ASYNC_MEMORY_CPLB_COVERAGE) * 2)
-
-/*
-* Number of required instruction CPLB switchtable entries
-* MEMSIZE / 4 (we mostly install 4M page size CPLBs
-* approx 12 for smaller 1MB page size CPLBs for allignment purposes
-* 1 for L1 Instruction Memory
-* possibly 1 for L2 Instruction Memory
-* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
-*/
-
-#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2)
-
-
 #define CPLB_ENABLE_ICACHE_P    0
 #define CPLB_ENABLE_DCACHE_P    1
 #define CPLB_ENABLE_DCACHE2_P   2
diff --git a/include/asm-blackfin/dma-mapping.h b/include/asm-blackfin/dma-mapping.h
index 282fabccf6a6..1a13c2fc3667 100644
--- a/include/asm-blackfin/dma-mapping.h
+++ b/include/asm-blackfin/dma-mapping.h
@@ -27,6 +27,14 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                                  enum dma_data_direction direction);
 
+static inline dma_addr_t
+dma_map_page(struct device *dev, struct page *page,
+             unsigned long offset, size_t size,
+             enum dma_data_direction dir)
+{
+        return dma_map_single(dev, page_address(page) + offset, size, dir);
+}
+
 /*
  * Unmap a single streaming mode DMA translation.  The dma_addr and size
  * must match what was provided for in a previous pci_map_single call.  All
@@ -38,6 +46,13 @@ extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
 extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                           enum dma_data_direction direction);
 
+static inline void
+dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
+               enum dma_data_direction dir)
+{
+        dma_unmap_single(dev, dma_addr, size, dir);
+}
+
 /*
  * Map a set of buffers described by scatterlist in streaming
  * mode for DMA.  This is the scather-gather version of the
diff --git a/include/asm-blackfin/dma.h b/include/asm-blackfin/dma.h
index 16d493574ba8..c0d5259e315b 100644
--- a/include/asm-blackfin/dma.h
+++ b/include/asm-blackfin/dma.h
@@ -191,4 +191,7 @@ void clear_dma_irqstat(unsigned int channel);
 void *dma_memcpy(void *dest, const void *src, size_t count);
 void *safe_dma_memcpy(void *dest, const void *src, size_t count);
 
+extern int channel2irq(unsigned int channel);
+extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
+
 #endif
diff --git a/include/asm-blackfin/gptimers.h b/include/asm-blackfin/gptimers.h
index 4f318f1fd2d9..0520d2aac8f3 100644
--- a/include/asm-blackfin/gptimers.h
+++ b/include/asm-blackfin/gptimers.h
@@ -22,6 +22,18 @@
 # define TIMER0_GROUP_REG      TIMER_ENABLE
 #endif
 /*
+ * BF54x: 11 timers (BF542: 8 timers):
+ */
+#if defined(BF548_FAMILY)
+# ifdef CONFIG_BF542
+#  define MAX_BLACKFIN_GPTIMERS 8
+# else
+#  define MAX_BLACKFIN_GPTIMERS 11
+#  define TIMER8_GROUP_REG      TIMER_ENABLE1
+# endif
+# define TIMER0_GROUP_REG       TIMER_ENABLE0
+#endif
+/*
  * BF561: 12 timers:
  */
 #if defined(CONFIG_BF561)
@@ -44,40 +56,28 @@
 #define TIMER0bit  0x0001  /*  0001b */
 #define TIMER1bit  0x0002  /*  0010b */
 #define TIMER2bit  0x0004  /*  0100b */
-
-#if (MAX_BLACKFIN_GPTIMERS > 3)
-# define TIMER3bit  0x0008
-# define TIMER4bit  0x0010
-# define TIMER5bit  0x0020
-# define TIMER6bit  0x0040
-# define TIMER7bit  0x0080
-#endif
-
-#if (MAX_BLACKFIN_GPTIMERS > 8)
-# define TIMER8bit  0x0100
-# define TIMER9bit  0x0200
-# define TIMER10bit 0x0400
-# define TIMER11bit 0x0800
-#endif
+#define TIMER3bit  0x0008
+#define TIMER4bit  0x0010
+#define TIMER5bit  0x0020
+#define TIMER6bit  0x0040
+#define TIMER7bit  0x0080
+#define TIMER8bit  0x0100
+#define TIMER9bit  0x0200
+#define TIMER10bit 0x0400
+#define TIMER11bit 0x0800
 
 #define TIMER0_id   0
 #define TIMER1_id   1
 #define TIMER2_id   2
-
-#if (MAX_BLACKFIN_GPTIMERS > 3)
-# define TIMER3_id   3
-# define TIMER4_id   4
-# define TIMER5_id   5
-# define TIMER6_id   6
-# define TIMER7_id   7
-#endif
-
-#if (MAX_BLACKFIN_GPTIMERS > 8)
-# define TIMER8_id   8
-# define TIMER9_id   9
-# define TIMER10_id 10
-# define TIMER11_id 11
-#endif
+#define TIMER3_id   3
+#define TIMER4_id   4
+#define TIMER5_id   5
+#define TIMER6_id   6
+#define TIMER7_id   7
+#define TIMER8_id   8
+#define TIMER9_id   9
+#define TIMER10_id 10
+#define TIMER11_id 11
 
 /* associated timers for ppi framesync: */
 
@@ -124,45 +124,31 @@
 /*
  * Timer Status Register Bits
  */
-#define TIMER_STATUS_TIMIL0 0x0001
-#define TIMER_STATUS_TIMIL1 0x0002
-#define TIMER_STATUS_TIMIL2 0x0004
-#if (MAX_BLACKFIN_GPTIMERS > 3)
-# define TIMER_STATUS_TIMIL3 0x00000008
-# define TIMER_STATUS_TIMIL4 0x00010000
-# define TIMER_STATUS_TIMIL5 0x00020000
-# define TIMER_STATUS_TIMIL6 0x00040000
-# define TIMER_STATUS_TIMIL7 0x00080000
-# if (MAX_BLACKFIN_GPTIMERS > 8)
-#  define TIMER_STATUS_TIMIL8  0x0001
-#  define TIMER_STATUS_TIMIL9  0x0002
-#  define TIMER_STATUS_TIMIL10 0x0004
-#  define TIMER_STATUS_TIMIL11 0x0008
-# endif
-# define TIMER_STATUS_INTR   0x000F000F
-#else
-# define TIMER_STATUS_INTR   0x0007     /* any timer interrupt */
-#endif
-
-#define TIMER_STATUS_TOVF0  0x0010      /* timer 0 overflow error */
-#define TIMER_STATUS_TOVF1  0x0020
-#define TIMER_STATUS_TOVF2  0x0040
-#if (MAX_BLACKFIN_GPTIMERS > 3)
-# define TIMER_STATUS_TOVF3  0x00000080
-# define TIMER_STATUS_TOVF4  0x00100000
-# define TIMER_STATUS_TOVF5  0x00200000
-# define TIMER_STATUS_TOVF6  0x00400000
-# define TIMER_STATUS_TOVF7  0x00800000
-# if (MAX_BLACKFIN_GPTIMERS > 8)
-#  define TIMER_STATUS_TOVF8   0x0010
-#  define TIMER_STATUS_TOVF9   0x0020
-#  define TIMER_STATUS_TOVF10  0x0040
-#  define TIMER_STATUS_TOVF11  0x0080
-# endif
-# define TIMER_STATUS_OFLOW  0x00F000F0
-#else
-# define TIMER_STATUS_OFLOW  0x0070     /* any timer overflow */
-#endif
+#define TIMER_STATUS_TIMIL0  0x0001
+#define TIMER_STATUS_TIMIL1  0x0002
+#define TIMER_STATUS_TIMIL2  0x0004
+#define TIMER_STATUS_TIMIL3  0x00000008
+#define TIMER_STATUS_TIMIL4  0x00010000
+#define TIMER_STATUS_TIMIL5  0x00020000
+#define TIMER_STATUS_TIMIL6  0x00040000
+#define TIMER_STATUS_TIMIL7  0x00080000
+#define TIMER_STATUS_TIMIL8  0x0001
+#define TIMER_STATUS_TIMIL9  0x0002
+#define TIMER_STATUS_TIMIL10 0x0004
+#define TIMER_STATUS_TIMIL11 0x0008
+
+#define TIMER_STATUS_TOVF0   0x0010     /* timer 0 overflow error */
+#define TIMER_STATUS_TOVF1   0x0020
+#define TIMER_STATUS_TOVF2   0x0040
+#define TIMER_STATUS_TOVF3   0x00000080
+#define TIMER_STATUS_TOVF4   0x00100000
+#define TIMER_STATUS_TOVF5   0x00200000
+#define TIMER_STATUS_TOVF6   0x00400000
+#define TIMER_STATUS_TOVF7   0x00800000
+#define TIMER_STATUS_TOVF8   0x0010
+#define TIMER_STATUS_TOVF9   0x0020
+#define TIMER_STATUS_TOVF10  0x0040
+#define TIMER_STATUS_TOVF11  0x0080
 
 /*
  * Timer Slave Enable Status : write 1 to clear
@@ -170,22 +156,16 @@
 #define TIMER_STATUS_TRUN0  0x1000
 #define TIMER_STATUS_TRUN1  0x2000
 #define TIMER_STATUS_TRUN2  0x4000
-#if (MAX_BLACKFIN_GPTIMERS > 3)
-# define TIMER_STATUS_TRUN3  0x00008000
-# define TIMER_STATUS_TRUN4  0x10000000
-# define TIMER_STATUS_TRUN5  0x20000000
-# define TIMER_STATUS_TRUN6  0x40000000
-# define TIMER_STATUS_TRUN7  0x80000000
-# define TIMER_STATUS_TRUN   0xF000F000
-# if (MAX_BLACKFIN_GPTIMERS > 8)
-#  define TIMER_STATUS_TRUN8  0x1000
-#  define TIMER_STATUS_TRUN9  0x2000
-#  define TIMER_STATUS_TRUN10 0x4000
-#  define TIMER_STATUS_TRUN11 0x8000
-# endif
-#else
-# define TIMER_STATUS_TRUN   0x7000
-#endif
+#define TIMER_STATUS_TRUN3  0x00008000
+#define TIMER_STATUS_TRUN4  0x10000000
+#define TIMER_STATUS_TRUN5  0x20000000
+#define TIMER_STATUS_TRUN6  0x40000000
+#define TIMER_STATUS_TRUN7  0x80000000
+#define TIMER_STATUS_TRUN   0xF000F000
+#define TIMER_STATUS_TRUN8  0x1000
+#define TIMER_STATUS_TRUN9  0x2000
+#define TIMER_STATUS_TRUN10 0x4000
+#define TIMER_STATUS_TRUN11 0x8000
 
 /* The actual gptimer API */
 
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
index a89120445be6..735fa02fafb2 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -2,12 +2,12 @@
  * File: include/asm-blackfin/mach-bf527/anomaly.h
  * Bugs: Enter bugs at http://blackfin.uclinux.org/
  *
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
  * Licensed under the GPL-2 or later.
  */
 
 /* This file shoule be up to date with:
- *  - Revision A, May 30, 2007; ADSP-BF527 Blackfin Processor Anomaly List
+ *  - Revision C, 01/25/2008; ADSP-BF527 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
@@ -15,35 +15,85 @@
 
 /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
 #define ANOMALY_05000074 (1)
-/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
-#define ANOMALY_05000119 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
 /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
 #define ANOMALY_05000265 (1)
-/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
-#define ANOMALY_05000301 (1)
-/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
-#define ANOMALY_05000312 (1)
 /* Incorrect Access of OTP_STATUS During otp_write() Function */
 #define ANOMALY_05000328 (1)
 /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
 #define ANOMALY_05000337 (1)
-/* TWI Does Not Operate Correctly Under Certain Signal Termination Conditions */
+/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
+#define ANOMALY_05000341 (1)
+/* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */
 #define ANOMALY_05000342 (1)
-/* Boot ROM Kernel Incorrectly Alters Reset Value of USB Register */
+/* USB Calibration Value Is Not Initialized */
+#define ANOMALY_05000346 (1)
+/* Preboot Routine Incorrectly Alters Reset Value of USB Register */
 #define ANOMALY_05000347 (1)
+/* Security Features Are Not Functional */
+#define ANOMALY_05000348 (__SILICON_REVISION__ < 1)
+/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
+#define ANOMALY_05000355 (1)
+/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
+#define ANOMALY_05000357 (1)
+/* Incorrect Revision Number in DSPID Register */
+#define ANOMALY_05000364 (__SILICON_REVISION__ > 0)
+/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
+#define ANOMALY_05000366 (1)
+/* New Feature: Higher Default CCLK Rate */
+#define ANOMALY_05000368 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
+/* Authentication Fails To Initiate */
+#define ANOMALY_05000376 (__SILICON_REVISION__ > 0)
+/* Data Read From L3 Memory by USB DMA May be Corrupted */
+#define ANOMALY_05000380 (1)
+/* USB Full-speed Mode not Fully Tested */
+#define ANOMALY_05000381 (1)
+/* New Feature: Boot from OTP Memory */
+#define ANOMALY_05000385 (1)
+/* New Feature: bfrom_SysControl() Routine */
+#define ANOMALY_05000386 (1)
+/* New Feature: Programmable Preboot Settings */
+#define ANOMALY_05000387 (1)
+/* Reset Vector Must Not Be in SDRAM Memory Space */
+#define ANOMALY_05000389 (1)
+/* New Feature: pTempCurrent Added to ADI_BOOT_DATA Structure */
+#define ANOMALY_05000392 (1)
+/* New Feature: dTempByteCount Value Increased in ADI_BOOT_DATA Structure */
+#define ANOMALY_05000393 (1)
+/* New Feature: Log Buffer Functionality */
+#define ANOMALY_05000394 (1)
+/* New Feature: Hook Routine Functionality */
+#define ANOMALY_05000395 (1)
+/* New Feature: Header Indirect Bit */
+#define ANOMALY_05000396 (1)
+/* New Feature: BK_ONES, BK_ZEROS, and BK_DATECODE Constants */
+#define ANOMALY_05000397 (1)
+/* New Feature: SWRESET, DFRESET and WDRESET Bits Added to SYSCR Register */
+#define ANOMALY_05000398 (1)
+/* New Feature: BCODE_NOBOOT Added to BCODE Field of SYSCR Register */
+#define ANOMALY_05000399 (1)
+/* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */
+#define ANOMALY_05000401 (1)
 
 /* Anomalies that don't exist on this proc */
-#define ANOMALY_05000323 (0)
-#define ANOMALY_05000244 (0)
-#define ANOMALY_05000198 (0)
 #define ANOMALY_05000125 (0)
 #define ANOMALY_05000158 (0)
-#define ANOMALY_05000273 (0)
+#define ANOMALY_05000183 (0)
+#define ANOMALY_05000198 (0)
+#define ANOMALY_05000230 (0)
+#define ANOMALY_05000244 (0)
+#define ANOMALY_05000261 (0)
 #define ANOMALY_05000263 (0)
+#define ANOMALY_05000266 (0)
+#define ANOMALY_05000273 (0)
 #define ANOMALY_05000311 (0)
-#define ANOMALY_05000230 (0)
+#define ANOMALY_05000312 (0)
+#define ANOMALY_05000323 (0)
+#define ANOMALY_05000363 (0)
+
 #endif
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index c0694ecd2ecd..f0ab2736a680 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
+/*
+ * file:        include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ *      blackfin serial driver head file
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs:         enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose.  see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
 #include <linux/serial.h>
 #include <asm/dma.h>
 #include <asm/portmux.h>
 
-#define NR_PORTS                2
-
-#define OFFSET_THR              0x00    /* Transmit Holding register            */
-#define OFFSET_RBR              0x00    /* Receive Buffer register              */
-#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
-#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
-#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
-#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
-#define OFFSET_LCR              0x0C    /* Line Control Register                */
-#define OFFSET_MCR              0x10    /* Modem Control Register               */
-#define OFFSET_LSR              0x14    /* Line Status Register                 */
-#define OFFSET_MSR              0x18    /* Modem Status Register                */
-#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
-#define OFFSET_GCTL             0x24    /* Global Control Register              */
-
 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -92,7 +108,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 }
 
-struct bfin_serial_port bfin_serial_ports[NR_PORTS];
+struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 struct bfin_serial_res {
         unsigned long uart_base_addr;
         int uart_irq;
diff --git a/include/asm-blackfin/mach-bf527/bfin_sir.h b/include/asm-blackfin/mach-bf527/bfin_sir.h
new file mode 100644
index 000000000000..0612d0c9501c
--- /dev/null
+++ b/include/asm-blackfin/mach-bf527/bfin_sir.h
@@ -0,0 +1,133 @@
+/*
+ * Blackfin Infra-red Driver
+ *
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ */
+
+#include <linux/serial.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#define SIR_UART_GET_CHAR(port)   bfin_read16((port)->membase + OFFSET_RBR)
+#define SIR_UART_GET_DLL(port)    bfin_read16((port)->membase + OFFSET_DLL)
+#define SIR_UART_GET_IER(port)    bfin_read16((port)->membase + OFFSET_IER)
+#define SIR_UART_GET_DLH(port)    bfin_read16((port)->membase + OFFSET_DLH)
+#define SIR_UART_GET_IIR(port)    bfin_read16((port)->membase + OFFSET_IIR)
+#define SIR_UART_GET_LCR(port)    bfin_read16((port)->membase + OFFSET_LCR)
+#define SIR_UART_GET_GCTL(port)   bfin_read16((port)->membase + OFFSET_GCTL)
+
+#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
+#define SIR_UART_PUT_DLL(port, v)  bfin_write16(((port)->membase + OFFSET_DLL), v)
+#define SIR_UART_PUT_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER), v)
+#define SIR_UART_PUT_DLH(port, v)  bfin_write16(((port)->membase + OFFSET_DLH), v)
+#define SIR_UART_PUT_LCR(port, v)  bfin_write16(((port)->membase + OFFSET_LCR), v)
+#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
+
+#ifdef CONFIG_SIR_BFIN_DMA
+struct dma_rx_buf {
+        char *buf;
+        int head;
+        int tail;
+        };
+#endif /* CONFIG_SIR_BFIN_DMA */
+
+struct bfin_sir_port {
+        unsigned char __iomem   *membase;
+        unsigned int            irq;
+        unsigned int            lsr;
+        unsigned long           clk;
+        struct net_device       *dev;
+#ifdef CONFIG_SIR_BFIN_DMA
+        int                     tx_done;
+        struct dma_rx_buf       rx_dma_buf;
+        struct timer_list       rx_dma_timer;
+        int                     rx_dma_nrows;
+#endif /* CONFIG_SIR_BFIN_DMA */
+        unsigned int            tx_dma_channel;
+        unsigned int            rx_dma_channel;
+};
+
+struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
+
+struct bfin_sir_port_res {
+        unsigned long   base_addr;
+        int             irq;
+        unsigned int    rx_dma_channel;
+        unsigned int    tx_dma_channel;
+};
+
+struct bfin_sir_port_res bfin_sir_port_resource[] = {
+#ifdef CONFIG_BFIN_SIR0
+        {
+        0xFFC00400,
+        IRQ_UART0_RX,
+        CH_UART0_RX,
+        CH_UART0_TX,
+        },
+#endif
+#ifdef CONFIG_BFIN_SIR1
+        {
+        0xFFC02000,
+        IRQ_UART1_RX,
+        CH_UART1_RX,
+        CH_UART1_TX,
+        },
+#endif
+};
+
+int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
+
+struct bfin_sir_self {
+        struct bfin_sir_port    *sir_port;
+        spinlock_t              lock;
+        unsigned int            open;
+        int                     speed;
+        int                     newspeed;
+
+        struct sk_buff          *txskb;
+        struct sk_buff          *rxskb;
+        struct net_device_stats stats;
+        struct device           *dev;
+        struct irlap_cb         *irlap;
+        struct qos_info         qos;
+
+        iobuff_t                tx_buff;
+        iobuff_t                rx_buff;
+
+        struct work_struct      work;
+        int                     mtt;
+};
+
+static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
+{
+        unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
+        port->lsr |= (lsr & (BI|FE|PE|OE));
+        return lsr | port->lsr;
+}
+
+static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
+{
+        port->lsr = 0;
+        bfin_read16(port->membase + OFFSET_LSR);
+}
+
+#define DRIVER_NAME "bfin_sir"
+
+static void bfin_sir_hw_init(void)
+{
+#ifdef CONFIG_BFIN_SIR0
+        peripheral_request(P_UART0_TX, DRIVER_NAME);
+        peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_BFIN_SIR1
+        peripheral_request(P_UART1_TX, DRIVER_NAME);
+        peripheral_request(P_UART1_RX, DRIVER_NAME);
+#endif
+        SSYNC();
+}
diff --git a/include/asm-blackfin/mach-bf527/blackfin.h b/include/asm-blackfin/mach-bf527/blackfin.h
index 1bd07e30781c..2891727b6176 100644
--- a/include/asm-blackfin/mach-bf527/blackfin.h
+++ b/include/asm-blackfin/mach-bf527/blackfin.h
@@ -64,6 +64,21 @@
 #define STATUS_P1       0x02
 #define STATUS_P0       0x01
 
+#define BFIN_UART_NR_PORTS      2
+
+#define OFFSET_THR              0x00    /* Transmit Holding register            */
+#define OFFSET_RBR              0x00    /* Receive Buffer register              */
+#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
+#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
+#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
+#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
+#define OFFSET_LCR              0x0C    /* Line Control Register                */
+#define OFFSET_MCR              0x10    /* Modem Control Register               */
+#define OFFSET_LSR              0x14    /* Line Status Register                 */
+#define OFFSET_MSR              0x18    /* Modem Status Register                */
+#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
+#define OFFSET_GCTL             0x24    /* Global Control Register              */
+
 /* DPMC*/
 #define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
 #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
diff --git a/include/asm-blackfin/mach-bf527/cdefBF52x_base.h b/include/asm-blackfin/mach-bf527/cdefBF52x_base.h
index 3f4de5d9d4cb..9dbdbec8ea1b 100644
--- a/include/asm-blackfin/mach-bf527/cdefBF52x_base.h
+++ b/include/asm-blackfin/mach-bf527/cdefBF52x_base.h
@@ -29,18 +29,71 @@
  */
 
 #ifndef _CDEF_BF52X_H
+#define _CDEF_BF52X_H
+
+#include <asm/system.h>
+#include <asm/blackfin.h>
 
 #include "defBF52x_base.h"
 
+/* Include core specific register pointer definitions                                                           */
+#include <asm/mach-common/cdef_LPBlackfin.h>
+
 /* ==== begin from cdefBF534.h ==== */
 
 /* Clock and System Control     (0xFFC00000 - 0xFFC000FF)                                                               */
 #define bfin_read_PLL_CTL()                     bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val)                 bfin_write16(PLL_CTL, val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+        unsigned long flags, iwr0, iwr1;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr0 = bfin_read32(SIC_IWR0);
+        iwr1 = bfin_read32(SIC_IWR1);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SIC_IWR0, IWR_ENABLE(0));
+        bfin_write32(SIC_IWR1, 0);
+
+        bfin_write16(PLL_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SIC_IWR0, iwr0);
+        bfin_write32(SIC_IWR1, iwr1);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_DIV()                     bfin_read16(PLL_DIV)
 #define bfin_write_PLL_DIV(val)                 bfin_write16(PLL_DIV, val)
 #define bfin_read_VR_CTL()                      bfin_read16(VR_CTL)
-#define bfin_write_VR_CTL(val)                  bfin_write16(VR_CTL, val)
+/* Writing to VR_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_VR_CTL(unsigned int val)
+{
+        unsigned long flags, iwr0, iwr1;
+
+        if (val == bfin_read_VR_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr0 = bfin_read32(SIC_IWR0);
+        iwr1 = bfin_read32(SIC_IWR1);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SIC_IWR0, IWR_ENABLE(0));
+        bfin_write32(SIC_IWR1, 0);
+
+        bfin_write16(VR_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SIC_IWR0, iwr0);
+        bfin_write32(SIC_IWR1, iwr1);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_STAT()                    bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)                bfin_write16(PLL_STAT, val)
 #define bfin_read_PLL_LOCKCNT()                 bfin_read16(PLL_LOCKCNT)
@@ -873,39 +926,6 @@
 
 
 /* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF)                                                               */
-#define bfin_read_TWI_CLKDIV()                  bfin_read16(TWI_CLKDIV)
-#define bfin_write_TWI_CLKDIV(val)              bfin_write16(TWI_CLKDIV, val)
-#define bfin_read_TWI_CONTROL()                 bfin_read16(TWI_CONTROL)
-#define bfin_write_TWI_CONTROL(val)             bfin_write16(TWI_CONTROL, val)
-#define bfin_read_TWI_SLAVE_CTL()               bfin_read16(TWI_SLAVE_CTL)
-#define bfin_write_TWI_SLAVE_CTL(val)           bfin_write16(TWI_SLAVE_CTL, val)
-#define bfin_read_TWI_SLAVE_STAT()              bfin_read16(TWI_SLAVE_STAT)
-#define bfin_write_TWI_SLAVE_STAT(val)          bfin_write16(TWI_SLAVE_STAT, val)
-#define bfin_read_TWI_SLAVE_ADDR()              bfin_read16(TWI_SLAVE_ADDR)
-#define bfin_write_TWI_SLAVE_ADDR(val)          bfin_write16(TWI_SLAVE_ADDR, val)
-#define bfin_read_TWI_MASTER_CTL()              bfin_read16(TWI_MASTER_CTL)
-#define bfin_write_TWI_MASTER_CTL(val)          bfin_write16(TWI_MASTER_CTL, val)
-#define bfin_read_TWI_MASTER_STAT()             bfin_read16(TWI_MASTER_STAT)
-#define bfin_write_TWI_MASTER_STAT(val)         bfin_write16(TWI_MASTER_STAT, val)
-#define bfin_read_TWI_MASTER_ADDR()             bfin_read16(TWI_MASTER_ADDR)
-#define bfin_write_TWI_MASTER_ADDR(val)         bfin_write16(TWI_MASTER_ADDR, val)
-#define bfin_read_TWI_INT_STAT()                bfin_read16(TWI_INT_STAT)
-#define bfin_write_TWI_INT_STAT(val)            bfin_write16(TWI_INT_STAT, val)
-#define bfin_read_TWI_INT_MASK()                bfin_read16(TWI_INT_MASK)
-#define bfin_write_TWI_INT_MASK(val)            bfin_write16(TWI_INT_MASK, val)
-#define bfin_read_TWI_FIFO_CTL()                bfin_read16(TWI_FIFO_CTL)
-#define bfin_write_TWI_FIFO_CTL(val)            bfin_write16(TWI_FIFO_CTL, val)
-#define bfin_read_TWI_FIFO_STAT()               bfin_read16(TWI_FIFO_STAT)
-#define bfin_write_TWI_FIFO_STAT(val)           bfin_write16(TWI_FIFO_STAT, val)
-#define bfin_read_TWI_XMT_DATA8()               bfin_read16(TWI_XMT_DATA8)
-#define bfin_write_TWI_XMT_DATA8(val)           bfin_write16(TWI_XMT_DATA8, val)
-#define bfin_read_TWI_XMT_DATA16()              bfin_read16(TWI_XMT_DATA16)
-#define bfin_write_TWI_XMT_DATA16(val)          bfin_write16(TWI_XMT_DATA16, val)
-#define bfin_read_TWI_RCV_DATA8()               bfin_read16(TWI_RCV_DATA8)
-#define bfin_write_TWI_RCV_DATA8(val)           bfin_write16(TWI_RCV_DATA8, val)
-#define bfin_read_TWI_RCV_DATA16()              bfin_read16(TWI_RCV_DATA16)
-#define bfin_write_TWI_RCV_DATA16(val)          bfin_write16(TWI_RCV_DATA16, val)
-
 
 /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF)                                                         */
 #define bfin_read_PORTGIO()                     bfin_read16(PORTGIO)
diff --git a/include/asm-blackfin/mach-bf527/dma.h b/include/asm-blackfin/mach-bf527/dma.h
index 2dfee12864f6..49dd693223e8 100644
--- a/include/asm-blackfin/mach-bf527/dma.h
+++ b/include/asm-blackfin/mach-bf527/dma.h
@@ -59,7 +59,4 @@
 #define CH_NFC                  CH_EMAC_TX /* PPI receive/transmit or NFC */
 #endif
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index 98209d40abba..5a6dcc5fa36c 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -7,7 +7,7 @@
  */
 
 /* This file shoule be up to date with:
- *  - Revision B, 12/10/2007; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
+ *  - Revision C, 02/08/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
@@ -251,10 +251,18 @@
 #define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
 /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
 #define ANOMALY_05000357 (1)
+/* UART Break Signal Issues */
+#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
 /* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
 #define ANOMALY_05000366 (1)
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
 #define ANOMALY_05000371 (1)
+/* PPI Does Not Start Properly In Specific Mode */
+#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
+/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
+#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
+/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
+#define ANOMALY_05000403 (1)
 
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000266 (0)
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index b6f513bee56e..fbe88dee3e2d 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
+/*
+ * file:        include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ *      blackfin serial driver head file
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs:         enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose.  see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
 #include <linux/serial.h>
 #include <asm/dma.h>
 #include <asm/portmux.h>
 
-#define NR_PORTS                1
-
-#define OFFSET_THR              0x00    /* Transmit Holding register            */
-#define OFFSET_RBR              0x00    /* Receive Buffer register              */
-#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
-#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
-#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
-#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
-#define OFFSET_LCR              0x0C    /* Line Control Register                */
-#define OFFSET_MCR              0x10    /* Modem Control Register               */
-#define OFFSET_LSR              0x14    /* Line Status Register                 */
-#define OFFSET_MSR              0x18    /* Modem Status Register                */
-#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
-#define OFFSET_GCTL             0x24    /* Global Control Register              */
-
 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -84,7 +100,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 }
 
-struct bfin_serial_port bfin_serial_ports[NR_PORTS];
+struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 struct bfin_serial_res {
         unsigned long   uart_base_addr;
         int             uart_irq;
@@ -115,7 +131,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
 
 #define DRIVER_NAME "bfin-uart"
 
-int nr_ports = NR_PORTS;
+int nr_ports = BFIN_UART_NR_PORTS;
 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 {
 
diff --git a/include/asm-blackfin/mach-bf533/bfin_sir.h b/include/asm-blackfin/mach-bf533/bfin_sir.h
new file mode 100644
index 000000000000..cefcf8bb505b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf533/bfin_sir.h
@@ -0,0 +1,120 @@
+/*
+ * Blackfin Infra-red Driver
+ *
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ */
+
+#include <linux/serial.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#define SIR_UART_GET_CHAR(port)   bfin_read16((port)->membase + OFFSET_RBR)
+#define SIR_UART_GET_DLL(port)    bfin_read16((port)->membase + OFFSET_DLL)
+#define SIR_UART_GET_IER(port)    bfin_read16((port)->membase + OFFSET_IER)
+#define SIR_UART_GET_DLH(port)    bfin_read16((port)->membase + OFFSET_DLH)
+#define SIR_UART_GET_IIR(port)    bfin_read16((port)->membase + OFFSET_IIR)
+#define SIR_UART_GET_LCR(port)    bfin_read16((port)->membase + OFFSET_LCR)
+#define SIR_UART_GET_GCTL(port)   bfin_read16((port)->membase + OFFSET_GCTL)
+
+#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
+#define SIR_UART_PUT_DLL(port, v)  bfin_write16(((port)->membase + OFFSET_DLL), v)
+#define SIR_UART_PUT_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER), v)
+#define SIR_UART_PUT_DLH(port, v)  bfin_write16(((port)->membase + OFFSET_DLH), v)
+#define SIR_UART_PUT_LCR(port, v)  bfin_write16(((port)->membase + OFFSET_LCR), v)
+#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
+
+#ifdef CONFIG_SIR_BFIN_DMA
+struct dma_rx_buf {
+        char *buf;
+        int head;
+        int tail;
+        };
+#endif /* CONFIG_SIR_BFIN_DMA */
+
+struct bfin_sir_port {
+        unsigned char __iomem   *membase;
+        unsigned int            irq;
+        unsigned int            lsr;
+        unsigned long           clk;
+        struct net_device       *dev;
+#ifdef CONFIG_SIR_BFIN_DMA
+        int                     tx_done;
+        struct dma_rx_buf       rx_dma_buf;
+        struct timer_list       rx_dma_timer;
+        int                     rx_dma_nrows;
+#endif /* CONFIG_SIR_BFIN_DMA */
+        unsigned int            tx_dma_channel;
+        unsigned int            rx_dma_channel;
+};
+
+struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
+
+struct bfin_sir_port_res {
+        unsigned long   base_addr;
+        int             irq;
+        unsigned int    rx_dma_channel;
+        unsigned int    tx_dma_channel;
+};
+
+struct bfin_sir_port_res bfin_sir_port_resource[] = {
+#ifdef CONFIG_BFIN_SIR0
+        {
+        0xFFC00400,
+        IRQ_UART_RX,
+        CH_UART_RX,
+        CH_UART_TX,
+        },
+#endif
+};
+
+int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
+
+struct bfin_sir_self {
+        struct bfin_sir_port    *sir_port;
+        spinlock_t              lock;
+        unsigned int            open;
+        int                     speed;
+        int                     newspeed;
+
+        struct sk_buff          *txskb;
+        struct sk_buff          *rxskb;
+        struct net_device_stats stats;
+        struct device           *dev;
+        struct irlap_cb         *irlap;
+        struct qos_info         qos;
+
+        iobuff_t                tx_buff;
+        iobuff_t                rx_buff;
+
+        struct work_struct      work;
+        int                     mtt;
+};
+
+static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
+{
+        unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
+        port->lsr |= (lsr & (BI|FE|PE|OE));
+        return lsr | port->lsr;
+}
+
+static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
+{
+        port->lsr = 0;
+        bfin_read16(port->membase + OFFSET_LSR);
+}
+
+#define DRIVER_NAME "bfin_sir"
+
+static void bfin_sir_hw_init(void)
+{
+#ifdef CONFIG_BFIN_SIR0
+        peripheral_request(P_UART0_TX, DRIVER_NAME);
+        peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+        SSYNC();
+}
diff --git a/include/asm-blackfin/mach-bf533/blackfin.h b/include/asm-blackfin/mach-bf533/blackfin.h
index f3b240abf170..d80971b4e3aa 100644
--- a/include/asm-blackfin/mach-bf533/blackfin.h
+++ b/include/asm-blackfin/mach-bf533/blackfin.h
@@ -42,4 +42,19 @@
 #include "cdefBF532.h"
 #endif
 
+#define BFIN_UART_NR_PORTS      1
+
+#define OFFSET_THR              0x00    /* Transmit Holding register            */
+#define OFFSET_RBR              0x00    /* Receive Buffer register              */
+#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
+#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
+#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
+#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
+#define OFFSET_LCR              0x0C    /* Line Control Register                */
+#define OFFSET_MCR              0x10    /* Modem Control Register               */
+#define OFFSET_LSR              0x14    /* Line Status Register                 */
+#define OFFSET_MSR              0x18    /* Modem Status Register                */
+#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
+#define OFFSET_GCTL             0x24    /* Global Control Register              */
+
 #endif                          /* _MACH_BLACKFIN_H_ */
diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h b/include/asm-blackfin/mach-bf533/cdefBF532.h
index c803e14b529c..154655452d4c 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -43,7 +43,27 @@
 
 /* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
 #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val)              bfin_write16(PLL_CTL,val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+        unsigned long flags, iwr;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr = bfin_read32(SIC_IWR);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+        bfin_write16(PLL_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SIC_IWR, iwr);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
 #define bfin_read_PLL_LOCKCNT()              bfin_read16(PLL_LOCKCNT)
@@ -57,6 +77,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
         unsigned long flags, iwr;
 
+        if (val == bfin_read_VR_CTL())
+                return;
+
+        local_irq_save(flags);
         /* Enable the PLL Wakeup bit in SIC IWR */
         iwr = bfin_read32(SIC_IWR);
         /* Only allow PPL Wakeup) */
@@ -64,11 +88,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 
         bfin_write16(VR_CTL, val);
         SSYNC();
-
-        local_irq_save(flags);
         asm("IDLE;");
-        local_irq_restore(flags);
+
         bfin_write32(SIC_IWR, iwr);
+        local_irq_restore(flags);
 }
 
 /* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 37134aaf9954..17e1548cec08 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -88,20 +88,25 @@
 #define RTC_PREN                        0xFFC00314      /* RTC Prescaler Enable Register (alternate macro) */
 
 /* UART Controller (0xFFC00400 - 0xFFC004FF) */
-#define UART_THR                         0xFFC00400     /* Transmit Holding register */
-#define UART_RBR                         0xFFC00400     /* Receive Buffer register */
-#define UART_DLL                         0xFFC00400     /* Divisor Latch (Low-Byte) */
-#define UART_IER                         0xFFC00404     /* Interrupt Enable Register */
-#define UART_DLH                         0xFFC00404     /* Divisor Latch (High-Byte) */
-#define UART_IIR                         0xFFC00408     /* Interrupt Identification Register */
-#define UART_LCR                         0xFFC0040C     /* Line Control Register */
-#define UART_MCR                         0xFFC00410     /* Modem Control Register */
-#define UART_LSR                         0xFFC00414     /* Line Status Register */
+
+/*
+ * Because include/linux/serial_reg.h have defined UART_*,
+ * So we define blackfin uart regs to BFIN_UART_*.
+ */
+#define BFIN_UART_THR                   0xFFC00400      /* Transmit Holding register */
+#define BFIN_UART_RBR                   0xFFC00400      /* Receive Buffer register */
+#define BFIN_UART_DLL                   0xFFC00400      /* Divisor Latch (Low-Byte) */
+#define BFIN_UART_IER                   0xFFC00404      /* Interrupt Enable Register */
+#define BFIN_UART_DLH                   0xFFC00404      /* Divisor Latch (High-Byte) */
+#define BFIN_UART_IIR                   0xFFC00408      /* Interrupt Identification Register */
+#define BFIN_UART_LCR                   0xFFC0040C      /* Line Control Register */
+#define BFIN_UART_MCR                   0xFFC00410      /* Modem Control Register */
+#define BFIN_UART_LSR                   0xFFC00414      /* Line Status Register */
 #if 0
-#define UART_MSR                         0xFFC00418   /* Modem Status Register (UNUSED in ADSP-BF532) */
+#define BFIN_UART_MSR                   0xFFC00418      /* Modem Status Register (UNUSED in ADSP-BF532) */
 #endif
-#define UART_SCR                         0xFFC0041C     /* SCR Scratch Register */
-#define UART_GCTL                        0xFFC00424     /* Global Control Register */
+#define BFIN_UART_SCR                   0xFFC0041C      /* SCR Scratch Register */
+#define BFIN_UART_GCTL                  0xFFC00424      /* Global Control Register */
 
 /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
 #define SPI0_REGBASE                    0xFFC00500
diff --git a/include/asm-blackfin/mach-bf533/dma.h b/include/asm-blackfin/mach-bf533/dma.h
index 16c672c01d80..bd9d5e94307d 100644
--- a/include/asm-blackfin/mach-bf533/dma.h
+++ b/include/asm-blackfin/mach-bf533/dma.h
@@ -51,7 +51,4 @@
 #define CH_MEM_STREAM1_DEST     10       /* TX */
 #define CH_MEM_STREAM1_SRC      11       /* RX */
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
diff --git a/include/asm-blackfin/mach-bf533/mem_init.h b/include/asm-blackfin/mach-bf533/mem_init.h
index 1620dae5254d..f8f31901fca9 100644
--- a/include/asm-blackfin/mach-bf533/mem_init.h
+++ b/include/asm-blackfin/mach-bf533/mem_init.h
@@ -29,7 +29,8 @@
  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || CONFIG_MEM_GENERIC_BOARD)
+#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || \
+     CONFIG_MEM_MT48LC32M16A2TG_75 || CONFIG_MEM_GENERIC_BOARD)
 #if (CONFIG_SCLK_HZ > 119402985)
 #define SDRAM_tRP       TRP_2
 #define SDRAM_tRP_num   2
@@ -118,6 +119,13 @@
 #define SDRAM_CL    CL_3
 #endif
 
+#if (CONFIG_MEM_MT48LC32M16A2TG_75)
+  /*SDRAM INFORMATION: */
+#define SDRAM_Tref  64          /* Refresh period in milliseconds   */
+#define SDRAM_NRA   8192        /* Number of row addresses in SDRAM */
+#define SDRAM_CL    CL_3
+#endif
+
 #if (CONFIG_MEM_GENERIC_BOARD)
   /*SDRAM INFORMATION: Modify this for your board */
 #define SDRAM_Tref  64          /* Refresh period in milliseconds   */
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index 746a794b3119..a6b08facb242 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -7,7 +7,7 @@
  */
 
 /* This file shoule be up to date with:
- *  - Revision A, 09/04/2007; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
+ *  - Revision C, 02/08/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
@@ -132,10 +132,24 @@
 #define ANOMALY_05000322 (1)
 /* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
 #define ANOMALY_05000341 (__SILICON_REVISION__ >= 3)
+/* New Feature: UART Remains Enabled after UART Boot (Not Available on Older Silicon) */
+#define ANOMALY_05000350 (__SILICON_REVISION__ < 3)
+/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
+#define ANOMALY_05000355 (1)
 /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
 #define ANOMALY_05000357 (1)
 /* DMAs that Go Urgent during Tight Core Writes to External Memory Are Blocked */
 #define ANOMALY_05000359 (1)
+/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
+#define ANOMALY_05000366 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
+/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
+#define ANOMALY_05000402 (__SILICON_REVISION__ >= 3)
+/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
+#define ANOMALY_05000403 (1)
+
+
 
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000125 (0)
@@ -146,5 +160,6 @@
 #define ANOMALY_05000266 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000323 (0)
+#define ANOMALY_05000363 (0)
 
 #endif
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index 8fc672d31057..fd100a415b98 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
+/*
+ * file:         include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ *      blackfin serial driver header files
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs:         enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose.  see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
 #include <linux/serial.h>
 #include <asm/dma.h>
 #include <asm/portmux.h>
 
-#define NR_PORTS                2
-
-#define OFFSET_THR              0x00    /* Transmit Holding register            */
-#define OFFSET_RBR              0x00    /* Receive Buffer register              */
-#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
-#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
-#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
-#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
-#define OFFSET_LCR              0x0C    /* Line Control Register                */
-#define OFFSET_MCR              0x10    /* Modem Control Register               */
-#define OFFSET_LSR              0x14    /* Line Status Register                 */
-#define OFFSET_MSR              0x18    /* Modem Status Register                */
-#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
-#define OFFSET_GCTL             0x24    /* Global Control Register              */
-
 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -92,7 +108,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 }
 
-struct bfin_serial_port bfin_serial_ports[NR_PORTS];
+struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 struct bfin_serial_res {
         unsigned long   uart_base_addr;
         int             uart_irq;
diff --git a/include/asm-blackfin/mach-bf537/bfin_sir.h b/include/asm-blackfin/mach-bf537/bfin_sir.h
new file mode 100644
index 000000000000..0612d0c9501c
--- /dev/null
+++ b/include/asm-blackfin/mach-bf537/bfin_sir.h
@@ -0,0 +1,133 @@
+/*
+ * Blackfin Infra-red Driver
+ *
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ */
+
+#include <linux/serial.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#define SIR_UART_GET_CHAR(port)   bfin_read16((port)->membase + OFFSET_RBR)
+#define SIR_UART_GET_DLL(port)    bfin_read16((port)->membase + OFFSET_DLL)
+#define SIR_UART_GET_IER(port)    bfin_read16((port)->membase + OFFSET_IER)
+#define SIR_UART_GET_DLH(port)    bfin_read16((port)->membase + OFFSET_DLH)
+#define SIR_UART_GET_IIR(port)    bfin_read16((port)->membase + OFFSET_IIR)
+#define SIR_UART_GET_LCR(port)    bfin_read16((port)->membase + OFFSET_LCR)
+#define SIR_UART_GET_GCTL(port)   bfin_read16((port)->membase + OFFSET_GCTL)
+
+#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
+#define SIR_UART_PUT_DLL(port, v)  bfin_write16(((port)->membase + OFFSET_DLL), v)
+#define SIR_UART_PUT_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER), v)
+#define SIR_UART_PUT_DLH(port, v)  bfin_write16(((port)->membase + OFFSET_DLH), v)
+#define SIR_UART_PUT_LCR(port, v)  bfin_write16(((port)->membase + OFFSET_LCR), v)
+#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
+
+#ifdef CONFIG_SIR_BFIN_DMA
+struct dma_rx_buf {
+        char *buf;
+        int head;
+        int tail;
+        };
+#endif /* CONFIG_SIR_BFIN_DMA */
+
+struct bfin_sir_port {
+        unsigned char __iomem   *membase;
+        unsigned int            irq;
+        unsigned int            lsr;
+        unsigned long           clk;
+        struct net_device       *dev;
+#ifdef CONFIG_SIR_BFIN_DMA
+        int                     tx_done;
+        struct dma_rx_buf       rx_dma_buf;
+        struct timer_list       rx_dma_timer;
+        int                     rx_dma_nrows;
+#endif /* CONFIG_SIR_BFIN_DMA */
+        unsigned int            tx_dma_channel;
+        unsigned int            rx_dma_channel;
+};
+
+struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
+
+struct bfin_sir_port_res {
+        unsigned long   base_addr;
+        int             irq;
+        unsigned int    rx_dma_channel;
+        unsigned int    tx_dma_channel;
+};
+
+struct bfin_sir_port_res bfin_sir_port_resource[] = {
+#ifdef CONFIG_BFIN_SIR0
+        {
+        0xFFC00400,
+        IRQ_UART0_RX,
+        CH_UART0_RX,
+        CH_UART0_TX,
+        },
+#endif
+#ifdef CONFIG_BFIN_SIR1
+        {
+        0xFFC02000,
+        IRQ_UART1_RX,
+        CH_UART1_RX,
+        CH_UART1_TX,
+        },
+#endif
+};
+
+int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
+
+struct bfin_sir_self {
+        struct bfin_sir_port    *sir_port;
+        spinlock_t              lock;
+        unsigned int            open;
+        int                     speed;
+        int                     newspeed;
+
+        struct sk_buff          *txskb;
+        struct sk_buff          *rxskb;
+        struct net_device_stats stats;
+        struct device           *dev;
+        struct irlap_cb         *irlap;
+        struct qos_info         qos;
+
+        iobuff_t                tx_buff;
+        iobuff_t                rx_buff;
+
+        struct work_struct      work;
+        int                     mtt;
+};
+
+static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
+{
+        unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
+        port->lsr |= (lsr & (BI|FE|PE|OE));
+        return lsr | port->lsr;
+}
+
+static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
+{
+        port->lsr = 0;
+        bfin_read16(port->membase + OFFSET_LSR);
+}
+
+#define DRIVER_NAME "bfin_sir"
+
+static void bfin_sir_hw_init(void)
+{
+#ifdef CONFIG_BFIN_SIR0
+        peripheral_request(P_UART0_TX, DRIVER_NAME);
+        peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_BFIN_SIR1
+        peripheral_request(P_UART1_TX, DRIVER_NAME);
+        peripheral_request(P_UART1_RX, DRIVER_NAME);
+#endif
+        SSYNC();
+}
diff --git a/include/asm-blackfin/mach-bf537/blackfin.h b/include/asm-blackfin/mach-bf537/blackfin.h
index 53fcfa3408d0..cffc786b2a2b 100644
--- a/include/asm-blackfin/mach-bf537/blackfin.h
+++ b/include/asm-blackfin/mach-bf537/blackfin.h
@@ -82,8 +82,6 @@
 #define STATUS_P1       0x02
 #define STATUS_P0       0x01
 
-/* UART 0*/
-
 /* DMA Channnel */
 #define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
 #define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
@@ -106,37 +104,52 @@
 /* MMR Registers*/
 #define bfin_read_UART_THR() bfin_read_UART0_THR()
 #define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
-#define UART_THR UART0_THR
+#define BFIN_UART_THR UART0_THR
 #define bfin_read_UART_RBR() bfin_read_UART0_RBR()
 #define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
-#define UART_RBR UART0_RBR
+#define BFIN_UART_RBR UART0_RBR
 #define bfin_read_UART_DLL() bfin_read_UART0_DLL()
 #define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
-#define UART_DLL UART0_DLL
+#define BFIN_UART_DLL UART0_DLL
 #define bfin_read_UART_IER() bfin_read_UART0_IER()
 #define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
-#define UART_IER UART0_IER
+#define BFIN_UART_IER UART0_IER
 #define bfin_read_UART_DLH() bfin_read_UART0_DLH()
 #define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
-#define UART_DLH UART0_DLH
+#define BFIN_UART_DLH UART0_DLH
 #define bfin_read_UART_IIR() bfin_read_UART0_IIR()
 #define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
-#define UART_IIR UART0_IIR
+#define BFIN_UART_IIR UART0_IIR
 #define bfin_read_UART_LCR() bfin_read_UART0_LCR()
 #define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
-#define UART_LCR UART0_LCR
+#define BFIN_UART_LCR UART0_LCR
 #define bfin_read_UART_MCR() bfin_read_UART0_MCR()
 #define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
-#define UART_MCR UART0_MCR
+#define BFIN_UART_MCR UART0_MCR
 #define bfin_read_UART_LSR() bfin_read_UART0_LSR()
 #define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
-#define UART_LSR UART0_LSR
+#define BFIN_UART_LSR UART0_LSR
 #define bfin_read_UART_SCR() bfin_read_UART0_SCR()
 #define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
-#define UART_SCR  UART0_SCR
+#define BFIN_UART_SCR  UART0_SCR
 #define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
 #define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
-#define UART_GCTL UART0_GCTL
+#define BFIN_UART_GCTL UART0_GCTL
+
+#define BFIN_UART_NR_PORTS      2
+
+#define OFFSET_THR              0x00    /* Transmit Holding register            */
+#define OFFSET_RBR              0x00    /* Receive Buffer register              */
+#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
+#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
+#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
+#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
+#define OFFSET_LCR              0x0C    /* Line Control Register                */
+#define OFFSET_MCR              0x10    /* Modem Control Register               */
+#define OFFSET_LSR              0x14    /* Line Status Register                 */
+#define OFFSET_MSR              0x18    /* Modem Status Register                */
+#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
+#define OFFSET_GCTL             0x24    /* Global Control Register              */
 
 /* DPMC*/
 #define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 78227bc855df..82de526f8097 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -44,7 +44,27 @@
 
 /* Clock and System Control     (0xFFC00000 - 0xFFC000FF)                                                               */
 #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val)              bfin_write16(PLL_CTL,val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+        unsigned long flags, iwr;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr = bfin_read32(SIC_IWR);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+        bfin_write16(PLL_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SIC_IWR, iwr);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
 #define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
 #define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
@@ -53,6 +73,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
         unsigned long flags, iwr;
 
+        if (val == bfin_read_VR_CTL())
+                return;
+
+        local_irq_save(flags);
         /* Enable the PLL Wakeup bit in SIC IWR */
         iwr = bfin_read32(SIC_IWR);
         /* Only allow PPL Wakeup) */
@@ -60,11 +84,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 
         bfin_write16(VR_CTL, val);
         SSYNC();
-
-        local_irq_save(flags);
         asm("IDLE;");
-        local_irq_restore(flags);
+
         bfin_write32(SIC_IWR, iwr);
+        local_irq_restore(flags);
 }
 #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
@@ -858,39 +881,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_PPI_FRAME()                bfin_read16(PPI_FRAME)
 #define bfin_write_PPI_FRAME(val)            bfin_write16(PPI_FRAME,val)
 
-/* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF)                                                               */
-#define bfin_read_TWI_CLKDIV()               bfin_read16(TWI_CLKDIV)
-#define bfin_write_TWI_CLKDIV(val)           bfin_write16(TWI_CLKDIV,val)
-#define bfin_read_TWI_CONTROL()              bfin_read16(TWI_CONTROL)
-#define bfin_write_TWI_CONTROL(val)          bfin_write16(TWI_CONTROL,val)
-#define bfin_read_TWI_SLAVE_CTL()            bfin_read16(TWI_SLAVE_CTL)
-#define bfin_write_TWI_SLAVE_CTL(val)        bfin_write16(TWI_SLAVE_CTL,val)
-#define bfin_read_TWI_SLAVE_STAT()           bfin_read16(TWI_SLAVE_STAT)
-#define bfin_write_TWI_SLAVE_STAT(val)       bfin_write16(TWI_SLAVE_STAT,val)
-#define bfin_read_TWI_SLAVE_ADDR()           bfin_read16(TWI_SLAVE_ADDR)
-#define bfin_write_TWI_SLAVE_ADDR(val)       bfin_write16(TWI_SLAVE_ADDR,val)
-#define bfin_read_TWI_MASTER_CTL()           bfin_read16(TWI_MASTER_CTL)
-#define bfin_write_TWI_MASTER_CTL(val)       bfin_write16(TWI_MASTER_CTL,val)
-#define bfin_read_TWI_MASTER_STAT()          bfin_read16(TWI_MASTER_STAT)
-#define bfin_write_TWI_MASTER_STAT(val)      bfin_write16(TWI_MASTER_STAT,val)
-#define bfin_read_TWI_MASTER_ADDR()          bfin_read16(TWI_MASTER_ADDR)
-#define bfin_write_TWI_MASTER_ADDR(val)      bfin_write16(TWI_MASTER_ADDR,val)
-#define bfin_read_TWI_INT_STAT()             bfin_read16(TWI_INT_STAT)
-#define bfin_write_TWI_INT_STAT(val)         bfin_write16(TWI_INT_STAT,val)
-#define bfin_read_TWI_INT_MASK()             bfin_read16(TWI_INT_MASK)
-#define bfin_write_TWI_INT_MASK(val)         bfin_write16(TWI_INT_MASK,val)
-#define bfin_read_TWI_FIFO_CTL()             bfin_read16(TWI_FIFO_CTL)
-#define bfin_write_TWI_FIFO_CTL(val)         bfin_write16(TWI_FIFO_CTL,val)
-#define bfin_read_TWI_FIFO_STAT()            bfin_read16(TWI_FIFO_STAT)
-#define bfin_write_TWI_FIFO_STAT(val)        bfin_write16(TWI_FIFO_STAT,val)
-#define bfin_read_TWI_XMT_DATA8()            bfin_read16(TWI_XMT_DATA8)
-#define bfin_write_TWI_XMT_DATA8(val)        bfin_write16(TWI_XMT_DATA8,val)
-#define bfin_read_TWI_XMT_DATA16()           bfin_read16(TWI_XMT_DATA16)
-#define bfin_write_TWI_XMT_DATA16(val)       bfin_write16(TWI_XMT_DATA16,val)
-#define bfin_read_TWI_RCV_DATA8()            bfin_read16(TWI_RCV_DATA8)
-#define bfin_write_TWI_RCV_DATA8(val)        bfin_write16(TWI_RCV_DATA8,val)
-#define bfin_read_TWI_RCV_DATA16()           bfin_read16(TWI_RCV_DATA16)
-#define bfin_write_TWI_RCV_DATA16(val)       bfin_write16(TWI_RCV_DATA16,val)
+/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
 
 /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF)                                                         */
 #define bfin_read_PORTGIO()                  bfin_read16(PORTGIO)
diff --git a/include/asm-blackfin/mach-bf537/dma.h b/include/asm-blackfin/mach-bf537/dma.h
index 021991984e6e..7a964040870a 100644
--- a/include/asm-blackfin/mach-bf537/dma.h
+++ b/include/asm-blackfin/mach-bf537/dma.h
@@ -52,7 +52,4 @@
 #define CH_MEM_STREAM1_DEST     14       /* TX */
 #define CH_MEM_STREAM1_SRC      15       /* RX */
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h
index 850dc12eb7f2..49d3cebc5293 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/include/asm-blackfin/mach-bf548/anomaly.h
@@ -93,5 +93,6 @@
 #define ANOMALY_05000273 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000323 (0)
+#define ANOMALY_05000363 (0)
 
 #endif
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 7e6339f62a50..6547027cd3e6 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
+/*
+ * file:        include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ *      blackfin serial driver head file
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs:         enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose.  see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
 #include <linux/serial.h>
 #include <asm/dma.h>
 #include <asm/portmux.h>
 
-#define NR_PORTS                4
-
-#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
-#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
-#define OFFSET_GCTL             0x08    /* Global Control Register              */
-#define OFFSET_LCR              0x0C    /* Line Control Register                */
-#define OFFSET_MCR              0x10    /* Modem Control Register               */
-#define OFFSET_LSR              0x14    /* Line Status Register                 */
-#define OFFSET_MSR              0x18    /* Modem Status Register                */
-#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
-#define OFFSET_IER_SET          0x20    /* Set Interrupt Enable Register        */
-#define OFFSET_IER_CLEAR        0x24    /* Clear Interrupt Enable Register      */
-#define OFFSET_THR              0x28    /* Transmit Holding register            */
-#define OFFSET_RBR              0x2C    /* Receive Buffer register              */
-
 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
 #define UART_GET_DLH(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLH))
@@ -80,7 +96,7 @@ struct bfin_serial_port {
 #endif
 };
 
-struct bfin_serial_port bfin_serial_ports[NR_PORTS];
+struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 struct bfin_serial_res {
         unsigned long   uart_base_addr;
         int             uart_irq;
diff --git a/include/asm-blackfin/mach-bf548/bfin_sir.h b/include/asm-blackfin/mach-bf548/bfin_sir.h
new file mode 100644
index 000000000000..5e94271c7e3b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf548/bfin_sir.h
@@ -0,0 +1,149 @@
+/*
+ * Blackfin Infra-red Driver
+ *
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ */
+
+#include <linux/serial.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#define SIR_UART_GET_CHAR(port)   bfin_read16((port)->membase + OFFSET_RBR)
+#define SIR_UART_GET_DLL(port)    bfin_read16((port)->membase + OFFSET_DLL)
+#define SIR_UART_GET_IER(port)    bfin_read16((port)->membase + OFFSET_IER_SET)
+#define SIR_UART_GET_DLH(port)    bfin_read16((port)->membase + OFFSET_DLH)
+#define SIR_UART_GET_LCR(port)    bfin_read16((port)->membase + OFFSET_LCR)
+#define SIR_UART_GET_LSR(port)    bfin_read16((port)->membase + OFFSET_LSR)
+#define SIR_UART_GET_GCTL(port)   bfin_read16((port)->membase + OFFSET_GCTL)
+
+#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
+#define SIR_UART_PUT_DLL(port, v)  bfin_write16(((port)->membase + OFFSET_DLL), v)
+#define SIR_UART_SET_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER_SET), v)
+#define SIR_UART_CLEAR_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
+#define SIR_UART_PUT_DLH(port, v)  bfin_write16(((port)->membase + OFFSET_DLH), v)
+#define SIR_UART_PUT_LSR(port, v)  bfin_write16(((port)->membase + OFFSET_LSR), v)
+#define SIR_UART_PUT_LCR(port, v)  bfin_write16(((port)->membase + OFFSET_LCR), v)
+#define SIR_UART_CLEAR_LSR(port)  bfin_write16(((port)->membase + OFFSET_LSR), -1)
+#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
+
+#ifdef CONFIG_SIR_BFIN_DMA
+struct dma_rx_buf {
+        char *buf;
+        int head;
+        int tail;
+        };
+#endif /* CONFIG_SIR_BFIN_DMA */
+
+struct bfin_sir_port {
+        unsigned char __iomem   *membase;
+        unsigned int            irq;
+        unsigned int            lsr;
+        unsigned long           clk;
+        struct net_device       *dev;
+#ifdef CONFIG_SIR_BFIN_DMA
+        int                     tx_done;
+        struct dma_rx_buf       rx_dma_buf;
+        struct timer_list       rx_dma_timer;
+        int                     rx_dma_nrows;
+#endif /* CONFIG_SIR_BFIN_DMA */
+        unsigned int            tx_dma_channel;
+        unsigned int            rx_dma_channel;
+};
+
+struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
+
+struct bfin_sir_port_res {
+        unsigned long   base_addr;
+        int             irq;
+        unsigned int    rx_dma_channel;
+        unsigned int    tx_dma_channel;
+};
+
+struct bfin_sir_port_res bfin_sir_port_resource[] = {
+#ifdef CONFIG_BFIN_SIR0
+        {
+        0xFFC00400,
+        IRQ_UART0_RX,
+        CH_UART0_RX,
+        CH_UART0_TX,
+        },
+#endif
+#ifdef CONFIG_BFIN_SIR1
+        {
+        0xFFC02000,
+        IRQ_UART1_RX,
+        CH_UART1_RX,
+        CH_UART1_TX,
+        },
+#endif
+#ifdef CONFIG_BFIN_SIR2
+        {
+        0xFFC02100,
+        IRQ_UART2_RX,
+        CH_UART2_RX,
+        CH_UART2_TX,
+        },
+#endif
+#ifdef CONFIG_BFIN_SIR3
+        {
+        0xFFC03100,
+        IRQ_UART3_RX,
+        CH_UART3_RX,
+        CH_UART3_TX,
+        },
+#endif
+};
+
+int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
+
+struct bfin_sir_self {
+        struct bfin_sir_port    *sir_port;
+        spinlock_t              lock;
+        unsigned int            open;
+        int                     speed;
+        int                     newspeed;
+
+        struct sk_buff          *txskb;
+        struct sk_buff          *rxskb;
+        struct net_device_stats stats;
+        struct device           *dev;
+        struct irlap_cb         *irlap;
+        struct qos_info         qos;
+
+        iobuff_t                tx_buff;
+        iobuff_t                rx_buff;
+
+        struct work_struct      work;
+        int                     mtt;
+};
+
+#define DRIVER_NAME "bfin_sir"
+
+static void bfin_sir_hw_init(void)
+{
+#ifdef CONFIG_BFIN_SIR0
+        peripheral_request(P_UART0_TX, DRIVER_NAME);
+        peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_BFIN_SIR1
+        peripheral_request(P_UART1_TX, DRIVER_NAME);
+        peripheral_request(P_UART1_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_BFIN_SIR2
+        peripheral_request(P_UART2_TX, DRIVER_NAME);
+        peripheral_request(P_UART2_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_BFIN_SIR3
+        peripheral_request(P_UART3_TX, DRIVER_NAME);
+        peripheral_request(P_UART3_RX, DRIVER_NAME);
+#endif
+        SSYNC();
+}
diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h
index 3bd67da86053..d6ee74ac0460 100644
--- a/include/asm-blackfin/mach-bf548/blackfin.h
+++ b/include/asm-blackfin/mach-bf548/blackfin.h
@@ -153,17 +153,33 @@
 #define bfin_write_UART_SCR(val)        bfin_write_UART1_SCR(val)
 #define bfin_read_UART_GCTL()           bfin_read_UART1_GCTL()
 #define bfin_write_UART_GCTL(val)       bfin_write_UART1_GCTL(val)
-#define UART_THR                        UART1_THR
-#define UART_RBR                        UART1_RBR
-#define UART_DLL                        UART1_DLL
-#define UART_IER                        UART1_IER
-#define UART_DLH                        UART1_DLH
-#define UART_IIR                        UART1_IIR
-#define UART_LCR                        UART1_LCR
-#define UART_MCR                        UART1_MCR
-#define UART_LSR                        UART1_LSR
-#define UART_SCR                        UART1_SCR
-#define UART_GCTL                       UART1_GCTL
+
+#define BFIN_UART_THR                   UART1_THR
+#define BFIN_UART_RBR                   UART1_RBR
+#define BFIN_UART_DLL                   UART1_DLL
+#define BFIN_UART_IER                   UART1_IER
+#define BFIN_UART_DLH                   UART1_DLH
+#define BFIN_UART_IIR                   UART1_IIR
+#define BFIN_UART_LCR                   UART1_LCR
+#define BFIN_UART_MCR                   UART1_MCR
+#define BFIN_UART_LSR                   UART1_LSR
+#define BFIN_UART_SCR                   UART1_SCR
+#define BFIN_UART_GCTL                  UART1_GCTL
+
+#define BFIN_UART_NR_PORTS      4
+
+#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
+#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
+#define OFFSET_GCTL             0x08    /* Global Control Register              */
+#define OFFSET_LCR              0x0C    /* Line Control Register                */
+#define OFFSET_MCR              0x10    /* Modem Control Register               */
+#define OFFSET_LSR              0x14    /* Line Status Register                 */
+#define OFFSET_MSR              0x18    /* Modem Status Register                */
+#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
+#define OFFSET_IER_SET          0x20    /* Set Interrupt Enable Register        */
+#define OFFSET_IER_CLEAR        0x24    /* Clear Interrupt Enable Register      */
+#define OFFSET_THR              0x28    /* Transmit Holding register            */
+#define OFFSET_RBR              0x2C    /* Receive Buffer register              */
 
 /* PLL_DIV Masks */
 #define CCLK_DIV1 CSEL_DIV1     /* CCLK = VCO / 1 */
diff --git a/include/asm-blackfin/mach-bf548/cdefBF542.h b/include/asm-blackfin/mach-bf548/cdefBF542.h
index 308b33ab5311..60b9f77576f1 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF542.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF542.h
@@ -123,12 +123,12 @@
 #define bfin_write_SDH_DATA_LGTH(val)   bfin_write16(SDH_DATA_LGTH, val)
 #define bfin_read_SDH_DATA_CTL()        bfin_read16(SDH_DATA_CTL)
 #define bfin_write_SDH_DATA_CTL(val)    bfin_write16(SDH_DATA_CTL, val)
-#define bfin_read_SDH_DATA_CNT()        fin_read16(SDH_DATA_CNT)
+#define bfin_read_SDH_DATA_CNT()        bfin_read16(SDH_DATA_CNT)
 #define bfin_write_SDH_DATA_CNT(val)    bfin_write16(SDH_DATA_CNT, val)
 #define bfin_read_SDH_STATUS()          bfin_read32(SDH_STATUS)
 #define bfin_write_SDH_STATUS(val)      bfin_write32(SDH_STATUS, val)
-#define bfin_read_SDH_STATUS_CLR()      fin_read16(SDH_STATUS_CLR)
-#define bfin_write_SDH_STATUS_CLR(val)  fin_write16(SDH_STATUS_CLR, val)
+#define bfin_read_SDH_STATUS_CLR()      bfin_read16(SDH_STATUS_CLR)
+#define bfin_write_SDH_STATUS_CLR(val)  bfin_write16(SDH_STATUS_CLR, val)
 #define bfin_read_SDH_MASK0()           bfin_read32(SDH_MASK0)
 #define bfin_write_SDH_MASK0(val)       bfin_write32(SDH_MASK0, val)
 #define bfin_read_SDH_MASK1()           bfin_read32(SDH_MASK1)
@@ -184,8 +184,8 @@
 #define bfin_write_USB_FRAME(val)       bfin_write16(USB_FRAME, val)
 #define bfin_read_USB_INDEX()           bfin_read16(USB_INDEX)
 #define bfin_write_USB_INDEX(val)       bfin_write16(USB_INDEX, val)
-#define bfin_read_USB_TESTMODE()        fin_read16(USB_TESTMODE)
-#define bfin_write_USB_TESTMODE(val)    fin_write16(USB_TESTMODE, val)
+#define bfin_read_USB_TESTMODE()        bfin_read16(USB_TESTMODE)
+#define bfin_write_USB_TESTMODE(val)    bfin_write16(USB_TESTMODE, val)
 #define bfin_read_USB_GLOBINTR()        bfin_read16(USB_GLOBINTR)
 #define bfin_write_USB_GLOBINTR(val)    bfin_write16(USB_GLOBINTR, val)
 #define bfin_read_USB_GLOBAL_CTL()      bfin_read16(USB_GLOBAL_CTL)
@@ -244,7 +244,7 @@
 #define bfin_read_USB_OTG_DEV_CTL()             bfin_read16(USB_OTG_DEV_CTL)
 #define bfin_write_USB_OTG_DEV_CTL(val)         bfin_write16(USB_OTG_DEV_CTL, val)
 #define bfin_read_USB_OTG_VBUS_IRQ()            bfin_read16(USB_OTG_VBUS_IRQ)
-#define bfin_write_USB_OTG_VBUS_IRQ(val)        fin_write16(USB_OTG_VBUS_IRQ, val)
+#define bfin_write_USB_OTG_VBUS_IRQ(val)        bfin_write16(USB_OTG_VBUS_IRQ, val)
 #define bfin_read_USB_OTG_VBUS_MASK()           bfin_read16(USB_OTG_VBUS_MASK)
 #define bfin_write_USB_OTG_VBUS_MASK(val)       bfin_write16(USB_OTG_VBUS_MASK, val)
 
diff --git a/include/asm-blackfin/mach-bf548/cdefBF544.h b/include/asm-blackfin/mach-bf548/cdefBF544.h
index 7a2d177c8dc2..ea9b4ab496f3 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF544.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF544.h
@@ -113,39 +113,6 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
-#define bfin_read_TWI1_CLKDIV()                 bfin_read16(TWI1_CLKDIV)
-#define bfin_write_TWI1_CLKDIV(val)             bfin_write16(TWI1_CLKDIV, val)
-#define bfin_read_TWI1_CONTROL()                bfin_read16(TWI1_CONTROL)
-#define bfin_write_TWI1_CONTROL(val)            bfin_write16(TWI1_CONTROL, val)
-#define bfin_read_TWI1_SLAVE_CTRL()             bfin_read16(TWI1_SLAVE_CTRL)
-#define bfin_write_TWI1_SLAVE_CTRL(val)         bfin_write16(TWI1_SLAVE_CTRL, val)
-#define bfin_read_TWI1_SLAVE_STAT()             bfin_read16(TWI1_SLAVE_STAT)
-#define bfin_write_TWI1_SLAVE_STAT(val)         bfin_write16(TWI1_SLAVE_STAT, val)
-#define bfin_read_TWI1_SLAVE_ADDR()             bfin_read16(TWI1_SLAVE_ADDR)
-#define bfin_write_TWI1_SLAVE_ADDR(val)         bfin_write16(TWI1_SLAVE_ADDR, val)
-#define bfin_read_TWI1_MASTER_CTRL()            bfin_read16(TWI1_MASTER_CTRL)
-#define bfin_write_TWI1_MASTER_CTRL(val)        bfin_write16(TWI1_MASTER_CTRL, val)
-#define bfin_read_TWI1_MASTER_STAT()            bfin_read16(TWI1_MASTER_STAT)
-#define bfin_write_TWI1_MASTER_STAT(val)        bfin_write16(TWI1_MASTER_STAT, val)
-#define bfin_read_TWI1_MASTER_ADDR()            bfin_read16(TWI1_MASTER_ADDR)
-#define bfin_write_TWI1_MASTER_ADDR(val)        bfin_write16(TWI1_MASTER_ADDR, val)
-#define bfin_read_TWI1_INT_STAT()               bfin_read16(TWI1_INT_STAT)
-#define bfin_write_TWI1_INT_STAT(val)           bfin_write16(TWI1_INT_STAT, val)
-#define bfin_read_TWI1_INT_MASK()               bfin_read16(TWI1_INT_MASK)
-#define bfin_write_TWI1_INT_MASK(val)           bfin_write16(TWI1_INT_MASK, val)
-#define bfin_read_TWI1_FIFO_CTRL()              bfin_read16(TWI1_FIFO_CTRL)
-#define bfin_write_TWI1_FIFO_CTRL(val)          bfin_write16(TWI1_FIFO_CTRL, val)
-#define bfin_read_TWI1_FIFO_STAT()              bfin_read16(TWI1_FIFO_STAT)
-#define bfin_write_TWI1_FIFO_STAT(val)          bfin_write16(TWI1_FIFO_STAT, val)
-#define bfin_read_TWI1_XMT_DATA8()              bfin_read16(TWI1_XMT_DATA8)
-#define bfin_write_TWI1_XMT_DATA8(val)          bfin_write16(TWI1_XMT_DATA8, val)
-#define bfin_read_TWI1_XMT_DATA16()             bfin_read16(TWI1_XMT_DATA16)
-#define bfin_write_TWI1_XMT_DATA16(val)         bfin_write16(TWI1_XMT_DATA16, val)
-#define bfin_read_TWI1_RCV_DATA8()              bfin_read16(TWI1_RCV_DATA8)
-#define bfin_write_TWI1_RCV_DATA8(val)          bfin_write16(TWI1_RCV_DATA8, val)
-#define bfin_read_TWI1_RCV_DATA16()             bfin_read16(TWI1_RCV_DATA16)
-#define bfin_write_TWI1_RCV_DATA16(val)         bfin_write16(TWI1_RCV_DATA16, val)
-
 /* CAN Controller 1 Config 1 Registers */
 
 #define bfin_read_CAN1_MC1()            bfin_read16(CAN1_MC1)
diff --git a/include/asm-blackfin/mach-bf548/cdefBF547.h b/include/asm-blackfin/mach-bf548/cdefBF547.h
index d0a200b08abd..ba716277c00d 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF547.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF547.h
@@ -185,39 +185,6 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
-#define bfin_read_TWI1_CLKDIV()                 bfin_read16(TWI1_CLKDIV)
-#define bfin_write_TWI1_CLKDIV(val)             bfin_write16(TWI1_CLKDIV, val)
-#define bfin_read_TWI1_CONTROL()                bfin_read16(TWI1_CONTROL)
-#define bfin_write_TWI1_CONTROL(val)            bfin_write16(TWI1_CONTROL, val)
-#define bfin_read_TWI1_SLAVE_CTRL()             bfin_read16(TWI1_SLAVE_CTRL)
-#define bfin_write_TWI1_SLAVE_CTRL(val)         bfin_write16(TWI1_SLAVE_CTRL, val)
-#define bfin_read_TWI1_SLAVE_STAT()             bfin_read16(TWI1_SLAVE_STAT)
-#define bfin_write_TWI1_SLAVE_STAT(val)         bfin_write16(TWI1_SLAVE_STAT, val)
-#define bfin_read_TWI1_SLAVE_ADDR()             bfin_read16(TWI1_SLAVE_ADDR)
-#define bfin_write_TWI1_SLAVE_ADDR(val)         bfin_write16(TWI1_SLAVE_ADDR, val)
-#define bfin_read_TWI1_MASTER_CTRL()            bfin_read16(TWI1_MASTER_CTRL)
-#define bfin_write_TWI1_MASTER_CTRL(val)        bfin_write16(TWI1_MASTER_CTRL, val)
-#define bfin_read_TWI1_MASTER_STAT()            bfin_read16(TWI1_MASTER_STAT)
-#define bfin_write_TWI1_MASTER_STAT(val)        bfin_write16(TWI1_MASTER_STAT, val)
-#define bfin_read_TWI1_MASTER_ADDR()            bfin_read16(TWI1_MASTER_ADDR)
-#define bfin_write_TWI1_MASTER_ADDR(val)        bfin_write16(TWI1_MASTER_ADDR, val)
-#define bfin_read_TWI1_INT_STAT()               bfin_read16(TWI1_INT_STAT)
-#define bfin_write_TWI1_INT_STAT(val)           bfin_write16(TWI1_INT_STAT, val)
-#define bfin_read_TWI1_INT_MASK()               bfin_read16(TWI1_INT_MASK)
-#define bfin_write_TWI1_INT_MASK(val)           bfin_write16(TWI1_INT_MASK, val)
-#define bfin_read_TWI1_FIFO_CTRL()              bfin_read16(TWI1_FIFO_CTRL)
-#define bfin_write_TWI1_FIFO_CTRL(val)          bfin_write16(TWI1_FIFO_CTRL, val)
-#define bfin_read_TWI1_FIFO_STAT()              bfin_read16(TWI1_FIFO_STAT)
-#define bfin_write_TWI1_FIFO_STAT(val)          bfin_write16(TWI1_FIFO_STAT, val)
-#define bfin_read_TWI1_XMT_DATA8()              bfin_read16(TWI1_XMT_DATA8)
-#define bfin_write_TWI1_XMT_DATA8(val)          bfin_write16(TWI1_XMT_DATA8, val)
-#define bfin_read_TWI1_XMT_DATA16()             bfin_read16(TWI1_XMT_DATA16)
-#define bfin_write_TWI1_XMT_DATA16(val)         bfin_write16(TWI1_XMT_DATA16, val)
-#define bfin_read_TWI1_RCV_DATA8()              bfin_read16(TWI1_RCV_DATA8)
-#define bfin_write_TWI1_RCV_DATA8(val)          bfin_write16(TWI1_RCV_DATA8, val)
-#define bfin_read_TWI1_RCV_DATA16()             bfin_read16(TWI1_RCV_DATA16)
-#define bfin_write_TWI1_RCV_DATA16(val)         bfin_write16(TWI1_RCV_DATA16, val)
-
 /* SPI2  Registers */
 
 #define bfin_read_SPI2_CTL()            bfin_read16(SPI2_CTL)
diff --git a/include/asm-blackfin/mach-bf548/cdefBF548.h b/include/asm-blackfin/mach-bf548/cdefBF548.h
index 674be0216bff..ae971ebff6a0 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF548.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF548.h
@@ -185,39 +185,6 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
-#define bfin_read_TWI1_CLKDIV()                 bfin_read16(TWI1_CLKDIV)
-#define bfin_write_TWI1_CLKDIV(val)             bfin_write16(TWI1_CLKDIV, val)
-#define bfin_read_TWI1_CONTROL()                bfin_read16(TWI1_CONTROL)
-#define bfin_write_TWI1_CONTROL(val)            bfin_write16(TWI1_CONTROL, val)
-#define bfin_read_TWI1_SLAVE_CTRL()             bfin_read16(TWI1_SLAVE_CTRL)
-#define bfin_write_TWI1_SLAVE_CTRL(val)         bfin_write16(TWI1_SLAVE_CTRL, val)
-#define bfin_read_TWI1_SLAVE_STAT()             bfin_read16(TWI1_SLAVE_STAT)
-#define bfin_write_TWI1_SLAVE_STAT(val)         bfin_write16(TWI1_SLAVE_STAT, val)
-#define bfin_read_TWI1_SLAVE_ADDR()             bfin_read16(TWI1_SLAVE_ADDR)
-#define bfin_write_TWI1_SLAVE_ADDR(val)         bfin_write16(TWI1_SLAVE_ADDR, val)
-#define bfin_read_TWI1_MASTER_CTRL()            bfin_read16(TWI1_MASTER_CTRL)
-#define bfin_write_TWI1_MASTER_CTRL(val)        bfin_write16(TWI1_MASTER_CTRL, val)
-#define bfin_read_TWI1_MASTER_STAT()            bfin_read16(TWI1_MASTER_STAT)
-#define bfin_write_TWI1_MASTER_STAT(val)        bfin_write16(TWI1_MASTER_STAT, val)
-#define bfin_read_TWI1_MASTER_ADDR()            bfin_read16(TWI1_MASTER_ADDR)
-#define bfin_write_TWI1_MASTER_ADDR(val)        bfin_write16(TWI1_MASTER_ADDR, val)
-#define bfin_read_TWI1_INT_STAT()               bfin_read16(TWI1_INT_STAT)
-#define bfin_write_TWI1_INT_STAT(val)           bfin_write16(TWI1_INT_STAT, val)
-#define bfin_read_TWI1_INT_MASK()               bfin_read16(TWI1_INT_MASK)
-#define bfin_write_TWI1_INT_MASK(val)           bfin_write16(TWI1_INT_MASK, val)
-#define bfin_read_TWI1_FIFO_CTRL()              bfin_read16(TWI1_FIFO_CTRL)
-#define bfin_write_TWI1_FIFO_CTRL(val)          bfin_write16(TWI1_FIFO_CTRL, val)
-#define bfin_read_TWI1_FIFO_STAT()              bfin_read16(TWI1_FIFO_STAT)
-#define bfin_write_TWI1_FIFO_STAT(val)          bfin_write16(TWI1_FIFO_STAT, val)
-#define bfin_read_TWI1_XMT_DATA8()              bfin_read16(TWI1_XMT_DATA8)
-#define bfin_write_TWI1_XMT_DATA8(val)          bfin_write16(TWI1_XMT_DATA8, val)
-#define bfin_read_TWI1_XMT_DATA16()             bfin_read16(TWI1_XMT_DATA16)
-#define bfin_write_TWI1_XMT_DATA16(val)         bfin_write16(TWI1_XMT_DATA16, val)
-#define bfin_read_TWI1_RCV_DATA8()              bfin_read16(TWI1_RCV_DATA8)
-#define bfin_write_TWI1_RCV_DATA8(val)          bfin_write16(TWI1_RCV_DATA8, val)
-#define bfin_read_TWI1_RCV_DATA16()             bfin_read16(TWI1_RCV_DATA16)
-#define bfin_write_TWI1_RCV_DATA16(val)         bfin_write16(TWI1_RCV_DATA16, val)
-
 /* SPI2  Registers */
 
 #define bfin_read_SPI2_CTL()            bfin_read16(SPI2_CTL)
diff --git a/include/asm-blackfin/mach-bf548/cdefBF549.h b/include/asm-blackfin/mach-bf548/cdefBF549.h
index 2ab5b7c00820..92d07d961999 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF549.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF549.h
@@ -185,39 +185,6 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
-#define bfin_read_TWI1_CLKDIV()                 bfin_read16(TWI1_CLKDIV)
-#define bfin_write_TWI1_CLKDIV(val)             bfin_write16(TWI1_CLKDIV, val)
-#define bfin_read_TWI1_CONTROL()                bfin_read16(TWI1_CONTROL)
-#define bfin_write_TWI1_CONTROL(val)            bfin_write16(TWI1_CONTROL, val)
-#define bfin_read_TWI1_SLAVE_CTRL()             bfin_read16(TWI1_SLAVE_CTRL)
-#define bfin_write_TWI1_SLAVE_CTRL(val)         bfin_write16(TWI1_SLAVE_CTRL, val)
-#define bfin_read_TWI1_SLAVE_STAT()             bfin_read16(TWI1_SLAVE_STAT)
-#define bfin_write_TWI1_SLAVE_STAT(val)         bfin_write16(TWI1_SLAVE_STAT, val)
-#define bfin_read_TWI1_SLAVE_ADDR()             bfin_read16(TWI1_SLAVE_ADDR)
-#define bfin_write_TWI1_SLAVE_ADDR(val)         bfin_write16(TWI1_SLAVE_ADDR, val)
-#define bfin_read_TWI1_MASTER_CTRL()            bfin_read16(TWI1_MASTER_CTRL)
-#define bfin_write_TWI1_MASTER_CTRL(val)        bfin_write16(TWI1_MASTER_CTRL, val)
-#define bfin_read_TWI1_MASTER_STAT()            bfin_read16(TWI1_MASTER_STAT)
-#define bfin_write_TWI1_MASTER_STAT(val)        bfin_write16(TWI1_MASTER_STAT, val)
-#define bfin_read_TWI1_MASTER_ADDR()            bfin_read16(TWI1_MASTER_ADDR)
-#define bfin_write_TWI1_MASTER_ADDR(val)        bfin_write16(TWI1_MASTER_ADDR, val)
-#define bfin_read_TWI1_INT_STAT()               bfin_read16(TWI1_INT_STAT)
-#define bfin_write_TWI1_INT_STAT(val)           bfin_write16(TWI1_INT_STAT, val)
-#define bfin_read_TWI1_INT_MASK()               bfin_read16(TWI1_INT_MASK)
-#define bfin_write_TWI1_INT_MASK(val)           bfin_write16(TWI1_INT_MASK, val)
-#define bfin_read_TWI1_FIFO_CTRL()              bfin_read16(TWI1_FIFO_CTRL)
-#define bfin_write_TWI1_FIFO_CTRL(val)          bfin_write16(TWI1_FIFO_CTRL, val)
-#define bfin_read_TWI1_FIFO_STAT()              bfin_read16(TWI1_FIFO_STAT)
-#define bfin_write_TWI1_FIFO_STAT(val)          bfin_write16(TWI1_FIFO_STAT, val)
-#define bfin_read_TWI1_XMT_DATA8()              bfin_read16(TWI1_XMT_DATA8)
-#define bfin_write_TWI1_XMT_DATA8(val)          bfin_write16(TWI1_XMT_DATA8, val)
-#define bfin_read_TWI1_XMT_DATA16()             bfin_read16(TWI1_XMT_DATA16)
-#define bfin_write_TWI1_XMT_DATA16(val)         bfin_write16(TWI1_XMT_DATA16, val)
-#define bfin_read_TWI1_RCV_DATA8()              bfin_read16(TWI1_RCV_DATA8)
-#define bfin_write_TWI1_RCV_DATA8(val)          bfin_write16(TWI1_RCV_DATA8, val)
-#define bfin_read_TWI1_RCV_DATA16()             bfin_read16(TWI1_RCV_DATA16)
-#define bfin_write_TWI1_RCV_DATA16(val)         bfin_write16(TWI1_RCV_DATA16, val)
-
 /* SPI2 Registers */
 
 #define bfin_read_SPI2_CTL()            bfin_read16(SPI2_CTL)
@@ -1773,7 +1740,7 @@
 #define bfin_read_USB_DMA5ADDRHIGH()            bfin_read16(USB_DMA5ADDRHIGH)
 #define bfin_write_USB_DMA5ADDRHIGH(val)                bfin_write16(USB_DMA5ADDRHIGH, val)
 #define bfin_read_USB_DMA5COUNTLOW()            bfin_read16(USB_DMA5COUNTLOW)
-#define bfin_write_USB_DMA5COUNTLOW(val)        fin_write16(USB_DMA5COUNTLOW, val)
+#define bfin_write_USB_DMA5COUNTLOW(val)        bfin_write16(USB_DMA5COUNTLOW, val)
 #define bfin_read_USB_DMA5COUNTHIGH()           bfin_read16(USB_DMA5COUNTHIGH)
 #define bfin_write_USB_DMA5COUNTHIGH(val)       bfin_write16(USB_DMA5COUNTHIGH, val)
 
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
index 19ddcd83c71f..57ac8cb9b1f6 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
@@ -43,7 +43,33 @@
 /* PLL Registers */
 
 #define bfin_read_PLL_CTL()             bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val)         bfin_write16(PLL_CTL, val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+        unsigned long flags, iwr0, iwr1, iwr2;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr0 = bfin_read32(SIC_IWR0);
+        iwr1 = bfin_read32(SIC_IWR1);
+        iwr2 = bfin_read32(SIC_IWR2);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SIC_IWR0, IWR_ENABLE(0));
+        bfin_write32(SIC_IWR1, 0);
+        bfin_write32(SIC_IWR2, 0);
+
+        bfin_write16(PLL_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SIC_IWR0, iwr0);
+        bfin_write32(SIC_IWR1, iwr1);
+        bfin_write32(SIC_IWR2, iwr2);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_DIV()             bfin_read16(PLL_DIV)
 #define bfin_write_PLL_DIV(val)         bfin_write16(PLL_DIV, val)
 #define bfin_read_VR_CTL()              bfin_read16(VR_CTL)
@@ -52,6 +78,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
         unsigned long flags, iwr0, iwr1, iwr2;
 
+        if (val == bfin_read_VR_CTL())
+                return;
+
+        local_irq_save(flags);
         /* Enable the PLL Wakeup bit in SIC IWR */
         iwr0 = bfin_read32(SIC_IWR0);
         iwr1 = bfin_read32(SIC_IWR1);
@@ -63,13 +93,12 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 
         bfin_write16(VR_CTL, val);
         SSYNC();
-
-        local_irq_save(flags);
         asm("IDLE;");
-        local_irq_restore(flags);
+
         bfin_write32(SIC_IWR0, iwr0);
         bfin_write32(SIC_IWR1, iwr1);
         bfin_write32(SIC_IWR2, iwr2);
+        local_irq_restore(flags);
 }
 #define bfin_read_PLL_STAT()            bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)        bfin_write16(PLL_STAT, val)
@@ -211,39 +240,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 
 /* Two Wire Interface Registers (TWI0) */
 
-#define bfin_read_TWI0_CLKDIV()                 bfin_read16(TWI0_CLKDIV)
-#define bfin_write_TWI0_CLKDIV(val)             bfin_write16(TWI0_CLKDIV, val)
-#define bfin_read_TWI0_CONTROL()                bfin_read16(TWI0_CONTROL)
-#define bfin_write_TWI0_CONTROL(val)            bfin_write16(TWI0_CONTROL, val)
-#define bfin_read_TWI0_SLAVE_CTRL()             bfin_read16(TWI0_SLAVE_CTRL)
-#define bfin_write_TWI0_SLAVE_CTRL(val)         bfin_write16(TWI0_SLAVE_CTRL, val)
-#define bfin_read_TWI0_SLAVE_STAT()             bfin_read16(TWI0_SLAVE_STAT)
-#define bfin_write_TWI0_SLAVE_STAT(val)         bfin_write16(TWI0_SLAVE_STAT, val)
-#define bfin_read_TWI0_SLAVE_ADDR()             bfin_read16(TWI0_SLAVE_ADDR)
-#define bfin_write_TWI0_SLAVE_ADDR(val)         bfin_write16(TWI0_SLAVE_ADDR, val)
-#define bfin_read_TWI0_MASTER_CTRL()            bfin_read16(TWI0_MASTER_CTRL)
-#define bfin_write_TWI0_MASTER_CTRL(val)        bfin_write16(TWI0_MASTER_CTRL, val)
-#define bfin_read_TWI0_MASTER_STAT()            bfin_read16(TWI0_MASTER_STAT)
-#define bfin_write_TWI0_MASTER_STAT(val)        bfin_write16(TWI0_MASTER_STAT, val)
-#define bfin_read_TWI0_MASTER_ADDR()            bfin_read16(TWI0_MASTER_ADDR)
-#define bfin_write_TWI0_MASTER_ADDR(val)        bfin_write16(TWI0_MASTER_ADDR, val)
-#define bfin_read_TWI0_INT_STAT()               bfin_read16(TWI0_INT_STAT)
-#define bfin_write_TWI0_INT_STAT(val)           bfin_write16(TWI0_INT_STAT, val)
-#define bfin_read_TWI0_INT_MASK()               bfin_read16(TWI0_INT_MASK)
-#define bfin_write_TWI0_INT_MASK(val)           bfin_write16(TWI0_INT_MASK, val)
-#define bfin_read_TWI0_FIFO_CTRL()              bfin_read16(TWI0_FIFO_CTRL)
-#define bfin_write_TWI0_FIFO_CTRL(val)          bfin_write16(TWI0_FIFO_CTRL, val)
-#define bfin_read_TWI0_FIFO_STAT()              bfin_read16(TWI0_FIFO_STAT)
-#define bfin_write_TWI0_FIFO_STAT(val)          bfin_write16(TWI0_FIFO_STAT, val)
-#define bfin_read_TWI0_XMT_DATA8()              bfin_read16(TWI0_XMT_DATA8)
-#define bfin_write_TWI0_XMT_DATA8(val)          bfin_write16(TWI0_XMT_DATA8, val)
-#define bfin_read_TWI0_XMT_DATA16()             bfin_read16(TWI0_XMT_DATA16)
-#define bfin_write_TWI0_XMT_DATA16(val)         bfin_write16(TWI0_XMT_DATA16, val)
-#define bfin_read_TWI0_RCV_DATA8()              bfin_read16(TWI0_RCV_DATA8)
-#define bfin_write_TWI0_RCV_DATA8(val)          bfin_write16(TWI0_RCV_DATA8, val)
-#define bfin_read_TWI0_RCV_DATA16()             bfin_read16(TWI0_RCV_DATA16)
-#define bfin_write_TWI0_RCV_DATA16(val)         bfin_write16(TWI0_RCV_DATA16, val)
-
 /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
 
 /* SPORT1 Registers */
@@ -323,7 +319,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_EBIU_DDRQUE()         bfin_read32(EBIU_DDRQUE)
 #define bfin_write_EBIU_DDRQUE(val)     bfin_write32(EBIU_DDRQUE, val)
 #define bfin_read_EBIU_ERRADD()         bfin_read32(EBIU_ERRADD)
-#define bfin_write_EBIU_ERRADD(val)     bfin_write32(EBIU_ERRADD)
+#define bfin_write_EBIU_ERRADD(val)     bfin_write32(EBIU_ERRADD, val)
 #define bfin_read_EBIU_ERRMST()         bfin_read16(EBIU_ERRMST)
 #define bfin_write_EBIU_ERRMST(val)     bfin_write16(EBIU_ERRMST, val)
 #define bfin_read_EBIU_RSTCTL()         bfin_read16(EBIU_RSTCTL)
@@ -392,23 +388,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 0 Registers */
 
 #define bfin_read_DMA0_NEXT_DESC_PTR()          bfin_read32(DMA0_NEXT_DESC_PTR)
-#define bfin_write_DMA0_NEXT_DESC_PTR(val)      bfin_write32(DMA0_NEXT_DESC_PTR)
+#define bfin_write_DMA0_NEXT_DESC_PTR(val)      bfin_write32(DMA0_NEXT_DESC_PTR, val)
 #define bfin_read_DMA0_START_ADDR()             bfin_read32(DMA0_START_ADDR)
-#define bfin_write_DMA0_START_ADDR(val)         bfin_write32(DMA0_START_ADDR)
+#define bfin_write_DMA0_START_ADDR(val)         bfin_write32(DMA0_START_ADDR, val)
 #define bfin_read_DMA0_CONFIG()                 bfin_read16(DMA0_CONFIG)
 #define bfin_write_DMA0_CONFIG(val)             bfin_write16(DMA0_CONFIG, val)
 #define bfin_read_DMA0_X_COUNT()                bfin_read16(DMA0_X_COUNT)
 #define bfin_write_DMA0_X_COUNT(val)            bfin_write16(DMA0_X_COUNT, val)
 #define bfin_read_DMA0_X_MODIFY()               bfin_read16(DMA0_X_MODIFY)
-#define bfin_write_DMA0_X_MODIFY(val)           bfin_write16(DMA0_X_MODIFY)
+#define bfin_write_DMA0_X_MODIFY(val)           bfin_write16(DMA0_X_MODIFY, val)
 #define bfin_read_DMA0_Y_COUNT()                bfin_read16(DMA0_Y_COUNT)
 #define bfin_write_DMA0_Y_COUNT(val)            bfin_write16(DMA0_Y_COUNT, val)
 #define bfin_read_DMA0_Y_MODIFY()               bfin_read16(DMA0_Y_MODIFY)
-#define bfin_write_DMA0_Y_MODIFY(val)           bfin_write16(DMA0_Y_MODIFY)
+#define bfin_write_DMA0_Y_MODIFY(val)           bfin_write16(DMA0_Y_MODIFY, val)
 #define bfin_read_DMA0_CURR_DESC_PTR()          bfin_read32(DMA0_CURR_DESC_PTR)
-#define bfin_write_DMA0_CURR_DESC_PTR(val)      bfin_write32(DMA0_CURR_DESC_PTR)
+#define bfin_write_DMA0_CURR_DESC_PTR(val)      bfin_write32(DMA0_CURR_DESC_PTR, val)
 #define bfin_read_DMA0_CURR_ADDR()              bfin_read32(DMA0_CURR_ADDR)
-#define bfin_write_DMA0_CURR_ADDR(val)          bfin_write32(DMA0_CURR_ADDR)
+#define bfin_write_DMA0_CURR_ADDR(val)          bfin_write32(DMA0_CURR_ADDR, val)
 #define bfin_read_DMA0_IRQ_STATUS()             bfin_read16(DMA0_IRQ_STATUS)
 #define bfin_write_DMA0_IRQ_STATUS(val)         bfin_write16(DMA0_IRQ_STATUS, val)
 #define bfin_read_DMA0_PERIPHERAL_MAP()         bfin_read16(DMA0_PERIPHERAL_MAP)
@@ -421,23 +417,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 1 Registers */
 
 #define bfin_read_DMA1_NEXT_DESC_PTR()          bfin_read32(DMA1_NEXT_DESC_PTR)
-#define bfin_write_DMA1_NEXT_DESC_PTR(val)      bfin_write32(DMA1_NEXT_DESC_PTR)
+#define bfin_write_DMA1_NEXT_DESC_PTR(val)      bfin_write32(DMA1_NEXT_DESC_PTR, val)
 #define bfin_read_DMA1_START_ADDR()             bfin_read32(DMA1_START_ADDR)
-#define bfin_write_DMA1_START_ADDR(val)         bfin_write32(DMA1_START_ADDR)
+#define bfin_write_DMA1_START_ADDR(val)         bfin_write32(DMA1_START_ADDR, val)
 #define bfin_read_DMA1_CONFIG()                 bfin_read16(DMA1_CONFIG)
 #define bfin_write_DMA1_CONFIG(val)             bfin_write16(DMA1_CONFIG, val)
 #define bfin_read_DMA1_X_COUNT()                bfin_read16(DMA1_X_COUNT)
 #define bfin_write_DMA1_X_COUNT(val)            bfin_write16(DMA1_X_COUNT, val)
 #define bfin_read_DMA1_X_MODIFY()               bfin_read16(DMA1_X_MODIFY)
-#define bfin_write_DMA1_X_MODIFY(val)           bfin_write16(DMA1_X_MODIFY)
+#define bfin_write_DMA1_X_MODIFY(val)           bfin_write16(DMA1_X_MODIFY, val)
 #define bfin_read_DMA1_Y_COUNT()                bfin_read16(DMA1_Y_COUNT)
 #define bfin_write_DMA1_Y_COUNT(val)            bfin_write16(DMA1_Y_COUNT, val)
 #define bfin_read_DMA1_Y_MODIFY()               bfin_read16(DMA1_Y_MODIFY)
-#define bfin_write_DMA1_Y_MODIFY(val)           bfin_write16(DMA1_Y_MODIFY)
+#define bfin_write_DMA1_Y_MODIFY(val)           bfin_write16(DMA1_Y_MODIFY, val)
 #define bfin_read_DMA1_CURR_DESC_PTR()          bfin_read32(DMA1_CURR_DESC_PTR)
-#define bfin_write_DMA1_CURR_DESC_PTR(val)      bfin_write32(DMA1_CURR_DESC_PTR)
+#define bfin_write_DMA1_CURR_DESC_PTR(val)      bfin_write32(DMA1_CURR_DESC_PTR, val)
 #define bfin_read_DMA1_CURR_ADDR()              bfin_read32(DMA1_CURR_ADDR)
-#define bfin_write_DMA1_CURR_ADDR(val)          bfin_write32(DMA1_CURR_ADDR)
+#define bfin_write_DMA1_CURR_ADDR(val)          bfin_write32(DMA1_CURR_ADDR, val)
 #define bfin_read_DMA1_IRQ_STATUS()             bfin_read16(DMA1_IRQ_STATUS)
 #define bfin_write_DMA1_IRQ_STATUS(val)         bfin_write16(DMA1_IRQ_STATUS, val)
 #define bfin_read_DMA1_PERIPHERAL_MAP()         bfin_read16(DMA1_PERIPHERAL_MAP)
@@ -450,23 +446,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 2 Registers */
 
 #define bfin_read_DMA2_NEXT_DESC_PTR()          bfin_read32(DMA2_NEXT_DESC_PTR)
-#define bfin_write_DMA2_NEXT_DESC_PTR(val)      bfin_write32(DMA2_NEXT_DESC_PTR)
+#define bfin_write_DMA2_NEXT_DESC_PTR(val)      bfin_write32(DMA2_NEXT_DESC_PTR, val)
 #define bfin_read_DMA2_START_ADDR()             bfin_read32(DMA2_START_ADDR)
-#define bfin_write_DMA2_START_ADDR(val)         bfin_write32(DMA2_START_ADDR)
+#define bfin_write_DMA2_START_ADDR(val)         bfin_write32(DMA2_START_ADDR, val)
 #define bfin_read_DMA2_CONFIG()                 bfin_read16(DMA2_CONFIG)
 #define bfin_write_DMA2_CONFIG(val)             bfin_write16(DMA2_CONFIG, val)
 #define bfin_read_DMA2_X_COUNT()                bfin_read16(DMA2_X_COUNT)
 #define bfin_write_DMA2_X_COUNT(val)            bfin_write16(DMA2_X_COUNT, val)
 #define bfin_read_DMA2_X_MODIFY()               bfin_read16(DMA2_X_MODIFY)
-#define bfin_write_DMA2_X_MODIFY(val)           bfin_write16(DMA2_X_MODIFY)
+#define bfin_write_DMA2_X_MODIFY(val)           bfin_write16(DMA2_X_MODIFY, val)
 #define bfin_read_DMA2_Y_COUNT()                bfin_read16(DMA2_Y_COUNT)
 #define bfin_write_DMA2_Y_COUNT(val)            bfin_write16(DMA2_Y_COUNT, val)
 #define bfin_read_DMA2_Y_MODIFY()               bfin_read16(DMA2_Y_MODIFY)
-#define bfin_write_DMA2_Y_MODIFY(val)           bfin_write16(DMA2_Y_MODIFY)
+#define bfin_write_DMA2_Y_MODIFY(val)           bfin_write16(DMA2_Y_MODIFY, val)
 #define bfin_read_DMA2_CURR_DESC_PTR()          bfin_read32(DMA2_CURR_DESC_PTR)
-#define bfin_write_DMA2_CURR_DESC_PTR(val)      bfin_write32(DMA2_CURR_DESC_PTR)
+#define bfin_write_DMA2_CURR_DESC_PTR(val)      bfin_write32(DMA2_CURR_DESC_PTR, val)
 #define bfin_read_DMA2_CURR_ADDR()              bfin_read32(DMA2_CURR_ADDR)
-#define bfin_write_DMA2_CURR_ADDR(val)          bfin_write32(DMA2_CURR_ADDR)
+#define bfin_write_DMA2_CURR_ADDR(val)          bfin_write32(DMA2_CURR_ADDR, val)
 #define bfin_read_DMA2_IRQ_STATUS()             bfin_read16(DMA2_IRQ_STATUS)
 #define bfin_write_DMA2_IRQ_STATUS(val)         bfin_write16(DMA2_IRQ_STATUS, val)
 #define bfin_read_DMA2_PERIPHERAL_MAP()         bfin_read16(DMA2_PERIPHERAL_MAP)
@@ -479,23 +475,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 3 Registers */
 
 #define bfin_read_DMA3_NEXT_DESC_PTR()          bfin_read32(DMA3_NEXT_DESC_PTR)
-#define bfin_write_DMA3_NEXT_DESC_PTR(val)      bfin_write32(DMA3_NEXT_DESC_PTR)
+#define bfin_write_DMA3_NEXT_DESC_PTR(val)      bfin_write32(DMA3_NEXT_DESC_PTR, val)
 #define bfin_read_DMA3_START_ADDR()             bfin_read32(DMA3_START_ADDR)
-#define bfin_write_DMA3_START_ADDR(val)         bfin_write32(DMA3_START_ADDR)
+#define bfin_write_DMA3_START_ADDR(val)         bfin_write32(DMA3_START_ADDR, val)
 #define bfin_read_DMA3_CONFIG()                 bfin_read16(DMA3_CONFIG)
 #define bfin_write_DMA3_CONFIG(val)             bfin_write16(DMA3_CONFIG, val)
 #define bfin_read_DMA3_X_COUNT()                bfin_read16(DMA3_X_COUNT)
 #define bfin_write_DMA3_X_COUNT(val)            bfin_write16(DMA3_X_COUNT, val)
 #define bfin_read_DMA3_X_MODIFY()               bfin_read16(DMA3_X_MODIFY)
-#define bfin_write_DMA3_X_MODIFY(val)           bfin_write16(DMA3_X_MODIFY)
+#define bfin_write_DMA3_X_MODIFY(val)           bfin_write16(DMA3_X_MODIFY, val)
 #define bfin_read_DMA3_Y_COUNT()                bfin_read16(DMA3_Y_COUNT)
 #define bfin_write_DMA3_Y_COUNT(val)            bfin_write16(DMA3_Y_COUNT, val)
 #define bfin_read_DMA3_Y_MODIFY()               bfin_read16(DMA3_Y_MODIFY)
-#define bfin_write_DMA3_Y_MODIFY(val)           bfin_write16(DMA3_Y_MODIFY)
+#define bfin_write_DMA3_Y_MODIFY(val)           bfin_write16(DMA3_Y_MODIFY, val)
 #define bfin_read_DMA3_CURR_DESC_PTR()          bfin_read32(DMA3_CURR_DESC_PTR)
-#define bfin_write_DMA3_CURR_DESC_PTR(val)      bfin_write32(DMA3_CURR_DESC_PTR)
+#define bfin_write_DMA3_CURR_DESC_PTR(val)      bfin_write32(DMA3_CURR_DESC_PTR, val)
 #define bfin_read_DMA3_CURR_ADDR()              bfin_read32(DMA3_CURR_ADDR)
-#define bfin_write_DMA3_CURR_ADDR(val)          bfin_write32(DMA3_CURR_ADDR)
+#define bfin_write_DMA3_CURR_ADDR(val)          bfin_write32(DMA3_CURR_ADDR, val)
 #define bfin_read_DMA3_IRQ_STATUS()             bfin_read16(DMA3_IRQ_STATUS)
 #define bfin_write_DMA3_IRQ_STATUS(val)         bfin_write16(DMA3_IRQ_STATUS, val)
 #define bfin_read_DMA3_PERIPHERAL_MAP()         bfin_read16(DMA3_PERIPHERAL_MAP)
@@ -508,23 +504,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 4 Registers */
 
 #define bfin_read_DMA4_NEXT_DESC_PTR()          bfin_read32(DMA4_NEXT_DESC_PTR)
-#define bfin_write_DMA4_NEXT_DESC_PTR(val)      bfin_write32(DMA4_NEXT_DESC_PTR)
+#define bfin_write_DMA4_NEXT_DESC_PTR(val)      bfin_write32(DMA4_NEXT_DESC_PTR, val)
 #define bfin_read_DMA4_START_ADDR()             bfin_read32(DMA4_START_ADDR)
-#define bfin_write_DMA4_START_ADDR(val)         bfin_write32(DMA4_START_ADDR)
+#define bfin_write_DMA4_START_ADDR(val)         bfin_write32(DMA4_START_ADDR, val)
 #define bfin_read_DMA4_CONFIG()                 bfin_read16(DMA4_CONFIG)
 #define bfin_write_DMA4_CONFIG(val)             bfin_write16(DMA4_CONFIG, val)
 #define bfin_read_DMA4_X_COUNT()                bfin_read16(DMA4_X_COUNT)
 #define bfin_write_DMA4_X_COUNT(val)            bfin_write16(DMA4_X_COUNT, val)
 #define bfin_read_DMA4_X_MODIFY()               bfin_read16(DMA4_X_MODIFY)
-#define bfin_write_DMA4_X_MODIFY(val)           bfin_write16(DMA4_X_MODIFY)
+#define bfin_write_DMA4_X_MODIFY(val)           bfin_write16(DMA4_X_MODIFY, val)
 #define bfin_read_DMA4_Y_COUNT()                bfin_read16(DMA4_Y_COUNT)
 #define bfin_write_DMA4_Y_COUNT(val)            bfin_write16(DMA4_Y_COUNT, val)
 #define bfin_read_DMA4_Y_MODIFY()               bfin_read16(DMA4_Y_MODIFY)
-#define bfin_write_DMA4_Y_MODIFY(val)           bfin_write16(DMA4_Y_MODIFY)
+#define bfin_write_DMA4_Y_MODIFY(val)           bfin_write16(DMA4_Y_MODIFY, val)
 #define bfin_read_DMA4_CURR_DESC_PTR()          bfin_read32(DMA4_CURR_DESC_PTR)
-#define bfin_write_DMA4_CURR_DESC_PTR(val)      bfin_write32(DMA4_CURR_DESC_PTR)
+#define bfin_write_DMA4_CURR_DESC_PTR(val)      bfin_write32(DMA4_CURR_DESC_PTR, val)
 #define bfin_read_DMA4_CURR_ADDR()              bfin_read32(DMA4_CURR_ADDR)
-#define bfin_write_DMA4_CURR_ADDR(val)          bfin_write32(DMA4_CURR_ADDR)
+#define bfin_write_DMA4_CURR_ADDR(val)          bfin_write32(DMA4_CURR_ADDR, val)
 #define bfin_read_DMA4_IRQ_STATUS()             bfin_read16(DMA4_IRQ_STATUS)
 #define bfin_write_DMA4_IRQ_STATUS(val)         bfin_write16(DMA4_IRQ_STATUS, val)
 #define bfin_read_DMA4_PERIPHERAL_MAP()         bfin_read16(DMA4_PERIPHERAL_MAP)
@@ -537,23 +533,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 5 Registers */
 
 #define bfin_read_DMA5_NEXT_DESC_PTR()          bfin_read32(DMA5_NEXT_DESC_PTR)
-#define bfin_write_DMA5_NEXT_DESC_PTR(val)      bfin_write32(DMA5_NEXT_DESC_PTR)
+#define bfin_write_DMA5_NEXT_DESC_PTR(val)      bfin_write32(DMA5_NEXT_DESC_PTR, val)
 #define bfin_read_DMA5_START_ADDR()             bfin_read32(DMA5_START_ADDR)
-#define bfin_write_DMA5_START_ADDR(val)         bfin_write32(DMA5_START_ADDR)
+#define bfin_write_DMA5_START_ADDR(val)         bfin_write32(DMA5_START_ADDR, val)
 #define bfin_read_DMA5_CONFIG()                 bfin_read16(DMA5_CONFIG)
 #define bfin_write_DMA5_CONFIG(val)             bfin_write16(DMA5_CONFIG, val)
 #define bfin_read_DMA5_X_COUNT()                bfin_read16(DMA5_X_COUNT)
 #define bfin_write_DMA5_X_COUNT(val)            bfin_write16(DMA5_X_COUNT, val)
 #define bfin_read_DMA5_X_MODIFY()               bfin_read16(DMA5_X_MODIFY)
-#define bfin_write_DMA5_X_MODIFY(val)           bfin_write16(DMA5_X_MODIFY)
+#define bfin_write_DMA5_X_MODIFY(val)           bfin_write16(DMA5_X_MODIFY, val)
 #define bfin_read_DMA5_Y_COUNT()                bfin_read16(DMA5_Y_COUNT)
 #define bfin_write_DMA5_Y_COUNT(val)            bfin_write16(DMA5_Y_COUNT, val)
 #define bfin_read_DMA5_Y_MODIFY()               bfin_read16(DMA5_Y_MODIFY)
-#define bfin_write_DMA5_Y_MODIFY(val)           bfin_write16(DMA5_Y_MODIFY)
+#define bfin_write_DMA5_Y_MODIFY(val)           bfin_write16(DMA5_Y_MODIFY, val)
 #define bfin_read_DMA5_CURR_DESC_PTR()          bfin_read32(DMA5_CURR_DESC_PTR)
-#define bfin_write_DMA5_CURR_DESC_PTR(val)      bfin_write32(DMA5_CURR_DESC_PTR)
+#define bfin_write_DMA5_CURR_DESC_PTR(val)      bfin_write32(DMA5_CURR_DESC_PTR, val)
 #define bfin_read_DMA5_CURR_ADDR()              bfin_read32(DMA5_CURR_ADDR)
-#define bfin_write_DMA5_CURR_ADDR(val)          bfin_write32(DMA5_CURR_ADDR)
+#define bfin_write_DMA5_CURR_ADDR(val)          bfin_write32(DMA5_CURR_ADDR, val)
 #define bfin_read_DMA5_IRQ_STATUS()             bfin_read16(DMA5_IRQ_STATUS)
 #define bfin_write_DMA5_IRQ_STATUS(val)         bfin_write16(DMA5_IRQ_STATUS, val)
 #define bfin_read_DMA5_PERIPHERAL_MAP()         bfin_read16(DMA5_PERIPHERAL_MAP)
@@ -566,23 +562,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 6 Registers */
 
 #define bfin_read_DMA6_NEXT_DESC_PTR()          bfin_read32(DMA6_NEXT_DESC_PTR)
-#define bfin_write_DMA6_NEXT_DESC_PTR(val)      bfin_write32(DMA6_NEXT_DESC_PTR)
+#define bfin_write_DMA6_NEXT_DESC_PTR(val)      bfin_write32(DMA6_NEXT_DESC_PTR, val)
 #define bfin_read_DMA6_START_ADDR()             bfin_read32(DMA6_START_ADDR)
-#define bfin_write_DMA6_START_ADDR(val)         bfin_write32(DMA6_START_ADDR)
+#define bfin_write_DMA6_START_ADDR(val)         bfin_write32(DMA6_START_ADDR, val)
 #define bfin_read_DMA6_CONFIG()                 bfin_read16(DMA6_CONFIG)
 #define bfin_write_DMA6_CONFIG(val)             bfin_write16(DMA6_CONFIG, val)
 #define bfin_read_DMA6_X_COUNT()                bfin_read16(DMA6_X_COUNT)
 #define bfin_write_DMA6_X_COUNT(val)            bfin_write16(DMA6_X_COUNT, val)
 #define bfin_read_DMA6_X_MODIFY()               bfin_read16(DMA6_X_MODIFY)
-#define bfin_write_DMA6_X_MODIFY(val)           bfin_write16(DMA6_X_MODIFY)
+#define bfin_write_DMA6_X_MODIFY(val)           bfin_write16(DMA6_X_MODIFY, val)
 #define bfin_read_DMA6_Y_COUNT()                bfin_read16(DMA6_Y_COUNT)
 #define bfin_write_DMA6_Y_COUNT(val)            bfin_write16(DMA6_Y_COUNT, val)
 #define bfin_read_DMA6_Y_MODIFY()               bfin_read16(DMA6_Y_MODIFY)
-#define bfin_write_DMA6_Y_MODIFY(val)           bfin_write16(DMA6_Y_MODIFY)
+#define bfin_write_DMA6_Y_MODIFY(val)           bfin_write16(DMA6_Y_MODIFY, val)
 #define bfin_read_DMA6_CURR_DESC_PTR()          bfin_read32(DMA6_CURR_DESC_PTR)
-#define bfin_write_DMA6_CURR_DESC_PTR(val)      bfin_write32(DMA6_CURR_DESC_PTR)
+#define bfin_write_DMA6_CURR_DESC_PTR(val)      bfin_write32(DMA6_CURR_DESC_PTR, val)
 #define bfin_read_DMA6_CURR_ADDR()              bfin_read32(DMA6_CURR_ADDR)
-#define bfin_write_DMA6_CURR_ADDR(val)          bfin_write32(DMA6_CURR_ADDR)
+#define bfin_write_DMA6_CURR_ADDR(val)          bfin_write32(DMA6_CURR_ADDR, val)
 #define bfin_read_DMA6_IRQ_STATUS()             bfin_read16(DMA6_IRQ_STATUS)
 #define bfin_write_DMA6_IRQ_STATUS(val)         bfin_write16(DMA6_IRQ_STATUS, val)
 #define bfin_read_DMA6_PERIPHERAL_MAP()         bfin_read16(DMA6_PERIPHERAL_MAP)
@@ -595,23 +591,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 7 Registers */
 
 #define bfin_read_DMA7_NEXT_DESC_PTR()          bfin_read32(DMA7_NEXT_DESC_PTR)
-#define bfin_write_DMA7_NEXT_DESC_PTR(val)      bfin_write32(DMA7_NEXT_DESC_PTR)
+#define bfin_write_DMA7_NEXT_DESC_PTR(val)      bfin_write32(DMA7_NEXT_DESC_PTR, val)
 #define bfin_read_DMA7_START_ADDR()             bfin_read32(DMA7_START_ADDR)
-#define bfin_write_DMA7_START_ADDR(val)         bfin_write32(DMA7_START_ADDR)
+#define bfin_write_DMA7_START_ADDR(val)         bfin_write32(DMA7_START_ADDR, val)
 #define bfin_read_DMA7_CONFIG()                 bfin_read16(DMA7_CONFIG)
 #define bfin_write_DMA7_CONFIG(val)             bfin_write16(DMA7_CONFIG, val)
 #define bfin_read_DMA7_X_COUNT()                bfin_read16(DMA7_X_COUNT)
 #define bfin_write_DMA7_X_COUNT(val)            bfin_write16(DMA7_X_COUNT, val)
 #define bfin_read_DMA7_X_MODIFY()               bfin_read16(DMA7_X_MODIFY)
-#define bfin_write_DMA7_X_MODIFY(val)           bfin_write16(DMA7_X_MODIFY)
+#define bfin_write_DMA7_X_MODIFY(val)           bfin_write16(DMA7_X_MODIFY, val)
 #define bfin_read_DMA7_Y_COUNT()                bfin_read16(DMA7_Y_COUNT)
 #define bfin_write_DMA7_Y_COUNT(val)            bfin_write16(DMA7_Y_COUNT, val)
 #define bfin_read_DMA7_Y_MODIFY()               bfin_read16(DMA7_Y_MODIFY)
-#define bfin_write_DMA7_Y_MODIFY(val)           bfin_write16(DMA7_Y_MODIFY)
+#define bfin_write_DMA7_Y_MODIFY(val)           bfin_write16(DMA7_Y_MODIFY, val)
 #define bfin_read_DMA7_CURR_DESC_PTR()          bfin_read32(DMA7_CURR_DESC_PTR)
-#define bfin_write_DMA7_CURR_DESC_PTR(val)      bfin_write32(DMA7_CURR_DESC_PTR)
+#define bfin_write_DMA7_CURR_DESC_PTR(val)      bfin_write32(DMA7_CURR_DESC_PTR, val)
 #define bfin_read_DMA7_CURR_ADDR()              bfin_read32(DMA7_CURR_ADDR)
-#define bfin_write_DMA7_CURR_ADDR(val)          bfin_write32(DMA7_CURR_ADDR)
+#define bfin_write_DMA7_CURR_ADDR(val)          bfin_write32(DMA7_CURR_ADDR, val)
 #define bfin_read_DMA7_IRQ_STATUS()             bfin_read16(DMA7_IRQ_STATUS)
 #define bfin_write_DMA7_IRQ_STATUS(val)         bfin_write16(DMA7_IRQ_STATUS, val)
 #define bfin_read_DMA7_PERIPHERAL_MAP()         bfin_read16(DMA7_PERIPHERAL_MAP)
@@ -624,23 +620,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 8 Registers */
 
 #define bfin_read_DMA8_NEXT_DESC_PTR()          bfin_read32(DMA8_NEXT_DESC_PTR)
-#define bfin_write_DMA8_NEXT_DESC_PTR(val)      bfin_write32(DMA8_NEXT_DESC_PTR)
+#define bfin_write_DMA8_NEXT_DESC_PTR(val)      bfin_write32(DMA8_NEXT_DESC_PTR, val)
 #define bfin_read_DMA8_START_ADDR()             bfin_read32(DMA8_START_ADDR)
-#define bfin_write_DMA8_START_ADDR(val)         bfin_write32(DMA8_START_ADDR)
+#define bfin_write_DMA8_START_ADDR(val)         bfin_write32(DMA8_START_ADDR, val)
 #define bfin_read_DMA8_CONFIG()                 bfin_read16(DMA8_CONFIG)
 #define bfin_write_DMA8_CONFIG(val)             bfin_write16(DMA8_CONFIG, val)
 #define bfin_read_DMA8_X_COUNT()                bfin_read16(DMA8_X_COUNT)
 #define bfin_write_DMA8_X_COUNT(val)            bfin_write16(DMA8_X_COUNT, val)
 #define bfin_read_DMA8_X_MODIFY()               bfin_read16(DMA8_X_MODIFY)
-#define bfin_write_DMA8_X_MODIFY(val)           bfin_write16(DMA8_X_MODIFY)
+#define bfin_write_DMA8_X_MODIFY(val)           bfin_write16(DMA8_X_MODIFY, val)
 #define bfin_read_DMA8_Y_COUNT()                bfin_read16(DMA8_Y_COUNT)
 #define bfin_write_DMA8_Y_COUNT(val)            bfin_write16(DMA8_Y_COUNT, val)
 #define bfin_read_DMA8_Y_MODIFY()               bfin_read16(DMA8_Y_MODIFY)
-#define bfin_write_DMA8_Y_MODIFY(val)           bfin_write16(DMA8_Y_MODIFY)
+#define bfin_write_DMA8_Y_MODIFY(val)           bfin_write16(DMA8_Y_MODIFY, val)
 #define bfin_read_DMA8_CURR_DESC_PTR()          bfin_read32(DMA8_CURR_DESC_PTR)
-#define bfin_write_DMA8_CURR_DESC_PTR(val)      bfin_write32(DMA8_CURR_DESC_PTR)
+#define bfin_write_DMA8_CURR_DESC_PTR(val)      bfin_write32(DMA8_CURR_DESC_PTR, val)
 #define bfin_read_DMA8_CURR_ADDR()              bfin_read32(DMA8_CURR_ADDR)
-#define bfin_write_DMA8_CURR_ADDR(val)          bfin_write32(DMA8_CURR_ADDR)
+#define bfin_write_DMA8_CURR_ADDR(val)          bfin_write32(DMA8_CURR_ADDR, val)
 #define bfin_read_DMA8_IRQ_STATUS()             bfin_read16(DMA8_IRQ_STATUS)
 #define bfin_write_DMA8_IRQ_STATUS(val)         bfin_write16(DMA8_IRQ_STATUS, val)
 #define bfin_read_DMA8_PERIPHERAL_MAP()         bfin_read16(DMA8_PERIPHERAL_MAP)
@@ -653,23 +649,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 9 Registers */
 
 #define bfin_read_DMA9_NEXT_DESC_PTR()          bfin_read32(DMA9_NEXT_DESC_PTR)
-#define bfin_write_DMA9_NEXT_DESC_PTR(val)      bfin_write32(DMA9_NEXT_DESC_PTR)
+#define bfin_write_DMA9_NEXT_DESC_PTR(val)      bfin_write32(DMA9_NEXT_DESC_PTR, val)
 #define bfin_read_DMA9_START_ADDR()             bfin_read32(DMA9_START_ADDR)
-#define bfin_write_DMA9_START_ADDR(val)         bfin_write32(DMA9_START_ADDR)
+#define bfin_write_DMA9_START_ADDR(val)         bfin_write32(DMA9_START_ADDR, val)
 #define bfin_read_DMA9_CONFIG()                 bfin_read16(DMA9_CONFIG)
 #define bfin_write_DMA9_CONFIG(val)             bfin_write16(DMA9_CONFIG, val)
 #define bfin_read_DMA9_X_COUNT()                bfin_read16(DMA9_X_COUNT)
 #define bfin_write_DMA9_X_COUNT(val)            bfin_write16(DMA9_X_COUNT, val)
 #define bfin_read_DMA9_X_MODIFY()               bfin_read16(DMA9_X_MODIFY)
-#define bfin_write_DMA9_X_MODIFY(val)           bfin_write16(DMA9_X_MODIFY)
+#define bfin_write_DMA9_X_MODIFY(val)           bfin_write16(DMA9_X_MODIFY, val)
 #define bfin_read_DMA9_Y_COUNT()                bfin_read16(DMA9_Y_COUNT)
 #define bfin_write_DMA9_Y_COUNT(val)            bfin_write16(DMA9_Y_COUNT, val)
 #define bfin_read_DMA9_Y_MODIFY()               bfin_read16(DMA9_Y_MODIFY)
-#define bfin_write_DMA9_Y_MODIFY(val)           bfin_write16(DMA9_Y_MODIFY)
+#define bfin_write_DMA9_Y_MODIFY(val)           bfin_write16(DMA9_Y_MODIFY, val)
 #define bfin_read_DMA9_CURR_DESC_PTR()          bfin_read32(DMA9_CURR_DESC_PTR)
-#define bfin_write_DMA9_CURR_DESC_PTR(val)      bfin_write32(DMA9_CURR_DESC_PTR)
+#define bfin_write_DMA9_CURR_DESC_PTR(val)      bfin_write32(DMA9_CURR_DESC_PTR, val)
 #define bfin_read_DMA9_CURR_ADDR()              bfin_read32(DMA9_CURR_ADDR)
-#define bfin_write_DMA9_CURR_ADDR(val)          bfin_write32(DMA9_CURR_ADDR)
+#define bfin_write_DMA9_CURR_ADDR(val)          bfin_write32(DMA9_CURR_ADDR, val)
 #define bfin_read_DMA9_IRQ_STATUS()             bfin_read16(DMA9_IRQ_STATUS)
 #define bfin_write_DMA9_IRQ_STATUS(val)         bfin_write16(DMA9_IRQ_STATUS, val)
 #define bfin_read_DMA9_PERIPHERAL_MAP()         bfin_read16(DMA9_PERIPHERAL_MAP)
@@ -682,23 +678,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 10 Registers */
 
 #define bfin_read_DMA10_NEXT_DESC_PTR()         bfin_read32(DMA10_NEXT_DESC_PTR)
-#define bfin_write_DMA10_NEXT_DESC_PTR(val)     bfin_write32(DMA10_NEXT_DESC_PTR)
+#define bfin_write_DMA10_NEXT_DESC_PTR(val)     bfin_write32(DMA10_NEXT_DESC_PTR, val)
 #define bfin_read_DMA10_START_ADDR()            bfin_read32(DMA10_START_ADDR)
-#define bfin_write_DMA10_START_ADDR(val)        bfin_write32(DMA10_START_ADDR)
+#define bfin_write_DMA10_START_ADDR(val)        bfin_write32(DMA10_START_ADDR, val)
 #define bfin_read_DMA10_CONFIG()                bfin_read16(DMA10_CONFIG)
 #define bfin_write_DMA10_CONFIG(val)            bfin_write16(DMA10_CONFIG, val)
 #define bfin_read_DMA10_X_COUNT()               bfin_read16(DMA10_X_COUNT)
 #define bfin_write_DMA10_X_COUNT(val)           bfin_write16(DMA10_X_COUNT, val)
 #define bfin_read_DMA10_X_MODIFY()              bfin_read16(DMA10_X_MODIFY)
-#define bfin_write_DMA10_X_MODIFY(val)          bfin_write16(DMA10_X_MODIFY)
+#define bfin_write_DMA10_X_MODIFY(val)          bfin_write16(DMA10_X_MODIFY, val)
 #define bfin_read_DMA10_Y_COUNT()               bfin_read16(DMA10_Y_COUNT)
 #define bfin_write_DMA10_Y_COUNT(val)           bfin_write16(DMA10_Y_COUNT, val)
 #define bfin_read_DMA10_Y_MODIFY()              bfin_read16(DMA10_Y_MODIFY)
-#define bfin_write_DMA10_Y_MODIFY(val)          bfin_write16(DMA10_Y_MODIFY)
+#define bfin_write_DMA10_Y_MODIFY(val)          bfin_write16(DMA10_Y_MODIFY, val)
 #define bfin_read_DMA10_CURR_DESC_PTR()         bfin_read32(DMA10_CURR_DESC_PTR)
-#define bfin_write_DMA10_CURR_DESC_PTR(val)     bfin_write32(DMA10_CURR_DESC_PTR)
+#define bfin_write_DMA10_CURR_DESC_PTR(val)     bfin_write32(DMA10_CURR_DESC_PTR, val)
 #define bfin_read_DMA10_CURR_ADDR()             bfin_read32(DMA10_CURR_ADDR)
-#define bfin_write_DMA10_CURR_ADDR(val)         bfin_write32(DMA10_CURR_ADDR)
+#define bfin_write_DMA10_CURR_ADDR(val)         bfin_write32(DMA10_CURR_ADDR, val)
 #define bfin_read_DMA10_IRQ_STATUS()            bfin_read16(DMA10_IRQ_STATUS)
 #define bfin_write_DMA10_IRQ_STATUS(val)        bfin_write16(DMA10_IRQ_STATUS, val)
 #define bfin_read_DMA10_PERIPHERAL_MAP()        bfin_read16(DMA10_PERIPHERAL_MAP)
@@ -711,23 +707,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 11 Registers */
 
 #define bfin_read_DMA11_NEXT_DESC_PTR()         bfin_read32(DMA11_NEXT_DESC_PTR)
-#define bfin_write_DMA11_NEXT_DESC_PTR(val)     bfin_write32(DMA11_NEXT_DESC_PTR)
+#define bfin_write_DMA11_NEXT_DESC_PTR(val)     bfin_write32(DMA11_NEXT_DESC_PTR, val)
 #define bfin_read_DMA11_START_ADDR()            bfin_read32(DMA11_START_ADDR)
-#define bfin_write_DMA11_START_ADDR(val)        bfin_write32(DMA11_START_ADDR)
+#define bfin_write_DMA11_START_ADDR(val)        bfin_write32(DMA11_START_ADDR, val)
 #define bfin_read_DMA11_CONFIG()                bfin_read16(DMA11_CONFIG)
 #define bfin_write_DMA11_CONFIG(val)            bfin_write16(DMA11_CONFIG, val)
 #define bfin_read_DMA11_X_COUNT()               bfin_read16(DMA11_X_COUNT)
 #define bfin_write_DMA11_X_COUNT(val)           bfin_write16(DMA11_X_COUNT, val)
 #define bfin_read_DMA11_X_MODIFY()              bfin_read16(DMA11_X_MODIFY)
-#define bfin_write_DMA11_X_MODIFY(val)          bfin_write16(DMA11_X_MODIFY)
+#define bfin_write_DMA11_X_MODIFY(val)          bfin_write16(DMA11_X_MODIFY, val)
 #define bfin_read_DMA11_Y_COUNT()               bfin_read16(DMA11_Y_COUNT)
 #define bfin_write_DMA11_Y_COUNT(val)           bfin_write16(DMA11_Y_COUNT, val)
 #define bfin_read_DMA11_Y_MODIFY()              bfin_read16(DMA11_Y_MODIFY)
-#define bfin_write_DMA11_Y_MODIFY(val)          bfin_write16(DMA11_Y_MODIFY)
+#define bfin_write_DMA11_Y_MODIFY(val)          bfin_write16(DMA11_Y_MODIFY, val)
 #define bfin_read_DMA11_CURR_DESC_PTR()         bfin_read32(DMA11_CURR_DESC_PTR)
-#define bfin_write_DMA11_CURR_DESC_PTR(val)     bfin_write32(DMA11_CURR_DESC_PTR)
+#define bfin_write_DMA11_CURR_DESC_PTR(val)     bfin_write32(DMA11_CURR_DESC_PTR, val)
 #define bfin_read_DMA11_CURR_ADDR()             bfin_read32(DMA11_CURR_ADDR)
-#define bfin_write_DMA11_CURR_ADDR(val)         bfin_write32(DMA11_CURR_ADDR)
+#define bfin_write_DMA11_CURR_ADDR(val)         bfin_write32(DMA11_CURR_ADDR, val)
 #define bfin_read_DMA11_IRQ_STATUS()            bfin_read16(DMA11_IRQ_STATUS)
 #define bfin_write_DMA11_IRQ_STATUS(val)        bfin_write16(DMA11_IRQ_STATUS, val)
 #define bfin_read_DMA11_PERIPHERAL_MAP()        bfin_read16(DMA11_PERIPHERAL_MAP)
@@ -740,7 +736,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* MDMA Stream 0 Registers */
 
 #define bfin_read_MDMA_D0_NEXT_DESC_PTR()       bfin_read32(MDMA_D0_NEXT_DESC_PTR)
-#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D0_NEXT_DESC_PTR)
+#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
 #define bfin_read_MDMA_D0_START_ADDR()          bfin_read32(MDMA_D0_START_ADDR)
 #define bfin_write_MDMA_D0_START_ADDR(val)      bfin_write32(MDMA_D0_START_ADDR, val)
 #define bfin_read_MDMA_D0_CONFIG()              bfin_read16(MDMA_D0_CONFIG)
@@ -803,11 +799,11 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_MDMA_D1_X_COUNT()             bfin_read16(MDMA_D1_X_COUNT)
 #define bfin_write_MDMA_D1_X_COUNT(val)         bfin_write16(MDMA_D1_X_COUNT, val)
 #define bfin_read_MDMA_D1_X_MODIFY()            bfin_read16(MDMA_D1_X_MODIFY)
-#define bfin_write_MDMA_D1_X_MODIFY(val)        bfin_write16(MDMA_D1_X_MODIFY)
+#define bfin_write_MDMA_D1_X_MODIFY(val)        bfin_write16(MDMA_D1_X_MODIFY, val)
 #define bfin_read_MDMA_D1_Y_COUNT()             bfin_read16(MDMA_D1_Y_COUNT)
 #define bfin_write_MDMA_D1_Y_COUNT(val)         bfin_write16(MDMA_D1_Y_COUNT, val)
 #define bfin_read_MDMA_D1_Y_MODIFY()            bfin_read16(MDMA_D1_Y_MODIFY)
-#define bfin_write_MDMA_D1_Y_MODIFY(val)        bfin_write16(MDMA_D1_Y_MODIFY)
+#define bfin_write_MDMA_D1_Y_MODIFY(val)        bfin_write16(MDMA_D1_Y_MODIFY, val)
 #define bfin_read_MDMA_D1_CURR_DESC_PTR()       bfin_read32(MDMA_D1_CURR_DESC_PTR)
 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val)   bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_D1_CURR_ADDR()           bfin_read32(MDMA_D1_CURR_ADDR)
@@ -829,11 +825,11 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_MDMA_S1_X_COUNT()             bfin_read16(MDMA_S1_X_COUNT)
 #define bfin_write_MDMA_S1_X_COUNT(val)         bfin_write16(MDMA_S1_X_COUNT, val)
 #define bfin_read_MDMA_S1_X_MODIFY()            bfin_read16(MDMA_S1_X_MODIFY)
-#define bfin_write_MDMA_S1_X_MODIFY(val)        bfin_write16(MDMA_S1_X_MODIFY)
+#define bfin_write_MDMA_S1_X_MODIFY(val)        bfin_write16(MDMA_S1_X_MODIFY, val)
 #define bfin_read_MDMA_S1_Y_COUNT()             bfin_read16(MDMA_S1_Y_COUNT)
 #define bfin_write_MDMA_S1_Y_COUNT(val)         bfin_write16(MDMA_S1_Y_COUNT, val)
 #define bfin_read_MDMA_S1_Y_MODIFY()            bfin_read16(MDMA_S1_Y_MODIFY)
-#define bfin_write_MDMA_S1_Y_MODIFY(val)        bfin_write16(MDMA_S1_Y_MODIFY)
+#define bfin_write_MDMA_S1_Y_MODIFY(val)        bfin_write16(MDMA_S1_Y_MODIFY, val)
 #define bfin_read_MDMA_S1_CURR_DESC_PTR()       bfin_read32(MDMA_S1_CURR_DESC_PTR)
 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val)   bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_S1_CURR_ADDR()           bfin_read32(MDMA_S1_CURR_ADDR)
@@ -1246,23 +1242,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 12 Registers */
 
 #define bfin_read_DMA12_NEXT_DESC_PTR()         bfin_read32(DMA12_NEXT_DESC_PTR)
-#define bfin_write_DMA12_NEXT_DESC_PTR(val)     bfin_write32(DMA12_NEXT_DESC_PTR)
+#define bfin_write_DMA12_NEXT_DESC_PTR(val)     bfin_write32(DMA12_NEXT_DESC_PTR, val)
 #define bfin_read_DMA12_START_ADDR()            bfin_read32(DMA12_START_ADDR)
-#define bfin_write_DMA12_START_ADDR(val)        bfin_write32(DMA12_START_ADDR)
+#define bfin_write_DMA12_START_ADDR(val)        bfin_write32(DMA12_START_ADDR, val)
 #define bfin_read_DMA12_CONFIG()                bfin_read16(DMA12_CONFIG)
 #define bfin_write_DMA12_CONFIG(val)            bfin_write16(DMA12_CONFIG, val)
 #define bfin_read_DMA12_X_COUNT()               bfin_read16(DMA12_X_COUNT)
 #define bfin_write_DMA12_X_COUNT(val)           bfin_write16(DMA12_X_COUNT, val)
 #define bfin_read_DMA12_X_MODIFY()              bfin_read16(DMA12_X_MODIFY)
-#define bfin_write_DMA12_X_MODIFY(val)          bfin_write16(DMA12_X_MODIFY)
+#define bfin_write_DMA12_X_MODIFY(val)          bfin_write16(DMA12_X_MODIFY, val)
 #define bfin_read_DMA12_Y_COUNT()               bfin_read16(DMA12_Y_COUNT)
 #define bfin_write_DMA12_Y_COUNT(val)           bfin_write16(DMA12_Y_COUNT, val)
 #define bfin_read_DMA12_Y_MODIFY()              bfin_read16(DMA12_Y_MODIFY)
-#define bfin_write_DMA12_Y_MODIFY(val)          bfin_write16(DMA12_Y_MODIFY)
+#define bfin_write_DMA12_Y_MODIFY(val)          bfin_write16(DMA12_Y_MODIFY, val)
 #define bfin_read_DMA12_CURR_DESC_PTR()         bfin_read32(DMA12_CURR_DESC_PTR)
-#define bfin_write_DMA12_CURR_DESC_PTR(val)     bfin_write32(DMA12_CURR_DESC_PTR)
+#define bfin_write_DMA12_CURR_DESC_PTR(val)     bfin_write32(DMA12_CURR_DESC_PTR, val)
 #define bfin_read_DMA12_CURR_ADDR()             bfin_read32(DMA12_CURR_ADDR)
-#define bfin_write_DMA12_CURR_ADDR(val)         bfin_write32(DMA12_CURR_ADDR)
+#define bfin_write_DMA12_CURR_ADDR(val)         bfin_write32(DMA12_CURR_ADDR, val)
 #define bfin_read_DMA12_IRQ_STATUS()            bfin_read16(DMA12_IRQ_STATUS)
 #define bfin_write_DMA12_IRQ_STATUS(val)        bfin_write16(DMA12_IRQ_STATUS, val)
 #define bfin_read_DMA12_PERIPHERAL_MAP()        bfin_read16(DMA12_PERIPHERAL_MAP)
@@ -1275,23 +1271,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 13 Registers */
 
 #define bfin_read_DMA13_NEXT_DESC_PTR()         bfin_read32(DMA13_NEXT_DESC_PTR)
-#define bfin_write_DMA13_NEXT_DESC_PTR(val)     bfin_write32(DMA13_NEXT_DESC_PTR)
+#define bfin_write_DMA13_NEXT_DESC_PTR(val)     bfin_write32(DMA13_NEXT_DESC_PTR, val)
 #define bfin_read_DMA13_START_ADDR()            bfin_read32(DMA13_START_ADDR)
-#define bfin_write_DMA13_START_ADDR(val)        bfin_write32(DMA13_START_ADDR)
+#define bfin_write_DMA13_START_ADDR(val)        bfin_write32(DMA13_START_ADDR, val)
 #define bfin_read_DMA13_CONFIG()                bfin_read16(DMA13_CONFIG)
 #define bfin_write_DMA13_CONFIG(val)            bfin_write16(DMA13_CONFIG, val)
 #define bfin_read_DMA13_X_COUNT()               bfin_read16(DMA13_X_COUNT)
 #define bfin_write_DMA13_X_COUNT(val)           bfin_write16(DMA13_X_COUNT, val)
 #define bfin_read_DMA13_X_MODIFY()              bfin_read16(DMA13_X_MODIFY)
-#define bfin_write_DMA13_X_MODIFY(val)          bfin_write16(DMA13_X_MODIFY)
+#define bfin_write_DMA13_X_MODIFY(val)          bfin_write16(DMA13_X_MODIFY, val)
 #define bfin_read_DMA13_Y_COUNT()               bfin_read16(DMA13_Y_COUNT)
 #define bfin_write_DMA13_Y_COUNT(val)           bfin_write16(DMA13_Y_COUNT, val)
 #define bfin_read_DMA13_Y_MODIFY()              bfin_read16(DMA13_Y_MODIFY)
-#define bfin_write_DMA13_Y_MODIFY(val)          bfin_write16(DMA13_Y_MODIFY)
+#define bfin_write_DMA13_Y_MODIFY(val)          bfin_write16(DMA13_Y_MODIFY, val)
 #define bfin_read_DMA13_CURR_DESC_PTR()         bfin_read32(DMA13_CURR_DESC_PTR)
-#define bfin_write_DMA13_CURR_DESC_PTR(val)     bfin_write32(DMA13_CURR_DESC_PTR)
+#define bfin_write_DMA13_CURR_DESC_PTR(val)     bfin_write32(DMA13_CURR_DESC_PTR, val)
 #define bfin_read_DMA13_CURR_ADDR()             bfin_read32(DMA13_CURR_ADDR)
-#define bfin_write_DMA13_CURR_ADDR(val)         bfin_write32(DMA13_CURR_ADDR)
+#define bfin_write_DMA13_CURR_ADDR(val)         bfin_write32(DMA13_CURR_ADDR, val)
 #define bfin_read_DMA13_IRQ_STATUS()            bfin_read16(DMA13_IRQ_STATUS)
 #define bfin_write_DMA13_IRQ_STATUS(val)        bfin_write16(DMA13_IRQ_STATUS, val)
 #define bfin_read_DMA13_PERIPHERAL_MAP()        bfin_read16(DMA13_PERIPHERAL_MAP)
@@ -1304,23 +1300,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 14 Registers */
 
 #define bfin_read_DMA14_NEXT_DESC_PTR()         bfin_read32(DMA14_NEXT_DESC_PTR)
-#define bfin_write_DMA14_NEXT_DESC_PTR(val)     bfin_write32(DMA14_NEXT_DESC_PTR)
+#define bfin_write_DMA14_NEXT_DESC_PTR(val)     bfin_write32(DMA14_NEXT_DESC_PTR, val)
 #define bfin_read_DMA14_START_ADDR()            bfin_read32(DMA14_START_ADDR)
-#define bfin_write_DMA14_START_ADDR(val)        bfin_write32(DMA14_START_ADDR)
+#define bfin_write_DMA14_START_ADDR(val)        bfin_write32(DMA14_START_ADDR, val)
 #define bfin_read_DMA14_CONFIG()                bfin_read16(DMA14_CONFIG)
 #define bfin_write_DMA14_CONFIG(val)            bfin_write16(DMA14_CONFIG, val)
 #define bfin_read_DMA14_X_COUNT()               bfin_read16(DMA14_X_COUNT)
 #define bfin_write_DMA14_X_COUNT(val)           bfin_write16(DMA14_X_COUNT, val)
 #define bfin_read_DMA14_X_MODIFY()              bfin_read16(DMA14_X_MODIFY)
-#define bfin_write_DMA14_X_MODIFY(val)          bfin_write16(DMA14_X_MODIFY)
+#define bfin_write_DMA14_X_MODIFY(val)          bfin_write16(DMA14_X_MODIFY, val)
 #define bfin_read_DMA14_Y_COUNT()               bfin_read16(DMA14_Y_COUNT)
 #define bfin_write_DMA14_Y_COUNT(val)           bfin_write16(DMA14_Y_COUNT, val)
 #define bfin_read_DMA14_Y_MODIFY()              bfin_read16(DMA14_Y_MODIFY)
-#define bfin_write_DMA14_Y_MODIFY(val)          bfin_write16(DMA14_Y_MODIFY)
+#define bfin_write_DMA14_Y_MODIFY(val)          bfin_write16(DMA14_Y_MODIFY, val)
 #define bfin_read_DMA14_CURR_DESC_PTR()         bfin_read32(DMA14_CURR_DESC_PTR)
-#define bfin_write_DMA14_CURR_DESC_PTR(val)     bfin_write32(DMA14_CURR_DESC_PTR)
+#define bfin_write_DMA14_CURR_DESC_PTR(val)     bfin_write32(DMA14_CURR_DESC_PTR, val)
 #define bfin_read_DMA14_CURR_ADDR()             bfin_read32(DMA14_CURR_ADDR)
-#define bfin_write_DMA14_CURR_ADDR(val)         bfin_write32(DMA14_CURR_ADDR)
+#define bfin_write_DMA14_CURR_ADDR(val)         bfin_write32(DMA14_CURR_ADDR, val)
 #define bfin_read_DMA14_IRQ_STATUS()            bfin_read16(DMA14_IRQ_STATUS)
 #define bfin_write_DMA14_IRQ_STATUS(val)        bfin_write16(DMA14_IRQ_STATUS, val)
 #define bfin_read_DMA14_PERIPHERAL_MAP()        bfin_read16(DMA14_PERIPHERAL_MAP)
@@ -1333,23 +1329,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 15 Registers */
 
 #define bfin_read_DMA15_NEXT_DESC_PTR()         bfin_read32(DMA15_NEXT_DESC_PTR)
-#define bfin_write_DMA15_NEXT_DESC_PTR(val)     bfin_write32(DMA15_NEXT_DESC_PTR)
+#define bfin_write_DMA15_NEXT_DESC_PTR(val)     bfin_write32(DMA15_NEXT_DESC_PTR, val)
 #define bfin_read_DMA15_START_ADDR()            bfin_read32(DMA15_START_ADDR)
-#define bfin_write_DMA15_START_ADDR(val)        bfin_write32(DMA15_START_ADDR)
+#define bfin_write_DMA15_START_ADDR(val)        bfin_write32(DMA15_START_ADDR, val)
 #define bfin_read_DMA15_CONFIG()                bfin_read16(DMA15_CONFIG)
 #define bfin_write_DMA15_CONFIG(val)            bfin_write16(DMA15_CONFIG, val)
 #define bfin_read_DMA15_X_COUNT()               bfin_read16(DMA15_X_COUNT)
 #define bfin_write_DMA15_X_COUNT(val)           bfin_write16(DMA15_X_COUNT, val)
 #define bfin_read_DMA15_X_MODIFY()              bfin_read16(DMA15_X_MODIFY)
-#define bfin_write_DMA15_X_MODIFY(val)          bfin_write16(DMA15_X_MODIFY)
+#define bfin_write_DMA15_X_MODIFY(val)          bfin_write16(DMA15_X_MODIFY, val)
 #define bfin_read_DMA15_Y_COUNT()               bfin_read16(DMA15_Y_COUNT)
 #define bfin_write_DMA15_Y_COUNT(val)           bfin_write16(DMA15_Y_COUNT, val)
 #define bfin_read_DMA15_Y_MODIFY()              bfin_read16(DMA15_Y_MODIFY)
-#define bfin_write_DMA15_Y_MODIFY(val)          bfin_write16(DMA15_Y_MODIFY)
+#define bfin_write_DMA15_Y_MODIFY(val)          bfin_write16(DMA15_Y_MODIFY, val)
 #define bfin_read_DMA15_CURR_DESC_PTR()         bfin_read32(DMA15_CURR_DESC_PTR)
-#define bfin_write_DMA15_CURR_DESC_PTR(val)     bfin_write32(DMA15_CURR_DESC_PTR)
+#define bfin_write_DMA15_CURR_DESC_PTR(val)     bfin_write32(DMA15_CURR_DESC_PTR, val)
 #define bfin_read_DMA15_CURR_ADDR()             bfin_read32(DMA15_CURR_ADDR)
-#define bfin_write_DMA15_CURR_ADDR(val)         bfin_write32(DMA15_CURR_ADDR)
+#define bfin_write_DMA15_CURR_ADDR(val)         bfin_write32(DMA15_CURR_ADDR, val)
 #define bfin_read_DMA15_IRQ_STATUS()            bfin_read16(DMA15_IRQ_STATUS)
 #define bfin_write_DMA15_IRQ_STATUS(val)        bfin_write16(DMA15_IRQ_STATUS, val)
 #define bfin_read_DMA15_PERIPHERAL_MAP()        bfin_read16(DMA15_PERIPHERAL_MAP)
@@ -1362,23 +1358,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 16 Registers */
 
 #define bfin_read_DMA16_NEXT_DESC_PTR()         bfin_read32(DMA16_NEXT_DESC_PTR)
-#define bfin_write_DMA16_NEXT_DESC_PTR(val)     bfin_write32(DMA16_NEXT_DESC_PTR)
+#define bfin_write_DMA16_NEXT_DESC_PTR(val)     bfin_write32(DMA16_NEXT_DESC_PTR, val)
 #define bfin_read_DMA16_START_ADDR()            bfin_read32(DMA16_START_ADDR)
-#define bfin_write_DMA16_START_ADDR(val)        bfin_write32(DMA16_START_ADDR)
+#define bfin_write_DMA16_START_ADDR(val)        bfin_write32(DMA16_START_ADDR, val)
 #define bfin_read_DMA16_CONFIG()                bfin_read16(DMA16_CONFIG)
 #define bfin_write_DMA16_CONFIG(val)            bfin_write16(DMA16_CONFIG, val)
 #define bfin_read_DMA16_X_COUNT()               bfin_read16(DMA16_X_COUNT)
 #define bfin_write_DMA16_X_COUNT(val)           bfin_write16(DMA16_X_COUNT, val)
 #define bfin_read_DMA16_X_MODIFY()              bfin_read16(DMA16_X_MODIFY)
-#define bfin_write_DMA16_X_MODIFY(val)          bfin_write16(DMA16_X_MODIFY)
+#define bfin_write_DMA16_X_MODIFY(val)          bfin_write16(DMA16_X_MODIFY, val)
 #define bfin_read_DMA16_Y_COUNT()               bfin_read16(DMA16_Y_COUNT)
 #define bfin_write_DMA16_Y_COUNT(val)           bfin_write16(DMA16_Y_COUNT, val)
 #define bfin_read_DMA16_Y_MODIFY()              bfin_read16(DMA16_Y_MODIFY)
-#define bfin_write_DMA16_Y_MODIFY(val)          bfin_write16(DMA16_Y_MODIFY)
+#define bfin_write_DMA16_Y_MODIFY(val)          bfin_write16(DMA16_Y_MODIFY, val)
 #define bfin_read_DMA16_CURR_DESC_PTR()         bfin_read32(DMA16_CURR_DESC_PTR)
-#define bfin_write_DMA16_CURR_DESC_PTR(val)     bfin_write32(DMA16_CURR_DESC_PTR)
+#define bfin_write_DMA16_CURR_DESC_PTR(val)     bfin_write32(DMA16_CURR_DESC_PTR, val)
 #define bfin_read_DMA16_CURR_ADDR()             bfin_read32(DMA16_CURR_ADDR)
-#define bfin_write_DMA16_CURR_ADDR(val)         bfin_write32(DMA16_CURR_ADDR)
+#define bfin_write_DMA16_CURR_ADDR(val)         bfin_write32(DMA16_CURR_ADDR, val)
 #define bfin_read_DMA16_IRQ_STATUS()            bfin_read16(DMA16_IRQ_STATUS)
 #define bfin_write_DMA16_IRQ_STATUS(val)        bfin_write16(DMA16_IRQ_STATUS, val)
 #define bfin_read_DMA16_PERIPHERAL_MAP()        bfin_read16(DMA16_PERIPHERAL_MAP)
@@ -1391,23 +1387,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 17 Registers */
 
 #define bfin_read_DMA17_NEXT_DESC_PTR()         bfin_read32(DMA17_NEXT_DESC_PTR)
-#define bfin_write_DMA17_NEXT_DESC_PTR(val)     bfin_write32(DMA17_NEXT_DESC_PTR)
+#define bfin_write_DMA17_NEXT_DESC_PTR(val)     bfin_write32(DMA17_NEXT_DESC_PTR, val)
 #define bfin_read_DMA17_START_ADDR()            bfin_read32(DMA17_START_ADDR)
-#define bfin_write_DMA17_START_ADDR(val)        bfin_write32(DMA17_START_ADDR)
+#define bfin_write_DMA17_START_ADDR(val)        bfin_write32(DMA17_START_ADDR, val)
 #define bfin_read_DMA17_CONFIG()                bfin_read16(DMA17_CONFIG)
 #define bfin_write_DMA17_CONFIG(val)            bfin_write16(DMA17_CONFIG, val)
 #define bfin_read_DMA17_X_COUNT()               bfin_read16(DMA17_X_COUNT)
 #define bfin_write_DMA17_X_COUNT(val)           bfin_write16(DMA17_X_COUNT, val)
 #define bfin_read_DMA17_X_MODIFY()              bfin_read16(DMA17_X_MODIFY)
-#define bfin_write_DMA17_X_MODIFY(val)          bfin_write16(DMA17_X_MODIFY)
+#define bfin_write_DMA17_X_MODIFY(val)          bfin_write16(DMA17_X_MODIFY, val)
 #define bfin_read_DMA17_Y_COUNT()               bfin_read16(DMA17_Y_COUNT)
 #define bfin_write_DMA17_Y_COUNT(val)           bfin_write16(DMA17_Y_COUNT, val)
 #define bfin_read_DMA17_Y_MODIFY()              bfin_read16(DMA17_Y_MODIFY)
-#define bfin_write_DMA17_Y_MODIFY(val)          bfin_write16(DMA17_Y_MODIFY)
+#define bfin_write_DMA17_Y_MODIFY(val)          bfin_write16(DMA17_Y_MODIFY, val)
 #define bfin_read_DMA17_CURR_DESC_PTR()         bfin_read32(DMA17_CURR_DESC_PTR)
-#define bfin_write_DMA17_CURR_DESC_PTR(val)     bfin_write32(DMA17_CURR_DESC_PTR)
+#define bfin_write_DMA17_CURR_DESC_PTR(val)     bfin_write32(DMA17_CURR_DESC_PTR, val)
 #define bfin_read_DMA17_CURR_ADDR()             bfin_read32(DMA17_CURR_ADDR)
-#define bfin_write_DMA17_CURR_ADDR(val)         bfin_write32(DMA17_CURR_ADDR)
+#define bfin_write_DMA17_CURR_ADDR(val)         bfin_write32(DMA17_CURR_ADDR, val)
 #define bfin_read_DMA17_IRQ_STATUS()            bfin_read16(DMA17_IRQ_STATUS)
 #define bfin_write_DMA17_IRQ_STATUS(val)        bfin_write16(DMA17_IRQ_STATUS, val)
 #define bfin_read_DMA17_PERIPHERAL_MAP()        bfin_read16(DMA17_PERIPHERAL_MAP)
@@ -1420,23 +1416,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 18 Registers */
 
 #define bfin_read_DMA18_NEXT_DESC_PTR()         bfin_read32(DMA18_NEXT_DESC_PTR)
-#define bfin_write_DMA18_NEXT_DESC_PTR(val)     bfin_write32(DMA18_NEXT_DESC_PTR)
+#define bfin_write_DMA18_NEXT_DESC_PTR(val)     bfin_write32(DMA18_NEXT_DESC_PTR, val)
 #define bfin_read_DMA18_START_ADDR()            bfin_read32(DMA18_START_ADDR)
-#define bfin_write_DMA18_START_ADDR(val)        bfin_write32(DMA18_START_ADDR)
+#define bfin_write_DMA18_START_ADDR(val)        bfin_write32(DMA18_START_ADDR, val)
 #define bfin_read_DMA18_CONFIG()                bfin_read16(DMA18_CONFIG)
 #define bfin_write_DMA18_CONFIG(val)            bfin_write16(DMA18_CONFIG, val)
 #define bfin_read_DMA18_X_COUNT()               bfin_read16(DMA18_X_COUNT)
 #define bfin_write_DMA18_X_COUNT(val)           bfin_write16(DMA18_X_COUNT, val)
 #define bfin_read_DMA18_X_MODIFY()              bfin_read16(DMA18_X_MODIFY)
-#define bfin_write_DMA18_X_MODIFY(val)          bfin_write16(DMA18_X_MODIFY)
+#define bfin_write_DMA18_X_MODIFY(val)          bfin_write16(DMA18_X_MODIFY, val)
 #define bfin_read_DMA18_Y_COUNT()               bfin_read16(DMA18_Y_COUNT)
 #define bfin_write_DMA18_Y_COUNT(val)           bfin_write16(DMA18_Y_COUNT, val)
 #define bfin_read_DMA18_Y_MODIFY()              bfin_read16(DMA18_Y_MODIFY)
-#define bfin_write_DMA18_Y_MODIFY(val)          bfin_write16(DMA18_Y_MODIFY)
+#define bfin_write_DMA18_Y_MODIFY(val)          bfin_write16(DMA18_Y_MODIFY, val)
 #define bfin_read_DMA18_CURR_DESC_PTR()         bfin_read32(DMA18_CURR_DESC_PTR)
-#define bfin_write_DMA18_CURR_DESC_PTR(val)     bfin_write32(DMA18_CURR_DESC_PTR)
+#define bfin_write_DMA18_CURR_DESC_PTR(val)     bfin_write32(DMA18_CURR_DESC_PTR, val)
 #define bfin_read_DMA18_CURR_ADDR()             bfin_read32(DMA18_CURR_ADDR)
-#define bfin_write_DMA18_CURR_ADDR(val)         bfin_write32(DMA18_CURR_ADDR)
+#define bfin_write_DMA18_CURR_ADDR(val)         bfin_write32(DMA18_CURR_ADDR, val)
 #define bfin_read_DMA18_IRQ_STATUS()            bfin_read16(DMA18_IRQ_STATUS)
 #define bfin_write_DMA18_IRQ_STATUS(val)        bfin_write16(DMA18_IRQ_STATUS, val)
 #define bfin_read_DMA18_PERIPHERAL_MAP()        bfin_read16(DMA18_PERIPHERAL_MAP)
@@ -1449,23 +1445,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 19 Registers */
 
 #define bfin_read_DMA19_NEXT_DESC_PTR()         bfin_read32(DMA19_NEXT_DESC_PTR)
-#define bfin_write_DMA19_NEXT_DESC_PTR(val)     bfin_write32(DMA19_NEXT_DESC_PTR)
+#define bfin_write_DMA19_NEXT_DESC_PTR(val)     bfin_write32(DMA19_NEXT_DESC_PTR, val)
 #define bfin_read_DMA19_START_ADDR()            bfin_read32(DMA19_START_ADDR)
-#define bfin_write_DMA19_START_ADDR(val)        bfin_write32(DMA19_START_ADDR)
+#define bfin_write_DMA19_START_ADDR(val)        bfin_write32(DMA19_START_ADDR, val)
 #define bfin_read_DMA19_CONFIG()                bfin_read16(DMA19_CONFIG)
 #define bfin_write_DMA19_CONFIG(val)            bfin_write16(DMA19_CONFIG, val)
 #define bfin_read_DMA19_X_COUNT()               bfin_read16(DMA19_X_COUNT)
 #define bfin_write_DMA19_X_COUNT(val)           bfin_write16(DMA19_X_COUNT, val)
 #define bfin_read_DMA19_X_MODIFY()              bfin_read16(DMA19_X_MODIFY)
-#define bfin_write_DMA19_X_MODIFY(val)          bfin_write16(DMA19_X_MODIFY)
+#define bfin_write_DMA19_X_MODIFY(val)          bfin_write16(DMA19_X_MODIFY, val)
 #define bfin_read_DMA19_Y_COUNT()               bfin_read16(DMA19_Y_COUNT)
 #define bfin_write_DMA19_Y_COUNT(val)           bfin_write16(DMA19_Y_COUNT, val)
 #define bfin_read_DMA19_Y_MODIFY()              bfin_read16(DMA19_Y_MODIFY)
-#define bfin_write_DMA19_Y_MODIFY(val)          bfin_write16(DMA19_Y_MODIFY)
+#define bfin_write_DMA19_Y_MODIFY(val)          bfin_write16(DMA19_Y_MODIFY, val)
 #define bfin_read_DMA19_CURR_DESC_PTR()         bfin_read32(DMA19_CURR_DESC_PTR)
-#define bfin_write_DMA19_CURR_DESC_PTR(val)     bfin_write32(DMA19_CURR_DESC_PTR)
+#define bfin_write_DMA19_CURR_DESC_PTR(val)     bfin_write32(DMA19_CURR_DESC_PTR, val)
 #define bfin_read_DMA19_CURR_ADDR()             bfin_read32(DMA19_CURR_ADDR)
-#define bfin_write_DMA19_CURR_ADDR(val)         bfin_write32(DMA19_CURR_ADDR)
+#define bfin_write_DMA19_CURR_ADDR(val)         bfin_write32(DMA19_CURR_ADDR, val)
 #define bfin_read_DMA19_IRQ_STATUS()            bfin_read16(DMA19_IRQ_STATUS)
 #define bfin_write_DMA19_IRQ_STATUS(val)        bfin_write16(DMA19_IRQ_STATUS, val)
 #define bfin_read_DMA19_PERIPHERAL_MAP()        bfin_read16(DMA19_PERIPHERAL_MAP)
@@ -1478,23 +1474,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 20 Registers */
 
 #define bfin_read_DMA20_NEXT_DESC_PTR()         bfin_read32(DMA20_NEXT_DESC_PTR)
-#define bfin_write_DMA20_NEXT_DESC_PTR(val)     bfin_write32(DMA20_NEXT_DESC_PTR)
+#define bfin_write_DMA20_NEXT_DESC_PTR(val)     bfin_write32(DMA20_NEXT_DESC_PTR, val)
 #define bfin_read_DMA20_START_ADDR()            bfin_read32(DMA20_START_ADDR)
-#define bfin_write_DMA20_START_ADDR(val)        bfin_write32(DMA20_START_ADDR)
+#define bfin_write_DMA20_START_ADDR(val)        bfin_write32(DMA20_START_ADDR, val)
 #define bfin_read_DMA20_CONFIG()                bfin_read16(DMA20_CONFIG)
 #define bfin_write_DMA20_CONFIG(val)            bfin_write16(DMA20_CONFIG, val)
 #define bfin_read_DMA20_X_COUNT()               bfin_read16(DMA20_X_COUNT)
 #define bfin_write_DMA20_X_COUNT(val)           bfin_write16(DMA20_X_COUNT, val)
 #define bfin_read_DMA20_X_MODIFY()              bfin_read16(DMA20_X_MODIFY)
-#define bfin_write_DMA20_X_MODIFY(val)          bfin_write16(DMA20_X_MODIFY)
+#define bfin_write_DMA20_X_MODIFY(val)          bfin_write16(DMA20_X_MODIFY, val)
 #define bfin_read_DMA20_Y_COUNT()               bfin_read16(DMA20_Y_COUNT)
 #define bfin_write_DMA20_Y_COUNT(val)           bfin_write16(DMA20_Y_COUNT, val)
 #define bfin_read_DMA20_Y_MODIFY()              bfin_read16(DMA20_Y_MODIFY)
-#define bfin_write_DMA20_Y_MODIFY(val)          bfin_write16(DMA20_Y_MODIFY)
+#define bfin_write_DMA20_Y_MODIFY(val)          bfin_write16(DMA20_Y_MODIFY, val)
 #define bfin_read_DMA20_CURR_DESC_PTR()         bfin_read32(DMA20_CURR_DESC_PTR)
-#define bfin_write_DMA20_CURR_DESC_PTR(val)     bfin_write32(DMA20_CURR_DESC_PTR)
+#define bfin_write_DMA20_CURR_DESC_PTR(val)     bfin_write32(DMA20_CURR_DESC_PTR, val)
 #define bfin_read_DMA20_CURR_ADDR()             bfin_read32(DMA20_CURR_ADDR)
-#define bfin_write_DMA20_CURR_ADDR(val)         bfin_write32(DMA20_CURR_ADDR)
+#define bfin_write_DMA20_CURR_ADDR(val)         bfin_write32(DMA20_CURR_ADDR, val)
 #define bfin_read_DMA20_IRQ_STATUS()            bfin_read16(DMA20_IRQ_STATUS)
 #define bfin_write_DMA20_IRQ_STATUS(val)        bfin_write16(DMA20_IRQ_STATUS, val)
 #define bfin_read_DMA20_PERIPHERAL_MAP()        bfin_read16(DMA20_PERIPHERAL_MAP)
@@ -1507,23 +1503,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 21 Registers */
 
 #define bfin_read_DMA21_NEXT_DESC_PTR()         bfin_read32(DMA21_NEXT_DESC_PTR)
-#define bfin_write_DMA21_NEXT_DESC_PTR(val)     bfin_write32(DMA21_NEXT_DESC_PTR)
+#define bfin_write_DMA21_NEXT_DESC_PTR(val)     bfin_write32(DMA21_NEXT_DESC_PTR, val)
 #define bfin_read_DMA21_START_ADDR()            bfin_read32(DMA21_START_ADDR)
-#define bfin_write_DMA21_START_ADDR(val)        bfin_write32(DMA21_START_ADDR)
+#define bfin_write_DMA21_START_ADDR(val)        bfin_write32(DMA21_START_ADDR, val)
 #define bfin_read_DMA21_CONFIG()                bfin_read16(DMA21_CONFIG)
 #define bfin_write_DMA21_CONFIG(val)            bfin_write16(DMA21_CONFIG, val)
 #define bfin_read_DMA21_X_COUNT()               bfin_read16(DMA21_X_COUNT)
 #define bfin_write_DMA21_X_COUNT(val)           bfin_write16(DMA21_X_COUNT, val)
 #define bfin_read_DMA21_X_MODIFY()              bfin_read16(DMA21_X_MODIFY)
-#define bfin_write_DMA21_X_MODIFY(val)          bfin_write16(DMA21_X_MODIFY)
+#define bfin_write_DMA21_X_MODIFY(val)          bfin_write16(DMA21_X_MODIFY, val)
 #define bfin_read_DMA21_Y_COUNT()               bfin_read16(DMA21_Y_COUNT)
 #define bfin_write_DMA21_Y_COUNT(val)           bfin_write16(DMA21_Y_COUNT, val)
 #define bfin_read_DMA21_Y_MODIFY()              bfin_read16(DMA21_Y_MODIFY)
-#define bfin_write_DMA21_Y_MODIFY(val)          bfin_write16(DMA21_Y_MODIFY)
+#define bfin_write_DMA21_Y_MODIFY(val)          bfin_write16(DMA21_Y_MODIFY, val)
 #define bfin_read_DMA21_CURR_DESC_PTR()         bfin_read32(DMA21_CURR_DESC_PTR)
-#define bfin_write_DMA21_CURR_DESC_PTR(val)     bfin_write32(DMA21_CURR_DESC_PTR)
+#define bfin_write_DMA21_CURR_DESC_PTR(val)     bfin_write32(DMA21_CURR_DESC_PTR, val)
 #define bfin_read_DMA21_CURR_ADDR()             bfin_read32(DMA21_CURR_ADDR)
-#define bfin_write_DMA21_CURR_ADDR(val)         bfin_write32(DMA21_CURR_ADDR)
+#define bfin_write_DMA21_CURR_ADDR(val)         bfin_write32(DMA21_CURR_ADDR, val)
 #define bfin_read_DMA21_IRQ_STATUS()            bfin_read16(DMA21_IRQ_STATUS)
 #define bfin_write_DMA21_IRQ_STATUS(val)        bfin_write16(DMA21_IRQ_STATUS, val)
 #define bfin_read_DMA21_PERIPHERAL_MAP()        bfin_read16(DMA21_PERIPHERAL_MAP)
@@ -1536,23 +1532,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 22 Registers */
 
 #define bfin_read_DMA22_NEXT_DESC_PTR()         bfin_read32(DMA22_NEXT_DESC_PTR)
-#define bfin_write_DMA22_NEXT_DESC_PTR(val)     bfin_write32(DMA22_NEXT_DESC_PTR)
+#define bfin_write_DMA22_NEXT_DESC_PTR(val)     bfin_write32(DMA22_NEXT_DESC_PTR, val)
 #define bfin_read_DMA22_START_ADDR()            bfin_read32(DMA22_START_ADDR)
-#define bfin_write_DMA22_START_ADDR(val)        bfin_write32(DMA22_START_ADDR)
+#define bfin_write_DMA22_START_ADDR(val)        bfin_write32(DMA22_START_ADDR, val)
 #define bfin_read_DMA22_CONFIG()                bfin_read16(DMA22_CONFIG)
 #define bfin_write_DMA22_CONFIG(val)            bfin_write16(DMA22_CONFIG, val)
 #define bfin_read_DMA22_X_COUNT()               bfin_read16(DMA22_X_COUNT)
 #define bfin_write_DMA22_X_COUNT(val)           bfin_write16(DMA22_X_COUNT, val)
 #define bfin_read_DMA22_X_MODIFY()              bfin_read16(DMA22_X_MODIFY)
-#define bfin_write_DMA22_X_MODIFY(val)          bfin_write16(DMA22_X_MODIFY)
+#define bfin_write_DMA22_X_MODIFY(val)          bfin_write16(DMA22_X_MODIFY, val)
 #define bfin_read_DMA22_Y_COUNT()               bfin_read16(DMA22_Y_COUNT)
 #define bfin_write_DMA22_Y_COUNT(val)           bfin_write16(DMA22_Y_COUNT, val)
 #define bfin_read_DMA22_Y_MODIFY()              bfin_read16(DMA22_Y_MODIFY)
-#define bfin_write_DMA22_Y_MODIFY(val)          bfin_write16(DMA22_Y_MODIFY)
+#define bfin_write_DMA22_Y_MODIFY(val)          bfin_write16(DMA22_Y_MODIFY, val)
 #define bfin_read_DMA22_CURR_DESC_PTR()         bfin_read32(DMA22_CURR_DESC_PTR)
-#define bfin_write_DMA22_CURR_DESC_PTR(val)     bfin_write32(DMA22_CURR_DESC_PTR)
+#define bfin_write_DMA22_CURR_DESC_PTR(val)     bfin_write32(DMA22_CURR_DESC_PTR, val)
 #define bfin_read_DMA22_CURR_ADDR()             bfin_read32(DMA22_CURR_ADDR)
-#define bfin_write_DMA22_CURR_ADDR(val)         bfin_write32(DMA22_CURR_ADDR)
+#define bfin_write_DMA22_CURR_ADDR(val)         bfin_write32(DMA22_CURR_ADDR, val)
 #define bfin_read_DMA22_IRQ_STATUS()            bfin_read16(DMA22_IRQ_STATUS)
 #define bfin_write_DMA22_IRQ_STATUS(val)        bfin_write16(DMA22_IRQ_STATUS, val)
 #define bfin_read_DMA22_PERIPHERAL_MAP()        bfin_read16(DMA22_PERIPHERAL_MAP)
@@ -1565,23 +1561,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* DMA Channel 23 Registers */
 
 #define bfin_read_DMA23_NEXT_DESC_PTR()                 bfin_read32(DMA23_NEXT_DESC_PTR)
-#define bfin_write_DMA23_NEXT_DESC_PTR(val)             bfin_write32(DMA23_NEXT_DESC_PTR)
+#define bfin_write_DMA23_NEXT_DESC_PTR(val)             bfin_write32(DMA23_NEXT_DESC_PTR, val)
 #define bfin_read_DMA23_START_ADDR()                    bfin_read32(DMA23_START_ADDR)
-#define bfin_write_DMA23_START_ADDR(val)                bfin_write32(DMA23_START_ADDR)
+#define bfin_write_DMA23_START_ADDR(val)                bfin_write32(DMA23_START_ADDR, val)
 #define bfin_read_DMA23_CONFIG()                        bfin_read16(DMA23_CONFIG)
 #define bfin_write_DMA23_CONFIG(val)                    bfin_write16(DMA23_CONFIG, val)
 #define bfin_read_DMA23_X_COUNT()                       bfin_read16(DMA23_X_COUNT)
 #define bfin_write_DMA23_X_COUNT(val)                   bfin_write16(DMA23_X_COUNT, val)
 #define bfin_read_DMA23_X_MODIFY()                      bfin_read16(DMA23_X_MODIFY)
-#define bfin_write_DMA23_X_MODIFY(val)                  bfin_write16(DMA23_X_MODIFY)
+#define bfin_write_DMA23_X_MODIFY(val)                  bfin_write16(DMA23_X_MODIFY, val)
 #define bfin_read_DMA23_Y_COUNT()                       bfin_read16(DMA23_Y_COUNT)
 #define bfin_write_DMA23_Y_COUNT(val)                   bfin_write16(DMA23_Y_COUNT, val)
 #define bfin_read_DMA23_Y_MODIFY()                      bfin_read16(DMA23_Y_MODIFY)
-#define bfin_write_DMA23_Y_MODIFY(val)                  bfin_write16(DMA23_Y_MODIFY)
+#define bfin_write_DMA23_Y_MODIFY(val)                  bfin_write16(DMA23_Y_MODIFY, val)
 #define bfin_read_DMA23_CURR_DESC_PTR()                 bfin_read32(DMA23_CURR_DESC_PTR)
-#define bfin_write_DMA23_CURR_DESC_PTR(val)             bfin_write32(DMA23_CURR_DESC_PTR)
+#define bfin_write_DMA23_CURR_DESC_PTR(val)             bfin_write32(DMA23_CURR_DESC_PTR, val)
 #define bfin_read_DMA23_CURR_ADDR()                     bfin_read32(DMA23_CURR_ADDR)
-#define bfin_write_DMA23_CURR_ADDR(val)                 bfin_write32(DMA23_CURR_ADDR)
+#define bfin_write_DMA23_CURR_ADDR(val)                 bfin_write32(DMA23_CURR_ADDR, val)
 #define bfin_read_DMA23_IRQ_STATUS()                    bfin_read16(DMA23_IRQ_STATUS)
 #define bfin_write_DMA23_IRQ_STATUS(val)                bfin_write16(DMA23_IRQ_STATUS, val)
 #define bfin_read_DMA23_PERIPHERAL_MAP()                bfin_read16(DMA23_PERIPHERAL_MAP)
@@ -1594,23 +1590,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* MDMA Stream 2 Registers */
 
 #define bfin_read_MDMA_D2_NEXT_DESC_PTR()               bfin_read32(MDMA_D2_NEXT_DESC_PTR)
-#define bfin_write_MDMA_D2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D2_NEXT_DESC_PTR)
+#define bfin_write_MDMA_D2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D2_NEXT_DESC_PTR, val)
 #define bfin_read_MDMA_D2_START_ADDR()                  bfin_read32(MDMA_D2_START_ADDR)
-#define bfin_write_MDMA_D2_START_ADDR(val)              bfin_write32(MDMA_D2_START_ADDR)
+#define bfin_write_MDMA_D2_START_ADDR(val)              bfin_write32(MDMA_D2_START_ADDR, val)
 #define bfin_read_MDMA_D2_CONFIG()                      bfin_read16(MDMA_D2_CONFIG)
 #define bfin_write_MDMA_D2_CONFIG(val)                  bfin_write16(MDMA_D2_CONFIG, val)
 #define bfin_read_MDMA_D2_X_COUNT()                     bfin_read16(MDMA_D2_X_COUNT)
 #define bfin_write_MDMA_D2_X_COUNT(val)                 bfin_write16(MDMA_D2_X_COUNT, val)
 #define bfin_read_MDMA_D2_X_MODIFY()                    bfin_read16(MDMA_D2_X_MODIFY)
-#define bfin_write_MDMA_D2_X_MODIFY(val)                bfin_write16(MDMA_D2_X_MODIFY)
+#define bfin_write_MDMA_D2_X_MODIFY(val)                bfin_write16(MDMA_D2_X_MODIFY, val)
 #define bfin_read_MDMA_D2_Y_COUNT()                     bfin_read16(MDMA_D2_Y_COUNT)
 #define bfin_write_MDMA_D2_Y_COUNT(val)                 bfin_write16(MDMA_D2_Y_COUNT, val)
 #define bfin_read_MDMA_D2_Y_MODIFY()                    bfin_read16(MDMA_D2_Y_MODIFY)
-#define bfin_write_MDMA_D2_Y_MODIFY(val)                bfin_write16(MDMA_D2_Y_MODIFY)
+#define bfin_write_MDMA_D2_Y_MODIFY(val)                bfin_write16(MDMA_D2_Y_MODIFY, val)
 #define bfin_read_MDMA_D2_CURR_DESC_PTR()               bfin_read32(MDMA_D2_CURR_DESC_PTR)
-#define bfin_write_MDMA_D2_CURR_DESC_PTR(val)           bfin_write32(MDMA_D2_CURR_DESC_PTR)
+#define bfin_write_MDMA_D2_CURR_DESC_PTR(val)           bfin_write32(MDMA_D2_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_D2_CURR_ADDR()                   bfin_read32(MDMA_D2_CURR_ADDR)
-#define bfin_write_MDMA_D2_CURR_ADDR(val)               bfin_write32(MDMA_D2_CURR_ADDR)
+#define bfin_write_MDMA_D2_CURR_ADDR(val)               bfin_write32(MDMA_D2_CURR_ADDR, val)
 #define bfin_read_MDMA_D2_IRQ_STATUS()                  bfin_read16(MDMA_D2_IRQ_STATUS)
 #define bfin_write_MDMA_D2_IRQ_STATUS(val)              bfin_write16(MDMA_D2_IRQ_STATUS, val)
 #define bfin_read_MDMA_D2_PERIPHERAL_MAP()              bfin_read16(MDMA_D2_PERIPHERAL_MAP)
@@ -1620,23 +1616,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_MDMA_D2_CURR_Y_COUNT()                bfin_read16(MDMA_D2_CURR_Y_COUNT)
 #define bfin_write_MDMA_D2_CURR_Y_COUNT(val)            bfin_write16(MDMA_D2_CURR_Y_COUNT, val)
 #define bfin_read_MDMA_S2_NEXT_DESC_PTR()               bfin_read32(MDMA_S2_NEXT_DESC_PTR)
-#define bfin_write_MDMA_S2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S2_NEXT_DESC_PTR)
+#define bfin_write_MDMA_S2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S2_NEXT_DESC_PTR, val)
 #define bfin_read_MDMA_S2_START_ADDR()                  bfin_read32(MDMA_S2_START_ADDR)
-#define bfin_write_MDMA_S2_START_ADDR(val)              bfin_write32(MDMA_S2_START_ADDR)
+#define bfin_write_MDMA_S2_START_ADDR(val)              bfin_write32(MDMA_S2_START_ADDR, val)
 #define bfin_read_MDMA_S2_CONFIG()                      bfin_read16(MDMA_S2_CONFIG)
 #define bfin_write_MDMA_S2_CONFIG(val)                  bfin_write16(MDMA_S2_CONFIG, val)
 #define bfin_read_MDMA_S2_X_COUNT()                     bfin_read16(MDMA_S2_X_COUNT)
 #define bfin_write_MDMA_S2_X_COUNT(val)                 bfin_write16(MDMA_S2_X_COUNT, val)
 #define bfin_read_MDMA_S2_X_MODIFY()                    bfin_read16(MDMA_S2_X_MODIFY)
-#define bfin_write_MDMA_S2_X_MODIFY(val)                bfin_write16(MDMA_S2_X_MODIFY)
+#define bfin_write_MDMA_S2_X_MODIFY(val)                bfin_write16(MDMA_S2_X_MODIFY, val)
 #define bfin_read_MDMA_S2_Y_COUNT()                     bfin_read16(MDMA_S2_Y_COUNT)
 #define bfin_write_MDMA_S2_Y_COUNT(val)                 bfin_write16(MDMA_S2_Y_COUNT, val)
 #define bfin_read_MDMA_S2_Y_MODIFY()                    bfin_read16(MDMA_S2_Y_MODIFY)
-#define bfin_write_MDMA_S2_Y_MODIFY(val)                bfin_write16(MDMA_S2_Y_MODIFY)
+#define bfin_write_MDMA_S2_Y_MODIFY(val)                bfin_write16(MDMA_S2_Y_MODIFY, val)
 #define bfin_read_MDMA_S2_CURR_DESC_PTR()               bfin_read32(MDMA_S2_CURR_DESC_PTR)
-#define bfin_write_MDMA_S2_CURR_DESC_PTR(val)           bfin_write32(MDMA_S2_CURR_DESC_PTR)
+#define bfin_write_MDMA_S2_CURR_DESC_PTR(val)           bfin_write32(MDMA_S2_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_S2_CURR_ADDR()                   bfin_read32(MDMA_S2_CURR_ADDR)
-#define bfin_write_MDMA_S2_CURR_ADDR(val)               bfin_write32(MDMA_S2_CURR_ADDR)
+#define bfin_write_MDMA_S2_CURR_ADDR(val)               bfin_write32(MDMA_S2_CURR_ADDR, val)
 #define bfin_read_MDMA_S2_IRQ_STATUS()                  bfin_read16(MDMA_S2_IRQ_STATUS)
 #define bfin_write_MDMA_S2_IRQ_STATUS(val)              bfin_write16(MDMA_S2_IRQ_STATUS, val)
 #define bfin_read_MDMA_S2_PERIPHERAL_MAP()              bfin_read16(MDMA_S2_PERIPHERAL_MAP)
@@ -1649,23 +1645,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 /* MDMA Stream 3 Registers */
 
 #define bfin_read_MDMA_D3_NEXT_DESC_PTR()               bfin_read32(MDMA_D3_NEXT_DESC_PTR)
-#define bfin_write_MDMA_D3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D3_NEXT_DESC_PTR)
+#define bfin_write_MDMA_D3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D3_NEXT_DESC_PTR, val)
 #define bfin_read_MDMA_D3_START_ADDR()                  bfin_read32(MDMA_D3_START_ADDR)
-#define bfin_write_MDMA_D3_START_ADDR(val)              bfin_write32(MDMA_D3_START_ADDR)
+#define bfin_write_MDMA_D3_START_ADDR(val)              bfin_write32(MDMA_D3_START_ADDR, val)
 #define bfin_read_MDMA_D3_CONFIG()                      bfin_read16(MDMA_D3_CONFIG)
 #define bfin_write_MDMA_D3_CONFIG(val)                  bfin_write16(MDMA_D3_CONFIG, val)
 #define bfin_read_MDMA_D3_X_COUNT()                     bfin_read16(MDMA_D3_X_COUNT)
 #define bfin_write_MDMA_D3_X_COUNT(val)                 bfin_write16(MDMA_D3_X_COUNT, val)
 #define bfin_read_MDMA_D3_X_MODIFY()                    bfin_read16(MDMA_D3_X_MODIFY)
-#define bfin_write_MDMA_D3_X_MODIFY(val)                bfin_write16(MDMA_D3_X_MODIFY)
+#define bfin_write_MDMA_D3_X_MODIFY(val)                bfin_write16(MDMA_D3_X_MODIFY, val)
 #define bfin_read_MDMA_D3_Y_COUNT()                     bfin_read16(MDMA_D3_Y_COUNT)
 #define bfin_write_MDMA_D3_Y_COUNT(val)                 bfin_write16(MDMA_D3_Y_COUNT, val)
 #define bfin_read_MDMA_D3_Y_MODIFY()                    bfin_read16(MDMA_D3_Y_MODIFY)
-#define bfin_write_MDMA_D3_Y_MODIFY(val)                bfin_write16(MDMA_D3_Y_MODIFY)
+#define bfin_write_MDMA_D3_Y_MODIFY(val)                bfin_write16(MDMA_D3_Y_MODIFY, val)
 #define bfin_read_MDMA_D3_CURR_DESC_PTR()               bfin_read32(MDMA_D3_CURR_DESC_PTR)
-#define bfin_write_MDMA_D3_CURR_DESC_PTR(val)           bfin_write32(MDMA_D3_CURR_DESC_PTR)
+#define bfin_write_MDMA_D3_CURR_DESC_PTR(val)           bfin_write32(MDMA_D3_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_D3_CURR_ADDR()                   bfin_read32(MDMA_D3_CURR_ADDR)
-#define bfin_write_MDMA_D3_CURR_ADDR(val)               bfin_write32(MDMA_D3_CURR_ADDR)
+#define bfin_write_MDMA_D3_CURR_ADDR(val)               bfin_write32(MDMA_D3_CURR_ADDR, val)
 #define bfin_read_MDMA_D3_IRQ_STATUS()                  bfin_read16(MDMA_D3_IRQ_STATUS)
 #define bfin_write_MDMA_D3_IRQ_STATUS(val)              bfin_write16(MDMA_D3_IRQ_STATUS, val)
 #define bfin_read_MDMA_D3_PERIPHERAL_MAP()              bfin_read16(MDMA_D3_PERIPHERAL_MAP)
@@ -1675,23 +1671,23 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 #define bfin_read_MDMA_D3_CURR_Y_COUNT()                bfin_read16(MDMA_D3_CURR_Y_COUNT)
 #define bfin_write_MDMA_D3_CURR_Y_COUNT(val)            bfin_write16(MDMA_D3_CURR_Y_COUNT, val)
 #define bfin_read_MDMA_S3_NEXT_DESC_PTR()               bfin_read32(MDMA_S3_NEXT_DESC_PTR)
-#define bfin_write_MDMA_S3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S3_NEXT_DESC_PTR)
+#define bfin_write_MDMA_S3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S3_NEXT_DESC_PTR, val)
 #define bfin_read_MDMA_S3_START_ADDR()                  bfin_read32(MDMA_S3_START_ADDR)
-#define bfin_write_MDMA_S3_START_ADDR(val)              bfin_write32(MDMA_S3_START_ADDR)
+#define bfin_write_MDMA_S3_START_ADDR(val)              bfin_write32(MDMA_S3_START_ADDR, val)
 #define bfin_read_MDMA_S3_CONFIG()                      bfin_read16(MDMA_S3_CONFIG)
 #define bfin_write_MDMA_S3_CONFIG(val)                  bfin_write16(MDMA_S3_CONFIG, val)
 #define bfin_read_MDMA_S3_X_COUNT()                     bfin_read16(MDMA_S3_X_COUNT)
 #define bfin_write_MDMA_S3_X_COUNT(val)                 bfin_write16(MDMA_S3_X_COUNT, val)
 #define bfin_read_MDMA_S3_X_MODIFY()                    bfin_read16(MDMA_S3_X_MODIFY)
-#define bfin_write_MDMA_S3_X_MODIFY(val)                bfin_write16(MDMA_S3_X_MODIFY)
+#define bfin_write_MDMA_S3_X_MODIFY(val)                bfin_write16(MDMA_S3_X_MODIFY, val)
 #define bfin_read_MDMA_S3_Y_COUNT()                     bfin_read16(MDMA_S3_Y_COUNT)
 #define bfin_write_MDMA_S3_Y_COUNT(val)                 bfin_write16(MDMA_S3_Y_COUNT, val)
 #define bfin_read_MDMA_S3_Y_MODIFY()                    bfin_read16(MDMA_S3_Y_MODIFY)
-#define bfin_write_MDMA_S3_Y_MODIFY(val)                bfin_write16(MDMA_S3_Y_MODIFY)
+#define bfin_write_MDMA_S3_Y_MODIFY(val)                bfin_write16(MDMA_S3_Y_MODIFY, val)
 #define bfin_read_MDMA_S3_CURR_DESC_PTR()               bfin_read32(MDMA_S3_CURR_DESC_PTR)
-#define bfin_write_MDMA_S3_CURR_DESC_PTR(val)           bfin_write32(MDMA_S3_CURR_DESC_PTR)
+#define bfin_write_MDMA_S3_CURR_DESC_PTR(val)           bfin_write32(MDMA_S3_CURR_DESC_PTR, val)
 #define bfin_read_MDMA_S3_CURR_ADDR()                   bfin_read32(MDMA_S3_CURR_ADDR)
-#define bfin_write_MDMA_S3_CURR_ADDR(val)               bfin_write32(MDMA_S3_CURR_ADDR)
+#define bfin_write_MDMA_S3_CURR_ADDR(val)               bfin_write32(MDMA_S3_CURR_ADDR, val)
 #define bfin_read_MDMA_S3_IRQ_STATUS()                  bfin_read16(MDMA_S3_IRQ_STATUS)
 #define bfin_write_MDMA_S3_IRQ_STATUS(val)              bfin_write16(MDMA_S3_IRQ_STATUS, val)
 #define bfin_read_MDMA_S3_PERIPHERAL_MAP()              bfin_read16(MDMA_S3_PERIPHERAL_MAP)
diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h
index 46ff31f20ae5..36a2ef7e7849 100644
--- a/include/asm-blackfin/mach-bf548/dma.h
+++ b/include/asm-blackfin/mach-bf548/dma.h
@@ -73,6 +73,4 @@
 
 #define MAX_BLACKFIN_DMA_CHANNEL 32
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
 #endif
diff --git a/include/asm-blackfin/mach-bf548/mem_init.h b/include/asm-blackfin/mach-bf548/mem_init.h
index befc2903d5a5..ab0b863eee66 100644
--- a/include/asm-blackfin/mach-bf548/mem_init.h
+++ b/include/asm-blackfin/mach-bf548/mem_init.h
@@ -29,16 +29,19 @@
  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 #define MIN_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000 + 1)
+#define MAX_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000)
+#define DDR_CLK_HZ(x)   (1000*1000*1000/x)
 
 #if (CONFIG_MEM_MT46V32M16_6T)
 #define DDR_SIZE        DEVSZ_512
 #define DDR_WIDTH       DEVWD_16
+#define DDR_MAX_tCK     13
 
 #define DDR_tRC         DDR_TRC(MIN_DDR_SCLK(60))
 #define DDR_tRAS        DDR_TRAS(MIN_DDR_SCLK(42))
 #define DDR_tRP         DDR_TRP(MIN_DDR_SCLK(15))
 #define DDR_tRFC        DDR_TRFC(MIN_DDR_SCLK(72))
-#define DDR_tREFI       DDR_TREFI(MIN_DDR_SCLK(7800))
+#define DDR_tREFI       DDR_TREFI(MAX_DDR_SCLK(7800))
 
 #define DDR_tRCD        DDR_TRCD(MIN_DDR_SCLK(15))
 #define DDR_tWTR        DDR_TWTR(1)
@@ -49,12 +52,13 @@
 #if (CONFIG_MEM_MT46V32M16_5B)
 #define DDR_SIZE        DEVSZ_512
 #define DDR_WIDTH       DEVWD_16
+#define DDR_MAX_tCK     13
 
 #define DDR_tRC         DDR_TRC(MIN_DDR_SCLK(55))
 #define DDR_tRAS        DDR_TRAS(MIN_DDR_SCLK(40))
 #define DDR_tRP         DDR_TRP(MIN_DDR_SCLK(15))
 #define DDR_tRFC        DDR_TRFC(MIN_DDR_SCLK(70))
-#define DDR_tREFI       DDR_TREFI(MIN_DDR_SCLK(7800))
+#define DDR_tREFI       DDR_TREFI(MAX_DDR_SCLK(7800))
 
 #define DDR_tRCD        DDR_TRCD(MIN_DDR_SCLK(15))
 #define DDR_tWTR        DDR_TWTR(2)
@@ -65,6 +69,7 @@
 #if (CONFIG_MEM_GENERIC_BOARD)
 #define DDR_SIZE        DEVSZ_512
 #define DDR_WIDTH       DEVWD_16
+#define DDR_MAX_tCK     13
 
 #define DDR_tRCD        DDR_TRCD(3)
 #define DDR_tWTR        DDR_TWTR(2)
@@ -77,14 +82,15 @@
 #define DDR_tREFI       DDR_TREFI(1288)
 #endif
 
-#if (CONFIG_SCLK_HZ <= 133333333)
-#define DDR_CL          CL_2
-#elif (CONFIG_SCLK_HZ <= 166666666)
-#define DDR_CL          CL_2_5
+#if (CONFIG_SCLK_HZ < DDR_CLK_HZ(DDR_MAX_tCK))
+# error "CONFIG_SCLK_HZ is too small (<DDR_CLK_HZ(DDR_MAX_tCK) Hz)."
+#elif(CONFIG_SCLK_HZ <= 133333333)
+# define        DDR_CL          CL_2
 #else
-#define DDR_CL          CL_3
+# error "CONFIG_SCLK_HZ is too large (>133333333 Hz)."
 #endif
 
+
 #define mem_DDRCTL0     (DDR_tRP | DDR_tRAS | DDR_tRC | DDR_tRFC | DDR_tREFI)
 #define mem_DDRCTL1     (DDR_DATWIDTH | EXTBANK_1 | DDR_SIZE | DDR_WIDTH | DDR_tWTR \
                         | DDR_tMRD | DDR_tWR | DDR_tRCD)
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h
index 0c1d46193939..82157caa96a2 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/include/asm-blackfin/mach-bf561/anomaly.h
@@ -7,7 +7,7 @@
  */
 
 /* This file shoule be up to date with:
- *  - Revision O, 11/15/2007; ADSP-BF561 Blackfin Processor Anomaly List
+ *  - Revision P, 02/08/2008; ADSP-BF561 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
@@ -256,10 +256,14 @@
 #define ANOMALY_05000357 (1)
 /* Conflicting Column Address Widths Causes SDRAM Errors */
 #define ANOMALY_05000362 (1)
+/* UART Break Signal Issues */
+#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
 /* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
 #define ANOMALY_05000366 (1)
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
 #define ANOMALY_05000371 (1)
+/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
+#define ANOMALY_05000403 (1)
 
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000158 (0)
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index b6f513bee56e..8a4e66d1db37 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
+/*
+ * file:        include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ *      blackfin serial driver head file
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs:         enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose.  see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
 #include <linux/serial.h>
 #include <asm/dma.h>
 #include <asm/portmux.h>
 
-#define NR_PORTS                1
-
-#define OFFSET_THR              0x00    /* Transmit Holding register            */
-#define OFFSET_RBR              0x00    /* Receive Buffer register              */
-#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
-#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
-#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
-#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
-#define OFFSET_LCR              0x0C    /* Line Control Register                */
-#define OFFSET_MCR              0x10    /* Modem Control Register               */
-#define OFFSET_LSR              0x14    /* Line Status Register                 */
-#define OFFSET_MSR              0x18    /* Modem Status Register                */
-#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
-#define OFFSET_GCTL             0x24    /* Global Control Register              */
-
 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -84,7 +100,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
         bfin_write16(uart->port.membase + OFFSET_LSR, -1);
 }
 
-struct bfin_serial_port bfin_serial_ports[NR_PORTS];
+struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
 struct bfin_serial_res {
         unsigned long   uart_base_addr;
         int             uart_irq;
@@ -115,7 +131,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
 
 #define DRIVER_NAME "bfin-uart"
 
-int nr_ports = NR_PORTS;
+int nr_ports = BFIN_UART_NR_PORTS;
 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 {
 
diff --git a/include/asm-blackfin/mach-bf561/bfin_sir.h b/include/asm-blackfin/mach-bf561/bfin_sir.h
new file mode 100644
index 000000000000..cefcf8bb505b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf561/bfin_sir.h
@@ -0,0 +1,120 @@
+/*
+ * Blackfin Infra-red Driver
+ *
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ */
+
+#include <linux/serial.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#define SIR_UART_GET_CHAR(port)   bfin_read16((port)->membase + OFFSET_RBR)
+#define SIR_UART_GET_DLL(port)    bfin_read16((port)->membase + OFFSET_DLL)
+#define SIR_UART_GET_IER(port)    bfin_read16((port)->membase + OFFSET_IER)
+#define SIR_UART_GET_DLH(port)    bfin_read16((port)->membase + OFFSET_DLH)
+#define SIR_UART_GET_IIR(port)    bfin_read16((port)->membase + OFFSET_IIR)
+#define SIR_UART_GET_LCR(port)    bfin_read16((port)->membase + OFFSET_LCR)
+#define SIR_UART_GET_GCTL(port)   bfin_read16((port)->membase + OFFSET_GCTL)
+
+#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
+#define SIR_UART_PUT_DLL(port, v)  bfin_write16(((port)->membase + OFFSET_DLL), v)
+#define SIR_UART_PUT_IER(port, v)  bfin_write16(((port)->membase + OFFSET_IER), v)
+#define SIR_UART_PUT_DLH(port, v)  bfin_write16(((port)->membase + OFFSET_DLH), v)
+#define SIR_UART_PUT_LCR(port, v)  bfin_write16(((port)->membase + OFFSET_LCR), v)
+#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
+
+#ifdef CONFIG_SIR_BFIN_DMA
+struct dma_rx_buf {
+        char *buf;
+        int head;
+        int tail;
+        };
+#endif /* CONFIG_SIR_BFIN_DMA */
+
+struct bfin_sir_port {
+        unsigned char __iomem   *membase;
+        unsigned int            irq;
+        unsigned int            lsr;
+        unsigned long           clk;
+        struct net_device       *dev;
+#ifdef CONFIG_SIR_BFIN_DMA
+        int                     tx_done;
+        struct dma_rx_buf       rx_dma_buf;
+        struct timer_list       rx_dma_timer;
+        int                     rx_dma_nrows;
+#endif /* CONFIG_SIR_BFIN_DMA */
+        unsigned int            tx_dma_channel;
+        unsigned int            rx_dma_channel;
+};
+
+struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
+
+struct bfin_sir_port_res {
+        unsigned long   base_addr;
+        int             irq;
+        unsigned int    rx_dma_channel;
+        unsigned int    tx_dma_channel;
+};
+
+struct bfin_sir_port_res bfin_sir_port_resource[] = {
+#ifdef CONFIG_BFIN_SIR0
+        {
+        0xFFC00400,
+        IRQ_UART_RX,
+        CH_UART_RX,
+        CH_UART_TX,
+        },
+#endif
+};
+
+int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
+
+struct bfin_sir_self {
+        struct bfin_sir_port    *sir_port;
+        spinlock_t              lock;
+        unsigned int            open;
+        int                     speed;
+        int                     newspeed;
+
+        struct sk_buff          *txskb;
+        struct sk_buff          *rxskb;
+        struct net_device_stats stats;
+        struct device           *dev;
+        struct irlap_cb         *irlap;
+        struct qos_info         qos;
+
+        iobuff_t                tx_buff;
+        iobuff_t                rx_buff;
+
+        struct work_struct      work;
+        int                     mtt;
+};
+
+static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
+{
+        unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
+        port->lsr |= (lsr & (BI|FE|PE|OE));
+        return lsr | port->lsr;
+}
+
+static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
+{
+        port->lsr = 0;
+        bfin_read16(port->membase + OFFSET_LSR);
+}
+
+#define DRIVER_NAME "bfin_sir"
+
+static void bfin_sir_hw_init(void)
+{
+#ifdef CONFIG_BFIN_SIR0
+        peripheral_request(P_UART0_TX, DRIVER_NAME);
+        peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+        SSYNC();
+}
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h
index 3a16df2c86d8..0ea8666e6764 100644
--- a/include/asm-blackfin/mach-bf561/blackfin.h
+++ b/include/asm-blackfin/mach-bf561/blackfin.h
@@ -69,5 +69,19 @@
 #define bfin_read_SIC_ISR(x)            bfin_read32(SICA_ISR0 + (x << 2))
 #define bfin_write_SIC_ISR(x, val)      bfin_write32((SICA_ISR0 + (x << 2)), val)
 
+#define BFIN_UART_NR_PORTS      1
+
+#define OFFSET_THR              0x00    /* Transmit Holding register            */
+#define OFFSET_RBR              0x00    /* Receive Buffer register              */
+#define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
+#define OFFSET_IER              0x04    /* Interrupt Enable Register            */
+#define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
+#define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
+#define OFFSET_LCR              0x0C    /* Line Control Register                */
+#define OFFSET_MCR              0x10    /* Modem Control Register               */
+#define OFFSET_LSR              0x14    /* Line Status Register                 */
+#define OFFSET_MSR              0x18    /* Modem Status Register                */
+#define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
+#define OFFSET_GCTL             0x24    /* Global Control Register              */
 
 #endif                          /* _MACH_BLACKFIN_H_ */
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 1bc8d2f89ccc..b07ffccd66dd 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -47,7 +47,30 @@
 
 /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
 #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val)              bfin_write16(PLL_CTL,val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+        unsigned long flags, iwr0, iwr1;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        local_irq_save(flags);
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        iwr0 = bfin_read32(SICA_IWR0);
+        iwr1 = bfin_read32(SICA_IWR1);
+        /* Only allow PPL Wakeup) */
+        bfin_write32(SICA_IWR0, IWR_ENABLE(0));
+        bfin_write32(SICA_IWR1, 0);
+
+        bfin_write16(PLL_CTL, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_write32(SICA_IWR0, iwr0);
+        bfin_write32(SICA_IWR1, iwr1);
+        local_irq_restore(flags);
+}
 #define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
 #define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
 #define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
@@ -56,6 +79,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
         unsigned long flags, iwr0, iwr1;
 
+        if (val == bfin_read_VR_CTL())
+                return;
+
+        local_irq_save(flags);
         /* Enable the PLL Wakeup bit in SIC IWR */
         iwr0 = bfin_read32(SICA_IWR0);
         iwr1 = bfin_read32(SICA_IWR1);
@@ -65,12 +92,11 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 
         bfin_write16(VR_CTL, val);
         SSYNC();
-
-        local_irq_save(flags);
         asm("IDLE;");
-        local_irq_restore(flags);
+
         bfin_write32(SICA_IWR0, iwr0);
         bfin_write32(SICA_IWR1, iwr1);
+        local_irq_restore(flags);
 }
 #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index c3c0eb13c819..366c9b9a0cb7 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -110,18 +110,23 @@
 #define WDOGB_STAT                              0xFFC01208      /* Watchdog Status register */
 
 /* UART Controller (0xFFC00400 - 0xFFC004FF) */
-#define UART_THR                0xFFC00400      /* Transmit Holding register */
-#define UART_RBR                0xFFC00400      /* Receive Buffer register */
-#define UART_DLL                0xFFC00400      /* Divisor Latch (Low-Byte) */
-#define UART_IER                0xFFC00404      /* Interrupt Enable Register */
-#define UART_DLH                0xFFC00404      /* Divisor Latch (High-Byte) */
-#define UART_IIR                0xFFC00408      /* Interrupt Identification Register */
-#define UART_LCR                0xFFC0040C      /* Line Control Register */
-#define UART_MCR                                0xFFC00410      /* Modem Control Register */
-#define UART_LSR                0xFFC00414      /* Line Status Register */
-#define UART_MSR                0xFFC00418      /* Modem Status Register */
-#define UART_SCR                0xFFC0041C      /* SCR Scratch Register */
-#define UART_GCTL               0xFFC00424      /* Global Control Register */
+
+/*
+ * Because include/linux/serial_reg.h have defined UART_*,
+ * So we define blackfin uart regs to BFIN_UART0_*.
+ */
+#define BFIN_UART_THR                   0xFFC00400  /* Transmit Holding register */
+#define BFIN_UART_RBR                   0xFFC00400  /* Receive Buffer register */
+#define BFIN_UART_DLL                   0xFFC00400  /* Divisor Latch (Low-Byte) */
+#define BFIN_UART_IER                   0xFFC00404  /* Interrupt Enable Register */
+#define BFIN_UART_DLH                   0xFFC00404  /* Divisor Latch (High-Byte) */
+#define BFIN_UART_IIR                   0xFFC00408  /* Interrupt Identification Register */
+#define BFIN_UART_LCR                   0xFFC0040C  /* Line Control Register */
+#define BFIN_UART_MCR                   0xFFC00410  /* Modem Control Register */
+#define BFIN_UART_LSR                   0xFFC00414  /* Line Status Register */
+#define BFIN_UART_MSR                   0xFFC00418  /* Modem Status Register */
+#define BFIN_UART_SCR                   0xFFC0041C  /* SCR Scratch Register */
+#define BFIN_UART_GCTL                  0xFFC00424  /* Global Control Register */
 
 /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
 #define SPI0_REGBASE                    0xFFC00500
@@ -866,6 +871,8 @@
 /* PLL_DIV Masks */
 #define SCLK_DIV(x)  (x)        /* SCLK = VCO / x */
 
+#define CSEL                    0x30            /* Core Select */
+#define SSEL                    0xf             /* System Select */
 #define CCLK_DIV1              0x00000000       /* CCLK = VCO / 1 */
 #define CCLK_DIV2              0x00000010       /* CCLK = VCO / 2 */
 #define CCLK_DIV4              0x00000020       /* CCLK = VCO / 4 */
diff --git a/include/asm-blackfin/mach-bf561/dma.h b/include/asm-blackfin/mach-bf561/dma.h
index 766334b7d8ab..21d982003e75 100644
--- a/include/asm-blackfin/mach-bf561/dma.h
+++ b/include/asm-blackfin/mach-bf561/dma.h
@@ -32,7 +32,4 @@
 #define CH_IMEM_STREAM1_SRC     34
 #define CH_IMEM_STREAM1_DEST    35
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
diff --git a/include/asm-blackfin/portmux.h b/include/asm-blackfin/portmux.h
index 0d3f650d2d99..0807b286cd9e 100644
--- a/include/asm-blackfin/portmux.h
+++ b/include/asm-blackfin/portmux.h
@@ -17,8 +17,8 @@
 
 int peripheral_request(unsigned short per, const char *label);
 void peripheral_free(unsigned short per);
-int peripheral_request_list(unsigned short per[], const char *label);
-void peripheral_free_list(unsigned short per[]);
+int peripheral_request_list(const unsigned short per[], const char *label);
+void peripheral_free_list(const unsigned short per[]);
 
 #include <asm/gpio.h>
 #include <asm/mach/portmux.h>
diff --git a/include/asm-blackfin/processor.h b/include/asm-blackfin/processor.h
index 1033e5c76011..1c0040724612 100644
--- a/include/asm-blackfin/processor.h
+++ b/include/asm-blackfin/processor.h
@@ -26,9 +26,10 @@ static inline void wrusp(unsigned long usp)
 
 /*
  * User space process size: 1st byte beyond user address space.
+ * Fairly meaningless on nommu.  Parts of user programs can be scattered
+ * in a lot of places, so just disable this by setting it to 0xFFFFFFFF.
  */
-extern unsigned long memory_end;
-#define TASK_SIZE       (memory_end)
+#define TASK_SIZE       0xFFFFFFFF
 
 #ifdef __KERNEL__
 #define STACK_TOP       TASK_SIZE
diff --git a/include/asm-blackfin/signal.h b/include/asm-blackfin/signal.h
index 0250429b736a..87951d251458 100644
--- a/include/asm-blackfin/signal.h
+++ b/include/asm-blackfin/signal.h
@@ -143,7 +143,7 @@ struct sigaction {
 #endif                          /* __KERNEL__ */
 
 typedef struct sigaltstack {
-        void *ss_sp;
+        void __user *ss_sp;
         int ss_flags;
         size_t ss_size;
 } stack_t;
diff --git a/include/asm-blackfin/thread_info.h b/include/asm-blackfin/thread_info.h
index 15b99cf4f50b..bc2fe5accf20 100644
--- a/include/asm-blackfin/thread_info.h
+++ b/include/asm-blackfin/thread_info.h
@@ -81,14 +81,11 @@ struct thread_info {
 #define init_thread_info        (init_thread_union.thread_info)
 #define init_stack              (init_thread_union.stack)
 
-/* How to get the thread information struct from C */
-
-static inline struct thread_info *current_thread_info(void)
-    __attribute__ ((__const__));
-
-/* Given a task stack pointer, you can find it's task structure
- * just by masking it to the 8K boundary.
+/* Given a task stack pointer, you can find its corresponding
+ * thread_info structure just by masking it to the THREAD_SIZE
+ * boundary (currently 8K as you can see above).
  */
+__attribute_const__
 static inline struct thread_info *current_thread_info(void)
 {
         struct thread_info *ti;
diff --git a/include/asm-blackfin/time.h b/include/asm-blackfin/time.h
new file mode 100644
index 000000000000..6e5859b6ea32
--- /dev/null
+++ b/include/asm-blackfin/time.h
@@ -0,0 +1,36 @@
+/*
+ * asm-blackfin/time.h:
+ *
+ * Copyright 2004-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef _ASM_BLACKFIN_TIME_H
+#define _ASM_BLACKFIN_TIME_H
+
+/*
+ * The way that the Blackfin core timer works is:
+ *  - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE)
+ *  - Every time TSCALE ticks, a 32bit is counted down (TCOUNT)
+ *
+ * If you take the fastest clock (1ns, or 1GHz to make the math work easier)
+ *    10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter
+ *    (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need
+ *    to use TSCALE, and program it to zero (which is pass CCLK through).
+ *    If you feel like using it, try to keep HZ * TIMESCALE to some
+ *    value that divides easy (like power of 2).
+ */
+
+#ifndef CONFIG_CPU_FREQ
+#define TIME_SCALE 1
+#else
+/*
+ * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
+ * Whenever we change the Core Clock frequency changes we immediately
+ * adjust the Core Timer Presale Register. This way we don't lose time.
+ */
+#define TIME_SCALE 4
+#endif
+
+#endif
diff --git a/include/asm-blackfin/timex.h b/include/asm-blackfin/timex.h
index 828590117f51..22b0806161bb 100644
--- a/include/asm-blackfin/timex.h
+++ b/include/asm-blackfin/timex.h
@@ -1,18 +1,23 @@
-/* blackfin architecture timex specifications: Lineo Inc. 2001
+/*
+ * asm-blackfin/timex.h: cpu cycles!
  *
- * Based on: include/asm-m68knommu/timex.h
+ * Copyright 2004-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
  */
 
-#ifndef _ASMBLACKFIN_TIMEX_H
-#define _ASMBLACKFIN_TIMEX_H
+#ifndef _ASM_BLACKFIN_TIMEX_H
+#define _ASM_BLACKFIN_TIMEX_H
 
 #define CLOCK_TICK_RATE 1000000 /* Underlying HZ */
 
-typedef unsigned long cycles_t;
+typedef unsigned long long cycles_t;
 
 static inline cycles_t get_cycles(void)
 {
-        return 0;
+        unsigned long tmp, tmp2;
+        __asm__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2));
+        return tmp | ((cycles_t)tmp2 << 32);
 }
 
 #endif
diff --git a/include/asm-blackfin/trace.h b/include/asm-blackfin/trace.h
index ef18afbc2101..312b596b9731 100644
--- a/include/asm-blackfin/trace.h
+++ b/include/asm-blackfin/trace.h
@@ -62,14 +62,14 @@ extern unsigned long software_trace_buff[];
         preg.L = LO(TBUFCTL); \
         preg.H = HI(TBUFCTL); \
         dreg = [preg]; \
-        [sp++] = dreg; \
+        [--sp] = dreg; \
         dreg = 0x1; \
         [preg] = dreg;
 
 #define trace_buffer_restore(preg, dreg) \
         preg.L = LO(TBUFCTL); \
         preg.H = HI(TBUFCTL); \
-        dreg = [sp--]; \
+        dreg = [sp++]; \
         [preg] = dreg;
 
 #else /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
diff --git a/include/asm-blackfin/uaccess.h b/include/asm-blackfin/uaccess.h
index 22a410b8003b..d928b8099056 100644
--- a/include/asm-blackfin/uaccess.h
+++ b/include/asm-blackfin/uaccess.h
@@ -133,7 +133,7 @@ static inline int bad_user_access_length(void)
 }
 
 #define __put_user_bad() (printk(KERN_INFO "put_user_bad %s:%d %s\n",\
-                           __FILE__, __LINE__, __FUNCTION__),\
+                           __FILE__, __LINE__, __func__),\
                            bad_user_access_length(), (-EFAULT))
 
 /*
@@ -177,7 +177,7 @@ static inline int bad_user_access_length(void)
                 default:                                                \
                         x = 0;                                          \
                         printk(KERN_INFO "get_user_bad: %s:%d %s\n",    \
-                               __FILE__, __LINE__, __FUNCTION__);       \
+                               __FILE__, __LINE__, __func__);   \
                         _err = __get_user_bad();                        \
                         break;                                          \
                 }                                                       \
diff --git a/include/asm-blackfin/unistd.h b/include/asm-blackfin/unistd.h
index c18a399f6e3e..42955d0c439b 100644
--- a/include/asm-blackfin/unistd.h
+++ b/include/asm-blackfin/unistd.h
@@ -265,14 +265,14 @@
                                 /* 258 __NR_remap_file_pages */
 #define __NR_set_tid_address    259
 #define __NR_timer_create       260
-#define __NR_timer_settime      (__NR_timer_create+1)
-#define __NR_timer_gettime      (__NR_timer_create+2)
-#define __NR_timer_getoverrun   (__NR_timer_create+3)
-#define __NR_timer_delete       (__NR_timer_create+4)
-#define __NR_clock_settime      (__NR_timer_create+5)
-#define __NR_clock_gettime      (__NR_timer_create+6)
-#define __NR_clock_getres       (__NR_timer_create+7)
-#define __NR_clock_nanosleep    (__NR_timer_create+8)
+#define __NR_timer_settime      261
+#define __NR_timer_gettime      262
+#define __NR_timer_getoverrun   263
+#define __NR_timer_delete       264
+#define __NR_clock_settime      265
+#define __NR_clock_gettime      266
+#define __NR_clock_getres       267
+#define __NR_clock_nanosleep    268
 #define __NR_statfs64           269
 #define __NR_fstatfs64          270
 #define __NR_tgkill             271
@@ -283,11 +283,11 @@
                                 /* 276 __NR_get_mempolicy */
                                 /* 277 __NR_set_mempolicy */
 #define __NR_mq_open            278
-#define __NR_mq_unlink          (__NR_mq_open+1)
-#define __NR_mq_timedsend       (__NR_mq_open+2)
-#define __NR_mq_timedreceive    (__NR_mq_open+3)
-#define __NR_mq_notify          (__NR_mq_open+4)
-#define __NR_mq_getsetattr      (__NR_mq_open+5)
+#define __NR_mq_unlink          279
+#define __NR_mq_timedsend       280
+#define __NR_mq_timedreceive    281
+#define __NR_mq_notify          282
+#define __NR_mq_getsetattr      283
 #define __NR_kexec_load         284
 #define __NR_waitid             285
 #define __NR_add_key            286
diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h
index 67dc84cd1343..76b0cc5637f8 100644
--- a/include/asm-generic/iomap.h
+++ b/include/asm-generic/iomap.h
@@ -60,6 +60,10 @@ extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long cou
 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
 extern void ioport_unmap(void __iomem *);
 
+#ifndef ARCH_HAS_IOREMAP_WC
+#define ioremap_wc ioremap_nocache
+#endif
+
 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
 struct pci_dev;
 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
diff --git a/include/asm-sparc/device.h b/include/asm-sparc/device.h
index 680e51d87374..19790eb99cc6 100644
--- a/include/asm-sparc/device.h
+++ b/include/asm-sparc/device.h
@@ -16,6 +16,8 @@ struct dev_archdata {
 
         struct device_node      *prom_node;
         struct of_device        *op;
+
+        int                     numa_node;
 };
 
 #endif /* _ASM_SPARC_DEVICE_H */
diff --git a/include/asm-sparc/prom.h b/include/asm-sparc/prom.h
index df5dc4422483..fd55522481cd 100644
--- a/include/asm-sparc/prom.h
+++ b/include/asm-sparc/prom.h
@@ -77,6 +77,11 @@ extern int of_getintprop_default(struct device_node *np,
                                  const char *name,
                                  int def);
 extern int of_find_in_proplist(const char *list, const char *match, int len);
+#ifdef CONFIG_NUMA
+extern int of_node_to_nid(struct device_node *dp);
+#else
+#define of_node_to_nid(dp)      (-1)
+#endif
 
 extern void prom_build_devicetree(void);
 
diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h
index 46325ddee23b..d7b9afcba08b 100644
--- a/include/asm-sparc64/iommu.h
+++ b/include/asm-sparc64/iommu.h
@@ -56,6 +56,7 @@ struct strbuf {
 };
 
 extern int iommu_table_init(struct iommu *iommu, int tsbsize,
-                            u32 dma_offset, u32 dma_addr_mask);
+                            u32 dma_offset, u32 dma_addr_mask,
+                            int numa_node);
 
 #endif /* !(_SPARC64_IOMMU_H) */
diff --git a/include/asm-sparc64/mmzone.h b/include/asm-sparc64/mmzone.h
new file mode 100644
index 000000000000..ebf5986c12ed
--- /dev/null
+++ b/include/asm-sparc64/mmzone.h
@@ -0,0 +1,17 @@
+#ifndef _SPARC64_MMZONE_H
+#define _SPARC64_MMZONE_H
+
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+
+extern struct pglist_data *node_data[];
+
+#define NODE_DATA(nid)          (node_data[nid])
+#define node_start_pfn(nid)     (NODE_DATA(nid)->node_start_pfn)
+#define node_end_pfn(nid)       (NODE_DATA(nid)->node_end_pfn)
+
+extern int numa_cpu_lookup_table[];
+extern cpumask_t numa_cpumask_lookup_table[];
+
+#endif /* CONFIG_NEED_MULTIPLE_NODES */
+
+#endif /* _SPARC64_MMZONE_H */
diff --git a/include/asm-sparc64/numnodes.h b/include/asm-sparc64/numnodes.h
deleted file mode 100644
index 017e7e74f5e7..000000000000
--- a/include/asm-sparc64/numnodes.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _SPARC64_NUMNODES_H
-#define _SPARC64_NUMNODES_H
-
-#define NODES_SHIFT     0
-
-#endif /* !(_SPARC64_NUMNODES_H) */
diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h
index 6da197803efc..b4b951d570bb 100644
--- a/include/asm-sparc64/ptrace.h
+++ b/include/asm-sparc64/ptrace.h
@@ -8,6 +8,8 @@
  * stack during a system call and basically all traps.
  */
 
+#define PT_REGS_MAGIC 0x57ac6c00
+
 #ifndef __ASSEMBLY__
 
 struct pt_regs {
@@ -16,7 +18,19 @@ struct pt_regs {
         unsigned long tpc;
         unsigned long tnpc;
         unsigned int y;
-        unsigned int fprs;
+
+        /* We encode a magic number, PT_REGS_MAGIC, along
+         * with the %tt (trap type) register value at trap
+         * entry time.  The magic number allows us to identify
+         * accurately a trap stack frame in the stack
+         * unwinder, and the %tt value allows us to test
+         * things like "in a system call" etc. for an arbitray
+         * process.
+         *
+         * The PT_REGS_MAGIC is choosen such that it can be
+         * loaded completely using just a sethi instruction.
+         */
+        unsigned int magic;
 };
 
 struct pt_regs32 {
@@ -147,7 +161,7 @@ extern void __show_regs(struct pt_regs *);
 #define PT_V9_TPC    0x88
 #define PT_V9_TNPC   0x90
 #define PT_V9_Y      0x98
-#define PT_V9_FPRS   0x9c
+#define PT_V9_MAGIC  0x9c
 #define PT_TSTATE       PT_V9_TSTATE
 #define PT_TPC          PT_V9_TPC
 #define PT_TNPC         PT_V9_TNPC
diff --git a/include/asm-sparc64/sparsemem.h b/include/asm-sparc64/sparsemem.h
index 77bcd2bfa53c..b99d4e4b6d28 100644
--- a/include/asm-sparc64/sparsemem.h
+++ b/include/asm-sparc64/sparsemem.h
@@ -3,7 +3,7 @@
 
 #ifdef __KERNEL__
 
-#define SECTION_SIZE_BITS       31
+#define SECTION_SIZE_BITS       30
 #define MAX_PHYSADDR_BITS       42
 #define MAX_PHYSMEM_BITS        42
 
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h
index c6b557034f68..001c04027c82 100644
--- a/include/asm-sparc64/topology.h
+++ b/include/asm-sparc64/topology.h
@@ -1,6 +1,77 @@
 #ifndef _ASM_SPARC64_TOPOLOGY_H
 #define _ASM_SPARC64_TOPOLOGY_H
 
+#ifdef CONFIG_NUMA
+
+#include <asm/mmzone.h>
+
+static inline int cpu_to_node(int cpu)
+{
+        return numa_cpu_lookup_table[cpu];
+}
+
+#define parent_node(node)       (node)
+
+static inline cpumask_t node_to_cpumask(int node)
+{
+        return numa_cpumask_lookup_table[node];
+}
+
+/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
+#define node_to_cpumask_ptr(v, node)            \
+                cpumask_t *v = &(numa_cpumask_lookup_table[node])
+
+#define node_to_cpumask_ptr_next(v, node)       \
+                           v = &(numa_cpumask_lookup_table[node])
+
+static inline int node_to_first_cpu(int node)
+{
+        cpumask_t tmp;
+        tmp = node_to_cpumask(node);
+        return first_cpu(tmp);
+}
+
+struct pci_bus;
+#ifdef CONFIG_PCI
+extern int pcibus_to_node(struct pci_bus *pbus);
+#else
+static inline int pcibus_to_node(struct pci_bus *pbus)
+{
+        return -1;
+}
+#endif
+
+#define pcibus_to_cpumask(bus)  \
+        (pcibus_to_node(bus) == -1 ? \
+         CPU_MASK_ALL : \
+         node_to_cpumask(pcibus_to_node(bus)))
+
+#define SD_NODE_INIT (struct sched_domain) {            \
+        .min_interval           = 8,                    \
+        .max_interval           = 32,                   \
+        .busy_factor            = 32,                   \
+        .imbalance_pct          = 125,                  \
+        .cache_nice_tries       = 2,                    \
+        .busy_idx               = 3,                    \
+        .idle_idx               = 2,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 1,                    \
+        .forkexec_idx           = 1,                    \
+        .flags                  = SD_LOAD_BALANCE       \
+                                | SD_BALANCE_FORK       \
+                                | SD_BALANCE_EXEC       \
+                                | SD_SERIALIZE          \
+                                | SD_WAKE_BALANCE,      \
+        .last_balance           = jiffies,              \
+        .balance_interval       = 1,                    \
+}
+
+#else /* CONFIG_NUMA */
+
+#include <asm-generic/topology.h>
+
+#endif /* !(CONFIG_NUMA) */
+
 #ifdef CONFIG_SMP
 #define topology_physical_package_id(cpu)       (cpu_data(cpu).proc_id)
 #define topology_core_id(cpu)                   (cpu_data(cpu).core_id)
@@ -10,8 +81,6 @@
 #define smt_capable()                           (sparc64_multi_core)
 #endif /* CONFIG_SMP */
 
-#include <asm-generic/topology.h>
-
 #define cpu_coregroup_map(cpu)                  (cpu_core_map[cpu])
 
 #endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h
index 7208a777750e..d3cc4eff39a6 100644
--- a/include/asm-sparc64/ttable.h
+++ b/include/asm-sparc64/ttable.h
@@ -28,7 +28,7 @@
         call    routine;                                \
          add    %sp, PTREGS_OFF, %o0;                   \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;                                    \
+         nop;                                           \
         nop;
 
 #define TRAP_7INSNS(routine)                            \
@@ -38,7 +38,7 @@
         call    routine;                                \
          add    %sp, PTREGS_OFF, %o0;                   \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;
+         nop;
 
 #define TRAP_SAVEFPU(routine)                           \
         sethi   %hi(109f), %g7;                         \
@@ -47,7 +47,7 @@
         call    routine;                                \
          add    %sp, PTREGS_OFF, %o0;                   \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;                                    \
+         nop;                                           \
         nop;
 
 #define TRAP_NOSAVE(routine)                            \
@@ -67,7 +67,7 @@
         call    routine;                                \
          add    %sp, PTREGS_OFF, %o0;                   \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;                                    \
+         nop;                                           \
         nop;
         
 #define TRAP_ARG(routine, arg)                          \
@@ -78,7 +78,7 @@
         call    routine;                                \
          mov    arg, %o1;                               \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;
+         nop;
         
 #define TRAPTL1_ARG(routine, arg)                       \
         sethi   %hi(109f), %g7;                         \
@@ -88,7 +88,7 @@
         call    routine;                                \
          mov    arg, %o1;                               \
         ba,pt   %xcc, rtrap;                            \
-         clr    %l6;
+         nop;
         
 #define SYSCALL_TRAP(routine, systbl)                   \
         sethi   %hi(109f), %g7;                         \
@@ -166,7 +166,7 @@
         ldx     [%sp + PTREGS_OFF + PT_V9_TNPC], %l1;                   \
         add     %l1, 4, %l2;                                            \
         stx     %l1, [%sp + PTREGS_OFF + PT_V9_TPC];                    \
-        ba,pt   %xcc, rtrap_clr_l6;                                     \
+        ba,pt   %xcc, rtrap;                                            \
          stx    %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
                 
 #ifdef CONFIG_KPROBES
diff --git a/include/asm-x86/fixmap.h b/include/asm-x86/fixmap.h
index 382eb271a892..5bd206973dca 100644
--- a/include/asm-x86/fixmap.h
+++ b/include/asm-x86/fixmap.h
@@ -1,5 +1,13 @@
+#ifndef _ASM_FIXMAP_H
+#define _ASM_FIXMAP_H
+
 #ifdef CONFIG_X86_32
 # include "fixmap_32.h"
 #else
 # include "fixmap_64.h"
 #endif
+
+#define clear_fixmap(idx)                       \
+        __set_fixmap(idx, 0, __pgprot(0))
+
+#endif
diff --git a/include/asm-x86/fixmap_32.h b/include/asm-x86/fixmap_32.h
index eb1665125c44..4b96148e90c1 100644
--- a/include/asm-x86/fixmap_32.h
+++ b/include/asm-x86/fixmap_32.h
@@ -10,8 +10,8 @@
  * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
  */
 
-#ifndef _ASM_FIXMAP_H
-#define _ASM_FIXMAP_H
+#ifndef _ASM_FIXMAP_32_H
+#define _ASM_FIXMAP_32_H
 
 
 /* used by vmalloc.c, vsyscall.lds.S.
@@ -121,9 +121,6 @@ extern void reserve_top_address(unsigned long reserve);
 #define set_fixmap_nocache(idx, phys)                   \
         __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
 
-#define clear_fixmap(idx)                       \
-        __set_fixmap(idx, 0, __pgprot(0))
-
 #define FIXADDR_TOP     ((unsigned long)__FIXADDR_TOP)
 
 #define __FIXADDR_SIZE  (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
diff --git a/include/asm-x86/fixmap_64.h b/include/asm-x86/fixmap_64.h
index f3d76858c0e6..355d26a75a82 100644
--- a/include/asm-x86/fixmap_64.h
+++ b/include/asm-x86/fixmap_64.h
@@ -8,8 +8,8 @@
  * Copyright (C) 1998 Ingo Molnar
  */
 
-#ifndef _ASM_FIXMAP_H
-#define _ASM_FIXMAP_H
+#ifndef _ASM_FIXMAP_64_H
+#define _ASM_FIXMAP_64_H
 
 #include <linux/kernel.h>
 #include <asm/apicdef.h>
diff --git a/include/asm-x86/io.h b/include/asm-x86/io.h
index 7b292d386713..d5b11f60dbd0 100644
--- a/include/asm-x86/io.h
+++ b/include/asm-x86/io.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_X86_IO_H
+#define _ASM_X86_IO_H
+
 #define ARCH_HAS_IOREMAP_WC
 
 #ifdef CONFIG_X86_32
@@ -5,7 +8,12 @@
 #else
 # include "io_64.h"
 #endif
+
+extern void *xlate_dev_mem_ptr(unsigned long phys);
+extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
+
 extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
                                 unsigned long prot_val);
 extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
 
+#endif /* _ASM_X86_IO_H */
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h
index 509045f5fda2..6e73467a4fb1 100644
--- a/include/asm-x86/io_32.h
+++ b/include/asm-x86/io_32.h
@@ -49,12 +49,6 @@
 #include <linux/vmalloc.h>
 
 /*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p)    __va(p)
-
-/*
  * Convert a virtual cached pointer to an uncached pointer
  */
 #define xlate_dev_kmem_ptr(p)   p
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
index c2f5eef47b88..0930bedf9e4d 100644
--- a/include/asm-x86/io_64.h
+++ b/include/asm-x86/io_64.h
@@ -308,12 +308,6 @@ extern int iommu_bio_merge;
 #define BIO_VMERGE_BOUNDARY iommu_bio_merge
 
 /*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p)    __va(p)
-
-/*
  * Convert a virtual cached pointer to an uncached pointer
  */
 #define xlate_dev_kmem_ptr(p)   p
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
index 6724a4bc6b7a..b381f4a5a0bd 100644
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -47,6 +47,7 @@
 #ifndef __ASSEMBLY__
 
 extern int page_is_ram(unsigned long pagenr);
+extern int devmem_is_allowed(unsigned long pagenr);
 
 extern unsigned long max_pfn_mapped;
 
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 3d419398499b..0f13b945e240 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -220,11 +220,13 @@ struct pv_mmu_ops {
                                  unsigned long va);
 
         /* Hooks for allocating/releasing pagetable pages */
-        void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
-        void (*alloc_pd)(struct mm_struct *mm, u32 pfn);
-        void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
-        void (*release_pt)(u32 pfn);
-        void (*release_pd)(u32 pfn);
+        void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
+        void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
+        void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
+        void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
+        void (*release_pte)(u32 pfn);
+        void (*release_pmd)(u32 pfn);
+        void (*release_pud)(u32 pfn);
 
         /* Pagetable manipulation functions */
         void (*set_pte)(pte_t *ptep, pte_t pteval);
@@ -910,28 +912,37 @@ static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
 }
 
-static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
+static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
 {
-        PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
+        PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 }
-static inline void paravirt_release_pt(unsigned pfn)
+static inline void paravirt_release_pte(unsigned pfn)
 {
-        PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
+        PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 }
 
-static inline void paravirt_alloc_pd(struct mm_struct *mm, unsigned pfn)
+static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
 {
-        PVOP_VCALL2(pv_mmu_ops.alloc_pd, mm, pfn);
+        PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 }
 
-static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
-                                           unsigned start, unsigned count)
+static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
+                                            unsigned start, unsigned count)
 {
-        PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
+        PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
 }
-static inline void paravirt_release_pd(unsigned pfn)
+static inline void paravirt_release_pmd(unsigned pfn)
 {
-        PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
+        PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
+}
+
+static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
+{
+        PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
+}
+static inline void paravirt_release_pud(unsigned pfn)
+{
+        PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 }
 
 #ifdef CONFIG_HIGHPTE
diff --git a/include/asm-x86/pgalloc.h b/include/asm-x86/pgalloc.h
index 5886eed05886..91e4641f3f31 100644
--- a/include/asm-x86/pgalloc.h
+++ b/include/asm-x86/pgalloc.h
@@ -1,5 +1,110 @@
-#ifdef CONFIG_X86_32
-# include "pgalloc_32.h"
+#ifndef _ASM_X86_PGALLOC_H
+#define _ASM_X86_PGALLOC_H
+
+#include <linux/threads.h>
+#include <linux/mm.h>           /* for struct page */
+#include <linux/pagemap.h>
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
 #else
-# include "pgalloc_64.h"
+static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)  {}
+static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)  {}
+static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
+                                            unsigned long start, unsigned long count) {}
+static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)  {}
+static inline void paravirt_release_pte(unsigned long pfn) {}
+static inline void paravirt_release_pmd(unsigned long pfn) {}
+static inline void paravirt_release_pud(unsigned long pfn) {}
 #endif
+
+/*
+ * Allocate and free page tables.
+ */
+extern pgd_t *pgd_alloc(struct mm_struct *);
+extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
+
+extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
+extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
+
+/* Should really implement gc for free page table pages. This could be
+   done with a reference count in struct page. */
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
+        free_page((unsigned long)pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, struct page *pte)
+{
+        __free_page(pte);
+}
+
+extern void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte);
+
+static inline void pmd_populate_kernel(struct mm_struct *mm,
+                                       pmd_t *pmd, pte_t *pte)
+{
+        paravirt_alloc_pte(mm, __pa(pte) >> PAGE_SHIFT);
+        set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE));
+}
+
+static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
+                                struct page *pte)
+{
+        unsigned long pfn = page_to_pfn(pte);
+
+        paravirt_alloc_pte(mm, pfn);
+        set_pmd(pmd, __pmd(((pteval_t)pfn << PAGE_SHIFT) | _PAGE_TABLE));
+}
+
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+#if PAGETABLE_LEVELS > 2
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+        return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
+}
+
+static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
+{
+        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
+        free_page((unsigned long)pmd);
+}
+
+extern void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd);
+
+#ifdef CONFIG_X86_PAE
+extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
+#else   /* !CONFIG_X86_PAE */
+static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
+{
+        paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
+        set_pud(pud, __pud(_PAGE_TABLE | __pa(pmd)));
+}
+#endif  /* CONFIG_X86_PAE */
+
+#if PAGETABLE_LEVELS > 3
+static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
+{
+        paravirt_alloc_pud(mm, __pa(pud) >> PAGE_SHIFT);
+        set_pgd(pgd, __pgd(_PAGE_TABLE | __pa(pud)));
+}
+
+static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+        return (pud_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
+}
+
+static inline void pud_free(struct mm_struct *mm, pud_t *pud)
+{
+        BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
+        free_page((unsigned long)pud);
+}
+
+extern void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pud);
+#endif  /* PAGETABLE_LEVELS > 3 */
+#endif  /* PAGETABLE_LEVELS > 2 */
+
+#endif  /* _ASM_X86_PGALLOC_H */
diff --git a/include/asm-x86/pgalloc_32.h b/include/asm-x86/pgalloc_32.h
deleted file mode 100644
index 6bea6e5b5ee5..000000000000
--- a/include/asm-x86/pgalloc_32.h
+++ /dev/null
@@ -1,95 +0,0 @@
-#ifndef _I386_PGALLOC_H
-#define _I386_PGALLOC_H
-
-#include <linux/threads.h>
-#include <linux/mm.h>           /* for struct page */
-#include <linux/pagemap.h>
-#include <asm/tlb.h>
-#include <asm-generic/tlb.h>
-
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else
-#define paravirt_alloc_pt(mm, pfn) do { } while (0)
-#define paravirt_alloc_pd(mm, pfn) do { } while (0)
-#define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) do { } while (0)
-#define paravirt_release_pt(pfn) do { } while (0)
-#define paravirt_release_pd(pfn) do { } while (0)
-#endif
-
-static inline void pmd_populate_kernel(struct mm_struct *mm,
-                                       pmd_t *pmd, pte_t *pte)
-{
-        paravirt_alloc_pt(mm, __pa(pte) >> PAGE_SHIFT);
-        set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE));
-}
-
-static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
-{
-        unsigned long pfn = page_to_pfn(pte);
-
-        paravirt_alloc_pt(mm, pfn);
-        set_pmd(pmd, __pmd(((pteval_t)pfn << PAGE_SHIFT) | _PAGE_TABLE));
-}
-#define pmd_pgtable(pmd) pmd_page(pmd)
-
-/*
- * Allocate and free page tables.
- */
-extern pgd_t *pgd_alloc(struct mm_struct *);
-extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
-
-extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
-extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
-
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-        free_page((unsigned long)pte);
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
-{
-        pgtable_page_dtor(pte);
-        __free_page(pte);
-}
-
-
-extern void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte);
-
-#ifdef CONFIG_X86_PAE
-/*
- * In the PAE case we free the pmds as part of the pgd.
- */
-static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
-{
-        return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
-}
-
-static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
-{
-        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
-        free_page((unsigned long)pmd);
-}
-
-extern void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd);
-
-static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
-{
-        paravirt_alloc_pd(mm, __pa(pmd) >> PAGE_SHIFT);
-
-        /* Note: almost everything apart from _PAGE_PRESENT is
-           reserved at the pmd (PDPT) level. */
-        set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
-
-        /*
-         * According to Intel App note "TLBs, Paging-Structure Caches,
-         * and Their Invalidation", April 2007, document 317080-001,
-         * section 8.1: in PAE mode we explicitly have to flush the
-         * TLB via cr3 if the top-level pgd is changed...
-         */
-        if (mm == current->active_mm)
-                write_cr3(read_cr3());
-}
-#endif  /* CONFIG_X86_PAE */
-
-#endif /* _I386_PGALLOC_H */
diff --git a/include/asm-x86/pgalloc_64.h b/include/asm-x86/pgalloc_64.h
deleted file mode 100644
index 8d6722320dcc..000000000000
--- a/include/asm-x86/pgalloc_64.h
+++ /dev/null
@@ -1,133 +0,0 @@
-#ifndef _X86_64_PGALLOC_H
-#define _X86_64_PGALLOC_H
-
-#include <asm/pda.h>
-#include <linux/threads.h>
-#include <linux/mm.h>
-
-#define pmd_populate_kernel(mm, pmd, pte) \
-                set_pmd(pmd, __pmd(_PAGE_TABLE | __pa(pte)))
-#define pud_populate(mm, pud, pmd) \
-                set_pud(pud, __pud(_PAGE_TABLE | __pa(pmd)))
-#define pgd_populate(mm, pgd, pud) \
-                set_pgd(pgd, __pgd(_PAGE_TABLE | __pa(pud)))
-
-#define pmd_pgtable(pmd) pmd_page(pmd)
-
-static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
-{
-        set_pmd(pmd, __pmd(_PAGE_TABLE | (page_to_pfn(pte) << PAGE_SHIFT)));
-}
-
-static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
-{
-        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
-        free_page((unsigned long)pmd);
-}
-
-static inline pmd_t *pmd_alloc_one (struct mm_struct *mm, unsigned long addr)
-{
-        return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
-}
-
-static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
-{
-        return (pud_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
-}
-
-static inline void pud_free(struct mm_struct *mm, pud_t *pud)
-{
-        BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
-        free_page((unsigned long)pud);
-}
-
-static inline void pgd_list_add(pgd_t *pgd)
-{
-        struct page *page = virt_to_page(pgd);
-        unsigned long flags;
-
-        spin_lock_irqsave(&pgd_lock, flags);
-        list_add(&page->lru, &pgd_list);
-        spin_unlock_irqrestore(&pgd_lock, flags);
-}
-
-static inline void pgd_list_del(pgd_t *pgd)
-{
-        struct page *page = virt_to_page(pgd);
-        unsigned long flags;
-
-        spin_lock_irqsave(&pgd_lock, flags);
-        list_del(&page->lru);
-        spin_unlock_irqrestore(&pgd_lock, flags);
-}
-
-static inline pgd_t *pgd_alloc(struct mm_struct *mm)
-{
-        unsigned boundary;
-        pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
-        if (!pgd)
-                return NULL;
-        pgd_list_add(pgd);
-        /*
-         * Copy kernel pointers in from init.
-         * Could keep a freelist or slab cache of those because the kernel
-         * part never changes.
-         */
-        boundary = pgd_index(__PAGE_OFFSET);
-        memset(pgd, 0, boundary * sizeof(pgd_t));
-        memcpy(pgd + boundary,
-               init_level4_pgt + boundary,
-               (PTRS_PER_PGD - boundary) * sizeof(pgd_t));
-        return pgd;
-}
-
-static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
-{
-        BUG_ON((unsigned long)pgd & (PAGE_SIZE-1));
-        pgd_list_del(pgd);
-        free_page((unsigned long)pgd);
-}
-
-static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
-{
-        return (pte_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
-}
-
-static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
-{
-        struct page *page;
-        void *p;
-
-        p = (void *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
-        if (!p)
-                return NULL;
-        page = virt_to_page(p);
-        pgtable_page_ctor(page);
-        return page;
-}
-
-/* Should really implement gc for free page table pages. This could be
-   done with a reference count in struct page. */
-
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-        BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
-        free_page((unsigned long)pte); 
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
-{
-        pgtable_page_dtor(pte);
-        __free_page(pte);
-} 
-
-#define __pte_free_tlb(tlb,pte)                         \
-do {                                                    \
-        pgtable_page_dtor((pte));                               \
-        tlb_remove_page((tlb), (pte));                  \
-} while (0)
-
-#define __pmd_free_tlb(tlb,x)   tlb_remove_page((tlb),virt_to_page(x))
-#define __pud_free_tlb(tlb,x)   tlb_remove_page((tlb),virt_to_page(x))
-
-#endif /* _X86_64_PGALLOC_H */
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index f1d9f4a03f6f..a496d6335d3b 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_X86_PGTABLE_H
 #define _ASM_X86_PGTABLE_H
 
-#define USER_PTRS_PER_PGD       ((TASK_SIZE-1)/PGDIR_SIZE+1)
 #define FIRST_USER_ADDRESS      0
 
 #define _PAGE_BIT_PRESENT       0       /* is present */
@@ -289,6 +288,15 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 
 #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
 
+#ifndef __ASSEMBLY__
+#define __HAVE_PHYS_MEM_ACCESS_PROT
+struct file;
+pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+                              unsigned long size, pgprot_t vma_prot);
+int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
+                              unsigned long size, pgprot_t *vma_prot);
+#endif
+
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else  /* !CONFIG_PARAVIRT */
@@ -330,6 +338,9 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 # include "pgtable_64.h"
 #endif
 
+#define KERNEL_PGD_BOUNDARY     pgd_index(PAGE_OFFSET)
+#define KERNEL_PGD_PTRS         (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
+
 #ifndef __ASSEMBLY__
 
 enum {
@@ -389,37 +400,17 @@ static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
  * bit at the same time.
  */
 #define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-#define ptep_set_access_flags(vma, address, ptep, entry, dirty)         \
-({                                                                      \
-        int __changed = !pte_same(*(ptep), entry);                      \
-        if (__changed && dirty) {                                       \
-                *ptep = entry;                                          \
-                pte_update_defer((vma)->vm_mm, (address), (ptep));      \
-                flush_tlb_page(vma, address);                           \
-        }                                                               \
-        __changed;                                                      \
-})
+extern int ptep_set_access_flags(struct vm_area_struct *vma,
+                                 unsigned long address, pte_t *ptep,
+                                 pte_t entry, int dirty);
 
 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define ptep_test_and_clear_young(vma, addr, ptep) ({                   \
-        int __ret = 0;                                                  \
-        if (pte_young(*(ptep)))                                         \
-                __ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,          \
-                                           &(ptep)->pte);               \
-        if (__ret)                                                      \
-                pte_update((vma)->vm_mm, addr, ptep);                   \
-        __ret;                                                          \
-})
+extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
+                                     unsigned long addr, pte_t *ptep);
 
 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
-#define ptep_clear_flush_young(vma, address, ptep)                      \
-({                                                                      \
-        int __young;                                                    \
-        __young = ptep_test_and_clear_young((vma), (address), (ptep));  \
-        if (__young)                                                    \
-                flush_tlb_page(vma, address);                           \
-        __young;                                                        \
-})
+extern int ptep_clear_flush_young(struct vm_area_struct *vma,
+                                  unsigned long address, pte_t *ptep);
 
 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
@@ -456,6 +447,22 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm,
         pte_update(mm, addr, ptep);
 }
 
+/*
+ * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
+ *
+ *  dst - pointer to pgd range anwhere on a pgd page
+ *  src - ""
+ *  count - the number of pgds to copy.
+ *
+ * dst and src can be on the same page, but the range must not overlap,
+ * and must not cross a page boundary.
+ */
+static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
+{
+       memcpy(dst, src, count * sizeof(pgd_t));
+}
+
+
 #include <asm-generic/pgtable.h>
 #endif  /* __ASSEMBLY__ */
 
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h
index c4a643674458..168b6447cf18 100644
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -48,9 +48,6 @@ void paging_init(void);
 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
 
-#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
-#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
-
 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  * current 8MB value just means that there will be a 8MB "hole" after the
  * physical memory until the kernel virtual memory starts.  That means that
@@ -109,21 +106,6 @@ extern int pmd_bad(pmd_t pmd);
 #endif
 
 /*
- * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
- *
- *  dst - pointer to pgd range anwhere on a pgd page
- *  src - ""
- *  count - the number of pgds to copy.
- *
- * dst and src can be on the same page, but the range must not overlap,
- * and must not cross a page boundary.
- */
-static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
-{
-       memcpy(dst, src, count * sizeof(pgd_t));
-}
-
-/*
  * Macro to mark a page protection value as "uncacheable".
  * On processors which do not support it, this is a no-op.
  */
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index 9fd87d0b6477..a3bbf8766c1d 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -24,7 +24,7 @@ extern void paging_init(void);
 
 #endif /* !__ASSEMBLY__ */
 
-#define SHARED_KERNEL_PMD       1
+#define SHARED_KERNEL_PMD       0
 
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 62ebdec394b9..1ebaa5cd3112 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -199,7 +199,6 @@ static inline int hard_smp_processor_id(void)
 #ifdef CONFIG_HOTPLUG_CPU
 extern void cpu_exit_clear(void);
 extern void cpu_uninit(void);
-extern void remove_siblinginfo(int cpu);
 #endif
 
 extern void smp_alloc_memory(void);
diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h
index 0434bd8349a7..d2d8eb5b55f5 100644
--- a/include/asm-x86/tsc.h
+++ b/include/asm-x86/tsc.h
@@ -18,7 +18,6 @@ extern unsigned int cpu_khz;
 extern unsigned int tsc_khz;
 
 extern void disable_TSC(void);
-extern void enable_TSC(void);
 
 static inline cycles_t get_cycles(void)
 {
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
new file mode 100644
index 000000000000..596312a7bfc9
--- /dev/null
+++ b/include/asm-x86/xen/events.h
@@ -0,0 +1,22 @@
+#ifndef __XEN_EVENTS_H
+#define __XEN_EVENTS_H
+
+enum ipi_vector {
+        XEN_RESCHEDULE_VECTOR,
+        XEN_CALL_FUNCTION_VECTOR,
+
+        XEN_NR_IPIS,
+};
+
+static inline int xen_irqs_disabled(struct pt_regs *regs)
+{
+        return raw_irqs_disabled_flags(regs->flags);
+}
+
+static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
+{
+        regs->orig_ax = ~irq;
+        do_IRQ(regs);
+}
+
+#endif /* __XEN_EVENTS_H */
diff --git a/include/asm-x86/xen/grant_table.h b/include/asm-x86/xen/grant_table.h
new file mode 100644
index 000000000000..2444d4593a3b
--- /dev/null
+++ b/include/asm-x86/xen/grant_table.h
@@ -0,0 +1,7 @@
+#ifndef __XEN_GRANT_TABLE_H
+#define __XEN_GRANT_TABLE_H
+
+#define xen_alloc_vm_area(size) alloc_vm_area(size)
+#define xen_free_vm_area(area)  free_vm_area(area)
+
+#endif /* __XEN_GRANT_TABLE_H */
diff --git a/include/asm-x86/xen/hypercall.h b/include/asm-x86/xen/hypercall.h
index bc0ee7d961ca..c2ccd997ed35 100644
--- a/include/asm-x86/xen/hypercall.h
+++ b/include/asm-x86/xen/hypercall.h
@@ -164,6 +164,12 @@ HYPERVISOR_set_callbacks(unsigned long event_selector,
 }
 
 static inline int
+HYPERVISOR_callback_op(int cmd, void *arg)
+{
+        return _hypercall2(int, callback_op, cmd, arg);
+}
+
+static inline int
 HYPERVISOR_fpu_taskswitch(int set)
 {
         return _hypercall1(int, fpu_taskswitch, set);
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h
index 165c3968e138..6227000a1e84 100644
--- a/include/asm-x86/xen/interface.h
+++ b/include/asm-x86/xen/interface.h
@@ -22,6 +22,30 @@
 #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
 #define GUEST_HANDLE(name)        __guest_handle_ ## name
 
+#ifdef __XEN__
+#if defined(__i386__)
+#define set_xen_guest_handle(hnd, val)                  \
+        do {                                            \
+                if (sizeof(hnd) == 8)                   \
+                        *(uint64_t *)&(hnd) = 0;        \
+                (hnd).p = val;                          \
+        } while (0)
+#elif defined(__x86_64__)
+#define set_xen_guest_handle(hnd, val)  do { (hnd).p = val; } while (0)
+#endif
+#else
+#if defined(__i386__)
+#define set_xen_guest_handle(hnd, val)                  \
+        do {                                            \
+                if (sizeof(hnd) == 8)                   \
+                        *(uint64_t *)&(hnd) = 0;        \
+                (hnd) = val;                            \
+        } while (0)
+#elif defined(__x86_64__)
+#define set_xen_guest_handle(hnd, val)  do { (hnd) = val; } while (0)
+#endif
+#endif
+
 #ifndef __ASSEMBLY__
 /* Guest handles for primitive C types. */
 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
@@ -171,6 +195,10 @@ struct arch_vcpu_info {
     unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
 };
 
+struct xen_callback {
+        unsigned long cs;
+        unsigned long eip;
+};
 #endif /* !__ASSEMBLY__ */
 
 /*
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
new file mode 100644
index 000000000000..01799305f02a
--- /dev/null
+++ b/include/asm-x86/xen/page.h
@@ -0,0 +1,168 @@
+#ifndef __XEN_PAGE_H
+#define __XEN_PAGE_H
+
+#include <linux/pfn.h>
+
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+#include <xen/features.h>
+
+/* Xen machine address */
+typedef struct xmaddr {
+        phys_addr_t maddr;
+} xmaddr_t;
+
+/* Xen pseudo-physical address */
+typedef struct xpaddr {
+        phys_addr_t paddr;
+} xpaddr_t;
+
+#define XMADDR(x)       ((xmaddr_t) { .maddr = (x) })
+#define XPADDR(x)       ((xpaddr_t) { .paddr = (x) })
+
+/**** MACHINE <-> PHYSICAL CONVERSION MACROS ****/
+#define INVALID_P2M_ENTRY       (~0UL)
+#define FOREIGN_FRAME_BIT       (1UL<<31)
+#define FOREIGN_FRAME(m)        ((m) | FOREIGN_FRAME_BIT)
+
+extern unsigned long *phys_to_machine_mapping;
+
+static inline unsigned long pfn_to_mfn(unsigned long pfn)
+{
+        if (xen_feature(XENFEAT_auto_translated_physmap))
+                return pfn;
+
+        return phys_to_machine_mapping[(unsigned int)(pfn)] &
+                ~FOREIGN_FRAME_BIT;
+}
+
+static inline int phys_to_machine_mapping_valid(unsigned long pfn)
+{
+        if (xen_feature(XENFEAT_auto_translated_physmap))
+                return 1;
+
+        return (phys_to_machine_mapping[pfn] != INVALID_P2M_ENTRY);
+}
+
+static inline unsigned long mfn_to_pfn(unsigned long mfn)
+{
+        unsigned long pfn;
+
+        if (xen_feature(XENFEAT_auto_translated_physmap))
+                return mfn;
+
+#if 0
+        if (unlikely((mfn >> machine_to_phys_order) != 0))
+                return max_mapnr;
+#endif
+
+        pfn = 0;
+        /*
+         * The array access can fail (e.g., device space beyond end of RAM).
+         * In such cases it doesn't matter what we return (we return garbage),
+         * but we must handle the fault without crashing!
+         */
+        __get_user(pfn, &machine_to_phys_mapping[mfn]);
+
+        return pfn;
+}
+
+static inline xmaddr_t phys_to_machine(xpaddr_t phys)
+{
+        unsigned offset = phys.paddr & ~PAGE_MASK;
+        return XMADDR(PFN_PHYS((u64)pfn_to_mfn(PFN_DOWN(phys.paddr))) | offset);
+}
+
+static inline xpaddr_t machine_to_phys(xmaddr_t machine)
+{
+        unsigned offset = machine.maddr & ~PAGE_MASK;
+        return XPADDR(PFN_PHYS((u64)mfn_to_pfn(PFN_DOWN(machine.maddr))) | offset);
+}
+
+/*
+ * We detect special mappings in one of two ways:
+ *  1. If the MFN is an I/O page then Xen will set the m2p entry
+ *     to be outside our maximum possible pseudophys range.
+ *  2. If the MFN belongs to a different domain then we will certainly
+ *     not have MFN in our p2m table. Conversely, if the page is ours,
+ *     then we'll have p2m(m2p(MFN))==MFN.
+ * If we detect a special mapping then it doesn't have a 'struct page'.
+ * We force !pfn_valid() by returning an out-of-range pointer.
+ *
+ * NB. These checks require that, for any MFN that is not in our reservation,
+ * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
+ * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
+ * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
+ *
+ * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
+ *      use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
+ *      require. In all the cases we care about, the FOREIGN_FRAME bit is
+ *      masked (e.g., pfn_to_mfn()) so behaviour there is correct.
+ */
+static inline unsigned long mfn_to_local_pfn(unsigned long mfn)
+{
+        extern unsigned long max_mapnr;
+        unsigned long pfn = mfn_to_pfn(mfn);
+        if ((pfn < max_mapnr)
+            && !xen_feature(XENFEAT_auto_translated_physmap)
+            && (phys_to_machine_mapping[pfn] != mfn))
+                return max_mapnr; /* force !pfn_valid() */
+        return pfn;
+}
+
+static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
+{
+        if (xen_feature(XENFEAT_auto_translated_physmap)) {
+                BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
+                return;
+        }
+        phys_to_machine_mapping[pfn] = mfn;
+}
+
+/* VIRT <-> MACHINE conversion */
+#define virt_to_machine(v)      (phys_to_machine(XPADDR(__pa(v))))
+#define virt_to_mfn(v)          (pfn_to_mfn(PFN_DOWN(__pa(v))))
+#define mfn_to_virt(m)          (__va(mfn_to_pfn(m) << PAGE_SHIFT))
+
+static inline unsigned long pte_mfn(pte_t pte)
+{
+        return (pte.pte & ~_PAGE_NX) >> PAGE_SHIFT;
+}
+
+static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
+{
+        pte_t pte;
+
+        pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) |
+                (pgprot_val(pgprot) & __supported_pte_mask);
+
+        return pte;
+}
+
+static inline pteval_t pte_val_ma(pte_t pte)
+{
+        return pte.pte;
+}
+
+static inline pte_t __pte_ma(pteval_t x)
+{
+        return (pte_t) { .pte = x };
+}
+
+#ifdef CONFIG_X86_PAE
+#define pmd_val_ma(v) ((v).pmd)
+#define pud_val_ma(v) ((v).pgd.pgd)
+#define __pmd_ma(x)     ((pmd_t) { (x) } )
+#else  /* !X86_PAE */
+#define pmd_val_ma(v)   ((v).pud.pgd.pgd)
+#endif  /* CONFIG_X86_PAE */
+
+#define pgd_val_ma(x)   ((x).pgd)
+
+
+xmaddr_t arbitrary_virt_to_machine(unsigned long address);
+void make_lowmem_page_readonly(void *vaddr);
+void make_lowmem_page_readwrite(void *vaddr);
+
+#endif /* __XEN_PAGE_H */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index fabd16d03a27..cfb1627ac51c 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -301,7 +301,9 @@ extern int d_validate(struct dentry *, struct dentry *);
  */
 extern char *dynamic_dname(struct dentry *, char *, int, const char *, ...);
 
+extern char *__d_path(const struct path *path, struct path *root, char *, int);
 extern char *d_path(struct path *, char *, int);
+extern char *dentry_path(struct dentry *, char *, int);
 
 /* Allocation counts.. */
 
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index cb784579956b..ad3b787479a4 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2001 Sistina Software (UK) Limited.
- * Copyright (C) 2004 Red Hat, Inc. All rights reserved.
+ * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
  *
  * This file is released under the LGPL.
  */
@@ -10,6 +10,8 @@
 
 #ifdef __KERNEL__
 
+#include <linux/bio.h>
+
 struct dm_target;
 struct dm_table;
 struct dm_dev;
@@ -250,11 +252,97 @@ void dm_table_event(struct dm_table *t);
  */
 int dm_swap_table(struct mapped_device *md, struct dm_table *t);
 
+/*-----------------------------------------------------------------
+ * Macros.
+ *---------------------------------------------------------------*/
+#define DM_NAME "device-mapper"
+
+#define DMERR(f, arg...) \
+        printk(KERN_ERR DM_NAME ": " DM_MSG_PREFIX ": " f "\n", ## arg)
+#define DMERR_LIMIT(f, arg...) \
+        do { \
+                if (printk_ratelimit()) \
+                        printk(KERN_ERR DM_NAME ": " DM_MSG_PREFIX ": " \
+                               f "\n", ## arg); \
+        } while (0)
+
+#define DMWARN(f, arg...) \
+        printk(KERN_WARNING DM_NAME ": " DM_MSG_PREFIX ": " f "\n", ## arg)
+#define DMWARN_LIMIT(f, arg...) \
+        do { \
+                if (printk_ratelimit()) \
+                        printk(KERN_WARNING DM_NAME ": " DM_MSG_PREFIX ": " \
+                               f "\n", ## arg); \
+        } while (0)
+
+#define DMINFO(f, arg...) \
+        printk(KERN_INFO DM_NAME ": " DM_MSG_PREFIX ": " f "\n", ## arg)
+#define DMINFO_LIMIT(f, arg...) \
+        do { \
+                if (printk_ratelimit()) \
+                        printk(KERN_INFO DM_NAME ": " DM_MSG_PREFIX ": " f \
+                               "\n", ## arg); \
+        } while (0)
+
+#ifdef CONFIG_DM_DEBUG
+#  define DMDEBUG(f, arg...) \
+        printk(KERN_DEBUG DM_NAME ": " DM_MSG_PREFIX " DEBUG: " f "\n", ## arg)
+#  define DMDEBUG_LIMIT(f, arg...) \
+        do { \
+                if (printk_ratelimit()) \
+                        printk(KERN_DEBUG DM_NAME ": " DM_MSG_PREFIX ": " f \
+                               "\n", ## arg); \
+        } while (0)
+#else
+#  define DMDEBUG(f, arg...) do {} while (0)
+#  define DMDEBUG_LIMIT(f, arg...) do {} while (0)
+#endif
+
+#define DMEMIT(x...) sz += ((sz >= maxlen) ? \
+                          0 : scnprintf(result + sz, maxlen - sz, x))
+
+#define SECTOR_SHIFT 9
+
+/*
+ * Definitions of return values from target end_io function.
+ */
+#define DM_ENDIO_INCOMPLETE     1
+#define DM_ENDIO_REQUEUE        2
+
+/*
+ * Definitions of return values from target map function.
+ */
+#define DM_MAPIO_SUBMITTED      0
+#define DM_MAPIO_REMAPPED       1
+#define DM_MAPIO_REQUEUE        DM_ENDIO_REQUEUE
+
+/*
+ * Ceiling(n / sz)
+ */
+#define dm_div_up(n, sz) (((n) + (sz) - 1) / (sz))
+
+#define dm_sector_div_up(n, sz) ( \
+{ \
+        sector_t _r = ((n) + (sz) - 1); \
+        sector_div(_r, (sz)); \
+        _r; \
+} \
+)
+
 /*
- * Prepare a table for a device that will error all I/O.
- * To make it active, call dm_suspend(), dm_swap_table() then dm_resume().
+ * ceiling(n / size) * size
  */
-int dm_create_error_table(struct dm_table **result, struct mapped_device *md);
+#define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz))
+
+static inline sector_t to_sector(unsigned long n)
+{
+        return (n >> SECTOR_SHIFT);
+}
+
+static inline unsigned long to_bytes(sector_t n)
+{
+        return (n << SECTOR_SHIFT);
+}
 
 #endif  /* __KERNEL__ */
 #endif  /* _LINUX_DEVICE_MAPPER_H */
diff --git a/include/linux/dm-dirty-log.h b/include/linux/dm-dirty-log.h
new file mode 100644
index 000000000000..600c5fb2daad
--- /dev/null
+++ b/include/linux/dm-dirty-log.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2003 Sistina Software
+ * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
+ *
+ * Device-Mapper dirty region log.
+ *
+ * This file is released under the LGPL.
+ */
+
+#ifndef _LINUX_DM_DIRTY_LOG
+#define _LINUX_DM_DIRTY_LOG
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <linux/device-mapper.h>
+
+typedef sector_t region_t;
+
+struct dm_dirty_log_type;
+
+struct dm_dirty_log {
+        struct dm_dirty_log_type *type;
+        void *context;
+};
+
+struct dm_dirty_log_type {
+        const char *name;
+        struct module *module;
+
+        int (*ctr)(struct dm_dirty_log *log, struct dm_target *ti,
+                   unsigned argc, char **argv);
+        void (*dtr)(struct dm_dirty_log *log);
+
+        /*
+         * There are times when we don't want the log to touch
+         * the disk.
+         */
+        int (*presuspend)(struct dm_dirty_log *log);
+        int (*postsuspend)(struct dm_dirty_log *log);
+        int (*resume)(struct dm_dirty_log *log);
+
+        /*
+         * Retrieves the smallest size of region that the log can
+         * deal with.
+         */
+        uint32_t (*get_region_size)(struct dm_dirty_log *log);
+
+        /*
+         * A predicate to say whether a region is clean or not.
+         * May block.
+         */
+        int (*is_clean)(struct dm_dirty_log *log, region_t region);
+
+        /*
+         *  Returns: 0, 1, -EWOULDBLOCK, < 0
+         *
+         * A predicate function to check the area given by
+         * [sector, sector + len) is in sync.
+         *
+         * If -EWOULDBLOCK is returned the state of the region is
+         * unknown, typically this will result in a read being
+         * passed to a daemon to deal with, since a daemon is
+         * allowed to block.
+         */
+        int (*in_sync)(struct dm_dirty_log *log, region_t region,
+                       int can_block);
+
+        /*
+         * Flush the current log state (eg, to disk).  This
+         * function may block.
+         */
+        int (*flush)(struct dm_dirty_log *log);
+
+        /*
+         * Mark an area as clean or dirty.  These functions may
+         * block, though for performance reasons blocking should
+         * be extremely rare (eg, allocating another chunk of
+         * memory for some reason).
+         */
+        void (*mark_region)(struct dm_dirty_log *log, region_t region);
+        void (*clear_region)(struct dm_dirty_log *log, region_t region);
+
+        /*
+         * Returns: <0 (error), 0 (no region), 1 (region)
+         *
+         * The mirrord will need perform recovery on regions of
+         * the mirror that are in the NOSYNC state.  This
+         * function asks the log to tell the caller about the
+         * next region that this machine should recover.
+         *
+         * Do not confuse this function with 'in_sync()', one
+         * tells you if an area is synchronised, the other
+         * assigns recovery work.
+        */
+        int (*get_resync_work)(struct dm_dirty_log *log, region_t *region);
+
+        /*
+         * This notifies the log that the resync status of a region
+         * has changed.  It also clears the region from the recovering
+         * list (if present).
+         */
+        void (*set_region_sync)(struct dm_dirty_log *log,
+                                region_t region, int in_sync);
+
+        /*
+         * Returns the number of regions that are in sync.
+         */
+        region_t (*get_sync_count)(struct dm_dirty_log *log);
+
+        /*
+         * Support function for mirror status requests.
+         */
+        int (*status)(struct dm_dirty_log *log, status_type_t status_type,
+                      char *result, unsigned maxlen);
+};
+
+int dm_dirty_log_type_register(struct dm_dirty_log_type *type);
+int dm_dirty_log_type_unregister(struct dm_dirty_log_type *type);
+
+/*
+ * Make sure you use these two functions, rather than calling
+ * type->constructor/destructor() directly.
+ */
+struct dm_dirty_log *dm_dirty_log_create(const char *type_name,
+                                         struct dm_target *ti,
+                                         unsigned argc, char **argv);
+void dm_dirty_log_destroy(struct dm_dirty_log *log);
+
+#endif  /* __KERNEL__ */
+#endif  /* _LINUX_DM_DIRTY_LOG_H */
diff --git a/include/linux/dm-io.h b/include/linux/dm-io.h
new file mode 100644
index 000000000000..b6bf17ee2f61
--- /dev/null
+++ b/include/linux/dm-io.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2003 Sistina Software
+ * Copyright (C) 2004 - 2008 Red Hat, Inc. All rights reserved.
+ *
+ * Device-Mapper low-level I/O.
+ *
+ * This file is released under the GPL.
+ */
+
+#ifndef _LINUX_DM_IO_H
+#define _LINUX_DM_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+
+struct dm_io_region {
+        struct block_device *bdev;
+        sector_t sector;
+        sector_t count;         /* If this is zero the region is ignored. */
+};
+
+struct page_list {
+        struct page_list *next;
+        struct page *page;
+};
+
+typedef void (*io_notify_fn)(unsigned long error, void *context);
+
+enum dm_io_mem_type {
+        DM_IO_PAGE_LIST,/* Page list */
+        DM_IO_BVEC,     /* Bio vector */
+        DM_IO_VMA,      /* Virtual memory area */
+        DM_IO_KMEM,     /* Kernel memory */
+};
+
+struct dm_io_memory {
+        enum dm_io_mem_type type;
+
+        union {
+                struct page_list *pl;
+                struct bio_vec *bvec;
+                void *vma;
+                void *addr;
+        } ptr;
+
+        unsigned offset;
+};
+
+struct dm_io_notify {
+        io_notify_fn fn;        /* Callback for asynchronous requests */
+        void *context;          /* Passed to callback */
+};
+
+/*
+ * IO request structure
+ */
+struct dm_io_client;
+struct dm_io_request {
+        int bi_rw;                      /* READ|WRITE - not READA */
+        struct dm_io_memory mem;        /* Memory to use for io */
+        struct dm_io_notify notify;     /* Synchronous if notify.fn is NULL */
+        struct dm_io_client *client;    /* Client memory handler */
+};
+
+/*
+ * For async io calls, users can alternatively use the dm_io() function below
+ * and dm_io_client_create() to create private mempools for the client.
+ *
+ * Create/destroy may block.
+ */
+struct dm_io_client *dm_io_client_create(unsigned num_pages);
+int dm_io_client_resize(unsigned num_pages, struct dm_io_client *client);
+void dm_io_client_destroy(struct dm_io_client *client);
+
+/*
+ * IO interface using private per-client pools.
+ * Each bit in the optional 'sync_error_bits' bitset indicates whether an
+ * error occurred doing io to the corresponding region.
+ */
+int dm_io(struct dm_io_request *io_req, unsigned num_regions,
+          struct dm_io_region *region, unsigned long *sync_error_bits);
+
+#endif  /* __KERNEL__ */
+#endif  /* _LINUX_DM_IO_H */
diff --git a/include/linux/dm-kcopyd.h b/include/linux/dm-kcopyd.h
new file mode 100644
index 000000000000..5db216311695
--- /dev/null
+++ b/include/linux/dm-kcopyd.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2001 - 2003 Sistina Software
+ * Copyright (C) 2004 - 2008 Red Hat, Inc. All rights reserved.
+ *
+ * kcopyd provides a simple interface for copying an area of one
+ * block-device to one or more other block-devices, either synchronous
+ * or with an asynchronous completion notification.
+ *
+ * This file is released under the GPL.
+ */
+
+#ifndef _LINUX_DM_KCOPYD_H
+#define _LINUX_DM_KCOPYD_H
+
+#ifdef __KERNEL__
+
+#include <linux/dm-io.h>
+
+/* FIXME: make this configurable */
+#define DM_KCOPYD_MAX_REGIONS 8
+
+#define DM_KCOPYD_IGNORE_ERROR 1
+
+/*
+ * To use kcopyd you must first create a dm_kcopyd_client object.
+ */
+struct dm_kcopyd_client;
+int dm_kcopyd_client_create(unsigned num_pages,
+                            struct dm_kcopyd_client **result);
+void dm_kcopyd_client_destroy(struct dm_kcopyd_client *kc);
+
+/*
+ * Submit a copy job to kcopyd.  This is built on top of the
+ * previous three fns.
+ *
+ * read_err is a boolean,
+ * write_err is a bitset, with 1 bit for each destination region
+ */
+typedef void (*dm_kcopyd_notify_fn)(int read_err, unsigned long write_err,
+                                    void *context);
+
+int dm_kcopyd_copy(struct dm_kcopyd_client *kc, struct dm_io_region *from,
+                   unsigned num_dests, struct dm_io_region *dests,
+                   unsigned flags, dm_kcopyd_notify_fn fn, void *context);
+
+#endif  /* __KERNEL__ */
+#endif  /* _LINUX_DM_KCOPYD_H */
diff --git a/include/linux/dvb/dmx.h b/include/linux/dvb/dmx.h
index c6a2353c4e68..402fb7a8d922 100644
--- a/include/linux/dvb/dmx.h
+++ b/include/linux/dvb/dmx.h
@@ -39,9 +39,10 @@ typedef enum
         DMX_OUT_DECODER, /* Streaming directly to decoder. */
         DMX_OUT_TAP,     /* Output going to a memory buffer */
                          /* (to be retrieved via the read command).*/
-        DMX_OUT_TS_TAP   /* Output multiplexed into a new TS  */
+        DMX_OUT_TS_TAP,  /* Output multiplexed into a new TS  */
                          /* (to be retrieved by reading from the */
                          /* logical DVR device).                 */
+        DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
 } dmx_output_t;
 
 
diff --git a/include/linux/exportfs.h b/include/linux/exportfs.h
index adcbb05b120b..de8387b7ceb6 100644
--- a/include/linux/exportfs.h
+++ b/include/linux/exportfs.h
@@ -43,7 +43,7 @@ struct fid {
                         u32 parent_ino;
                         u32 parent_gen;
                 } i32;
-                __u32 raw[6];
+                __u32 raw[0];
         };
 };
 
diff --git a/include/linux/fs.h b/include/linux/fs.h
index cc2be2cf7d41..6556f2f967e5 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -973,6 +973,7 @@ extern int do_sync_mapping_range(struct address_space *mapping, loff_t offset,
 /* fs/locks.c */
 extern void locks_init_lock(struct file_lock *);
 extern void locks_copy_lock(struct file_lock *, struct file_lock *);
+extern void __locks_copy_lock(struct file_lock *, const struct file_lock *);
 extern void locks_remove_posix(struct file *, fl_owner_t);
 extern void locks_remove_flock(struct file *);
 extern void posix_test_lock(struct file *, struct file_lock *);
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index b979112f74e0..32eb8bbe4831 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -125,6 +125,7 @@
 #define I2C_HW_B_CX2341X        0x010020 /* Conexant CX2341X MPEG encoder cards */
 #define I2C_HW_B_INTELFB        0x010021 /* intel framebuffer driver */
 #define I2C_HW_B_CX23885        0x010022 /* conexant 23885 based tv cards (bus1) */
+#define I2C_HW_B_AU0828         0x010023 /* auvitek au0828 usb bridge */
 
 /* --- PCF 8584 based algorithms                                        */
 #define I2C_HW_P_ELEK           0x020002 /* Elektor ISA Bus inteface card */
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index f27d11ab418b..529f301d9372 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -465,13 +465,19 @@ enum ieee80211_eid {
         WLAN_EID_TS_DELAY = 43,
         WLAN_EID_TCLAS_PROCESSING = 44,
         WLAN_EID_QOS_CAPA = 46,
-        /* 802.11s */
-        WLAN_EID_MESH_CONFIG = 36,      /* Pending IEEE 802.11 ANA approval */
-        WLAN_EID_MESH_ID = 37,          /* Pending IEEE 802.11 ANA approval */
-        WLAN_EID_PEER_LINK = 40,        /* Pending IEEE 802.11 ANA approval */
-        WLAN_EID_PREQ = 53,             /* Pending IEEE 802.11 ANA approval */
-        WLAN_EID_PREP = 54,             /* Pending IEEE 802.11 ANA approval */
-        WLAN_EID_PERR = 55,             /* Pending IEEE 802.11 ANA approval */
+        /* 802.11s
+         *
+         * All mesh EID numbers are pending IEEE 802.11 ANA approval.
+         * The numbers have been incremented from those suggested in
+         * 802.11s/D2.0 so that MESH_CONFIG does not conflict with
+         * EXT_SUPP_RATES.
+         */
+        WLAN_EID_MESH_CONFIG = 51,
+        WLAN_EID_MESH_ID = 52,
+        WLAN_EID_PEER_LINK = 55,
+        WLAN_EID_PREQ = 68,
+        WLAN_EID_PREP = 69,
+        WLAN_EID_PERR = 70,
         /* 802.11h */
         WLAN_EID_PWR_CONSTRAINT = 32,
         WLAN_EID_PWR_CAPABILITY = 33,
diff --git a/include/linux/input.h b/include/linux/input.h
index cae2c35d1206..28a094fcfe20 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -1025,10 +1025,6 @@ struct ff_effect {
  * @node: used to place the device onto input_dev_list
  */
 struct input_dev {
-        /* private: */
-        void *private;  /* do not use */
-        /* public: */
-
         const char *name;
         const char *phys;
         const char *uniq;
@@ -1238,12 +1234,12 @@ static inline void input_put_device(struct input_dev *dev)
 
 static inline void *input_get_drvdata(struct input_dev *dev)
 {
-        return dev->private;
+        return dev_get_drvdata(&dev->dev);
 }
 
 static inline void input_set_drvdata(struct input_dev *dev, void *data)
 {
-        dev->private = data;
+        dev_set_drvdata(&dev->dev, data);
 }
 
 int __must_check input_register_device(struct input_dev *);
diff --git a/include/linux/keyboard.h b/include/linux/keyboard.h
index 65c2d70853e9..a3c984d780f0 100644
--- a/include/linux/keyboard.h
+++ b/include/linux/keyboard.h
@@ -33,6 +33,7 @@ struct keyboard_notifier_param {
         struct vc_data *vc;     /* VC on which the keyboard press was done */
         int down;               /* Pressure of the key? */
         int shift;              /* Current shift mask */
+        int ledstate;           /* Current led state */
         unsigned int value;     /* keycode, unicode value or keysym */
 };
 
diff --git a/include/linux/leds.h b/include/linux/leds.h
index b07e3d400bd6..519df72e939d 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -35,8 +35,11 @@ struct led_classdev {
 #define LED_SUSPENDED           (1 << 0)
 
         /* Set LED brightness level */
+        /* Must not sleep, use a workqueue if needed */
         void            (*brightness_set)(struct led_classdev *led_cdev,
                                           enum led_brightness brightness);
+        /* Get LED brightness level */
+        enum led_brightness (*brightness_get)(struct led_classdev *led_cdev);
 
         /* Activate hardware accelerated blink */
         int             (*blink_set)(struct led_classdev *led_cdev,
@@ -126,6 +129,9 @@ struct gpio_led {
 struct gpio_led_platform_data {
         int             num_leds;
         struct gpio_led *leds;
+        int             (*gpio_blink_set)(unsigned gpio,
+                                        unsigned long *delay_on,
+                                        unsigned long *delay_off);
 };
 
 
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 07ed56f7a767..395a523d8c30 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -847,7 +847,6 @@ static inline int ata_port_is_dummy(struct ata_port *ap)
         return ap->ops == &ata_dummy_port_ops;
 }
 
-extern void sata_print_link_status(struct ata_link *link);
 extern void ata_port_probe(struct ata_port *);
 extern int sata_set_spd(struct ata_link *link);
 extern int ata_std_prereset(struct ata_link *link, unsigned long deadline);
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index 4babb2a129ac..102d928f7206 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -91,6 +91,7 @@ struct nlm_wait;
  */
 #define NLMCLNT_OHSIZE          ((__NEW_UTS_LEN) + 10u)
 struct nlm_rqst {
+        atomic_t                a_count;
         unsigned int            a_flags;        /* initial RPC task flags */
         struct nlm_host *       a_host;         /* host handle */
         struct nlm_args         a_args;         /* arguments */
@@ -173,8 +174,10 @@ void		  nlmclnt_next_cookie(struct nlm_cookie *);
 /*
  * Host cache
  */
-struct nlm_host  *nlmclnt_lookup_host(const struct sockaddr_in *, int, int,
-                                        const char *, unsigned int);
+struct nlm_host  *nlmclnt_lookup_host(const struct sockaddr_in *sin,
+                                        int proto, u32 version,
+                                        const char *hostname,
+                                        unsigned int hostname_len);
 struct nlm_host  *nlmsvc_lookup_host(struct svc_rqst *, const char *,
                                         unsigned int);
 struct rpc_clnt * nlm_bind_host(struct nlm_host *);
@@ -191,7 +194,7 @@ void		  nsm_release(struct nsm_handle *);
  * This is used in garbage collection and resource reclaim
  * A return value != 0 means destroy the lock/block/share
  */
-typedef int       (*nlm_host_match_fn_t)(struct nlm_host *cur, struct nlm_host *ref);
+typedef int       (*nlm_host_match_fn_t)(void *cur, struct nlm_host *ref);
 
 /*
  * Server-side lock handling
@@ -217,8 +220,13 @@ void		  nlmsvc_mark_resources(void);
 void              nlmsvc_free_host_resources(struct nlm_host *);
 void              nlmsvc_invalidate_all(void);
 
-static __inline__ struct inode *
-nlmsvc_file_inode(struct nlm_file *file)
+/*
+ * Cluster failover support
+ */
+int           nlmsvc_unlock_all_by_sb(struct super_block *sb);
+int           nlmsvc_unlock_all_by_ip(__be32 server_addr);
+
+static inline struct inode *nlmsvc_file_inode(struct nlm_file *file)
 {
         return file->f_file->f_path.dentry->d_inode;
 }
@@ -226,8 +234,8 @@ nlmsvc_file_inode(struct nlm_file *file)
 /*
  * Compare two host addresses (needs modifying for ipv6)
  */
-static __inline__ int
-nlm_cmp_addr(const struct sockaddr_in *sin1, const struct sockaddr_in *sin2)
+static inline int nlm_cmp_addr(const struct sockaddr_in *sin1,
+                               const struct sockaddr_in *sin2)
 {
         return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr;
 }
@@ -236,8 +244,8 @@ nlm_cmp_addr(const struct sockaddr_in *sin1, const struct sockaddr_in *sin2)
  * Compare two NLM locks.
  * When the second lock is of type F_UNLCK, this acts like a wildcard.
  */
-static __inline__ int
-nlm_compare_locks(const struct file_lock *fl1, const struct file_lock *fl2)
+static inline int nlm_compare_locks(const struct file_lock *fl1,
+                                    const struct file_lock *fl2)
 {
         return  fl1->fl_pid   == fl2->fl_pid
              && fl1->fl_owner == fl2->fl_owner
diff --git a/include/linux/lockd/sm_inter.h b/include/linux/lockd/sm_inter.h
index 22a645828f26..5a5448bdb17d 100644
--- a/include/linux/lockd/sm_inter.h
+++ b/include/linux/lockd/sm_inter.h
@@ -19,6 +19,7 @@
 #define SM_NOTIFY       6
 
 #define SM_MAXSTRLEN    1024
+#define SM_PRIV_SIZE    16
 
 /*
  * Arguments for all calls to statd
diff --git a/include/linux/meye.h b/include/linux/meye.h
index 39fd9c8ddd4b..12010ace1f04 100644
--- a/include/linux/meye.h
+++ b/include/linux/meye.h
@@ -58,7 +58,7 @@ struct meye_params {
 
 /* V4L2 private controls */
 #define V4L2_CID_AGC            V4L2_CID_PRIVATE_BASE
-#define V4L2_CID_SHARPNESS      (V4L2_CID_PRIVATE_BASE + 1)
+#define V4L2_CID_MEYE_SHARPNESS (V4L2_CID_PRIVATE_BASE + 1)
 #define V4L2_CID_PICTURE        (V4L2_CID_PRIVATE_BASE + 2)
 #define V4L2_CID_JPEGQUAL       (V4L2_CID_PRIVATE_BASE + 3)
 #define V4L2_CID_FRAMERATE      (V4L2_CID_PRIVATE_BASE + 4)
diff --git a/include/linux/mnt_namespace.h b/include/linux/mnt_namespace.h
index 8eed44f8ca73..830bbcd449d6 100644
--- a/include/linux/mnt_namespace.h
+++ b/include/linux/mnt_namespace.h
@@ -5,6 +5,7 @@
 #include <linux/mount.h>
 #include <linux/sched.h>
 #include <linux/nsproxy.h>
+#include <linux/seq_file.h>
 
 struct mnt_namespace {
         atomic_t                count;
@@ -14,6 +15,13 @@ struct mnt_namespace {
         int event;
 };
 
+struct proc_mounts {
+        struct seq_file m; /* must be the first element */
+        struct mnt_namespace *ns;
+        struct path root;
+        int event;
+};
+
 extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *,
                 struct fs_struct *);
 extern void __put_mnt_ns(struct mnt_namespace *ns);
@@ -37,5 +45,9 @@ static inline void get_mnt_ns(struct mnt_namespace *ns)
         atomic_inc(&ns->count);
 }
 
+extern const struct seq_operations mounts_op;
+extern const struct seq_operations mountinfo_op;
+extern const struct seq_operations mountstats_op;
+
 #endif
 #endif
diff --git a/include/linux/mount.h b/include/linux/mount.h
index 87b24cea1863..b4836d58f428 100644
--- a/include/linux/mount.h
+++ b/include/linux/mount.h
@@ -56,6 +56,8 @@ struct vfsmount {
         struct list_head mnt_slave;     /* slave list entry */
         struct vfsmount *mnt_master;    /* slave is on master->mnt_slave_list */
         struct mnt_namespace *mnt_ns;   /* containing namespace */
+        int mnt_id;                     /* mount identifier */
+        int mnt_group_id;               /* peer group identifier */
         /*
          * We put mnt_count & mnt_expiry_mark at the end of struct vfsmount
          * to let these frequently modified fields in a separate cache line
diff --git a/include/linux/mtd/inftl.h b/include/linux/mtd/inftl.h
index 6977780e548f..85fd041d44ad 100644
--- a/include/linux/mtd/inftl.h
+++ b/include/linux/mtd/inftl.h
@@ -57,6 +57,11 @@ extern char inftlmountrev[];
 void INFTL_dumptables(struct INFTLrecord *s);
 void INFTL_dumpVUchains(struct INFTLrecord *s);
 
+int inftl_read_oob(struct mtd_info *mtd, loff_t offs, size_t len,
+                   size_t *retlen, uint8_t *buf);
+int inftl_write_oob(struct mtd_info *mtd, loff_t offs, size_t len,
+                    size_t *retlen, uint8_t *buf);
+
 #endif /* __KERNEL__ */
 
 #endif /* __MTD_INFTL_H__ */
diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h
index bcf2fb3fa4a7..001eec50cac6 100644
--- a/include/linux/mtd/nftl.h
+++ b/include/linux/mtd/nftl.h
@@ -43,6 +43,11 @@ struct NFTLrecord {
 int NFTL_mount(struct NFTLrecord *s);
 int NFTL_formatblock(struct NFTLrecord *s, int block);
 
+int nftl_read_oob(struct mtd_info *mtd, loff_t offs, size_t len,
+                  size_t *retlen, uint8_t *buf);
+int nftl_write_oob(struct mtd_info *mtd, loff_t offs, size_t len,
+                   size_t *retlen, uint8_t *buf);
+
 #ifndef NFTL_MAJOR
 #define NFTL_MAJOR 93
 #endif
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index fd0a260e070b..9aa2a9149b58 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -187,4 +187,7 @@ struct onenand_manufacturers {
         char *name;
 };
 
+int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
+                         struct mtd_oob_ops *ops);
+
 #endif  /* __LINUX_MTD_ONENAND_H */
diff --git a/include/linux/mtd/plat-ram.h b/include/linux/mtd/plat-ram.h
index 9667863bd7e3..0e37ad07bce2 100644
--- a/include/linux/mtd/plat-ram.h
+++ b/include/linux/mtd/plat-ram.h
@@ -21,8 +21,9 @@
 #define PLATRAM_RW (1)
 
 struct platdata_mtd_ram {
-        char                    *mapname;
-        char                   **probes;
+        const char              *mapname;
+        const char              **map_probes;
+        const char              **probes;
         struct mtd_partition    *partitions;
         int                      nr_partitions;
         int                      bankwidth;
diff --git a/include/linux/nfs3.h b/include/linux/nfs3.h
index 7f11fa589207..539f3b550eab 100644
--- a/include/linux/nfs3.h
+++ b/include/linux/nfs3.h
@@ -96,7 +96,7 @@ struct nfs3_fh {
 #define MOUNTPROC3_UMNTALL      4
  
 
-#if defined(__KERNEL__) || defined(NFS_NEED_KERNEL_TYPES)
+#if defined(__KERNEL__)
 
 /* Number of 32bit words in post_op_attr */
 #define NFS3_POST_OP_ATTR_WORDS         22
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index f4a0e4c218df..27d6a8d98cef 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -430,7 +430,6 @@ extern void nfs_unregister_sysctl(void);
 /*
  * linux/fs/nfs/namespace.c
  */
-extern struct list_head nfs_automount_list;
 extern const struct inode_operations nfs_mountpoint_inode_operations;
 extern const struct inode_operations nfs_referral_inode_operations;
 extern int nfs_mountpoint_expiry_timeout;
@@ -466,9 +465,9 @@ extern int nfs_wb_page(struct inode *inode, struct page* page);
 extern int nfs_wb_page_cancel(struct inode *inode, struct page* page);
 #if defined(CONFIG_NFS_V3) || defined(CONFIG_NFS_V4)
 extern int  nfs_commit_inode(struct inode *, int);
-extern struct nfs_write_data *nfs_commit_alloc(void);
+extern struct nfs_write_data *nfs_commitdata_alloc(void);
 extern void nfs_commit_free(struct nfs_write_data *wdata);
-extern void nfs_commit_release(void *wdata);
+extern void nfs_commitdata_release(void *wdata);
 #else
 static inline int
 nfs_commit_inode(struct inode *inode, int how)
diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h
index 3423c6761bf7..c9beacd16c00 100644
--- a/include/linux/nfs_fs_sb.h
+++ b/include/linux/nfs_fs_sb.h
@@ -32,6 +32,8 @@ struct nfs_client {
         const struct nfs_rpc_ops *rpc_ops;      /* NFS protocol vector */
         int                     cl_proto;       /* Network transport protocol */
 
+        struct rpc_cred         *cl_machine_cred;
+
 #ifdef CONFIG_NFS_V4
         u64                     cl_clientid;    /* constant */
         nfs4_verifier           cl_confirm;
@@ -93,6 +95,7 @@ struct nfs_server {
         unsigned int            wpages;         /* write size (in pages) */
         unsigned int            wtmult;         /* server disk block size */
         unsigned int            dtsize;         /* readdir size */
+        unsigned short          port;           /* "port=" setting */
         unsigned int            bsize;          /* server block size */
         unsigned int            acregmin;       /* attr cache timeouts */
         unsigned int            acregmax;
@@ -117,6 +120,13 @@ struct nfs_server {
 
         atomic_t active; /* Keep trace of any activity to this server */
         wait_queue_head_t active_wq;  /* Wait for any activity to stop  */
+
+        /* mountd-related mount options */
+        struct sockaddr_storage mountd_address;
+        size_t                  mountd_addrlen;
+        u32                     mountd_version;
+        unsigned short          mountd_port;
+        unsigned short          mountd_protocol;
 };
 
 /* Server capabilities */
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index f301d0b8babc..24263bb8e0be 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -140,6 +140,7 @@ struct nfs_openres {
         __u32                   rflags;
         struct nfs_fattr *      f_attr;
         struct nfs_fattr *      dir_attr;
+        struct nfs_seqid *      seqid;
         const struct nfs_server *server;
         int                     delegation_type;
         nfs4_stateid            delegation;
@@ -159,6 +160,7 @@ struct nfs_open_confirmargs {
 
 struct nfs_open_confirmres {
         nfs4_stateid            stateid;
+        struct nfs_seqid *      seqid;
 };
 
 /*
@@ -175,6 +177,7 @@ struct nfs_closeargs {
 struct nfs_closeres {
         nfs4_stateid            stateid;
         struct nfs_fattr *      fattr;
+        struct nfs_seqid *      seqid;
         const struct nfs_server *server;
 };
 /*
@@ -199,7 +202,9 @@ struct nfs_lock_args {
 };
 
 struct nfs_lock_res {
-        nfs4_stateid                    stateid;
+        nfs4_stateid            stateid;
+        struct nfs_seqid *      lock_seqid;
+        struct nfs_seqid *      open_seqid;
 };
 
 struct nfs_locku_args {
@@ -210,7 +215,8 @@ struct nfs_locku_args {
 };
 
 struct nfs_locku_res {
-        nfs4_stateid                    stateid;
+        nfs4_stateid            stateid;
+        struct nfs_seqid *      seqid;
 };
 
 struct nfs_lockt_args {
diff --git a/include/linux/nfsd/Kbuild b/include/linux/nfsd/Kbuild
index e726fc3a4375..fc972048e572 100644
--- a/include/linux/nfsd/Kbuild
+++ b/include/linux/nfsd/Kbuild
@@ -1,6 +1,6 @@
 unifdef-y += const.h
+unifdef-y += debug.h
 unifdef-y += export.h
+unifdef-y += nfsfh.h
 unifdef-y += stats.h
 unifdef-y += syscall.h
-unifdef-y += nfsfh.h
-unifdef-y += debug.h
diff --git a/include/linux/nfsd/cache.h b/include/linux/nfsd/cache.h
index 7b5d784cc858..04b355c801d8 100644
--- a/include/linux/nfsd/cache.h
+++ b/include/linux/nfsd/cache.h
@@ -10,7 +10,6 @@
 #ifndef NFSCACHE_H
 #define NFSCACHE_H
 
-#ifdef __KERNEL__
 #include <linux/in.h>
 #include <linux/uio.h>
 
@@ -77,5 +76,4 @@ void	nfsd_reply_cache_shutdown(void);
 int     nfsd_cache_lookup(struct svc_rqst *, int);
 void    nfsd_cache_update(struct svc_rqst *, int, __be32 *);
 
-#endif /* __KERNEL__ */
 #endif /* NFSCACHE_H */
diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h
index 8caf4c4f64e6..41d30c9c9de6 100644
--- a/include/linux/nfsd/nfsd.h
+++ b/include/linux/nfsd/nfsd.h
@@ -27,7 +27,6 @@
 #define NFSD_VERSION            "0.5"
 #define NFSD_SUPPORTED_MINOR_VERSION    0
 
-#ifdef __KERNEL__
 /*
  * Special flags for nfsd_permission. These must be different from MAY_READ,
  * MAY_WRITE, and MAY_EXEC.
@@ -56,12 +55,20 @@ extern struct svc_program	nfsd_program;
 extern struct svc_version       nfsd_version2, nfsd_version3,
                                 nfsd_version4;
 extern struct svc_serv          *nfsd_serv;
+
+extern struct seq_operations nfs_exports_op;
+
 /*
  * Function prototypes.
  */
 int             nfsd_svc(unsigned short port, int nrservs);
 int             nfsd_dispatch(struct svc_rqst *rqstp, __be32 *statp);
 
+int             nfsd_nrthreads(void);
+int             nfsd_nrpools(void);
+int             nfsd_get_nrthreads(int n, int *);
+int             nfsd_set_nrthreads(int n, int *);
+
 /* nfsd/vfs.c */
 int             fh_lock_parent(struct svc_fh *, struct dentry *);
 int             nfsd_racache_init(int);
@@ -322,10 +329,8 @@ extern struct timeval	nfssvc_boot;
 (FATTR4_WORD0_SIZE              | FATTR4_WORD0_ACL                                         )
 #define NFSD_WRITEABLE_ATTRS_WORD1                                                          \
 (FATTR4_WORD1_MODE              | FATTR4_WORD1_OWNER         | FATTR4_WORD1_OWNER_GROUP     \
- | FATTR4_WORD1_TIME_ACCESS_SET | FATTR4_WORD1_TIME_METADATA | FATTR4_WORD1_TIME_MODIFY_SET)
+ | FATTR4_WORD1_TIME_ACCESS_SET | FATTR4_WORD1_TIME_MODIFY_SET)
 
 #endif /* CONFIG_NFSD_V4 */
 
-#endif /* __KERNEL__ */
-
 #endif /* LINUX_NFSD_NFSD_H */
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 779cbcd65f62..02df20f085fe 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -379,6 +379,18 @@ struct phy_driver {
 };
 #define to_phy_driver(d) container_of(d, struct phy_driver, driver)
 
+#define PHY_ANY_ID "MATCH ANY PHY"
+#define PHY_ANY_UID 0xffffffff
+
+/* A Structure for boards to register fixups with the PHY Lib */
+struct phy_fixup {
+        struct list_head list;
+        char bus_id[BUS_ID_SIZE];
+        u32 phy_uid;
+        u32 phy_uid_mask;
+        int (*run)(struct phy_device *phydev);
+};
+
 int phy_read(struct phy_device *phydev, u16 regnum);
 int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
 int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id);
@@ -386,8 +398,8 @@ struct phy_device* get_phy_device(struct mii_bus *bus, int addr);
 int phy_clear_interrupt(struct phy_device *phydev);
 int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
 struct phy_device * phy_attach(struct net_device *dev,
-                const char *phy_id, u32 flags, phy_interface_t interface);
-struct phy_device * phy_connect(struct net_device *dev, const char *phy_id,
+                const char *bus_id, u32 flags, phy_interface_t interface);
+struct phy_device * phy_connect(struct net_device *dev, const char *bus_id,
                 void (*handler)(struct net_device *), u32 flags,
                 phy_interface_t interface);
 void phy_disconnect(struct phy_device *phydev);
@@ -427,5 +439,13 @@ void phy_print_status(struct phy_device *phydev);
 struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id);
 void phy_device_free(struct phy_device *phydev);
 
+int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
+                int (*run)(struct phy_device *));
+int phy_register_fixup_for_id(const char *bus_id,
+                int (*run)(struct phy_device *));
+int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
+                int (*run)(struct phy_device *));
+int phy_scan_fixups(struct phy_device *phydev);
+
 extern struct bus_type mdio_bus_type;
 #endif /* __PHY_H */
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index b9e174079002..44c81c744538 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -740,13 +740,13 @@ extern void rtmsg_ifinfo(int type, struct net_device *dev, unsigned change);
 extern void rtnl_lock(void);
 extern void rtnl_unlock(void);
 extern int rtnl_trylock(void);
+extern int rtnl_is_locked(void);
 
 extern void rtnetlink_init(void);
 extern void __rtnl_unlock(void);
 
 #define ASSERT_RTNL() do { \
-        if (unlikely(rtnl_trylock())) { \
-                rtnl_unlock(); \
+        if (unlikely(!rtnl_is_locked())) { \
                 printk(KERN_ERR "RTNL: assertion failed at %s (%d)\n", \
                        __FILE__,  __LINE__); \
                 dump_stack(); \
diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h
index d65796dc26d9..5b5369c3c209 100644
--- a/include/linux/seq_file.h
+++ b/include/linux/seq_file.h
@@ -10,6 +10,7 @@ struct seq_operations;
 struct file;
 struct path;
 struct inode;
+struct dentry;
 
 struct seq_file {
         char *buf;
@@ -44,6 +45,9 @@ int seq_printf(struct seq_file *, const char *, ...)
         __attribute__ ((format (printf,2,3)));
 
 int seq_path(struct seq_file *, struct path *, char *);
+int seq_dentry(struct seq_file *, struct dentry *, char *);
+int seq_path_root(struct seq_file *m, struct path *path, struct path *root,
+                  char *esc);
 
 int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
 int single_release(struct inode *, struct file *);
diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h
index 26e4925bc35b..632205ccc25d 100644
--- a/include/linux/seqlock.h
+++ b/include/linux/seqlock.h
@@ -85,23 +85,29 @@ static inline int write_tryseqlock(seqlock_t *sl)
 /* Start of read calculation -- fetch last complete writer token */
 static __always_inline unsigned read_seqbegin(const seqlock_t *sl)
 {
-        unsigned ret = sl->sequence;
+        unsigned ret;
+
+repeat:
+        ret = sl->sequence;
         smp_rmb();
+        if (unlikely(ret & 1)) {
+                cpu_relax();
+                goto repeat;
+        }
+
         return ret;
 }
 
-/* Test if reader processed invalid data.
- * If initial values is odd, 
- *      then writer had already started when section was entered
- * If sequence value changed
- *      then writer changed data while in section
- *    
- * Using xor saves one conditional branch.
+/*
+ * Test if reader processed invalid data.
+ *
+ * If sequence value changed then writer changed data while in section.
  */
-static __always_inline int read_seqretry(const seqlock_t *sl, unsigned iv)
+static __always_inline int read_seqretry(const seqlock_t *sl, unsigned start)
 {
         smp_rmb();
-        return (iv & 1) | (sl->sequence ^ iv);
+
+        return (sl->sequence != start);
 }
 
 
@@ -122,20 +128,26 @@ typedef struct seqcount {
 /* Start of read using pointer to a sequence counter only.  */
 static inline unsigned read_seqcount_begin(const seqcount_t *s)
 {
-        unsigned ret = s->sequence;
+        unsigned ret;
+
+repeat:
+        ret = s->sequence;
         smp_rmb();
+        if (unlikely(ret & 1)) {
+                cpu_relax();
+                goto repeat;
+        }
         return ret;
 }
 
-/* Test if reader processed invalid data.
- * Equivalent to: iv is odd or sequence number has changed.
- *                (iv & 1) || (*s != iv)
- * Using xor saves one conditional branch.
+/*
+ * Test if reader processed invalid data because sequence number has changed.
  */
-static inline int read_seqcount_retry(const seqcount_t *s, unsigned iv)
+static inline int read_seqcount_retry(const seqcount_t *s, unsigned start)
 {
         smp_rmb();
-        return (iv & 1) | (s->sequence ^ iv);
+
+        return s->sequence != start;
 }
 
 
diff --git a/include/linux/serio.h b/include/linux/serio.h
index 9f3825014674..95674d97dabd 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -211,5 +211,6 @@ static inline void serio_unpin_driver(struct serio *serio)
 #define SERIO_TOUCHWIN  0x33
 #define SERIO_TAOSEVM   0x34
 #define SERIO_FUJITSU   0x35
+#define SERIO_ZHENHUA   0x36
 
 #endif
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 334d31411629..daf744017a31 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -14,7 +14,8 @@ enum ads7846_filter {
 struct ads7846_platform_data {
         u16     model;                  /* 7843, 7845, 7846. */
         u16     vref_delay_usecs;       /* 0 for external vref; etc */
-        int     keep_vref_on:1;         /* set to keep vref on for differential
+        u16     vref_mv;                /* external vref value, milliVolts */
+        bool    keep_vref_on;           /* set to keep vref on for differential
                                          * measurements as well */
 
         /* Settling time of the analog signals; a function of Vcc and the
diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h
index 7a69ca3bebaf..3f632182d8eb 100644
--- a/include/linux/sunrpc/auth.h
+++ b/include/linux/sunrpc/auth.h
@@ -26,6 +26,7 @@ struct auth_cred {
         uid_t   uid;
         gid_t   gid;
         struct group_info *group_info;
+        unsigned char machine_cred : 1;
 };
 
 /*
@@ -59,8 +60,8 @@ struct rpc_cred {
 /*
  * Client authentication handle
  */
-#define RPC_CREDCACHE_NR        8
-#define RPC_CREDCACHE_MASK      (RPC_CREDCACHE_NR - 1)
+#define RPC_CREDCACHE_HASHBITS  4
+#define RPC_CREDCACHE_NR        (1 << RPC_CREDCACHE_HASHBITS)
 struct rpc_cred_cache {
         struct hlist_head       hashtable[RPC_CREDCACHE_NR];
         spinlock_t              lock;
@@ -89,7 +90,6 @@ struct rpc_auth {
 
 /* Flags for rpcauth_lookupcred() */
 #define RPCAUTH_LOOKUP_NEW              0x01    /* Accept an uninitialised cred */
-#define RPCAUTH_LOOKUP_ROOTCREDS        0x02    /* This really ought to go! */
 
 /*
  * Client authentication ops
@@ -97,9 +97,7 @@ struct rpc_auth {
 struct rpc_authops {
         struct module           *owner;
         rpc_authflavor_t        au_flavor;      /* flavor (RPC_AUTH_*) */
-#ifdef RPC_DEBUG
         char *                  au_name;
-#endif
         struct rpc_auth *       (*create)(struct rpc_clnt *, rpc_authflavor_t);
         void                    (*destroy)(struct rpc_auth *);
 
@@ -113,6 +111,7 @@ struct rpc_credops {
         void                    (*crdestroy)(struct rpc_cred *);
 
         int                     (*crmatch)(struct auth_cred *, struct rpc_cred *, int);
+        void                    (*crbind)(struct rpc_task *, struct rpc_cred *);
         __be32 *                (*crmarshal)(struct rpc_task *, __be32 *);
         int                     (*crrefresh)(struct rpc_task *);
         __be32 *                (*crvalidate)(struct rpc_task *, __be32 *);
@@ -126,9 +125,13 @@ extern const struct rpc_authops	authunix_ops;
 extern const struct rpc_authops authnull_ops;
 
 void __init             rpc_init_authunix(void);
+void __init             rpc_init_generic_auth(void);
 void __init             rpcauth_init_module(void);
 void __exit             rpcauth_remove_module(void);
+void __exit             rpc_destroy_generic_auth(void);
 
+struct rpc_cred *       rpc_lookup_cred(void);
+struct rpc_cred *       rpc_lookup_machine_cred(void);
 int                     rpcauth_register(const struct rpc_authops *);
 int                     rpcauth_unregister(const struct rpc_authops *);
 struct rpc_auth *       rpcauth_create(rpc_authflavor_t, struct rpc_clnt *);
@@ -136,8 +139,8 @@ void			rpcauth_release(struct rpc_auth *);
 struct rpc_cred *       rpcauth_lookup_credcache(struct rpc_auth *, struct auth_cred *, int);
 void                    rpcauth_init_cred(struct rpc_cred *, const struct auth_cred *, struct rpc_auth *, const struct rpc_credops *);
 struct rpc_cred *       rpcauth_lookupcred(struct rpc_auth *, int);
-struct rpc_cred *       rpcauth_bindcred(struct rpc_task *);
-void                    rpcauth_holdcred(struct rpc_task *);
+void                    rpcauth_bindcred(struct rpc_task *, struct rpc_cred *, int);
+void                    rpcauth_generic_bind_cred(struct rpc_task *, struct rpc_cred *);
 void                    put_rpccred(struct rpc_cred *);
 void                    rpcauth_unbindcred(struct rpc_task *);
 __be32 *                rpcauth_marshcred(struct rpc_task *, __be32 *);
diff --git a/include/linux/sunrpc/auth_gss.h b/include/linux/sunrpc/auth_gss.h
index 67658e17a375..fec6899bf355 100644
--- a/include/linux/sunrpc/auth_gss.h
+++ b/include/linux/sunrpc/auth_gss.h
@@ -84,6 +84,7 @@ struct gss_cred {
         enum rpc_gss_svc        gc_service;
         struct gss_cl_ctx       *gc_ctx;
         struct gss_upcall_msg   *gc_upcall;
+        unsigned char           gc_machine_cred : 1;
 };
 
 #endif /* __KERNEL__ */
diff --git a/include/linux/sunrpc/cache.h b/include/linux/sunrpc/cache.h
index 03547d6abee5..2d8b211b9324 100644
--- a/include/linux/sunrpc/cache.h
+++ b/include/linux/sunrpc/cache.h
@@ -120,7 +120,6 @@ struct cache_deferred_req {
         struct list_head        hash;   /* on hash chain */
         struct list_head        recent; /* on fifo */
         struct cache_head       *item;  /* cache item we wait on */
-        time_t                  recv_time;
         void                    *owner; /* we might need to discard all defered requests
                                          * owned by someone */
         void                    (*revisit)(struct cache_deferred_req *req,
diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h
index 129a86e25d29..6fff7f82ef12 100644
--- a/include/linux/sunrpc/clnt.h
+++ b/include/linux/sunrpc/clnt.h
@@ -127,11 +127,12 @@ int		rpcb_getport_sync(struct sockaddr_in *, u32, u32, int);
 void            rpcb_getport_async(struct rpc_task *);
 
 void            rpc_call_start(struct rpc_task *);
-int             rpc_call_async(struct rpc_clnt *clnt, struct rpc_message *msg,
-                               int flags, const struct rpc_call_ops *tk_ops,
+int             rpc_call_async(struct rpc_clnt *clnt,
+                               const struct rpc_message *msg, int flags,
+                               const struct rpc_call_ops *tk_ops,
                                void *calldata);
-int             rpc_call_sync(struct rpc_clnt *clnt, struct rpc_message *msg,
-                              int flags);
+int             rpc_call_sync(struct rpc_clnt *clnt,
+                              const struct rpc_message *msg, int flags);
 struct rpc_task *rpc_call_null(struct rpc_clnt *clnt, struct rpc_cred *cred,
                                int flags);
 void            rpc_restart_call(struct rpc_task *);
diff --git a/include/linux/sunrpc/gss_krb5.h b/include/linux/sunrpc/gss_krb5.h
index 5a4b1e0206e3..a10f1fb0bf7c 100644
--- a/include/linux/sunrpc/gss_krb5.h
+++ b/include/linux/sunrpc/gss_krb5.h
@@ -70,8 +70,6 @@ enum seal_alg {
         SEAL_ALG_DES3KD = 0x0002
 };
 
-#define KRB5_CKSUM_LENGTH 8
-
 #define CKSUMTYPE_CRC32                 0x0001
 #define CKSUMTYPE_RSA_MD4               0x0002
 #define CKSUMTYPE_RSA_MD4_DES           0x0003
@@ -150,9 +148,9 @@ gss_decrypt_xdr_buf(struct crypto_blkcipher *tfm, struct xdr_buf *inbuf,
 s32
 krb5_make_seq_num(struct crypto_blkcipher *key,
                 int direction,
-                s32 seqnum, unsigned char *cksum, unsigned char *buf);
+                u32 seqnum, unsigned char *cksum, unsigned char *buf);
 
 s32
 krb5_get_seq_num(struct crypto_blkcipher *key,
                unsigned char *cksum,
-               unsigned char *buf, int *direction, s32 * seqnum);
+               unsigned char *buf, int *direction, u32 *seqnum);
diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h
index f689f02e6793..d1a5c8c1a0f1 100644
--- a/include/linux/sunrpc/sched.h
+++ b/include/linux/sunrpc/sched.h
@@ -11,7 +11,6 @@
 
 #include <linux/timer.h>
 #include <linux/sunrpc/types.h>
-#include <linux/rcupdate.h>
 #include <linux/spinlock.h>
 #include <linux/wait.h>
 #include <linux/workqueue.h>
@@ -33,7 +32,8 @@ struct rpc_wait_queue;
 struct rpc_wait {
         struct list_head        list;           /* wait queue links */
         struct list_head        links;          /* Links to related tasks */
-        struct rpc_wait_queue * rpc_waitq;      /* RPC wait queue we're on */
+        struct list_head        timer_list;     /* Timer list */
+        unsigned long           expires;
 };
 
 /*
@@ -57,33 +57,25 @@ struct rpc_task {
         __u8                    tk_cred_retry;
 
         /*
-         * timeout_fn   to be executed by timer bottom half
          * callback     to be executed after waking up
          * action       next procedure for async tasks
          * tk_ops       caller callbacks
          */
-        void                    (*tk_timeout_fn)(struct rpc_task *);
         void                    (*tk_callback)(struct rpc_task *);
         void                    (*tk_action)(struct rpc_task *);
         const struct rpc_call_ops *tk_ops;
         void *                  tk_calldata;
 
-        /*
-         * tk_timer is used for async processing by the RPC scheduling
-         * primitives. You should not access this directly unless
-         * you have a pathological interest in kernel oopses.
-         */
-        struct timer_list       tk_timer;       /* kernel timer */
         unsigned long           tk_timeout;     /* timeout for rpc_sleep() */
         unsigned short          tk_flags;       /* misc flags */
         unsigned long           tk_runstate;    /* Task run status */
         struct workqueue_struct *tk_workqueue;  /* Normally rpciod, but could
                                                  * be any workqueue
                                                  */
+        struct rpc_wait_queue   *tk_waitqueue;  /* RPC wait queue we're on */
         union {
                 struct work_struct      tk_work;        /* Async task work queue */
                 struct rpc_wait         tk_wait;        /* RPC wait */
-                struct rcu_head         tk_rcu;         /* for task deletion */
         } u;
 
         unsigned short          tk_timeouts;    /* maj timeouts */
@@ -123,6 +115,7 @@ struct rpc_task_setup {
         const struct rpc_message *rpc_message;
         const struct rpc_call_ops *callback_ops;
         void *callback_data;
+        struct workqueue_struct *workqueue;
         unsigned short flags;
         signed char priority;
 };
@@ -147,9 +140,7 @@ struct rpc_task_setup {
 
 #define RPC_TASK_RUNNING        0
 #define RPC_TASK_QUEUED         1
-#define RPC_TASK_WAKEUP         2
-#define RPC_TASK_HAS_TIMER      3
-#define RPC_TASK_ACTIVE         4
+#define RPC_TASK_ACTIVE         2
 
 #define RPC_IS_RUNNING(t)       test_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
 #define rpc_set_running(t)      set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
@@ -171,15 +162,6 @@ struct rpc_task_setup {
                 smp_mb__after_clear_bit(); \
         } while (0)
 
-#define rpc_start_wakeup(t) \
-        (test_and_set_bit(RPC_TASK_WAKEUP, &(t)->tk_runstate) == 0)
-#define rpc_finish_wakeup(t) \
-        do { \
-                smp_mb__before_clear_bit(); \
-                clear_bit(RPC_TASK_WAKEUP, &(t)->tk_runstate); \
-                smp_mb__after_clear_bit(); \
-        } while (0)
-
 #define RPC_IS_ACTIVATED(t)     test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate)
 
 /*
@@ -192,6 +174,12 @@ struct rpc_task_setup {
 #define RPC_PRIORITY_HIGH       (1)
 #define RPC_NR_PRIORITY         (1 + RPC_PRIORITY_HIGH - RPC_PRIORITY_LOW)
 
+struct rpc_timer {
+        struct timer_list timer;
+        struct list_head list;
+        unsigned long expires;
+};
+
 /*
  * RPC synchronization objects
  */
@@ -204,6 +192,7 @@ struct rpc_wait_queue {
         unsigned char           count;                  /* # task groups remaining serviced so far */
         unsigned char           nr;                     /* # tasks remaining for cookie */
         unsigned short          qlen;                   /* total # tasks waiting in queue */
+        struct rpc_timer        timer_list;
 #ifdef RPC_DEBUG
         const char *            name;
 #endif
@@ -229,9 +218,11 @@ void		rpc_killall_tasks(struct rpc_clnt *);
 void            rpc_execute(struct rpc_task *);
 void            rpc_init_priority_wait_queue(struct rpc_wait_queue *, const char *);
 void            rpc_init_wait_queue(struct rpc_wait_queue *, const char *);
+void            rpc_destroy_wait_queue(struct rpc_wait_queue *);
 void            rpc_sleep_on(struct rpc_wait_queue *, struct rpc_task *,
-                                        rpc_action action, rpc_action timer);
-void            rpc_wake_up_task(struct rpc_task *);
+                                        rpc_action action);
+void            rpc_wake_up_queued_task(struct rpc_wait_queue *,
+                                        struct rpc_task *);
 void            rpc_wake_up(struct rpc_wait_queue *);
 struct rpc_task *rpc_wake_up_next(struct rpc_wait_queue *);
 void            rpc_wake_up_status(struct rpc_wait_queue *, int);
diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
index 64c97552964a..4b54c5fdcfd9 100644
--- a/include/linux/sunrpc/svc.h
+++ b/include/linux/sunrpc/svc.h
@@ -386,7 +386,6 @@ struct svc_serv *  svc_create(struct svc_program *, unsigned int,
                               void (*shutdown)(struct svc_serv*));
 struct svc_rqst *svc_prepare_thread(struct svc_serv *serv,
                                         struct svc_pool *pool);
-int                svc_create_thread(svc_thread_fn, struct svc_serv *);
 void               svc_exit_thread(struct svc_rqst *);
 struct svc_serv *  svc_create_pooled(struct svc_program *, unsigned int,
                         void (*shutdown)(struct svc_serv*),
diff --git a/include/linux/sunrpc/svcauth.h b/include/linux/sunrpc/svcauth.h
index 22e1ef8e200e..d39dbdc7b10f 100644
--- a/include/linux/sunrpc/svcauth.h
+++ b/include/linux/sunrpc/svcauth.h
@@ -24,6 +24,7 @@ struct svc_cred {
 };
 
 struct svc_rqst;                /* forward decl */
+struct in6_addr;
 
 /* Authentication is done in the context of a domain.
  *
@@ -120,10 +121,10 @@ extern void	svc_auth_unregister(rpc_authflavor_t flavor);
 
 extern struct auth_domain *unix_domain_find(char *name);
 extern void auth_domain_put(struct auth_domain *item);
-extern int auth_unix_add_addr(struct in_addr addr, struct auth_domain *dom);
+extern int auth_unix_add_addr(struct in6_addr *addr, struct auth_domain *dom);
 extern struct auth_domain *auth_domain_lookup(char *name, struct auth_domain *new);
 extern struct auth_domain *auth_domain_find(char *name);
-extern struct auth_domain *auth_unix_lookup(struct in_addr addr);
+extern struct auth_domain *auth_unix_lookup(struct in6_addr *addr);
 extern int auth_unix_forget_old(struct auth_domain *dom);
 extern void svcauth_unix_purge(void);
 extern void svcauth_unix_info_release(void *);
diff --git a/include/linux/sunrpc/svcsock.h b/include/linux/sunrpc/svcsock.h
index 206f092ad4c7..8cff696dedf5 100644
--- a/include/linux/sunrpc/svcsock.h
+++ b/include/linux/sunrpc/svcsock.h
@@ -26,8 +26,8 @@ struct svc_sock {
         void                    (*sk_owspace)(struct sock *);
 
         /* private TCP part */
-        int                     sk_reclen;      /* length of record */
-        int                     sk_tcplen;      /* current read length */
+        u32                     sk_reclen;      /* length of record */
+        u32                     sk_tcplen;      /* current read length */
 };
 
 /*
diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h
index b3ff9a815e6f..4d80a118d538 100644
--- a/include/linux/sunrpc/xprt.h
+++ b/include/linux/sunrpc/xprt.h
@@ -86,6 +86,10 @@ struct rpc_rqst {
         unsigned long           rq_majortimeo;  /* major timeout alarm */
         unsigned long           rq_timeout;     /* Current timeout value */
         unsigned int            rq_retries;     /* # of retries */
+        unsigned int            rq_connect_cookie;
+                                                /* A cookie used to track the
+                                                   state of the transport
+                                                   connection */
         
         /*
          * Partial send handling
@@ -152,6 +156,9 @@ struct rpc_xprt {
         unsigned long           connect_timeout,
                                 bind_timeout,
                                 reestablish_timeout;
+        unsigned int            connect_cookie; /* A cookie that gets bumped
+                                                   every time the transport
+                                                   is reconnected */
 
         /*
          * Disconnection of idle transports
@@ -232,7 +239,7 @@ int			xprt_unregister_transport(struct xprt_class *type);
 void                    xprt_set_retrans_timeout_def(struct rpc_task *task);
 void                    xprt_set_retrans_timeout_rtt(struct rpc_task *task);
 void                    xprt_wake_pending_tasks(struct rpc_xprt *xprt, int status);
-void                    xprt_wait_for_buffer_space(struct rpc_task *task);
+void                    xprt_wait_for_buffer_space(struct rpc_task *task, rpc_action action);
 void                    xprt_write_space(struct rpc_xprt *xprt);
 void                    xprt_update_rtt(struct rpc_task *task);
 void                    xprt_adjust_cwnd(struct rpc_task *task, int result);
@@ -241,6 +248,7 @@ void			xprt_complete_rqst(struct rpc_task *task, int copied);
 void                    xprt_release_rqst_cong(struct rpc_task *task);
 void                    xprt_disconnect_done(struct rpc_xprt *xprt);
 void                    xprt_force_disconnect(struct rpc_xprt *xprt);
+void                    xprt_conditional_disconnect(struct rpc_xprt *xprt, unsigned int cookie);
 
 /*
  * Reserved bit positions in xprt->state
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 583e0481dfa0..c08689ea9b4b 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -23,6 +23,7 @@
 
 struct usb_device;
 struct usb_driver;
+struct wusb_dev;
 
 /*-------------------------------------------------------------------------*/
 
@@ -341,103 +342,146 @@ struct usb_bus {
 
 struct usb_tt;
 
-/*
+/**
  * struct usb_device - kernel's representation of a USB device
- *
- * FIXME: Write the kerneldoc!
- *
+ * @devnum: device number; address on a USB bus
+ * @devpath: device ID string for use in messages (e.g., /port/...)
+ * @state: device state: configured, not attached, etc.
+ * @speed: device speed: high/full/low (or error)
+ * @tt: Transaction Translator info; used with low/full speed dev, highspeed hub
+ * @ttport: device port on that tt hub
+ * @toggle: one bit for each endpoint, with ([0] = IN, [1] = OUT) endpoints
+ * @parent: our hub, unless we're the root
+ * @bus: bus we're part of
+ * @ep0: endpoint 0 data (default control pipe)
+ * @dev: generic device interface
+ * @descriptor: USB device descriptor
+ * @config: all of the device's configs
+ * @actconfig: the active configuration
+ * @ep_in: array of IN endpoints
+ * @ep_out: array of OUT endpoints
+ * @rawdescriptors: raw descriptors for each config
+ * @bus_mA: Current available from the bus
+ * @portnum: parent port number (origin 1)
+ * @level: number of USB hub ancestors
+ * @can_submit: URBs may be submitted
+ * @discon_suspended: disconnected while suspended
+ * @persist_enabled:  USB_PERSIST enabled for this device
+ * @have_langid: whether string_langid is valid
+ * @authorized: policy has said we can use it;
+ *      (user space) policy determines if we authorize this device to be
+ *      used or not. By default, wired USB devices are authorized.
+ *      WUSB devices are not, until we authorize them from user space.
+ *      FIXME -- complete doc
+ * @authenticated: Crypto authentication passed
+ * @wusb: device is Wireless USB
+ * @string_langid: language ID for strings
+ * @product: iProduct string, if present (static)
+ * @manufacturer: iManufacturer string, if present (static)
+ * @serial: iSerialNumber string, if present (static)
+ * @filelist: usbfs files that are open to this device
+ * @usb_classdev: USB class device that was created for usbfs device
+ *      access from userspace
+ * @usbfs_dentry: usbfs dentry entry for the device
+ * @maxchild: number of ports if hub
+ * @children: child devices - USB devices that are attached to this hub
+ * @pm_usage_cnt: usage counter for autosuspend
+ * @quirks: quirks of the whole device
+ * @urbnum: number of URBs submitted for the whole device
+ * @active_duration: total time device is not suspended
+ * @autosuspend: for delayed autosuspends
+ * @pm_mutex: protects PM operations
+ * @last_busy: time of last use
+ * @autosuspend_delay: in jiffies
+ * @connect_time: time device was first connected
+ * @auto_pm: autosuspend/resume in progress
+ * @do_remote_wakeup:  remote wakeup should be enabled
+ * @reset_resume: needs reset instead of resume
+ * @autosuspend_disabled: autosuspend disabled by the user
+ * @autoresume_disabled: autoresume disabled by the user
+ * @skip_sys_resume: skip the next system resume
+ *
+ * Notes:
  * Usbcore drivers should not set usbdev->state directly.  Instead use
  * usb_set_device_state().
- *
- * @authorized: (user space) policy determines if we authorize this
- *              device to be used or not. By default, wired USB
- *              devices are authorized. WUSB devices are not, until we
- *              authorize them from user space. FIXME -- complete doc
  */
 struct usb_device {
-        int             devnum;         /* Address on USB bus */
-        char            devpath [16];   /* Use in messages: /port/port/... */
-        enum usb_device_state   state;  /* configured, not attached, etc */
-        enum usb_device_speed   speed;  /* high/full/low (or error) */
+        int             devnum;
+        char            devpath [16];
+        enum usb_device_state   state;
+        enum usb_device_speed   speed;
 
-        struct usb_tt   *tt;            /* low/full speed dev, highspeed hub */
-        int             ttport;         /* device port on that tt hub */
+        struct usb_tt   *tt;
+        int             ttport;
 
-        unsigned int toggle[2];         /* one bit for each endpoint
-                                         * ([0] = IN, [1] = OUT) */
+        unsigned int toggle[2];
 
-        struct usb_device *parent;      /* our hub, unless we're the root */
-        struct usb_bus *bus;            /* Bus we're part of */
+        struct usb_device *parent;
+        struct usb_bus *bus;
         struct usb_host_endpoint ep0;
 
-        struct device dev;              /* Generic device interface */
+        struct device dev;
 
-        struct usb_device_descriptor descriptor;/* Descriptor */
-        struct usb_host_config *config; /* All of the configs */
+        struct usb_device_descriptor descriptor;
+        struct usb_host_config *config;
 
-        struct usb_host_config *actconfig;/* the active configuration */
+        struct usb_host_config *actconfig;
         struct usb_host_endpoint *ep_in[16];
         struct usb_host_endpoint *ep_out[16];
 
-        char **rawdescriptors;          /* Raw descriptors for each config */
+        char **rawdescriptors;
 
-        unsigned short bus_mA;          /* Current available from the bus */
-        u8 portnum;                     /* Parent port number (origin 1) */
-        u8 level;                       /* Number of USB hub ancestors */
+        unsigned short bus_mA;
+        u8 portnum;
+        u8 level;
 
-        unsigned can_submit:1;          /* URBs may be submitted */
-        unsigned discon_suspended:1;    /* Disconnected while suspended */
-        unsigned have_langid:1;         /* whether string_langid is valid */
-        unsigned authorized:1;          /* Policy has said we can use it */
-        unsigned wusb:1;                /* Device is Wireless USB */
-        int string_langid;              /* language ID for strings */
+        unsigned can_submit:1;
+        unsigned discon_suspended:1;
+        unsigned persist_enabled:1;
+        unsigned have_langid:1;
+        unsigned authorized:1;
+        unsigned authenticated:1;
+        unsigned wusb:1;
+        int string_langid;
 
         /* static strings from the device */
-        char *product;                  /* iProduct string, if present */
-        char *manufacturer;             /* iManufacturer string, if present */
-        char *serial;                   /* iSerialNumber string, if present */
+        char *product;
+        char *manufacturer;
+        char *serial;
 
         struct list_head filelist;
 #ifdef CONFIG_USB_DEVICE_CLASS
         struct device *usb_classdev;
 #endif
 #ifdef CONFIG_USB_DEVICEFS
-        struct dentry *usbfs_dentry;    /* usbfs dentry entry for the device */
+        struct dentry *usbfs_dentry;
 #endif
-        /*
-         * Child devices - these can be either new devices
-         * (if this is a hub device), or different instances
-         * of this same device.
-         *
-         * Each instance needs its own set of data structures.
-         */
 
-        int maxchild;                   /* Number of ports if hub */
+        int maxchild;
         struct usb_device *children[USB_MAXCHILDREN];
 
-        int pm_usage_cnt;               /* usage counter for autosuspend */
-        u32 quirks;                     /* quirks of the whole device */
-        atomic_t urbnum;                /* number of URBs submitted for
-                                           the whole device */
+        int pm_usage_cnt;
+        u32 quirks;
+        atomic_t urbnum;
 
-        unsigned long active_duration;  /* total time device is not suspended */
+        unsigned long active_duration;
 
 #ifdef CONFIG_PM
-        struct delayed_work autosuspend; /* for delayed autosuspends */
-        struct mutex pm_mutex;          /* protects PM operations */
-
-        unsigned long last_busy;        /* time of last use */
-        int autosuspend_delay;          /* in jiffies */
-        unsigned long connect_time;     /* time device was first connected */
-
-        unsigned auto_pm:1;             /* autosuspend/resume in progress */
-        unsigned do_remote_wakeup:1;    /* remote wakeup should be enabled */
-        unsigned reset_resume:1;        /* needs reset instead of resume */
-        unsigned persist_enabled:1;     /* USB_PERSIST enabled for this dev */
-        unsigned autosuspend_disabled:1; /* autosuspend and autoresume */
-        unsigned autoresume_disabled:1;  /*  disabled by the user */
-        unsigned skip_sys_resume:1;     /* skip the next system resume */
+        struct delayed_work autosuspend;
+        struct mutex pm_mutex;
+
+        unsigned long last_busy;
+        int autosuspend_delay;
+        unsigned long connect_time;
+
+        unsigned auto_pm:1;
+        unsigned do_remote_wakeup:1;
+        unsigned reset_resume:1;
+        unsigned autosuspend_disabled:1;
+        unsigned autoresume_disabled:1;
+        unsigned skip_sys_resume:1;
 #endif
+        struct wusb_dev *wusb_dev;
 };
 #define to_usb_device(d) container_of(d, struct usb_device, dev)
 
@@ -898,10 +942,11 @@ struct usbdrv_wrap {
  *      and should normally be the same as the module name.
  * @probe: Called to see if the driver is willing to manage a particular
  *      interface on a device.  If it is, probe returns zero and uses
- *      dev_set_drvdata() to associate driver-specific data with the
+ *      usb_set_intfdata() to associate driver-specific data with the
  *      interface.  It may also use usb_set_interface() to specify the
  *      appropriate altsetting.  If unwilling to manage the interface,
- *      return a negative errno value.
+ *      return -ENODEV, if genuine IO errors occured, an appropriate
+ *      negative errno value.
  * @disconnect: Called when the interface is no longer accessible, usually
  *      because its device has been (or is being) disconnected or the
  *      driver module is being unloaded.
@@ -916,10 +961,7 @@ struct usbdrv_wrap {
  * @pre_reset: Called by usb_reset_composite_device() when the device
  *      is about to be reset.
  * @post_reset: Called by usb_reset_composite_device() after the device
- *      has been reset, or in lieu of @resume following a reset-resume
- *      (i.e., the device is reset instead of being resumed, as might
- *      happen if power was lost).  The second argument tells which is
- *      the reason.
+ *      has been reset
  * @id_table: USB drivers use ID table to support hotplugging.
  *      Export this with MODULE_DEVICE_TABLE(usb,...).  This must be set
  *      or your driver's probe function will never get called.
@@ -1411,6 +1453,7 @@ extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags);
 extern int usb_unlink_urb(struct urb *urb);
 extern void usb_kill_urb(struct urb *urb);
 extern void usb_kill_anchored_urbs(struct usb_anchor *anchor);
+extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor);
 extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor);
 extern void usb_unanchor_urb(struct urb *urb);
 extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor,
@@ -1661,13 +1704,12 @@ extern void usb_unregister_notify(struct notifier_block *nb);
 #define dbg(format, arg...) do {} while (0)
 #endif
 
-#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
-        __FILE__ , ## arg)
-#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , \
-        __FILE__ , ## arg)
-#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , \
-        __FILE__ , ## arg)
-
+#define err(format, arg...) printk(KERN_ERR KBUILD_MODNAME ": " \
+        format "\n" , ## arg)
+#define info(format, arg...) printk(KERN_INFO KBUILD_MODNAME ": " \
+        format "\n" , ## arg)
+#define warn(format, arg...) printk(KERN_WARNING KBUILD_MODNAME ": " \
+        format "\n" , ## arg)
 
 #endif  /* __KERNEL__ */
 
diff --git a/include/linux/usb/audio.h b/include/linux/usb/audio.h
index 2dfeef16b221..8cb025fef634 100644
--- a/include/linux/usb/audio.h
+++ b/include/linux/usb/audio.h
@@ -50,4 +50,4 @@ struct usb_ac_header_descriptor_##n {				\
         __u8  baInterfaceNr[n];                                 \
 } __attribute__ ((packed))
 
-#endif
+#endif /* __LINUX_USB_AUDIO_H */
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index 94ee4ecf0564..71e52f2f6a38 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -6,6 +6,9 @@
  * firmware based USB peripherals.
  */
 
+#ifndef __LINUX_USB_CDC_H
+#define __LINUX_USB_CDC_H
+
 #define USB_CDC_SUBCLASS_ACM                    0x02
 #define USB_CDC_SUBCLASS_ETHERNET               0x06
 #define USB_CDC_SUBCLASS_WHCM                   0x08
@@ -221,3 +224,4 @@ struct usb_cdc_notification {
         __le16  wLength;
 } __attribute__ ((packed));
 
+#endif /* __LINUX_USB_CDC_H */
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 6169438ec5a2..7e0d3084f76c 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -66,8 +66,8 @@
 #define USB_RECIP_ENDPOINT              0x02
 #define USB_RECIP_OTHER                 0x03
 /* From Wireless USB 1.0 */
-#define USB_RECIP_PORT                  0x04
-#define USB_RECIP_RPIPE                 0x05
+#define USB_RECIP_PORT                  0x04
+#define USB_RECIP_RPIPE         0x05
 
 /*
  * Standard requests, for the bRequest field of a SETUP packet.
@@ -102,10 +102,16 @@
 #define USB_REQ_LOOPBACK_DATA_READ      0x16
 #define USB_REQ_SET_INTERFACE_DS        0x17
 
+/* The Link Power Mangement (LPM) ECN defines USB_REQ_TEST_AND_SET command,
+ * used by hubs to put ports into a new L1 suspend state, except that it
+ * forgot to define its number ...
+ */
+
 /*
  * USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
  * are read as a bit array returned by USB_REQ_GET_STATUS.  (So there
- * are at most sixteen features of each type.)
+ * are at most sixteen features of each type.)  Hubs may also support a
+ * new USB_REQ_TEST_AND_SET_FEATURE to put ports into L1 suspend.
  */
 #define USB_DEVICE_SELF_POWERED         0       /* (read only) */
 #define USB_DEVICE_REMOTE_WAKEUP        1       /* dev may initiate wakeup */
@@ -180,6 +186,7 @@ struct usb_ctrlrequest {
 #define USB_DT_WIRELESS_ENDPOINT_COMP   0x11
 #define USB_DT_WIRE_ADAPTER             0x21
 #define USB_DT_RPIPE                    0x22
+#define USB_DT_CS_RADIO_CONTROL         0x23
 
 /* Conventional codes for class-specific descriptors.  The convention is
  * defined in the USB "Common Class" Spec (3.11).  Individual class specs
@@ -574,7 +581,9 @@ enum usb_device_state {
         /* NOTE:  there are actually four different SUSPENDED
          * states, returning to POWERED, DEFAULT, ADDRESS, or
          * CONFIGURED respectively when SOF tokens flow again.
+         * At this level there's no difference between L1 and L2
+         * suspend states.  (L2 being original USB 1.1 suspend.)
          */
 };
 
-#endif  /* __LINUX_USB_CH9_H */
+#endif /* __LINUX_USB_CH9_H */
diff --git a/include/linux/usb/g_printer.h b/include/linux/usb/g_printer.h
index 0c5ea1e3eb98..6178fde50f74 100644
--- a/include/linux/usb/g_printer.h
+++ b/include/linux/usb/g_printer.h
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+#ifndef __LINUX_USB_G_PRINTER_H
+#define __LINUX_USB_G_PRINTER_H
 
 #define PRINTER_NOT_ERROR       0x08
 #define PRINTER_SELECTED        0x10
@@ -29,3 +31,5 @@
  */
 #define GADGET_GET_PRINTER_STATUS       _IOR('g', 0x21, unsigned char)
 #define GADGET_SET_PRINTER_STATUS       _IOWR('g', 0x22, unsigned char)
+
+#endif /* __LINUX_USB_G_PRINTER_H */
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index f3295296b435..d8128f7102c9 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -846,4 +846,4 @@ extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *,
 
 extern void usb_ep_autoconfig_reset(struct usb_gadget *) __devinit;
 
-#endif  /* __LINUX_USB_GADGET_H */
+#endif /* __LINUX_USB_GADGET_H */
diff --git a/include/linux/usb/gadgetfs.h b/include/linux/usb/gadgetfs.h
index c291ab1af747..ea45f265ec05 100644
--- a/include/linux/usb/gadgetfs.h
+++ b/include/linux/usb/gadgetfs.h
@@ -1,11 +1,3 @@
-#ifndef __LINUX_USB_GADGETFS_H
-#define __LINUX_USB_GADGETFS_H
-
-#include <asm/types.h>
-#include <asm/ioctl.h>
-
-#include <linux/usb/ch9.h>
-
 /*
  * Filesystem based user-mode API to USB Gadget controller hardware
  *
@@ -23,6 +15,14 @@
  * then performing data transfers by reading or writing.
  */
 
+#ifndef __LINUX_USB_GADGETFS_H
+#define __LINUX_USB_GADGETFS_H
+
+#include <asm/types.h>
+#include <asm/ioctl.h>
+
+#include <linux/usb/ch9.h>
+
 /*
  * Events are delivered on the ep0 file descriptor, when the user mode driver
  * reads from this file descriptor after writing the descriptors.  Don't
diff --git a/include/linux/usb/input.h b/include/linux/usb/input.h
index 716e0cc16043..0e010b220e85 100644
--- a/include/linux/usb/input.h
+++ b/include/linux/usb/input.h
@@ -1,6 +1,3 @@
-#ifndef __USB_INPUT_H
-#define __USB_INPUT_H
-
 /*
  * Copyright (C) 2005 Dmitry Torokhov
  *
@@ -9,6 +6,9 @@
  * the Free Software Foundation.
  */
 
+#ifndef __LINUX_USB_INPUT_H
+#define __LINUX_USB_INPUT_H
+
 #include <linux/usb.h>
 #include <linux/input.h>
 #include <asm/byteorder.h>
@@ -22,4 +22,4 @@ usb_to_input_id(const struct usb_device *dev, struct input_id *id)
         id->version = le16_to_cpu(dev->descriptor.bcdDevice);
 }
 
-#endif
+#endif /* __LINUX_USB_INPUT_H */
diff --git a/include/linux/usb/iowarrior.h b/include/linux/usb/iowarrior.h
index de6f380e17a2..4fd6513d564c 100644
--- a/include/linux/usb/iowarrior.h
+++ b/include/linux/usb/iowarrior.h
@@ -1,5 +1,5 @@
-#ifndef _IOWARRIOR_H_
-#define _IOWARRIOR_H_
+#ifndef __LINUX_USB_IOWARRIOR_H
+#define __LINUX_USB_IOWARRIOR_H
 
 #define CODEMERCS_MAGIC_NUMBER  0xC0    /* like COde Mercenaries */
 
@@ -39,4 +39,4 @@ struct iowarrior_info {
 */
 #define IOW_GETINFO _IOR(CODEMERCS_MAGIC_NUMBER, 3, struct iowarrior_info)
 
-#endif  /* _IOWARRIOR_H_ */
+#endif /* __LINUX_USB_IOWARRIOR_H */
diff --git a/include/linux/usb/isp116x.h b/include/linux/usb/isp116x.h
index 67d2826f34fe..96ca114e88d0 100644
--- a/include/linux/usb/isp116x.h
+++ b/include/linux/usb/isp116x.h
@@ -1,9 +1,11 @@
-
 /*
  * Board initialization code should put one of these into dev->platform_data
  * and place the isp116x onto platform_bus.
  */
 
+#ifndef __LINUX_USB_ISP116X_H
+#define __LINUX_USB_ISP116X_H
+
 struct isp116x_platform_data {
         /* Enable internal resistors on downstream ports */
         unsigned sel15Kres:1;
@@ -27,3 +29,5 @@ struct isp116x_platform_data {
          */
         void (*delay) (struct device *dev, int delay);
 };
+
+#endif /* __LINUX_USB_ISP116X_H */
diff --git a/include/linux/usb/midi.h b/include/linux/usb/midi.h
index 80624c562921..1d1040865661 100644
--- a/include/linux/usb/midi.h
+++ b/include/linux/usb/midi.h
@@ -109,4 +109,4 @@ struct usb_ms_endpoint_descriptor_##n {				\
         __u8  baAssocJackID[n];                                 \
 } __attribute__ ((packed))
 
-#endif
+#endif /* __LINUX_USB_MIDI_H */
diff --git a/include/linux/usb/net2280.h b/include/linux/usb/net2280.h
index ec897cb844ab..96ca549a778d 100644
--- a/include/linux/usb/net2280.h
+++ b/include/linux/usb/net2280.h
@@ -1,11 +1,7 @@
 /*
  * NetChip 2280 high/full speed USB device controller.
  * Unlike many such controllers, this one talks PCI.
- */
-#ifndef __LINUX_USB_NET2280_H
-#define __LINUX_USB_NET2280_H
-
-/*
+ *
  * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
  * Copyright (C) 2003 David Brownell
  *
@@ -24,6 +20,9 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+#ifndef __LINUX_USB_NET2280_H
+#define __LINUX_USB_NET2280_H
+
 /*-------------------------------------------------------------------------*/
 
 /* NET2280 MEMORY MAPPED REGISTERS
diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h
index e007074ebe41..1db25d152ad8 100644
--- a/include/linux/usb/otg.h
+++ b/include/linux/usb/otg.h
@@ -1,11 +1,13 @@
 /* USB OTG (On The Go) defines */
-
 /*
+ *
  * These APIs may be used between USB controllers.  USB device drivers
  * (for either host or peripheral roles) don't use these calls; they
  * continue to use just usb_device and usb_gadget.
  */
 
+#ifndef __LINUX_USB_OTG_H
+#define __LINUX_USB_OTG_H
 
 /* OTG defines lots of enumeration states before device reset */
 enum usb_otg_state {
@@ -129,3 +131,5 @@ otg_start_srp(struct otg_transceiver *otg)
 
 /* for OTG controller drivers (and maybe other stuff) */
 extern int usb_bus_start_enum(struct usb_bus *bus, unsigned port_num);
+
+#endif /* __LINUX_USB_OTG_H */
diff --git a/include/linux/usb/quirks.h b/include/linux/usb/quirks.h
index 1f999ec8d08c..7f6c603db654 100644
--- a/include/linux/usb/quirks.h
+++ b/include/linux/usb/quirks.h
@@ -4,6 +4,9 @@
  * belong here.
  */
 
+#ifndef __LINUX_USB_QUIRKS_H
+#define __LINUX_USB_QUIRKS_H
+
 /* string descriptors must not be fetched using a 255-byte read */
 #define USB_QUIRK_STRING_FETCH_255      0x00000001
 
@@ -12,3 +15,5 @@
 
 /* device can't handle Set-Interface requests */
 #define USB_QUIRK_NO_SET_INTF           0x00000004
+
+#endif /* __LINUX_USB_QUIRKS_H */
diff --git a/include/linux/usb/rndis_host.h b/include/linux/usb/rndis_host.h
index edc1d4a0e272..29d6458ecb8d 100644
--- a/include/linux/usb/rndis_host.h
+++ b/include/linux/usb/rndis_host.h
@@ -17,10 +17,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-
-#ifndef __RNDIS_HOST_H
-#define __RNDIS_HOST_H
-
+#ifndef __LINUX_USB_RNDIS_HOST_H
+#define __LINUX_USB_RNDIS_HOST_H
 
 /*
  * CONTROL uses CDC "encapsulated commands" with funky notifications.
@@ -270,5 +268,4 @@ extern int rndis_rx_fixup(struct usbnet *dev, struct sk_buff *skb);
 extern struct sk_buff *
 rndis_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags);
 
-#endif  /* __RNDIS_HOST_H */
-
+#endif  /* __LINUX_USB_RNDIS_HOST_H */
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 21b4a1c6f585..8f891cbaf9ab 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -10,7 +10,6 @@
  *
  */
 
-
 #ifndef __LINUX_USB_SERIAL_H
 #define __LINUX_USB_SERIAL_H
 
@@ -146,8 +145,6 @@ struct usb_serial {
 };
 #define to_usb_serial(d) container_of(d, struct usb_serial, kref)
 
-#define NUM_DONT_CARE   99
-
 /* get and set the serial private data pointer helper functions */
 static inline void *usb_get_serial_data(struct usb_serial *serial)
 {
@@ -165,18 +162,6 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
  *      used in the syslog messages when a device is inserted or removed.
  * @id_table: pointer to a list of usb_device_id structures that define all
  *      of the devices this structure can support.
- * @num_interrupt_in: If a device doesn't have this many interrupt-in
- *      endpoints, it won't be sent to the driver's attach() method.
- *      (But it might still be sent to the probe() method.)
- * @num_interrupt_out: If a device doesn't have this many interrupt-out
- *      endpoints, it won't be sent to the driver's attach() method.
- *      (But it might still be sent to the probe() method.)
- * @num_bulk_in: If a device doesn't have this many bulk-in
- *      endpoints, it won't be sent to the driver's attach() method.
- *      (But it might still be sent to the probe() method.)
- * @num_bulk_out: If a device doesn't have this many bulk-out
- *      endpoints, it won't be sent to the driver's attach() method.
- *      (But it might still be sent to the probe() method.)
  * @num_ports: the number of different ports this device will have.
  * @calc_num_ports: pointer to a function to determine how many ports this
  *      device has dynamically.  It will be called after the probe()
@@ -212,10 +197,6 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
 struct usb_serial_driver {
         const char *description;
         const struct usb_device_id *id_table;
-        char    num_interrupt_in;
-        char    num_interrupt_out;
-        char    num_bulk_in;
-        char    num_bulk_out;
         char    num_ports;
 
         struct list_head        driver_list;
@@ -340,5 +321,5 @@ static inline void usb_serial_debug_data(int debug,
 
 
 
-#endif  /* ifdef __LINUX_USB_SERIAL_H */
+#endif /* __LINUX_USB_SERIAL_H */
 
diff --git a/include/linux/usb/sl811.h b/include/linux/usb/sl811.h
index 877373da410d..3afe4d16fcef 100644
--- a/include/linux/usb/sl811.h
+++ b/include/linux/usb/sl811.h
@@ -1,9 +1,11 @@
-
 /*
  * board initialization should put one of these into dev->platform_data
  * and place the sl811hs onto platform_bus named "sl811-hcd".
  */
 
+#ifndef __LINUX_USB_SL811_H
+#define __LINUX_USB_SL811_H
+
 struct sl811_platform_data {
         unsigned        can_wakeup:1;
 
@@ -24,3 +26,4 @@ struct sl811_platform_data {
         /* void         (*clock_enable)(struct device *dev, int is_on); */
 };
 
+#endif /* __LINUX_USB_SL811_H */
diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h
index e0501da3dd11..ba09fe88adda 100644
--- a/include/linux/usb/usbnet.h
+++ b/include/linux/usb/usbnet.h
@@ -19,10 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-
-#ifndef __USBNET_H
-#define __USBNET_H
-
+#ifndef __LINUX_USB_USBNET_H
+#define __LINUX_USB_USBNET_H
 
 /* interface from usbnet core to each USB networking link we handle */
 struct usbnet {
@@ -211,4 +209,4 @@ extern int usbnet_nway_reset(struct net_device *net);
         printk(KERN_INFO "%s: " fmt "\n" , (usbnet)->net->name , ## arg); \
 
 
-#endif  /* __USBNET_H */
+#endif /* __LINUX_USB_USBNET_H */
diff --git a/include/linux/usb_usual.h b/include/linux/usb_usual.h
index 0a40dfa44c9f..d9a3bbe38e6b 100644
--- a/include/linux/usb_usual.h
+++ b/include/linux/usb_usual.h
@@ -85,6 +85,7 @@ enum { US_DO_ALL_FLAGS };
 #define US_SC_LOCKABLE  0x07            /* Password-protected */
 
 #define US_SC_ISD200    0xf0            /* ISD200 ATA */
+#define US_SC_CYP_ATACB 0xf1            /* Cypress ATACB */
 #define US_SC_DEVICE    0xff            /* Use device's value */
 
 /* Protocols */
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 17cb108b7db0..3118ede2c67b 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -77,8 +77,11 @@ struct usbdevfs_connectinfo {
         unsigned char slow;
 };
 
-#define USBDEVFS_URB_SHORT_NOT_OK          1
-#define USBDEVFS_URB_ISO_ASAP              2
+#define USBDEVFS_URB_SHORT_NOT_OK       0x01
+#define USBDEVFS_URB_ISO_ASAP           0x02
+#define USBDEVFS_URB_NO_FSBR            0x20
+#define USBDEVFS_URB_ZERO_PACKET        0x40
+#define USBDEVFS_URB_NO_INTERRUPT       0x80
 
 #define USBDEVFS_URB_TYPE_ISO              0
 #define USBDEVFS_URB_TYPE_INTERRUPT        1
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 17a80177a674..c1411189ba6c 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -282,6 +282,7 @@ struct v4l2_pix_format
 #define V4L2_PIX_FMT_BGR32   v4l2_fourcc('B','G','R','4') /* 32  BGR-8-8-8-8   */
 #define V4L2_PIX_FMT_RGB32   v4l2_fourcc('R','G','B','4') /* 32  RGB-8-8-8-8   */
 #define V4L2_PIX_FMT_GREY    v4l2_fourcc('G','R','E','Y') /*  8  Greyscale     */
+#define V4L2_PIX_FMT_Y16     v4l2_fourcc('Y','1','6',' ') /* 16  Greyscale     */
 #define V4L2_PIX_FMT_PAL8    v4l2_fourcc('P','A','L','8') /*  8  8-bit palette */
 #define V4L2_PIX_FMT_YVU410  v4l2_fourcc('Y','V','U','9') /*  9  YVU 4:1:0     */
 #define V4L2_PIX_FMT_YVU420  v4l2_fourcc('Y','V','1','2') /* 12  YVU 4:2:0     */
@@ -308,6 +309,7 @@ struct v4l2_pix_format
 
 /* see http://www.siliconimaging.com/RGB%20Bayer.htm */
 #define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B','A','8','1') /*  8  BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B','Y','R','2') /* 16  BGBG.. GRGR.. */
 
 /* compressed formats */
 #define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M','J','P','G') /* Motion-JPEG   */
@@ -793,6 +795,7 @@ struct v4l2_ext_controls
 /*  Values for ctrl_class field */
 #define V4L2_CTRL_CLASS_USER 0x00980000 /* Old-style 'user' controls */
 #define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */
+#define V4L2_CTRL_CLASS_CAMERA 0x009a0000       /* Camera class controls */
 
 #define V4L2_CTRL_ID_MASK         (0x0fffffff)
 #define V4L2_CTRL_ID2CLASS(id)    ((id) & 0x0fff0000UL)
@@ -849,21 +852,37 @@ struct v4l2_querymenu
 #define V4L2_CID_AUDIO_TREBLE           (V4L2_CID_BASE+8)
 #define V4L2_CID_AUDIO_MUTE             (V4L2_CID_BASE+9)
 #define V4L2_CID_AUDIO_LOUDNESS         (V4L2_CID_BASE+10)
-#define V4L2_CID_BLACK_LEVEL            (V4L2_CID_BASE+11)
+#define V4L2_CID_BLACK_LEVEL            (V4L2_CID_BASE+11) /* Deprecated */
 #define V4L2_CID_AUTO_WHITE_BALANCE     (V4L2_CID_BASE+12)
 #define V4L2_CID_DO_WHITE_BALANCE       (V4L2_CID_BASE+13)
 #define V4L2_CID_RED_BALANCE            (V4L2_CID_BASE+14)
 #define V4L2_CID_BLUE_BALANCE           (V4L2_CID_BASE+15)
 #define V4L2_CID_GAMMA                  (V4L2_CID_BASE+16)
-#define V4L2_CID_WHITENESS              (V4L2_CID_GAMMA) /* ? Not sure */
+#define V4L2_CID_WHITENESS              (V4L2_CID_GAMMA) /* Deprecated */
 #define V4L2_CID_EXPOSURE               (V4L2_CID_BASE+17)
 #define V4L2_CID_AUTOGAIN               (V4L2_CID_BASE+18)
 #define V4L2_CID_GAIN                   (V4L2_CID_BASE+19)
 #define V4L2_CID_HFLIP                  (V4L2_CID_BASE+20)
 #define V4L2_CID_VFLIP                  (V4L2_CID_BASE+21)
-#define V4L2_CID_HCENTER                (V4L2_CID_BASE+22)
-#define V4L2_CID_VCENTER                (V4L2_CID_BASE+23)
-#define V4L2_CID_LASTP1                 (V4L2_CID_BASE+24) /* last CID + 1 */
+
+/* Deprecated, use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */
+#define V4L2_CID_HCENTER_DEPRECATED     (V4L2_CID_BASE+22)
+#define V4L2_CID_VCENTER_DEPRECATED     (V4L2_CID_BASE+23)
+
+#define V4L2_CID_POWER_LINE_FREQUENCY   (V4L2_CID_BASE+24)
+enum v4l2_power_line_frequency {
+        V4L2_CID_POWER_LINE_FREQUENCY_DISABLED  = 0,
+        V4L2_CID_POWER_LINE_FREQUENCY_50HZ      = 1,
+        V4L2_CID_POWER_LINE_FREQUENCY_60HZ      = 2,
+};
+#define V4L2_CID_HUE_AUTO                       (V4L2_CID_BASE+25)
+#define V4L2_CID_WHITE_BALANCE_TEMPERATURE      (V4L2_CID_BASE+26)
+#define V4L2_CID_SHARPNESS                      (V4L2_CID_BASE+27)
+#define V4L2_CID_BACKLIGHT_COMPENSATION         (V4L2_CID_BASE+28)
+#define V4L2_CID_CHROMA_AGC                     (V4L2_CID_BASE+29)
+#define V4L2_CID_COLOR_KILLER                   (V4L2_CID_BASE+30)
+/* last CID + 1 */
+#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+31)
 
 /*  MPEG-class control IDs defined by V4L2 */
 #define V4L2_CID_MPEG_BASE                      (V4L2_CTRL_CLASS_MPEG | 0x900)
@@ -1051,6 +1070,32 @@ enum v4l2_mpeg_cx2341x_video_median_filter_type {
 #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP    (V4L2_CID_MPEG_CX2341X_BASE+10)
 #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS         (V4L2_CID_MPEG_CX2341X_BASE+11)
 
+/*  Camera class control IDs */
+#define V4L2_CID_CAMERA_CLASS_BASE      (V4L2_CTRL_CLASS_CAMERA | 0x900)
+#define V4L2_CID_CAMERA_CLASS           (V4L2_CTRL_CLASS_CAMERA | 1)
+
+#define V4L2_CID_EXPOSURE_AUTO                  (V4L2_CID_CAMERA_CLASS_BASE+1)
+enum  v4l2_exposure_auto_type {
+        V4L2_EXPOSURE_AUTO = 0,
+        V4L2_EXPOSURE_MANUAL = 1,
+        V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
+        V4L2_EXPOSURE_APERTURE_PRIORITY = 3
+};
+#define V4L2_CID_EXPOSURE_ABSOLUTE              (V4L2_CID_CAMERA_CLASS_BASE+2)
+#define V4L2_CID_EXPOSURE_AUTO_PRIORITY         (V4L2_CID_CAMERA_CLASS_BASE+3)
+
+#define V4L2_CID_PAN_RELATIVE                   (V4L2_CID_CAMERA_CLASS_BASE+4)
+#define V4L2_CID_TILT_RELATIVE                  (V4L2_CID_CAMERA_CLASS_BASE+5)
+#define V4L2_CID_PAN_RESET                      (V4L2_CID_CAMERA_CLASS_BASE+6)
+#define V4L2_CID_TILT_RESET                     (V4L2_CID_CAMERA_CLASS_BASE+7)
+
+#define V4L2_CID_PAN_ABSOLUTE                   (V4L2_CID_CAMERA_CLASS_BASE+8)
+#define V4L2_CID_TILT_ABSOLUTE                  (V4L2_CID_CAMERA_CLASS_BASE+9)
+
+#define V4L2_CID_FOCUS_ABSOLUTE                 (V4L2_CID_CAMERA_CLASS_BASE+10)
+#define V4L2_CID_FOCUS_RELATIVE                 (V4L2_CID_CAMERA_CLASS_BASE+11)
+#define V4L2_CID_FOCUS_AUTO                     (V4L2_CID_CAMERA_CLASS_BASE+12)
+
 /*
  *      T U N I N G
  */
diff --git a/include/linux/wm97xx.h b/include/linux/wm97xx.h
new file mode 100644
index 000000000000..4d13732e9cf0
--- /dev/null
+++ b/include/linux/wm97xx.h
@@ -0,0 +1,314 @@
+
+/*
+ * Register bits and API for Wolfson WM97xx series of codecs
+ */
+
+#ifndef _LINUX_WM97XX_H
+#define _LINUX_WM97XX_H
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/input.h>        /* Input device layer */
+#include <linux/platform_device.h>
+
+/*
+ * WM97xx AC97 Touchscreen registers
+ */
+#define AC97_WM97XX_DIGITISER1          0x76
+#define AC97_WM97XX_DIGITISER2          0x78
+#define AC97_WM97XX_DIGITISER_RD        0x7a
+#define AC97_WM9713_DIG1                0x74
+#define AC97_WM9713_DIG2                AC97_WM97XX_DIGITISER1
+#define AC97_WM9713_DIG3                AC97_WM97XX_DIGITISER2
+
+/*
+ * WM97xx register bits
+ */
+#define WM97XX_POLL             0x8000  /* initiate a polling measurement */
+#define WM97XX_ADCSEL_X         0x1000  /* x coord measurement */
+#define WM97XX_ADCSEL_Y         0x2000  /* y coord measurement */
+#define WM97XX_ADCSEL_PRES      0x3000  /* pressure measurement */
+#define WM97XX_ADCSEL_MASK      0x7000
+#define WM97XX_COO              0x0800  /* enable coordinate mode */
+#define WM97XX_CTC              0x0400  /* enable continuous mode */
+#define WM97XX_CM_RATE_93       0x0000  /* 93.75Hz continuous rate */
+#define WM97XX_CM_RATE_187      0x0100  /* 187.5Hz continuous rate */
+#define WM97XX_CM_RATE_375      0x0200  /* 375Hz continuous rate */
+#define WM97XX_CM_RATE_750      0x0300  /* 750Hz continuous rate */
+#define WM97XX_CM_RATE_8K       0x00f0  /* 8kHz continuous rate */
+#define WM97XX_CM_RATE_12K      0x01f0  /* 12kHz continuous rate */
+#define WM97XX_CM_RATE_24K      0x02f0  /* 24kHz continuous rate */
+#define WM97XX_CM_RATE_48K      0x03f0  /* 48kHz continuous rate */
+#define WM97XX_CM_RATE_MASK     0x03f0
+#define WM97XX_RATE(i)          (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0))
+#define WM97XX_DELAY(i)         ((i << 4) & 0x00f0)     /* sample delay times */
+#define WM97XX_DELAY_MASK       0x00f0
+#define WM97XX_SLEN             0x0008  /* slot read back enable */
+#define WM97XX_SLT(i)           ((i - 5) & 0x7) /* panel slot (5-11) */
+#define WM97XX_SLT_MASK         0x0007
+#define WM97XX_PRP_DETW         0x4000  /* detect on, digitise off, wake */
+#define WM97XX_PRP_DET          0x8000  /* detect on, digitise off, no wake */
+#define WM97XX_PRP_DET_DIG      0xc000  /* setect on, digitise on */
+#define WM97XX_RPR              0x2000  /* wake up on pen down */
+#define WM97XX_PEN_DOWN         0x8000  /* pen is down */
+#define WM97XX_ADCSRC_MASK      0x7000  /* ADC source mask */
+
+#define WM97XX_AUX_ID1          0x8001
+#define WM97XX_AUX_ID2          0x8002
+#define WM97XX_AUX_ID3          0x8003
+#define WM97XX_AUX_ID4          0x8004
+
+
+/* WM9712 Bits */
+#define WM9712_45W              0x1000  /* set for 5-wire touchscreen */
+#define WM9712_PDEN             0x0800  /* measure only when pen down */
+#define WM9712_WAIT             0x0200  /* wait until adc is read before next sample */
+#define WM9712_PIL              0x0100  /* current used for pressure measurement. set 400uA else 200uA */
+#define WM9712_MASK_HI          0x0040  /* hi on mask pin (47) stops conversions */
+#define WM9712_MASK_EDGE        0x0080  /* rising/falling edge on pin delays sample */
+#define WM9712_MASK_SYNC        0x00c0  /* rising/falling edge on mask initiates sample */
+#define WM9712_RPU(i)           (i&0x3f)        /* internal pull up on pen detect (64k / rpu) */
+#define WM9712_PD(i)            (0x1 << i)      /* power management */
+
+/* WM9712 Registers */
+#define AC97_WM9712_POWER       0x24
+#define AC97_WM9712_REV         0x58
+
+/* WM9705 Bits */
+#define WM9705_PDEN             0x1000  /* measure only when pen is down */
+#define WM9705_PINV             0x0800  /* inverts sense of pen down output */
+#define WM9705_BSEN             0x0400  /* BUSY flag enable, pin47 is 1 when busy */
+#define WM9705_BINV             0x0200  /* invert BUSY (pin47) output */
+#define WM9705_WAIT             0x0100  /* wait until adc is read before next sample */
+#define WM9705_PIL              0x0080  /* current used for pressure measurement. set 400uA else 200uA */
+#define WM9705_PHIZ             0x0040  /* set PHONE and PCBEEP inputs to high impedance */
+#define WM9705_MASK_HI          0x0010  /* hi on mask stops conversions */
+#define WM9705_MASK_EDGE        0x0020  /* rising/falling edge on pin delays sample */
+#define WM9705_MASK_SYNC        0x0030  /* rising/falling edge on mask initiates sample */
+#define WM9705_PDD(i)           (i & 0x000f)    /* pen detect comparator threshold */
+
+
+/* WM9713 Bits */
+#define WM9713_PDPOL            0x0400  /* Pen down polarity */
+#define WM9713_POLL             0x0200  /* initiate a polling measurement */
+#define WM9713_CTC              0x0100  /* enable continuous mode */
+#define WM9713_ADCSEL_X         0x0002  /* X measurement */
+#define WM9713_ADCSEL_Y         0x0004  /* Y measurement */
+#define WM9713_ADCSEL_PRES      0x0008  /* Pressure measurement */
+#define WM9713_COO              0x0001  /* enable coordinate mode */
+#define WM9713_PDEN             0x0800  /* measure only when pen down */
+#define WM9713_ADCSEL_MASK      0x00fe  /* ADC selection mask */
+#define WM9713_WAIT             0x0200  /* coordinate wait */
+
+/* AUX ADC ID's */
+#define TS_COMP1                0x0
+#define TS_COMP2                0x1
+#define TS_BMON                 0x2
+#define TS_WIPER                0x3
+
+/* ID numbers */
+#define WM97XX_ID1              0x574d
+#define WM9712_ID2              0x4c12
+#define WM9705_ID2              0x4c05
+#define WM9713_ID2              0x4c13
+
+/* Codec GPIO's */
+#define WM97XX_MAX_GPIO         16
+#define WM97XX_GPIO_1           (1 << 1)
+#define WM97XX_GPIO_2           (1 << 2)
+#define WM97XX_GPIO_3           (1 << 3)
+#define WM97XX_GPIO_4           (1 << 4)
+#define WM97XX_GPIO_5           (1 << 5)
+#define WM97XX_GPIO_6           (1 << 6)
+#define WM97XX_GPIO_7           (1 << 7)
+#define WM97XX_GPIO_8           (1 << 8)
+#define WM97XX_GPIO_9           (1 << 9)
+#define WM97XX_GPIO_10          (1 << 10)
+#define WM97XX_GPIO_11          (1 << 11)
+#define WM97XX_GPIO_12          (1 << 12)
+#define WM97XX_GPIO_13          (1 << 13)
+#define WM97XX_GPIO_14          (1 << 14)
+#define WM97XX_GPIO_15          (1 << 15)
+
+
+#define AC97_LINK_FRAME         21      /* time in uS for AC97 link frame */
+
+
+/*---------------- Return codes from sample reading functions ---------------*/
+
+/* More data is available; call the sample gathering function again */
+#define RC_AGAIN                        0x00000001
+/* The returned sample is valid */
+#define RC_VALID                        0x00000002
+/* The pen is up (the first RC_VALID without RC_PENUP means pen is down) */
+#define RC_PENUP                        0x00000004
+/* The pen is down (RC_VALID implies RC_PENDOWN, but sometimes it is helpful
+   to tell the handler that the pen is down but we don't know yet his coords,
+   so the handler should not sleep or wait for pendown irq) */
+#define RC_PENDOWN                      0x00000008
+
+/*
+ * The wm97xx driver provides a private API for writing platform-specific
+ * drivers.
+ */
+
+/* The structure used to return arch specific sampled data into */
+struct wm97xx_data {
+    int x;
+    int y;
+    int p;
+};
+
+/*
+ * Codec GPIO status
+ */
+enum wm97xx_gpio_status {
+    WM97XX_GPIO_HIGH,
+    WM97XX_GPIO_LOW
+};
+
+/*
+ * Codec GPIO direction
+ */
+enum wm97xx_gpio_dir {
+    WM97XX_GPIO_IN,
+    WM97XX_GPIO_OUT
+};
+
+/*
+ * Codec GPIO polarity
+ */
+enum wm97xx_gpio_pol {
+    WM97XX_GPIO_POL_HIGH,
+    WM97XX_GPIO_POL_LOW
+};
+
+/*
+ * Codec GPIO sticky
+ */
+enum wm97xx_gpio_sticky {
+    WM97XX_GPIO_STICKY,
+    WM97XX_GPIO_NOTSTICKY
+};
+
+/*
+ * Codec GPIO wake
+ */
+enum wm97xx_gpio_wake {
+    WM97XX_GPIO_WAKE,
+    WM97XX_GPIO_NOWAKE
+};
+
+/*
+ * Digitiser ioctl commands
+ */
+#define WM97XX_DIG_START        0x1
+#define WM97XX_DIG_STOP         0x2
+#define WM97XX_PHY_INIT         0x3
+#define WM97XX_AUX_PREPARE      0x4
+#define WM97XX_DIG_RESTORE      0x5
+
+struct wm97xx;
+
+extern struct wm97xx_codec_drv wm9705_codec;
+extern struct wm97xx_codec_drv wm9712_codec;
+extern struct wm97xx_codec_drv wm9713_codec;
+
+/*
+ * Codec driver interface - allows mapping to WM9705/12/13 and newer codecs
+ */
+struct wm97xx_codec_drv {
+        u16 id;
+        char *name;
+
+        /* read 1 sample */
+        int (*poll_sample) (struct wm97xx *, int adcsel, int *sample);
+
+        /* read X,Y,[P] in poll */
+        int (*poll_touch) (struct wm97xx *, struct wm97xx_data *);
+
+        int (*acc_enable) (struct wm97xx *, int enable);
+        void (*phy_init) (struct wm97xx *);
+        void (*dig_enable) (struct wm97xx *, int enable);
+        void (*dig_restore) (struct wm97xx *);
+        void (*aux_prepare) (struct wm97xx *);
+};
+
+
+/* Machine specific and accelerated touch operations */
+struct wm97xx_mach_ops {
+
+        /* accelerated touch readback - coords are transmited on AC97 link */
+        int acc_enabled;
+        void (*acc_pen_up) (struct wm97xx *);
+        int (*acc_pen_down) (struct wm97xx *);
+        int (*acc_startup) (struct wm97xx *);
+        void (*acc_shutdown) (struct wm97xx *);
+
+        /* interrupt mask control - required for accelerated operation */
+        void (*irq_enable) (struct wm97xx *, int enable);
+
+        /* GPIO pin used for accelerated operation */
+        int irq_gpio;
+
+        /* pre and post sample - can be used to minimise any analog noise */
+        void (*pre_sample) (int);  /* function to run before sampling */
+        void (*post_sample) (int);  /* function to run after sampling */
+};
+
+struct wm97xx {
+        u16 dig[3], id, gpio[6], misc;  /* Cached codec registers */
+        u16 dig_save[3];                /* saved during aux reading */
+        struct wm97xx_codec_drv *codec; /* attached codec driver*/
+        struct input_dev *input_dev;    /* touchscreen input device */
+        struct snd_ac97 *ac97;          /* ALSA codec access */
+        struct device *dev;             /* ALSA device */
+        struct platform_device *battery_dev;
+        struct platform_device *touch_dev;
+        struct wm97xx_mach_ops *mach_ops;
+        struct mutex codec_mutex;
+        struct delayed_work ts_reader;  /* Used to poll touchscreen */
+        unsigned long ts_reader_interval; /* Current interval for timer */
+        unsigned long ts_reader_min_interval; /* Minimum interval */
+        unsigned int pen_irq;           /* Pen IRQ number in use */
+        struct workqueue_struct *ts_workq;
+        struct work_struct pen_event_work;
+        u16 acc_slot;                   /* AC97 slot used for acc touch data */
+        u16 acc_rate;                   /* acc touch data rate */
+        unsigned pen_is_down:1;         /* Pen is down */
+        unsigned aux_waiting:1;         /* aux measurement waiting */
+        unsigned pen_probably_down:1;   /* used in polling mode */
+        u16 suspend_mode;               /* PRP in suspend mode */
+};
+
+/*
+ * Codec GPIO access (not supported on WM9705)
+ * This can be used to set/get codec GPIO and Virtual GPIO status.
+ */
+enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio);
+void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
+                          enum wm97xx_gpio_status status);
+void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio,
+                                     enum wm97xx_gpio_dir dir,
+                                     enum wm97xx_gpio_pol pol,
+                                     enum wm97xx_gpio_sticky sticky,
+                                     enum wm97xx_gpio_wake wake);
+
+void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode);
+
+/* codec AC97 IO access */
+int wm97xx_reg_read(struct wm97xx *wm, u16 reg);
+void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val);
+
+/* aux adc readback */
+int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel);
+
+/* machine ops */
+int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *);
+void wm97xx_unregister_mach_ops(struct wm97xx *);
+
+#endif
diff --git a/include/linux/xfrm.h b/include/linux/xfrm.h
index 0c82c80b277f..2ca6bae88721 100644
--- a/include/linux/xfrm.h
+++ b/include/linux/xfrm.h
@@ -97,10 +97,10 @@ struct xfrm_algo {
 };
 
 struct xfrm_algo_aead {
-        char    alg_name[64];
-        int     alg_key_len;    /* in bits */
-        int     alg_icv_len;    /* in bits */
-        char    alg_key[0];
+        char            alg_name[64];
+        unsigned int    alg_key_len;    /* in bits */
+        unsigned int    alg_icv_len;    /* in bits */
+        char            alg_key[0];
 };
 
 struct xfrm_stats {
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index a4274203f252..bfee8be5d63f 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -107,6 +107,7 @@ extern IR_KEYTAB_TYPE ir_codes_avermedia[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_avermedia_dvbt[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_apac_viewcomp[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_pixelview[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_pixelview_new[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_nebula[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_dntv_live_dvb_t[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_iodata_bctv7e[IR_KEYTAB_SIZE];
@@ -141,8 +142,10 @@ extern IR_KEYTAB_TYPE ir_codes_encore_enltv[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_tt_1500[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_fusionhdtv_mce[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_behold[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_behold_columbus[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_pinnacle_pctv_hd[IR_KEYTAB_SIZE];
 extern IR_KEYTAB_TYPE ir_codes_genius_tvgo_a11mce[IR_KEYTAB_SIZE];
+extern IR_KEYTAB_TYPE ir_codes_powercolor_real_angel[IR_KEYTAB_SIZE];
 
 #endif
 
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
new file mode 100644
index 000000000000..6a8c8be7a1ae
--- /dev/null
+++ b/include/media/soc_camera.h
@@ -0,0 +1,179 @@
+/*
+ * camera image capture (abstract) bus driver header
+ *
+ * Copyright (C) 2006, Sascha Hauer, Pengutronix
+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef SOC_CAMERA_H
+#define SOC_CAMERA_H
+
+#include <linux/videodev2.h>
+#include <media/videobuf-dma-sg.h>
+
+struct soc_camera_device {
+        struct list_head list;
+        struct device dev;
+        struct device *control;
+        unsigned short width;           /* Current window */
+        unsigned short height;          /* sizes */
+        unsigned short x_min;           /* Camera capabilities */
+        unsigned short y_min;
+        unsigned short x_current;       /* Current window location */
+        unsigned short y_current;
+        unsigned short width_min;
+        unsigned short width_max;
+        unsigned short height_min;
+        unsigned short height_max;
+        unsigned short y_skip_top;      /* Lines to skip at the top */
+        unsigned short gain;
+        unsigned short exposure;
+        unsigned char iface;            /* Host number */
+        unsigned char devnum;           /* Device number per host */
+        unsigned char buswidth;         /* See comment in .c */
+        struct soc_camera_ops *ops;
+        struct video_device *vdev;
+        const struct soc_camera_data_format *current_fmt;
+        const struct soc_camera_data_format *formats;
+        int num_formats;
+        struct module *owner;
+        /* soc_camera.c private count. Only accessed with video_lock held */
+        int use_count;
+};
+
+struct soc_camera_file {
+        struct soc_camera_device *icd;
+        struct videobuf_queue vb_vidq;
+        spinlock_t *lock;
+};
+
+struct soc_camera_host {
+        struct list_head list;
+        struct device dev;
+        unsigned char nr;                               /* Host number */
+        size_t msize;
+        struct videobuf_queue_ops *vbq_ops;
+        void *priv;
+        char *drv_name;
+        struct soc_camera_host_ops *ops;
+};
+
+struct soc_camera_host_ops {
+        struct module *owner;
+        int (*add)(struct soc_camera_device *);
+        void (*remove)(struct soc_camera_device *);
+        int (*set_fmt_cap)(struct soc_camera_device *, __u32,
+                           struct v4l2_rect *);
+        int (*try_fmt_cap)(struct soc_camera_device *, struct v4l2_format *);
+        int (*reqbufs)(struct soc_camera_file *, struct v4l2_requestbuffers *);
+        int (*querycap)(struct soc_camera_host *, struct v4l2_capability *);
+        int (*try_bus_param)(struct soc_camera_device *, __u32);
+        int (*set_bus_param)(struct soc_camera_device *, __u32);
+        unsigned int (*poll)(struct file *, poll_table *);
+        spinlock_t* (*spinlock_alloc)(struct soc_camera_file *);
+        void (*spinlock_free)(spinlock_t *);
+};
+
+struct soc_camera_link {
+        /* Camera bus id, used to match a camera and a bus */
+        int bus_id;
+        /* GPIO number to switch between 8 and 10 bit modes */
+        unsigned int gpio;
+};
+
+static inline struct soc_camera_device *to_soc_camera_dev(struct device *dev)
+{
+        return container_of(dev, struct soc_camera_device, dev);
+}
+
+static inline struct soc_camera_host *to_soc_camera_host(struct device *dev)
+{
+        return container_of(dev, struct soc_camera_host, dev);
+}
+
+extern int soc_camera_host_register(struct soc_camera_host *ici);
+extern void soc_camera_host_unregister(struct soc_camera_host *ici);
+extern int soc_camera_device_register(struct soc_camera_device *icd);
+extern void soc_camera_device_unregister(struct soc_camera_device *icd);
+
+extern int soc_camera_video_start(struct soc_camera_device *icd);
+extern void soc_camera_video_stop(struct soc_camera_device *icd);
+
+struct soc_camera_data_format {
+        char *name;
+        unsigned int depth;
+        __u32 fourcc;
+        enum v4l2_colorspace colorspace;
+};
+
+struct soc_camera_ops {
+        struct module *owner;
+        int (*probe)(struct soc_camera_device *);
+        void (*remove)(struct soc_camera_device *);
+        int (*init)(struct soc_camera_device *);
+        int (*release)(struct soc_camera_device *);
+        int (*start_capture)(struct soc_camera_device *);
+        int (*stop_capture)(struct soc_camera_device *);
+        int (*set_fmt_cap)(struct soc_camera_device *, __u32,
+                           struct v4l2_rect *);
+        int (*try_fmt_cap)(struct soc_camera_device *, struct v4l2_format *);
+        unsigned long (*query_bus_param)(struct soc_camera_device *);
+        int (*set_bus_param)(struct soc_camera_device *, unsigned long);
+        int (*get_chip_id)(struct soc_camera_device *,
+                           struct v4l2_chip_ident *);
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+        int (*get_register)(struct soc_camera_device *, struct v4l2_register *);
+        int (*set_register)(struct soc_camera_device *, struct v4l2_register *);
+#endif
+        int (*get_control)(struct soc_camera_device *, struct v4l2_control *);
+        int (*set_control)(struct soc_camera_device *, struct v4l2_control *);
+        const struct v4l2_queryctrl *controls;
+        int num_controls;
+};
+
+static inline struct v4l2_queryctrl const *soc_camera_find_qctrl(
+        struct soc_camera_ops *ops, int id)
+{
+        int i;
+
+        for (i = 0; i < ops->num_controls; i++)
+                if (ops->controls[i].id == id)
+                        return &ops->controls[i];
+
+        return NULL;
+}
+
+#define SOCAM_MASTER                    (1 << 0)
+#define SOCAM_SLAVE                     (1 << 1)
+#define SOCAM_HSYNC_ACTIVE_HIGH         (1 << 2)
+#define SOCAM_HSYNC_ACTIVE_LOW          (1 << 3)
+#define SOCAM_VSYNC_ACTIVE_HIGH         (1 << 4)
+#define SOCAM_VSYNC_ACTIVE_LOW          (1 << 5)
+#define SOCAM_DATAWIDTH_8               (1 << 6)
+#define SOCAM_DATAWIDTH_9               (1 << 7)
+#define SOCAM_DATAWIDTH_10              (1 << 8)
+#define SOCAM_PCLK_SAMPLE_RISING        (1 << 9)
+#define SOCAM_PCLK_SAMPLE_FALLING       (1 << 10)
+
+#define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_9 | \
+                              SOCAM_DATAWIDTH_10)
+
+static inline unsigned long soc_camera_bus_param_compatible(
+                        unsigned long camera_flags, unsigned long bus_flags)
+{
+        unsigned long common_flags, hsync, vsync, pclk;
+
+        common_flags = camera_flags & bus_flags;
+
+        hsync = common_flags & (SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW);
+        vsync = common_flags & (SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW);
+        pclk = common_flags & (SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING);
+
+        return (!hsync || !vsync || !pclk) ? 0 : common_flags;
+}
+
+#endif
diff --git a/include/media/tuner-types.h b/include/media/tuner-types.h
index b201371416a0..ab03c5344209 100644
--- a/include/media/tuner-types.h
+++ b/include/media/tuner-types.h
@@ -6,10 +6,11 @@
 #define __TUNER_TYPES_H__
 
 enum param_type {
-        TUNER_PARAM_TYPE_RADIO, \
-        TUNER_PARAM_TYPE_PAL, \
-        TUNER_PARAM_TYPE_SECAM, \
-        TUNER_PARAM_TYPE_NTSC
+        TUNER_PARAM_TYPE_RADIO,
+        TUNER_PARAM_TYPE_PAL,
+        TUNER_PARAM_TYPE_SECAM,
+        TUNER_PARAM_TYPE_NTSC,
+        TUNER_PARAM_TYPE_DIGITAL,
 };
 
 struct tuner_range {
@@ -105,6 +106,7 @@ struct tuner_params {
            the SECAM-L/L' standards. Range: -16:+15 */
         signed int default_top_secam_high:5;
 
+        u16 iffreq;
 
         unsigned int count;
         struct tuner_range *ranges;
@@ -114,6 +116,13 @@ struct tunertype {
         char *name;
         unsigned int count;
         struct tuner_params *params;
+
+        u16 min;
+        u16 max;
+        u32 stepsize;
+
+        u8 *initdata;
+        u8 *sleepdata;
 };
 
 extern struct tunertype tuners[];
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 1bf24a6ed8f1..77068fcc86bd 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -78,7 +78,7 @@
 
 #define TUNER_HITACHI_NTSC              40
 #define TUNER_PHILIPS_PAL_MK            41
-#define TUNER_PHILIPS_ATSC              42
+#define TUNER_PHILIPS_FCV1236D          42
 #define TUNER_PHILIPS_FM1236_MK3        43
 
 #define TUNER_PHILIPS_4IN1              44      /* ATI TV Wonder Pro - Conexant */
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 032bb75f69c2..0ea0bd85c036 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -153,6 +153,12 @@ enum {
         V4L2_IDENT_MSP4428G = 44287,
         V4L2_IDENT_MSP4448G = 44487,
         V4L2_IDENT_MSP4458G = 44587,
+
+        /* Micron CMOS sensor chips: 45000-45099 */
+        V4L2_IDENT_MT9M001C12ST         = 45000,
+        V4L2_IDENT_MT9M001C12STM        = 45005,
+        V4L2_IDENT_MT9V022IX7ATC        = 45010, /* No way to detect "normal" I77ATx */
+        V4L2_IDENT_MT9V022IX7ATM        = 45015, /* and "lead free" IA7ATx chips */
 };
 
 #endif
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index f2114459995d..a807d2f86ee8 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -318,6 +318,10 @@ struct video_device
         int (*vidioc_g_chip_ident)     (struct file *file, void *fh,
                                         struct v4l2_chip_ident *chip);
 
+        /* For other private ioctls */
+        int (*vidioc_default)          (struct file *file, void *fh,
+                                        int cmd, void *arg);
+
 
 #ifdef OBSOLETE_OWNER /* to be removed soon */
 /* obsolete -- fops->owner is used instead */
diff --git a/include/media/videobuf-core.h b/include/media/videobuf-core.h
index 99033945cdee..5b39a22533fe 100644
--- a/include/media/videobuf-core.h
+++ b/include/media/videobuf-core.h
@@ -13,6 +13,9 @@
  * the Free Software Foundation; either version 2
  */
 
+#ifndef _VIDEOBUF_CORE_H
+#define _VIDEOBUF_CORE_H
+
 #include <linux/poll.h>
 #ifdef CONFIG_VIDEO_V4L1_COMPAT
 #include <linux/videodev.h>
@@ -123,7 +126,8 @@ struct videobuf_queue_ops {
 struct videobuf_qtype_ops {
         u32                     magic;
 
-        void* (*alloc)          (size_t size);
+        void *(*alloc)          (size_t size);
+        void *(*vmalloc)        (struct videobuf_buffer *buf);
         int (*iolock)           (struct videobuf_queue* q,
                                  struct videobuf_buffer *vb,
                                  struct v4l2_framebuffer *fbuf);
@@ -151,7 +155,9 @@ struct videobuf_qtype_ops {
 struct videobuf_queue {
         struct mutex               vb_lock;
         spinlock_t                 *irqlock;
-        void                       *dev; /* on pci, points to struct pci_dev */
+        struct device              *dev;
+
+        wait_queue_head_t          wait; /* wait if queue is empty */
 
         enum v4l2_buf_type         type;
         unsigned int               inputs; /* for V4L2_BUF_FLAG_INPUT */
@@ -183,9 +189,13 @@ int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
 
 void *videobuf_alloc(struct videobuf_queue* q);
 
+/* Used on videobuf-dvb */
+void *videobuf_queue_to_vmalloc (struct videobuf_queue* q,
+                                 struct videobuf_buffer *buf);
+
 void videobuf_queue_core_init(struct videobuf_queue *q,
                          struct videobuf_queue_ops *ops,
-                         void *dev,
+                         struct device *dev,
                          spinlock_t *irqlock,
                          enum v4l2_buf_type type,
                          enum v4l2_field field,
@@ -231,10 +241,4 @@ int videobuf_mmap_free(struct videobuf_queue *q);
 int videobuf_mmap_mapper(struct videobuf_queue *q,
                          struct vm_area_struct *vma);
 
-/* --------------------------------------------------------------------- */
-
-/*
- * Local variables:
- * c-basic-offset: 8
- * End:
- */
+#endif
diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h
index 38105031db23..be8da269ee33 100644
--- a/include/media/videobuf-dma-sg.h
+++ b/include/media/videobuf-dma-sg.h
@@ -1,5 +1,5 @@
 /*
- * helper functions for PCI DMA video4linux capture buffers
+ * helper functions for SG DMA video4linux capture buffers
  *
  * The functions expect the hardware being able to scatter gatter
  * (i.e. the buffers are not linear in physical memory, but fragmented
@@ -68,9 +68,6 @@ struct videobuf_dmabuf {
         /* for kernel buffers */
         void                *vmalloc;
 
-        /* Stores the userspace pointer to vmalloc area */
-        void                *varea;
-
         /* for overlay buffers (pci-pci dma) */
         dma_addr_t          bus_addr;
 
@@ -81,7 +78,7 @@ struct videobuf_dmabuf {
         int                 direction;
 };
 
-struct videbuf_pci_sg_memory
+struct videobuf_dma_sg_memory
 {
         u32                 magic;
 
@@ -103,11 +100,11 @@ int videobuf_dma_sync(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
 int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
 struct videobuf_dmabuf *videobuf_to_dma (struct videobuf_buffer *buf);
 
-void *videobuf_pci_alloc (size_t size);
+void *videobuf_sg_alloc(size_t size);
 
-void videobuf_queue_pci_init(struct videobuf_queue* q,
+void videobuf_queue_sg_init(struct videobuf_queue* q,
                          struct videobuf_queue_ops *ops,
-                         void *dev,
+                         struct device *dev,
                          spinlock_t *irqlock,
                          enum v4l2_buf_type type,
                          enum v4l2_field field,
@@ -117,6 +114,6 @@ void videobuf_queue_pci_init(struct videobuf_queue* q,
         /*FIXME: these variants are used only on *-alsa code, where videobuf is
          * used without queue
          */
-int videobuf_pci_dma_map(struct pci_dev *pci,struct videobuf_dmabuf *dma);
-int videobuf_pci_dma_unmap(struct pci_dev *pci,struct videobuf_dmabuf *dma);
+int videobuf_sg_dma_map(struct device *dev, struct videobuf_dmabuf *dma);
+int videobuf_sg_dma_unmap(struct device *dev, struct videobuf_dmabuf *dma);
 
diff --git a/include/media/videobuf-dvb.h b/include/media/videobuf-dvb.h
index 8233cafdeef6..b77748696329 100644
--- a/include/media/videobuf-dvb.h
+++ b/include/media/videobuf-dvb.h
@@ -27,7 +27,8 @@ struct videobuf_dvb {
 int videobuf_dvb_register(struct videobuf_dvb *dvb,
                           struct module *module,
                           void *adapter_priv,
-                          struct device *device);
+                          struct device *device,
+                          short *adapter_nr);
 void videobuf_dvb_unregister(struct videobuf_dvb *dvb);
 
 /*
diff --git a/include/media/videobuf-vmalloc.h b/include/media/videobuf-vmalloc.h
index ec63ab0fab93..aed39460c154 100644
--- a/include/media/videobuf-vmalloc.h
+++ b/include/media/videobuf-vmalloc.h
@@ -12,6 +12,8 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2
  */
+#ifndef _VIDEOBUF_VMALLOC_H
+#define _VIDEOBUF_VMALLOC_H
 
 #include <media/videobuf-core.h>
 
@@ -39,3 +41,5 @@ void videobuf_queue_vmalloc_init(struct videobuf_queue* q,
 void *videobuf_to_vmalloc (struct videobuf_buffer *buf);
 
 void videobuf_vmalloc_free (struct videobuf_buffer *buf);
+
+#endif
diff --git a/include/mtd/Kbuild b/include/mtd/Kbuild
index 4d46b3bdebd8..8eb018f96002 100644
--- a/include/mtd/Kbuild
+++ b/include/mtd/Kbuild
@@ -3,5 +3,4 @@ header-y += jffs2-user.h
 header-y += mtd-abi.h
 header-y += mtd-user.h
 header-y += nftl-user.h
-header-y += ubi-header.h
 header-y += ubi-user.h
diff --git a/include/mtd/ubi-header.h b/include/mtd/ubi-header.h
deleted file mode 100644
index 292f916ea564..000000000000
--- a/include/mtd/ubi-header.h
+++ /dev/null
@@ -1,372 +0,0 @@
-/*
- * Copyright (c) International Business Machines Corp., 2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
- * the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * Authors: Artem Bityutskiy (Битюцкий Артём)
- *          Thomas Gleixner
- *          Frank Haverkamp
- *          Oliver Lohmann
- *          Andreas Arnez
- */
-
-/*
- * This file defines the layout of UBI headers and all the other UBI on-flash
- * data structures. May be included by user-space.
- */
-
-#ifndef __UBI_HEADER_H__
-#define __UBI_HEADER_H__
-
-#include <asm/byteorder.h>
-
-/* The version of UBI images supported by this implementation */
-#define UBI_VERSION 1
-
-/* The highest erase counter value supported by this implementation */
-#define UBI_MAX_ERASECOUNTER 0x7FFFFFFF
-
-/* The initial CRC32 value used when calculating CRC checksums */
-#define UBI_CRC32_INIT 0xFFFFFFFFU
-
-/* Erase counter header magic number (ASCII "UBI#") */
-#define UBI_EC_HDR_MAGIC  0x55424923
-/* Volume identifier header magic number (ASCII "UBI!") */
-#define UBI_VID_HDR_MAGIC 0x55424921
-
-/*
- * Volume type constants used in the volume identifier header.
- *
- * @UBI_VID_DYNAMIC: dynamic volume
- * @UBI_VID_STATIC: static volume
- */
-enum {
-        UBI_VID_DYNAMIC = 1,
-        UBI_VID_STATIC  = 2
-};
-
-/*
- * Volume flags used in the volume table record.
- *
- * @UBI_VTBL_AUTORESIZE_FLG: auto-resize this volume
- *
- * %UBI_VTBL_AUTORESIZE_FLG flag can be set only for one volume in the volume
- * table. UBI automatically re-sizes the volume which has this flag and makes
- * the volume to be of largest possible size. This means that if after the
- * initialization UBI finds out that there are available physical eraseblocks
- * present on the device, it automatically appends all of them to the volume
- * (the physical eraseblocks reserved for bad eraseblocks handling and other
- * reserved physical eraseblocks are not taken). So, if there is a volume with
- * the %UBI_VTBL_AUTORESIZE_FLG flag set, the amount of available logical
- * eraseblocks will be zero after UBI is loaded, because all of them will be
- * reserved for this volume. Note, the %UBI_VTBL_AUTORESIZE_FLG bit is cleared
- * after the volume had been initialized.
- *
- * The auto-resize feature is useful for device production purposes. For
- * example, different NAND flash chips may have different amount of initial bad
- * eraseblocks, depending of particular chip instance. Manufacturers of NAND
- * chips usually guarantee that the amount of initial bad eraseblocks does not
- * exceed certain percent, e.g. 2%. When one creates an UBI image which will be
- * flashed to the end devices in production, he does not know the exact amount
- * of good physical eraseblocks the NAND chip on the device will have, but this
- * number is required to calculate the volume sized and put them to the volume
- * table of the UBI image. In this case, one of the volumes (e.g., the one
- * which will store the root file system) is marked as "auto-resizable", and
- * UBI will adjust its size on the first boot if needed.
- *
- * Note, first UBI reserves some amount of physical eraseblocks for bad
- * eraseblock handling, and then re-sizes the volume, not vice-versa. This
- * means that the pool of reserved physical eraseblocks will always be present.
- */
-enum {
-        UBI_VTBL_AUTORESIZE_FLG = 0x01,
-};
-
-/*
- * Compatibility constants used by internal volumes.
- *
- * @UBI_COMPAT_DELETE: delete this internal volume before anything is written
- * to the flash
- * @UBI_COMPAT_RO: attach this device in read-only mode
- * @UBI_COMPAT_PRESERVE: preserve this internal volume - do not touch its
- * physical eraseblocks, don't allow the wear-leveling unit to move them
- * @UBI_COMPAT_REJECT: reject this UBI image
- */
-enum {
-        UBI_COMPAT_DELETE   = 1,
-        UBI_COMPAT_RO       = 2,
-        UBI_COMPAT_PRESERVE = 4,
-        UBI_COMPAT_REJECT   = 5
-};
-
-/* Sizes of UBI headers */
-#define UBI_EC_HDR_SIZE  sizeof(struct ubi_ec_hdr)
-#define UBI_VID_HDR_SIZE sizeof(struct ubi_vid_hdr)
-
-/* Sizes of UBI headers without the ending CRC */
-#define UBI_EC_HDR_SIZE_CRC  (UBI_EC_HDR_SIZE  - sizeof(__be32))
-#define UBI_VID_HDR_SIZE_CRC (UBI_VID_HDR_SIZE - sizeof(__be32))
-
-/**
- * struct ubi_ec_hdr - UBI erase counter header.
- * @magic: erase counter header magic number (%UBI_EC_HDR_MAGIC)
- * @version: version of UBI implementation which is supposed to accept this
- * UBI image
- * @padding1: reserved for future, zeroes
- * @ec: the erase counter
- * @vid_hdr_offset: where the VID header starts
- * @data_offset: where the user data start
- * @padding2: reserved for future, zeroes
- * @hdr_crc: erase counter header CRC checksum
- *
- * The erase counter header takes 64 bytes and has a plenty of unused space for
- * future usage. The unused fields are zeroed. The @version field is used to
- * indicate the version of UBI implementation which is supposed to be able to
- * work with this UBI image. If @version is greater then the current UBI
- * version, the image is rejected. This may be useful in future if something
- * is changed radically. This field is duplicated in the volume identifier
- * header.
- *
- * The @vid_hdr_offset and @data_offset fields contain the offset of the the
- * volume identifier header and user data, relative to the beginning of the
- * physical eraseblock. These values have to be the same for all physical
- * eraseblocks.
- */
-struct ubi_ec_hdr {
-        __be32  magic;
-        __u8    version;
-        __u8    padding1[3];
-        __be64  ec; /* Warning: the current limit is 31-bit anyway! */
-        __be32  vid_hdr_offset;
-        __be32  data_offset;
-        __u8    padding2[36];
-        __be32  hdr_crc;
-} __attribute__ ((packed));
-
-/**
- * struct ubi_vid_hdr - on-flash UBI volume identifier header.
- * @magic: volume identifier header magic number (%UBI_VID_HDR_MAGIC)
- * @version: UBI implementation version which is supposed to accept this UBI
- * image (%UBI_VERSION)
- * @vol_type: volume type (%UBI_VID_DYNAMIC or %UBI_VID_STATIC)
- * @copy_flag: if this logical eraseblock was copied from another physical
- * eraseblock (for wear-leveling reasons)
- * @compat: compatibility of this volume (%0, %UBI_COMPAT_DELETE,
- * %UBI_COMPAT_IGNORE, %UBI_COMPAT_PRESERVE, or %UBI_COMPAT_REJECT)
- * @vol_id: ID of this volume
- * @lnum: logical eraseblock number
- * @leb_ver: version of this logical eraseblock (IMPORTANT: obsolete, to be
- * removed, kept only for not breaking older UBI users)
- * @data_size: how many bytes of data this logical eraseblock contains
- * @used_ebs: total number of used logical eraseblocks in this volume
- * @data_pad: how many bytes at the end of this physical eraseblock are not
- * used
- * @data_crc: CRC checksum of the data stored in this logical eraseblock
- * @padding1: reserved for future, zeroes
- * @sqnum: sequence number
- * @padding2: reserved for future, zeroes
- * @hdr_crc: volume identifier header CRC checksum
- *
- * The @sqnum is the value of the global sequence counter at the time when this
- * VID header was created. The global sequence counter is incremented each time
- * UBI writes a new VID header to the flash, i.e. when it maps a logical
- * eraseblock to a new physical eraseblock. The global sequence counter is an
- * unsigned 64-bit integer and we assume it never overflows. The @sqnum
- * (sequence number) is used to distinguish between older and newer versions of
- * logical eraseblocks.
- *
- * There are 2 situations when there may be more then one physical eraseblock
- * corresponding to the same logical eraseblock, i.e., having the same @vol_id
- * and @lnum values in the volume identifier header. Suppose we have a logical
- * eraseblock L and it is mapped to the physical eraseblock P.
- *
- * 1. Because UBI may erase physical eraseblocks asynchronously, the following
- * situation is possible: L is asynchronously erased, so P is scheduled for
- * erasure, then L is written to,i.e. mapped to another physical eraseblock P1,
- * so P1 is written to, then an unclean reboot happens. Result - there are 2
- * physical eraseblocks P and P1 corresponding to the same logical eraseblock
- * L. But P1 has greater sequence number, so UBI picks P1 when it attaches the
- * flash.
- *
- * 2. From time to time UBI moves logical eraseblocks to other physical
- * eraseblocks for wear-leveling reasons. If, for example, UBI moves L from P
- * to P1, and an unclean reboot happens before P is physically erased, there
- * are two physical eraseblocks P and P1 corresponding to L and UBI has to
- * select one of them when the flash is attached. The @sqnum field says which
- * PEB is the original (obviously P will have lower @sqnum) and the copy. But
- * it is not enough to select the physical eraseblock with the higher sequence
- * number, because the unclean reboot could have happen in the middle of the
- * copying process, so the data in P is corrupted. It is also not enough to
- * just select the physical eraseblock with lower sequence number, because the
- * data there may be old (consider a case if more data was added to P1 after
- * the copying). Moreover, the unclean reboot may happen when the erasure of P
- * was just started, so it result in unstable P, which is "mostly" OK, but
- * still has unstable bits.
- *
- * UBI uses the @copy_flag field to indicate that this logical eraseblock is a
- * copy. UBI also calculates data CRC when the data is moved and stores it at
- * the @data_crc field of the copy (P1). So when UBI needs to pick one physical
- * eraseblock of two (P or P1), the @copy_flag of the newer one (P1) is
- * examined. If it is cleared, the situation* is simple and the newer one is
- * picked. If it is set, the data CRC of the copy (P1) is examined. If the CRC
- * checksum is correct, this physical eraseblock is selected (P1). Otherwise
- * the older one (P) is selected.
- *
- * Note, there is an obsolete @leb_ver field which was used instead of @sqnum
- * in the past. But it is not used anymore and we keep it in order to be able
- * to deal with old UBI images. It will be removed at some point.
- *
- * There are 2 sorts of volumes in UBI: user volumes and internal volumes.
- * Internal volumes are not seen from outside and are used for various internal
- * UBI purposes. In this implementation there is only one internal volume - the
- * layout volume. Internal volumes are the main mechanism of UBI extensions.
- * For example, in future one may introduce a journal internal volume. Internal
- * volumes have their own reserved range of IDs.
- *
- * The @compat field is only used for internal volumes and contains the "degree
- * of their compatibility". It is always zero for user volumes. This field
- * provides a mechanism to introduce UBI extensions and to be still compatible
- * with older UBI binaries. For example, if someone introduced a journal in
- * future, he would probably use %UBI_COMPAT_DELETE compatibility for the
- * journal volume.  And in this case, older UBI binaries, which know nothing
- * about the journal volume, would just delete this volume and work perfectly
- * fine. This is similar to what Ext2fs does when it is fed by an Ext3fs image
- * - it just ignores the Ext3fs journal.
- *
- * The @data_crc field contains the CRC checksum of the contents of the logical
- * eraseblock if this is a static volume. In case of dynamic volumes, it does
- * not contain the CRC checksum as a rule. The only exception is when the
- * data of the physical eraseblock was moved by the wear-leveling unit, then
- * the wear-leveling unit calculates the data CRC and stores it in the
- * @data_crc field. And of course, the @copy_flag is %in this case.
- *
- * The @data_size field is used only for static volumes because UBI has to know
- * how many bytes of data are stored in this eraseblock. For dynamic volumes,
- * this field usually contains zero. The only exception is when the data of the
- * physical eraseblock was moved to another physical eraseblock for
- * wear-leveling reasons. In this case, UBI calculates CRC checksum of the
- * contents and uses both @data_crc and @data_size fields. In this case, the
- * @data_size field contains data size.
- *
- * The @used_ebs field is used only for static volumes and indicates how many
- * eraseblocks the data of the volume takes. For dynamic volumes this field is
- * not used and always contains zero.
- *
- * The @data_pad is calculated when volumes are created using the alignment
- * parameter. So, effectively, the @data_pad field reduces the size of logical
- * eraseblocks of this volume. This is very handy when one uses block-oriented
- * software (say, cramfs) on top of the UBI volume.
- */
-struct ubi_vid_hdr {
-        __be32  magic;
-        __u8    version;
-        __u8    vol_type;
-        __u8    copy_flag;
-        __u8    compat;
-        __be32  vol_id;
-        __be32  lnum;
-        __be32  leb_ver; /* obsolete, to be removed, don't use */
-        __be32  data_size;
-        __be32  used_ebs;
-        __be32  data_pad;
-        __be32  data_crc;
-        __u8    padding1[4];
-        __be64  sqnum;
-        __u8    padding2[12];
-        __be32  hdr_crc;
-} __attribute__ ((packed));
-
-/* Internal UBI volumes count */
-#define UBI_INT_VOL_COUNT 1
-
-/*
- * Starting ID of internal volumes. There is reserved room for 4096 internal
- * volumes.
- */
-#define UBI_INTERNAL_VOL_START (0x7FFFFFFF - 4096)
-
-/* The layout volume contains the volume table */
-
-#define UBI_LAYOUT_VOLUME_ID     UBI_INTERNAL_VOL_START
-#define UBI_LAYOUT_VOLUME_TYPE   UBI_VID_DYNAMIC
-#define UBI_LAYOUT_VOLUME_ALIGN  1
-#define UBI_LAYOUT_VOLUME_EBS    2
-#define UBI_LAYOUT_VOLUME_NAME   "layout volume"
-#define UBI_LAYOUT_VOLUME_COMPAT UBI_COMPAT_REJECT
-
-/* The maximum number of volumes per one UBI device */
-#define UBI_MAX_VOLUMES 128
-
-/* The maximum volume name length */
-#define UBI_VOL_NAME_MAX 127
-
-/* Size of the volume table record */
-#define UBI_VTBL_RECORD_SIZE sizeof(struct ubi_vtbl_record)
-
-/* Size of the volume table record without the ending CRC */
-#define UBI_VTBL_RECORD_SIZE_CRC (UBI_VTBL_RECORD_SIZE - sizeof(__be32))
-
-/**
- * struct ubi_vtbl_record - a record in the volume table.
- * @reserved_pebs: how many physical eraseblocks are reserved for this volume
- * @alignment: volume alignment
- * @data_pad: how many bytes are unused at the end of the each physical
- * eraseblock to satisfy the requested alignment
- * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME)
- * @upd_marker: if volume update was started but not finished
- * @name_len: volume name length
- * @name: the volume name
- * @flags: volume flags (%UBI_VTBL_AUTORESIZE_FLG)
- * @padding: reserved, zeroes
- * @crc: a CRC32 checksum of the record
- *
- * The volume table records are stored in the volume table, which is stored in
- * the layout volume. The layout volume consists of 2 logical eraseblock, each
- * of which contains a copy of the volume table (i.e., the volume table is
- * duplicated). The volume table is an array of &struct ubi_vtbl_record
- * objects indexed by the volume ID.
- *
- * If the size of the logical eraseblock is large enough to fit
- * %UBI_MAX_VOLUMES records, the volume table contains %UBI_MAX_VOLUMES
- * records. Otherwise, it contains as many records as it can fit (i.e., size of
- * logical eraseblock divided by sizeof(struct ubi_vtbl_record)).
- *
- * The @upd_marker flag is used to implement volume update. It is set to %1
- * before update and set to %0 after the update. So if the update operation was
- * interrupted, UBI knows that the volume is corrupted.
- *
- * The @alignment field is specified when the volume is created and cannot be
- * later changed. It may be useful, for example, when a block-oriented file
- * system works on top of UBI. The @data_pad field is calculated using the
- * logical eraseblock size and @alignment. The alignment must be multiple to the
- * minimal flash I/O unit. If @alignment is 1, all the available space of
- * the physical eraseblocks is used.
- *
- * Empty records contain all zeroes and the CRC checksum of those zeroes.
- */
-struct ubi_vtbl_record {
-        __be32  reserved_pebs;
-        __be32  alignment;
-        __be32  data_pad;
-        __u8    vol_type;
-        __u8    upd_marker;
-        __be16  name_len;
-        __u8    name[UBI_VOL_NAME_MAX+1];
-        __u8    flags;
-        __u8    padding[23];
-        __be32  crc;
-} __attribute__ ((packed));
-
-#endif /* !__UBI_HEADER_H__ */
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 49c48983019f..e0a612bc9c4e 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -383,6 +383,15 @@ static inline int ipv6_addr_orchid(const struct in6_addr *a)
                 == htonl(0x20010010));
 }
 
+static inline void ipv6_addr_set_v4mapped(const __be32 addr,
+                                          struct in6_addr *v4mapped)
+{
+        ipv6_addr_set(v4mapped,
+                        0, 0,
+                        htonl(0x0000FFFF),
+                        addr);
+}
+
 /*
  * find the first different bit between two addresses
  * length of address must be a multiple of 32bits
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index b56b6a10fe5e..baa9f372cfd1 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -436,6 +436,9 @@ struct xfrm_tmpl
 /* May skip this transfomration if no SA is found */
         __u8                    optional;
 
+/* Skip aalgos/ealgos/calgos checks. */
+        __u8                    allalgs;
+
 /* Bit mask of algos allowed for acquisition */
         __u32                   aalgos;
         __u32                   ealgos;
diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h
index 01480581f825..049edc5e6461 100644
--- a/include/sound/ac97_codec.h
+++ b/include/sound/ac97_codec.h
@@ -397,6 +397,7 @@
 #define AC97_HAS_NO_TONE        (1<<16) /* no Tone volume */
 #define AC97_HAS_NO_STD_PCM     (1<<17) /* no standard AC97 PCM volume and mute */
 #define AC97_HAS_NO_AUX         (1<<18) /* no standard AC97 AUX volume and mute */
+#define AC97_HAS_8CH            (1<<19) /* supports 8-channel output */
 
 /* rates indexes */
 #define AC97_RATES_FRONT_DAC    0
diff --git a/include/sound/ak4114.h b/include/sound/ak4114.h
index 4e80d3fe7381..d293d36a66b8 100644
--- a/include/sound/ak4114.h
+++ b/include/sound/ak4114.h
@@ -182,6 +182,7 @@ struct ak4114 {
         unsigned char rcs0;
         unsigned char rcs1;
         struct delayed_work work;
+        unsigned int check_flags;
         void *change_callback_private;
         void (*change_callback)(struct ak4114 *ak4114, unsigned char c0, unsigned char c1);
 };
diff --git a/include/sound/ak4xxx-adda.h b/include/sound/ak4xxx-adda.h
index 6153b91cdc3e..891cf1aea8b1 100644
--- a/include/sound/ak4xxx-adda.h
+++ b/include/sound/ak4xxx-adda.h
@@ -68,7 +68,7 @@ struct snd_akm4xxx {
         enum {
                 SND_AK4524, SND_AK4528, SND_AK4529,
                 SND_AK4355, SND_AK4358, SND_AK4381,
-                SND_AK5365, NON_AKM
+                SND_AK5365
         } type;
 
         /* (array) information of combined codecs */
diff --git a/include/sound/asoundef.h b/include/sound/asoundef.h
index 024ce62f7d16..a6e0facf8a37 100644
--- a/include/sound/asoundef.h
+++ b/include/sound/asoundef.h
@@ -112,6 +112,14 @@
 #define IEC958_AES3_CON_CLOCK_1000PPM   (0<<4)  /* 1000 ppm */
 #define IEC958_AES3_CON_CLOCK_50PPM     (1<<4)  /* 50 ppm */
 #define IEC958_AES3_CON_CLOCK_VARIABLE  (2<<4)  /* variable pitch */
+#define IEC958_AES4_CON_MAX_WORDLEN_24  (1<<0)  /* 0 = 20-bit, 1 = 24-bit */
+#define IEC958_AES4_CON_WORDLEN         (7<<1)  /* mask - sample word length */
+#define IEC958_AES4_CON_WORDLEN_NOTID   (0<<1)  /* not indicated */
+#define IEC958_AES4_CON_WORDLEN_20_16   (1<<1)  /* 20-bit or 16-bit */
+#define IEC958_AES4_CON_WORDLEN_22_18   (2<<1)  /* 22-bit or 18-bit */
+#define IEC958_AES4_CON_WORDLEN_23_19   (4<<1)  /* 23-bit or 19-bit */
+#define IEC958_AES4_CON_WORDLEN_24_20   (5<<1)  /* 24-bit or 20-bit */
+#define IEC958_AES4_CON_WORDLEN_21_17   (6<<1)  /* 21-bit or 17-bit */
 
 /*****************************************************************************
  *                                                                           *
diff --git a/include/sound/control.h b/include/sound/control.h
index e79baa63912f..3dc1291f52db 100644
--- a/include/sound/control.h
+++ b/include/sound/control.h
@@ -169,4 +169,11 @@ int snd_ctl_boolean_mono_info(struct snd_kcontrol *kcontrol,
 int snd_ctl_boolean_stereo_info(struct snd_kcontrol *kcontrol,
                                 struct snd_ctl_elem_info *uinfo);
 
+/*
+ * virtual master control
+ */
+struct snd_kcontrol *snd_ctl_make_virtual_master(char *name,
+                                                 const unsigned int *tlv);
+int snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave);
+                      
 #endif  /* __SOUND_CONTROL_H */
diff --git a/include/sound/core.h b/include/sound/core.h
index 4fc0235ad784..695ee53488a3 100644
--- a/include/sound/core.h
+++ b/include/sound/core.h
@@ -277,8 +277,8 @@ int snd_minor_info_done(void);
 int snd_minor_info_oss_init(void);
 int snd_minor_info_oss_done(void);
 #else
-#define snd_minor_info_oss_init() /*NOP*/
-#define snd_minor_info_oss_done() /*NOP*/
+static inline int snd_minor_info_oss_init(void) { return 0; }
+static inline int snd_minor_info_oss_done(void) { return 0; }
 #endif
 
 /* memory.c */
@@ -310,7 +310,7 @@ int snd_card_file_add(struct snd_card *card, struct file *file);
 int snd_card_file_remove(struct snd_card *card, struct file *file);
 
 #ifndef snd_card_set_dev
-#define snd_card_set_dev(card,devptr) ((card)->dev = (devptr))
+#define snd_card_set_dev(card, devptr) ((card)->dev = (devptr))
 #endif
 
 /* device.c */
@@ -373,7 +373,7 @@ void snd_verbose_printd(const char *file, int line, const char *format, ...)
  * snd_printd - debug printk
  * @fmt: format string
  *
- * Compiled only when Works like snd_printk() for debugging purpose.
+ * Works like snd_printk() for debugging purposes.
  * Ignored when CONFIG_SND_DEBUG is not set.
  */
 #define snd_printd(fmt, args...) \
@@ -417,7 +417,7 @@ void snd_verbose_printd(const char *file, int line, const char *format, ...)
  * snd_printdd - debug printk
  * @format: format string
  *
- * Compiled only when Works like snd_printk() for debugging purpose.
+ * Works like snd_printk() for debugging purposes.
  * Ignored when CONFIG_SND_DEBUG_DETECT is not set.
  */
 #define snd_printdd(format, args...) snd_printk(format, ##args)
diff --git a/include/sound/mpu401.h b/include/sound/mpu401.h
index d45218b44dfe..68b634b75068 100644
--- a/include/sound/mpu401.h
+++ b/include/sound/mpu401.h
@@ -103,6 +103,21 @@ struct snd_mpu401 {
 #define MPU401D(mpu) (mpu)->port
 
 /*
+ * control register bits
+ */
+/* read MPU401C() */
+#define MPU401_RX_EMPTY         0x80
+#define MPU401_TX_FULL          0x40
+
+/* write MPU401C() */
+#define MPU401_RESET            0xff
+#define MPU401_ENTER_UART       0x3f
+
+/* read MPU401D() */
+#define MPU401_ACK              0xfe
+
+
+/*
 
  */
 
diff --git a/include/sound/version.h b/include/sound/version.h
index fac66c49445a..ed6fb2eb1eac 100644
--- a/include/sound/version.h
+++ b/include/sound/version.h
@@ -1,3 +1,3 @@
 /* include/version.h.  Generated by alsa/ksync script.  */
-#define CONFIG_SND_VERSION "1.0.16rc2"
-#define CONFIG_SND_DATE " (Thu Jan 31 16:40:16 2008 UTC)"
+#define CONFIG_SND_VERSION "1.0.16"
+#define CONFIG_SND_DATE ""
diff --git a/include/xen/balloon.h b/include/xen/balloon.h
new file mode 100644
index 000000000000..fe43b0f3c86a
--- /dev/null
+++ b/include/xen/balloon.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+ * balloon.h
+ *
+ * Xen balloon driver - enables returning/claiming memory to/from Xen.
+ *
+ * Copyright (c) 2003, B Dragovic
+ * Copyright (c) 2003-2004, M Williamson, K Fraser
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation; or, when distributed
+ * separately from the Linux kernel or incorporated into other
+ * software packages, subject to the following license:
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this source file (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy, modify,
+ * merge, publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef __XEN_BALLOON_H__
+#define __XEN_BALLOON_H__
+
+#include <linux/spinlock.h>
+
+#if 0
+/*
+ * Inform the balloon driver that it should allow some slop for device-driver
+ * memory activities.
+ */
+void balloon_update_driver_allowance(long delta);
+
+/* Allocate/free a set of empty pages in low memory (i.e., no RAM mapped). */
+struct page **alloc_empty_pages_and_pagevec(int nr_pages);
+void free_empty_pages_and_pagevec(struct page **pagevec, int nr_pages);
+
+void balloon_release_driver_page(struct page *page);
+
+/*
+ * Prevent the balloon driver from changing the memory reservation during
+ * a driver critical region.
+ */
+extern spinlock_t balloon_lock;
+#define balloon_lock(__flags)   spin_lock_irqsave(&balloon_lock, __flags)
+#define balloon_unlock(__flags) spin_unlock_irqrestore(&balloon_lock, __flags)
+#endif
+
+#endif /* __XEN_BALLOON_H__ */
diff --git a/include/xen/events.h b/include/xen/events.h
index 2bde54d29be5..acd8e062c85f 100644
--- a/include/xen/events.h
+++ b/include/xen/events.h
@@ -5,13 +5,7 @@
 
 #include <xen/interface/event_channel.h>
 #include <asm/xen/hypercall.h>
-
-enum ipi_vector {
-        XEN_RESCHEDULE_VECTOR,
-        XEN_CALL_FUNCTION_VECTOR,
-
-        XEN_NR_IPIS,
-};
+#include <asm/xen/events.h>
 
 int bind_evtchn_to_irq(unsigned int evtchn);
 int bind_evtchn_to_irqhandler(unsigned int evtchn,
@@ -37,6 +31,7 @@ int bind_ipi_to_irqhandler(enum ipi_vector ipi,
 void unbind_from_irqhandler(unsigned int irq, void *dev_id);
 
 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector);
+int resend_irq_on_evtchn(unsigned int irq);
 
 static inline void notify_remote_via_evtchn(int port)
 {
diff --git a/include/xen/grant_table.h b/include/xen/grant_table.h
index 761c83498e03..466204846121 100644
--- a/include/xen/grant_table.h
+++ b/include/xen/grant_table.h
@@ -39,6 +39,7 @@
 
 #include <asm/xen/hypervisor.h>
 #include <xen/interface/grant_table.h>
+#include <asm/xen/grant_table.h>
 
 /* NR_GRANT_FRAMES must be less than or equal to that configured in Xen */
 #define NR_GRANT_FRAMES 4
@@ -102,6 +103,12 @@ void gnttab_grant_foreign_access_ref(grant_ref_t ref, domid_t domid,
 void gnttab_grant_foreign_transfer_ref(grant_ref_t, domid_t domid,
                                        unsigned long pfn);
 
+int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes,
+                           unsigned long max_nr_gframes,
+                           struct grant_entry **__shared);
+void arch_gnttab_unmap_shared(struct grant_entry *shared,
+                              unsigned long nr_gframes);
+
 #define gnttab_map_vaddr(map) ((void *)(map.host_virt_addr))
 
 #endif /* __ASM_GNTTAB_H__ */
diff --git a/include/xen/interface/callback.h b/include/xen/interface/callback.h
new file mode 100644
index 000000000000..4aadcba31af9
--- /dev/null
+++ b/include/xen/interface/callback.h
@@ -0,0 +1,102 @@
+/******************************************************************************
+ * callback.h
+ *
+ * Register guest OS callbacks with Xen.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Copyright (c) 2006, Ian Campbell
+ */
+
+#ifndef __XEN_PUBLIC_CALLBACK_H__
+#define __XEN_PUBLIC_CALLBACK_H__
+
+#include "xen.h"
+
+/*
+ * Prototype for this hypercall is:
+ *   long callback_op(int cmd, void *extra_args)
+ * @cmd        == CALLBACKOP_??? (callback operation).
+ * @extra_args == Operation-specific extra arguments (NULL if none).
+ */
+
+/* ia64, x86: Callback for event delivery. */
+#define CALLBACKTYPE_event                 0
+
+/* x86: Failsafe callback when guest state cannot be restored by Xen. */
+#define CALLBACKTYPE_failsafe              1
+
+/* x86/64 hypervisor: Syscall by 64-bit guest app ('64-on-64-on-64'). */
+#define CALLBACKTYPE_syscall               2
+
+/*
+ * x86/32 hypervisor: Only available on x86/32 when supervisor_mode_kernel
+ *     feature is enabled. Do not use this callback type in new code.
+ */
+#define CALLBACKTYPE_sysenter_deprecated   3
+
+/* x86: Callback for NMI delivery. */
+#define CALLBACKTYPE_nmi                   4
+
+/*
+ * x86: sysenter is only available as follows:
+ * - 32-bit hypervisor: with the supervisor_mode_kernel feature enabled
+ * - 64-bit hypervisor: 32-bit guest applications on Intel CPUs
+ *                      ('32-on-32-on-64', '32-on-64-on-64')
+ *                      [nb. also 64-bit guest applications on Intel CPUs
+ *                           ('64-on-64-on-64'), but syscall is preferred]
+ */
+#define CALLBACKTYPE_sysenter              5
+
+/*
+ * x86/64 hypervisor: Syscall by 32-bit guest app on AMD CPUs
+ *                    ('32-on-32-on-64', '32-on-64-on-64')
+ */
+#define CALLBACKTYPE_syscall32             7
+
+/*
+ * Disable event deliver during callback? This flag is ignored for event and
+ * NMI callbacks: event delivery is unconditionally disabled.
+ */
+#define _CALLBACKF_mask_events             0
+#define CALLBACKF_mask_events              (1U << _CALLBACKF_mask_events)
+
+/*
+ * Register a callback.
+ */
+#define CALLBACKOP_register                0
+struct callback_register {
+    uint16_t type;
+    uint16_t flags;
+    struct xen_callback address;
+};
+
+/*
+ * Unregister a callback.
+ *
+ * Not all callbacks can be unregistered. -EINVAL will be returned if
+ * you attempt to unregister such a callback.
+ */
+#define CALLBACKOP_unregister              1
+struct callback_unregister {
+    uint16_t type;
+    uint16_t _unused;
+};
+
+#endif /* __XEN_PUBLIC_CALLBACK_H__ */
diff --git a/include/xen/interface/grant_table.h b/include/xen/interface/grant_table.h
index 219049802cf2..39da93c21de0 100644
--- a/include/xen/interface/grant_table.h
+++ b/include/xen/interface/grant_table.h
@@ -185,6 +185,7 @@ struct gnttab_map_grant_ref {
     grant_handle_t handle;
     uint64_t dev_bus_addr;
 };
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_map_grant_ref);
 
 /*
  * GNTTABOP_unmap_grant_ref: Destroy one or more grant-reference mappings
@@ -206,6 +207,7 @@ struct gnttab_unmap_grant_ref {
     /* OUT parameters. */
     int16_t  status;              /* GNTST_* */
 };
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_unmap_grant_ref);
 
 /*
  * GNTTABOP_setup_table: Set up a grant table for <dom> comprising at least
@@ -223,8 +225,9 @@ struct gnttab_setup_table {
     uint32_t nr_frames;
     /* OUT parameters. */
     int16_t  status;              /* GNTST_* */
-    ulong *frame_list;
+    GUEST_HANDLE(ulong) frame_list;
 };
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_setup_table);
 
 /*
  * GNTTABOP_dump_table: Dump the contents of the grant table to the
@@ -237,6 +240,7 @@ struct gnttab_dump_table {
     /* OUT parameters. */
     int16_t status;               /* GNTST_* */
 };
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_dump_table);
 
 /*
  * GNTTABOP_transfer_grant_ref: Transfer <frame> to a foreign domain. The
@@ -255,7 +259,7 @@ struct gnttab_transfer {
     /* OUT parameters. */
     int16_t       status;
 };
-
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_transfer);
 
 /*
  * GNTTABOP_copy: Hypervisor based copy
@@ -296,6 +300,7 @@ struct gnttab_copy {
         /* OUT parameters. */
         int16_t       status;
 };
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_copy);
 
 /*
  * GNTTABOP_query_size: Query the current and maximum sizes of the shared
@@ -313,7 +318,7 @@ struct gnttab_query_size {
     uint32_t max_nr_frames;
     int16_t  status;              /* GNTST_* */
 };
-
+DEFINE_GUEST_HANDLE_STRUCT(gnttab_query_size);
 
 /*
  * Bitfield values for update_pin_status.flags.
diff --git a/include/xen/interface/io/fbif.h b/include/xen/interface/io/fbif.h
new file mode 100644
index 000000000000..5a934dd7796d
--- /dev/null
+++ b/include/xen/interface/io/fbif.h
@@ -0,0 +1,124 @@
+/*
+ * fbif.h -- Xen virtual frame buffer device
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Copyright (C) 2005 Anthony Liguori <aliguori@us.ibm.com>
+ * Copyright (C) 2006 Red Hat, Inc., Markus Armbruster <armbru@redhat.com>
+ */
+
+#ifndef __XEN_PUBLIC_IO_FBIF_H__
+#define __XEN_PUBLIC_IO_FBIF_H__
+
+/* Out events (frontend -> backend) */
+
+/*
+ * Out events may be sent only when requested by backend, and receipt
+ * of an unknown out event is an error.
+ */
+
+/* Event type 1 currently not used */
+/*
+ * Framebuffer update notification event
+ * Capable frontend sets feature-update in xenstore.
+ * Backend requests it by setting request-update in xenstore.
+ */
+#define XENFB_TYPE_UPDATE 2
+
+struct xenfb_update {
+        uint8_t type;           /* XENFB_TYPE_UPDATE */
+        int32_t x;              /* source x */
+        int32_t y;              /* source y */
+        int32_t width;          /* rect width */
+        int32_t height;         /* rect height */
+};
+
+#define XENFB_OUT_EVENT_SIZE 40
+
+union xenfb_out_event {
+        uint8_t type;
+        struct xenfb_update update;
+        char pad[XENFB_OUT_EVENT_SIZE];
+};
+
+/* In events (backend -> frontend) */
+
+/*
+ * Frontends should ignore unknown in events.
+ * No in events currently defined.
+ */
+
+#define XENFB_IN_EVENT_SIZE 40
+
+union xenfb_in_event {
+        uint8_t type;
+        char pad[XENFB_IN_EVENT_SIZE];
+};
+
+/* shared page */
+
+#define XENFB_IN_RING_SIZE 1024
+#define XENFB_IN_RING_LEN (XENFB_IN_RING_SIZE / XENFB_IN_EVENT_SIZE)
+#define XENFB_IN_RING_OFFS 1024
+#define XENFB_IN_RING(page) \
+        ((union xenfb_in_event *)((char *)(page) + XENFB_IN_RING_OFFS))
+#define XENFB_IN_RING_REF(page, idx) \
+        (XENFB_IN_RING((page))[(idx) % XENFB_IN_RING_LEN])
+
+#define XENFB_OUT_RING_SIZE 2048
+#define XENFB_OUT_RING_LEN (XENFB_OUT_RING_SIZE / XENFB_OUT_EVENT_SIZE)
+#define XENFB_OUT_RING_OFFS (XENFB_IN_RING_OFFS + XENFB_IN_RING_SIZE)
+#define XENFB_OUT_RING(page) \
+        ((union xenfb_out_event *)((char *)(page) + XENFB_OUT_RING_OFFS))
+#define XENFB_OUT_RING_REF(page, idx) \
+        (XENFB_OUT_RING((page))[(idx) % XENFB_OUT_RING_LEN])
+
+struct xenfb_page {
+        uint32_t in_cons, in_prod;
+        uint32_t out_cons, out_prod;
+
+        int32_t width;          /* width of the framebuffer (in pixels) */
+        int32_t height;         /* height of the framebuffer (in pixels) */
+        uint32_t line_length;   /* length of a row of pixels (in bytes) */
+        uint32_t mem_length;    /* length of the framebuffer (in bytes) */
+        uint8_t depth;          /* depth of a pixel (in bits) */
+
+        /*
+         * Framebuffer page directory
+         *
+         * Each directory page holds PAGE_SIZE / sizeof(*pd)
+         * framebuffer pages, and can thus map up to PAGE_SIZE *
+         * PAGE_SIZE / sizeof(*pd) bytes.  With PAGE_SIZE == 4096 and
+         * sizeof(unsigned long) == 4, that's 4 Megs.  Two directory
+         * pages should be enough for a while.
+         */
+        unsigned long pd[2];
+};
+
+/*
+ * Wart: xenkbd needs to know resolution.  Put it here until a better
+ * solution is found, but don't leak it to the backend.
+ */
+#ifdef __KERNEL__
+#define XENFB_WIDTH 800
+#define XENFB_HEIGHT 600
+#define XENFB_DEPTH 32
+#endif
+
+#endif
diff --git a/include/xen/interface/io/kbdif.h b/include/xen/interface/io/kbdif.h
new file mode 100644
index 000000000000..fb97f4284ffd
--- /dev/null
+++ b/include/xen/interface/io/kbdif.h
@@ -0,0 +1,114 @@
+/*
+ * kbdif.h -- Xen virtual keyboard/mouse
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Copyright (C) 2005 Anthony Liguori <aliguori@us.ibm.com>
+ * Copyright (C) 2006 Red Hat, Inc., Markus Armbruster <armbru@redhat.com>
+ */
+
+#ifndef __XEN_PUBLIC_IO_KBDIF_H__
+#define __XEN_PUBLIC_IO_KBDIF_H__
+
+/* In events (backend -> frontend) */
+
+/*
+ * Frontends should ignore unknown in events.
+ */
+
+/* Pointer movement event */
+#define XENKBD_TYPE_MOTION  1
+/* Event type 2 currently not used */
+/* Key event (includes pointer buttons) */
+#define XENKBD_TYPE_KEY     3
+/*
+ * Pointer position event
+ * Capable backend sets feature-abs-pointer in xenstore.
+ * Frontend requests ot instead of XENKBD_TYPE_MOTION by setting
+ * request-abs-update in xenstore.
+ */
+#define XENKBD_TYPE_POS     4
+
+struct xenkbd_motion {
+        uint8_t type;           /* XENKBD_TYPE_MOTION */
+        int32_t rel_x;          /* relative X motion */
+        int32_t rel_y;          /* relative Y motion */
+};
+
+struct xenkbd_key {
+        uint8_t type;           /* XENKBD_TYPE_KEY */
+        uint8_t pressed;        /* 1 if pressed; 0 otherwise */
+        uint32_t keycode;       /* KEY_* from linux/input.h */
+};
+
+struct xenkbd_position {
+        uint8_t type;           /* XENKBD_TYPE_POS */
+        int32_t abs_x;          /* absolute X position (in FB pixels) */
+        int32_t abs_y;          /* absolute Y position (in FB pixels) */
+};
+
+#define XENKBD_IN_EVENT_SIZE 40
+
+union xenkbd_in_event {
+        uint8_t type;
+        struct xenkbd_motion motion;
+        struct xenkbd_key key;
+        struct xenkbd_position pos;
+        char pad[XENKBD_IN_EVENT_SIZE];
+};
+
+/* Out events (frontend -> backend) */
+
+/*
+ * Out events may be sent only when requested by backend, and receipt
+ * of an unknown out event is an error.
+ * No out events currently defined.
+ */
+
+#define XENKBD_OUT_EVENT_SIZE 40
+
+union xenkbd_out_event {
+        uint8_t type;
+        char pad[XENKBD_OUT_EVENT_SIZE];
+};
+
+/* shared page */
+
+#define XENKBD_IN_RING_SIZE 2048
+#define XENKBD_IN_RING_LEN (XENKBD_IN_RING_SIZE / XENKBD_IN_EVENT_SIZE)
+#define XENKBD_IN_RING_OFFS 1024
+#define XENKBD_IN_RING(page) \
+        ((union xenkbd_in_event *)((char *)(page) + XENKBD_IN_RING_OFFS))
+#define XENKBD_IN_RING_REF(page, idx) \
+        (XENKBD_IN_RING((page))[(idx) % XENKBD_IN_RING_LEN])
+
+#define XENKBD_OUT_RING_SIZE 1024
+#define XENKBD_OUT_RING_LEN (XENKBD_OUT_RING_SIZE / XENKBD_OUT_EVENT_SIZE)
+#define XENKBD_OUT_RING_OFFS (XENKBD_IN_RING_OFFS + XENKBD_IN_RING_SIZE)
+#define XENKBD_OUT_RING(page) \
+        ((union xenkbd_out_event *)((char *)(page) + XENKBD_OUT_RING_OFFS))
+#define XENKBD_OUT_RING_REF(page, idx) \
+        (XENKBD_OUT_RING((page))[(idx) % XENKBD_OUT_RING_LEN])
+
+struct xenkbd_page {
+        uint32_t in_cons, in_prod;
+        uint32_t out_cons, out_prod;
+};
+
+#endif
diff --git a/include/xen/interface/io/protocols.h b/include/xen/interface/io/protocols.h
new file mode 100644
index 000000000000..01fc8ae5f0b0
--- /dev/null
+++ b/include/xen/interface/io/protocols.h
@@ -0,0 +1,21 @@
+#ifndef __XEN_PROTOCOLS_H__
+#define __XEN_PROTOCOLS_H__
+
+#define XEN_IO_PROTO_ABI_X86_32     "x86_32-abi"
+#define XEN_IO_PROTO_ABI_X86_64     "x86_64-abi"
+#define XEN_IO_PROTO_ABI_IA64       "ia64-abi"
+#define XEN_IO_PROTO_ABI_POWERPC64  "powerpc64-abi"
+
+#if defined(__i386__)
+# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_32
+#elif defined(__x86_64__)
+# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_64
+#elif defined(__ia64__)
+# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_IA64
+#elif defined(__powerpc64__)
+# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_POWERPC64
+#else
+# error arch fixup needed here
+#endif
+
+#endif
diff --git a/include/xen/interface/memory.h b/include/xen/interface/memory.h
index af36ead16817..da768469aa92 100644
--- a/include/xen/interface/memory.h
+++ b/include/xen/interface/memory.h
@@ -29,7 +29,7 @@ struct xen_memory_reservation {
      *   OUT: GMFN bases of extents that were allocated
      *   (NB. This command also updates the mach_to_phys translation table)
      */
-    GUEST_HANDLE(ulong) extent_start;
+    ulong extent_start;
 
     /* Number of extents, and size/alignment of each (2^extent_order pages). */
     unsigned long  nr_extents;
@@ -50,7 +50,6 @@ struct xen_memory_reservation {
     domid_t        domid;
 
 };
-DEFINE_GUEST_HANDLE_STRUCT(xen_memory_reservation);
 
 /*
  * Returns the maximum machine frame number of mapped RAM in this system.
@@ -86,7 +85,7 @@ struct xen_machphys_mfn_list {
      * any large discontiguities in the machine address space, 2MB gaps in
      * the machphys table will be represented by an MFN base of zero.
      */
-    GUEST_HANDLE(ulong) extent_start;
+    ulong extent_start;
 
     /*
      * Number of extents written to the above array. This will be smaller
@@ -94,7 +93,6 @@ struct xen_machphys_mfn_list {
      */
     unsigned int nr_extents;
 };
-DEFINE_GUEST_HANDLE_STRUCT(xen_machphys_mfn_list);
 
 /*
  * Sets the GPFN at which a particular page appears in the specified guest's
@@ -117,7 +115,6 @@ struct xen_add_to_physmap {
     /* GPFN where the source mapping page should appear. */
     unsigned long gpfn;
 };
-DEFINE_GUEST_HANDLE_STRUCT(xen_add_to_physmap);
 
 /*
  * Translates a list of domain-specific GPFNs into MFNs. Returns a -ve error
@@ -132,14 +129,13 @@ struct xen_translate_gpfn_list {
     unsigned long nr_gpfns;
 
     /* List of GPFNs to translate. */
-    GUEST_HANDLE(ulong) gpfn_list;
+    ulong gpfn_list;
 
     /*
      * Output list to contain MFN translations. May be the same as the input
      * list (in which case each input GPFN is overwritten with the output MFN).
      */
-    GUEST_HANDLE(ulong) mfn_list;
+    ulong mfn_list;
 };
-DEFINE_GUEST_HANDLE_STRUCT(xen_translate_gpfn_list);
 
 #endif /* __XEN_PUBLIC_MEMORY_H__ */
diff --git a/include/xen/interface/vcpu.h b/include/xen/interface/vcpu.h
index b05d8a6d9143..87e6f8a48661 100644
--- a/include/xen/interface/vcpu.h
+++ b/include/xen/interface/vcpu.h
@@ -85,6 +85,7 @@ struct vcpu_runstate_info {
                  */
                 uint64_t time[4];
 };
+DEFINE_GUEST_HANDLE_STRUCT(vcpu_runstate_info);
 
 /* VCPU is currently running on a physical CPU. */
 #define RUNSTATE_running  0
@@ -119,6 +120,7 @@ struct vcpu_runstate_info {
 #define VCPUOP_register_runstate_memory_area 5
 struct vcpu_register_runstate_memory_area {
                 union {
+                                GUEST_HANDLE(vcpu_runstate_info) h;
                                 struct vcpu_runstate_info *v;
                                 uint64_t p;
                 } addr;
@@ -134,6 +136,7 @@ struct vcpu_register_runstate_memory_area {
 struct vcpu_set_periodic_timer {
                 uint64_t period_ns;
 };
+DEFINE_GUEST_HANDLE_STRUCT(vcpu_set_periodic_timer);
 
 /*
  * Set or stop a VCPU's single-shot timer. Every VCPU has one single-shot
@@ -145,6 +148,7 @@ struct vcpu_set_singleshot_timer {
                 uint64_t timeout_abs_ns;
                 uint32_t flags;                    /* VCPU_SSHOTTMR_??? */
 };
+DEFINE_GUEST_HANDLE_STRUCT(vcpu_set_singleshot_timer);
 
 /* Flags to VCPUOP_set_singleshot_timer. */
  /* Require the timeout to be in the future (return -ETIME if it's passed). */
@@ -164,5 +168,6 @@ struct vcpu_register_vcpu_info {
     uint32_t offset; /* offset within page */
     uint32_t rsvd;   /* unused */
 };
+DEFINE_GUEST_HANDLE_STRUCT(vcpu_register_vcpu_info);
 
 #endif /* __XEN_PUBLIC_VCPU_H__ */
diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h
index 518a5bf79ed3..9b018da48cf3 100644
--- a/include/xen/interface/xen.h
+++ b/include/xen/interface/xen.h
@@ -58,6 +58,16 @@
 #define __HYPERVISOR_physdev_op           33
 #define __HYPERVISOR_hvm_op               34
 
+/* Architecture-specific hypercall definitions. */
+#define __HYPERVISOR_arch_0               48
+#define __HYPERVISOR_arch_1               49
+#define __HYPERVISOR_arch_2               50
+#define __HYPERVISOR_arch_3               51
+#define __HYPERVISOR_arch_4               52
+#define __HYPERVISOR_arch_5               53
+#define __HYPERVISOR_arch_6               54
+#define __HYPERVISOR_arch_7               55
+
 /*
  * VIRTUAL INTERRUPTS
  *
@@ -68,8 +78,18 @@
 #define VIRQ_CONSOLE    2  /* (DOM0) Bytes received on emergency console. */
 #define VIRQ_DOM_EXC    3  /* (DOM0) Exceptional event for some domain.   */
 #define VIRQ_DEBUGGER   6  /* (DOM0) A domain has paused for debugging.   */
-#define NR_VIRQS        8
 
+/* Architecture-specific VIRQ definitions. */
+#define VIRQ_ARCH_0    16
+#define VIRQ_ARCH_1    17
+#define VIRQ_ARCH_2    18
+#define VIRQ_ARCH_3    19
+#define VIRQ_ARCH_4    20
+#define VIRQ_ARCH_5    21
+#define VIRQ_ARCH_6    22
+#define VIRQ_ARCH_7    23
+
+#define NR_VIRQS       24
 /*
  * MMU-UPDATE REQUESTS
  *
diff --git a/include/xen/interface/xencomm.h b/include/xen/interface/xencomm.h
new file mode 100644
index 000000000000..ac45e0712afa
--- /dev/null
+++ b/include/xen/interface/xencomm.h
@@ -0,0 +1,41 @@
+/*
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Copyright (C) IBM Corp. 2006
+ */
+
+#ifndef _XEN_XENCOMM_H_
+#define _XEN_XENCOMM_H_
+
+/* A xencomm descriptor is a scatter/gather list containing physical
+ * addresses corresponding to a virtually contiguous memory area. The
+ * hypervisor translates these physical addresses to machine addresses to copy
+ * to and from the virtually contiguous area.
+ */
+
+#define XENCOMM_MAGIC 0x58434F4D /* 'XCOM' */
+#define XENCOMM_INVALID (~0UL)
+
+struct xencomm_desc {
+    uint32_t magic;
+    uint32_t nr_addrs; /* the number of entries in address[] */
+    uint64_t address[0];
+};
+
+#endif /* _XEN_XENCOMM_H_ */
diff --git a/include/xen/page.h b/include/xen/page.h
index 031ef22a971e..eaf85fab1263 100644
--- a/include/xen/page.h
+++ b/include/xen/page.h
@@ -1,180 +1 @@
-#ifndef __XEN_PAGE_H
-#define __XEN_PAGE_H
-
-#include <linux/pfn.h>
-
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-
-#include <xen/features.h>
-
-#ifdef CONFIG_X86_PAE
-/* Xen machine address */
-typedef struct xmaddr {
-        unsigned long long maddr;
-} xmaddr_t;
-
-/* Xen pseudo-physical address */
-typedef struct xpaddr {
-        unsigned long long paddr;
-} xpaddr_t;
-#else
-/* Xen machine address */
-typedef struct xmaddr {
-        unsigned long maddr;
-} xmaddr_t;
-
-/* Xen pseudo-physical address */
-typedef struct xpaddr {
-        unsigned long paddr;
-} xpaddr_t;
-#endif
-
-#define XMADDR(x)       ((xmaddr_t) { .maddr = (x) })
-#define XPADDR(x)       ((xpaddr_t) { .paddr = (x) })
-
-/**** MACHINE <-> PHYSICAL CONVERSION MACROS ****/
-#define INVALID_P2M_ENTRY       (~0UL)
-#define FOREIGN_FRAME_BIT       (1UL<<31)
-#define FOREIGN_FRAME(m)        ((m) | FOREIGN_FRAME_BIT)
-
-extern unsigned long *phys_to_machine_mapping;
-
-static inline unsigned long pfn_to_mfn(unsigned long pfn)
-{
-        if (xen_feature(XENFEAT_auto_translated_physmap))
-                return pfn;
-
-        return phys_to_machine_mapping[(unsigned int)(pfn)] &
-                ~FOREIGN_FRAME_BIT;
-}
-
-static inline int phys_to_machine_mapping_valid(unsigned long pfn)
-{
-        if (xen_feature(XENFEAT_auto_translated_physmap))
-                return 1;
-
-        return (phys_to_machine_mapping[pfn] != INVALID_P2M_ENTRY);
-}
-
-static inline unsigned long mfn_to_pfn(unsigned long mfn)
-{
-        unsigned long pfn;
-
-        if (xen_feature(XENFEAT_auto_translated_physmap))
-                return mfn;
-
-#if 0
-        if (unlikely((mfn >> machine_to_phys_order) != 0))
-                return max_mapnr;
-#endif
-
-        pfn = 0;
-        /*
-         * The array access can fail (e.g., device space beyond end of RAM).
-         * In such cases it doesn't matter what we return (we return garbage),
-         * but we must handle the fault without crashing!
-         */
-        __get_user(pfn, &machine_to_phys_mapping[mfn]);
-
-        return pfn;
-}
-
-static inline xmaddr_t phys_to_machine(xpaddr_t phys)
-{
-        unsigned offset = phys.paddr & ~PAGE_MASK;
-        return XMADDR(PFN_PHYS((u64)pfn_to_mfn(PFN_DOWN(phys.paddr))) | offset);
-}
-
-static inline xpaddr_t machine_to_phys(xmaddr_t machine)
-{
-        unsigned offset = machine.maddr & ~PAGE_MASK;
-        return XPADDR(PFN_PHYS((u64)mfn_to_pfn(PFN_DOWN(machine.maddr))) | offset);
-}
-
-/*
- * We detect special mappings in one of two ways:
- *  1. If the MFN is an I/O page then Xen will set the m2p entry
- *     to be outside our maximum possible pseudophys range.
- *  2. If the MFN belongs to a different domain then we will certainly
- *     not have MFN in our p2m table. Conversely, if the page is ours,
- *     then we'll have p2m(m2p(MFN))==MFN.
- * If we detect a special mapping then it doesn't have a 'struct page'.
- * We force !pfn_valid() by returning an out-of-range pointer.
- *
- * NB. These checks require that, for any MFN that is not in our reservation,
- * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
- * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
- * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
- *
- * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
- *      use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
- *      require. In all the cases we care about, the FOREIGN_FRAME bit is
- *      masked (e.g., pfn_to_mfn()) so behaviour there is correct.
- */
-static inline unsigned long mfn_to_local_pfn(unsigned long mfn)
-{
-        extern unsigned long max_mapnr;
-        unsigned long pfn = mfn_to_pfn(mfn);
-        if ((pfn < max_mapnr)
-            && !xen_feature(XENFEAT_auto_translated_physmap)
-            && (phys_to_machine_mapping[pfn] != mfn))
-                return max_mapnr; /* force !pfn_valid() */
-        return pfn;
-}
-
-static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
-{
-        if (xen_feature(XENFEAT_auto_translated_physmap)) {
-                BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
-                return;
-        }
-        phys_to_machine_mapping[pfn] = mfn;
-}
-
-/* VIRT <-> MACHINE conversion */
-#define virt_to_machine(v)      (phys_to_machine(XPADDR(__pa(v))))
-#define virt_to_mfn(v)          (pfn_to_mfn(PFN_DOWN(__pa(v))))
-#define mfn_to_virt(m)          (__va(mfn_to_pfn(m) << PAGE_SHIFT))
-
-#ifdef CONFIG_X86_PAE
-#define pte_mfn(_pte) (((_pte).pte_low >> PAGE_SHIFT) |                 \
-                       (((_pte).pte_high & 0xfff) << (32-PAGE_SHIFT)))
-
-static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
-{
-        pte_t pte;
-
-        pte.pte_high = (page_nr >> (32 - PAGE_SHIFT)) |
-                (pgprot_val(pgprot) >> 32);
-        pte.pte_high &= (__supported_pte_mask >> 32);
-        pte.pte_low = ((page_nr << PAGE_SHIFT) | pgprot_val(pgprot));
-        pte.pte_low &= __supported_pte_mask;
-
-        return pte;
-}
-
-static inline unsigned long long pte_val_ma(pte_t x)
-{
-        return x.pte;
-}
-#define pmd_val_ma(v) ((v).pmd)
-#define pud_val_ma(v) ((v).pgd.pgd)
-#define __pte_ma(x)     ((pte_t) { .pte = (x) })
-#define __pmd_ma(x)     ((pmd_t) { (x) } )
-#else  /* !X86_PAE */
-#define pte_mfn(_pte) ((_pte).pte_low >> PAGE_SHIFT)
-#define mfn_pte(pfn, prot)      __pte_ma(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-#define pte_val_ma(x)   ((x).pte)
-#define pmd_val_ma(v)   ((v).pud.pgd.pgd)
-#define __pte_ma(x)     ((pte_t) { (x) } )
-#endif  /* CONFIG_X86_PAE */
-
-#define pgd_val_ma(x)   ((x).pgd)
-
-
-xmaddr_t arbitrary_virt_to_machine(unsigned long address);
-void make_lowmem_page_readonly(void *vaddr);
-void make_lowmem_page_readwrite(void *vaddr);
-
-#endif /* __XEN_PAGE_H */
+#include <asm/xen/page.h>
diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h
new file mode 100644
index 000000000000..10ddfe0142d0
--- /dev/null
+++ b/include/xen/xen-ops.h
@@ -0,0 +1,8 @@
+#ifndef INCLUDE_XEN_OPS_H
+#define INCLUDE_XEN_OPS_H
+
+#include <linux/percpu.h>
+
+DECLARE_PER_CPU(struct vcpu_info *, xen_vcpu);
+
+#endif /* INCLUDE_XEN_OPS_H */
diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h
index 6f7c290651ae..6369d89c25d5 100644
--- a/include/xen/xenbus.h
+++ b/include/xen/xenbus.h
@@ -97,6 +97,7 @@ struct xenbus_driver {
         int (*uevent)(struct xenbus_device *, char **, int, char *, int);
         struct device_driver driver;
         int (*read_otherend_details)(struct xenbus_device *dev);
+        int (*is_ready)(struct xenbus_device *dev);
 };
 
 static inline struct xenbus_driver *to_xenbus_driver(struct device_driver *drv)
diff --git a/include/xen/xencomm.h b/include/xen/xencomm.h
new file mode 100644
index 000000000000..e43b039be112
--- /dev/null
+++ b/include/xen/xencomm.h
@@ -0,0 +1,77 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ * Copyright (C) IBM Corp. 2006
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ *          Jerone Young <jyoung5@us.ibm.com>
+ */
+
+#ifndef _LINUX_XENCOMM_H_
+#define _LINUX_XENCOMM_H_
+
+#include <xen/interface/xencomm.h>
+
+#define XENCOMM_MINI_ADDRS 3
+struct xencomm_mini {
+        struct xencomm_desc _desc;
+        uint64_t address[XENCOMM_MINI_ADDRS];
+};
+
+/* To avoid additionnal virt to phys conversion, an opaque structure is
+   presented.  */
+struct xencomm_handle;
+
+extern void xencomm_free(struct xencomm_handle *desc);
+extern struct xencomm_handle *xencomm_map(void *ptr, unsigned long bytes);
+extern struct xencomm_handle *__xencomm_map_no_alloc(void *ptr,
+                        unsigned long bytes,  struct xencomm_mini *xc_area);
+
+#if 0
+#define XENCOMM_MINI_ALIGNED(xc_desc, n)                                \
+        struct xencomm_mini xc_desc ## _base[(n)]                       \
+        __attribute__((__aligned__(sizeof(struct xencomm_mini))));      \
+        struct xencomm_mini *xc_desc = &xc_desc ## _base[0];
+#else
+/*
+ * gcc bug workaround:
+ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=16660
+ * gcc doesn't handle properly stack variable with
+ * __attribute__((__align__(sizeof(struct xencomm_mini))))
+ */
+#define XENCOMM_MINI_ALIGNED(xc_desc, n)                                \
+        unsigned char xc_desc ## _base[((n) + 1 ) *                     \
+                                       sizeof(struct xencomm_mini)];    \
+        struct xencomm_mini *xc_desc = (struct xencomm_mini *)          \
+                ((unsigned long)xc_desc ## _base +                      \
+                 (sizeof(struct xencomm_mini) -                         \
+                  ((unsigned long)xc_desc ## _base) %                   \
+                  sizeof(struct xencomm_mini)));
+#endif
+#define xencomm_map_no_alloc(ptr, bytes)                        \
+        ({ XENCOMM_MINI_ALIGNED(xc_desc, 1);                    \
+                __xencomm_map_no_alloc(ptr, bytes, xc_desc); })
+
+/* provided by architecture code: */
+extern unsigned long xencomm_vtop(unsigned long vaddr);
+
+static inline void *xencomm_pa(void *ptr)
+{
+        return (void *)xencomm_vtop((unsigned long)ptr);
+}
+
+#define xen_guest_handle(hnd)  ((hnd).p)
+
+#endif /* _LINUX_XENCOMM_H_ */