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-rw-r--r--include/asm-xtensa/a.out.h33
-rw-r--r--include/asm-xtensa/atomic.h272
-rw-r--r--include/asm-xtensa/bitops.h446
-rw-r--r--include/asm-xtensa/bootparam.h61
-rw-r--r--include/asm-xtensa/bug.h41
-rw-r--r--include/asm-xtensa/bugs.h22
-rw-r--r--include/asm-xtensa/byteorder.h82
-rw-r--r--include/asm-xtensa/cache.h32
-rw-r--r--include/asm-xtensa/cacheflush.h122
-rw-r--r--include/asm-xtensa/checksum.h264
-rw-r--r--include/asm-xtensa/coprocessor.h70
-rw-r--r--include/asm-xtensa/cpumask.h16
-rw-r--r--include/asm-xtensa/cputime.h6
-rw-r--r--include/asm-xtensa/current.h38
-rw-r--r--include/asm-xtensa/delay.h50
-rw-r--r--include/asm-xtensa/div64.h19
-rw-r--r--include/asm-xtensa/dma-mapping.h182
-rw-r--r--include/asm-xtensa/dma.h61
-rw-r--r--include/asm-xtensa/elf.h222
-rw-r--r--include/asm-xtensa/errno.h142
-rw-r--r--include/asm-xtensa/fcntl.h101
-rw-r--r--include/asm-xtensa/fixmap.h252
-rw-r--r--include/asm-xtensa/hardirq.h28
-rw-r--r--include/asm-xtensa/hdreg.h17
-rw-r--r--include/asm-xtensa/highmem.h17
-rw-r--r--include/asm-xtensa/hw_irq.h18
-rw-r--r--include/asm-xtensa/ide.h36
-rw-r--r--include/asm-xtensa/io.h197
-rw-r--r--include/asm-xtensa/ioctl.h83
-rw-r--r--include/asm-xtensa/ioctls.h112
-rw-r--r--include/asm-xtensa/ipc.h34
-rw-r--r--include/asm-xtensa/ipcbuf.h37
-rw-r--r--include/asm-xtensa/irq.h37
-rw-r--r--include/asm-xtensa/kmap_types.h31
-rw-r--r--include/asm-xtensa/linkage.h16
-rw-r--r--include/asm-xtensa/local.h16
-rw-r--r--include/asm-xtensa/mman.h80
-rw-r--r--include/asm-xtensa/mmu.h17
-rw-r--r--include/asm-xtensa/mmu_context.h330
-rw-r--r--include/asm-xtensa/module.h25
-rw-r--r--include/asm-xtensa/msgbuf.h48
-rw-r--r--include/asm-xtensa/namei.h26
-rw-r--r--include/asm-xtensa/page.h133
-rw-r--r--include/asm-xtensa/page.h.n135
-rw-r--r--include/asm-xtensa/param.h34
-rw-r--r--include/asm-xtensa/pci-bridge.h88
-rw-r--r--include/asm-xtensa/pci.h89
-rw-r--r--include/asm-xtensa/percpu.h16
-rw-r--r--include/asm-xtensa/pgalloc.h116
-rw-r--r--include/asm-xtensa/pgtable.h468
-rw-r--r--include/asm-xtensa/poll.h37
-rw-r--r--include/asm-xtensa/posix_types.h123
-rw-r--r--include/asm-xtensa/processor.h205
-rw-r--r--include/asm-xtensa/ptrace.h135
-rw-r--r--include/asm-xtensa/resource.h16
-rw-r--r--include/asm-xtensa/rmap.h16
-rw-r--r--include/asm-xtensa/rwsem.h175
-rw-r--r--include/asm-xtensa/scatterlist.h34
-rw-r--r--include/asm-xtensa/sections.h16
-rw-r--r--include/asm-xtensa/segment.h16
-rw-r--r--include/asm-xtensa/semaphore.h129
-rw-r--r--include/asm-xtensa/sembuf.h44
-rw-r--r--include/asm-xtensa/serial.h18
-rw-r--r--include/asm-xtensa/setup.h16
-rw-r--r--include/asm-xtensa/shmbuf.h50
-rw-r--r--include/asm-xtensa/shmparam.h23
-rw-r--r--include/asm-xtensa/sigcontext.h44
-rw-r--r--include/asm-xtensa/siginfo.h16
-rw-r--r--include/asm-xtensa/signal.h187
-rw-r--r--include/asm-xtensa/smp.h27
-rw-r--r--include/asm-xtensa/socket.h61
-rw-r--r--include/asm-xtensa/sockios.h30
-rw-r--r--include/asm-xtensa/spinlock.h16
-rw-r--r--include/asm-xtensa/stat.h105
-rw-r--r--include/asm-xtensa/statfs.h17
-rw-r--r--include/asm-xtensa/string.h124
-rw-r--r--include/asm-xtensa/system.h252
-rw-r--r--include/asm-xtensa/termbits.h194
-rw-r--r--include/asm-xtensa/termios.h122
-rw-r--r--include/asm-xtensa/thread_info.h146
-rw-r--r--include/asm-xtensa/timex.h94
-rw-r--r--include/asm-xtensa/tlb.h25
-rw-r--r--include/asm-xtensa/tlbflush.h200
-rw-r--r--include/asm-xtensa/topology.h16
-rw-r--r--include/asm-xtensa/types.h66
-rw-r--r--include/asm-xtensa/uaccess.h532
-rw-r--r--include/asm-xtensa/ucontext.h22
-rw-r--r--include/asm-xtensa/unaligned.h28
-rw-r--r--include/asm-xtensa/unistd.h537
-rw-r--r--include/asm-xtensa/user.h20
-rw-r--r--include/asm-xtensa/vga.h19
-rw-r--r--include/asm-xtensa/xor.h16
92 files changed, 8787 insertions, 0 deletions
diff --git a/include/asm-xtensa/a.out.h b/include/asm-xtensa/a.out.h
new file mode 100644
index 000000000000..3be701dfe098
--- /dev/null
+++ b/include/asm-xtensa/a.out.h
@@ -0,0 +1,33 @@
1/*
2 * include/asm-xtensa/addrspace.h
3 *
4 * Dummy a.out file. Xtensa does not support the a.out format, but the kernel
5 * seems to depend on it.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * Copyright (C) 2001 - 2005 Tensilica Inc.
12 */
13
14#ifndef _XTENSA_A_OUT_H
15#define _XTENSA_A_OUT_H
16
17/* Note: the kernel needs the a.out definitions, even if only ELF is used. */
18
19#define STACK_TOP TASK_SIZE
20
21struct exec
22{
23 unsigned long a_info;
24 unsigned a_text;
25 unsigned a_data;
26 unsigned a_bss;
27 unsigned a_syms;
28 unsigned a_entry;
29 unsigned a_trsize;
30 unsigned a_drsize;
31};
32
33#endif /* _XTENSA_A_OUT_H */
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
new file mode 100644
index 000000000000..d72bcb32ba4f
--- /dev/null
+++ b/include/asm-xtensa/atomic.h
@@ -0,0 +1,272 @@
1/*
2 * include/asm-xtensa/atomic.h
3 *
4 * Atomic operations that C can't guarantee us. Useful for resource counting..
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_ATOMIC_H
14#define _XTENSA_ATOMIC_H
15
16#include <linux/config.h>
17#include <linux/stringify.h>
18
19typedef struct { volatile int counter; } atomic_t;
20
21#ifdef __KERNEL__
22#include <asm/processor.h>
23#include <asm/system.h>
24
25#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
26
27/*
28 * This Xtensa implementation assumes that the right mechanism
29 * for exclusion is for locking interrupts to level 1.
30 *
31 * Locking interrupts looks like this:
32 *
33 * rsil a15, 1
34 * <code>
35 * wsr a15, PS
36 * rsync
37 *
38 * Note that a15 is used here because the register allocation
39 * done by the compiler is not guaranteed and a window overflow
40 * may not occur between the rsil and wsr instructions. By using
41 * a15 in the rsil, the machine is guaranteed to be in a state
42 * where no register reference will cause an overflow.
43 */
44
45/**
46 * atomic_read - read atomic variable
47 * @v: pointer of type atomic_t
48 *
49 * Atomically reads the value of @v.
50 */
51#define atomic_read(v) ((v)->counter)
52
53/**
54 * atomic_set - set atomic variable
55 * @v: pointer of type atomic_t
56 * @i: required value
57 *
58 * Atomically sets the value of @v to @i.
59 */
60#define atomic_set(v,i) ((v)->counter = (i))
61
62/**
63 * atomic_add - add integer to atomic variable
64 * @i: integer value to add
65 * @v: pointer of type atomic_t
66 *
67 * Atomically adds @i to @v.
68 */
69extern __inline__ void atomic_add(int i, atomic_t * v)
70{
71 unsigned int vval;
72
73 __asm__ __volatile__(
74 "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
75 "l32i %0, %2, 0 \n\t"
76 "add %0, %0, %1 \n\t"
77 "s32i %0, %2, 0 \n\t"
78 "wsr a15, "__stringify(PS)" \n\t"
79 "rsync \n"
80 : "=&a" (vval)
81 : "a" (i), "a" (v)
82 : "a15", "memory"
83 );
84}
85
86/**
87 * atomic_sub - subtract the atomic variable
88 * @i: integer value to subtract
89 * @v: pointer of type atomic_t
90 *
91 * Atomically subtracts @i from @v.
92 */
93extern __inline__ void atomic_sub(int i, atomic_t *v)
94{
95 unsigned int vval;
96
97 __asm__ __volatile__(
98 "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
99 "l32i %0, %2, 0 \n\t"
100 "sub %0, %0, %1 \n\t"
101 "s32i %0, %2, 0 \n\t"
102 "wsr a15, "__stringify(PS)" \n\t"
103 "rsync \n"
104 : "=&a" (vval)
105 : "a" (i), "a" (v)
106 : "a15", "memory"
107 );
108}
109
110/*
111 * We use atomic_{add|sub}_return to define other functions.
112 */
113
114extern __inline__ int atomic_add_return(int i, atomic_t * v)
115{
116 unsigned int vval;
117
118 __asm__ __volatile__(
119 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
120 "l32i %0, %2, 0 \n\t"
121 "add %0, %0, %1 \n\t"
122 "s32i %0, %2, 0 \n\t"
123 "wsr a15, "__stringify(PS)" \n\t"
124 "rsync \n"
125 : "=&a" (vval)
126 : "a" (i), "a" (v)
127 : "a15", "memory"
128 );
129
130 return vval;
131}
132
133extern __inline__ int atomic_sub_return(int i, atomic_t * v)
134{
135 unsigned int vval;
136
137 __asm__ __volatile__(
138 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
139 "l32i %0, %2, 0 \n\t"
140 "sub %0, %0, %1 \n\t"
141 "s32i %0, %2, 0 \n\t"
142 "wsr a15, "__stringify(PS)" \n\t"
143 "rsync \n"
144 : "=&a" (vval)
145 : "a" (i), "a" (v)
146 : "a15", "memory"
147 );
148
149 return vval;
150}
151
152/**
153 * atomic_sub_and_test - subtract value from variable and test result
154 * @i: integer value to subtract
155 * @v: pointer of type atomic_t
156 *
157 * Atomically subtracts @i from @v and returns
158 * true if the result is zero, or false for all
159 * other cases.
160 */
161#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
162
163/**
164 * atomic_inc - increment atomic variable
165 * @v: pointer of type atomic_t
166 *
167 * Atomically increments @v by 1.
168 */
169#define atomic_inc(v) atomic_add(1,(v))
170
171/**
172 * atomic_inc - increment atomic variable
173 * @v: pointer of type atomic_t
174 *
175 * Atomically increments @v by 1.
176 */
177#define atomic_inc_return(v) atomic_add_return(1,(v))
178
179/**
180 * atomic_dec - decrement atomic variable
181 * @v: pointer of type atomic_t
182 *
183 * Atomically decrements @v by 1.
184 */
185#define atomic_dec(v) atomic_sub(1,(v))
186
187/**
188 * atomic_dec_return - decrement atomic variable
189 * @v: pointer of type atomic_t
190 *
191 * Atomically decrements @v by 1.
192 */
193#define atomic_dec_return(v) atomic_sub_return(1,(v))
194
195/**
196 * atomic_dec_and_test - decrement and test
197 * @v: pointer of type atomic_t
198 *
199 * Atomically decrements @v by 1 and
200 * returns true if the result is 0, or false for all other
201 * cases.
202 */
203#define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0)
204
205/**
206 * atomic_inc_and_test - increment and test
207 * @v: pointer of type atomic_t
208 *
209 * Atomically increments @v by 1
210 * and returns true if the result is zero, or false for all
211 * other cases.
212 */
213#define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0)
214
215/**
216 * atomic_add_negative - add and test if negative
217 * @v: pointer of type atomic_t
218 * @i: integer value to add
219 *
220 * Atomically adds @i to @v and returns true
221 * if the result is negative, or false when
222 * result is greater than or equal to zero.
223 */
224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
225
226
227extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
228{
229 unsigned int all_f = -1;
230 unsigned int vval;
231
232 __asm__ __volatile__(
233 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
234 "l32i %0, %2, 0 \n\t"
235 "xor %1, %4, %3 \n\t"
236 "and %0, %0, %4 \n\t"
237 "s32i %0, %2, 0 \n\t"
238 "wsr a15, "__stringify(PS)" \n\t"
239 "rsync \n"
240 : "=&a" (vval), "=a" (mask)
241 : "a" (v), "a" (all_f), "1" (mask)
242 : "a15", "memory"
243 );
244}
245
246extern __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
247{
248 unsigned int vval;
249
250 __asm__ __volatile__(
251 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
252 "l32i %0, %2, 0 \n\t"
253 "or %0, %0, %1 \n\t"
254 "s32i %0, %2, 0 \n\t"
255 "wsr a15, "__stringify(PS)" \n\t"
256 "rsync \n"
257 : "=&a" (vval)
258 : "a" (mask), "a" (v)
259 : "a15", "memory"
260 );
261}
262
263/* Atomic operations are already serializing */
264#define smp_mb__before_atomic_dec() barrier()
265#define smp_mb__after_atomic_dec() barrier()
266#define smp_mb__before_atomic_inc() barrier()
267#define smp_mb__after_atomic_inc() barrier()
268
269#endif /* __KERNEL__ */
270
271#endif /* _XTENSA_ATOMIC_H */
272
diff --git a/include/asm-xtensa/bitops.h b/include/asm-xtensa/bitops.h
new file mode 100644
index 000000000000..d395ef226c32
--- /dev/null
+++ b/include/asm-xtensa/bitops.h
@@ -0,0 +1,446 @@
1/*
2 * include/asm-xtensa/bitops.h
3 *
4 * Atomic operations that C can't guarantee us.Useful for resource counting etc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_BITOPS_H
14#define _XTENSA_BITOPS_H
15
16#ifdef __KERNEL__
17
18#include <asm/processor.h>
19#include <asm/byteorder.h>
20#include <asm/system.h>
21
22#ifdef CONFIG_SMP
23# error SMP not supported on this architecture
24#endif
25
26static __inline__ void set_bit(int nr, volatile void * addr)
27{
28 unsigned long mask = 1 << (nr & 0x1f);
29 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
30 unsigned long flags;
31
32 local_irq_save(flags);
33 *a |= mask;
34 local_irq_restore(flags);
35}
36
37static __inline__ void __set_bit(int nr, volatile unsigned long * addr)
38{
39 unsigned long mask = 1 << (nr & 0x1f);
40 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
41
42 *a |= mask;
43}
44
45static __inline__ void clear_bit(int nr, volatile void * addr)
46{
47 unsigned long mask = 1 << (nr & 0x1f);
48 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
49 unsigned long flags;
50
51 local_irq_save(flags);
52 *a &= ~mask;
53 local_irq_restore(flags);
54}
55
56static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
57{
58 unsigned long mask = 1 << (nr & 0x1f);
59 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
60
61 *a &= ~mask;
62}
63
64/*
65 * clear_bit() doesn't provide any barrier for the compiler.
66 */
67
68#define smp_mb__before_clear_bit() barrier()
69#define smp_mb__after_clear_bit() barrier()
70
71static __inline__ void change_bit(int nr, volatile void * addr)
72{
73 unsigned long mask = 1 << (nr & 0x1f);
74 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
75 unsigned long flags;
76
77 local_irq_save(flags);
78 *a ^= mask;
79 local_irq_restore(flags);
80}
81
82static __inline__ void __change_bit(int nr, volatile void * addr)
83{
84 unsigned long mask = 1 << (nr & 0x1f);
85 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
86
87 *a ^= mask;
88}
89
90static __inline__ int test_and_set_bit(int nr, volatile void * addr)
91{
92 unsigned long retval;
93 unsigned long mask = 1 << (nr & 0x1f);
94 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
95 unsigned long flags;
96
97 local_irq_save(flags);
98 retval = (mask & *a) != 0;
99 *a |= mask;
100 local_irq_restore(flags);
101
102 return retval;
103}
104
105static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
106{
107 unsigned long retval;
108 unsigned long mask = 1 << (nr & 0x1f);
109 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
110
111 retval = (mask & *a) != 0;
112 *a |= mask;
113
114 return retval;
115}
116
117static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
118{
119 unsigned long retval;
120 unsigned long mask = 1 << (nr & 0x1f);
121 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
122 unsigned long flags;
123
124 local_irq_save(flags);
125 retval = (mask & *a) != 0;
126 *a &= ~mask;
127 local_irq_restore(flags);
128
129 return retval;
130}
131
132static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
133{
134 unsigned long mask = 1 << (nr & 0x1f);
135 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
136 unsigned long old = *a;
137
138 *a = old & ~mask;
139 return (old & mask) != 0;
140}
141
142static __inline__ int test_and_change_bit(int nr, volatile void * addr)
143{
144 unsigned long retval;
145 unsigned long mask = 1 << (nr & 0x1f);
146 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
147 unsigned long flags;
148
149 local_irq_save(flags);
150
151 retval = (mask & *a) != 0;
152 *a ^= mask;
153 local_irq_restore(flags);
154
155 return retval;
156}
157
158/*
159 * non-atomic version; can be reordered
160 */
161
162static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
163{
164 unsigned long mask = 1 << (nr & 0x1f);
165 unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
166 unsigned long old = *a;
167
168 *a = old ^ mask;
169 return (old & mask) != 0;
170}
171
172static __inline__ int test_bit(int nr, const volatile void *addr)
173{
174 return 1UL & (((const volatile unsigned int *)addr)[nr>>5] >> (nr&31));
175}
176
177#if XCHAL_HAVE_NSAU
178
179static __inline__ int __cntlz (unsigned long x)
180{
181 int lz;
182 asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
183 return 31 - lz;
184}
185
186#else
187
188static __inline__ int __cntlz (unsigned long x)
189{
190 unsigned long sum, x1, x2, x4, x8, x16;
191 x1 = x & 0xAAAAAAAA;
192 x2 = x & 0xCCCCCCCC;
193 x4 = x & 0xF0F0F0F0;
194 x8 = x & 0xFF00FF00;
195 x16 = x & 0xFFFF0000;
196 sum = x2 ? 2 : 0;
197 sum += (x16 != 0) * 16;
198 sum += (x8 != 0) * 8;
199 sum += (x4 != 0) * 4;
200 sum += (x1 != 0);
201
202 return sum;
203}
204
205#endif
206
207/*
208 * ffz: Find first zero in word. Undefined if no zero exists.
209 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
210 */
211
212static __inline__ int ffz(unsigned long x)
213{
214 if ((x = ~x) == 0)
215 return 32;
216 return __cntlz(x & -x);
217}
218
219/*
220 * __ffs: Find first bit set in word. Return 0 for bit 0
221 */
222
223static __inline__ int __ffs(unsigned long x)
224{
225 return __cntlz(x & -x);
226}
227
228/*
229 * ffs: Find first bit set in word. This is defined the same way as
230 * the libc and compiler builtin ffs routines, therefore
231 * differs in spirit from the above ffz (man ffs).
232 */
233
234static __inline__ int ffs(unsigned long x)
235{
236 return __cntlz(x & -x) + 1;
237}
238
239/*
240 * fls: Find last (most-significant) bit set in word.
241 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
242 */
243
244static __inline__ int fls (unsigned int x)
245{
246 return __cntlz(x);
247}
248
249static __inline__ int
250find_next_bit(const unsigned long *addr, int size, int offset)
251{
252 const unsigned long *p = addr + (offset >> 5);
253 unsigned long result = offset & ~31UL;
254 unsigned long tmp;
255
256 if (offset >= size)
257 return size;
258 size -= result;
259 offset &= 31UL;
260 if (offset) {
261 tmp = *p++;
262 tmp &= ~0UL << offset;
263 if (size < 32)
264 goto found_first;
265 if (tmp)
266 goto found_middle;
267 size -= 32;
268 result += 32;
269 }
270 while (size >= 32) {
271 if ((tmp = *p++) != 0)
272 goto found_middle;
273 result += 32;
274 size -= 32;
275 }
276 if (!size)
277 return result;
278 tmp = *p;
279
280found_first:
281 tmp &= ~0UL >> (32 - size);
282 if (tmp == 0UL) /* Are any bits set? */
283 return result + size; /* Nope. */
284found_middle:
285 return result + __ffs(tmp);
286}
287
288/**
289 * find_first_bit - find the first set bit in a memory region
290 * @addr: The address to start the search at
291 * @size: The maximum size to search
292 *
293 * Returns the bit-number of the first set bit, not the number of the byte
294 * containing a bit.
295 */
296
297#define find_first_bit(addr, size) \
298 find_next_bit((addr), (size), 0)
299
300static __inline__ int
301find_next_zero_bit(const unsigned long *addr, int size, int offset)
302{
303 const unsigned long *p = addr + (offset >> 5);
304 unsigned long result = offset & ~31UL;
305 unsigned long tmp;
306
307 if (offset >= size)
308 return size;
309 size -= result;
310 offset &= 31UL;
311 if (offset) {
312 tmp = *p++;
313 tmp |= ~0UL >> (32-offset);
314 if (size < 32)
315 goto found_first;
316 if (~tmp)
317 goto found_middle;
318 size -= 32;
319 result += 32;
320 }
321 while (size & ~31UL) {
322 if (~(tmp = *p++))
323 goto found_middle;
324 result += 32;
325 size -= 32;
326 }
327 if (!size)
328 return result;
329 tmp = *p;
330
331found_first:
332 tmp |= ~0UL << size;
333found_middle:
334 return result + ffz(tmp);
335}
336
337#define find_first_zero_bit(addr, size) \
338 find_next_zero_bit((addr), (size), 0)
339
340#ifdef __XTENSA_EL__
341# define ext2_set_bit(nr,addr) __test_and_set_bit((nr), (addr))
342# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr),(addr))
343# define ext2_clear_bit(nr,addr) __test_and_clear_bit((nr), (addr))
344# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr),(addr))
345# define ext2_test_bit(nr,addr) test_bit((nr), (addr))
346# define ext2_find_first_zero_bit(addr, size) find_first_zero_bit((addr),(size))
347# define ext2_find_next_zero_bit(addr, size, offset) \
348 find_next_zero_bit((addr), (size), (offset))
349#elif defined(__XTENSA_EB__)
350# define ext2_set_bit(nr,addr) __test_and_set_bit((nr) ^ 0x18, (addr))
351# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr) ^ 0x18, (addr))
352# define ext2_clear_bit(nr,addr) __test_and_clear_bit((nr) ^ 18, (addr))
353# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr)^0x18,(addr))
354# define ext2_test_bit(nr,addr) test_bit((nr) ^ 0x18, (addr))
355# define ext2_find_first_zero_bit(addr, size) \
356 ext2_find_next_zero_bit((addr), (size), 0)
357
358static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
359{
360 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
361 unsigned long result = offset & ~31UL;
362 unsigned long tmp;
363
364 if (offset >= size)
365 return size;
366 size -= result;
367 offset &= 31UL;
368 if(offset) {
369 /* We hold the little endian value in tmp, but then the
370 * shift is illegal. So we could keep a big endian value
371 * in tmp, like this:
372 *
373 * tmp = __swab32(*(p++));
374 * tmp |= ~0UL >> (32-offset);
375 *
376 * but this would decrease preformance, so we change the
377 * shift:
378 */
379 tmp = *(p++);
380 tmp |= __swab32(~0UL >> (32-offset));
381 if(size < 32)
382 goto found_first;
383 if(~tmp)
384 goto found_middle;
385 size -= 32;
386 result += 32;
387 }
388 while(size & ~31UL) {
389 if(~(tmp = *(p++)))
390 goto found_middle;
391 result += 32;
392 size -= 32;
393 }
394 if(!size)
395 return result;
396 tmp = *p;
397
398found_first:
399 /* tmp is little endian, so we would have to swab the shift,
400 * see above. But then we have to swab tmp below for ffz, so
401 * we might as well do this here.
402 */
403 return result + ffz(__swab32(tmp) | (~0UL << size));
404found_middle:
405 return result + ffz(__swab32(tmp));
406}
407
408#else
409# error processor byte order undefined!
410#endif
411
412
413#define hweight32(x) generic_hweight32(x)
414#define hweight16(x) generic_hweight16(x)
415#define hweight8(x) generic_hweight8(x)
416
417/*
418 * Find the first bit set in a 140-bit bitmap.
419 * The first 100 bits are unlikely to be set.
420 */
421
422static inline int sched_find_first_bit(const unsigned long *b)
423{
424 if (unlikely(b[0]))
425 return __ffs(b[0]);
426 if (unlikely(b[1]))
427 return __ffs(b[1]) + 32;
428 if (unlikely(b[2]))
429 return __ffs(b[2]) + 64;
430 if (b[3])
431 return __ffs(b[3]) + 96;
432 return __ffs(b[4]) + 128;
433}
434
435
436/* Bitmap functions for the minix filesystem. */
437
438#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
439#define minix_set_bit(nr,addr) set_bit(nr,addr)
440#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
441#define minix_test_bit(nr,addr) test_bit(nr,addr)
442#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
443
444#endif /* __KERNEL__ */
445
446#endif /* _XTENSA_BITOPS_H */
diff --git a/include/asm-xtensa/bootparam.h b/include/asm-xtensa/bootparam.h
new file mode 100644
index 000000000000..9983f2c1b7ee
--- /dev/null
+++ b/include/asm-xtensa/bootparam.h
@@ -0,0 +1,61 @@
1/*
2 * include/asm-xtensa/bootparam.h
3 *
4 * Definition of the Linux/Xtensa boot parameter structure
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 *
12 * (Concept borrowed from the 68K port)
13 */
14
15#ifndef _XTENSA_BOOTPARAM_H
16#define _XTENSA_BOOTPARAM_H
17
18#define BP_VERSION 0x0001
19
20#define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/
21#define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */
22#define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */
23#define BP_TAG_SERIAL_BAUSRATE 0x1004 /* baud rate of current console. */
24#define BP_TAG_SERIAL_PORT 0x1005 /* serial device of current console */
25
26#define BP_TAG_FIRST 0x7B0B /* first tag with a version number */
27#define BP_TAG_LAST 0x7E0B /* last tag */
28
29#ifndef __ASSEMBLY__
30
31/* All records are aligned to 4 bytes */
32
33typedef struct bp_tag {
34 unsigned short id; /* tag id */
35 unsigned short size; /* size of this record excluding the structure*/
36 unsigned long data[0]; /* data */
37} bp_tag_t;
38
39typedef struct meminfo {
40 unsigned long type;
41 unsigned long start;
42 unsigned long end;
43} meminfo_t;
44
45#define SYSMEM_BANKS_MAX 5
46
47#define MEMORY_TYPE_CONVENTIONAL 0x1000
48#define MEMORY_TYPE_NONE 0x2000
49
50typedef struct sysmem_info {
51 int nr_banks;
52 meminfo_t bank[SYSMEM_BANKS_MAX];
53} sysmem_info_t;
54
55extern sysmem_info_t sysmem;
56
57#endif
58#endif
59
60
61
diff --git a/include/asm-xtensa/bug.h b/include/asm-xtensa/bug.h
new file mode 100644
index 000000000000..56703659b204
--- /dev/null
+++ b/include/asm-xtensa/bug.h
@@ -0,0 +1,41 @@
1/*
2 * include/asm-xtensa/bug.h
3 *
4 * Macros to cause a 'bug' message.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_BUG_H
14#define _XTENSA_BUG_H
15
16#include <linux/stringify.h>
17
18#define ILL __asm__ __volatile__ (".byte 0,0,0\n")
19
20#ifdef CONFIG_KALLSYMS
21# define BUG() do { \
22 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
23 ILL; \
24} while (0)
25#else
26# define BUG() do { \
27 printk("kernel BUG!\n"); \
28 ILL; \
29} while (0)
30#endif
31
32#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
33#define PAGE_BUG(page) do { BUG(); } while (0)
34#define WARN_ON(condition) do { \
35 if (unlikely((condition)!=0)) { \
36 printk ("Warning in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
37 dump_stack(); \
38 } \
39} while (0)
40
41#endif /* _XTENSA_BUG_H */
diff --git a/include/asm-xtensa/bugs.h b/include/asm-xtensa/bugs.h
new file mode 100644
index 000000000000..c42285320133
--- /dev/null
+++ b/include/asm-xtensa/bugs.h
@@ -0,0 +1,22 @@
1/*
2 * include/asm-xtensa/bugs.h
3 *
4 * This is included by init/main.c to check for architecture-dependent bugs.
5 *
6 * Xtensa processors don't have any bugs. :)
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file "COPYING" in the main directory of
10 * this archive for more details.
11 */
12
13#ifndef _XTENSA_BUGS_H
14#define _XTENSA_BUGS_H
15
16#include <asm/processor.h>
17
18static void __init check_bugs(void)
19{
20}
21
22#endif /* _XTENSA_BUGS_H */
diff --git a/include/asm-xtensa/byteorder.h b/include/asm-xtensa/byteorder.h
new file mode 100644
index 000000000000..0b1552569aae
--- /dev/null
+++ b/include/asm-xtensa/byteorder.h
@@ -0,0 +1,82 @@
1/*
2 * include/asm-xtensa/byteorder.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_BYTEORDER_H
12#define _XTENSA_BYTEORDER_H
13
14#include <asm/processor.h>
15#include <asm/types.h>
16
17static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
18{
19 __u32 res;
20 /* instruction sequence from Xtensa ISA release 2/2000 */
21 __asm__("ssai 8 \n\t"
22 "srli %0, %1, 16 \n\t"
23 "src %0, %0, %1 \n\t"
24 "src %0, %0, %0 \n\t"
25 "src %0, %1, %0 \n"
26 : "=&a" (res)
27 : "a" (x)
28 );
29 return res;
30}
31
32static __inline__ __const__ __u16 ___arch__swab16(__u16 x)
33{
34 /* Given that 'short' values are signed (i.e., can be negative),
35 * we cannot assume that the upper 16-bits of the register are
36 * zero. We are careful to mask values after shifting.
37 */
38
39 /* There exists an anomaly between xt-gcc and xt-xcc. xt-gcc
40 * inserts an extui instruction after putting this function inline
41 * to ensure that it uses only the least-significant 16 bits of
42 * the result. xt-xcc doesn't use an extui, but assumes the
43 * __asm__ macro follows convention that the upper 16 bits of an
44 * 'unsigned short' result are still zero. This macro doesn't
45 * follow convention; indeed, it leaves garbage in the upport 16
46 * bits of the register.
47
48 * Declaring the temporary variables 'res' and 'tmp' to be 32-bit
49 * types while the return type of the function is a 16-bit type
50 * forces both compilers to insert exactly one extui instruction
51 * (or equivalent) to mask off the upper 16 bits. */
52
53 __u32 res;
54 __u32 tmp;
55
56 __asm__("extui %1, %2, 8, 8\n\t"
57 "slli %0, %2, 8 \n\t"
58 "or %0, %0, %1 \n"
59 : "=&a" (res), "=&a" (tmp)
60 : "a" (x)
61 );
62
63 return res;
64}
65
66#define __arch__swab32(x) ___arch__swab32(x)
67#define __arch__swab16(x) ___arch__swab16(x)
68
69#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
70# define __BYTEORDER_HAS_U64__
71# define __SWAB_64_THRU_32__
72#endif
73
74#ifdef __XTENSA_EL__
75# include <linux/byteorder/little_endian.h>
76#elif defined(__XTENSA_EB__)
77# include <linux/byteorder/big_endian.h>
78#else
79# error processor byte order undefined!
80#endif
81
82#endif /* __ASM_XTENSA_BYTEORDER_H */
diff --git a/include/asm-xtensa/cache.h b/include/asm-xtensa/cache.h
new file mode 100644
index 000000000000..5aae3f12407c
--- /dev/null
+++ b/include/asm-xtensa/cache.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-xtensa/cacheflush.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 * 2 of the License, or (at your option) any later version.
8 *
9 * (C) 2001 - 2005 Tensilica Inc.
10 */
11
12#ifndef _XTENSA_CACHE_H
13#define _XTENSA_CACHE_H
14
15#include <xtensa/config/core.h>
16
17#if XCHAL_ICACHE_SIZE > 0
18# if (XCHAL_ICACHE_SIZE % (XCHAL_ICACHE_LINESIZE*XCHAL_ICACHE_WAYS*4)) != 0
19# error cache configuration outside expected/supported range!
20# endif
21#endif
22
23#if XCHAL_DCACHE_SIZE > 0
24# if (XCHAL_DCACHE_SIZE % (XCHAL_DCACHE_LINESIZE*XCHAL_DCACHE_WAYS*4)) != 0
25# error cache configuration outside expected/supported range!
26# endif
27#endif
28
29#define L1_CACHE_SHIFT XCHAL_CACHE_LINEWIDTH_MAX
30#define L1_CACHE_BYTES XCHAL_CACHE_LINESIZE_MAX
31
32#endif /* _XTENSA_CACHE_H */
diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h
new file mode 100644
index 000000000000..44a36e087844
--- /dev/null
+++ b/include/asm-xtensa/cacheflush.h
@@ -0,0 +1,122 @@
1/*
2 * include/asm-xtensa/cacheflush.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CACHEFLUSH_H
12#define _XTENSA_CACHEFLUSH_H
13
14#ifdef __KERNEL__
15
16#include <linux/mm.h>
17#include <asm/processor.h>
18#include <asm/page.h>
19
20/*
21 * flush and invalidate data cache, invalidate instruction cache:
22 *
23 * __flush_invalidate_cache_all()
24 * __flush_invalidate_cache_range(from,sze)
25 *
26 * invalidate data or instruction cache:
27 *
28 * __invalidate_icache_all()
29 * __invalidate_icache_page(adr)
30 * __invalidate_dcache_page(adr)
31 * __invalidate_icache_range(from,size)
32 * __invalidate_dcache_range(from,size)
33 *
34 * flush data cache:
35 *
36 * __flush_dcache_page(adr)
37 *
38 * flush and invalidate data cache:
39 *
40 * __flush_invalidate_dcache_all()
41 * __flush_invalidate_dcache_page(adr)
42 * __flush_invalidate_dcache_range(from,size)
43 */
44
45extern void __flush_invalidate_cache_all(void);
46extern void __flush_invalidate_cache_range(unsigned long, unsigned long);
47extern void __flush_invalidate_dcache_all(void);
48extern void __invalidate_icache_all(void);
49
50extern void __invalidate_dcache_page(unsigned long);
51extern void __invalidate_icache_page(unsigned long);
52extern void __invalidate_icache_range(unsigned long, unsigned long);
53extern void __invalidate_dcache_range(unsigned long, unsigned long);
54
55#if XCHAL_DCACHE_IS_WRITEBACK
56extern void __flush_dcache_page(unsigned long);
57extern void __flush_invalidate_dcache_page(unsigned long);
58extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
59#else
60# define __flush_dcache_page(p) do { } while(0)
61# define __flush_invalidate_dcache_page(p) do { } while(0)
62# define __flush_invalidate_dcache_range(p,s) do { } while(0)
63#endif
64
65/*
66 * We have physically tagged caches - nothing to do here -
67 * unless we have cache aliasing.
68 *
69 * Pages can get remapped. Because this might change the 'color' of that page,
70 * we have to flush the cache before the PTE is changed.
71 * (see also Documentation/cachetlb.txt)
72 */
73
74#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
75
76#define flush_cache_all() __flush_invalidate_cache_all();
77#define flush_cache_mm(mm) __flush_invalidate_cache_all();
78
79#define flush_cache_vmap(start,end) __flush_invalidate_cache_all();
80#define flush_cache_vunmap(start,end) __flush_invalidate_cache_all();
81
82extern void flush_dcache_page(struct page*);
83
84extern void flush_cache_range(struct vm_area_struct*, ulong, ulong);
85extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned long);
86
87#else
88
89#define flush_cache_all() do { } while (0)
90#define flush_cache_mm(mm) do { } while (0)
91
92#define flush_cache_vmap(start,end) do { } while (0)
93#define flush_cache_vunmap(start,end) do { } while (0)
94
95#define flush_dcache_page(page) do { } while (0)
96
97#define flush_cache_page(vma,addr,pfn) do { } while (0)
98#define flush_cache_range(vma,start,end) do { } while (0)
99
100#endif
101
102#define flush_icache_range(start,end) \
103 __invalidate_icache_range(start,(end)-(start))
104
105/* This is not required, see Documentation/cachetlb.txt */
106
107#define flush_icache_page(vma,page) do { } while(0)
108
109#define flush_dcache_mmap_lock(mapping) do { } while (0)
110#define flush_dcache_mmap_unlock(mapping) do { } while (0)
111
112
113#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
114 memcpy(dst, src, len)
115
116#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
117 memcpy(dst, src, len)
118
119#endif /* __KERNEL__ */
120
121#endif /* _XTENSA_CACHEFLUSH_H */
122
diff --git a/include/asm-xtensa/checksum.h b/include/asm-xtensa/checksum.h
new file mode 100644
index 000000000000..1a00fad19929
--- /dev/null
+++ b/include/asm-xtensa/checksum.h
@@ -0,0 +1,264 @@
1/*
2 * include/asm-xtensa/checksum.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CHECKSUM_H
12#define _XTENSA_CHECKSUM_H
13
14#include <linux/config.h>
15#include <linux/in6.h>
16#include <xtensa/config/core.h>
17
18/*
19 * computes the checksum of a memory block at buff, length len,
20 * and adds in "sum" (32-bit)
21 *
22 * returns a 32-bit number suitable for feeding into itself
23 * or csum_tcpudp_magic
24 *
25 * this function must be called with even lengths, except
26 * for the last fragment, which may be odd
27 *
28 * it's best to have buff aligned on a 32-bit boundary
29 */
30asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum);
31
32/*
33 * the same as csum_partial, but copies from src while it
34 * checksums, and handles user-space pointer exceptions correctly, when needed.
35 *
36 * here even more important to align src and dst on a 32-bit (or even
37 * better 64-bit) boundary
38 */
39
40asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, int len, int sum,
41 int *src_err_ptr, int *dst_err_ptr);
42
43/*
44 * Note: when you get a NULL pointer exception here this means someone
45 * passed in an incorrect kernel address to one of these functions.
46 *
47 * If you use these functions directly please don't forget the
48 * verify_area().
49 */
50extern __inline__
51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst,
52 int len, int sum)
53{
54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL);
55}
56
57extern __inline__
58unsigned int csum_partial_copy_from_user ( const char *src, char *dst,
59 int len, int sum, int *err_ptr)
60{
61 return csum_partial_copy_generic ( src, dst, len, sum, err_ptr, NULL);
62}
63
64/*
65 * These are the old (and unsafe) way of doing checksums, a warning message will be
66 * printed if they are used and an exeption occurs.
67 *
68 * these functions should go away after some time.
69 */
70
71#define csum_partial_copy_fromuser csum_partial_copy
72unsigned int csum_partial_copy( const char *src, char *dst, int len, int sum);
73
74/*
75 * Fold a partial checksum
76 */
77
78static __inline__ unsigned int csum_fold(unsigned int sum)
79{
80 unsigned int __dummy;
81 __asm__("extui %1, %0, 16, 16\n\t"
82 "extui %0 ,%0, 0, 16\n\t"
83 "add %0, %0, %1\n\t"
84 "slli %1, %0, 16\n\t"
85 "add %0, %0, %1\n\t"
86 "extui %0, %0, 16, 16\n\t"
87 "neg %0, %0\n\t"
88 "addi %0, %0, -1\n\t"
89 "extui %0, %0, 0, 16\n\t"
90 : "=r" (sum), "=&r" (__dummy)
91 : "0" (sum));
92 return sum;
93}
94
95/*
96 * This is a version of ip_compute_csum() optimized for IP headers,
97 * which always checksum on 4 octet boundaries.
98 */
99static __inline__ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl)
100{
101 unsigned int sum, tmp, endaddr;
102
103 __asm__ __volatile__(
104 "sub %0, %0, %0\n\t"
105#if XCHAL_HAVE_LOOPS
106 "loopgtz %2, 2f\n\t"
107#else
108 "beqz %2, 2f\n\t"
109 "slli %4, %2, 2\n\t"
110 "add %4, %4, %1\n\t"
111 "0:\t"
112#endif
113 "l32i %3, %1, 0\n\t"
114 "add %0, %0, %3\n\t"
115 "bgeu %0, %3, 1f\n\t"
116 "addi %0, %0, 1\n\t"
117 "1:\t"
118 "addi %1, %1, 4\n\t"
119#if !XCHAL_HAVE_LOOPS
120 "blt %1, %4, 0b\n\t"
121#endif
122 "2:\t"
123 /* Since the input registers which are loaded with iph and ihl
124 are modified, we must also specify them as outputs, or gcc
125 will assume they contain their original values. */
126 : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmp), "=&r" (endaddr)
127 : "1" (iph), "2" (ihl));
128
129 return csum_fold(sum);
130}
131
132static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr,
133 unsigned long daddr,
134 unsigned short len,
135 unsigned short proto,
136 unsigned int sum)
137{
138
139#ifdef __XTENSA_EL__
140 unsigned long len_proto = (ntohs(len)<<16)+proto*256;
141#elif defined(__XTENSA_EB__)
142 unsigned long len_proto = (proto<<16)+len;
143#else
144# error processor byte order undefined!
145#endif
146 __asm__("add %0, %0, %1\n\t"
147 "bgeu %0, %1, 1f\n\t"
148 "addi %0, %0, 1\n\t"
149 "1:\t"
150 "add %0, %0, %2\n\t"
151 "bgeu %0, %2, 1f\n\t"
152 "addi %0, %0, 1\n\t"
153 "1:\t"
154 "add %0, %0, %3\n\t"
155 "bgeu %0, %3, 1f\n\t"
156 "addi %0, %0, 1\n\t"
157 "1:\t"
158 : "=r" (sum), "=r" (len_proto)
159 : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum));
160 return sum;
161}
162
163/*
164 * computes the checksum of the TCP/UDP pseudo-header
165 * returns a 16-bit checksum, already complemented
166 */
167static __inline__ unsigned short int csum_tcpudp_magic(unsigned long saddr,
168 unsigned long daddr,
169 unsigned short len,
170 unsigned short proto,
171 unsigned int sum)
172{
173 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
174}
175
176/*
177 * this routine is used for miscellaneous IP-like checksums, mainly
178 * in icmp.c
179 */
180
181static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len)
182{
183 return csum_fold (csum_partial(buff, len, 0));
184}
185
186#define _HAVE_ARCH_IPV6_CSUM
187static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
188 struct in6_addr *daddr,
189 __u32 len,
190 unsigned short proto,
191 unsigned int sum)
192{
193 unsigned int __dummy;
194 __asm__("l32i %1, %2, 0\n\t"
195 "add %0, %0, %1\n\t"
196 "bgeu %0, %1, 1f\n\t"
197 "addi %0, %0, 1\n\t"
198 "1:\t"
199 "l32i %1, %2, 4\n\t"
200 "add %0, %0, %1\n\t"
201 "bgeu %0, %1, 1f\n\t"
202 "addi %0, %0, 1\n\t"
203 "1:\t"
204 "l32i %1, %2, 8\n\t"
205 "add %0, %0, %1\n\t"
206 "bgeu %0, %1, 1f\n\t"
207 "addi %0, %0, 1\n\t"
208 "1:\t"
209 "l32i %1, %2, 12\n\t"
210 "add %0, %0, %1\n\t"
211 "bgeu %0, %1, 1f\n\t"
212 "addi %0, %0, 1\n\t"
213 "1:\t"
214 "l32i %1, %3, 0\n\t"
215 "add %0, %0, %1\n\t"
216 "bgeu %0, %1, 1f\n\t"
217 "addi %0, %0, 1\n\t"
218 "1:\t"
219 "l32i %1, %3, 4\n\t"
220 "add %0, %0, %1\n\t"
221 "bgeu %0, %1, 1f\n\t"
222 "addi %0, %0, 1\n\t"
223 "1:\t"
224 "l32i %1, %3, 8\n\t"
225 "add %0, %0, %1\n\t"
226 "bgeu %0, %1, 1f\n\t"
227 "addi %0, %0, 1\n\t"
228 "1:\t"
229 "l32i %1, %3, 12\n\t"
230 "add %0, %0, %1\n\t"
231 "bgeu %0, %1, 1f\n\t"
232 "addi %0, %0, 1\n\t"
233 "1:\t"
234 "add %0, %0, %4\n\t"
235 "bgeu %0, %4, 1f\n\t"
236 "addi %0, %0, 1\n\t"
237 "1:\t"
238 "add %0, %0, %5\n\t"
239 "bgeu %0, %5, 1f\n\t"
240 "addi %0, %0, 1\n\t"
241 "1:\t"
242 : "=r" (sum), "=&r" (__dummy)
243 : "r" (saddr), "r" (daddr),
244 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum));
245
246 return csum_fold(sum);
247}
248
249/*
250 * Copy and checksum to user
251 */
252#define HAVE_CSUM_COPY_USER
253static __inline__ unsigned int csum_and_copy_to_user (const char *src, char *dst,
254 int len, int sum, int *err_ptr)
255{
256 if (access_ok(VERIFY_WRITE, dst, len))
257 return csum_partial_copy_generic(src, dst, len, sum, NULL, err_ptr);
258
259 if (len)
260 *err_ptr = -EFAULT;
261
262 return -1; /* invalid checksum */
263}
264#endif
diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h
new file mode 100644
index 000000000000..a91b96dc0efe
--- /dev/null
+++ b/include/asm-xtensa/coprocessor.h
@@ -0,0 +1,70 @@
1/*
2 * include/asm-xtensa/cpextra.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_COPROCESSOR_H
12#define _XTENSA_COPROCESSOR_H
13
14#include <xtensa/config/core.h>
15
16#define XTOFS(last_start,last_size,align) \
17 ((last_start+last_size+align-1) & -align)
18
19#define XTENSA_CP_EXTRA_OFFSET 0
20#define XTENSA_CP_EXTRA_ALIGN XCHAL_EXTRA_SA_ALIGN
21
22#define XTENSA_CPE_CP0_OFFSET \
23 XTOFS(XTENSA_CP_EXTRA_OFFSET, XCHAL_EXTRA_SA_SIZE, XCHAL_CP0_SA_ALIGN)
24#define XTENSA_CPE_CP1_OFFSET \
25 XTOFS(XTENSA_CPE_CP0_OFFSET, XCHAL_CP0_SA_SIZE, XCHAL_CP1_SA_ALIGN)
26#define XTENSA_CPE_CP2_OFFSET \
27 XTOFS(XTENSA_CPE_CP1_OFFSET, XCHAL_CP1_SA_SIZE, XCHAL_CP2_SA_ALIGN)
28#define XTENSA_CPE_CP3_OFFSET \
29 XTOFS(XTENSA_CPE_CP2_OFFSET, XCHAL_CP2_SA_SIZE, XCHAL_CP3_SA_ALIGN)
30#define XTENSA_CPE_CP4_OFFSET \
31 XTOFS(XTENSA_CPE_CP3_OFFSET, XCHAL_CP3_SA_SIZE, XCHAL_CP4_SA_ALIGN)
32#define XTENSA_CPE_CP5_OFFSET \
33 XTOFS(XTENSA_CPE_CP4_OFFSET, XCHAL_CP4_SA_SIZE, XCHAL_CP5_SA_ALIGN)
34#define XTENSA_CPE_CP6_OFFSET \
35 XTOFS(XTENSA_CPE_CP5_OFFSET, XCHAL_CP5_SA_SIZE, XCHAL_CP6_SA_ALIGN)
36#define XTENSA_CPE_CP7_OFFSET \
37 XTOFS(XTENSA_CPE_CP6_OFFSET, XCHAL_CP6_SA_SIZE, XCHAL_CP7_SA_ALIGN)
38#define XTENSA_CP_EXTRA_SIZE \
39 XTOFS(XTENSA_CPE_CP7_OFFSET, XCHAL_CP7_SA_SIZE, 16)
40
41#if XCHAL_CP_NUM > 0
42# ifndef __ASSEMBLY__
43/*
44 * Tasks that own contents of (last user) each coprocessor.
45 * Entries are 0 for not-owned or non-existent coprocessors.
46 * Note: The size of this structure is fixed to 8 bytes in entry.S
47 */
48typedef struct {
49 struct task_struct *owner; /* owner */
50 int offset; /* offset in cpextra space. */
51} coprocessor_info_t;
52# else
53# define COPROCESSOR_INFO_OWNER 0
54# define COPROCESSOR_INFO_OFFSET 4
55# define COPROCESSOR_INFO_SIZE 8
56# endif
57#endif
58
59
60#ifndef __ASSEMBLY__
61# if XCHAL_CP_NUM > 0
62struct task_struct;
63extern void release_coprocessors (struct task_struct*);
64extern void save_coprocessor_registers(void*, int);
65# else
66# define release_coprocessors(task)
67# endif
68#endif
69
70#endif /* _XTENSA_COPROCESSOR_H */
diff --git a/include/asm-xtensa/cpumask.h b/include/asm-xtensa/cpumask.h
new file mode 100644
index 000000000000..ebeede397db3
--- /dev/null
+++ b/include/asm-xtensa/cpumask.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/cpumask.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CPUMASK_H
12#define _XTENSA_CPUMASK_H
13
14#include <asm-generic/cpumask.h>
15
16#endif /* _XTENSA_CPUMASK_H */
diff --git a/include/asm-xtensa/cputime.h b/include/asm-xtensa/cputime.h
new file mode 100644
index 000000000000..a7fb864a50ae
--- /dev/null
+++ b/include/asm-xtensa/cputime.h
@@ -0,0 +1,6 @@
1#ifndef _XTENSA_CPUTIME_H
2#define _XTENSA_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* _XTENSA_CPUTIME_H */
diff --git a/include/asm-xtensa/current.h b/include/asm-xtensa/current.h
new file mode 100644
index 000000000000..8d1eb5d78649
--- /dev/null
+++ b/include/asm-xtensa/current.h
@@ -0,0 +1,38 @@
1/*
2 * include/asm-xtensa/current.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_CURRENT_H
12#define _XTENSA_CURRENT_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/thread_info.h>
17
18struct task_struct;
19
20static inline struct task_struct *get_current(void)
21{
22 return current_thread_info()->task;
23}
24
25#define current get_current()
26
27#else
28
29#define CURRENT_SHIFT 13
30
31#define GET_CURRENT(reg,sp) \
32 GET_THREAD_INFO(reg,sp); \
33 l32i reg, reg, TI_TASK \
34
35#endif
36
37
38#endif /* XTENSA_CURRENT_H */
diff --git a/include/asm-xtensa/delay.h b/include/asm-xtensa/delay.h
new file mode 100644
index 000000000000..6359c55e77a8
--- /dev/null
+++ b/include/asm-xtensa/delay.h
@@ -0,0 +1,50 @@
1/*
2 * include/asm-xtensa/delay.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 *
10 */
11
12#ifndef _XTENSA_DELAY_H
13#define _XTENSA_DELAY_H
14
15#include <linux/config.h>
16#include <asm/processor.h>
17#include <asm/param.h>
18
19extern unsigned long loops_per_jiffy;
20
21extern __inline__ void __delay(unsigned long loops)
22{
23 /* 2 cycles per loop. */
24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 1, 1b"
25 : "=r" (loops) : "0" (loops));
26}
27
28static __inline__ u32 xtensa_get_ccount(void)
29{
30 u32 ccount;
31 asm volatile ("rsr %0, 234; # CCOUNT\n" : "=r" (ccount));
32 return ccount;
33}
34
35/* For SMP/NUMA systems, change boot_cpu_data to something like
36 * local_cpu_data->... where local_cpu_data points to the current
37 * cpu. */
38
39static __inline__ void udelay (unsigned long usecs)
40{
41 unsigned long start = xtensa_get_ccount();
42 unsigned long cycles = usecs * (loops_per_jiffy / (1000000UL / HZ));
43
44 /* Note: all variables are unsigned (can wrap around)! */
45 while (((unsigned long)xtensa_get_ccount()) - start < cycles)
46 ;
47}
48
49#endif
50
diff --git a/include/asm-xtensa/div64.h b/include/asm-xtensa/div64.h
new file mode 100644
index 000000000000..c4a105776383
--- /dev/null
+++ b/include/asm-xtensa/div64.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-xtensa/div64.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_DIV64_H
12#define _XTENSA_DIV64_H
13
14#define do_div(n,base) ({ \
15 int __res = n % ((unsigned int) base); \
16 n /= (unsigned int) base; \
17 __res; })
18
19#endif
diff --git a/include/asm-xtensa/dma-mapping.h b/include/asm-xtensa/dma-mapping.h
new file mode 100644
index 000000000000..e86a206f1209
--- /dev/null
+++ b/include/asm-xtensa/dma-mapping.h
@@ -0,0 +1,182 @@
1/*
2 * include/asm-xtensa/dma_mapping.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_DMA_MAPPING_H
12#define _XTENSA_DMA_MAPPING_H
13
14#include <asm/scatterlist.h>
15#include <asm/cache.h>
16#include <asm/io.h>
17#include <linux/mm.h>
18
19/*
20 * DMA-consistent mapping functions.
21 */
22
23extern void *consistent_alloc(int, size_t, dma_addr_t, unsigned long);
24extern void consistent_free(void*, size_t, dma_addr_t);
25extern void consistent_sync(void*, size_t, int);
26
27#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
28#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
29
30void *dma_alloc_coherent(struct device *dev, size_t size,
31 dma_addr_t *dma_handle, int flag);
32
33void dma_free_coherent(struct device *dev, size_t size,
34 void *vaddr, dma_addr_t dma_handle);
35
36static inline dma_addr_t
37dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction)
39{
40 BUG_ON(direction == DMA_NONE);
41 consistent_sync(ptr, size, direction);
42 return virt_to_phys(ptr);
43}
44
45static inline void
46dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
47 enum dma_data_direction direction)
48{
49 BUG_ON(direction == DMA_NONE);
50}
51
52static inline int
53dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
54 enum dma_data_direction direction)
55{
56 int i;
57
58 BUG_ON(direction == DMA_NONE);
59
60 for (i = 0; i < nents; i++, sg++ ) {
61 BUG_ON(!sg->page);
62
63 sg->dma_address = page_to_phys(sg->page) + sg->offset;
64 consistent_sync(page_address(sg->page) + sg->offset,
65 sg->length, direction);
66 }
67
68 return nents;
69}
70
71static inline dma_addr_t
72dma_map_page(struct device *dev, struct page *page, unsigned long offset,
73 size_t size, enum dma_data_direction direction)
74{
75 BUG_ON(direction == DMA_NONE);
76 return (dma_addr_t)(page_to_pfn(page)) * PAGE_SIZE + offset;
77}
78
79static inline void
80dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
81 enum dma_data_direction direction)
82{
83 BUG_ON(direction == DMA_NONE);
84}
85
86
87static inline void
88dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
89 enum dma_data_direction direction)
90{
91 BUG_ON(direction == DMA_NONE);
92}
93
94static inline void
95dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
96 enum dma_data_direction direction)
97{
98 consistent_sync((void *)bus_to_virt(dma_handle), size, direction);
99}
100
101static inline void
102dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
103 enum dma_data_direction direction)
104{
105 consistent_sync((void *)bus_to_virt(dma_handle), size, direction);
106}
107
108static inline void
109dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
110 unsigned long offset, size_t size,
111 enum dma_data_direction direction)
112{
113
114 consistent_sync((void *)bus_to_virt(dma_handle)+offset,size,direction);
115}
116
117static inline void
118dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
119 unsigned long offset, size_t size,
120 enum dma_data_direction direction)
121{
122
123 consistent_sync((void *)bus_to_virt(dma_handle)+offset,size,direction);
124}
125static inline void
126dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
127 enum dma_data_direction dir)
128{
129 int i;
130 for (i = 0; i < nelems; i++, sg++)
131 consistent_sync(page_address(sg->page) + sg->offset,
132 sg->length, dir);
133}
134
135static inline void
136dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
137 enum dma_data_direction dir)
138{
139 int i;
140 for (i = 0; i < nelems; i++, sg++)
141 consistent_sync(page_address(sg->page) + sg->offset,
142 sg->length, dir);
143}
144static inline int
145dma_mapping_error(dma_addr_t dma_addr)
146{
147 return 0;
148}
149
150static inline int
151dma_supported(struct device *dev, u64 mask)
152{
153 return 1;
154}
155
156static inline int
157dma_set_mask(struct device *dev, u64 mask)
158{
159 if(!dev->dma_mask || !dma_supported(dev, mask))
160 return -EIO;
161
162 *dev->dma_mask = mask;
163
164 return 0;
165}
166
167static inline int
168dma_get_cache_alignment(void)
169{
170 return L1_CACHE_BYTES;
171}
172
173#define dma_is_consistent(d) (1)
174
175static inline void
176dma_cache_sync(void *vaddr, size_t size,
177 enum dma_data_direction direction)
178{
179 consistent_sync(vaddr, size, direction);
180}
181
182#endif /* _XTENSA_DMA_MAPPING_H */
diff --git a/include/asm-xtensa/dma.h b/include/asm-xtensa/dma.h
new file mode 100644
index 000000000000..1c22b0234586
--- /dev/null
+++ b/include/asm-xtensa/dma.h
@@ -0,0 +1,61 @@
1/*
2 * include/asm-xtensa/dma.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_DMA_H
12#define _XTENSA_DMA_H
13
14#include <linux/config.h>
15#include <asm/io.h> /* need byte IO */
16#include <xtensa/config/core.h>
17
18/*
19 * This is only to be defined if we have PC-like DMA.
20 * By default this is not true on an Xtensa processor,
21 * however on boards with a PCI bus, such functionality
22 * might be emulated externally.
23 *
24 * NOTE: there still exists driver code that assumes
25 * this is defined, eg. drivers/sound/soundcard.c (as of 2.4).
26 */
27#define MAX_DMA_CHANNELS 8
28
29/*
30 * The maximum virtual address to which DMA transfers
31 * can be performed on this platform.
32 *
33 * NOTE: This is board (platform) specific, not processor-specific!
34 *
35 * NOTE: This assumes DMA transfers can only be performed on
36 * the section of physical memory contiguously mapped in virtual
37 * space for the kernel. For the Xtensa architecture, this
38 * means the maximum possible size of this DMA area is
39 * the size of the statically mapped kernel segment
40 * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB.
41 *
42 * NOTE: When the entire KSEG area is DMA capable, we substract
43 * one from the max address so that the virt_to_phys() macro
44 * works correctly on the address (otherwise the address
45 * enters another area, and virt_to_phys() may not return
46 * the value desired).
47 */
48#define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KSEG_CACHED_SIZE - 1)
49
50/* Reserve and release a DMA channel */
51extern int request_dma(unsigned int dmanr, const char * device_id);
52extern void free_dma(unsigned int dmanr);
53
54#ifdef CONFIG_PCI
55extern int isa_dma_bridge_buggy;
56#else
57#define isa_dma_bridge_buggy (0)
58#endif
59
60
61#endif
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
new file mode 100644
index 000000000000..64f1f53874fe
--- /dev/null
+++ b/include/asm-xtensa/elf.h
@@ -0,0 +1,222 @@
1/*
2 * include/asm-xtensa/elf.h
3 *
4 * ELF register definitions
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_ELF_H
14#define _XTENSA_ELF_H
15
16#include <asm/ptrace.h>
17#include <asm/coprocessor.h>
18#include <xtensa/config/core.h>
19
20/* Xtensa processor ELF architecture-magic number */
21
22#define EM_XTENSA 94
23#define EM_XTENSA_OLD 0xABC7
24
25/* ELF register definitions. This is needed for core dump support. */
26
27/*
28 * elf_gregset_t contains the application-level state in the following order:
29 * Processor info: config_version, cpuxy
30 * Processor state: pc, ps, exccause, excvaddr, wb, ws,
31 * lbeg, lend, lcount, sar
32 * GP regs: ar0 - arXX
33 */
34
35typedef unsigned long elf_greg_t;
36
37typedef struct {
38 elf_greg_t xchal_config_id0;
39 elf_greg_t xchal_config_id1;
40 elf_greg_t cpux;
41 elf_greg_t cpuy;
42 elf_greg_t pc;
43 elf_greg_t ps;
44 elf_greg_t exccause;
45 elf_greg_t excvaddr;
46 elf_greg_t windowbase;
47 elf_greg_t windowstart;
48 elf_greg_t lbeg;
49 elf_greg_t lend;
50 elf_greg_t lcount;
51 elf_greg_t sar;
52 elf_greg_t syscall;
53 elf_greg_t ar[XCHAL_NUM_AREGS];
54} xtensa_gregset_t;
55
56#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
57
58typedef elf_greg_t elf_gregset_t[ELF_NGREG];
59
60/*
61 * Compute the size of the coprocessor and extra state layout (register info)
62 * table (in bytes).
63 * This is actually the maximum size of the table, as opposed to the size,
64 * which is available from the _xtensa_reginfo_table_size global variable.
65 *
66 * (See also arch/xtensa/kernel/coprocessor.S)
67 *
68 */
69
70#ifndef XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM
71# define XTENSA_CPE_LTABLE_SIZE 0
72#else
73# define XTENSA_CPE_SEGMENT(num) (num ? (1+num) : 0)
74# define XTENSA_CPE_LTABLE_ENTRIES \
75 ( XTENSA_CPE_SEGMENT(XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM) \
76 + XTENSA_CPE_SEGMENT(XCHAL_CP0_SA_CONTENTS_LIBDB_NUM) \
77 + XTENSA_CPE_SEGMENT(XCHAL_CP1_SA_CONTENTS_LIBDB_NUM) \
78 + XTENSA_CPE_SEGMENT(XCHAL_CP2_SA_CONTENTS_LIBDB_NUM) \
79 + XTENSA_CPE_SEGMENT(XCHAL_CP3_SA_CONTENTS_LIBDB_NUM) \
80 + XTENSA_CPE_SEGMENT(XCHAL_CP4_SA_CONTENTS_LIBDB_NUM) \
81 + XTENSA_CPE_SEGMENT(XCHAL_CP5_SA_CONTENTS_LIBDB_NUM) \
82 + XTENSA_CPE_SEGMENT(XCHAL_CP6_SA_CONTENTS_LIBDB_NUM) \
83 + XTENSA_CPE_SEGMENT(XCHAL_CP7_SA_CONTENTS_LIBDB_NUM) \
84 + 1 /* final entry */ \
85 )
86# define XTENSA_CPE_LTABLE_SIZE (XTENSA_CPE_LTABLE_ENTRIES * 8)
87#endif
88
89
90/*
91 * Instantiations of the elf_fpregset_t type contain, in most
92 * architectures, the floating point (FPU) register set.
93 * For Xtensa, this type is extended to contain all custom state,
94 * ie. coprocessor and "extra" (non-coprocessor) state (including,
95 * for example, TIE-defined states and register files; as well
96 * as other optional processor state).
97 * This includes FPU state if a floating-point coprocessor happens
98 * to have been configured within the Xtensa processor.
99 *
100 * TOTAL_FPREGS_SIZE is the required size (without rounding)
101 * of elf_fpregset_t. It provides space for the following:
102 *
103 * a) 32-bit mask of active coprocessors for this task (similar
104 * to CPENABLE in single-threaded Xtensa processor systems)
105 *
106 * b) table describing the layout of custom states (ie. of
107 * individual registers, etc) within the save areas
108 *
109 * c) save areas for each coprocessor and for non-coprocessor
110 * ("extra") state
111 *
112 * Note that save areas may require up to 16-byte alignment when
113 * accessed by save/restore sequences. We do not need to ensure
114 * such alignment in an elf_fpregset_t structure because custom
115 * state is not directly loaded/stored into it; rather, save area
116 * contents are copied to elf_fpregset_t from the active save areas
117 * (see 'struct task_struct' definition in processor.h for that)
118 * using memcpy(). But we do allow space for such alignment,
119 * to allow optimizations of layout and copying.
120 */
121
122#define TOTAL_FPREGS_SIZE \
123 (4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE)
124#define ELF_NFPREG \
125 ((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t))
126
127typedef unsigned int elf_fpreg_t;
128typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
129
130#define ELF_CORE_COPY_REGS(_eregs, _pregs) \
131 xtensa_elf_core_copy_regs (&_eregs, _pregs);
132
133extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
134
135/*
136 * This is used to ensure we don't load something for the wrong architecture.
137 */
138
139#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \
140 ( (x)->e_machine == EM_XTENSA_OLD ) )
141
142/*
143 * These are used to set parameters in the core dumps.
144 */
145
146#ifdef __XTENSA_EL__
147# define ELF_DATA ELFDATA2LSB
148#elif defined(__XTENSA_EB__)
149# define ELF_DATA ELFDATA2MSB
150#else
151# error processor byte order undefined!
152#endif
153
154#define ELF_CLASS ELFCLASS32
155#define ELF_ARCH EM_XTENSA
156
157#define USE_ELF_CORE_DUMP
158#define ELF_EXEC_PAGESIZE PAGE_SIZE
159
160/*
161 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
162 * use of this is to invoke "./ld.so someprog" to test out a new version of
163 * the loader. We need to make sure that it is out of the way of the program
164 * that it will "exec", and that there is sufficient room for the brk.
165 */
166
167#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
168
169/*
170 * This yields a mask that user programs can use to figure out what
171 * instruction set this CPU supports. This could be done in user space,
172 * but it's not easy, and we've already done it here.
173 */
174
175#define ELF_HWCAP (0)
176
177/*
178 * This yields a string that ld.so will use to load implementation
179 * specific libraries for optimization. This is more specific in
180 * intent than poking at uname or /proc/cpuinfo.
181 * For the moment, we have only optimizations for the Intel generations,
182 * but that could change...
183 */
184
185#define ELF_PLATFORM (NULL)
186
187/*
188 * The Xtensa processor ABI says that when the program starts, a2
189 * contains a pointer to a function which might be registered using
190 * `atexit'. This provides a mean for the dynamic linker to call
191 * DT_FINI functions for shared libraries that have been loaded before
192 * the code runs.
193 *
194 * A value of 0 tells we have no such handler.
195 *
196 * We might as well make sure everything else is cleared too (except
197 * for the stack pointer in a1), just to make things more
198 * deterministic. Also, clearing a0 terminates debugger backtraces.
199 */
200
201#define ELF_PLAT_INIT(_r, load_addr) \
202 do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
203 _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
204 _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
205 _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
206 } while (0)
207
208#ifdef __KERNEL__
209
210#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
211
212extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
213 struct task_struct*);
214extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
215 struct task_struct*);
216extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
217 struct task_struct*);
218extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
219 struct task_struct*);
220
221#endif /* __KERNEL__ */
222#endif /* _XTENSA_ELF_H */
diff --git a/include/asm-xtensa/errno.h b/include/asm-xtensa/errno.h
new file mode 100644
index 000000000000..ced5194d2750
--- /dev/null
+++ b/include/asm-xtensa/errno.h
@@ -0,0 +1,142 @@
1/*
2 * include/asm-xtensa/errno.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_ERRNO_H
12#define _XTENSA_ERRNO_H
13
14#define EPERM 1 /* Operation not permitted */
15#define ENOENT 2 /* No such file or directory */
16#define ESRCH 3 /* No such process */
17#define EINTR 4 /* Interrupted system call */
18#define EIO 5 /* I/O error */
19#define ENXIO 6 /* No such device or address */
20#define E2BIG 7 /* Arg list too long */
21#define ENOEXEC 8 /* Exec format error */
22#define EBADF 9 /* Bad file number */
23#define ECHILD 10 /* No child processes */
24#define EAGAIN 11 /* Try again */
25#define ENOMEM 12 /* Out of memory */
26#define EACCES 13 /* Permission denied */
27#define EFAULT 14 /* Bad address */
28#define ENOTBLK 15 /* Block device required */
29#define EBUSY 16 /* Device or resource busy */
30#define EEXIST 17 /* File exists */
31#define EXDEV 18 /* Cross-device link */
32#define ENODEV 19 /* No such device */
33#define ENOTDIR 20 /* Not a directory */
34#define EISDIR 21 /* Is a directory */
35#define EINVAL 22 /* Invalid argument */
36#define ENFILE 23 /* File table overflow */
37#define EMFILE 24 /* Too many open files */
38#define ENOTTY 25 /* Not a typewriter */
39#define ETXTBSY 26 /* Text file busy */
40#define EFBIG 27 /* File too large */
41#define ENOSPC 28 /* No space left on device */
42#define ESPIPE 29 /* Illegal seek */
43#define EROFS 30 /* Read-only file system */
44#define EMLINK 31 /* Too many links */
45#define EPIPE 32 /* Broken pipe */
46#define EDOM 33 /* Math argument out of domain of func */
47#define ERANGE 34 /* Math result not representable */
48#define EDEADLK 35 /* Resource deadlock would occur */
49#define ENAMETOOLONG 36 /* File name too long */
50#define ENOLCK 37 /* No record locks available */
51#define ENOSYS 38 /* Function not implemented */
52#define ENOTEMPTY 39 /* Directory not empty */
53#define ELOOP 40 /* Too many symbolic links encountered */
54#define EWOULDBLOCK EAGAIN /* Operation would block */
55#define ENOMSG 42 /* No message of desired type */
56#define EIDRM 43 /* Identifier removed */
57#define ECHRNG 44 /* Channel number out of range */
58#define EL2NSYNC 45 /* Level 2 not synchronized */
59#define EL3HLT 46 /* Level 3 halted */
60#define EL3RST 47 /* Level 3 reset */
61#define ELNRNG 48 /* Link number out of range */
62#define EUNATCH 49 /* Protocol driver not attached */
63#define ENOCSI 50 /* No CSI structure available */
64#define EL2HLT 51 /* Level 2 halted */
65#define EBADE 52 /* Invalid exchange */
66#define EBADR 53 /* Invalid request descriptor */
67#define EXFULL 54 /* Exchange full */
68#define ENOANO 55 /* No anode */
69#define EBADRQC 56 /* Invalid request code */
70#define EBADSLT 57 /* Invalid slot */
71
72#define EDEADLOCK EDEADLK
73
74#define EBFONT 59 /* Bad font file format */
75#define ENOSTR 60 /* Device not a stream */
76#define ENODATA 61 /* No data available */
77#define ETIME 62 /* Timer expired */
78#define ENOSR 63 /* Out of streams resources */
79#define ENONET 64 /* Machine is not on the network */
80#define ENOPKG 65 /* Package not installed */
81#define EREMOTE 66 /* Object is remote */
82#define ENOLINK 67 /* Link has been severed */
83#define EADV 68 /* Advertise error */
84#define ESRMNT 69 /* Srmount error */
85#define ECOMM 70 /* Communication error on send */
86#define EPROTO 71 /* Protocol error */
87#define EMULTIHOP 72 /* Multihop attempted */
88#define EDOTDOT 73 /* RFS specific error */
89#define EBADMSG 74 /* Not a data message */
90#define EOVERFLOW 75 /* Value too large for defined data type */
91#define ENOTUNIQ 76 /* Name not unique on network */
92#define EBADFD 77 /* File descriptor in bad state */
93#define EREMCHG 78 /* Remote address changed */
94#define ELIBACC 79 /* Can not access a needed shared library */
95#define ELIBBAD 80 /* Accessing a corrupted shared library */
96#define ELIBSCN 81 /* .lib section in a.out corrupted */
97#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
98#define ELIBEXEC 83 /* Cannot exec a shared library directly */
99#define EILSEQ 84 /* Illegal byte sequence */
100#define ERESTART 85 /* Interrupted system call should be restarted */
101#define ESTRPIPE 86 /* Streams pipe error */
102#define EUSERS 87 /* Too many users */
103#define ENOTSOCK 88 /* Socket operation on non-socket */
104#define EDESTADDRREQ 89 /* Destination address required */
105#define EMSGSIZE 90 /* Message too long */
106#define EPROTOTYPE 91 /* Protocol wrong type for socket */
107#define ENOPROTOOPT 92 /* Protocol not available */
108#define EPROTONOSUPPORT 93 /* Protocol not supported */
109#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
110#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
111#define EPFNOSUPPORT 96 /* Protocol family not supported */
112#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
113#define EADDRINUSE 98 /* Address already in use */
114#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
115#define ENETDOWN 100 /* Network is down */
116#define ENETUNREACH 101 /* Network is unreachable */
117#define ENETRESET 102 /* Network dropped connection because of reset */
118#define ECONNABORTED 103 /* Software caused connection abort */
119#define ECONNRESET 104 /* Connection reset by peer */
120#define ENOBUFS 105 /* No buffer space available */
121#define EISCONN 106 /* Transport endpoint is already connected */
122#define ENOTCONN 107 /* Transport endpoint is not connected */
123#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
124#define ETOOMANYREFS 109 /* Too many references: cannot splice */
125#define ETIMEDOUT 110 /* Connection timed out */
126#define ECONNREFUSED 111 /* Connection refused */
127#define EHOSTDOWN 112 /* Host is down */
128#define EHOSTUNREACH 113 /* No route to host */
129#define EALREADY 114 /* Operation already in progress */
130#define EINPROGRESS 115 /* Operation now in progress */
131#define ESTALE 116 /* Stale NFS file handle */
132#define EUCLEAN 117 /* Structure needs cleaning */
133#define ENOTNAM 118 /* Not a XENIX named type file */
134#define ENAVAIL 119 /* No XENIX semaphores available */
135#define EISNAM 120 /* Is a named type file */
136#define EREMOTEIO 121 /* Remote I/O error */
137#define EDQUOT 122 /* Quota exceeded */
138
139#define ENOMEDIUM 123 /* No medium found */
140#define EMEDIUMTYPE 124 /* Wrong medium type */
141
142#endif /* _XTENSA_ERRNO_H */
diff --git a/include/asm-xtensa/fcntl.h b/include/asm-xtensa/fcntl.h
new file mode 100644
index 000000000000..48876bb727d2
--- /dev/null
+++ b/include/asm-xtensa/fcntl.h
@@ -0,0 +1,101 @@
1/*
2 * include/asm-xtensa/fcntl.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
10 */
11
12#ifndef _XTENSA_FCNTL_H
13#define _XTENSA_FCNTL_H
14
15/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
16 located on an ext2 file system */
17#define O_ACCMODE 0x0003
18#define O_RDONLY 0x0000
19#define O_WRONLY 0x0001
20#define O_RDWR 0x0002
21#define O_APPEND 0x0008
22#define O_SYNC 0x0010
23#define O_NONBLOCK 0x0080
24#define O_CREAT 0x0100 /* not fcntl */
25#define O_TRUNC 0x0200 /* not fcntl */
26#define O_EXCL 0x0400 /* not fcntl */
27#define O_NOCTTY 0x0800 /* not fcntl */
28#define FASYNC 0x1000 /* fcntl, for BSD compatibility */
29#define O_LARGEFILE 0x2000 /* allow large file opens - currently ignored */
30#define O_DIRECT 0x8000 /* direct disk access hint - currently ignored*/
31#define O_DIRECTORY 0x10000 /* must be a directory */
32#define O_NOFOLLOW 0x20000 /* don't follow links */
33#define O_NOATIME 0x100000
34
35#define O_NDELAY O_NONBLOCK
36
37#define F_DUPFD 0 /* dup */
38#define F_GETFD 1 /* get close_on_exec */
39#define F_SETFD 2 /* set/clear close_on_exec */
40#define F_GETFL 3 /* get file->f_flags */
41#define F_SETFL 4 /* set file->f_flags */
42#define F_GETLK 14
43#define F_GETLK64 15
44#define F_SETLK 6
45#define F_SETLKW 7
46#define F_SETLK64 16
47#define F_SETLKW64 17
48
49#define F_SETOWN 24 /* for sockets. */
50#define F_GETOWN 23 /* for sockets. */
51#define F_SETSIG 10 /* for sockets. */
52#define F_GETSIG 11 /* for sockets. */
53
54/* for F_[GET|SET]FL */
55#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
56
57/* for posix fcntl() and lockf() */
58#define F_RDLCK 0
59#define F_WRLCK 1
60#define F_UNLCK 2
61
62/* for old implementation of bsd flock () */
63#define F_EXLCK 4 /* or 3 */
64#define F_SHLCK 8 /* or 4 */
65
66/* for leases */
67#define F_INPROGRESS 16
68
69/* operations for bsd flock(), also used by the kernel implementation */
70#define LOCK_SH 1 /* shared lock */
71#define LOCK_EX 2 /* exclusive lock */
72#define LOCK_NB 4 /* or'd with one of the above to prevent
73 blocking */
74#define LOCK_UN 8 /* remove lock */
75
76#define LOCK_MAND 32 /* This is a mandatory flock ... */
77#define LOCK_READ 64 /* which allows concurrent read operations */
78#define LOCK_WRITE 128 /* which allows concurrent write operations */
79#define LOCK_RW 192 /* which allows concurrent read & write ops */
80
81typedef struct flock {
82 short l_type;
83 short l_whence;
84 __kernel_off_t l_start;
85 __kernel_off_t l_len;
86 long l_sysid;
87 __kernel_pid_t l_pid;
88 long pad[4];
89} flock_t;
90
91struct flock64 {
92 short l_type;
93 short l_whence;
94 __kernel_off_t l_start;
95 __kernel_off_t l_len;
96 pid_t l_pid;
97};
98
99#define F_LINUX_SPECIFIC_BASE 1024
100
101#endif /* _XTENSA_FCNTL_H */
diff --git a/include/asm-xtensa/fixmap.h b/include/asm-xtensa/fixmap.h
new file mode 100644
index 000000000000..4423b8ad4954
--- /dev/null
+++ b/include/asm-xtensa/fixmap.h
@@ -0,0 +1,252 @@
1/*
2 * include/asm-xtensa/fixmap.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_FIXMAP_H
12#define _XTENSA_FIXMAP_H
13
14#include <asm/processor.h>
15
16#ifdef CONFIG_MMU
17
18/*
19 * Here we define all the compile-time virtual addresses.
20 */
21
22#if XCHAL_SEG_MAPPABLE_VADDR != 0
23# error "Current port requires virtual user space starting at 0"
24#endif
25#if XCHAL_SEG_MAPPABLE_SIZE < 0x80000000
26# error "Current port requires at least 0x8000000 bytes for user space"
27#endif
28
29/* Verify instruction/data ram/rom and xlmi don't overlay vmalloc space. */
30
31#define __IN_VMALLOC(addr) \
32 (((addr) >= VMALLOC_START) && ((addr) < VMALLOC_END))
33#define __SPAN_VMALLOC(start,end) \
34 (((start) < VMALLOC_START) && ((end) >= VMALLOC_END))
35#define INSIDE_VMALLOC(start,end) \
36 (__IN_VMALLOC((start)) || __IN_VMALLOC(end) || __SPAN_VMALLOC((start),(end)))
37
38#if XCHAL_NUM_INSTROM
39# if XCHAL_NUM_INSTROM == 1
40# if INSIDE_VMALLOC(XCHAL_INSTROM0_VADDR,XCHAL_INSTROM0_VADDR+XCHAL_INSTROM0_SIZE)
41# error vmalloc range conflicts with instrom0
42# endif
43# endif
44# if XCHAL_NUM_INSTROM == 2
45# if INSIDE_VMALLOC(XCHAL_INSTROM1_VADDR,XCHAL_INSTROM1_VADDR+XCHAL_INSTROM1_SIZE)
46# error vmalloc range conflicts with instrom1
47# endif
48# endif
49#endif
50
51#if XCHAL_NUM_INSTRAM
52# if XCHAL_NUM_INSTRAM == 1
53# if INSIDE_VMALLOC(XCHAL_INSTRAM0_VADDR,XCHAL_INSTRAM0_VADDR+XCHAL_INSTRAM0_SIZE)
54# error vmalloc range conflicts with instram0
55# endif
56# endif
57# if XCHAL_NUM_INSTRAM == 2
58# if INSIDE_VMALLOC(XCHAL_INSTRAM1_VADDR,XCHAL_INSTRAM1_VADDR+XCHAL_INSTRAM1_SIZE)
59# error vmalloc range conflicts with instram1
60# endif
61# endif
62#endif
63
64#if XCHAL_NUM_DATAROM
65# if XCHAL_NUM_DATAROM == 1
66# if INSIDE_VMALLOC(XCHAL_DATAROM0_VADDR,XCHAL_DATAROM0_VADDR+XCHAL_DATAROM0_SIZE)
67# error vmalloc range conflicts with datarom0
68# endif
69# endif
70# if XCHAL_NUM_DATAROM == 2
71# if INSIDE_VMALLOC(XCHAL_DATAROM1_VADDR,XCHAL_DATAROM1_VADDR+XCHAL_DATAROM1_SIZE)
72# error vmalloc range conflicts with datarom1
73# endif
74# endif
75#endif
76
77#if XCHAL_NUM_DATARAM
78# if XCHAL_NUM_DATARAM == 1
79# if INSIDE_VMALLOC(XCHAL_DATARAM0_VADDR,XCHAL_DATARAM0_VADDR+XCHAL_DATARAM0_SIZE)
80# error vmalloc range conflicts with dataram0
81# endif
82# endif
83# if XCHAL_NUM_DATARAM == 2
84# if INSIDE_VMALLOC(XCHAL_DATARAM1_VADDR,XCHAL_DATARAM1_VADDR+XCHAL_DATARAM1_SIZE)
85# error vmalloc range conflicts with dataram1
86# endif
87# endif
88#endif
89
90#if XCHAL_NUM_XLMI
91# if XCHAL_NUM_XLMI == 1
92# if INSIDE_VMALLOC(XCHAL_XLMI0_VADDR,XCHAL_XLMI0_VADDR+XCHAL_XLMI0_SIZE)
93# error vmalloc range conflicts with xlmi0
94# endif
95# endif
96# if XCHAL_NUM_XLMI == 2
97# if INSIDE_VMALLOC(XCHAL_XLMI1_VADDR,XCHAL_XLMI1_VADDR+XCHAL_XLMI1_SIZE)
98# error vmalloc range conflicts with xlmi1
99# endif
100# endif
101#endif
102
103#if (XCHAL_NUM_INSTROM > 2) || \
104 (XCHAL_NUM_INSTRAM > 2) || \
105 (XCHAL_NUM_DATARAM > 2) || \
106 (XCHAL_NUM_DATAROM > 2) || \
107 (XCHAL_NUM_XLMI > 2)
108# error Insufficient checks on vmalloc above for more than 2 devices
109#endif
110
111/*
112 * USER_VM_SIZE does not necessarily equal TASK_SIZE. We bumped
113 * TASK_SIZE down to 0x4000000 to simplify the handling of windowed
114 * call instructions (currently limited to a range of 1 GByte). User
115 * tasks may very well reclaim the VM space from 0x40000000 to
116 * 0x7fffffff in the future, so we do not want the kernel becoming
117 * accustomed to having any of its stuff (e.g., page tables) in this
118 * region. This VM region is no-man's land for now.
119 */
120
121#define USER_VM_START XCHAL_SEG_MAPPABLE_VADDR
122#define USER_VM_SIZE 0x80000000
123
124/* Size of page table: */
125
126#define PGTABLE_SIZE_BITS (32 - XCHAL_MMU_MIN_PTE_PAGE_SIZE + 2)
127#define PGTABLE_SIZE (1L << PGTABLE_SIZE_BITS)
128
129/* All kernel-mappable space: */
130
131#define KERNEL_ALLMAP_START (USER_VM_START + USER_VM_SIZE)
132#define KERNEL_ALLMAP_SIZE (XCHAL_SEG_MAPPABLE_SIZE - KERNEL_ALLMAP_START)
133
134/* Carve out page table at start of kernel-mappable area: */
135
136#if KERNEL_ALLMAP_SIZE < PGTABLE_SIZE
137#error "Gimme some space for page table!"
138#endif
139#define PGTABLE_START KERNEL_ALLMAP_START
140
141/* Remaining kernel-mappable space: */
142
143#define KERNEL_MAPPED_START (KERNEL_ALLMAP_START + PGTABLE_SIZE)
144#define KERNEL_MAPPED_SIZE (KERNEL_ALLMAP_SIZE - PGTABLE_SIZE)
145
146#if KERNEL_MAPPED_SIZE < 0x01000000 /* 16 MB is arbitrary for now */
147# error "Shouldn't the kernel have at least *some* mappable space?"
148#endif
149
150#define MAX_LOW_MEMORY XCHAL_KSEG_CACHED_SIZE
151
152#endif
153
154/*
155 * Some constants used elsewhere, but perhaps only in Xtensa header
156 * files, so maybe we can get rid of some and access compile-time HAL
157 * directly...
158 *
159 * Note: We assume that system RAM is located at the very start of the
160 * kernel segments !!
161 */
162#define KERNEL_VM_LOW XCHAL_KSEG_CACHED_VADDR
163#define KERNEL_VM_HIGH XCHAL_KSEG_BYPASS_VADDR
164#define KERNEL_SPACE XCHAL_KSEG_CACHED_VADDR
165
166/*
167 * Returns the physical/virtual addresses of the kernel space
168 * (works with the cached kernel segment only, which is the
169 * one normally used for kernel operation).
170 */
171
172/* PHYSICAL BYPASS CACHED
173 *
174 * bypass vaddr bypass paddr * cached vaddr
175 * cached vaddr cached paddr bypass vaddr *
176 * bypass paddr * bypass vaddr cached vaddr
177 * cached paddr * bypass vaddr cached vaddr
178 * other * * *
179 */
180
181#define PHYSADDR(a) \
182(((unsigned)(a) >= XCHAL_KSEG_BYPASS_VADDR \
183 && (unsigned)(a) < XCHAL_KSEG_BYPASS_VADDR + XCHAL_KSEG_BYPASS_SIZE) ? \
184 (unsigned)(a) - XCHAL_KSEG_BYPASS_VADDR + XCHAL_KSEG_BYPASS_PADDR : \
185 ((unsigned)(a) >= XCHAL_KSEG_CACHED_VADDR \
186 && (unsigned)(a) < XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_CACHED_SIZE) ? \
187 (unsigned)(a) - XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_CACHED_PADDR : \
188 (unsigned)(a))
189
190#define BYPASS_ADDR(a) \
191(((unsigned)(a) >= XCHAL_KSEG_BYPASS_PADDR \
192 && (unsigned)(a) < XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_SIZE) ? \
193 (unsigned)(a) - XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_VADDR : \
194 ((unsigned)(a) >= XCHAL_KSEG_CACHED_PADDR \
195 && (unsigned)(a) < XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_SIZE) ? \
196 (unsigned)(a) - XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_BYPASS_VADDR : \
197 ((unsigned)(a) >= XCHAL_KSEG_CACHED_VADDR \
198 && (unsigned)(a) < XCHAL_KSEG_CACHED_VADDR+XCHAL_KSEG_CACHED_SIZE)? \
199 (unsigned)(a) - XCHAL_KSEG_CACHED_VADDR+XCHAL_KSEG_BYPASS_VADDR: \
200 (unsigned)(a))
201
202#define CACHED_ADDR(a) \
203(((unsigned)(a) >= XCHAL_KSEG_BYPASS_PADDR \
204 && (unsigned)(a) < XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_SIZE) ? \
205 (unsigned)(a) - XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_CACHED_VADDR : \
206 ((unsigned)(a) >= XCHAL_KSEG_CACHED_PADDR \
207 && (unsigned)(a) < XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_SIZE) ? \
208 (unsigned)(a) - XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_VADDR : \
209 ((unsigned)(a) >= XCHAL_KSEG_BYPASS_VADDR \
210 && (unsigned)(a) < XCHAL_KSEG_BYPASS_VADDR+XCHAL_KSEG_BYPASS_SIZE) ? \
211 (unsigned)(a) - XCHAL_KSEG_BYPASS_VADDR+XCHAL_KSEG_CACHED_VADDR : \
212 (unsigned)(a))
213
214#define PHYSADDR_IO(a) \
215(((unsigned)(a) >= XCHAL_KIO_BYPASS_VADDR \
216 && (unsigned)(a) < XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_SIZE) ? \
217 (unsigned)(a) - XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_PADDR : \
218 ((unsigned)(a) >= XCHAL_KIO_CACHED_VADDR \
219 && (unsigned)(a) < XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_SIZE) ? \
220 (unsigned)(a) - XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_PADDR : \
221 (unsigned)(a))
222
223#define BYPASS_ADDR_IO(a) \
224(((unsigned)(a) >= XCHAL_KIO_BYPASS_PADDR \
225 && (unsigned)(a) < XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_SIZE) ? \
226 (unsigned)(a) - XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_VADDR : \
227 ((unsigned)(a) >= XCHAL_KIO_CACHED_PADDR \
228 && (unsigned)(a) < XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_SIZE) ? \
229 (unsigned)(a) - XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_BYPASS_VADDR : \
230 ((unsigned)(a) >= XCHAL_KIO_CACHED_VADDR \
231 && (unsigned)(a) < XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_SIZE) ? \
232 (unsigned)(a) - XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_BYPASS_VADDR : \
233 (unsigned)(a))
234
235#define CACHED_ADDR_IO(a) \
236(((unsigned)(a) >= XCHAL_KIO_BYPASS_PADDR \
237 && (unsigned)(a) < XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_SIZE) ? \
238 (unsigned)(a) - XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_CACHED_VADDR : \
239 ((unsigned)(a) >= XCHAL_KIO_CACHED_PADDR \
240 && (unsigned)(a) < XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_SIZE) ? \
241 (unsigned)(a) - XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_VADDR : \
242 ((unsigned)(a) >= XCHAL_KIO_BYPASS_VADDR \
243 && (unsigned)(a) < XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_SIZE) ? \
244 (unsigned)(a) - XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_CACHED_VADDR : \
245 (unsigned)(a))
246
247#endif /* _XTENSA_ADDRSPACE_H */
248
249
250
251
252
diff --git a/include/asm-xtensa/hardirq.h b/include/asm-xtensa/hardirq.h
new file mode 100644
index 000000000000..e07c76c36b95
--- /dev/null
+++ b/include/asm-xtensa/hardirq.h
@@ -0,0 +1,28 @@
1/*
2 * include/asm-xtensa/hardirq.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_HARDIRQ_H
12#define _XTENSA_HARDIRQ_H
13
14#include <linux/config.h>
15#include <linux/cache.h>
16#include <asm/irq.h>
17
18/* headers.S is sensitive to the offsets of these fields */
19typedef struct {
20 unsigned int __softirq_pending;
21 unsigned int __syscall_count;
22 struct task_struct * __ksoftirqd_task; /* waitqueue is too large */
23 unsigned int __nmi_count; /* arch dependent */
24} ____cacheline_aligned irq_cpustat_t;
25
26#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
27
28#endif /* _XTENSA_HARDIRQ_H */
diff --git a/include/asm-xtensa/hdreg.h b/include/asm-xtensa/hdreg.h
new file mode 100644
index 000000000000..64b80607b80d
--- /dev/null
+++ b/include/asm-xtensa/hdreg.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-xtensa/hdreg.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 - 2005 Tensilica Inc.
9 * Copyright (C) 1994-1996 Linus Torvalds & authors
10 */
11
12#ifndef _XTENSA_HDREG_H
13#define _XTENSA_HDREG_H
14
15typedef unsigned int ide_ioreg_t;
16
17#endif
diff --git a/include/asm-xtensa/highmem.h b/include/asm-xtensa/highmem.h
new file mode 100644
index 000000000000..0a046ca5a687
--- /dev/null
+++ b/include/asm-xtensa/highmem.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-xtensa/highmem.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_HIGHMEM_H
12#define _XTENSA_HIGHMEM_H
13
14extern void flush_cache_kmaps(void);
15
16#endif
17
diff --git a/include/asm-xtensa/hw_irq.h b/include/asm-xtensa/hw_irq.h
new file mode 100644
index 000000000000..ccf436249eaa
--- /dev/null
+++ b/include/asm-xtensa/hw_irq.h
@@ -0,0 +1,18 @@
1/*
2 * include/asm-xtensa/hw_irq.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_HW_IRQ_H
12#define _XTENSA_HW_IRQ_H
13
14static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
15{
16}
17
18#endif
diff --git a/include/asm-xtensa/ide.h b/include/asm-xtensa/ide.h
new file mode 100644
index 000000000000..b523cd4a486e
--- /dev/null
+++ b/include/asm-xtensa/ide.h
@@ -0,0 +1,36 @@
1/*
2 * include/asm-xtensa/ide.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1994 - 1996 Linus Torvalds & authors
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
10 */
11
12#ifndef _XTENSA_IDE_H
13#define _XTENSA_IDE_H
14
15#ifdef __KERNEL__
16
17#include <linux/config.h>
18
19#ifndef MAX_HWIFS
20# define MAX_HWIFS 1
21#endif
22
23static __inline__ int ide_default_irq(unsigned long base)
24{
25 /* Unsupported! */
26 return 0;
27}
28
29static __inline__ unsigned long ide_default_io_base(int index)
30{
31 /* Unsupported! */
32 return 0;
33}
34
35#endif /* __KERNEL__ */
36#endif /* _XTENSA_IDE_H */
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
new file mode 100644
index 000000000000..2c471c42ecfc
--- /dev/null
+++ b/include/asm-xtensa/io.h
@@ -0,0 +1,197 @@
1/*
2 * linux/include/asm-xtensa/io.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_IO_H
12#define _XTENSA_IO_H
13
14#ifdef __KERNEL__
15#include <linux/config.h>
16#include <asm/byteorder.h>
17
18#include <linux/types.h>
19#include <asm/fixmap.h>
20
21#define _IO_BASE 0
22
23
24/*
25 * swap functions to change byte order from little-endian to big-endian and
26 * vice versa.
27 */
28
29static inline unsigned short _swapw (unsigned short v)
30{
31 return (v << 8) | (v >> 8);
32}
33
34static inline unsigned int _swapl (unsigned int v)
35{
36 return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
37}
38
39/*
40 * Change virtual addresses to physical addresses and vv.
41 * These are trivial on the 1:1 Linux/Xtensa mapping
42 */
43
44extern inline unsigned long virt_to_phys(volatile void * address)
45{
46 return PHYSADDR((unsigned long)address);
47}
48
49extern inline void * phys_to_virt(unsigned long address)
50{
51 return (void*) CACHED_ADDR(address);
52}
53
54/*
55 * IO bus memory addresses are also 1:1 with the physical address
56 */
57
58extern inline unsigned long virt_to_bus(volatile void * address)
59{
60 return PHYSADDR((unsigned long)address);
61}
62
63extern inline void * bus_to_virt (unsigned long address)
64{
65 return (void *) CACHED_ADDR(address);
66}
67
68/*
69 * Change "struct page" to physical address.
70 */
71
72extern inline void *ioremap(unsigned long offset, unsigned long size)
73{
74 return (void *) CACHED_ADDR_IO(offset);
75}
76
77extern inline void *ioremap_nocache(unsigned long offset, unsigned long size)
78{
79 return (void *) BYPASS_ADDR_IO(offset);
80}
81
82extern inline void iounmap(void *addr)
83{
84}
85
86/*
87 * Generic I/O
88 */
89
90#define readb(addr) \
91 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
92#define readw(addr) \
93 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
94#define readl(addr) \
95 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
96#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
97#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
98#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
99
100static inline __u8 __raw_readb(const volatile void __iomem *addr)
101{
102 return *(__force volatile __u8 *)(addr);
103}
104static inline __u16 __raw_readw(const volatile void __iomem *addr)
105{
106 return *(__force volatile __u16 *)(addr);
107}
108static inline __u32 __raw_readl(const volatile void __iomem *addr)
109{
110 return *(__force volatile __u32 *)(addr);
111}
112static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
113{
114 *(__force volatile __u8 *)(addr) = b;
115}
116static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
117{
118 *(__force volatile __u16 *)(addr) = b;
119}
120static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
121{
122 *(__force volatile __u32 *)(addr) = b;
123}
124
125
126
127
128/* These are the definitions for the x86 IO instructions
129 * inb/inw/inl/outb/outw/outl, the "string" versions
130 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
131 * inb_p/inw_p/...
132 * The macros don't do byte-swapping.
133 */
134
135#define inb(port) readb((u8 *)((port)+_IO_BASE))
136#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)+_IO_BASE))
137#define inw(port) readw((u16 *)((port)+_IO_BASE))
138#define outw(val, port) writew((val),(u16 *)((unsigned long)(port)+_IO_BASE))
139#define inl(port) readl((u32 *)((port)+_IO_BASE))
140#define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
141
142#define inb_p(port) inb((port))
143#define outb_p(val, port) outb((val), (port))
144#define inw_p(port) inw((port))
145#define outw_p(val, port) outw((val), (port))
146#define inl_p(port) inl((port))
147#define outl_p(val, port) outl((val), (port))
148
149extern void insb (unsigned long port, void *dst, unsigned long count);
150extern void insw (unsigned long port, void *dst, unsigned long count);
151extern void insl (unsigned long port, void *dst, unsigned long count);
152extern void outsb (unsigned long port, const void *src, unsigned long count);
153extern void outsw (unsigned long port, const void *src, unsigned long count);
154extern void outsl (unsigned long port, const void *src, unsigned long count);
155
156#define IO_SPACE_LIMIT ~0
157
158#define memset_io(a,b,c) memset((void *)(a),(b),(c))
159#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
160#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
161
162/* At this point the Xtensa doesn't provide byte swap instructions */
163
164#ifdef __XTENSA_EB__
165# define in_8(addr) (*(u8*)(addr))
166# define in_le16(addr) _swapw(*(u16*)(addr))
167# define in_le32(addr) _swapl(*(u32*)(addr))
168# define out_8(b, addr) *(u8*)(addr) = (b)
169# define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
170# define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
171#elif defined(__XTENSA_EL__)
172# define in_8(addr) (*(u8*)(addr))
173# define in_le16(addr) (*(u16*)(addr))
174# define in_le32(addr) (*(u32*)(addr))
175# define out_8(b, addr) *(u8*)(addr) = (b)
176# define out_le16(b, addr) *(u16*)(addr) = (b)
177# define out_le32(b, addr) *(u32*)(addr) = (b)
178#else
179# error processor byte order undefined!
180#endif
181
182
183/*
184 * * Convert a physical pointer to a virtual kernel pointer for /dev/mem
185 * * access
186 * */
187#define xlate_dev_mem_ptr(p) __va(p)
188
189/*
190 * * Convert a virtual cached pointer to an uncached pointer
191 * */
192#define xlate_dev_kmem_ptr(p) p
193
194
195#endif /* __KERNEL__ */
196
197#endif /* _XTENSA_IO_H */
diff --git a/include/asm-xtensa/ioctl.h b/include/asm-xtensa/ioctl.h
new file mode 100644
index 000000000000..856c605d62b1
--- /dev/null
+++ b/include/asm-xtensa/ioctl.h
@@ -0,0 +1,83 @@
1/*
2 * include/asm-xtensa/ioctl.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 *
10 * Derived from "include/asm-i386/ioctl.h"
11 */
12
13#ifndef _XTENSA_IOCTL_H
14#define _XTENSA_IOCTL_H
15
16
17/* ioctl command encoding: 32 bits total, command in lower 16 bits,
18 * size of the parameter structure in the lower 14 bits of the
19 * upper 16 bits.
20 * Encoding the size of the parameter structure in the ioctl request
21 * is useful for catching programs compiled with old versions
22 * and to avoid overwriting user space outside the user buffer area.
23 * The highest 2 bits are reserved for indicating the ``access mode''.
24 * NOTE: This limits the max parameter size to 16kB -1 !
25 */
26
27/*
28 * The following is for compatibility across the various Linux
29 * platforms. The i386 ioctl numbering scheme doesn't really enforce
30 * a type field. De facto, however, the top 8 bits of the lower 16
31 * bits are indeed used as a type field, so we might just as well make
32 * this explicit here. Please be sure to use the decoding macros
33 * below from now on.
34 */
35#define _IOC_NRBITS 8
36#define _IOC_TYPEBITS 8
37#define _IOC_SIZEBITS 14
38#define _IOC_DIRBITS 2
39
40#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
41#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
42#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
43#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
44
45#define _IOC_NRSHIFT 0
46#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
47#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
48#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
49
50/*
51 * Direction bits.
52 */
53#define _IOC_NONE 0U
54#define _IOC_WRITE 1U
55#define _IOC_READ 2U
56
57#define _IOC(dir,type,nr,size) \
58 (((dir) << _IOC_DIRSHIFT) | \
59 ((type) << _IOC_TYPESHIFT) | \
60 ((nr) << _IOC_NRSHIFT) | \
61 ((size) << _IOC_SIZESHIFT))
62
63/* used to create numbers */
64#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
65#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
66#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
67#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
68
69/* used to decode ioctl numbers.. */
70#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
71#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
72#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
73#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
74
75/* ...and for the drivers/sound files... */
76
77#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
78#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
79#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
80#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
81#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
82
83#endif
diff --git a/include/asm-xtensa/ioctls.h b/include/asm-xtensa/ioctls.h
new file mode 100644
index 000000000000..10c443435c11
--- /dev/null
+++ b/include/asm-xtensa/ioctls.h
@@ -0,0 +1,112 @@
1/*
2 * include/asm-xtensa/ioctl.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 *
10 * Derived from "include/asm-i386/ioctls.h"
11 */
12
13#ifndef _XTENSA_IOCTLS_H
14#define _XTENSA_IOCTLS_H
15
16#include <asm/ioctl.h>
17
18#define FIOCLEX _IO('f', 1)
19#define FIONCLEX _IO('f', 2)
20#define FIOASYNC _IOW('f', 125, int)
21#define FIONBIO _IOW('f', 126, int)
22#define FIONREAD _IOR('f', 127, int)
23#define TIOCINQ FIONREAD
24#define FIOQSIZE _IOR('f', 128, loff_t)
25
26#define TCGETS 0x5401
27#define TCSETS 0x5402
28#define TCSETSW 0x5403
29#define TCSETSF 0x5404
30
31#define TCGETA _IOR('t', 23, struct termio)
32#define TCSETA _IOW('t', 24, struct termio)
33#define TCSETAW _IOW('t', 25, struct termio)
34#define TCSETAF _IOW('t', 28, struct termio)
35
36#define TCSBRK _IO('t', 29)
37#define TCXONC _IO('t', 30)
38#define TCFLSH _IO('t', 31)
39
40#define TIOCSWINSZ _IOW('t', 103, struct winsize)
41#define TIOCGWINSZ _IOR('t', 104, struct winsize)
42#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
43#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
44#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
45
46#define TIOCSPGRP _IOW('t', 118, int)
47#define TIOCGPGRP _IOR('t', 119, int)
48
49#define TIOCEXCL _IO('T', 12)
50#define TIOCNXCL _IO('T', 13)
51#define TIOCSCTTY _IO('T', 14)
52
53#define TIOCSTI _IOW('T', 18, char)
54#define TIOCMGET _IOR('T', 21, unsigned int)
55#define TIOCMBIS _IOW('T', 22, unsigned int)
56#define TIOCMBIC _IOW('T', 23, unsigned int)
57#define TIOCMSET _IOW('T', 24, unsigned int)
58# define TIOCM_LE 0x001
59# define TIOCM_DTR 0x002
60# define TIOCM_RTS 0x004
61# define TIOCM_ST 0x008
62# define TIOCM_SR 0x010
63# define TIOCM_CTS 0x020
64# define TIOCM_CAR 0x040
65# define TIOCM_RNG 0x080
66# define TIOCM_DSR 0x100
67# define TIOCM_CD TIOCM_CAR
68# define TIOCM_RI TIOCM_RNG
69
70#define TIOCGSOFTCAR _IOR('T', 25, unsigned int)
71#define TIOCSSOFTCAR _IOW('T', 26, unsigned int)
72#define TIOCLINUX _IOW('T', 28, char)
73#define TIOCCONS _IO('T', 29)
74#define TIOCGSERIAL _IOR('T', 30, struct serial_struct)
75#define TIOCSSERIAL _IOW('T', 31, struct serial_struct)
76#define TIOCPKT _IOW('T', 32, int)
77# define TIOCPKT_DATA 0
78# define TIOCPKT_FLUSHREAD 1
79# define TIOCPKT_FLUSHWRITE 2
80# define TIOCPKT_STOP 4
81# define TIOCPKT_START 8
82# define TIOCPKT_NOSTOP 16
83# define TIOCPKT_DOSTOP 32
84
85
86#define TIOCNOTTY _IO('T', 34)
87#define TIOCSETD _IOW('T', 35, int)
88#define TIOCGETD _IOR('T', 36, int)
89#define TCSBRKP _IOW('T', 37, int) /* Needed for POSIX tcsendbreak()*/
90#define TIOCTTYGSTRUCT _IOR('T', 38, struct tty_struct) /* For debugging only*/
91#define TIOCSBRK _IO('T', 39) /* BSD compatibility */
92#define TIOCCBRK _IO('T', 40) /* BSD compatibility */
93#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/
94#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
95#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
96
97#define TIOCSERCONFIG _IO('T', 83)
98#define TIOCSERGWILD _IOR('T', 84, int)
99#define TIOCSERSWILD _IOW('T', 85, int)
100#define TIOCGLCKTRMIOS 0x5456
101#define TIOCSLCKTRMIOS 0x5457
102#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
103#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* Get line status reg. */
104 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
105# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
106#define TIOCSERGETMULTI _IOR('T', 90, struct serial_multiport_struct) /* Get multiport config */
107#define TIOCSERSETMULTI _IOW('T', 91, struct serial_multiport_struct) /* Set multiport config */
108
109#define TIOCMIWAIT _IO('T', 92) /* wait for a change on serial input line(s) */
110#define TIOCGICOUNT _IOR('T', 93, struct async_icount) /* read serial port inline interrupt counts */
111
112#endif /* _XTENSA_IOCTLS_H */
diff --git a/include/asm-xtensa/ipc.h b/include/asm-xtensa/ipc.h
new file mode 100644
index 000000000000..d37bdb4d4c9c
--- /dev/null
+++ b/include/asm-xtensa/ipc.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-xtensa/ipc.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_IPC_H
12#define _XTENSA_IPC_H
13
14struct ipc_kludge {
15 struct msgbuf __user *msgp;
16 long msgtyp;
17};
18
19#define SEMOP 1
20#define SEMGET 2
21#define SEMCTL 3
22#define SEMTIMEDOP 4
23#define MSGSND 11
24#define MSGRCV 12
25#define MSGGET 13
26#define MSGCTL 14
27#define SHMAT 21
28#define SHMDT 22
29#define SHMGET 23
30#define SHMCTL 24
31
32#define IPCCALL(version,op) ((version)<<16 | (op))
33
34#endif /* _XTENSA_IPC_H */
diff --git a/include/asm-xtensa/ipcbuf.h b/include/asm-xtensa/ipcbuf.h
new file mode 100644
index 000000000000..c33aa6a42145
--- /dev/null
+++ b/include/asm-xtensa/ipcbuf.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-xtensa/ipcbuf.h
3 *
4 * The ipc64_perm structure for the Xtensa architecture.
5 * Note extra padding because this structure is passed back and forth
6 * between kernel and user space.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_IPCBUF_H
12#define _XTENSA_IPCBUF_H
13
14/*
15 * Pad space is left for:
16 * - 32-bit mode_t and seq
17 * - 2 miscellaneous 32-bit values
18 *
19 * This file is subject to the terms and conditions of the GNU General
20 * Public License. See the file "COPYING" in the main directory of
21 * this archive for more details.
22 */
23
24struct ipc64_perm
25{
26 __kernel_key_t key;
27 __kernel_uid32_t uid;
28 __kernel_gid32_t gid;
29 __kernel_uid32_t cuid;
30 __kernel_gid32_t cgid;
31 __kernel_mode_t mode;
32 unsigned long seq;
33 unsigned long __unused1;
34 unsigned long __unused2;
35};
36
37#endif /* _XTENSA_IPCBUF_H */
diff --git a/include/asm-xtensa/irq.h b/include/asm-xtensa/irq.h
new file mode 100644
index 000000000000..d984e955938f
--- /dev/null
+++ b/include/asm-xtensa/irq.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-xtensa/irq.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_IRQ_H
12#define _XTENSA_IRQ_H
13
14#include <linux/config.h>
15#include <asm/platform/hardware.h>
16
17#include <xtensa/config/core.h>
18
19#ifndef PLATFORM_NR_IRQS
20# define PLATFORM_NR_IRQS 0
21#endif
22#define XTENSA_NR_IRQS XCHAL_NUM_INTERRUPTS
23#define NR_IRQS (XTENSA_NR_IRQS + PLATFORM_NR_IRQS)
24
25static __inline__ int irq_canonicalize(int irq)
26{
27 return (irq);
28}
29
30struct irqaction;
31#if 0 // FIXME
32extern void disable_irq_nosync(unsigned int);
33extern void disable_irq(unsigned int);
34extern void enable_irq(unsigned int);
35#endif
36
37#endif /* _XTENSA_IRQ_H */
diff --git a/include/asm-xtensa/kmap_types.h b/include/asm-xtensa/kmap_types.h
new file mode 100644
index 000000000000..9e822d2e3bce
--- /dev/null
+++ b/include/asm-xtensa/kmap_types.h
@@ -0,0 +1,31 @@
1/*
2 * include/asm-xtensa/kmap_types.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_KMAP_TYPES_H
12#define _XTENSA_KMAP_TYPES_H
13
14enum km_type {
15 KM_BOUNCE_READ,
16 KM_SKB_SUNRPC_DATA,
17 KM_SKB_DATA_SOFTIRQ,
18 KM_USER0,
19 KM_USER1,
20 KM_BIO_SRC_IRQ,
21 KM_BIO_DST_IRQ,
22 KM_PTE0,
23 KM_PTE1,
24 KM_IRQ0,
25 KM_IRQ1,
26 KM_SOFTIRQ0,
27 KM_SOFTIRQ1,
28 KM_TYPE_NR
29};
30
31#endif /* _XTENSA_KMAP_TYPES_H */
diff --git a/include/asm-xtensa/linkage.h b/include/asm-xtensa/linkage.h
new file mode 100644
index 000000000000..bf2128a99d79
--- /dev/null
+++ b/include/asm-xtensa/linkage.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/linkage.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_LINKAGE_H
12#define _XTENSA_LINKAGE_H
13
14/* Nothing to do here ... */
15
16#endif /* _XTENSA_LINKAGE_H */
diff --git a/include/asm-xtensa/local.h b/include/asm-xtensa/local.h
new file mode 100644
index 000000000000..48723e550d14
--- /dev/null
+++ b/include/asm-xtensa/local.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/local.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_LOCAL_H
12#define _XTENSA_LOCAL_H
13
14#include <asm-generic/local.h>
15
16#endif /* _XTENSA_LOCAL_H */
diff --git a/include/asm-xtensa/mman.h b/include/asm-xtensa/mman.h
new file mode 100644
index 000000000000..9a95a45df996
--- /dev/null
+++ b/include/asm-xtensa/mman.h
@@ -0,0 +1,80 @@
1/*
2 * include/asm-xtensa/mman.h
3 *
4 * Xtensa Processor memory-manager definitions
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1995 by Ralf Baechle
11 * Copyright (C) 2001 - 2005 Tensilica Inc.
12 */
13
14#ifndef _XTENSA_MMAN_H
15#define _XTENSA_MMAN_H
16
17/*
18 * Protections are chosen from these bits, OR'd together. The
19 * implementation does not necessarily support PROT_EXEC or PROT_WRITE
20 * without PROT_READ. The only guarantees are that no writing will be
21 * allowed without PROT_WRITE and no access will be allowed for PROT_NONE.
22 */
23
24#define PROT_NONE 0x0 /* page can not be accessed */
25#define PROT_READ 0x1 /* page can be read */
26#define PROT_WRITE 0x2 /* page can be written */
27#define PROT_EXEC 0x4 /* page can be executed */
28
29#define PROT_SEM 0x10 /* page may be used for atomic ops */
30#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
31#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end fo growsup vma */
32
33/*
34 * Flags for mmap
35 */
36#define MAP_SHARED 0x001 /* Share changes */
37#define MAP_PRIVATE 0x002 /* Changes are private */
38#define MAP_TYPE 0x00f /* Mask for type of mapping */
39#define MAP_FIXED 0x010 /* Interpret addr exactly */
40
41/* not used by linux, but here to make sure we don't clash with ABI defines */
42#define MAP_RENAME 0x020 /* Assign page to file */
43#define MAP_AUTOGROW 0x040 /* File may grow by writing */
44#define MAP_LOCAL 0x080 /* Copy on fork/sproc */
45#define MAP_AUTORSRV 0x100 /* Logical swap reserved on demand */
46
47/* These are linux-specific */
48#define MAP_NORESERVE 0x0400 /* don't check for reservations */
49#define MAP_ANONYMOUS 0x0800 /* don't use a file */
50#define MAP_GROWSDOWN 0x1000 /* stack-like segment */
51#define MAP_DENYWRITE 0x2000 /* ETXTBSY */
52#define MAP_EXECUTABLE 0x4000 /* mark it as an executable */
53#define MAP_LOCKED 0x8000 /* pages are locked */
54#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
55#define MAP_NONBLOCK 0x20000 /* do not block on IO */
56
57/*
58 * Flags for msync
59 */
60#define MS_ASYNC 0x0001 /* sync memory asynchronously */
61#define MS_INVALIDATE 0x0002 /* invalidate mappings & caches */
62#define MS_SYNC 0x0004 /* synchronous memory sync */
63
64/*
65 * Flags for mlockall
66 */
67#define MCL_CURRENT 1 /* lock all current mappings */
68#define MCL_FUTURE 2 /* lock all future mappings */
69
70#define MADV_NORMAL 0x0 /* default page-in behavior */
71#define MADV_RANDOM 0x1 /* page-in minimum required */
72#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
73#define MADV_WILLNEED 0x3 /* pre-fault pages */
74#define MADV_DONTNEED 0x4 /* discard these pages */
75
76/* compatibility flags */
77#define MAP_ANON MAP_ANONYMOUS
78#define MAP_FILE 0
79
80#endif /* _XTENSA_MMAN_H */
diff --git a/include/asm-xtensa/mmu.h b/include/asm-xtensa/mmu.h
new file mode 100644
index 000000000000..44c5bb04c55c
--- /dev/null
+++ b/include/asm-xtensa/mmu.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-xtensa/mmu.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_MMU_H
12#define _XTENSA_MMU_H
13
14/* Default "unsigned long" context */
15typedef unsigned long mm_context_t;
16
17#endif /* _XTENSA_MMU_H */
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
new file mode 100644
index 000000000000..1b0801548cd9
--- /dev/null
+++ b/include/asm-xtensa/mmu_context.h
@@ -0,0 +1,330 @@
1/*
2 * include/asm-xtensa/mmu_context.h
3 *
4 * Switch an MMU context.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_MMU_CONTEXT_H
14#define _XTENSA_MMU_CONTEXT_H
15
16#include <linux/config.h>
17#include <linux/stringify.h>
18
19#include <asm/pgtable.h>
20#include <asm/mmu_context.h>
21#include <asm/cacheflush.h>
22#include <asm/tlbflush.h>
23
24/*
25 * Linux was ported to Xtensa assuming all auto-refill ways in set 0
26 * had the same properties (a very likely assumption). Multiple sets
27 * of auto-refill ways will still work properly, but not as optimally
28 * as the Xtensa designer may have assumed.
29 *
30 * We make this case a hard #error, killing the kernel build, to alert
31 * the developer to this condition (which is more likely an error).
32 * You super-duper clever developers can change it to a warning or
33 * remove it altogether if you think you know what you're doing. :)
34 */
35
36#if (XCHAL_HAVE_TLBS != 1)
37# error "Linux must have an MMU!"
38#endif
39
40#if ((XCHAL_ITLB_ARF_WAYS == 0) || (XCHAL_DTLB_ARF_WAYS == 0))
41# error "MMU must have auto-refill ways"
42#endif
43
44#if ((XCHAL_ITLB_ARF_SETS != 1) || (XCHAL_DTLB_ARF_SETS != 1))
45# error Linux may not use all auto-refill ways as efficiently as you think
46#endif
47
48#if (XCHAL_MMU_MAX_PTE_PAGE_SIZE != XCHAL_MMU_MIN_PTE_PAGE_SIZE)
49# error Only one page size allowed!
50#endif
51
52extern unsigned long asid_cache;
53extern pgd_t *current_pgd;
54
55/*
56 * Define the number of entries per auto-refill way in set 0 of both I and D
57 * TLBs. We deal only with set 0 here (an assumption further explained in
58 * assertions.h). Also, define the total number of ARF entries in both TLBs.
59 */
60
61#define ITLB_ENTRIES_PER_ARF_WAY (XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,ENTRIES))
62#define DTLB_ENTRIES_PER_ARF_WAY (XCHAL_DTLB_SET(XCHAL_DTLB_ARF_SET0,ENTRIES))
63
64#define ITLB_ENTRIES \
65 (ITLB_ENTRIES_PER_ARF_WAY * (XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,WAYS)))
66#define DTLB_ENTRIES \
67 (DTLB_ENTRIES_PER_ARF_WAY * (XCHAL_DTLB_SET(XCHAL_DTLB_ARF_SET0,WAYS)))
68
69
70/*
71 * SMALLEST_NTLB_ENTRIES is the smaller of ITLB_ENTRIES and DTLB_ENTRIES.
72 * In practice, they are probably equal. This macro simplifies function
73 * flush_tlb_range().
74 */
75
76#if (DTLB_ENTRIES < ITLB_ENTRIES)
77# define SMALLEST_NTLB_ENTRIES DTLB_ENTRIES
78#else
79# define SMALLEST_NTLB_ENTRIES ITLB_ENTRIES
80#endif
81
82
83/*
84 * asid_cache tracks only the ASID[USER_RING] field of the RASID special
85 * register, which is the current user-task asid allocation value.
86 * mm->context has the same meaning. When it comes time to write the
87 * asid_cache or mm->context values to the RASID special register, we first
88 * shift the value left by 8, then insert the value.
89 * ASID[0] always contains the kernel's asid value, and we reserve three
90 * other asid values that we never assign to user tasks.
91 */
92
93#define ASID_INC 0x1
94#define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1)
95
96/*
97 * XCHAL_MMU_ASID_INVALID is a configurable Xtensa processor constant
98 * indicating invalid address space. XCHAL_MMU_ASID_KERNEL is a configurable
99 * Xtensa processor constant indicating the kernel address space. They can
100 * be arbitrary values.
101 *
102 * We identify three more unique, reserved ASID values to use in the unused
103 * ring positions. No other user process will be assigned these reserved
104 * ASID values.
105 *
106 * For example, given that
107 *
108 * XCHAL_MMU_ASID_INVALID == 0
109 * XCHAL_MMU_ASID_KERNEL == 1
110 *
111 * the following maze of #if statements would generate
112 *
113 * ASID_RESERVED_1 == 2
114 * ASID_RESERVED_2 == 3
115 * ASID_RESERVED_3 == 4
116 * ASID_FIRST_NONRESERVED == 5
117 */
118
119#if (XCHAL_MMU_ASID_INVALID != XCHAL_MMU_ASID_KERNEL + 1)
120# define ASID_RESERVED_1 ((XCHAL_MMU_ASID_KERNEL + 1) & ASID_MASK)
121#else
122# define ASID_RESERVED_1 ((XCHAL_MMU_ASID_KERNEL + 2) & ASID_MASK)
123#endif
124
125#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_1 + 1)
126# define ASID_RESERVED_2 ((ASID_RESERVED_1 + 1) & ASID_MASK)
127#else
128# define ASID_RESERVED_2 ((ASID_RESERVED_1 + 2) & ASID_MASK)
129#endif
130
131#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_2 + 1)
132# define ASID_RESERVED_3 ((ASID_RESERVED_2 + 1) & ASID_MASK)
133#else
134# define ASID_RESERVED_3 ((ASID_RESERVED_2 + 2) & ASID_MASK)
135#endif
136
137#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_3 + 1)
138# define ASID_FIRST_NONRESERVED ((ASID_RESERVED_3 + 1) & ASID_MASK)
139#else
140# define ASID_FIRST_NONRESERVED ((ASID_RESERVED_3 + 2) & ASID_MASK)
141#endif
142
143#define ASID_ALL_RESERVED ( ((ASID_RESERVED_1) << 24) + \
144 ((ASID_RESERVED_2) << 16) + \
145 ((ASID_RESERVED_3) << 8) + \
146 ((XCHAL_MMU_ASID_KERNEL)) )
147
148
149/*
150 * NO_CONTEXT is the invalid ASID value that we don't ever assign to
151 * any user or kernel context. NO_CONTEXT is a better mnemonic than
152 * XCHAL_MMU_ASID_INVALID, so we use it in code instead.
153 */
154
155#define NO_CONTEXT XCHAL_MMU_ASID_INVALID
156
157#if (KERNEL_RING != 0)
158# error The KERNEL_RING really should be zero.
159#endif
160
161#if (USER_RING >= XCHAL_MMU_RINGS)
162# error USER_RING cannot be greater than the highest numbered ring.
163#endif
164
165#if (USER_RING == KERNEL_RING)
166# error The user and kernel rings really should not be equal.
167#endif
168
169#if (USER_RING == 1)
170#define ASID_INSERT(x) ( ((ASID_RESERVED_1) << 24) + \
171 ((ASID_RESERVED_2) << 16) + \
172 (((x) & (ASID_MASK)) << 8) + \
173 ((XCHAL_MMU_ASID_KERNEL)) )
174
175#elif (USER_RING == 2)
176#define ASID_INSERT(x) ( ((ASID_RESERVED_1) << 24) + \
177 (((x) & (ASID_MASK)) << 16) + \
178 ((ASID_RESERVED_2) << 8) + \
179 ((XCHAL_MMU_ASID_KERNEL)) )
180
181#elif (USER_RING == 3)
182#define ASID_INSERT(x) ( (((x) & (ASID_MASK)) << 24) + \
183 ((ASID_RESERVED_1) << 16) + \
184 ((ASID_RESERVED_2) << 8) + \
185 ((XCHAL_MMU_ASID_KERNEL)) )
186
187#else
188#error Goofy value for USER_RING
189
190#endif /* USER_RING == 1 */
191
192
193/*
194 * All unused by hardware upper bits will be considered
195 * as a software asid extension.
196 */
197
198#define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
199#define ASID_FIRST_VERSION \
200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED)
201
202extern inline void set_rasid_register (unsigned long val)
203{
204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
205 " isync\n" : : "a" (val));
206}
207
208extern inline unsigned long get_rasid_register (void)
209{
210 unsigned long tmp;
211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp));
212 return tmp;
213}
214
215
216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1))
217
218extern inline void
219get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
220{
221 extern void flush_tlb_all(void);
222 if (! ((asid += ASID_INC) & ASID_MASK) ) {
223 flush_tlb_all(); /* start new asid cycle */
224 if (!asid) /* fix version if needed */
225 asid = ASID_FIRST_VERSION - ASID_FIRST_NONRESERVED;
226 asid += ASID_FIRST_NONRESERVED;
227 }
228 mm->context = asid_cache = asid;
229}
230
231#else
232#warning ASID_{INVALID,KERNEL} values impose non-optimal get_new_mmu_context implementation
233
234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are
235 really the best, but if you insist... */
236
237extern inline int validate_asid (unsigned long asid)
238{
239 switch (asid) {
240 case XCHAL_MMU_ASID_INVALID:
241 case XCHAL_MMU_ASID_KERNEL:
242 case ASID_RESERVED_1:
243 case ASID_RESERVED_2:
244 case ASID_RESERVED_3:
245 return 0; /* can't use these values as ASIDs */
246 }
247 return 1; /* valid */
248}
249
250extern inline void
251get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
252{
253 extern void flush_tlb_all(void);
254 while (1) {
255 asid += ASID_INC;
256 if ( ! (asid & ASID_MASK) ) {
257 flush_tlb_all(); /* start new asid cycle */
258 if (!asid) /* fix version if needed */
259 asid = ASID_FIRST_VERSION - ASID_FIRST_NONRESERVED;
260 asid += ASID_FIRST_NONRESERVED;
261 break; /* no need to validate here */
262 }
263 if (validate_asid (asid & ASID_MASK))
264 break;
265 }
266 mm->context = asid_cache = asid;
267}
268
269#endif
270
271
272/*
273 * Initialize the context related info for a new mm_struct
274 * instance.
275 */
276
277extern inline int
278init_new_context(struct task_struct *tsk, struct mm_struct *mm)
279{
280 mm->context = NO_CONTEXT;
281 return 0;
282}
283
284extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
285 struct task_struct *tsk)
286{
287 unsigned long asid = asid_cache;
288
289 /* Check if our ASID is of an older version and thus invalid */
290
291 if ((next->context ^ asid) & ASID_VERSION_MASK)
292 get_new_mmu_context(next, asid);
293
294 set_rasid_register (ASID_INSERT(next->context));
295 invalidate_page_directory();
296}
297
298#define deactivate_mm(tsk, mm) do { } while(0)
299
300/*
301 * Destroy context related info for an mm_struct that is about
302 * to be put to rest.
303 */
304extern inline void destroy_context(struct mm_struct *mm)
305{
306 /* Nothing to do. */
307}
308
309/*
310 * After we have set current->mm to a new value, this activates
311 * the context for the new mm so we see the new mappings.
312 */
313extern inline void
314activate_mm(struct mm_struct *prev, struct mm_struct *next)
315{
316 /* Unconditionally get a new ASID. */
317
318 get_new_mmu_context(next, asid_cache);
319 set_rasid_register (ASID_INSERT(next->context));
320 invalidate_page_directory();
321}
322
323
324static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
325{
326 /* Nothing to do. */
327
328}
329
330#endif /* _XTENSA_MMU_CONTEXT_H */
diff --git a/include/asm-xtensa/module.h b/include/asm-xtensa/module.h
new file mode 100644
index 000000000000..ffb25bfdf6a1
--- /dev/null
+++ b/include/asm-xtensa/module.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-xtensa/module.h
3 *
4 * This file contains the module code specific to the Xtensa architecture.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_MODULE_H
14#define _XTENSA_MODULE_H
15
16struct mod_arch_specific
17{
18 /* Module support is not completely implemented. */
19};
20
21#define Elf_Shdr Elf32_Shdr
22#define Elf_Sym Elf32_Sym
23#define Elf_Ehdr Elf32_Ehdr
24
25#endif /* _XTENSA_MODULE_H */
diff --git a/include/asm-xtensa/msgbuf.h b/include/asm-xtensa/msgbuf.h
new file mode 100644
index 000000000000..693c96755280
--- /dev/null
+++ b/include/asm-xtensa/msgbuf.h
@@ -0,0 +1,48 @@
1/*
2 * include/asm-xtensa/msgbuf.h
3 *
4 * The msqid64_ds structure for the Xtensa architecture.
5 * Note extra padding because this structure is passed back and forth
6 * between kernel and user space.
7 *
8 * Pad space is left for:
9 * - 64-bit time_t to solve y2038 problem
10 * - 2 miscellaneous 32-bit values
11 *
12 * This file is subject to the terms and conditions of the GNU General
13 * Public License. See the file "COPYING" in the main directory of
14 * this archive for more details.
15 */
16
17#ifndef _XTENSA_MSGBUF_H
18#define _XTENSA_MSGBUF_H
19
20struct msqid64_ds {
21 struct ipc64_perm msg_perm;
22#ifdef __XTENSA_EB__
23 unsigned int __unused1;
24 __kernel_time_t msg_stime; /* last msgsnd time */
25 unsigned int __unused2;
26 __kernel_time_t msg_rtime; /* last msgrcv time */
27 unsigned int __unused3;
28 __kernel_time_t msg_ctime; /* last change time */
29#elif defined(__XTENSA_EL__)
30 __kernel_time_t msg_stime; /* last msgsnd time */
31 unsigned int __unused1;
32 __kernel_time_t msg_rtime; /* last msgrcv time */
33 unsigned int __unused2;
34 __kernel_time_t msg_ctime; /* last change time */
35 unsigned int __unused3;
36#else
37# error processor byte order undefined!
38#endif
39 unsigned long msg_cbytes; /* current number of bytes on queue */
40 unsigned long msg_qnum; /* number of messages in queue */
41 unsigned long msg_qbytes; /* max number of bytes on queue */
42 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
43 __kernel_pid_t msg_lrpid; /* last receive pid */
44 unsigned long __unused4;
45 unsigned long __unused5;
46};
47
48#endif /* _XTENSA_MSGBUF_H */
diff --git a/include/asm-xtensa/namei.h b/include/asm-xtensa/namei.h
new file mode 100644
index 000000000000..3fdff039d27d
--- /dev/null
+++ b/include/asm-xtensa/namei.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-xtensa/namei.h
3 *
4 * Included from linux/fs/namei.c
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_NAMEI_H
14#define _XTENSA_NAMEI_H
15
16#ifdef __KERNEL__
17
18/* This dummy routine maybe changed to something useful
19 * for /usr/gnemul/ emulation stuff.
20 * Look at asm-sparc/namei.h for details.
21 */
22
23#define __emul_prefix() NULL
24
25#endif /* __KERNEL__ */
26#endif /* _XTENSA_NAMEI_H */
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
new file mode 100644
index 000000000000..b495e5b5a942
--- /dev/null
+++ b/include/asm-xtensa/page.h
@@ -0,0 +1,133 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/config.h>
18
19/*
20 * PAGE_SHIFT determines the page size
21 * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary
22 */
23
24#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE
25#define PAGE_SIZE (1 << PAGE_SHIFT)
26#define PAGE_MASK (~(PAGE_SIZE-1))
27#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
28
29#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
30#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
31
32#ifdef __ASSEMBLY__
33
34#define __pgprot(x) (x)
35
36#else
37
38/*
39 * These are used to make use of C type-checking..
40 */
41
42typedef struct { unsigned long pte; } pte_t; /* page table entry */
43typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
44typedef struct { unsigned long pgprot; } pgprot_t;
45
46#define pte_val(x) ((x).pte)
47#define pgd_val(x) ((x).pgd)
48#define pgprot_val(x) ((x).pgprot)
49
50#define __pte(x) ((pte_t) { (x) } )
51#define __pgd(x) ((pgd_t) { (x) } )
52#define __pgprot(x) ((pgprot_t) { (x) } )
53
54/*
55 * Pure 2^n version of get_order
56 */
57
58extern __inline__ int get_order(unsigned long size)
59{
60 int order;
61#ifndef XCHAL_HAVE_NSU
62 unsigned long x1, x2, x4, x8, x16;
63
64 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
65 x1 = size & 0xAAAAAAAA;
66 x2 = size & 0xCCCCCCCC;
67 x4 = size & 0xF0F0F0F0;
68 x8 = size & 0xFF00FF00;
69 x16 = size & 0xFFFF0000;
70 order = x2 ? 2 : 0;
71 order += (x16 != 0) * 16;
72 order += (x8 != 0) * 8;
73 order += (x4 != 0) * 4;
74 order += (x1 != 0);
75
76 return order;
77#else
78 size = (size - 1) >> PAGE_SHIFT;
79 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
80 return 32 - order;
81#endif
82}
83
84
85struct page;
86extern void clear_page(void *page);
87extern void copy_page(void *to, void *from);
88
89/*
90 * If we have cache aliasing and writeback caches, we might have to do
91 * some extra work
92 */
93
94#if (DCACHE_WAY_SIZE > PAGE_SIZE)
95void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
96void copy_user_page(void *to,void* from,unsigned long vaddr,struct page* page);
97#else
98# define clear_user_page(page,vaddr,pg) clear_page(page)
99# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
100#endif
101
102/*
103 * This handles the memory map. We handle pages at
104 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
105 * These macros are for conversion of kernel address, not user
106 * addresses.
107 */
108
109#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
110#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
111#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr)
112#ifndef CONFIG_DISCONTIGMEM
113# define pfn_to_page(pfn) (mem_map + (pfn))
114# define page_to_pfn(page) ((unsigned long)((page) - mem_map))
115#else
116# error CONFIG_DISCONTIGMEM not supported
117#endif
118
119#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
120#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
121#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
123
124#define WANT_PAGE_VIRTUAL
125
126
127#endif /* __ASSEMBLY__ */
128
129#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
130 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
131
132#endif /* __KERNEL__ */
133#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/page.h.n b/include/asm-xtensa/page.h.n
new file mode 100644
index 000000000000..546cc6624f24
--- /dev/null
+++ b/include/asm-xtensa/page.h.n
@@ -0,0 +1,135 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/config.h>
18
19/*
20 * PAGE_SHIFT determines the page size
21 * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary
22 */
23#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE
24#define PAGE_SIZE (1 << PAGE_SHIFT)
25#define PAGE_MASK (~(PAGE_SIZE-1))
26#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
27
28#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
29#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
30
31#ifdef __ASSEMBLY__
32
33#define __pgprot(x) (x)
34
35#else
36
37
38/*
39 * These are used to make use of C type-checking..
40 */
41typedef struct { unsigned long pte; } pte_t; /* page table entry */
42typedef struct { unsigned long pmd; } pmd_t; /* PMD table entry */
43typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
44typedef struct { unsigned long pgprot; } pgprot_t;
45
46#define pte_val(x) ((x).pte)
47#define pmd_val(x) ((x).pmd)
48#define pgd_val(x) ((x).pgd)
49#define pgprot_val(x) ((x).pgprot)
50
51#define __pte(x) ((pte_t) { (x) } )
52#define __pmd(x) ((pmd_t) { (x) } )
53#define __pgd(x) ((pgd_t) { (x) } )
54#define __pgprot(x) ((pgprot_t) { (x) } )
55
56/*
57 * Pure 2^n version of get_order
58 */
59extern __inline__ int get_order(unsigned long size)
60{
61 int order;
62#ifndef XCHAL_HAVE_NSU
63 unsigned long x1, x2, x4, x8, x16;
64
65 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
66 x1 = size & 0xAAAAAAAA;
67 x2 = size & 0xCCCCCCCC;
68 x4 = size & 0xF0F0F0F0;
69 x8 = size & 0xFF00FF00;
70 x16 = size & 0xFFFF0000;
71 order = x2 ? 2 : 0;
72 order += (x16 != 0) * 16;
73 order += (x8 != 0) * 8;
74 order += (x4 != 0) * 4;
75 order += (x1 != 0);
76
77 return order;
78#else
79 size = (size - 1) >> PAGE_SHIFT;
80 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
81 return 32 - order;
82#endif
83}
84
85
86struct page;
87extern void clear_page(void *page);
88extern void copy_page(void *to, void *from);
89
90/*
91 * If we have cache aliasing and writeback caches, we might have to do
92 * some extra work
93 */
94
95#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
96void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
97void copy_user_page(void *to, void* from, unsigned long vaddr, struct page* page);
98#else
99# define clear_user_page(page,vaddr,pg) clear_page(page)
100# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
101#endif
102
103
104/*
105 * This handles the memory map. We handle pages at
106 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
107 * These macros are for conversion of kernel address, not user
108 * addresses.
109 */
110
111#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
112#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
113#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr)
114#ifndef CONFIG_DISCONTIGMEM
115# define pfn_to_page(pfn) (mem_map + (pfn))
116# define page_to_pfn(page) ((unsigned long)((page) - mem_map))
117#else
118# error CONFIG_DISCONTIGMEM not supported
119#endif
120
121#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
123#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
124#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
125
126#define WANT_PAGE_VIRTUAL
127
128
129#endif /* __ASSEMBLY__ */
130
131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
133
134#endif /* __KERNEL__ */
135#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h
new file mode 100644
index 000000000000..c0eec8260b0e
--- /dev/null
+++ b/include/asm-xtensa/param.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-xtensa/param.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PARAM_H
12#define _XTENSA_PARAM_H
13
14#include <xtensa/config/core.h>
15
16#ifdef __KERNEL__
17# define HZ 100 /* internal timer frequency */
18# define USER_HZ 100 /* for user interfaces in "ticks" */
19# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */
20#endif
21
22#define EXEC_PAGESIZE (1 << XCHAL_MMU_MIN_PTE_PAGE_SIZE)
23
24#ifndef NGROUPS
25#define NGROUPS 32
26#endif
27
28#ifndef NOGROUP
29#define NOGROUP (-1)
30#endif
31
32#define MAXHOSTNAMELEN 64 /* max length of hostname */
33
34#endif /* _XTENSA_PARAM_H */
diff --git a/include/asm-xtensa/pci-bridge.h b/include/asm-xtensa/pci-bridge.h
new file mode 100644
index 000000000000..00fcbd7c534a
--- /dev/null
+++ b/include/asm-xtensa/pci-bridge.h
@@ -0,0 +1,88 @@
1/*
2 * include/asm-xtensa/pci-bridge.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PCI_BRIDGE_H
12#define _XTENSA_PCI_BRIDGE_H
13
14#ifdef __KERNEL__
15
16struct device_node;
17struct pci_controller;
18
19/*
20 * pciauto_bus_scan() enumerates the pci space.
21 */
22
23extern int pciauto_bus_scan(struct pci_controller *, int);
24
25struct pci_space {
26 unsigned long start;
27 unsigned long end;
28 unsigned long base;
29};
30
31/*
32 * Structure of a PCI controller (host bridge)
33 */
34
35struct pci_controller {
36 int index; /* used for pci_controller_num */
37 struct pci_controller *next;
38 struct pci_bus *bus;
39 void *arch_data;
40
41 int first_busno;
42 int last_busno;
43
44 struct pci_ops *ops;
45 volatile unsigned int *cfg_addr;
46 volatile unsigned char *cfg_data;
47
48 /* Currently, we limit ourselves to 1 IO range and 3 mem
49 * ranges since the common pci_bus structure can't handle more
50 */
51 struct resource io_resource;
52 struct resource mem_resources[3];
53 int mem_resource_count;
54
55 /* Host bridge I/O and Memory space
56 * Used for BAR placement algorithms
57 */
58 struct pci_space io_space;
59 struct pci_space mem_space;
60
61 /* Return the interrupt number fo a device. */
62 int (*map_irq)(struct pci_dev*, u8, u8);
63
64};
65
66static inline void pcibios_init_resource(struct resource *res,
67 unsigned long start, unsigned long end, int flags, char *name)
68{
69 res->start = start;
70 res->end = end;
71 res->flags = flags;
72 res->name = name;
73 res->parent = NULL;
74 res->sibling = NULL;
75 res->child = NULL;
76}
77
78
79/* These are used for config access before all the PCI probing has been done. */
80int early_read_config_byte(struct pci_controller*, int, int, int, u8*);
81int early_read_config_word(struct pci_controller*, int, int, int, u16*);
82int early_read_config_dword(struct pci_controller*, int, int, int, u32*);
83int early_write_config_byte(struct pci_controller*, int, int, int, u8);
84int early_write_config_word(struct pci_controller*, int, int, int, u16);
85int early_write_config_dword(struct pci_controller*, int, int, int, u32);
86
87#endif /* __KERNEL__ */
88#endif /* _XTENSA_PCI_BRIDGE_H */
diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h
new file mode 100644
index 000000000000..6817742301c2
--- /dev/null
+++ b/include/asm-xtensa/pci.h
@@ -0,0 +1,89 @@
1/*
2 * linux/include/asm-xtensa/pci.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PCI_H
12#define _XTENSA_PCI_H
13
14#ifdef __KERNEL__
15
16/* Can be used to override the logic in pci_scan_bus for skipping
17 * already-configured bus numbers - to be used for buggy BIOSes
18 * or architectures with incomplete PCI setup by the loader
19 */
20
21#define pcibios_assign_all_busses() 0
22
23extern struct pci_controller* pcibios_alloc_controller(void);
24
25extern inline void pcibios_set_master(struct pci_dev *dev)
26{
27 /* No special bus mastering setup handling */
28}
29
30extern inline void pcibios_penalize_isa_irq(int irq)
31{
32 /* We don't do dynamic PCI IRQ allocation */
33}
34
35/* Assume some values. (We should revise them, if necessary) */
36
37#define PCIBIOS_MIN_IO 0x2000
38#define PCIBIOS_MIN_MEM 0x10000000
39
40/* Dynamic DMA mapping stuff.
41 * Xtensa has everything mapped statically like x86.
42 */
43
44#include <linux/types.h>
45#include <linux/slab.h>
46#include <asm/scatterlist.h>
47#include <linux/string.h>
48#include <asm/io.h>
49
50struct pci_dev;
51
52/* The PCI address space does equal the physical memory address space.
53 * The networking and block device layers use this boolean for bounce buffer
54 * decisions.
55 */
56
57#define PCI_DMA_BUS_IS_PHYS (1)
58
59/* pci_unmap_{page,single} is a no-op, so */
60#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
61#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
62#define pci_unmap_addr(PTR, ADDR_NAME) (0)
63#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
64#define pci_ubnmap_len(PTR, LEN_NAME) (0)
65#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
66
67/* We cannot access memory above 4GB */
68#define pci_dac_dma_supported(pci_dev, mask) (0)
69
70/* Map a range of PCI memory or I/O space for a device into user space */
71int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
72 enum pci_mmap_state mmap_state, int write_combine);
73
74/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
75#define HAVE_PCI_MMAP 1
76
77static inline void pcibios_add_platform_entries(struct pci_dev *dev)
78{
79}
80
81#endif /* __KERNEL__ */
82
83/* Implement the pci_ DMA API in terms of the generic device dma_ one */
84#include <asm-generic/pci-dma-compat.h>
85
86/* Generic PCI */
87#include <asm-generic/pci.h>
88
89#endif /* _XTENSA_PCI_H */
diff --git a/include/asm-xtensa/percpu.h b/include/asm-xtensa/percpu.h
new file mode 100644
index 000000000000..6d2bc2ada9d1
--- /dev/null
+++ b/include/asm-xtensa/percpu.h
@@ -0,0 +1,16 @@
1/*
2 * linux/include/asm-xtensa/percpu.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PERCPU__
12#define _XTENSA_PERCPU__
13
14#include <asm-generic/percpu.h>
15
16#endif /* _XTENSA_PERCPU__ */
diff --git a/include/asm-xtensa/pgalloc.h b/include/asm-xtensa/pgalloc.h
new file mode 100644
index 000000000000..734a8d060395
--- /dev/null
+++ b/include/asm-xtensa/pgalloc.h
@@ -0,0 +1,116 @@
1/*
2 * linux/include/asm-xtensa/pgalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001-2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PGALLOC_H
12#define _XTENSA_PGALLOC_H
13
14#ifdef __KERNEL__
15
16#include <linux/config.h>
17#include <linux/threads.h>
18#include <linux/highmem.h>
19#include <asm/processor.h>
20#include <asm/cacheflush.h>
21
22
23/* Cache aliasing:
24 *
25 * If the cache size for one way is greater than the page size, we have to
26 * deal with cache aliasing. The cache index is wider than the page size:
27 *
28 * |cache |
29 * |pgnum |page| virtual address
30 * |xxxxxX|zzzz|
31 * | | |
32 * \ / | |
33 * trans.| |
34 * / \ | |
35 * |yyyyyY|zzzz| physical address
36 *
37 * When the page number is translated to the physical page address, the lowest
38 * bit(s) (X) that are also part of the cache index are also translated (Y).
39 * If this translation changes this bit (X), the cache index is also afected,
40 * thus resulting in a different cache line than before.
41 * The kernel does not provide a mechanism to ensure that the page color
42 * (represented by this bit) remains the same when allocated or when pages
43 * are remapped. When user pages are mapped into kernel space, the color of
44 * the page might also change.
45 *
46 * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
47 * to temporarily map a patch so we can match the color.
48 */
49
50#if (DCACHE_WAY_SIZE > PAGE_SIZE)
51# define PAGE_COLOR_MASK (PAGE_MASK & (DCACHE_WAY_SIZE-1))
52# define PAGE_COLOR(a) \
53 (((unsigned long)(a)&PAGE_COLOR_MASK) >> PAGE_SHIFT)
54# define PAGE_COLOR_EQ(a,b) \
55 ((((unsigned long)(a) ^ (unsigned long)(b)) & PAGE_COLOR_MASK) == 0)
56# define PAGE_COLOR_MAP0(v) \
57 (VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK))
58# define PAGE_COLOR_MAP1(v) \
59 (VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK) + DCACHE_WAY_SIZE)
60#endif
61
62/*
63 * Allocating and freeing a pmd is trivial: the 1-entry pmd is
64 * inside the pgd, so has no extra memory associated with it.
65 */
66
67#define pgd_free(pgd) free_page((unsigned long)(pgd))
68
69#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
70
71static inline void
72pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *pte)
73{
74 pmd_val(*(pmdp)) = (unsigned long)(pte);
75 __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
76}
77
78static inline void
79pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *page)
80{
81 pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page);
82 __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
83}
84
85
86
87#else
88
89# define pmd_populate_kernel(mm, pmdp, pte) \
90 (pmd_val(*(pmdp)) = (unsigned long)(pte))
91# define pmd_populate(mm, pmdp, page) \
92 (pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page))
93
94#endif
95
96static inline pgd_t*
97pgd_alloc(struct mm_struct *mm)
98{
99 pgd_t *pgd;
100
101 pgd = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGD_ORDER);
102
103 if (likely(pgd != NULL))
104 __flush_dcache_page((unsigned long)pgd);
105
106 return pgd;
107}
108
109extern pte_t* pte_alloc_one_kernel(struct mm_struct* mm, unsigned long addr);
110extern struct page* pte_alloc_one(struct mm_struct* mm, unsigned long addr);
111
112#define pte_free_kernel(pte) free_page((unsigned long)pte)
113#define pte_free(pte) __free_page(pte)
114
115#endif /* __KERNEL__ */
116#endif /* _XTENSA_PGALLOC_H */
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h
new file mode 100644
index 000000000000..0bb6416ae266
--- /dev/null
+++ b/include/asm-xtensa/pgtable.h
@@ -0,0 +1,468 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PGTABLE_H
12#define _XTENSA_PGTABLE_H
13
14#include <asm-generic/pgtable-nopmd.h>
15#include <asm/page.h>
16
17/* Assertions. */
18
19#ifdef CONFIG_MMU
20
21
22#if (XCHAL_MMU_RINGS < 2)
23# error Linux build assumes at least 2 ring levels.
24#endif
25
26#if (XCHAL_MMU_CA_BITS != 4)
27# error We assume exactly four bits for CA.
28#endif
29
30#if (XCHAL_MMU_SR_BITS != 0)
31# error We have no room for SR bits.
32#endif
33
34/*
35 * Use the first min-wired way for mapping page-table pages.
36 * Page coloring requires a second min-wired way.
37 */
38
39#if (XCHAL_DTLB_MINWIRED_SETS == 0)
40# error Need a min-wired way for mapping page-table pages
41#endif
42
43#define DTLB_WAY_PGTABLE XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAY)
44
45#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
46# if XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAYS) >= 2
47# define DTLB_WAY_DCACHE_ALIAS0 (DTLB_WAY_PGTABLE + 1)
48# define DTLB_WAY_DCACHE_ALIAS1 (DTLB_WAY_PGTABLE + 2)
49# else
50# error Page coloring requires its own wired dtlb way!
51# endif
52#endif
53
54#endif /* CONFIG_MMU */
55
56/*
57 * We only use two ring levels, user and kernel space.
58 */
59
60#define USER_RING 1 /* user ring level */
61#define KERNEL_RING 0 /* kernel ring level */
62
63/*
64 * The Xtensa architecture port of Linux has a two-level page table system,
65 * i.e. the logical three-level Linux page table layout are folded.
66 * Each task has the following memory page tables:
67 *
68 * PGD table (page directory), ie. 3rd-level page table:
69 * One page (4 kB) of 1024 (PTRS_PER_PGD) pointers to PTE tables
70 * (Architectures that don't have the PMD folded point to the PMD tables)
71 *
72 * The pointer to the PGD table for a given task can be retrieved from
73 * the task structure (struct task_struct*) t, e.g. current():
74 * (t->mm ? t->mm : t->active_mm)->pgd
75 *
76 * PMD tables (page middle-directory), ie. 2nd-level page tables:
77 * Absent for the Xtensa architecture (folded, PTRS_PER_PMD == 1).
78 *
79 * PTE tables (page table entry), ie. 1st-level page tables:
80 * One page (4 kB) of 1024 (PTRS_PER_PTE) PTEs with a special PTE
81 * invalid_pte_table for absent mappings.
82 *
83 * The individual pages are 4 kB big with special pages for the empty_zero_page.
84 */
85#define PGDIR_SHIFT 22
86#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
87#define PGDIR_MASK (~(PGDIR_SIZE-1))
88
89/*
90 * Entries per page directory level: we use two-level, so
91 * we don't really have any PMD directory physically.
92 */
93#define PTRS_PER_PTE 1024
94#define PTRS_PER_PTE_SHIFT 10
95#define PTRS_PER_PMD 1
96#define PTRS_PER_PGD 1024
97#define PGD_ORDER 0
98#define PMD_ORDER 0
99#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
100#define FIRST_USER_ADDRESS XCHAL_SEG_MAPPABLE_VADDR
101#define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT)
102
103/* virtual memory area. We keep a distance to other memory regions to be
104 * on the safe side. We also use this area for cache aliasing.
105 */
106
107// FIXME: virtual memory area must be configuration-dependent
108
109#define VMALLOC_START 0xC0000000
110#define VMALLOC_END 0xC7FF0000
111
112/* Xtensa Linux config PTE layout (when present):
113 * 31-12: PPN
114 * 11-6: Software
115 * 5-4: RING
116 * 3-0: CA
117 *
118 * Similar to the Alpha and MIPS ports, we need to keep track of the ref
119 * and mod bits in software. We have a software "you can read
120 * from this page" bit, and a hardware one which actually lets the
121 * process read from the page. On the same token we have a software
122 * writable bit and the real hardware one which actually lets the
123 * process write to the page.
124 *
125 * See further below for PTE layout for swapped-out pages.
126 */
127
128#define _PAGE_VALID (1<<0) /* hardware: page is accessible */
129#define _PAGE_WRENABLE (1<<1) /* hardware: page is writable */
130
131/* None of these cache modes include MP coherency: */
132#define _PAGE_NO_CACHE (0<<2) /* bypass, non-speculative */
133#if XCHAL_DCACHE_IS_WRITEBACK
134# define _PAGE_WRITEBACK (1<<2) /* write back */
135# define _PAGE_WRITETHRU (2<<2) /* write through */
136#else
137# define _PAGE_WRITEBACK (1<<2) /* assume write through */
138# define _PAGE_WRITETHRU (1<<2)
139#endif
140#define _PAGE_NOALLOC (3<<2) /* don't allocate cache,if not cached */
141#define _CACHE_MASK (3<<2)
142
143#define _PAGE_USER (1<<4) /* user access (ring=1) */
144#define _PAGE_KERNEL (0<<4) /* kernel access (ring=0) */
145
146/* Software */
147#define _PAGE_RW (1<<6) /* software: page writable */
148#define _PAGE_DIRTY (1<<7) /* software: page dirty */
149#define _PAGE_ACCESSED (1<<8) /* software: page accessed (read) */
150#define _PAGE_FILE (1<<9) /* nonlinear file mapping*/
151
152#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _CACHE_MASK | _PAGE_DIRTY)
153#define _PAGE_PRESENT ( _PAGE_VALID | _PAGE_WRITEBACK | _PAGE_ACCESSED)
154
155#ifdef CONFIG_MMU
156
157# define PAGE_NONE __pgprot(_PAGE_PRESENT)
158# define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_RW)
159# define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER)
160# define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER)
161# define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_KERNEL | _PAGE_WRENABLE)
162# define PAGE_INVALID __pgprot(_PAGE_USER)
163
164# if (DCACHE_WAY_SIZE > PAGE_SIZE)
165# define PAGE_DIRECTORY __pgprot(_PAGE_VALID | _PAGE_ACCESSED | _PAGE_KERNEL)
166# else
167# define PAGE_DIRECTORY __pgprot(_PAGE_PRESENT | _PAGE_KERNEL)
168# endif
169
170#else /* no mmu */
171
172# define PAGE_NONE __pgprot(0)
173# define PAGE_SHARED __pgprot(0)
174# define PAGE_COPY __pgprot(0)
175# define PAGE_READONLY __pgprot(0)
176# define PAGE_KERNEL __pgprot(0)
177
178#endif
179
180/*
181 * On certain configurations of Xtensa MMUs (eg. the initial Linux config),
182 * the MMU can't do page protection for execute, and considers that the same as
183 * read. Also, write permissions may imply read permissions.
184 * What follows is the closest we can get by reasonable means..
185 * See linux/mm/mmap.c for protection_map[] array that uses these definitions.
186 */
187#define __P000 PAGE_NONE /* private --- */
188#define __P001 PAGE_READONLY /* private --r */
189#define __P010 PAGE_COPY /* private -w- */
190#define __P011 PAGE_COPY /* private -wr */
191#define __P100 PAGE_READONLY /* private x-- */
192#define __P101 PAGE_READONLY /* private x-r */
193#define __P110 PAGE_COPY /* private xw- */
194#define __P111 PAGE_COPY /* private xwr */
195
196#define __S000 PAGE_NONE /* shared --- */
197#define __S001 PAGE_READONLY /* shared --r */
198#define __S010 PAGE_SHARED /* shared -w- */
199#define __S011 PAGE_SHARED /* shared -wr */
200#define __S100 PAGE_READONLY /* shared x-- */
201#define __S101 PAGE_READONLY /* shared x-r */
202#define __S110 PAGE_SHARED /* shared xw- */
203#define __S111 PAGE_SHARED /* shared xwr */
204
205#ifndef __ASSEMBLY__
206
207#define pte_ERROR(e) \
208 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
209#define pgd_ERROR(e) \
210 printk("%s:%d: bad pgd entry %08lx.\n", __FILE__, __LINE__, pgd_val(e))
211
212extern unsigned long empty_zero_page[1024];
213
214#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
215
216extern pgd_t swapper_pg_dir[PAGE_SIZE/sizeof(pgd_t)];
217
218/*
219 * The pmd contains the kernel virtual address of the pte page.
220 */
221#define pmd_page_kernel(pmd) ((unsigned long)(pmd_val(pmd) & PAGE_MASK))
222#define pmd_page(pmd) virt_to_page(pmd_val(pmd))
223
224/*
225 * The following only work if pte_present() is true.
226 */
227#define pte_none(pte) (!(pte_val(pte) ^ _PAGE_USER))
228#define pte_present(pte) (pte_val(pte) & _PAGE_VALID)
229#define pte_clear(mm,addr,ptep) \
230 do { update_pte(ptep, __pte(_PAGE_USER)); } while(0)
231
232#define pmd_none(pmd) (!pmd_val(pmd))
233#define pmd_present(pmd) (pmd_val(pmd) & PAGE_MASK)
234#define pmd_clear(pmdp) do { set_pmd(pmdp, __pmd(0)); } while (0)
235#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
236
237/* Note: We use the _PAGE_USER bit to indicate write-protect kernel memory */
238
239static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
240static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
241static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
242static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
243static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
244static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~(_PAGE_RW | _PAGE_WRENABLE); return pte; }
245static inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_USER; return pte; }
246static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
247static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
248static inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; }
249static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
250static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
251static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pte; }
252
253/*
254 * Conversion functions: convert a page and protection to a page entry,
255 * and a page entry and page directory to the page they refer to.
256 */
257#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
258#define pte_same(a,b) (pte_val(a) == pte_val(b))
259#define pte_page(x) pfn_to_page(pte_pfn(x))
260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
262
263extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264{
265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
266}
267
268/*
269 * Certain architectures need to do special things when pte's
270 * within a page table are directly modified. Thus, the following
271 * hook is made available.
272 */
273static inline void update_pte(pte_t *ptep, pte_t pteval)
274{
275 *ptep = pteval;
276#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
277 __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (ptep));
278#endif
279}
280
281extern inline void
282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
283{
284 update_pte(ptep, pteval);
285}
286
287
288extern inline void
289set_pmd(pmd_t *pmdp, pmd_t pmdval)
290{
291 *pmdp = pmdval;
292#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
293 __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
294#endif
295}
296
297
298static inline int
299ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
300 pte_t *ptep)
301{
302 pte_t pte = *ptep;
303 if (!pte_young(pte))
304 return 0;
305 update_pte(ptep, pte_mkold(pte));
306 return 1;
307}
308
309static inline int
310ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
311 pte_t *ptep)
312{
313 pte_t pte = *ptep;
314 if (!pte_dirty(pte))
315 return 0;
316 update_pte(ptep, pte_mkclean(pte));
317 return 1;
318}
319
320static inline pte_t
321ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
322{
323 pte_t pte = *ptep;
324 pte_clear(mm, addr, ptep);
325 return pte;
326}
327
328static inline void
329ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
330{
331 pte_t pte = *ptep;
332 update_pte(ptep, pte_wrprotect(pte));
333}
334
335/* to find an entry in a kernel page-table-directory */
336#define pgd_offset_k(address) pgd_offset(&init_mm, address)
337
338/* to find an entry in a page-table-directory */
339#define pgd_offset(mm,address) ((mm)->pgd + pgd_index(address))
340
341#define pgd_index(address) ((address) >> PGDIR_SHIFT)
342
343/* Find an entry in the second-level page table.. */
344#define pmd_offset(dir,address) ((pmd_t*)(dir))
345
346/* Find an entry in the third-level page table.. */
347#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
348#define pte_offset_kernel(dir,addr) \
349 ((pte_t*) pmd_page_kernel(*(dir)) + pte_index(addr))
350#define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr))
351#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir),(addr))
352
353#define pte_unmap(pte) do { } while (0)
354#define pte_unmap_nested(pte) do { } while (0)
355
356
357/*
358 * Encode and decode a swap entry.
359 * Each PTE in a process VM's page table is either:
360 * "present" -- valid and not swapped out, protection bits are meaningful;
361 * "not present" -- which further subdivides in these two cases:
362 * "none" -- no mapping at all; identified by pte_none(), set by pte_clear(
363 * "swapped out" -- the page is swapped out, and the SWP macros below
364 * are used to store swap file info in the PTE itself.
365 *
366 * In the Xtensa processor MMU, any PTE entries in user space (or anywhere
367 * in virtual memory that can map differently across address spaces)
368 * must have a correct ring value that represents the RASID field that
369 * is changed when switching address spaces. Eg. such PTE entries cannot
370 * be set to ring zero, because that can cause a (global) kernel ASID
371 * entry to be created in the TLBs (even with invalid cache attribute),
372 * potentially causing a multihit exception when going back to another
373 * address space that mapped the same virtual address at another ring.
374 *
375 * SO: we avoid using ring bits (_PAGE_RING_MASK) in "not present" PTEs.
376 * We also avoid using the _PAGE_VALID bit which must be zero for non-present
377 * pages.
378 *
379 * We end up with the following available bits: 1..3 and 7..31.
380 * We don't bother with 1..3 for now (we can use them later if needed),
381 * and chose to allocate 6 bits for SWP_TYPE and the remaining 19 bits
382 * for SWP_OFFSET. At least 5 bits are needed for SWP_TYPE, because it
383 * is currently implemented as an index into swap_info[MAX_SWAPFILES]
384 * and MAX_SWAPFILES is currently defined as 32 in <linux/swap.h>.
385 * However, for some reason all other architectures in the 2.4 kernel
386 * reserve either 6, 7, or 8 bits so I'll not detract from that for now. :)
387 * SWP_OFFSET is an offset into the swap file in page-size units, so
388 * with 4 kB pages, 19 bits supports a maximum swap file size of 2 GB.
389 *
390 * FIXME: 2 GB isn't very big. Other bits can be used to allow
391 * larger swap sizes. In the meantime, it appears relatively easy to get
392 * around the 2 GB limitation by simply using multiple swap files.
393 */
394
395#define __swp_type(entry) (((entry).val >> 7) & 0x3f)
396#define __swp_offset(entry) ((entry).val >> 13)
397#define __swp_entry(type,offs) ((swp_entry_t) {((type) << 7) | ((offs) << 13)})
398#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
399#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
400
401#define PTE_FILE_MAX_BITS 29
402#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
403#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
404
405
406#endif /* !defined (__ASSEMBLY__) */
407
408
409#ifdef __ASSEMBLY__
410
411/* Assembly macro _PGD_INDEX is the same as C pgd_index(unsigned long),
412 * _PGD_OFFSET as C pgd_offset(struct mm_struct*, unsigned long),
413 * _PMD_OFFSET as C pmd_offset(pgd_t*, unsigned long)
414 * _PTE_OFFSET as C pte_offset(pmd_t*, unsigned long)
415 *
416 * Note: We require an additional temporary register which can be the same as
417 * the register that holds the address.
418 *
419 * ((pte_t*) ((unsigned long)(pmd_val(*pmd) & PAGE_MASK)) + pte_index(addr))
420 *
421 */
422#define _PGD_INDEX(rt,rs) extui rt, rs, PGDIR_SHIFT, 32-PGDIR_SHIFT
423#define _PTE_INDEX(rt,rs) extui rt, rs, PAGE_SHIFT, PTRS_PER_PTE_SHIFT
424
425#define _PGD_OFFSET(mm,adr,tmp) l32i mm, mm, MM_PGD; \
426 _PGD_INDEX(tmp, adr); \
427 addx4 mm, tmp, mm
428
429#define _PTE_OFFSET(pmd,adr,tmp) _PTE_INDEX(tmp, adr); \
430 srli pmd, pmd, PAGE_SHIFT; \
431 slli pmd, pmd, PAGE_SHIFT; \
432 addx4 pmd, tmp, pmd
433
434#else
435
436extern void paging_init(void);
437
438#define kern_addr_valid(addr) (1)
439
440extern void update_mmu_cache(struct vm_area_struct * vma,
441 unsigned long address, pte_t pte);
442
443/*
444 * remap a physical address `phys' of size `size' with page protection `prot'
445 * into virtual address `from'
446 */
447#define io_remap_page_range(vma,from,phys,size,prot) \
448 remap_pfn_range(vma, from, (phys) >> PAGE_SHIFT, size, prot)
449
450
451/* No page table caches to init */
452
453#define pgtable_cache_init() do { } while (0)
454
455typedef pte_t *pte_addr_t;
456
457#endif /* !defined (__ASSEMBLY__) */
458
459#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
460#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
461#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
462#define __HAVE_ARCH_PTEP_SET_WRPROTECT
463#define __HAVE_ARCH_PTEP_MKDIRTY
464#define __HAVE_ARCH_PTE_SAME
465
466#include <asm-generic/pgtable.h>
467
468#endif /* _XTENSA_PGTABLE_H */
diff --git a/include/asm-xtensa/poll.h b/include/asm-xtensa/poll.h
new file mode 100644
index 000000000000..dffe447534e0
--- /dev/null
+++ b/include/asm-xtensa/poll.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-xtensa/poll.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_POLL_H
12#define _XTENSA_POLL_H
13
14
15#define POLLIN 0x0001
16#define POLLPRI 0x0002
17#define POLLOUT 0x0004
18
19#define POLLERR 0x0008
20#define POLLHUP 0x0010
21#define POLLNVAL 0x0020
22
23#define POLLRDNORM 0x0040
24#define POLLRDBAND 0x0080
25#define POLLWRNORM POLLOUT
26#define POLLWRBAND 0x0100
27
28#define POLLMSG 0x0400
29#define POLLREMOVE 0x0800
30
31struct pollfd {
32 int fd;
33 short events;
34 short revents;
35};
36
37#endif /* _XTENSA_POLL_H */
diff --git a/include/asm-xtensa/posix_types.h b/include/asm-xtensa/posix_types.h
new file mode 100644
index 000000000000..2c816b0e7762
--- /dev/null
+++ b/include/asm-xtensa/posix_types.h
@@ -0,0 +1,123 @@
1/*
2 * include/asm-xtensa/posix_types.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Largely copied from include/asm-ppc/posix_types.h
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_POSIX_TYPES_H
14#define _XTENSA_POSIX_TYPES_H
15
16/*
17 * This file is generally used by user-level software, so you need to
18 * be a little careful about namespace pollution etc. Also, we cannot
19 * assume GCC is being used.
20 */
21
22typedef unsigned long __kernel_ino_t;
23typedef unsigned int __kernel_mode_t;
24typedef unsigned short __kernel_nlink_t;
25typedef long __kernel_off_t;
26typedef int __kernel_pid_t;
27typedef unsigned short __kernel_ipc_pid_t;
28typedef unsigned int __kernel_uid_t;
29typedef unsigned int __kernel_gid_t;
30typedef unsigned int __kernel_size_t;
31typedef int __kernel_ssize_t;
32typedef long __kernel_ptrdiff_t;
33typedef long __kernel_time_t;
34typedef long __kernel_suseconds_t;
35typedef long __kernel_clock_t;
36typedef int __kernel_timer_t;
37typedef int __kernel_clockid_t;
38typedef int __kernel_daddr_t;
39typedef char * __kernel_caddr_t;
40typedef unsigned short __kernel_uid16_t;
41typedef unsigned short __kernel_gid16_t;
42typedef unsigned int __kernel_uid32_t;
43typedef unsigned int __kernel_gid32_t;
44
45typedef unsigned short __kernel_old_uid_t;
46typedef unsigned short __kernel_old_gid_t;
47typedef unsigned short __kernel_old_dev_t;
48
49#ifdef __GNUC__
50typedef long long __kernel_loff_t;
51#endif
52
53typedef struct {
54 int val[2];
55} __kernel_fsid_t;
56
57#ifndef __GNUC__
58
59#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
60#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
61#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
62#define __FD_ZERO(set) \
63 ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
64
65#else /* __GNUC__ */
66
67#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
68 || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
69/* With GNU C, use inline functions instead so args are evaluated only once: */
70
71#undef __FD_SET
72static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
73{
74 unsigned long _tmp = fd / __NFDBITS;
75 unsigned long _rem = fd % __NFDBITS;
76 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
77}
78
79#undef __FD_CLR
80static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
81{
82 unsigned long _tmp = fd / __NFDBITS;
83 unsigned long _rem = fd % __NFDBITS;
84 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
85}
86
87#undef __FD_ISSET
88static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)
89{
90 unsigned long _tmp = fd / __NFDBITS;
91 unsigned long _rem = fd % __NFDBITS;
92 return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
93}
94
95/*
96 * This will unroll the loop for the normal constant case (8 ints,
97 * for a 256-bit fd_set)
98 */
99#undef __FD_ZERO
100static __inline__ void __FD_ZERO(__kernel_fd_set *p)
101{
102 unsigned int *tmp = (unsigned int *)p->fds_bits;
103 int i;
104
105 if (__builtin_constant_p(__FDSET_LONGS)) {
106 switch (__FDSET_LONGS) {
107 case 8:
108 tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0;
109 tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0;
110 return;
111 }
112 }
113 i = __FDSET_LONGS;
114 while (i) {
115 i--;
116 *tmp = 0;
117 tmp++;
118 }
119}
120
121#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
122#endif /* __GNUC__ */
123#endif /* _XTENSA_POSIX_TYPES_H */
diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h
new file mode 100644
index 000000000000..9cab5e4298b9
--- /dev/null
+++ b/include/asm-xtensa/processor.h
@@ -0,0 +1,205 @@
1/*
2 * include/asm-xtensa/processor.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PROCESSOR_H
12#define _XTENSA_PROCESSOR_H
13
14#ifdef __ASSEMBLY__
15#define _ASMLANGUAGE
16#endif
17
18#include <xtensa/config/core.h>
19#include <xtensa/config/specreg.h>
20#include <xtensa/config/tie.h>
21#include <xtensa/config/system.h>
22
23#include <asm/ptrace.h>
24#include <asm/types.h>
25#include <asm/coprocessor.h>
26
27/* Assertions. */
28
29#if (XCHAL_HAVE_WINDOWED != 1)
30#error Linux requires the Xtensa Windowed Registers Option.
31#endif
32
33/*
34 * User space process size: 1 GB.
35 * Windowed call ABI requires caller and callee to be located within the same
36 * 1 GB region. The C compiler places trampoline code on the stack for sources
37 * that take the address of a nested C function (a feature used by glibc), so
38 * the 1 GB requirement applies to the stack as well.
39 */
40
41#define TASK_SIZE 0x40000000
42
43/*
44 * General exception cause assigned to debug exceptions. Debug exceptions go
45 * to their own vector, rather than the general exception vectors (user,
46 * kernel, double); and their specific causes are reported via DEBUGCAUSE
47 * rather than EXCCAUSE. However it is sometimes convenient to redirect debug
48 * exceptions to the general exception mechanism. To do this, an otherwise
49 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
50 */
51
52#define EXCCAUSE_MAPPED_DEBUG 63
53
54/*
55 * We use DEPC also as a flag to distinguish between double and regular
56 * exceptions. For performance reasons, DEPC might contain the value of
57 * EXCCAUSE for regular exceptions, so we use this definition to mark a
58 * valid double exception address.
59 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
60 */
61
62#define VALID_DOUBLE_EXCEPTION_ADDRESS 64
63
64/* LOCKLEVEL defines the interrupt level that masks all
65 * general-purpose interrupts.
66 */
67#define LOCKLEVEL 1
68
69/* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
70 * registers
71 */
72#define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
73#define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
74
75#ifndef __ASSEMBLY__
76
77/* Build a valid return address for the specified call winsize.
78 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
79 */
80#define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
81
82/* Convert return address to a valid pc
83 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
84 */
85#define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
86
87typedef struct {
88 unsigned long seg;
89} mm_segment_t;
90
91struct thread_struct {
92
93 /* kernel's return address and stack pointer for context switching */
94 unsigned long ra; /* kernel's a0: return address and window call size */
95 unsigned long sp; /* kernel's a1: stack pointer */
96
97 mm_segment_t current_ds; /* see uaccess.h for example uses */
98
99 /* struct xtensa_cpuinfo info; */
100
101 unsigned long bad_vaddr; /* last user fault */
102 unsigned long bad_uaddr; /* last kernel fault accessing user space */
103 unsigned long error_code;
104
105 unsigned long ibreak[XCHAL_NUM_IBREAK];
106 unsigned long dbreaka[XCHAL_NUM_DBREAK];
107 unsigned long dbreakc[XCHAL_NUM_DBREAK];
108
109 /* Allocate storage for extra state and coprocessor state. */
110 unsigned char cp_save[XTENSA_CP_EXTRA_SIZE]
111 __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN)));
112
113 /* Make structure 16 bytes aligned. */
114 int align[0] __attribute__ ((aligned(16)));
115};
116
117
118/*
119 * Default implementation of macro that returns current
120 * instruction pointer ("program counter").
121 */
122#define current_text_addr() ({ __label__ _l; _l: &&_l;})
123
124
125/* This decides where the kernel will search for a free chunk of vm
126 * space during mmap's.
127 */
128#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
129
130#define INIT_THREAD \
131{ \
132 ra: 0, \
133 sp: sizeof(init_stack) + (long) &init_stack, \
134 current_ds: {0}, \
135 /*info: {0}, */ \
136 bad_vaddr: 0, \
137 bad_uaddr: 0, \
138 error_code: 0, \
139}
140
141
142/*
143 * Do necessary setup to start up a newly executed thread.
144 * Note: We set-up ps as if we did a call4 to the new pc.
145 * set_thread_state in signal.c depends on it.
146 */
147#define USER_PS_VALUE ( (1 << XCHAL_PS_WOE_SHIFT) + \
148 (1 << XCHAL_PS_CALLINC_SHIFT) + \
149 (USER_RING << XCHAL_PS_RING_SHIFT) + \
150 (1 << XCHAL_PS_PROGSTACK_SHIFT) + \
151 (1 << XCHAL_PS_EXCM_SHIFT) )
152
153/* Clearing a0 terminates the backtrace. */
154#define start_thread(regs, new_pc, new_sp) \
155 regs->pc = new_pc; \
156 regs->ps = USER_PS_VALUE; \
157 regs->areg[1] = new_sp; \
158 regs->areg[0] = 0; \
159 regs->wmask = 1; \
160 regs->depc = 0; \
161 regs->windowbase = 0; \
162 regs->windowstart = 1;
163
164/* Forward declaration */
165struct task_struct;
166struct mm_struct;
167
168// FIXME: do we need release_thread for CP??
169/* Free all resources held by a thread. */
170#define release_thread(thread) do { } while(0)
171
172// FIXME: do we need prepare_to_copy (lazy status) for CP??
173/* Prepare to copy thread state - unlazy all lazy status */
174#define prepare_to_copy(tsk) do { } while (0)
175
176/*
177 * create a kernel thread without removing it from tasklists
178 */
179extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
180
181/* Copy and release all segment info associated with a VM */
182
183#define copy_segments(p, mm) do { } while(0)
184#define release_segments(mm) do { } while(0)
185#define forget_segments() do { } while (0)
186
187#define thread_saved_pc(tsk) (xtensa_pt_regs(tsk)->pc)
188
189extern unsigned long get_wchan(struct task_struct *p);
190
191#define KSTK_EIP(tsk) (xtensa_pt_regs(tsk)->pc)
192#define KSTK_ESP(tsk) (xtensa_pt_regs(tsk)->areg[1])
193
194#define cpu_relax() do { } while (0)
195
196/* Special register access. */
197
198#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
199#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
200
201#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
202#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
203
204#endif /* __ASSEMBLY__ */
205#endif /* _XTENSA_PROCESSOR_H */
diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h
new file mode 100644
index 000000000000..2848a5ff8349
--- /dev/null
+++ b/include/asm-xtensa/ptrace.h
@@ -0,0 +1,135 @@
1/*
2 * include/asm-xtensa/ptrace.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PTRACE_H
12#define _XTENSA_PTRACE_H
13
14#include <xtensa/config/core.h>
15
16/*
17 * Kernel stack
18 *
19 * +-----------------------+ -------- STACK_SIZE
20 * | register file | |
21 * +-----------------------+ |
22 * | struct pt_regs | |
23 * +-----------------------+ | ------ PT_REGS_OFFSET
24 * double : 16 bytes spill area : | ^
25 * excetion :- - - - - - - - - - - -: | |
26 * frame : struct pt_regs : | |
27 * :- - - - - - - - - - - -: | |
28 * | | | |
29 * | memory stack | | |
30 * | | | |
31 * ~ ~ ~ ~
32 * ~ ~ ~ ~
33 * | | | |
34 * | | | |
35 * +-----------------------+ | | --- STACK_BIAS
36 * | struct task_struct | | | ^
37 * current --> +-----------------------+ | | |
38 * | struct thread_info | | | |
39 * +-----------------------+ --------
40 */
41
42#define KERNEL_STACK_SIZE (2 * PAGE_SIZE)
43
44/* Offsets for exception_handlers[] (3 x 64-entries x 4-byte tables). */
45
46#define EXC_TABLE_KSTK 0x004 /* Kernel Stack */
47#define EXC_TABLE_DOUBLE_SAVE 0x008 /* Double exception save area for a0 */
48#define EXC_TABLE_FIXUP 0x00c /* Fixup handler */
49#define EXC_TABLE_PARAM 0x010 /* For passing a parameter to fixup */
50#define EXC_TABLE_SYSCALL_SAVE 0x014 /* For fast syscall handler */
51#define EXC_TABLE_FAST_USER 0x100 /* Fast user exception handler */
52#define EXC_TABLE_FAST_KERNEL 0x200 /* Fast kernel exception handler */
53#define EXC_TABLE_DEFAULT 0x300 /* Default C-Handler */
54#define EXC_TABLE_SIZE 0x400
55
56/* Registers used by strace */
57
58#define REG_A_BASE 0xfc000000
59#define REG_AR_BASE 0x04000000
60#define REG_PC 0x14000000
61#define REG_PS 0x080000e6
62#define REG_WB 0x08000048
63#define REG_WS 0x08000049
64#define REG_LBEG 0x08000000
65#define REG_LEND 0x08000001
66#define REG_LCOUNT 0x08000002
67#define REG_SAR 0x08000003
68#define REG_DEPC 0x080000c0
69#define REG_EXCCAUSE 0x080000e8
70#define REG_EXCVADDR 0x080000ee
71#define SYSCALL_NR 0x1
72
73#define AR_REGNO_TO_A_REGNO(ar, wb) (ar - wb*4) & ~(XCHAL_NUM_AREGS - 1)
74
75/* Other PTRACE_ values defined in <linux/ptrace.h> using values 0-9,16,17,24 */
76
77#define PTRACE_GETREGS 12
78#define PTRACE_SETREGS 13
79#define PTRACE_GETFPREGS 14
80#define PTRACE_SETFPREGS 15
81#define PTRACE_GETFPREGSIZE 18
82
83#ifndef __ASSEMBLY__
84
85/*
86 * This struct defines the way the registers are stored on the
87 * kernel stack during a system call or other kernel entry.
88 */
89struct pt_regs {
90 unsigned long pc; /* 4 */
91 unsigned long ps; /* 8 */
92 unsigned long depc; /* 12 */
93 unsigned long exccause; /* 16 */
94 unsigned long excvaddr; /* 20 */
95 unsigned long debugcause; /* 24 */
96 unsigned long wmask; /* 28 */
97 unsigned long lbeg; /* 32 */
98 unsigned long lend; /* 36 */
99 unsigned long lcount; /* 40 */
100 unsigned long sar; /* 44 */
101 unsigned long windowbase; /* 48 */
102 unsigned long windowstart; /* 52 */
103 unsigned long syscall; /* 56 */
104 int reserved[2]; /* 64 */
105
106 /* Make sure the areg field is 16 bytes aligned. */
107 int align[0] __attribute__ ((aligned(16)));
108
109 /* current register frame.
110 * Note: The ESF for kernel exceptions ends after 16 registers!
111 */
112 unsigned long areg[16]; /* 128 (64) */
113};
114
115#ifdef __KERNEL__
116# define xtensa_pt_regs(tsk) ((struct pt_regs*) \
117 (((long)(tsk)->thread_info + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4)) - 1)
118# define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
119# define instruction_pointer(regs) ((regs)->pc)
120extern void show_regs(struct pt_regs *);
121
122# ifndef CONFIG_SMP
123# define profile_pc(regs) instruction_pointer(regs)
124# endif
125#endif /* __KERNEL__ */
126
127#else /* __ASSEMBLY__ */
128
129#ifdef __KERNEL__
130# include <asm/offsets.h>
131#define PT_REGS_OFFSET (KERNEL_STACK_SIZE - PT_USER_SIZE)
132#endif
133
134#endif /* !__ASSEMBLY__ */
135#endif /* _XTENSA_PTRACE_H */
diff --git a/include/asm-xtensa/resource.h b/include/asm-xtensa/resource.h
new file mode 100644
index 000000000000..17b5ab311771
--- /dev/null
+++ b/include/asm-xtensa/resource.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/resource.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_RESOURCE_H
12#define _XTENSA_RESOURCE_H
13
14#include <asm-generic/resource.h>
15
16#endif /* _XTENSA_RESOURCE_H */
diff --git a/include/asm-xtensa/rmap.h b/include/asm-xtensa/rmap.h
new file mode 100644
index 000000000000..649588b7e9ad
--- /dev/null
+++ b/include/asm-xtensa/rmap.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/rmap.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_RMAP_H
12#define _XTENSA_RMAP_H
13
14#include <asm-generic/rmap.h>
15
16#endif
diff --git a/include/asm-xtensa/rwsem.h b/include/asm-xtensa/rwsem.h
new file mode 100644
index 000000000000..3c02b0e033f0
--- /dev/null
+++ b/include/asm-xtensa/rwsem.h
@@ -0,0 +1,175 @@
1/*
2 * include/asm-xtensa/rwsem.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Largely copied from include/asm-ppc/rwsem.h
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_RWSEM_H
14#define _XTENSA_RWSEM_H
15
16#include <linux/list.h>
17#include <linux/spinlock.h>
18#include <asm/atomic.h>
19#include <asm/system.h>
20
21/*
22 * the semaphore definition
23 */
24struct rw_semaphore {
25 signed long count;
26#define RWSEM_UNLOCKED_VALUE 0x00000000
27#define RWSEM_ACTIVE_BIAS 0x00000001
28#define RWSEM_ACTIVE_MASK 0x0000ffff
29#define RWSEM_WAITING_BIAS (-0x00010000)
30#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
31#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
32 spinlock_t wait_lock;
33 struct list_head wait_list;
34#if RWSEM_DEBUG
35 int debug;
36#endif
37};
38
39/*
40 * initialisation
41 */
42#if RWSEM_DEBUG
43#define __RWSEM_DEBUG_INIT , 0
44#else
45#define __RWSEM_DEBUG_INIT /* */
46#endif
47
48#define __RWSEM_INITIALIZER(name) \
49 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
50 LIST_HEAD_INIT((name).wait_list) \
51 __RWSEM_DEBUG_INIT }
52
53#define DECLARE_RWSEM(name) \
54 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
55
56extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
57extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
58extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
59extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
60
61static inline void init_rwsem(struct rw_semaphore *sem)
62{
63 sem->count = RWSEM_UNLOCKED_VALUE;
64 spin_lock_init(&sem->wait_lock);
65 INIT_LIST_HEAD(&sem->wait_list);
66#if RWSEM_DEBUG
67 sem->debug = 0;
68#endif
69}
70
71/*
72 * lock for reading
73 */
74static inline void __down_read(struct rw_semaphore *sem)
75{
76 if (atomic_add_return(1,(atomic_t *)(&sem->count)) > 0)
77 smp_wmb();
78 else
79 rwsem_down_read_failed(sem);
80}
81
82static inline int __down_read_trylock(struct rw_semaphore *sem)
83{
84 int tmp;
85
86 while ((tmp = sem->count) >= 0) {
87 if (tmp == cmpxchg(&sem->count, tmp,
88 tmp + RWSEM_ACTIVE_READ_BIAS)) {
89 smp_wmb();
90 return 1;
91 }
92 }
93 return 0;
94}
95
96/*
97 * lock for writing
98 */
99static inline void __down_write(struct rw_semaphore *sem)
100{
101 int tmp;
102
103 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
104 (atomic_t *)(&sem->count));
105 if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
106 smp_wmb();
107 else
108 rwsem_down_write_failed(sem);
109}
110
111static inline int __down_write_trylock(struct rw_semaphore *sem)
112{
113 int tmp;
114
115 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
116 RWSEM_ACTIVE_WRITE_BIAS);
117 smp_wmb();
118 return tmp == RWSEM_UNLOCKED_VALUE;
119}
120
121/*
122 * unlock after reading
123 */
124static inline void __up_read(struct rw_semaphore *sem)
125{
126 int tmp;
127
128 smp_wmb();
129 tmp = atomic_sub_return(1,(atomic_t *)(&sem->count));
130 if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
131 rwsem_wake(sem);
132}
133
134/*
135 * unlock after writing
136 */
137static inline void __up_write(struct rw_semaphore *sem)
138{
139 smp_wmb();
140 if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
141 (atomic_t *)(&sem->count)) < 0)
142 rwsem_wake(sem);
143}
144
145/*
146 * implement atomic add functionality
147 */
148static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
149{
150 atomic_add(delta, (atomic_t *)(&sem->count));
151}
152
153/*
154 * downgrade write lock to read lock
155 */
156static inline void __downgrade_write(struct rw_semaphore *sem)
157{
158 int tmp;
159
160 smp_wmb();
161 tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
162 if (tmp < 0)
163 rwsem_downgrade_wake(sem);
164}
165
166/*
167 * implement exchange and add functionality
168 */
169static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
170{
171 smp_mb();
172 return atomic_add_return(delta, (atomic_t *)(&sem->count));
173}
174
175#endif /* _XTENSA_RWSEM_XADD_H */
diff --git a/include/asm-xtensa/scatterlist.h b/include/asm-xtensa/scatterlist.h
new file mode 100644
index 000000000000..38a2b9acd658
--- /dev/null
+++ b/include/asm-xtensa/scatterlist.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-xtensa/scatterlist.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SCATTERLIST_H
12#define _XTENSA_SCATTERLIST_H
13
14struct scatterlist {
15 struct page *page;
16 unsigned int offset;
17 dma_addr_t dma_address;
18 unsigned int length;
19};
20
21/*
22 * These macros should be used after a pci_map_sg call has been done
23 * to get bus addresses of each of the SG entries and their lengths.
24 * You should only work with the number of sg entries pci_map_sg
25 * returns, or alternatively stop on the first sg_dma_len(sg) which
26 * is 0.
27 */
28#define sg_dma_address(sg) ((sg)->dma_address)
29#define sg_dma_len(sg) ((sg)->length)
30
31
32#define ISA_DMA_THRESHOLD (~0UL)
33
34#endif /* _XTENSA_SCATTERLIST_H */
diff --git a/include/asm-xtensa/sections.h b/include/asm-xtensa/sections.h
new file mode 100644
index 000000000000..40b5191b55a2
--- /dev/null
+++ b/include/asm-xtensa/sections.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/sections.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SECTIONS_H
12#define _XTENSA_SECTIONS_H
13
14#include <asm-generic/sections.h>
15
16#endif /* _XTENSA_SECTIONS_H */
diff --git a/include/asm-xtensa/segment.h b/include/asm-xtensa/segment.h
new file mode 100644
index 000000000000..a2eb547a1a75
--- /dev/null
+++ b/include/asm-xtensa/segment.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/segment.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SEGMENT_H
12#define _XTENSA_SEGMENT_H
13
14#include <asm/uaccess.h>
15
16#endif /* _XTENSA_SEGEMENT_H */
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
new file mode 100644
index 000000000000..c8a7574a9a57
--- /dev/null
+++ b/include/asm-xtensa/semaphore.h
@@ -0,0 +1,129 @@
1/*
2 * linux/include/asm-xtensa/semaphore.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SEMAPHORE_H
12#define _XTENSA_SEMAPHORE_H
13
14#include <asm/atomic.h>
15#include <asm/system.h>
16#include <linux/wait.h>
17#include <linux/rwsem.h>
18
19struct semaphore {
20 atomic_t count;
21 int sleepers;
22 wait_queue_head_t wait;
23#if WAITQUEUE_DEBUG
24 long __magic;
25#endif
26};
27
28#if WAITQUEUE_DEBUG
29# define __SEM_DEBUG_INIT(name) \
30 , (int)&(name).__magic
31#else
32# define __SEM_DEBUG_INIT(name)
33#endif
34
35#define __SEMAPHORE_INITIALIZER(name,count) \
36 { ATOMIC_INIT(count), \
37 0, \
38 __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
39 __SEM_DEBUG_INIT(name) }
40
41#define __MUTEX_INITIALIZER(name) \
42 __SEMAPHORE_INITIALIZER(name, 1)
43
44#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
45 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
46
47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
49
50extern inline void sema_init (struct semaphore *sem, int val)
51{
52/*
53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
54 *
55 * i'd rather use the more flexible initialization above, but sadly
56 * GCC 2.7.2.3 emits a bogus warning. EGCS doesnt. Oh well.
57 */
58 atomic_set(&sem->count, val);
59 init_waitqueue_head(&sem->wait);
60#if WAITQUEUE_DEBUG
61 sem->__magic = (int)&sem->__magic;
62#endif
63}
64
65static inline void init_MUTEX (struct semaphore *sem)
66{
67 sema_init(sem, 1);
68}
69
70static inline void init_MUTEX_LOCKED (struct semaphore *sem)
71{
72 sema_init(sem, 0);
73}
74
75asmlinkage void __down(struct semaphore * sem);
76asmlinkage int __down_interruptible(struct semaphore * sem);
77asmlinkage int __down_trylock(struct semaphore * sem);
78asmlinkage void __up(struct semaphore * sem);
79
80extern spinlock_t semaphore_wake_lock;
81
82extern __inline__ void down(struct semaphore * sem)
83{
84#if WAITQUEUE_DEBUG
85 CHECK_MAGIC(sem->__magic);
86#endif
87
88 if (atomic_sub_return(1, &sem->count) < 0)
89 __down(sem);
90}
91
92extern __inline__ int down_interruptible(struct semaphore * sem)
93{
94 int ret = 0;
95#if WAITQUEUE_DEBUG
96 CHECK_MAGIC(sem->__magic);
97#endif
98
99 if (atomic_sub_return(1, &sem->count) < 0)
100 ret = __down_interruptible(sem);
101 return ret;
102}
103
104extern __inline__ int down_trylock(struct semaphore * sem)
105{
106 int ret = 0;
107#if WAITQUEUE_DEBUG
108 CHECK_MAGIC(sem->__magic);
109#endif
110
111 if (atomic_sub_return(1, &sem->count) < 0)
112 ret = __down_trylock(sem);
113 return ret;
114}
115
116/*
117 * Note! This is subtle. We jump to wake people up only if
118 * the semaphore was negative (== somebody was waiting on it).
119 */
120extern __inline__ void up(struct semaphore * sem)
121{
122#if WAITQUEUE_DEBUG
123 CHECK_MAGIC(sem->__magic);
124#endif
125 if (atomic_add_return(1, &sem->count) <= 0)
126 __up(sem);
127}
128
129#endif /* _XTENSA_SEMAPHORE_H */
diff --git a/include/asm-xtensa/sembuf.h b/include/asm-xtensa/sembuf.h
new file mode 100644
index 000000000000..2d26c47666fe
--- /dev/null
+++ b/include/asm-xtensa/sembuf.h
@@ -0,0 +1,44 @@
1/*
2 * include/asm-xtensa/sembuf.h
3 *
4 * The semid64_ds structure for Xtensa architecture.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 *
12 * Note extra padding because this structure is passed back and forth
13 * between kernel and user space.
14 *
15 * Pad space is left for:
16 * - 64-bit time_t to solve y2038 problem
17 * - 2 miscellaneous 32-bit values
18 *
19 */
20
21#ifndef _XTENSA_SEMBUF_H
22#define _XTENSA_SEMBUF_H
23
24#include <asm/byteorder.h>
25
26struct semid64_ds {
27 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
28#if XCHAL_HAVE_LE
29 __kernel_time_t sem_otime; /* last semop time */
30 unsigned long __unused1;
31 __kernel_time_t sem_ctime; /* last change time */
32 unsigned long __unused2;
33#else
34 unsigned long __unused1;
35 __kernel_time_t sem_otime; /* last semop time */
36 unsigned long __unused2;
37 __kernel_time_t sem_ctime; /* last change time */
38#endif
39 unsigned long sem_nsems; /* no. of semaphores in array */
40 unsigned long __unused3;
41 unsigned long __unused4;
42};
43
44#endif /* __ASM_XTENSA_SEMBUF_H */
diff --git a/include/asm-xtensa/serial.h b/include/asm-xtensa/serial.h
new file mode 100644
index 000000000000..ec04114fcf0b
--- /dev/null
+++ b/include/asm-xtensa/serial.h
@@ -0,0 +1,18 @@
1/*
2 * include/asm-xtensa/serial.h
3 *
4 * Configuration details for 8250, 16450, 16550, etc. serial ports
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_SERIAL_H
14#define _XTENSA_SERIAL_H
15
16#include <asm/platform/serial.h>
17
18#endif /* _XTENSA_SERIAL_H */
diff --git a/include/asm-xtensa/setup.h b/include/asm-xtensa/setup.h
new file mode 100644
index 000000000000..e3636520d8cc
--- /dev/null
+++ b/include/asm-xtensa/setup.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/setup.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SETUP_H
12#define _XTENSA_SETUP_H
13
14#define COMMAND_LINE_SIZE 256
15
16#endif
diff --git a/include/asm-xtensa/shmbuf.h b/include/asm-xtensa/shmbuf.h
new file mode 100644
index 000000000000..a30b81a4b933
--- /dev/null
+++ b/include/asm-xtensa/shmbuf.h
@@ -0,0 +1,50 @@
1/*
2 * include/asm-xtensa/shmbuf.h
3 *
4 * The shmid64_ds structure for Xtensa architecture.
5 * Note extra padding because this structure is passed back and forth
6 * between kernel and user space.
7 *
8 * Pad space is left for:
9 * - 64-bit time_t to solve y2038 problem
10 * - 2 miscellaneous 32-bit values
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 *
16 * Copyright (C) 2001 - 2005 Tensilica Inc.
17 */
18
19#ifndef _XTENSA_SHMBUF_H
20#define _XTENSA_SHMBUF_H
21
22struct shmid64_ds {
23 struct ipc64_perm shm_perm; /* operation perms */
24 size_t shm_segsz; /* size of segment (bytes) */
25 __kernel_time_t shm_atime; /* last attach time */
26 unsigned long __unused1;
27 __kernel_time_t shm_dtime; /* last detach time */
28 unsigned long __unused2;
29 __kernel_time_t shm_ctime; /* last change time */
30 unsigned long __unused3;
31 __kernel_pid_t shm_cpid; /* pid of creator */
32 __kernel_pid_t shm_lpid; /* pid of last operator */
33 unsigned long shm_nattch; /* no. of current attaches */
34 unsigned long __unused4;
35 unsigned long __unused5;
36};
37
38struct shminfo64 {
39 unsigned long shmmax;
40 unsigned long shmmin;
41 unsigned long shmmni;
42 unsigned long shmseg;
43 unsigned long shmall;
44 unsigned long __unused1;
45 unsigned long __unused2;
46 unsigned long __unused3;
47 unsigned long __unused4;
48};
49
50#endif /* _XTENSA_SHMBUF_H */
diff --git a/include/asm-xtensa/shmparam.h b/include/asm-xtensa/shmparam.h
new file mode 100644
index 000000000000..d3b65bfa71c3
--- /dev/null
+++ b/include/asm-xtensa/shmparam.h
@@ -0,0 +1,23 @@
1/*
2 * include/asm-xtensa/shmparam.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 */
8
9#ifndef _XTENSA_SHMPARAM_H
10#define _XTENSA_SHMPARAM_H
11
12#include <asm/processor.h>
13
14/*
15 * Xtensa can have variable size caches, and if
16 * the size of single way is larger than the page size,
17 * then we have to start worrying about cache aliasing
18 * problems.
19 */
20
21#define SHMLBA ((PAGE_SIZE > DCACHE_WAY_SIZE)? PAGE_SIZE : DCACHE_WAY_SIZE)
22
23#endif /* _XTENSA_SHMPARAM_H */
diff --git a/include/asm-xtensa/sigcontext.h b/include/asm-xtensa/sigcontext.h
new file mode 100644
index 000000000000..a75177291418
--- /dev/null
+++ b/include/asm-xtensa/sigcontext.h
@@ -0,0 +1,44 @@
1/*
2 * include/asm-xtensa/sigcontext.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2003 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SIGCONTEXT_H
12#define _XTENSA_SIGCONTEXT_H
13
14#define _ASMLANGUAGE
15#include <asm/processor.h>
16#include <asm/coprocessor.h>
17
18
19struct _cpstate {
20 unsigned char _cpstate[XTENSA_CP_EXTRA_SIZE];
21} __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
22
23
24struct sigcontext {
25 unsigned long oldmask;
26
27 /* CPU registers */
28 unsigned long sc_pc;
29 unsigned long sc_ps;
30 unsigned long sc_wmask;
31 unsigned long sc_windowbase;
32 unsigned long sc_windowstart;
33 unsigned long sc_lbeg;
34 unsigned long sc_lend;
35 unsigned long sc_lcount;
36 unsigned long sc_sar;
37 unsigned long sc_depc;
38 unsigned long sc_dareg0;
39 unsigned long sc_treg[4];
40 unsigned long sc_areg[XCHAL_NUM_AREGS];
41 struct _cpstate *sc_cpstate;
42};
43
44#endif /* __ASM_XTENSA_SIGCONTEXT_H */
diff --git a/include/asm-xtensa/siginfo.h b/include/asm-xtensa/siginfo.h
new file mode 100644
index 000000000000..44f0ae77b539
--- /dev/null
+++ b/include/asm-xtensa/siginfo.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/processor.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SIGINFO_H
12#define _XTENSA_SIGINFO_H
13
14#include <asm-generic/siginfo.h>
15
16#endif /* _XTENSA_SIGINFO_H */
diff --git a/include/asm-xtensa/signal.h b/include/asm-xtensa/signal.h
new file mode 100644
index 000000000000..5d6fc9cdf58d
--- /dev/null
+++ b/include/asm-xtensa/signal.h
@@ -0,0 +1,187 @@
1/*
2 * include/asm-xtensa/signal.h
3 *
4 * Swiped from SH.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_SIGNAL_H
14#define _XTENSA_SIGNAL_H
15
16
17#define _NSIG 64
18#define _NSIG_BPW 32
19#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
20
21#ifndef __ASSEMBLY__
22
23#include <linux/types.h>
24
25/* Avoid too many header ordering problems. */
26struct siginfo;
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28typedef struct {
29 unsigned long sig[_NSIG_WORDS];
30} sigset_t;
31
32#endif
33
34#define SIGHUP 1
35#define SIGINT 2
36#define SIGQUIT 3
37#define SIGILL 4
38#define SIGTRAP 5
39#define SIGABRT 6
40#define SIGIOT 6
41#define SIGBUS 7
42#define SIGFPE 8
43#define SIGKILL 9
44#define SIGUSR1 10
45#define SIGSEGV 11
46#define SIGUSR2 12
47#define SIGPIPE 13
48#define SIGALRM 14
49#define SIGTERM 15
50#define SIGSTKFLT 16
51#define SIGCHLD 17
52#define SIGCONT 18
53#define SIGSTOP 19
54#define SIGTSTP 20
55#define SIGTTIN 21
56#define SIGTTOU 22
57#define SIGURG 23
58#define SIGXCPU 24
59#define SIGXFSZ 25
60#define SIGVTALRM 26
61#define SIGPROF 27
62#define SIGWINCH 28
63#define SIGIO 29
64#define SIGPOLL SIGIO
65/* #define SIGLOST 29 */
66#define SIGPWR 30
67#define SIGSYS 31
68#define SIGUNUSED 31
69
70/* These should not be considered constants from userland. */
71#define SIGRTMIN 32
72#define SIGRTMAX (_NSIG-1)
73
74/*
75 * SA_FLAGS values:
76 *
77 * SA_ONSTACK indicates that a registered stack_t will be used.
78 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
79 * SA_RESTART flag to get restarting signals (which were the default long ago)
80 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
81 * SA_RESETHAND clears the handler when the signal is delivered.
82 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
83 * SA_NODEFER prevents the current signal from being masked in the handler.
84 *
85 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
86 * Unix names RESETHAND and NODEFER respectively.
87 */
88#define SA_NOCLDSTOP 0x00000001
89#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
90#define SA_SIGINFO 0x00000004
91#define SA_ONSTACK 0x08000000
92#define SA_RESTART 0x10000000
93#define SA_NODEFER 0x40000000
94#define SA_RESETHAND 0x80000000
95
96#define SA_NOMASK SA_NODEFER
97#define SA_ONESHOT SA_RESETHAND
98#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
99
100#define SA_RESTORER 0x04000000
101
102/*
103 * sigaltstack controls
104 */
105#define SS_ONSTACK 1
106#define SS_DISABLE 2
107
108#define MINSIGSTKSZ 2048
109#define SIGSTKSZ 8192
110
111#ifndef __ASSEMBLY__
112#ifdef __KERNEL__
113
114/*
115 * These values of sa_flags are used only by the kernel as part of the
116 * irq handling routines.
117 *
118 * SA_INTERRUPT is also used by the irq handling routines.
119 * SA_SHIRQ is for shared interrupt support on PCI and EISA.
120 */
121#define SA_PROBE SA_ONESHOT
122#define SA_SAMPLE_RANDOM SA_RESTART
123#define SA_SHIRQ 0x04000000
124#endif
125
126#define SIG_BLOCK 0 /* for blocking signals */
127#define SIG_UNBLOCK 1 /* for unblocking signals */
128#define SIG_SETMASK 2 /* for setting the signal mask */
129
130/* Type of a signal handler. */
131typedef void (*__sighandler_t)(int);
132
133#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
134#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
135#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
136
137#ifdef __KERNEL__
138struct old_sigaction {
139 __sighandler_t sa_handler;
140 old_sigset_t sa_mask;
141 unsigned long sa_flags;
142 void (*sa_restorer)(void);
143};
144
145struct sigaction {
146 __sighandler_t sa_handler;
147 unsigned long sa_flags;
148 void (*sa_restorer)(void);
149 sigset_t sa_mask; /* mask last for extensibility */
150};
151
152struct k_sigaction {
153 struct sigaction sa;
154};
155
156#else
157
158/* Here we must cater to libcs that poke about in kernel headers. */
159
160struct sigaction {
161 union {
162 __sighandler_t _sa_handler;
163 void (*_sa_sigaction)(int, struct siginfo *, void *);
164 } _u;
165 sigset_t sa_mask;
166 unsigned long sa_flags;
167 void (*sa_restorer)(void);
168};
169
170#define sa_handler _u._sa_handler
171#define sa_sigaction _u._sa_sigaction
172
173#endif /* __KERNEL__ */
174
175typedef struct sigaltstack {
176 void *ss_sp;
177 int ss_flags;
178 size_t ss_size;
179} stack_t;
180
181#ifdef __KERNEL__
182#include <asm/sigcontext.h>
183#define ptrace_signal_deliver(regs, cookie) do { } while (0)
184
185#endif /* __KERNEL__ */
186#endif /* __ASSEMBLY__ */
187#endif /* _XTENSA_SIGNAL_H */
diff --git a/include/asm-xtensa/smp.h b/include/asm-xtensa/smp.h
new file mode 100644
index 000000000000..83c569e3bdbd
--- /dev/null
+++ b/include/asm-xtensa/smp.h
@@ -0,0 +1,27 @@
1/*
2 * include/asm-xtensa/smp.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SMP_H
12#define _XTENSA_SMP_H
13
14extern struct xtensa_cpuinfo boot_cpu_data;
15
16#define cpu_data (&boot_cpu_data)
17#define current_cpu_data boot_cpu_data
18
19struct xtensa_cpuinfo {
20 unsigned long *pgd_cache;
21 unsigned long *pte_cache;
22 unsigned long pgtable_cache_sz;
23};
24
25#define cpu_logical_map(cpu) (cpu)
26
27#endif /* _XTENSA_SMP_H */
diff --git a/include/asm-xtensa/socket.h b/include/asm-xtensa/socket.h
new file mode 100644
index 000000000000..daccd05a14cd
--- /dev/null
+++ b/include/asm-xtensa/socket.h
@@ -0,0 +1,61 @@
1/*
2 * include/asm-xtensa/socket.h
3 *
4 * Copied from i386.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _XTENSA_SOCKET_H
12#define _XTENSA_SOCKET_H
13
14#include <asm/sockios.h>
15
16/* For setsockoptions(2) */
17#define SOL_SOCKET 1
18
19#define SO_DEBUG 1
20#define SO_REUSEADDR 2
21#define SO_TYPE 3
22#define SO_ERROR 4
23#define SO_DONTROUTE 5
24#define SO_BROADCAST 6
25#define SO_SNDBUF 7
26#define SO_RCVBUF 8
27#define SO_KEEPALIVE 9
28#define SO_OOBINLINE 10
29#define SO_NO_CHECK 11
30#define SO_PRIORITY 12
31#define SO_LINGER 13
32#define SO_BSDCOMPAT 14
33/* To add :#define SO_REUSEPORT 15 */
34#define SO_PASSCRED 16
35#define SO_PEERCRED 17
36#define SO_RCVLOWAT 18
37#define SO_SNDLOWAT 19
38#define SO_RCVTIMEO 20
39#define SO_SNDTIMEO 21
40
41/* Security levels - as per NRL IPv6 - don't actually do anything */
42
43#define SO_SECURITY_AUTHENTICATION 22
44#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
45#define SO_SECURITY_ENCRYPTION_NETWORK 24
46
47#define SO_BINDTODEVICE 25
48
49/* Socket filtering */
50
51#define SO_ATTACH_FILTER 26
52#define SO_DETACH_FILTER 27
53
54#define SO_PEERNAME 28
55#define SO_TIMESTAMP 29
56#define SCM_TIMESTAMP SO_TIMESTAMP
57
58#define SO_ACCEPTCONN 30
59#define SO_PEERSEC 31
60
61#endif /* _XTENSA_SOCKET_H */
diff --git a/include/asm-xtensa/sockios.h b/include/asm-xtensa/sockios.h
new file mode 100644
index 000000000000..20d2ba10ecd1
--- /dev/null
+++ b/include/asm-xtensa/sockios.h
@@ -0,0 +1,30 @@
1/*
2 * include/asm-xtensa/sockios.h
3 *
4 * Socket-level I/O control calls. Copied from MIPS.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1995 by Ralf Baechle
11 * Copyright (C) 2001 Tensilica Inc.
12 */
13
14#ifndef _XTENSA_SOCKIOS_H
15#define _XTENSA_SOCKIOS_H
16
17#include <asm/ioctl.h>
18
19/* Socket-level I/O control calls. */
20
21#define FIOGETOWN _IOR('f', 123, int)
22#define FIOSETOWN _IOW('f', 124, int)
23
24#define SIOCATMARK _IOR('s', 7, int)
25#define SIOCSPGRP _IOW('s', 8, pid_t)
26#define SIOCGPGRP _IOR('s', 9, pid_t)
27
28#define SIOCGSTAMP 0x8906 /* Get stamp - linux-specific */
29
30#endif /* _XTENSA_SOCKIOS_H */
diff --git a/include/asm-xtensa/spinlock.h b/include/asm-xtensa/spinlock.h
new file mode 100644
index 000000000000..8ff23649581b
--- /dev/null
+++ b/include/asm-xtensa/spinlock.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/spinlock.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SPINLOCK_H
12#define _XTENSA_SPINLOCK_H
13
14#include <linux/spinlock.h>
15
16#endif /* _XTENSA_SPINLOCK_H */
diff --git a/include/asm-xtensa/stat.h b/include/asm-xtensa/stat.h
new file mode 100644
index 000000000000..2f4662ff6c3a
--- /dev/null
+++ b/include/asm-xtensa/stat.h
@@ -0,0 +1,105 @@
1/*
2 * include/asm-xtensa/stat.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_STAT_H
12#define _XTENSA_STAT_H
13
14#include <linux/types.h>
15
16struct __old_kernel_stat {
17 unsigned short st_dev;
18 unsigned short st_ino;
19 unsigned short st_mode;
20 unsigned short st_nlink;
21 unsigned short st_uid;
22 unsigned short st_gid;
23 unsigned short st_rdev;
24 unsigned long st_size;
25 unsigned long st_atime;
26 unsigned long st_mtime;
27 unsigned long st_ctime;
28};
29
30#define STAT_HAVE_NSEC 1
31
32struct stat {
33 unsigned short st_dev;
34 unsigned short __pad1;
35 unsigned long st_ino;
36 unsigned short st_mode;
37 unsigned short st_nlink;
38 unsigned short st_uid;
39 unsigned short st_gid;
40 unsigned short st_rdev;
41 unsigned short __pad2;
42 unsigned long st_size;
43 unsigned long st_blksize;
44 unsigned long st_blocks;
45 unsigned long st_atime;
46 unsigned long st_atime_nsec;
47 unsigned long st_mtime;
48 unsigned long st_mtime_nsec;
49 unsigned long st_ctime;
50 unsigned long st_ctime_nsec;
51 unsigned long __unused4;
52 unsigned long __unused5;
53};
54
55/* This matches struct stat64 in glibc-2.2.3. */
56
57struct stat64 {
58#ifdef __XTENSA_EL__
59 unsigned short st_dev; /* Device */
60 unsigned char __pad0[10];
61#else
62 unsigned char __pad0[6];
63 unsigned short st_dev;
64 unsigned char __pad1[2];
65#endif
66
67#define STAT64_HAS_BROKEN_ST_INO 1
68 unsigned long __st_ino; /* 32bit file serial number. */
69
70 unsigned int st_mode; /* File mode. */
71 unsigned int st_nlink; /* Link count. */
72 unsigned int st_uid; /* User ID of the file's owner. */
73 unsigned int st_gid; /* Group ID of the file's group. */
74
75#ifdef __XTENSA_EL__
76 unsigned short st_rdev; /* Device number, if device. */
77 unsigned char __pad3[10];
78#else
79 unsigned char __pad2[6];
80 unsigned short st_rdev;
81 unsigned char __pad3[2];
82#endif
83
84 long long int st_size; /* Size of file, in bytes. */
85 long int st_blksize; /* Optimal block size for I/O. */
86
87#ifdef __XTENSA_EL__
88 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
89 unsigned long __pad4;
90#else
91 unsigned long __pad4;
92 unsigned long st_blocks;
93#endif
94
95 unsigned long __pad5;
96 long int st_atime; /* Time of last access. */
97 unsigned long st_atime_nsec;
98 long int st_mtime; /* Time of last modification. */
99 unsigned long st_mtime_nsec;
100 long int st_ctime; /* Time of last status change. */
101 unsigned long st_ctime_nsec;
102 unsigned long long int st_ino; /* File serial number. */
103};
104
105#endif /* _XTENSA_STAT_H */
diff --git a/include/asm-xtensa/statfs.h b/include/asm-xtensa/statfs.h
new file mode 100644
index 000000000000..9c3d1a213136
--- /dev/null
+++ b/include/asm-xtensa/statfs.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-xtensa/statfs.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_STATFS_H
12#define _XTENSA_STATFS_H
13
14#include <asm-generic/statfs.h>
15
16#endif /* _XTENSA_STATFS_H */
17
diff --git a/include/asm-xtensa/string.h b/include/asm-xtensa/string.h
new file mode 100644
index 000000000000..3f81b27d9809
--- /dev/null
+++ b/include/asm-xtensa/string.h
@@ -0,0 +1,124 @@
1/*
2 * include/asm-xtensa/string.h
3 *
4 * These trivial string functions are considered part of the public domain.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13/* We should optimize these. See arch/xtensa/lib/strncpy_user.S */
14
15#ifndef _XTENSA_STRING_H
16#define _XTENSA_STRING_H
17
18#define __HAVE_ARCH_STRCPY
19extern __inline__ char *strcpy(char *__dest, const char *__src)
20{
21 register char *__xdest = __dest;
22 unsigned long __dummy;
23
24 __asm__ __volatile__("1:\n\t"
25 "l8ui %2, %1, 0\n\t"
26 "s8i %2, %0, 0\n\t"
27 "addi %1, %1, 1\n\t"
28 "addi %0, %0, 1\n\t"
29 "bnez %2, 1b\n\t"
30 : "=r" (__dest), "=r" (__src), "=&r" (__dummy)
31 : "0" (__dest), "1" (__src)
32 : "memory");
33
34 return __xdest;
35}
36
37#define __HAVE_ARCH_STRNCPY
38extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n)
39{
40 register char *__xdest = __dest;
41 unsigned long __dummy;
42
43 if (__n == 0)
44 return __xdest;
45
46 __asm__ __volatile__(
47 "1:\n\t"
48 "l8ui %2, %1, 0\n\t"
49 "s8i %2, %0, 0\n\t"
50 "addi %1, %1, 1\n\t"
51 "addi %0, %0, 1\n\t"
52 "beqz %2, 2f\n\t"
53 "bne %1, %5, 1b\n"
54 "2:"
55 : "=r" (__dest), "=r" (__src), "=&r" (__dummy)
56 : "0" (__dest), "1" (__src), "r" (__src+__n)
57 : "memory");
58
59 return __xdest;
60}
61
62#define __HAVE_ARCH_STRCMP
63extern __inline__ int strcmp(const char *__cs, const char *__ct)
64{
65 register int __res;
66 unsigned long __dummy;
67
68 __asm__ __volatile__(
69 "1:\n\t"
70 "l8ui %3, %1, 0\n\t"
71 "addi %1, %1, 1\n\t"
72 "l8ui %2, %0, 0\n\t"
73 "addi %0, %0, 1\n\t"
74 "beqz %2, 2f\n\t"
75 "beq %2, %3, 1b\n"
76 "2:\n\t"
77 "sub %2, %3, %2"
78 : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy)
79 : "0" (__cs), "1" (__ct));
80
81 return __res;
82}
83
84#define __HAVE_ARCH_STRNCMP
85extern __inline__ int strncmp(const char *__cs, const char *__ct, size_t __n)
86{
87 register int __res;
88 unsigned long __dummy;
89
90 __asm__ __volatile__(
91 "mov %2, %3\n"
92 "1:\n\t"
93 "beq %0, %6, 2f\n\t"
94 "l8ui %3, %1, 0\n\t"
95 "addi %1, %1, 1\n\t"
96 "l8ui %2, %0, 0\n\t"
97 "addi %0, %0, 1\n\t"
98 "beqz %2, 2f\n\t"
99 "beqz %3, 2f\n\t"
100 "beq %2, %3, 1b\n"
101 "2:\n\t"
102 "sub %2, %3, %2"
103 : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&r" (__dummy)
104 : "0" (__cs), "1" (__ct), "r" (__cs+__n));
105
106 return __res;
107}
108
109#define __HAVE_ARCH_MEMSET
110extern void *memset(void *__s, int __c, size_t __count);
111
112#define __HAVE_ARCH_MEMCPY
113extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
114
115#define __HAVE_ARCH_MEMMOVE
116extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
117
118/* Don't build bcopy at all ... */
119#define __HAVE_ARCH_BCOPY
120
121#define __HAVE_ARCH_MEMSCAN
122#define memscan memchr
123
124#endif /* _XTENSA_STRING_H */
diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h
new file mode 100644
index 000000000000..690fe325e671
--- /dev/null
+++ b/include/asm-xtensa/system.h
@@ -0,0 +1,252 @@
1/*
2 * include/asm-xtensa/system.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_SYSTEM_H
12#define _XTENSA_SYSTEM_H
13
14#include <linux/config.h>
15#include <linux/stringify.h>
16
17#include <asm/processor.h>
18
19/* interrupt control */
20
21#define local_save_flags(x) \
22 __asm__ __volatile__ ("rsr %0,"__stringify(PS) : "=a" (x));
23#define local_irq_restore(x) do { \
24 __asm__ __volatile__ ("wsr %0, "__stringify(PS)" ; rsync" \
25 :: "a" (x) : "memory"); } while(0);
26#define local_irq_save(x) do { \
27 __asm__ __volatile__ ("rsil %0, "__stringify(LOCKLEVEL) \
28 : "=a" (x) :: "memory");} while(0);
29
30static inline void local_irq_disable(void)
31{
32 unsigned long flags;
33 __asm__ __volatile__ ("rsil %0, "__stringify(LOCKLEVEL)
34 : "=a" (flags) :: "memory");
35}
36static inline void local_irq_enable(void)
37{
38 unsigned long flags;
39 __asm__ __volatile__ ("rsil %0, 0" : "=a" (flags) :: "memory");
40
41}
42
43static inline int irqs_disabled(void)
44{
45 unsigned long flags;
46 local_save_flags(flags);
47 return flags & 0xf;
48}
49
50#define RSR_CPENABLE(x) do { \
51 __asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \
52 } while(0);
53#define WSR_CPENABLE(x) do { \
54 __asm__ __volatile__("wsr %0," __stringify(CPENABLE)";rsync" \
55 :: "a" (x));} while(0);
56
57#define clear_cpenable() __clear_cpenable()
58
59extern __inline__ void __clear_cpenable(void)
60{
61#if XCHAL_HAVE_CP
62 unsigned long i = 0;
63 WSR_CPENABLE(i);
64#endif
65}
66
67extern __inline__ void enable_coprocessor(int i)
68{
69#if XCHAL_HAVE_CP
70 int cp;
71 RSR_CPENABLE(cp);
72 cp |= 1 << i;
73 WSR_CPENABLE(cp);
74#endif
75}
76
77extern __inline__ void disable_coprocessor(int i)
78{
79#if XCHAL_HAVE_CP
80 int cp;
81 RSR_CPENABLE(cp);
82 cp &= ~(1 << i);
83 WSR_CPENABLE(cp);
84#endif
85}
86
87#define smp_read_barrier_depends() do { } while(0)
88#define read_barrier_depends() do { } while(0)
89
90#define mb() barrier()
91#define rmb() mb()
92#define wmb() mb()
93
94#ifdef CONFIG_SMP
95#error smp_* not defined
96#else
97#define smp_mb() barrier()
98#define smp_rmb() barrier()
99#define smp_wmb() barrier()
100#endif
101
102#define set_mb(var, value) do { var = value; mb(); } while (0)
103#define set_wmb(var, value) do { var = value; wmb(); } while (0)
104
105#if !defined (__ASSEMBLY__)
106
107/* * switch_to(n) should switch tasks to task nr n, first
108 * checking that n isn't the current task, in which case it does nothing.
109 */
110extern void *_switch_to(void *last, void *next);
111
112#endif /* __ASSEMBLY__ */
113
114#define prepare_to_switch() do { } while(0)
115
116#define switch_to(prev,next,last) \
117do { \
118 clear_cpenable(); \
119 (last) = _switch_to(prev, next); \
120} while(0)
121
122/*
123 * cmpxchg
124 */
125
126extern __inline__ unsigned long
127__cmpxchg_u32(volatile int *p, int old, int new)
128{
129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
130 "l32i %0, %1, 0 \n\t"
131 "bne %0, %2, 1f \n\t"
132 "s32i %3, %1, 0 \n\t"
133 "1: \n\t"
134 "wsr a15, "__stringify(PS)" \n\t"
135 "rsync \n\t"
136 : "=&a" (old)
137 : "a" (p), "a" (old), "r" (new)
138 : "a15", "memory");
139 return old;
140}
141/* This function doesn't exist, so you'll get a linker error
142 * if something tries to do an invalid cmpxchg(). */
143
144extern void __cmpxchg_called_with_bad_pointer(void);
145
146static __inline__ unsigned long
147__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
148{
149 switch (size) {
150 case 4: return __cmpxchg_u32(ptr, old, new);
151 default: __cmpxchg_called_with_bad_pointer();
152 return old;
153 }
154}
155
156#define cmpxchg(ptr,o,n) \
157 ({ __typeof__(*(ptr)) _o_ = (o); \
158 __typeof__(*(ptr)) _n_ = (n); \
159 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
160 (unsigned long)_n_, sizeof (*(ptr))); \
161 })
162
163
164
165
166/*
167 * xchg_u32
168 *
169 * Note that a15 is used here because the register allocation
170 * done by the compiler is not guaranteed and a window overflow
171 * may not occur between the rsil and wsr instructions. By using
172 * a15 in the rsil, the machine is guaranteed to be in a state
173 * where no register reference will cause an overflow.
174 */
175
176extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
177{
178 unsigned long tmp;
179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
180 "l32i %0, %1, 0 \n\t"
181 "s32i %2, %1, 0 \n\t"
182 "wsr a15, "__stringify(PS)" \n\t"
183 "rsync \n\t"
184 : "=&a" (tmp)
185 : "a" (m), "a" (val)
186 : "a15", "memory");
187 return tmp;
188}
189
190#define tas(ptr) (xchg((ptr),1))
191
192#if ( __XCC__ == 1 )
193
194/* xt-xcc processes __inline__ differently than xt-gcc and decides to
195 * insert an out-of-line copy of function __xchg. This presents the
196 * unresolved symbol at link time of __xchg_called_with_bad_pointer,
197 * even though such a function would never be called at run-time.
198 * xt-gcc always inlines __xchg, and optimizes away the undefined
199 * bad_pointer function.
200 */
201
202#define xchg(ptr,x) xchg_u32(ptr,x)
203
204#else /* assume xt-gcc */
205
206#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
207
208/*
209 * This only works if the compiler isn't horribly bad at optimizing.
210 * gcc-2.5.8 reportedly can't handle this, but I define that one to
211 * be dead anyway.
212 */
213
214extern void __xchg_called_with_bad_pointer(void);
215
216static __inline__ unsigned long
217__xchg(unsigned long x, volatile void * ptr, int size)
218{
219 switch (size) {
220 case 4:
221 return xchg_u32(ptr, x);
222 }
223 __xchg_called_with_bad_pointer();
224 return x;
225}
226
227#endif
228
229extern void set_except_vector(int n, void *addr);
230
231static inline void spill_registers(void)
232{
233 unsigned int a0, ps;
234
235 __asm__ __volatile__ (
236 "movi a14," __stringify (PS_EXCM_MASK) " | 1\n\t"
237 "mov a12, a0\n\t"
238 "rsr a13," __stringify(SAR) "\n\t"
239 "xsr a14," __stringify(PS) "\n\t"
240 "movi a0, _spill_registers\n\t"
241 "rsync\n\t"
242 "callx0 a0\n\t"
243 "mov a0, a12\n\t"
244 "wsr a13," __stringify(SAR) "\n\t"
245 "wsr a14," __stringify(PS) "\n\t"
246 :: "a" (&a0), "a" (&ps)
247 : "a2", "a3", "a12", "a13", "a14", "a15", "memory");
248}
249
250#define arch_align_stack(x) (x)
251
252#endif /* _XTENSA_SYSTEM_H */
diff --git a/include/asm-xtensa/termbits.h b/include/asm-xtensa/termbits.h
new file mode 100644
index 000000000000..c780593ff5f9
--- /dev/null
+++ b/include/asm-xtensa/termbits.h
@@ -0,0 +1,194 @@
1/*
2 * include/asm-xtensa/termbits.h
3 *
4 * Copied from SH.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_TERMBITS_H
14#define _XTENSA_TERMBITS_H
15
16
17#include <linux/posix_types.h>
18
19typedef unsigned char cc_t;
20typedef unsigned int speed_t;
21typedef unsigned int tcflag_t;
22
23#define NCCS 19
24struct termios {
25 tcflag_t c_iflag; /* input mode flags */
26 tcflag_t c_oflag; /* output mode flags */
27 tcflag_t c_cflag; /* control mode flags */
28 tcflag_t c_lflag; /* local mode flags */
29 cc_t c_line; /* line discipline */
30 cc_t c_cc[NCCS]; /* control characters */
31};
32
33/* c_cc characters */
34
35#define VINTR 0
36#define VQUIT 1
37#define VERASE 2
38#define VKILL 3
39#define VEOF 4
40#define VTIME 5
41#define VMIN 6
42#define VSWTC 7
43#define VSTART 8
44#define VSTOP 9
45#define VSUSP 10
46#define VEOL 11
47#define VREPRINT 12
48#define VDISCARD 13
49#define VWERASE 14
50#define VLNEXT 15
51#define VEOL2 16
52
53/* c_iflag bits */
54
55#define IGNBRK 0000001
56#define BRKINT 0000002
57#define IGNPAR 0000004
58#define PARMRK 0000010
59#define INPCK 0000020
60#define ISTRIP 0000040
61#define INLCR 0000100
62#define IGNCR 0000200
63#define ICRNL 0000400
64#define IUCLC 0001000
65#define IXON 0002000
66#define IXANY 0004000
67#define IXOFF 0010000
68#define IMAXBEL 0020000
69#define IUTF8 0040000
70
71/* c_oflag bits */
72
73#define OPOST 0000001
74#define OLCUC 0000002
75#define ONLCR 0000004
76#define OCRNL 0000010
77#define ONOCR 0000020
78#define ONLRET 0000040
79#define OFILL 0000100
80#define OFDEL 0000200
81#define NLDLY 0000400
82#define NL0 0000000
83#define NL1 0000400
84#define CRDLY 0003000
85#define CR0 0000000
86#define CR1 0001000
87#define CR2 0002000
88#define CR3 0003000
89#define TABDLY 0014000
90#define TAB0 0000000
91#define TAB1 0004000
92#define TAB2 0010000
93#define TAB3 0014000
94#define XTABS 0014000
95#define BSDLY 0020000
96#define BS0 0000000
97#define BS1 0020000
98#define VTDLY 0040000
99#define VT0 0000000
100#define VT1 0040000
101#define FFDLY 0100000
102#define FF0 0000000
103#define FF1 0100000
104
105/* c_cflag bit meaning */
106
107#define CBAUD 0010017
108#define B0 0000000 /* hang up */
109#define B50 0000001
110#define B75 0000002
111#define B110 0000003
112#define B134 0000004
113#define B150 0000005
114#define B200 0000006
115#define B300 0000007
116#define B600 0000010
117#define B1200 0000011
118#define B1800 0000012
119#define B2400 0000013
120#define B4800 0000014
121#define B9600 0000015
122#define B19200 0000016
123#define B38400 0000017
124#define EXTA B19200
125#define EXTB B38400
126#define CSIZE 0000060
127#define CS5 0000000
128#define CS6 0000020
129#define CS7 0000040
130#define CS8 0000060
131#define CSTOPB 0000100
132#define CREAD 0000200
133#define PARENB 0000400
134#define PARODD 0001000
135#define HUPCL 0002000
136#define CLOCAL 0004000
137#define CBAUDEX 0010000
138#define B57600 0010001
139#define B115200 0010002
140#define B230400 0010003
141#define B460800 0010004
142#define B500000 0010005
143#define B576000 0010006
144#define B921600 0010007
145#define B1000000 0010010
146#define B1152000 0010011
147#define B1500000 0010012
148#define B2000000 0010013
149#define B2500000 0010014
150#define B3000000 0010015
151#define B3500000 0010016
152#define B4000000 0010017
153#define CIBAUD 002003600000 /* input baud rate (not used) */
154#define CMSPAR 010000000000 /* mark or space (stick) parity */
155#define CRTSCTS 020000000000 /* flow control */
156
157/* c_lflag bits */
158
159#define ISIG 0000001
160#define ICANON 0000002
161#define XCASE 0000004
162#define ECHO 0000010
163#define ECHOE 0000020
164#define ECHOK 0000040
165#define ECHONL 0000100
166#define NOFLSH 0000200
167#define TOSTOP 0000400
168#define ECHOCTL 0001000
169#define ECHOPRT 0002000
170#define ECHOKE 0004000
171#define FLUSHO 0010000
172#define PENDIN 0040000
173#define IEXTEN 0100000
174
175/* tcflow() and TCXONC use these */
176
177#define TCOOFF 0
178#define TCOON 1
179#define TCIOFF 2
180#define TCION 3
181
182/* tcflush() and TCFLSH use these */
183
184#define TCIFLUSH 0
185#define TCOFLUSH 1
186#define TCIOFLUSH 2
187
188/* tcsetattr uses these */
189
190#define TCSANOW 0
191#define TCSADRAIN 1
192#define TCSAFLUSH 2
193
194#endif /* _XTENSA_TERMBITS_H */
diff --git a/include/asm-xtensa/termios.h b/include/asm-xtensa/termios.h
new file mode 100644
index 000000000000..83c6aed1d115
--- /dev/null
+++ b/include/asm-xtensa/termios.h
@@ -0,0 +1,122 @@
1/*
2 * include/asm-xtensa/termios.h
3 *
4 * Copied from SH.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_TERMIOS_H
14#define _XTENSA_TERMIOS_H
15
16#include <asm/termbits.h>
17#include <asm/ioctls.h>
18
19struct winsize {
20 unsigned short ws_row;
21 unsigned short ws_col;
22 unsigned short ws_xpixel;
23 unsigned short ws_ypixel;
24};
25
26#define NCC 8
27struct termio {
28 unsigned short c_iflag; /* input mode flags */
29 unsigned short c_oflag; /* output mode flags */
30 unsigned short c_cflag; /* control mode flags */
31 unsigned short c_lflag; /* local mode flags */
32 unsigned char c_line; /* line discipline */
33 unsigned char c_cc[NCC]; /* control characters */
34};
35
36/* Modem lines */
37
38#define TIOCM_LE 0x001
39#define TIOCM_DTR 0x002
40#define TIOCM_RTS 0x004
41#define TIOCM_ST 0x008
42#define TIOCM_SR 0x010
43#define TIOCM_CTS 0x020
44#define TIOCM_CAR 0x040
45#define TIOCM_RNG 0x080
46#define TIOCM_DSR 0x100
47#define TIOCM_CD TIOCM_CAR
48#define TIOCM_RI TIOCM_RNG
49#define TIOCM_OUT1 0x2000
50#define TIOCM_OUT2 0x4000
51#define TIOCM_LOOP 0x8000
52
53/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
54
55/* Line disciplines */
56
57#define N_TTY 0
58#define N_SLIP 1
59#define N_MOUSE 2
60#define N_PPP 3
61#define N_STRIP 4
62#define N_AX25 5
63#define N_X25 6 /* X.25 async */
64#define N_6PACK 7
65#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
66#define N_R3964 9 /* Reserved for Simatic R3964 module */
67#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
68#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
69#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
70#define N_HDLC 13 /* synchronous HDLC */
71#define N_SYNC_PPP 14
72#define N_HCI 15 /* Bluetooth HCI UART */
73
74#ifdef __KERNEL__
75
76/* intr=^C quit=^\ erase=del kill=^U
77 eof=^D vtime=\0 vmin=\1 sxtc=\0
78 start=^Q stop=^S susp=^Z eol=\0
79 reprint=^R discard=^U werase=^W lnext=^V
80 eol2=\0
81*/
82#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
83
84/*
85 * Translate a "termio" structure into a "termios". Ugh.
86 */
87
88#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
89 unsigned short __tmp; \
90 get_user(__tmp,&(termio)->x); \
91 *(unsigned short *) &(termios)->x = __tmp; \
92}
93
94#define user_termio_to_kernel_termios(termios, termio) \
95({ \
96 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
97 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
98 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
99 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
100 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
101})
102
103/*
104 * Translate a "termios" structure into a "termio". Ugh.
105 */
106
107#define kernel_termios_to_user_termio(termio, termios) \
108({ \
109 put_user((termios)->c_iflag, &(termio)->c_iflag); \
110 put_user((termios)->c_oflag, &(termio)->c_oflag); \
111 put_user((termios)->c_cflag, &(termio)->c_cflag); \
112 put_user((termios)->c_lflag, &(termio)->c_lflag); \
113 put_user((termios)->c_line, &(termio)->c_line); \
114 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
115})
116
117#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
118#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
119
120#endif /* __KERNEL__ */
121
122#endif /* _XTENSA_TERMIOS_H */
diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h
new file mode 100644
index 000000000000..af208d41fd82
--- /dev/null
+++ b/include/asm-xtensa/thread_info.h
@@ -0,0 +1,146 @@
1/*
2 * include/asm-xtensa/thread_info.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_THREAD_INFO_H
12#define _XTENSA_THREAD_INFO_H
13
14#ifdef __KERNEL__
15
16#ifndef __ASSEMBLY__
17# include <asm/processor.h>
18#endif
19
20/*
21 * low level task data that entry.S needs immediate access to
22 * - this struct should fit entirely inside of one cache line
23 * - this struct shares the supervisor stack pages
24 * - if the contents of this structure are changed, the assembly constants
25 * must also be changed
26 */
27
28#ifndef __ASSEMBLY__
29
30struct thread_info {
31 struct task_struct *task; /* main task structure */
32 struct exec_domain *exec_domain; /* execution domain */
33 unsigned long flags; /* low level flags */
34 unsigned long status; /* thread-synchronous flags */
35 __u32 cpu; /* current CPU */
36 __s32 preempt_count; /* 0 => preemptable,< 0 => BUG*/
37
38 mm_segment_t addr_limit; /* thread address space */
39 struct restart_block restart_block;
40
41
42};
43
44#else /* !__ASSEMBLY__ */
45
46/* offsets into the thread_info struct for assembly code access */
47#define TI_TASK 0x00000000
48#define TI_EXEC_DOMAIN 0x00000004
49#define TI_FLAGS 0x00000008
50#define TI_STATUS 0x0000000C
51#define TI_CPU 0x00000010
52#define TI_PRE_COUNT 0x00000014
53#define TI_ADDR_LIMIT 0x00000018
54#define TI_RESTART_BLOCK 0x000001C
55
56#endif
57
58#define PREEMPT_ACTIVE 0x10000000
59
60/*
61 * macros/functions for gaining access to the thread information structure
62 *
63 * preempt_count needs to be 1 initially, until the scheduler is functional.
64 */
65
66#ifndef __ASSEMBLY__
67
68#define INIT_THREAD_INFO(tsk) \
69{ \
70 .task = &tsk, \
71 .exec_domain = &default_exec_domain, \
72 .flags = 0, \
73 .cpu = 0, \
74 .preempt_count = 1, \
75 .addr_limit = KERNEL_DS, \
76 .restart_block = { \
77 .fn = do_no_restart_syscall, \
78 }, \
79}
80
81#define init_thread_info (init_thread_union.thread_info)
82#define init_stack (init_thread_union.stack)
83
84/* how to get the thread information struct from C */
85static inline struct thread_info *current_thread_info(void)
86{
87 struct thread_info *ti;
88 __asm__("extui %0,a1,0,13\n\t"
89 "xor %0, a1, %0" : "=&r" (ti) : );
90 return ti;
91}
92
93/* thread information allocation */
94#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
95#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
96#define get_thread_info(ti) get_task_struct((ti)->task)
97#define put_thread_info(ti) put_task_struct((ti)->task)
98
99#else /* !__ASSEMBLY__ */
100
101/* how to get the thread information struct from ASM */
102#define GET_THREAD_INFO(reg,sp) \
103 extui reg, sp, 0, 13; \
104 xor reg, sp, reg
105#endif
106
107
108/*
109 * thread information flags
110 * - these are process state flags that various assembly files may need to access
111 * - pending work-to-be-done flags are in LSW
112 * - other flags in MSW
113 */
114#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
115#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
116#define TIF_SIGPENDING 2 /* signal pending */
117#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
118#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
119#define TIF_IRET 5 /* return with iret */
120#define TIF_MEMDIE 6
121#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
122
123#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
124#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
125#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
126#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
127#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
128#define _TIF_IRET (1<<TIF_IRET)
129#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
130
131#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
132#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
133
134/*
135 * Thread-synchronous status.
136 *
137 * This is different from the flags in that nobody else
138 * ever touches our thread-synchronous status, so we don't
139 * have to worry about atomic accesses.
140 */
141#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
142
143#define THREAD_SIZE 8192 //(2*PAGE_SIZE)
144
145#endif /* __KERNEL__ */
146#endif /* _XTENSA_THREAD_INFO */
diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h
new file mode 100644
index 000000000000..d14a3755a12b
--- /dev/null
+++ b/include/asm-xtensa/timex.h
@@ -0,0 +1,94 @@
1/*
2 * include/asm-xtensa/timex.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TIMEX_H
12#define _XTENSA_TIMEX_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/stringify.h>
18
19#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
20# define LINUX_TIMER 0
21#elif XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
22# define LINUX_TIMER 1
23#elif XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
24# define LINUX_TIMER 2
25#else
26# error "Bad timer number for Linux configurations!"
27#endif
28
29#define LINUX_TIMER_INT XCHAL_TIMER_INTERRUPT(LINUX_TIMER)
30#define LINUX_TIMER_MASK (1L << LINUX_TIMER_INT)
31
32#define CLOCK_TICK_RATE 1193180 /* (everyone is using this value) */
33#define CLOCK_TICK_FACTOR 20 /* Factor of both 10^6 and CLOCK_TICK_RATE */
34#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
35 (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
36 << (SHIFT_SCALE-SHIFT_HZ)) / HZ)
37
38#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
39extern unsigned long ccount_per_jiffy;
40extern unsigned long ccount_nsec;
41#define CCOUNT_PER_JIFFY ccount_per_jiffy
42#define CCOUNT_NSEC ccount_nsec
43#else
44#define CCOUNT_PER_JIFFY (CONFIG_XTENSA_CPU_CLOCK*(1000000UL/HZ))
45#define CCOUNT_NSEC (1000000000UL / CONFIG_XTENSA_CPU_CLOCK)
46#endif
47
48
49typedef unsigned long long cycles_t;
50
51/*
52 * Only used for SMP.
53 */
54
55extern cycles_t cacheflush_time;
56
57#define get_cycles() (0)
58
59
60/*
61 * Register access.
62 */
63
64#define WSR_CCOUNT(r) __asm__("wsr %0,"__stringify(CCOUNT) :: "a" (r))
65#define RSR_CCOUNT(r) __asm__("rsr %0,"__stringify(CCOUNT) : "=a" (r))
66#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) :: "a"(r))
67#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) : "=a"(r))
68
69static inline unsigned long get_ccount (void)
70{
71 unsigned long ccount;
72 RSR_CCOUNT(ccount);
73 return ccount;
74}
75
76static inline void set_ccount (unsigned long ccount)
77{
78 WSR_CCOUNT(ccount);
79}
80
81static inline unsigned long get_linux_timer (void)
82{
83 unsigned ccompare;
84 RSR_CCOMPARE(LINUX_TIMER, ccompare);
85 return ccompare;
86}
87
88static inline void set_linux_timer (unsigned long ccompare)
89{
90 WSR_CCOMPARE(LINUX_TIMER, ccompare);
91}
92
93#endif /* __KERNEL__ */
94#endif /* _XTENSA_TIMEX_H */
diff --git a/include/asm-xtensa/tlb.h b/include/asm-xtensa/tlb.h
new file mode 100644
index 000000000000..4562b2dcfbc0
--- /dev/null
+++ b/include/asm-xtensa/tlb.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-xtensa/tlb.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TLB_H
12#define _XTENSA_TLB_H
13
14#define tlb_start_vma(tlb,vma) do { } while (0)
15#define tlb_end_vma(tlb,vma) do { } while (0)
16#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
17
18#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
19
20#include <asm-generic/tlb.h>
21#include <asm/page.h>
22
23#define __pte_free_tlb(tlb,pte) pte_free(pte)
24
25#endif /* _XTENSA_TLB_H */
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h
new file mode 100644
index 000000000000..23bfe9db45f5
--- /dev/null
+++ b/include/asm-xtensa/tlbflush.h
@@ -0,0 +1,200 @@
1/*
2 * include/asm-xtensa/tlbflush.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TLBFLUSH_H
12#define _XTENSA_TLBFLUSH_H
13
14#define DEBUG_TLB
15
16#ifdef __KERNEL__
17
18#include <asm/processor.h>
19#include <linux/stringify.h>
20
21/* TLB flushing:
22 *
23 * - flush_tlb_all() flushes all processes TLB entries
24 * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
25 * - flush_tlb_page(mm, vmaddr) flushes a single page
26 * - flush_tlb_range(mm, start, end) flushes a range of pages
27 */
28
29extern void flush_tlb_all(void);
30extern void flush_tlb_mm(struct mm_struct*);
31extern void flush_tlb_page(struct vm_area_struct*,unsigned long);
32extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
33
34#define flush_tlb_kernel_range(start,end) flush_tlb_all()
35
36
37/* This is calld in munmap when we have freed up some page-table pages.
38 * We don't need to do anything here, there's nothing special about our
39 * page-table pages.
40 */
41
42extern inline void flush_tlb_pgtables(struct mm_struct *mm,
43 unsigned long start, unsigned long end)
44{
45}
46
47/* TLB operations. */
48
49#define ITLB_WAYS_LOG2 XCHAL_ITLB_WAY_BITS
50#define DTLB_WAYS_LOG2 XCHAL_DTLB_WAY_BITS
51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2)
52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2)
53
54extern inline unsigned long itlb_probe(unsigned long addr)
55{
56 unsigned long tmp;
57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
58 return tmp;
59}
60
61extern inline unsigned long dtlb_probe(unsigned long addr)
62{
63 unsigned long tmp;
64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
65 return tmp;
66}
67
68extern inline void invalidate_itlb_entry (unsigned long probe)
69{
70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
71}
72
73extern inline void invalidate_dtlb_entry (unsigned long probe)
74{
75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
76}
77
78/* Use the .._no_isync functions with caution. Generally, these are
79 * handy for bulk invalidates followed by a single 'isync'. The
80 * caller must follow up with an 'isync', which can be relatively
81 * expensive on some Xtensa implementations.
82 */
83extern inline void invalidate_itlb_entry_no_isync (unsigned entry)
84{
85 /* Caller must follow up with 'isync'. */
86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
87}
88
89extern inline void invalidate_dtlb_entry_no_isync (unsigned entry)
90{
91 /* Caller must follow up with 'isync'. */
92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
93}
94
95extern inline void set_itlbcfg_register (unsigned long val)
96{
97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
98 : : "a" (val));
99}
100
101extern inline void set_dtlbcfg_register (unsigned long val)
102{
103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
104 : : "a" (val));
105}
106
107extern inline void set_ptevaddr_register (unsigned long val)
108{
109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
110 : : "a" (val));
111}
112
113extern inline unsigned long read_ptevaddr_register (void)
114{
115 unsigned long tmp;
116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
117 return tmp;
118}
119
120extern inline void write_dtlb_entry (pte_t entry, int way)
121{
122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
123 : : "r" (way), "r" (entry) );
124}
125
126extern inline void write_itlb_entry (pte_t entry, int way)
127{
128 __asm__ __volatile__("witlb %1, %0; isync\n\t"
129 : : "r" (way), "r" (entry) );
130}
131
132extern inline void invalidate_page_directory (void)
133{
134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE);
135}
136
137extern inline void invalidate_itlb_mapping (unsigned address)
138{
139 unsigned long tlb_entry;
140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS)
141 invalidate_itlb_entry (tlb_entry);
142}
143
144extern inline void invalidate_dtlb_mapping (unsigned address)
145{
146 unsigned long tlb_entry;
147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS)
148 invalidate_dtlb_entry (tlb_entry);
149}
150
151#define check_pgt_cache() do { } while (0)
152
153
154#ifdef DEBUG_TLB
155
156/* DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa
157 * ISA and exist only for test purposes..
158 * You may find it helpful for MMU debugging, however.
159 *
160 * 'at' is the unmodified input register
161 * 'as' is the output register, as follows (specific to the Linux config):
162 *
163 * as[31..12] contain the virtual address
164 * as[11..08] are meaningless
165 * as[07..00] contain the asid
166 */
167
168extern inline unsigned long read_dtlb_virtual (int way)
169{
170 unsigned long tmp;
171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
172 return tmp;
173}
174
175extern inline unsigned long read_dtlb_translation (int way)
176{
177 unsigned long tmp;
178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
179 return tmp;
180}
181
182extern inline unsigned long read_itlb_virtual (int way)
183{
184 unsigned long tmp;
185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
186 return tmp;
187}
188
189extern inline unsigned long read_itlb_translation (int way)
190{
191 unsigned long tmp;
192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
193 return tmp;
194}
195
196#endif /* DEBUG_TLB */
197
198
199#endif /* __KERNEL__ */
200#endif /* _XTENSA_PGALLOC_H */
diff --git a/include/asm-xtensa/topology.h b/include/asm-xtensa/topology.h
new file mode 100644
index 000000000000..7309e38a0ccb
--- /dev/null
+++ b/include/asm-xtensa/topology.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/topology.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TOPOLOGY_H
12#define _XTENSA_TOPOLOGY_H
13
14#include <asm-generic/topology.h>
15
16#endif /* _XTENSA_TOPOLOGY_H */
diff --git a/include/asm-xtensa/types.h b/include/asm-xtensa/types.h
new file mode 100644
index 000000000000..ebac00469852
--- /dev/null
+++ b/include/asm-xtensa/types.h
@@ -0,0 +1,66 @@
1/*
2 * include/asm-xtensa/types.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TYPES_H
12#define _XTENSA_TYPES_H
13
14#ifndef __ASSEMBLY__
15
16typedef unsigned short umode_t;
17
18/*
19 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
20 * header files exported to user space
21 */
22
23typedef __signed__ char __s8;
24typedef unsigned char __u8;
25
26typedef __signed__ short __s16;
27typedef unsigned short __u16;
28
29typedef __signed__ int __s32;
30typedef unsigned int __u32;
31
32#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
33typedef __signed__ long long __s64;
34typedef unsigned long long __u64;
35#endif
36
37/*
38 * These aren't exported outside the kernel to avoid name space clashes
39 */
40#ifdef __KERNEL__
41
42typedef __signed__ char s8;
43typedef unsigned char u8;
44
45typedef __signed__ short s16;
46typedef unsigned short u16;
47
48typedef __signed__ int s32;
49typedef unsigned int u32;
50
51typedef __signed__ long long s64;
52typedef unsigned long long u64;
53
54
55#define BITS_PER_LONG 32
56
57/* Dma addresses are 32-bits wide. */
58
59typedef u32 dma_addr_t;
60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */
64#endif
65
66#endif /* _XTENSA_TYPES_H */
diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h
new file mode 100644
index 000000000000..35576b25c7b2
--- /dev/null
+++ b/include/asm-xtensa/uaccess.h
@@ -0,0 +1,532 @@
1/*
2 * include/asm-xtensa/uaccess.h
3 *
4 * User space memory access functions
5 *
6 * These routines provide basic accessing functions to the user memory
7 * space for the kernel. This header file provides fuctions such as:
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 * Copyright (C) 2001 - 2005 Tensilica Inc.
14 */
15
16#ifndef _XTENSA_UACCESS_H
17#define _XTENSA_UACCESS_H
18
19#include <linux/errno.h>
20
21#define VERIFY_READ 0
22#define VERIFY_WRITE 1
23
24#ifdef __ASSEMBLY__
25
26#define _ASMLANGUAGE
27#include <asm/current.h>
28#include <asm/offsets.h>
29#include <asm/processor.h>
30
31/*
32 * These assembly macros mirror the C macros that follow below. They
33 * should always have identical functionality. See
34 * arch/xtensa/kernel/sys.S for usage.
35 */
36
37#define KERNEL_DS 0
38#define USER_DS 1
39
40#define get_ds (KERNEL_DS)
41
42/*
43 * get_fs reads current->thread.current_ds into a register.
44 * On Entry:
45 * <ad> anything
46 * <sp> stack
47 * On Exit:
48 * <ad> contains current->thread.current_ds
49 */
50 .macro get_fs ad, sp
51 GET_CURRENT(\ad,\sp)
52 l32i \ad, \ad, THREAD_CURRENT_DS
53 .endm
54
55/*
56 * set_fs sets current->thread.current_ds to some value.
57 * On Entry:
58 * <at> anything (temp register)
59 * <av> value to write
60 * <sp> stack
61 * On Exit:
62 * <at> destroyed (actually, current)
63 * <av> preserved, value to write
64 */
65 .macro set_fs at, av, sp
66 GET_CURRENT(\at,\sp)
67 s32i \av, \at, THREAD_CURRENT_DS
68 .endm
69
70/*
71 * kernel_ok determines whether we should bypass addr/size checking.
72 * See the equivalent C-macro version below for clarity.
73 * On success, kernel_ok branches to a label indicated by parameter
74 * <success>. This implies that the macro falls through to the next
75 * insruction on an error.
76 *
77 * Note that while this macro can be used independently, we designed
78 * in for optimal use in the access_ok macro below (i.e., we fall
79 * through on error).
80 *
81 * On Entry:
82 * <at> anything (temp register)
83 * <success> label to branch to on success; implies
84 * fall-through macro on error
85 * <sp> stack pointer
86 * On Exit:
87 * <at> destroyed (actually, current->thread.current_ds)
88 */
89
90#if ((KERNEL_DS != 0) || (USER_DS == 0))
91# error Assembly macro kernel_ok fails
92#endif
93 .macro kernel_ok at, sp, success
94 get_fs \at, \sp
95 beqz \at, \success
96 .endm
97
98/*
99 * user_ok determines whether the access to user-space memory is allowed.
100 * See the equivalent C-macro version below for clarity.
101 *
102 * On error, user_ok branches to a label indicated by parameter
103 * <error>. This implies that the macro falls through to the next
104 * instruction on success.
105 *
106 * Note that while this macro can be used independently, we designed
107 * in for optimal use in the access_ok macro below (i.e., we fall
108 * through on success).
109 *
110 * On Entry:
111 * <aa> register containing memory address
112 * <as> register containing memory size
113 * <at> temp register
114 * <error> label to branch to on error; implies fall-through
115 * macro on success
116 * On Exit:
117 * <aa> preserved
118 * <as> preserved
119 * <at> destroyed (actually, (TASK_SIZE + 1 - size))
120 */
121 .macro user_ok aa, as, at, error
122 movi \at, (TASK_SIZE+1)
123 bgeu \as, \at, \error
124 sub \at, \at, \as
125 bgeu \aa, \at, \error
126 .endm
127
128/*
129 * access_ok determines whether a memory access is allowed. See the
130 * equivalent C-macro version below for clarity.
131 *
132 * On error, access_ok branches to a label indicated by parameter
133 * <error>. This implies that the macro falls through to the next
134 * instruction on success.
135 *
136 * Note that we assume success is the common case, and we optimize the
137 * branch fall-through case on success.
138 *
139 * On Entry:
140 * <aa> register containing memory address
141 * <as> register containing memory size
142 * <at> temp register
143 * <sp>
144 * <error> label to branch to on error; implies fall-through
145 * macro on success
146 * On Exit:
147 * <aa> preserved
148 * <as> preserved
149 * <at> destroyed
150 */
151 .macro access_ok aa, as, at, sp, error
152 kernel_ok \at, \sp, .Laccess_ok_\@
153 user_ok \aa, \as, \at, \error
154.Laccess_ok_\@:
155 .endm
156
157/*
158 * verify_area determines whether a memory access is allowed. It's
159 * mostly an unnecessary wrapper for access_ok, but we provide it as a
160 * duplicate of the verify_area() C inline function below. See the
161 * equivalent C version below for clarity.
162 *
163 * On error, verify_area branches to a label indicated by parameter
164 * <error>. This implies that the macro falls through to the next
165 * instruction on success.
166 *
167 * Note that we assume success is the common case, and we optimize the
168 * branch fall-through case on success.
169 *
170 * On Entry:
171 * <aa> register containing memory address
172 * <as> register containing memory size
173 * <at> temp register
174 * <error> label to branch to on error; implies fall-through
175 * macro on success
176 * On Exit:
177 * <aa> preserved
178 * <as> preserved
179 * <at> destroyed
180 */
181 .macro verify_area aa, as, at, sp, error
182 access_ok \at, \aa, \as, \sp, \error
183 .endm
184
185
186#else /* __ASSEMBLY__ not defined */
187
188#include <linux/sched.h>
189#include <asm/types.h>
190
191/*
192 * The fs value determines whether argument validity checking should
193 * be performed or not. If get_fs() == USER_DS, checking is
194 * performed, with get_fs() == KERNEL_DS, checking is bypassed.
195 *
196 * For historical reasons (Data Segment Register?), these macros are
197 * grossly misnamed.
198 */
199
200#define KERNEL_DS ((mm_segment_t) { 0 })
201#define USER_DS ((mm_segment_t) { 1 })
202
203#define get_ds() (KERNEL_DS)
204#define get_fs() (current->thread.current_ds)
205#define set_fs(val) (current->thread.current_ds = (val))
206
207#define segment_eq(a,b) ((a).seg == (b).seg)
208
209#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
210#define __user_ok(addr,size) (((size) <= TASK_SIZE)&&((addr) <= TASK_SIZE-(size)))
211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
213
214extern inline int verify_area(int type, const void * addr, unsigned long size)
215{
216 return access_ok(type,addr,size) ? 0 : -EFAULT;
217}
218
219/*
220 * These are the main single-value transfer routines. They
221 * automatically use the right size if we just have the right pointer
222 * type.
223 *
224 * This gets kind of ugly. We want to return _two_ values in
225 * "get_user()" and yet we don't want to do any pointers, because that
226 * is too much of a performance impact. Thus we have a few rather ugly
227 * macros here, and hide all the uglyness from the user.
228 *
229 * Careful to not
230 * (a) re-use the arguments for side effects (sizeof is ok)
231 * (b) require any knowledge of processes at this stage
232 */
233#define put_user(x,ptr) __put_user_check((x),(ptr),sizeof(*(ptr)))
234#define get_user(x,ptr) __get_user_check((x),(ptr),sizeof(*(ptr)))
235
236/*
237 * The "__xxx" versions of the user access functions are versions that
238 * do not verify the address space, that must have been done previously
239 * with a separate "access_ok()" call (this is used when we do multiple
240 * accesses to the same area of user memory).
241 */
242#define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr)))
243#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
244
245
246extern long __put_user_bad(void);
247
248#define __put_user_nocheck(x,ptr,size) \
249({ \
250 long __pu_err; \
251 __put_user_size((x),(ptr),(size),__pu_err); \
252 __pu_err; \
253})
254
255#define __put_user_check(x,ptr,size) \
256({ \
257 long __pu_err = -EFAULT; \
258 __typeof__(*(ptr)) *__pu_addr = (ptr); \
259 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
260 __put_user_size((x),__pu_addr,(size),__pu_err); \
261 __pu_err; \
262})
263
264#define __put_user_size(x,ptr,size,retval) \
265do { \
266 retval = 0; \
267 switch (size) { \
268 case 1: __put_user_asm(x,ptr,retval,1,"s8i"); break; \
269 case 2: __put_user_asm(x,ptr,retval,2,"s16i"); break; \
270 case 4: __put_user_asm(x,ptr,retval,4,"s32i"); break; \
271 case 8: { \
272 __typeof__(*ptr) __v64 = x; \
273 retval = __copy_to_user(ptr,&__v64,8); \
274 break; \
275 } \
276 default: __put_user_bad(); \
277 } \
278} while (0)
279
280
281/*
282 * Consider a case of a user single load/store would cause both an
283 * unaligned exception and an MMU-related exception (unaligned
284 * exceptions happen first):
285 *
286 * User code passes a bad variable ptr to a system call.
287 * Kernel tries to access the variable.
288 * Unaligned exception occurs.
289 * Unaligned exception handler tries to make aligned accesses.
290 * Double exception occurs for MMU-related cause (e.g., page not mapped).
291 * do_page_fault() thinks the fault address belongs to the kernel, not the
292 * user, and panics.
293 *
294 * The kernel currently prohibits user unaligned accesses. We use the
295 * __check_align_* macros to check for unaligned addresses before
296 * accessing user space so we don't crash the kernel. Both
297 * __put_user_asm and __get_user_asm use these alignment macros, so
298 * macro-specific labels such as 0f, 1f, %0, %2, and %3 must stay in
299 * sync.
300 */
301
302#define __check_align_1 ""
303
304#define __check_align_2 \
305 " _bbci.l %2, 0, 1f \n" \
306 " movi %0, %3 \n" \
307 " _j 2f \n"
308
309#define __check_align_4 \
310 " _bbsi.l %2, 0, 0f \n" \
311 " _bbci.l %2, 1, 1f \n" \
312 "0: movi %0, %3 \n" \
313 " _j 2f \n"
314
315
316/*
317 * We don't tell gcc that we are accessing memory, but this is OK
318 * because we do not write to any memory gcc knows about, so there
319 * are no aliasing issues.
320 *
321 * WARNING: If you modify this macro at all, verify that the
322 * __check_align_* macros still work.
323 */
324#define __put_user_asm(x, addr, err, align, insn) \
325 __asm__ __volatile__( \
326 __check_align_##align \
327 "1: "insn" %1, %2, 0 \n" \
328 "2: \n" \
329 " .section .fixup,\"ax\" \n" \
330 " .align 4 \n" \
331 "4: \n" \
332 " .long 2b \n" \
333 "5: \n" \
334 " l32r %2, 4b \n" \
335 " movi %0, %3 \n" \
336 " jx %2 \n" \
337 " .previous \n" \
338 " .section __ex_table,\"a\" \n" \
339 " .long 1b, 5b \n" \
340 " .previous" \
341 :"=r" (err) \
342 :"r" ((int)(x)), "r" (addr), "i" (-EFAULT), "0" (err))
343
344#define __get_user_nocheck(x,ptr,size) \
345({ \
346 long __gu_err, __gu_val; \
347 __get_user_size(__gu_val,(ptr),(size),__gu_err); \
348 (x) = (__typeof__(*(ptr)))__gu_val; \
349 __gu_err; \
350})
351
352#define __get_user_check(x,ptr,size) \
353({ \
354 long __gu_err = -EFAULT, __gu_val = 0; \
355 const __typeof__(*(ptr)) *__gu_addr = (ptr); \
356 if (access_ok(VERIFY_READ,__gu_addr,size)) \
357 __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \
358 (x) = (__typeof__(*(ptr)))__gu_val; \
359 __gu_err; \
360})
361
362extern long __get_user_bad(void);
363
364#define __get_user_size(x,ptr,size,retval) \
365do { \
366 retval = 0; \
367 switch (size) { \
368 case 1: __get_user_asm(x,ptr,retval,1,"l8ui"); break; \
369 case 2: __get_user_asm(x,ptr,retval,2,"l16ui"); break; \
370 case 4: __get_user_asm(x,ptr,retval,4,"l32i"); break; \
371 case 8: retval = __copy_from_user(&x,ptr,8); break; \
372 default: (x) = __get_user_bad(); \
373 } \
374} while (0)
375
376
377/*
378 * WARNING: If you modify this macro at all, verify that the
379 * __check_align_* macros still work.
380 */
381#define __get_user_asm(x, addr, err, align, insn) \
382 __asm__ __volatile__( \
383 __check_align_##align \
384 "1: "insn" %1, %2, 0 \n" \
385 "2: \n" \
386 " .section .fixup,\"ax\" \n" \
387 " .align 4 \n" \
388 "4: \n" \
389 " .long 2b \n" \
390 "5: \n" \
391 " l32r %2, 4b \n" \
392 " movi %1, 0 \n" \
393 " movi %0, %3 \n" \
394 " jx %2 \n" \
395 " .previous \n" \
396 " .section __ex_table,\"a\" \n" \
397 " .long 1b, 5b \n" \
398 " .previous" \
399 :"=r" (err), "=r" (x) \
400 :"r" (addr), "i" (-EFAULT), "0" (err))
401
402
403/*
404 * Copy to/from user space
405 */
406
407/*
408 * We use a generic, arbitrary-sized copy subroutine. The Xtensa
409 * architecture would cause heavy code bloat if we tried to inline
410 * these functions and provide __constant_copy_* equivalents like the
411 * i386 versions. __xtensa_copy_user is quite efficient. See the
412 * .fixup section of __xtensa_copy_user for a discussion on the
413 * X_zeroing equivalents for Xtensa.
414 */
415
416extern unsigned __xtensa_copy_user(void *to, const void *from, unsigned n);
417#define __copy_user(to,from,size) __xtensa_copy_user(to,from,size)
418
419
420static inline unsigned long
421__generic_copy_from_user_nocheck(void *to, const void *from, unsigned long n)
422{
423 return __copy_user(to,from,n);
424}
425
426static inline unsigned long
427__generic_copy_to_user_nocheck(void *to, const void *from, unsigned long n)
428{
429 return __copy_user(to,from,n);
430}
431
432static inline unsigned long
433__generic_copy_to_user(void *to, const void *from, unsigned long n)
434{
435 prefetch(from);
436 if (access_ok(VERIFY_WRITE, to, n))
437 return __copy_user(to,from,n);
438 return n;
439}
440
441static inline unsigned long
442__generic_copy_from_user(void *to, const void *from, unsigned long n)
443{
444 prefetchw(to);
445 if (access_ok(VERIFY_READ, from, n))
446 return __copy_user(to,from,n);
447 else
448 memset(to, 0, n);
449 return n;
450}
451
452#define copy_to_user(to,from,n) __generic_copy_to_user((to),(from),(n))
453#define copy_from_user(to,from,n) __generic_copy_from_user((to),(from),(n))
454#define __copy_to_user(to,from,n) __generic_copy_to_user_nocheck((to),(from),(n))
455#define __copy_from_user(to,from,n) __generic_copy_from_user_nocheck((to),(from),(n))
456#define __copy_to_user_inatomic __copy_to_user
457#define __copy_from_user_inatomic __copy_from_user
458
459
460/*
461 * We need to return the number of bytes not cleared. Our memset()
462 * returns zero if a problem occurs while accessing user-space memory.
463 * In that event, return no memory cleared. Otherwise, zero for
464 * success.
465 */
466
467extern inline unsigned long
468__xtensa_clear_user(void *addr, unsigned long size)
469{
470 if ( ! memset(addr, 0, size) )
471 return size;
472 return 0;
473}
474
475extern inline unsigned long
476clear_user(void *addr, unsigned long size)
477{
478 if (access_ok(VERIFY_WRITE, addr, size))
479 return __xtensa_clear_user(addr, size);
480 return size ? -EFAULT : 0;
481}
482
483#define __clear_user __xtensa_clear_user
484
485
486extern long __strncpy_user(char *, const char *, long);
487#define __strncpy_from_user __strncpy_user
488
489extern inline long
490strncpy_from_user(char *dst, const char *src, long count)
491{
492 if (access_ok(VERIFY_READ, src, 1))
493 return __strncpy_from_user(dst, src, count);
494 return -EFAULT;
495}
496
497
498#define strlen_user(str) strnlen_user((str), TASK_SIZE - 1)
499
500/*
501 * Return the size of a string (including the ending 0!)
502 */
503extern long __strnlen_user(const char *, long);
504
505extern inline long strnlen_user(const char *str, long len)
506{
507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1;
508
509 if ((unsigned long)str > top)
510 return 0;
511 return __strnlen_user(str, len);
512}
513
514
515struct exception_table_entry
516{
517 unsigned long insn, fixup;
518};
519
520/* Returns 0 if exception not found and fixup.unit otherwise. */
521
522extern unsigned long search_exception_table(unsigned long addr);
523extern void sort_exception_table(void);
524
525/* Returns the new pc */
526#define fixup_exception(map_reg, fixup_unit, pc) \
527({ \
528 fixup_unit; \
529})
530
531#endif /* __ASSEMBLY__ */
532#endif /* _XTENSA_UACCESS_H */
diff --git a/include/asm-xtensa/ucontext.h b/include/asm-xtensa/ucontext.h
new file mode 100644
index 000000000000..94c94ed3e00a
--- /dev/null
+++ b/include/asm-xtensa/ucontext.h
@@ -0,0 +1,22 @@
1/*
2 * include/asm-xtensa/ucontext.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_UCONTEXT_H
12#define _XTENSA_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _XTENSA_UCONTEXT_H */
diff --git a/include/asm-xtensa/unaligned.h b/include/asm-xtensa/unaligned.h
new file mode 100644
index 000000000000..28220890d0a6
--- /dev/null
+++ b/include/asm-xtensa/unaligned.h
@@ -0,0 +1,28 @@
1/*
2 * include/asm-xtensa/unaligned.h
3 *
4 * Xtensa doesn't handle unaligned accesses efficiently.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_UNALIGNED_H
14#define _XTENSA_UNALIGNED_H
15
16#include <linux/string.h>
17
18/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
19
20#define get_unaligned(ptr) \
21 ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
22
23#define put_unaligned(val, ptr) \
24 ({ __typeof__(*(ptr)) __tmp = (val); \
25 memmove((ptr), &__tmp, sizeof(*(ptr))); \
26 (void)0; })
27
28#endif /* _XTENSA_UNALIGNED_H */
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
new file mode 100644
index 000000000000..64c64dd83ba4
--- /dev/null
+++ b/include/asm-xtensa/unistd.h
@@ -0,0 +1,537 @@
1/*
2 * include/asm-xtensa/unistd.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_UNISTD_H
12#define _XTENSA_UNISTD_H
13
14#include <linux/linkage.h>
15
16//#define __NR_setup 0 /* used only by init, to get system going */
17#define __NR_spill 0
18#define __NR_exit 1
19#define __NR_fork 2
20#define __NR_read 3
21#define __NR_write 4
22#define __NR_open 5
23#define __NR_close 6
24#define __NR_waitpid 7
25#define __NR_creat 8
26#define __NR_link 9
27#define __NR_unlink 10
28#define __NR_execve 11
29#define __NR_chdir 12
30#define __NR_time 13
31#define __NR_mknod 14
32#define __NR_chmod 15
33#define __NR_lchown 16
34#define __NR_break 17
35#define __NR_oldstat 18
36#define __NR_lseek 19
37#define __NR_getpid 20
38#define __NR_mount 21
39#define __NR_oldumount 22
40#define __NR_setuid 23
41#define __NR_getuid 24
42#define __NR_stime 25
43#define __NR_ptrace 26
44#define __NR_alarm 27
45#define __NR_oldfstat 28
46#define __NR_pause 29
47#define __NR_utime 30
48#define __NR_stty 31
49#define __NR_gtty 32
50#define __NR_access 33
51#define __NR_nice 34
52#define __NR_ftime 35
53#define __NR_sync 36
54#define __NR_kill 37
55#define __NR_rename 38
56#define __NR_mkdir 39
57#define __NR_rmdir 40
58#define __NR_dup 41
59#define __NR_pipe 42
60#define __NR_times 43
61#define __NR_prof 44
62#define __NR_brk 45
63#define __NR_setgid 46
64#define __NR_getgid 47
65#define __NR_signal 48
66#define __NR_geteuid 49
67#define __NR_getegid 50
68#define __NR_acct 51
69#define __NR_umount 52
70#define __NR_lock 53
71#define __NR_ioctl 54
72#define __NR_fcntl 55
73#define __NR_mpx 56
74#define __NR_setpgid 57
75#define __NR_ulimit 58
76#define __NR_oldolduname 59
77#define __NR_umask 60
78#define __NR_chroot 61
79#define __NR_ustat 62
80#define __NR_dup2 63
81#define __NR_getppid 64
82#define __NR_getpgrp 65
83#define __NR_setsid 66
84#define __NR_sigaction 67
85#define __NR_sgetmask 68
86#define __NR_ssetmask 69
87#define __NR_setreuid 70
88#define __NR_setregid 71
89#define __NR_sigsuspend 72
90#define __NR_sigpending 73
91#define __NR_sethostname 74
92#define __NR_setrlimit 75
93#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
94#define __NR_getrusage 77
95#define __NR_gettimeofday 78
96#define __NR_settimeofday 79
97#define __NR_getgroups 80
98#define __NR_setgroups 81
99#define __NR_select 82
100#define __NR_symlink 83
101#define __NR_oldlstat 84
102#define __NR_readlink 85
103#define __NR_uselib 86
104#define __NR_swapon 87
105#define __NR_reboot 88
106#define __NR_readdir 89
107#define __NR_mmap 90
108#define __NR_munmap 91
109#define __NR_truncate 92
110#define __NR_ftruncate 93
111#define __NR_fchmod 94
112#define __NR_fchown 95
113#define __NR_getpriority 96
114#define __NR_setpriority 97
115#define __NR_profil 98
116#define __NR_statfs 99
117#define __NR_fstatfs 100
118#define __NR_ioperm 101
119#define __NR_socketcall 102
120#define __NR_syslog 103
121#define __NR_setitimer 104
122#define __NR_getitimer 105
123#define __NR_stat 106
124#define __NR_lstat 107
125#define __NR_fstat 108
126#define __NR_olduname 109
127#define __NR_iopl 110
128#define __NR_vhangup 111
129#define __NR_idle 112
130#define __NR_vm86 113
131#define __NR_wait4 114
132#define __NR_swapoff 115
133#define __NR_sysinfo 116
134#define __NR_ipc 117
135#define __NR_fsync 118
136#define __NR_sigreturn 119
137#define __NR_clone 120
138#define __NR_setdomainname 121
139#define __NR_uname 122
140#define __NR_modify_ldt 123
141#define __NR_adjtimex 124
142#define __NR_mprotect 125
143#define __NR_sigprocmask 126
144#define __NR_create_module 127
145#define __NR_init_module 128
146#define __NR_delete_module 129
147#define __NR_get_kernel_syms 130
148#define __NR_quotactl 131
149#define __NR_getpgid 132
150#define __NR_fchdir 133
151#define __NR_bdflush 134
152#define __NR_sysfs 135
153#define __NR_personality 136
154#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
155#define __NR_setfsuid 138
156#define __NR_setfsgid 139
157#define __NR__llseek 140
158#define __NR_getdents 141
159#define __NR__newselect 142
160#define __NR_flock 143
161#define __NR_msync 144
162#define __NR_readv 145
163#define __NR_writev 146
164#define __NR_cacheflush 147
165#define __NR_cachectl 148
166#define __NR_sysxtensa 149
167#define __NR_sysdummy 150
168#define __NR_getsid 151
169#define __NR_fdatasync 152
170#define __NR__sysctl 153
171#define __NR_mlock 154
172#define __NR_munlock 155
173#define __NR_mlockall 156
174#define __NR_munlockall 157
175#define __NR_sched_setparam 158
176#define __NR_sched_getparam 159
177#define __NR_sched_setscheduler 160
178#define __NR_sched_getscheduler 161
179#define __NR_sched_yield 162
180#define __NR_sched_get_priority_max 163
181#define __NR_sched_get_priority_min 164
182#define __NR_sched_rr_get_interval 165
183#define __NR_nanosleep 166
184#define __NR_mremap 167
185#define __NR_accept 168
186#define __NR_bind 169
187#define __NR_connect 170
188#define __NR_getpeername 171
189#define __NR_getsockname 172
190#define __NR_getsockopt 173
191#define __NR_listen 174
192#define __NR_recv 175
193#define __NR_recvfrom 176
194#define __NR_recvmsg 177
195#define __NR_send 178
196#define __NR_sendmsg 179
197#define __NR_sendto 180
198#define __NR_setsockopt 181
199#define __NR_shutdown 182
200#define __NR_socket 183
201#define __NR_socketpair 184
202#define __NR_setresuid 185
203#define __NR_getresuid 186
204#define __NR_query_module 187
205#define __NR_poll 188
206#define __NR_nfsservctl 189
207#define __NR_setresgid 190
208#define __NR_getresgid 191
209#define __NR_prctl 192
210#define __NR_rt_sigreturn 193
211#define __NR_rt_sigaction 194
212#define __NR_rt_sigprocmask 195
213#define __NR_rt_sigpending 196
214#define __NR_rt_sigtimedwait 197
215#define __NR_rt_sigqueueinfo 198
216#define __NR_rt_sigsuspend 199
217#define __NR_pread 200
218#define __NR_pwrite 201
219#define __NR_chown 202
220#define __NR_getcwd 203
221#define __NR_capget 204
222#define __NR_capset 205
223#define __NR_sigaltstack 206
224#define __NR_sendfile 207
225#define __NR_streams1 208 /* some people actually want it */
226#define __NR_streams2 209 /* some people actually want it */
227#define __NR_mmap2 210
228#define __NR_truncate64 211
229#define __NR_ftruncate64 212
230#define __NR_stat64 213
231#define __NR_lstat64 214
232#define __NR_fstat64 215
233#define __NR_pivot_root 216
234#define __NR_mincore 217
235#define __NR_madvise 218
236#define __NR_getdents64 219
237#define __NR_vfork 220
238
239/* Keep this last; should always equal the last valid call number. */
240#define __NR_Linux_syscalls 220
241
242/* user-visible error numbers are in the range -1 - -125: see
243 * <asm-xtensa/errno.h> */
244
245#define SYSXTENSA_RESERVED 0 /* don't use this */
246#define SYSXTENSA_ATOMIC_SET 1 /* set variable */
247#define SYSXTENSA_ATOMIC_EXG_ADD 2 /* exchange memory and add */
248#define SYSXTENSA_ATOMIC_ADD 3 /* add to memory */
249#define SYSXTENSA_ATOMIC_CMP_SWP 4 /* compare and swap */
250
251#define SYSXTENSA_COUNT 5 /* count of syscall0 functions*/
252
253#ifdef __KERNEL__
254#define __syscall_return(type, res) return ((type)(res))
255#else
256#define __syscall_return(type, res) \
257do { \
258 if ((unsigned long)(res) >= (unsigned long)(-125)) { \
259 /* Avoid using "res" which is declared to be in register r2; \
260 * errno might expand to a function call and clobber it. */ \
261 int __err = -(res); \
262 errno = __err; \
263 res = -1; \
264 } \
265 return (type) (res); \
266} while (0)
267#endif
268
269
270/* Tensilica's xt-xcc compiler is much more agressive at code
271 * optimization than gcc. Multiple __asm__ statements are
272 * insufficient for xt-xcc because subsequent optimization passes
273 * (beyond the front-end that knows of __asm__ statements and other
274 * such GNU Extensions to C) can modify the register selection for
275 * containment of C variables.
276 *
277 * xt-xcc cannot modify the contents of a single __asm__ statement, so
278 * we create single-asm versions of the syscall macros that are
279 * suitable and optimal for both xt-xcc and gcc.
280 *
281 * Linux takes system-call arguments in registers. The following
282 * design is optimized for user-land apps (e.g., glibc) which
283 * typically have a function wrapper around the "syscall" assembly
284 * instruction. It satisfies the Xtensa ABI while minizing argument
285 * shifting.
286 *
287 * The Xtensa ABI and software conventions require the system-call
288 * number in a2. If an argument exists in a2, we move it to the next
289 * available register. Note that for improved efficiency, we do NOT
290 * shift all parameters down one register to maintain the original
291 * order.
292 *
293 * At best case (zero arguments), we just write the syscall number to
294 * a2. At worst case (1 to 6 arguments), we move the argument in a2
295 * to the next available register, then write the syscall number to
296 * a2.
297 *
298 * For clarity, the following truth table enumerates all possibilities.
299 *
300 * arguments syscall number arg0, arg1, arg2, arg3, arg4, arg5
301 * --------- -------------- ----------------------------------
302 * 0 a2
303 * 1 a2 a3
304 * 2 a2 a4, a3
305 * 3 a2 a5, a3, a4
306 * 4 a2 a6, a3, a4, a5
307 * 5 a2 a7, a3, a4, a5, a6
308 * 6 a2 a8, a3, a4, a5, a6, a7
309 */
310
311#define _syscall0(type,name) \
312type name(void) \
313{ \
314long __res; \
315__asm__ __volatile__ ( \
316 " movi a2, %1 \n" \
317 " syscall \n" \
318 " mov %0, a2 \n" \
319 : "=a" (__res) \
320 : "i" (__NR_##name) \
321 : "a2" \
322 ); \
323__syscall_return(type,__res); \
324}
325
326#define _syscall1(type,name,type0,arg0) \
327type name(type0 arg0) \
328{ \
329long __res; \
330__asm__ __volatile__ ( \
331 " mov a3, %2 \n" \
332 " movi a2, %1 \n" \
333 " syscall \n" \
334 " mov %0, a2 \n" \
335 : "=a" (__res) \
336 : "i" (__NR_##name), "a" (arg0) \
337 : "a2", "a3" \
338 ); \
339__syscall_return(type,__res); \
340}
341
342#define _syscall2(type,name,type0,arg0,type1,arg1) \
343type name(type0 arg0,type1 arg1) \
344{ \
345long __res; \
346__asm__ __volatile__ ( \
347 " mov a4, %2 \n" \
348 " mov a3, %3 \n" \
349 " movi a2, %1 \n" \
350 " syscall \n" \
351 " mov %0, a2 \n" \
352 : "=a" (__res) \
353 : "i" (__NR_##name), "a" (arg0), "a" (arg1) \
354 : "a2", "a3", "a4" \
355 ); \
356__syscall_return(type,__res); \
357}
358
359#define _syscall3(type,name,type0,arg0,type1,arg1,type2,arg2) \
360type name(type0 arg0,type1 arg1,type2 arg2) \
361{ \
362long __res; \
363__asm__ __volatile__ ( \
364 " mov a5, %2 \n" \
365 " mov a4, %4 \n" \
366 " mov a3, %3 \n" \
367 " movi a2, %1 \n" \
368 " syscall \n" \
369 " mov %0, a2 \n" \
370 : "=a" (__res) \
371 : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2) \
372 : "a2", "a3", "a4", "a5" \
373 ); \
374__syscall_return(type,__res); \
375}
376
377#define _syscall4(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3) \
378type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3) \
379{ \
380long __res; \
381__asm__ __volatile__ ( \
382 " mov a6, %2 \n" \
383 " mov a5, %5 \n" \
384 " mov a4, %4 \n" \
385 " mov a3, %3 \n" \
386 " movi a2, %1 \n" \
387 " syscall \n" \
388 " mov %0, a2 \n" \
389 : "=a" (__res) \
390 : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), "a" (arg3) \
391 : "a2", "a3", "a4", "a5", "a6" \
392 ); \
393__syscall_return(type,__res); \
394}
395
396/* Note that we save and restore the a7 frame pointer.
397 * Including a7 in the clobber list doesn't do what you'd expect.
398 */
399#define _syscall5(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
400type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3,type4 arg4) \
401{ \
402long __res; \
403__asm__ __volatile__ ( \
404 " mov a9, a7 \n" \
405 " mov a7, %2 \n" \
406 " mov a6, %6 \n" \
407 " mov a5, %5 \n" \
408 " mov a4, %4 \n" \
409 " mov a3, %3 \n" \
410 " movi a2, %1 \n" \
411 " syscall \n" \
412 " mov a7, a9 \n" \
413 " mov %0, a2 \n" \
414 : "=a" (__res) \
415 : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), \
416 "a" (arg3), "a" (arg4) \
417 : "a2", "a3", "a4", "a5", "a6", "a9" \
418 ); \
419__syscall_return(type,__res); \
420}
421
422/* Note that we save and restore the a7 frame pointer.
423 * Including a7 in the clobber list doesn't do what you'd expect.
424 */
425#define _syscall6(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
426type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
427{ \
428long __res; \
429__asm__ __volatile__ ( \
430 " mov a9, a7 \n" \
431 " mov a8, %2 \n" \
432 " mov a7, %7 \n" \
433 " mov a6, %6 \n" \
434 " mov a5, %5 \n" \
435 " mov a4, %4 \n" \
436 " mov a3, %3 \n" \
437 " movi a2, %1 \n" \
438 " syscall \n" \
439 " mov a7, a9 \n" \
440 " mov %0, a2 \n" \
441 : "=a" (__res) \
442 : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), \
443 "a" (arg3), "a" (arg4), "a" (arg5) \
444 : "a2", "a3", "a4", "a5", "a6", "a8", "a9" \
445 ); \
446__syscall_return(type,__res); \
447}
448
449
450#ifdef __KERNEL_SYSCALLS__
451
452#include <linux/compiler.h>
453#include <linux/types.h>
454#include <linux/syscalls.h>
455
456/*
457 * we need this inline - forking from kernel space will result
458 * in NO COPY ON WRITE (!!!), until an execve is executed. This
459 * is no problem, but for the stack. This is handled by not letting
460 * main() use the stack at all after fork(). Thus, no function
461 * calls - which means inline code for fork too, as otherwise we
462 * would use the stack upon exit from 'fork()'.
463 *
464 * Actually only pause and fork are needed inline, so that there
465 * won't be any messing with the stack from main(), but we define
466 * some others too.
467 */
468
469#define __NR__exit __NR_exit
470
471static __inline__ _syscall0(int,pause)
472//static __inline__ _syscall1(int,setup,int,magic) FIXME
473static __inline__ _syscall0(int,sync)
474static __inline__ _syscall0(pid_t,setsid)
475static __inline__ _syscall3(int,write,int,fd,const char *,buf,off_t,count)
476static __inline__ _syscall3(int,read,int,fd,char *,buf,off_t,count)
477static __inline__ _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
478static __inline__ _syscall1(int,dup,int,fd)
479static __inline__ _syscall3(int,execve,const char*,file,char**,argv,char**,envp)
480static __inline__ _syscall3(int,open,const char *,file,int,flag,int,mode)
481static __inline__ _syscall1(int,close,int,fd)
482static __inline__ _syscall1(int,_exit,int,exitcode)
483static __inline__ _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
484static __inline__ _syscall1(int,delete_module,const char *,name)
485
486struct stat;
487static __inline__ _syscall2(int,fstat,int,fd,struct stat *,buf)
488static __inline__ _syscall0(pid_t,getpid)
489static __inline__ _syscall2(int,kill,int,pid,int,sig)
490static __inline__ _syscall2(int,stat,const char *, path,struct stat *,buf)
491static __inline__ _syscall1(int,unlink,char *,pathname)
492
493
494
495extern pid_t waitpid(int, int*, int );
496static __inline__ pid_t wait(int * wait_stat)
497{
498 return waitpid(-1,wait_stat,0);
499}
500#endif
501
502/*
503 * "Conditional" syscalls
504 *
505 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
506 * but it doesn't work on all toolchains, so we just do it by hand
507 */
508#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
509
510#ifdef __KERNEL__
511#define __ARCH_WANT_IPC_PARSE_VERSION
512#define __ARCH_WANT_OLD_READDIR
513#define __ARCH_WANT_OLD_STAT
514#define __ARCH_WANT_STAT64
515#define __ARCH_WANT_SYS_ALARM
516#define __ARCH_WANT_SYS_GETHOSTNAME
517#define __ARCH_WANT_SYS_PAUSE
518#define __ARCH_WANT_SYS_SGETMASK
519#define __ARCH_WANT_SYS_SIGNAL
520#define __ARCH_WANT_SYS_TIME
521#define __ARCH_WANT_SYS_UTIME
522#define __ARCH_WANT_SYS_WAITPID
523#define __ARCH_WANT_SYS_SOCKETCALL
524#define __ARCH_WANT_SYS_FADVISE64
525#define __ARCH_WANT_SYS_GETPGRP
526#define __ARCH_WANT_SYS_LLSEEK
527#define __ARCH_WANT_SYS_NICE
528#define __ARCH_WANT_SYS_OLD_GETRLIMIT
529#define __ARCH_WANT_SYS_OLDUMOUNT
530#define __ARCH_WANT_SYS_SIGPENDING
531#define __ARCH_WANT_SYS_SIGPROCMASK
532#define __ARCH_WANT_SYS_RT_SIGACTION
533#endif
534
535
536
537#endif /* _XTENSA_UNISTD_H */
diff --git a/include/asm-xtensa/user.h b/include/asm-xtensa/user.h
new file mode 100644
index 000000000000..2c3ed23354a8
--- /dev/null
+++ b/include/asm-xtensa/user.h
@@ -0,0 +1,20 @@
1/*
2 * include/asm-xtensa/user.h
3 *
4 * Xtensa Processor version.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_USER_H
14#define _XTENSA_USER_H
15
16/* This file usually defines a 'struct user' structure. However, it it only
17 * used for a.out file, which are not supported on Xtensa.
18 */
19
20#endif /* _XTENSA_USER_H */
diff --git a/include/asm-xtensa/vga.h b/include/asm-xtensa/vga.h
new file mode 100644
index 000000000000..23d82f6acb57
--- /dev/null
+++ b/include/asm-xtensa/vga.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-xtensa/vga.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_VGA_H
12#define _XTENSA_VGA_H
13
14#define VGA_MAP_MEM(x) (unsigned long)phys_to_virt(x)
15
16#define vga_readb(x) (*(x))
17#define vga_writeb(x,y) (*(y) = (x))
18
19#endif
diff --git a/include/asm-xtensa/xor.h b/include/asm-xtensa/xor.h
new file mode 100644
index 000000000000..e7b1f083991d
--- /dev/null
+++ b/include/asm-xtensa/xor.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-xtensa/xor.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_XOR_H
12#define _XTENSA_XOR_H
13
14#include <asm-generic/xor.h>
15
16#endif