2 files changed, 65 insertions, 14 deletions

diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index 434fc515ba64..a9b33324f562 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -176,7 +176,7 @@ static __inline__ int irq_canonicalize(int irq)
 */
 #include <asm/mpc85xx.h>
 
-/* The MPC8560 openpic has  32 internal interrupts and 12 external
+/* The MPC8548 openpic has 48 internal interrupts and 12 external
  * interrupts.
  *
  * We are "flattening" the interrupt vectors of the cascaded CPM
@@ -184,7 +184,7 @@ static __inline__ int irq_canonicalize(int irq)
  * single integer.
  */
 #define NR_CPM_INTS     64
-#define NR_EPIC_INTS    44
+#define NR_EPIC_INTS    60
 #ifndef NR_8259_INTS
 #define NR_8259_INTS    0
 #endif
@@ -241,18 +241,18 @@ static __inline__ int irq_canonicalize(int irq)
 #define MPC85xx_IRQ_CPM         (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
 
 /* The 12 external interrupt lines */
-#define MPC85xx_IRQ_EXT0        (32 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT1        (33 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT2        (34 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT3        (35 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT4        (36 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT5        (37 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT6        (38 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT7        (39 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT8        (40 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT9        (41 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT10       (42 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT11       (43 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT0        (48 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT1        (49 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT2        (50 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT3        (51 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT4        (52 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT5        (53 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT6        (54 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT7        (55 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT8        (56 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT9        (57 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT10       (58 + MPC85xx_OPENPIC_IRQ_OFFSET)
+#define MPC85xx_IRQ_EXT11       (59 + MPC85xx_OPENPIC_IRQ_OFFSET)
 
 /* CPM related interrupts */
 #define SIU_INT_ERROR           ((uint)0x00+CPM_IRQ_OFFSET)
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 95cc22da8075..516984ee14b5 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -134,6 +134,57 @@ enum ppc_sys_devices {
         MPC85xx_IIC2,
 };
 
+/* Internal interrupts are all Level Sensitive, and Positive Polarity */
+#define MPC85XX_INTERNAL_IRQ_SENSES \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  0 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  1 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  2 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  3 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  4 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  5 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  6 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  7 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  8 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal  9 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 10 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 11 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 12 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 13 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 14 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 15 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 16 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 17 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 18 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 19 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 20 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 21 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 22 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 23 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 24 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 25 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 26 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 27 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 28 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 29 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 30 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 31 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 32 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 33 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 34 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 35 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 36 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 37 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 38 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 39 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 40 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 41 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 42 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 43 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 44 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 45 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* Internal 46 */       \
+        (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE)       /* Internal 47 */
+
 #endif /* CONFIG_85xx */
 #endif /* __ASM_MPC85xx_H__ */
 #endif /* __KERNEL__ */