aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-at91/at91rm9200.h5
-rw-r--r--include/asm-arm/arch-at91/at91sam9260.h7
-rw-r--r--include/asm-arm/arch-at91/at91sam9261.h4
-rw-r--r--include/asm-arm/arch-at91/at91sam9263.h4
-rw-r--r--include/asm-arm/arch-at91/at91sam9rl.h5
-rw-r--r--include/asm-arm/arch-at91/uncompress.h32
-rw-r--r--include/linux/atmel_serial.h127
7 files changed, 176 insertions, 8 deletions
diff --git a/include/asm-arm/arch-at91/at91rm9200.h b/include/asm-arm/arch-at91/at91rm9200.h
index 802891a9cd81..e8fc0b1c33f4 100644
--- a/include/asm-arm/arch-at91/at91rm9200.h
+++ b/include/asm-arm/arch-at91/at91rm9200.h
@@ -93,6 +93,11 @@
93#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ 93#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
94#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 94#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
95 95
96#define AT91_USART0 AT91RM9200_BASE_US0
97#define AT91_USART1 AT91RM9200_BASE_US1
98#define AT91_USART2 AT91RM9200_BASE_US2
99#define AT91_USART3 AT91RM9200_BASE_US3
100
96#define AT91_MATRIX 0 /* not supported */ 101#define AT91_MATRIX 0 /* not supported */
97 102
98/* 103/*
diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h
index 0427f8698c07..c8934fe34dc5 100644
--- a/include/asm-arm/arch-at91/at91sam9260.h
+++ b/include/asm-arm/arch-at91/at91sam9260.h
@@ -99,6 +99,13 @@
99#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 99#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
100#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 100#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
101 101
102#define AT91_USART0 AT91SAM9260_BASE_US0
103#define AT91_USART1 AT91SAM9260_BASE_US1
104#define AT91_USART2 AT91SAM9260_BASE_US2
105#define AT91_USART3 AT91SAM9260_BASE_US3
106#define AT91_USART4 AT91SAM9260_BASE_US4
107#define AT91_USART5 AT91SAM9260_BASE_US5
108
102 109
103/* 110/*
104 * Internal Memory. 111 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h
index 9eb459570330..c7c4778dac49 100644
--- a/include/asm-arm/arch-at91/at91sam9261.h
+++ b/include/asm-arm/arch-at91/at91sam9261.h
@@ -84,6 +84,10 @@
84#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 84#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
85#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 85#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
86 86
87#define AT91_USART0 AT91SAM9261_BASE_US0
88#define AT91_USART1 AT91SAM9261_BASE_US1
89#define AT91_USART2 AT91SAM9261_BASE_US2
90
87 91
88/* 92/*
89 * Internal Memory. 93 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h
index 115c47ac7ebb..018a647311da 100644
--- a/include/asm-arm/arch-at91/at91sam9263.h
+++ b/include/asm-arm/arch-at91/at91sam9263.h
@@ -101,6 +101,10 @@
101#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) 101#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
102#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 102#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
103 103
104#define AT91_USART0 AT91SAM9263_BASE_US0
105#define AT91_USART1 AT91SAM9263_BASE_US1
106#define AT91_USART2 AT91SAM9263_BASE_US2
107
104#define AT91_SMC AT91_SMC0 108#define AT91_SMC AT91_SMC0
105 109
106/* 110/*
diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h
index 8a9708a370c6..16d2832f6c0a 100644
--- a/include/asm-arm/arch-at91/at91sam9rl.h
+++ b/include/asm-arm/arch-at91/at91sam9rl.h
@@ -94,6 +94,11 @@
94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
95#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 95#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
96 96
97#define AT91_USART0 AT91SAM9RL_BASE_US0
98#define AT91_USART1 AT91SAM9RL_BASE_US1
99#define AT91_USART2 AT91SAM9RL_BASE_US2
100#define AT91_USART3 AT91SAM9RL_BASE_US3
101
97 102
98/* 103/*
99 * Internal Memory. 104 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h
index 272a7e0dc6cf..f5636a8f6132 100644
--- a/include/asm-arm/arch-at91/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -22,7 +22,23 @@
22#define __ASM_ARCH_UNCOMPRESS_H 22#define __ASM_ARCH_UNCOMPRESS_H
23 23
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/arch/at91_dbgu.h> 25#include <linux/atmel_serial.h>
26
27#if defined(CONFIG_AT91_EARLY_DBGU)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
29#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1)
32#define UART_OFFSET AT91_USART1
33#elif defined(CONFIG_AT91_EARLY_USART2)
34#define UART_OFFSET AT91_USART2
35#elif defined(CONFIG_AT91_EARLY_USART3)
36#define UART_OFFSET AT91_USART3
37#elif defined(CONFIG_AT91_EARLY_USART4)
38#define UART_OFFSET AT91_USART4
39#elif defined(CONFIG_AT91_EARLY_USART5)
40#define UART_OFFSET AT91_USART5
41#endif
26 42
27/* 43/*
28 * The following code assumes the serial port has already been 44 * The following code assumes the serial port has already been
@@ -33,22 +49,22 @@
33 */ 49 */
34static void putc(int c) 50static void putc(int c)
35{ 51{
36#ifdef AT91_DBGU 52#ifdef UART_OFFSET
37 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 53 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
38 54
39 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) 55 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
40 barrier(); 56 barrier();
41 __raw_writel(c, sys + AT91_DBGU_THR); 57 __raw_writel(c, sys + ATMEL_US_THR);
42#endif 58#endif
43} 59}
44 60
45static inline void flush(void) 61static inline void flush(void)
46{ 62{
47#ifdef AT91_DBGU 63#ifdef UART_OFFSET
48 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 64 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
49 65
50 /* wait for transmission to complete */ 66 /* wait for transmission to complete */
51 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) 67 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
52 barrier(); 68 barrier();
53#endif 69#endif
54} 70}
diff --git a/include/linux/atmel_serial.h b/include/linux/atmel_serial.h
new file mode 100644
index 000000000000..fd6833764d72
--- /dev/null
+++ b/include/linux/atmel_serial.h
@@ -0,0 +1,127 @@
1/*
2 * include/linux/atmel_serial.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * USART registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef ATMEL_SERIAL_H
17#define ATMEL_SERIAL_H
18
19#define ATMEL_US_CR 0x00 /* Control Register */
20#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
21#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
22#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
23#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
24#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
25#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
26#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
27#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
28#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
29#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
30#define ATMEL_US_SENDA (1 << 12) /* Send Address */
31#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
32#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
33#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
34#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
35#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
36#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
37#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
38
39#define ATMEL_US_MR 0x04 /* Mode Register */
40#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
41#define ATMEL_US_USMODE_NORMAL 0
42#define ATMEL_US_USMODE_RS485 1
43#define ATMEL_US_USMODE_HWHS 2
44#define ATMEL_US_USMODE_MODEM 3
45#define ATMEL_US_USMODE_ISO7816_T0 4
46#define ATMEL_US_USMODE_ISO7816_T1 6
47#define ATMEL_US_USMODE_IRDA 8
48#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
49#define ATMEL_US_USCLKS_MCK (0 << 4)
50#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
51#define ATMEL_US_USCLKS_SCK (3 << 4)
52#define ATMEL_US_CHRL (3 << 6) /* Character Length */
53#define ATMEL_US_CHRL_5 (0 << 6)
54#define ATMEL_US_CHRL_6 (1 << 6)
55#define ATMEL_US_CHRL_7 (2 << 6)
56#define ATMEL_US_CHRL_8 (3 << 6)
57#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
58#define ATMEL_US_PAR (7 << 9) /* Parity Type */
59#define ATMEL_US_PAR_EVEN (0 << 9)
60#define ATMEL_US_PAR_ODD (1 << 9)
61#define ATMEL_US_PAR_SPACE (2 << 9)
62#define ATMEL_US_PAR_MARK (3 << 9)
63#define ATMEL_US_PAR_NONE (4 << 9)
64#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
65#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
66#define ATMEL_US_NBSTOP_1 (0 << 12)
67#define ATMEL_US_NBSTOP_1_5 (1 << 12)
68#define ATMEL_US_NBSTOP_2 (2 << 12)
69#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
70#define ATMEL_US_CHMODE_NORMAL (0 << 14)
71#define ATMEL_US_CHMODE_ECHO (1 << 14)
72#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
73#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
74#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
75#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
76#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
77#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
78#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
79#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
80#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
81#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
82
83#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
84#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
85#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
86#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
87#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
88#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
89#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
90#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
91#define ATMEL_US_PARE (1 << 7) /* Parity Error */
92#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
93#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
94#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
95#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
96#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
97#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
98#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
99#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
100#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
101#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
102#define ATMEL_US_RI (1 << 20) /* RI */
103#define ATMEL_US_DSR (1 << 21) /* DSR */
104#define ATMEL_US_DCD (1 << 22) /* DCD */
105#define ATMEL_US_CTS (1 << 23) /* CTS */
106
107#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
108#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
109#define ATMEL_US_CSR 0x14 /* Channel Status Register */
110#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
111#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
112#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
113
114#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
115#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
116
117#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
118#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
119
120#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
121#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
122
123#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
124#define ATMEL_US_NER 0x44 /* Number of Errors Register */
125#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
126
127#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-26 19:08:03 -0500