269 files changed, 6033 insertions, 3131 deletions

diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index 0d9f984a60a1..16c3c441256e 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -316,7 +316,7 @@ struct acpi_bus_event {
         u32 data;
 };
 
-extern struct subsystem acpi_subsys;
+extern struct kset acpi_subsys;
 
 /*
  * External Functions
diff --git a/include/asm-alpha/mmu_context.h b/include/asm-alpha/mmu_context.h
index fe249e9d3360..0bd7bd2ccb90 100644
--- a/include/asm-alpha/mmu_context.h
+++ b/include/asm-alpha/mmu_context.h
@@ -10,6 +10,7 @@
 #include <asm/system.h>
 #include <asm/machvec.h>
 #include <asm/compiler.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * Force a context reload. This is needed when we change the page
diff --git a/include/asm-alpha/percpu.h b/include/asm-alpha/percpu.h
index 651ebb141b24..48348fe34c19 100644
--- a/include/asm-alpha/percpu.h
+++ b/include/asm-alpha/percpu.h
@@ -1,20 +1,6 @@
 #ifndef __ALPHA_PERCPU_H
 #define __ALPHA_PERCPU_H
 
-/*
- * Increase the per cpu area for Alpha so that
- * modules using percpu area can load.
- */
-#ifdef CONFIG_MODULES
-# define PERCPU_MODULE_RESERVE 8192
-#else
-# define PERCPU_MODULE_RESERVE 0
-#endif
-
-#define PERCPU_ENOUGH_ROOM \
-        (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
-         PERCPU_MODULE_RESERVE)
-
 #include <asm-generic/percpu.h>
 
 #endif /* __ALPHA_PERCPU_H */
diff --git a/include/asm-alpha/scatterlist.h b/include/asm-alpha/scatterlist.h
index 6afb8bd3aaf9..917365405e83 100644
--- a/include/asm-alpha/scatterlist.h
+++ b/include/asm-alpha/scatterlist.h
@@ -2,6 +2,7 @@
 #define _ALPHA_SCATTERLIST_H
 
 #include <asm/page.h>
+#include <asm/types.h>
   
 struct scatterlist {
         struct page *page;
diff --git a/include/asm-arm/arch-at91/at91_adc.h b/include/asm-arm/arch-at91/at91_adc.h
new file mode 100644
index 000000000000..1ed66eaaf83a
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91_adc.h
@@ -0,0 +1,61 @@
+/*
+ * include/asm-arm/arch-at91/at91_adc.h
+ *
+ * Copyright (C) SAN People
+ *
+ * Analog-to-Digital Converter (ADC) registers.
+ * Based on AT91SAM9260 datasheet revision D.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_ADC_H
+#define AT91_ADC_H
+
+#define AT91_ADC_CR             0x00            /* Control Register */
+#define         AT91_ADC_SWRST          (1 << 0)        /* Software Reset */
+#define         AT91_ADC_START          (1 << 1)        /* Start Conversion */
+
+#define AT91_ADC_MR             0x04            /* Mode Register */
+#define         AT91_ADC_TRGEN          (1 << 0)        /* Trigger Enable */
+#define         AT91_ADC_TRGSEL         (7 << 1)        /* Trigger Selection */
+#define                 AT91_ADC_TRGSEL_TC0             (0 << 1)
+#define                 AT91_ADC_TRGSEL_TC1             (1 << 1)
+#define                 AT91_ADC_TRGSEL_TC2             (2 << 1)
+#define                 AT91_ADC_TRGSEL_EXTERNAL        (6 << 1)
+#define         AT91_ADC_LOWRES         (1 << 4)        /* Low Resolution */
+#define         AT91_ADC_SLEEP          (1 << 5)        /* Sleep Mode */
+#define         AT91_ADC_PRESCAL        (0x3f << 8)     /* Prescalar Rate Selection */
+#define                 AT91_ADC_PRESCAL_(x)    ((x) << 8)
+#define         AT91_ADC_STARTUP        (0x1f << 16)    /* Startup Up Time */
+#define                 AT91_ADC_STARTUP_(x)    ((x) << 16)
+#define         AT91_ADC_SHTIM          (0xf  << 24)    /* Sample & Hold Time */
+#define                 AT91_ADC_SHTIM_(x)      ((x) << 24)
+
+#define AT91_ADC_CHER           0x10            /* Channel Enable Register */
+#define AT91_ADC_CHDR           0x14            /* Channel Disable Register */
+#define AT91_ADC_CHSR           0x18            /* Channel Status Register */
+#define         AT91_ADC_CH(n)          (1 << (n))      /* Channel Number */
+
+#define AT91_ADC_SR             0x1C            /* Status Register */
+#define         AT91_ADC_EOC(n)         (1 << (n))      /* End of Conversion on Channel N */
+#define         AT91_ADC_OVRE(n)        (1 << ((n) + 8))/* Overrun Error on Channel N */
+#define         AT91_ADC_DRDY           (1 << 16)       /* Data Ready */
+#define         AT91_ADC_GOVRE          (1 << 17)       /* General Overrun Error */
+#define         AT91_ADC_ENDRX          (1 << 18)       /* End of RX Buffer */
+#define         AT91_ADC_RXFUFF         (1 << 19)       /* RX Buffer Full */
+
+#define AT91_ADC_LCDR           0x20            /* Last Converted Data Register */
+#define         AT91_ADC_LDATA          (0x3ff)
+
+#define AT91_ADC_IER            0x24            /* Interrupt Enable Register */
+#define AT91_ADC_IDR            0x28            /* Interrupt Disable Register */
+#define AT91_ADC_IMR            0x2C            /* Interrupt Mask Register */
+
+#define AT91_ADC_CHR(n)         (0x30 + ((n) * 4)       /* Channel Data Register N */
+#define         AT91_ADC_DATA           (0x3ff)
+
+#endif
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h
index 7b9903c2c447..7a34a5b1fed0 100644
--- a/include/asm-arm/arch-at91/board.h
+++ b/include/asm-arm/arch-at91/board.h
@@ -62,7 +62,7 @@ struct at91_mmc_data {
 };
 extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
 
- /* Ethernet */
+ /* Ethernet (EMAC & MACB) */
 struct at91_eth_data {
         u8              phy_irq_pin;    /* PHY IRQ */
         u8              is_rmii;        /* using RMII interface? */
@@ -114,6 +114,16 @@ struct atmel_uart_data {
 };
 extern void __init at91_add_device_serial(void);
 
+ /* LCD Controller */
+struct atmel_lcdfb_info;
+extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
+
+ /* AC97 */
+struct atmel_ac97_data {
+        u8              reset_pin;      /* reset */
+}
+extern void __init at91_add_device_ac97(struct atmel_ac97_data *data);
+
  /* LEDs */
 extern u8 at91_leds_cpu;
 extern u8 at91_leds_timer;
diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h
index 722c5e086285..44a4001de807 100644
--- a/include/asm-arm/arch-ebsa110/io.h
+++ b/include/asm-arm/arch-ebsa110/io.h
@@ -81,4 +81,12 @@ extern void outsb(unsigned int port, const void *buf, int sz);
 extern void outsw(unsigned int port, const void *buf, int sz);
 extern void outsl(unsigned int port, const void *buf, int sz);
 
+/* can't support writesb atm */
+extern void writesw(void __iomem *addr, const void *data, int wordlen);
+extern void writesl(void __iomem *addr, const void *data, int longlen);
+
+/* can't support readsb atm */
+extern void readsw(const void __iomem *addr, void *data, int wordlen);
+extern void readsl(const void __iomem *addr, void *data, int longlen);
+
 #endif
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h
index e56a4e247d62..de6494a4dc6b 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/include/asm-arm/arch-imx/imx-regs.h
@@ -477,122 +477,4 @@
 #define LCDISR_EOF     (1<<1)
 #define LCDISR_BOF     (1<<0)
 
-/*
- *  UART Module. Takes the UART base address as argument
- */
-#define URXD0(x) __REG( 0x0 + (x)) /* Receiver Register */
-#define URTX0(x) __REG( 0x40 + (x)) /* Transmitter Register */
-#define UCR1(x)  __REG( 0x80 + (x)) /* Control Register 1 */
-#define UCR2(x)  __REG( 0x84 + (x)) /* Control Register 2 */
-#define UCR3(x)  __REG( 0x88 + (x)) /* Control Register 3 */
-#define UCR4(x)  __REG( 0x8c + (x)) /* Control Register 4 */
-#define UFCR(x)  __REG( 0x90 + (x)) /* FIFO Control Register */
-#define USR1(x)  __REG( 0x94 + (x)) /* Status Register 1 */
-#define USR2(x)  __REG( 0x98 + (x)) /* Status Register 2 */
-#define UESC(x)  __REG( 0x9c + (x)) /* Escape Character Register */
-#define UTIM(x)  __REG( 0xa0 + (x)) /* Escape Timer Register */
-#define UBIR(x)  __REG( 0xa4 + (x)) /* BRM Incremental Register */
-#define UBMR(x)  __REG( 0xa8 + (x)) /* BRM Modulator Register */
-#define UBRC(x)  __REG( 0xac + (x)) /* Baud Rate Count Register */
-#define BIPR1(x) __REG( 0xb0 + (x)) /* Incremental Preset Register 1 */
-#define BIPR2(x) __REG( 0xb4 + (x)) /* Incremental Preset Register 2 */
-#define BIPR3(x) __REG( 0xb8 + (x)) /* Incremental Preset Register 3 */
-#define BIPR4(x) __REG( 0xbc + (x)) /* Incremental Preset Register 4 */
-#define BMPR1(x) __REG( 0xc0 + (x)) /* BRM Modulator Register 1 */
-#define BMPR2(x) __REG( 0xc4 + (x)) /* BRM Modulator Register 2 */
-#define BMPR3(x) __REG( 0xc8 + (x)) /* BRM Modulator Register 3 */
-#define BMPR4(x) __REG( 0xcc + (x)) /* BRM Modulator Register 4 */
-#define UTS(x)   __REG( 0xd0 + (x)) /* UART Test Register */
-
-/* UART Control Register Bit Fields.*/
-#define  URXD_CHARRDY    (1<<15)
-#define  URXD_ERR        (1<<14)
-#define  URXD_OVRRUN     (1<<13)
-#define  URXD_FRMERR     (1<<12)
-#define  URXD_BRK        (1<<11)
-#define  URXD_PRERR      (1<<10)
-#define  UCR1_ADEN       (1<<15) /* Auto dectect interrupt */
-#define  UCR1_ADBR       (1<<14) /* Auto detect baud rate */
-#define  UCR1_TRDYEN     (1<<13) /* Transmitter ready interrupt enable */
-#define  UCR1_IDEN       (1<<12) /* Idle condition interrupt */
-#define  UCR1_RRDYEN     (1<<9)  /* Recv ready interrupt enable */
-#define  UCR1_RDMAEN     (1<<8)  /* Recv ready DMA enable */
-#define  UCR1_IREN       (1<<7)  /* Infrared interface enable */
-#define  UCR1_TXMPTYEN   (1<<6)  /* Transimitter empty interrupt enable */
-#define  UCR1_RTSDEN     (1<<5)  /* RTS delta interrupt enable */
-#define  UCR1_SNDBRK     (1<<4)  /* Send break */
-#define  UCR1_TDMAEN     (1<<3)  /* Transmitter ready DMA enable */
-#define  UCR1_UARTCLKEN  (1<<2)  /* UART clock enabled */
-#define  UCR1_DOZE       (1<<1)  /* Doze */
-#define  UCR1_UARTEN     (1<<0)  /* UART enabled */
-#define  UCR2_ESCI       (1<<15) /* Escape seq interrupt enable */
-#define  UCR2_IRTS       (1<<14) /* Ignore RTS pin */
-#define  UCR2_CTSC       (1<<13) /* CTS pin control */
-#define  UCR2_CTS        (1<<12) /* Clear to send */
-#define  UCR2_ESCEN      (1<<11) /* Escape enable */
-#define  UCR2_PREN       (1<<8)  /* Parity enable */
-#define  UCR2_PROE       (1<<7)  /* Parity odd/even */
-#define  UCR2_STPB       (1<<6)  /* Stop */
-#define  UCR2_WS         (1<<5)  /* Word size */
-#define  UCR2_RTSEN      (1<<4)  /* Request to send interrupt enable */
-#define  UCR2_TXEN       (1<<2)  /* Transmitter enabled */
-#define  UCR2_RXEN       (1<<1)  /* Receiver enabled */
-#define  UCR2_SRST       (1<<0)  /* SW reset */
-#define  UCR3_DTREN      (1<<13) /* DTR interrupt enable */
-#define  UCR3_PARERREN   (1<<12) /* Parity enable */
-#define  UCR3_FRAERREN   (1<<11) /* Frame error interrupt enable */
-#define  UCR3_DSR        (1<<10) /* Data set ready */
-#define  UCR3_DCD        (1<<9)  /* Data carrier detect */
-#define  UCR3_RI         (1<<8)  /* Ring indicator */
-#define  UCR3_TIMEOUTEN  (1<<7)  /* Timeout interrupt enable */
-#define  UCR3_RXDSEN     (1<<6)  /* Receive status interrupt enable */
-#define  UCR3_AIRINTEN   (1<<5)  /* Async IR wake interrupt enable */
-#define  UCR3_AWAKEN     (1<<4)  /* Async wake interrupt enable */
-#define  UCR3_REF25      (1<<3)  /* Ref freq 25 MHz */
-#define  UCR3_REF30      (1<<2)  /* Ref Freq 30 MHz */
-#define  UCR3_INVT       (1<<1)  /* Inverted Infrared transmission */
-#define  UCR3_BPEN       (1<<0)  /* Preset registers enable */
-#define  UCR4_CTSTL_32   (32<<10) /* CTS trigger level (32 chars) */
-#define  UCR4_INVR       (1<<9)  /* Inverted infrared reception */
-#define  UCR4_ENIRI      (1<<8)  /* Serial infrared interrupt enable */
-#define  UCR4_WKEN       (1<<7)  /* Wake interrupt enable */
-#define  UCR4_REF16      (1<<6)  /* Ref freq 16 MHz */
-#define  UCR4_IRSC       (1<<5)  /* IR special case */
-#define  UCR4_TCEN       (1<<3)  /* Transmit complete interrupt enable */
-#define  UCR4_BKEN       (1<<2)  /* Break condition interrupt enable */
-#define  UCR4_OREN       (1<<1)  /* Receiver overrun interrupt enable */
-#define  UCR4_DREN       (1<<0)  /* Recv data ready interrupt enable */
-#define  UFCR_RXTL_SHF   0       /* Receiver trigger level shift */
-#define  UFCR_RFDIV      (7<<7)  /* Reference freq divider mask */
-#define  UFCR_TXTL_SHF   10      /* Transmitter trigger level shift */
-#define  USR1_PARITYERR  (1<<15) /* Parity error interrupt flag */
-#define  USR1_RTSS       (1<<14) /* RTS pin status */
-#define  USR1_TRDY       (1<<13) /* Transmitter ready interrupt/dma flag */
-#define  USR1_RTSD       (1<<12) /* RTS delta */
-#define  USR1_ESCF       (1<<11) /* Escape seq interrupt flag */
-#define  USR1_FRAMERR    (1<<10) /* Frame error interrupt flag */
-#define  USR1_RRDY       (1<<9)  /* Receiver ready interrupt/dma flag */
-#define  USR1_TIMEOUT    (1<<7)  /* Receive timeout interrupt status */
-#define  USR1_RXDS       (1<<6)  /* Receiver idle interrupt flag */
-#define  USR1_AIRINT     (1<<5)  /* Async IR wake interrupt flag */
-#define  USR1_AWAKE      (1<<4)  /* Aysnc wake interrupt flag */
-#define  USR2_ADET       (1<<15) /* Auto baud rate detect complete */
-#define  USR2_TXFE       (1<<14) /* Transmit buffer FIFO empty */
-#define  USR2_DTRF       (1<<13) /* DTR edge interrupt flag */
-#define  USR2_IDLE       (1<<12) /* Idle condition */
-#define  USR2_IRINT      (1<<8)  /* Serial infrared interrupt flag */
-#define  USR2_WAKE       (1<<7)  /* Wake */
-#define  USR2_RTSF       (1<<4)  /* RTS edge interrupt flag */
-#define  USR2_TXDC       (1<<3)  /* Transmitter complete */
-#define  USR2_BRCD       (1<<2)  /* Break condition */
-#define  USR2_ORE        (1<<1)  /* Overrun error */
-#define  USR2_RDR        (1<<0)  /* Recv data ready */
-#define  UTS_FRCPERR     (1<<13) /* Force parity error */
-#define  UTS_LOOP        (1<<12) /* Loop tx and rx */
-#define  UTS_TXEMPTY     (1<<6)  /* TxFIFO empty */
-#define  UTS_RXEMPTY     (1<<5)  /* RxFIFO empty */
-#define  UTS_TXFULL      (1<<4)  /* TxFIFO full */
-#define  UTS_RXFULL      (1<<3)  /* RxFIFO full */
-#define  UTS_SOFTRST     (1<<0)  /* Software reset */
-
 #endif                          // _IMX_REGS_H
diff --git a/include/asm-arm/arch-imx/mmc.h b/include/asm-arm/arch-imx/mmc.h
index 1937151665c7..84c726934ace 100644
--- a/include/asm-arm/arch-imx/mmc.h
+++ b/include/asm-arm/arch-imx/mmc.h
@@ -1,7 +1,7 @@
 #ifndef ASMARM_ARCH_MMC_H
 #define ASMARM_ARCH_MMC_H
 
-#include <linux/mmc/protocol.h>
+#include <linux/mmc/host.h>
 
 struct imxmmc_platform_data {
         int (*card_present)(void);
diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h
index 5a7bdb526606..7dfff4ad82b3 100644
--- a/include/asm-arm/arch-iop13xx/io.h
+++ b/include/asm-arm/arch-iop13xx/io.h
@@ -26,7 +26,6 @@
 #define __mem_isa(a) (a)
 
 extern void __iomem * __iop13xx_io(unsigned long io_addr);
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
 extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags);
 extern void __iop13xx_iounmap(void __iomem *addr);
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index d26b755a9879..85707e9c3325 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -8,6 +8,7 @@ extern u32 iop13xx_atue_pmmr_offset;
 void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
+void iop13xx_add_tpmi_devices(void);
 void iop13xx_init_irq(void);
 
 /* CPUID CP6 R0 Page 0 */
@@ -27,19 +28,24 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PCI_OFFSET       IOP13XX_MAX_RAM_SIZE
 
 /* PCI MAP
- * 0x0000.0000 - 0x8000.0000           1:1 mapping with Physical RAM
- * 0x8000.0000 - 0x8800.0000           PCIX/PCIE memory window (128MB)
-*/
+ * bus range            cpu phys        cpu virt        note
+ * 0x0000.0000 + 2GB    (n/a)           (n/a)           inbound, 1:1 mapping with Physical RAM
+ * 0x8000.0000 + 928M   0x1.8000.0000   (ioremap)       PCIX outbound memory window
+ * 0x8000.0000 + 928M   0x2.8000.0000   (ioremap)       PCIE outbound memory window
+ *
+ * IO MAP
+ * 0x1000 + 64K 0x0.fffb.1000   0xfec6.1000     PCIX outbound i/o window
+ * 0x1000 + 64K 0x0.fffd.1000   0xfed7.1000     PCIE outbound i/o window
+ */
 #define IOP13XX_PCIX_IO_WINDOW_SIZE   0x10000UL
 #define IOP13XX_PCIX_LOWER_IO_PA      0xfffb0000UL
 #define IOP13XX_PCIX_LOWER_IO_VA      0xfec60000UL
-#define IOP13XX_PCIX_LOWER_IO_BA      0x0fff0000UL
+#define IOP13XX_PCIX_LOWER_IO_BA      0x0UL /* OIOTVR */
+#define IOP13XX_PCIX_IO_BUS_OFFSET    0x1000UL
 #define IOP13XX_PCIX_UPPER_IO_PA      (IOP13XX_PCIX_LOWER_IO_PA +\
                                        IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
 #define IOP13XX_PCIX_UPPER_IO_VA      (IOP13XX_PCIX_LOWER_IO_VA +\
                                        IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIX_IO_OFFSET        (IOP13XX_PCIX_LOWER_IO_VA -\
-                                       IOP13XX_PCIX_LOWER_IO_BA)
 #define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
                                            (IOP13XX_PCIX_LOWER_IO_PA\
                                            - IOP13XX_PCIX_LOWER_IO_VA))
@@ -65,15 +71,14 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PCIE_IO_WINDOW_SIZE      0x10000UL
 #define IOP13XX_PCIE_LOWER_IO_PA         0xfffd0000UL
 #define IOP13XX_PCIE_LOWER_IO_VA         0xfed70000UL
-#define IOP13XX_PCIE_LOWER_IO_BA         0x0fff0000UL
+#define IOP13XX_PCIE_LOWER_IO_BA         0x0UL  /* OIOTVR */
+#define IOP13XX_PCIE_IO_BUS_OFFSET       0x1000UL
 #define IOP13XX_PCIE_UPPER_IO_PA         (IOP13XX_PCIE_LOWER_IO_PA +\
                                          IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
 #define IOP13XX_PCIE_UPPER_IO_VA         (IOP13XX_PCIE_LOWER_IO_VA +\
                                          IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
 #define IOP13XX_PCIE_UPPER_IO_BA         (IOP13XX_PCIE_LOWER_IO_BA +\
                                          IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
-#define IOP13XX_PCIE_IO_OFFSET           (IOP13XX_PCIE_LOWER_IO_VA -\
-                                         IOP13XX_PCIE_LOWER_IO_BA)
 #define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
                                            (IOP13XX_PCIE_LOWER_IO_PA\
                                            - IOP13XX_PCIE_LOWER_IO_VA))
@@ -451,4 +456,5 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PBI_BAR1                IOP13XX_PBI_OFFSET(0x10)
 #define IOP13XX_PBI_LR1                 IOP13XX_PBI_OFFSET(0x14)
 
+#define IOP13XX_PROCESSOR_FREQ          IOP13XX_REG_ADDR32(0x2180)
 #endif /* _IOP13XX_HW_H_ */
diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h
index 77a837a02dec..49213d9d7cad 100644
--- a/include/asm-arm/arch-iop13xx/time.h
+++ b/include/asm-arm/arch-iop13xx/time.h
@@ -7,9 +7,65 @@
 #define IOP_TMR_PRIVILEGED 0x08
 #define IOP_TMR_RATIO_1_1  0x00
 
+#define IOP13XX_XSI_FREQ_RATIO_MASK     (3 << 19)
+#define IOP13XX_XSI_FREQ_RATIO_2        (0 << 19)
+#define IOP13XX_XSI_FREQ_RATIO_3        (1 << 19)
+#define IOP13XX_XSI_FREQ_RATIO_4        (2 << 19)
+#define IOP13XX_CORE_FREQ_MASK          (7 << 16)
+#define IOP13XX_CORE_FREQ_600           (0 << 16)
+#define IOP13XX_CORE_FREQ_667           (1 << 16)
+#define IOP13XX_CORE_FREQ_800           (2 << 16)
+#define IOP13XX_CORE_FREQ_933           (3 << 16)
+#define IOP13XX_CORE_FREQ_1000          (4 << 16)
+#define IOP13XX_CORE_FREQ_1200          (5 << 16)
+
 void iop_init_time(unsigned long tickrate);
 unsigned long iop_gettimeoffset(void);
 
+static inline unsigned long iop13xx_core_freq(void)
+{
+        unsigned long freq = __raw_readl(IOP13XX_PROCESSOR_FREQ);
+        freq &= IOP13XX_CORE_FREQ_MASK;
+        switch (freq) {
+        case IOP13XX_CORE_FREQ_600:
+                return 600000000;
+        case IOP13XX_CORE_FREQ_667:
+                return 667000000;
+        case IOP13XX_CORE_FREQ_800:
+                return 800000000;
+        case IOP13XX_CORE_FREQ_933:
+                return 933000000;
+        case IOP13XX_CORE_FREQ_1000:
+                return 1000000000;
+        case IOP13XX_CORE_FREQ_1200:
+                return 1200000000;
+        default:
+                printk("%s: warning unknown frequency, defaulting to 800Mhz\n",
+                        __FUNCTION__);
+        }
+
+        return 800000000;
+}
+
+static inline unsigned long iop13xx_xsi_bus_ratio(void)
+{
+        unsigned long  ratio = __raw_readl(IOP13XX_PROCESSOR_FREQ);
+        ratio &= IOP13XX_XSI_FREQ_RATIO_MASK;
+        switch (ratio) {
+        case IOP13XX_XSI_FREQ_RATIO_2:
+                return 2;
+        case IOP13XX_XSI_FREQ_RATIO_3:
+                return 3;
+        case IOP13XX_XSI_FREQ_RATIO_4:
+                return 4;
+        default:
+                printk("%s: warning unknown ratio, defaulting to 2\n",
+                        __FUNCTION__);
+        }
+
+        return 2;
+}
+
 static inline void write_tmr0(u32 val)
 {
         asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h
index 5f570a598a37..994f16af5057 100644
--- a/include/asm-arm/arch-iop32x/io.h
+++ b/include/asm-arm/arch-iop32x/io.h
@@ -13,7 +13,6 @@
 
 #include <asm/hardware.h>
 
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags);
 extern void __iop3xx_iounmap(void __iomem *addr);
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h
index 2e9469047eb1..0d8af57221a1 100644
--- a/include/asm-arm/arch-iop32x/iop32x.h
+++ b/include/asm-arm/arch-iop32x/iop32x.h
@@ -24,5 +24,14 @@
 
 #include <asm/hardware/iop3xx.h>
 
+/* ATU Parameters
+ * set up a 1:1 bus to physical ram relationship
+ * w/ physical ram on top of pci in the memory map
+ */
+#define IOP32X_MAX_RAM_SIZE            0x40000000UL
+#define IOP3XX_MAX_RAM_SIZE            IOP32X_MAX_RAM_SIZE
+#define IOP3XX_PCI_LOWER_MEM_BA        0x80000000
+#define IOP32X_PCI_MEM_WINDOW_SIZE     0x04000000
+#define IOP3XX_PCI_MEM_WINDOW_SIZE     IOP32X_PCI_MEM_WINDOW_SIZE
 
 #endif
diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h
index 764cd3f0d416..c51072af214e 100644
--- a/include/asm-arm/arch-iop32x/memory.h
+++ b/include/asm-arm/arch-iop32x/memory.h
@@ -19,8 +19,8 @@
  * bus_to_virt: Used to convert an address for DMA operations
  *              to an address that the kernel can use.
  */
-#define __virt_to_bus(x)        (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0))
-#define __bus_to_virt(x)        (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2)))
+#define __virt_to_bus(x)        (__virt_to_phys(x))
+#define __bus_to_virt(x)        (__phys_to_virt(x))
 
 
 #endif
diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h
index 1bb5071e1fa8..993f7589b29f 100644
--- a/include/asm-arm/arch-iop33x/io.h
+++ b/include/asm-arm/arch-iop33x/io.h
@@ -13,7 +13,6 @@
 
 #include <asm/hardware.h>
 
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags);
 extern void __iop3xx_iounmap(void __iomem *addr);
diff --git a/include/asm-arm/arch-iop33x/iop33x.h b/include/asm-arm/arch-iop33x/iop33x.h
index 7ac6e93db5ff..766985b9a723 100644
--- a/include/asm-arm/arch-iop33x/iop33x.h
+++ b/include/asm-arm/arch-iop33x/iop33x.h
@@ -29,5 +29,15 @@
 #define IOP33X_UART1_PHYS       (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)
 #define IOP33X_UART1_VIRT       (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)
 
+/* ATU Parameters
+ * set up a 1:1 bus to physical ram relationship
+ * w/ pci on top of physical ram in memory map
+ */
+#define IOP33X_MAX_RAM_SIZE             0x80000000UL
+#define IOP3XX_MAX_RAM_SIZE             IOP33X_MAX_RAM_SIZE
+#define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)
+#define IOP33X_PCI_MEM_WINDOW_SIZE      0x08000000
+#define IOP3XX_PCI_MEM_WINDOW_SIZE      IOP33X_PCI_MEM_WINDOW_SIZE
+
 
 #endif
diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h
index 0d39139b241e..c8749127d6ab 100644
--- a/include/asm-arm/arch-iop33x/memory.h
+++ b/include/asm-arm/arch-iop33x/memory.h
@@ -19,8 +19,8 @@
  * bus_to_virt: Used to convert an address for DMA operations
  *              to an address that the kernel can use.
  */
-#define __virt_to_bus(x)        (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0))
-#define __bus_to_virt(x)        (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2)))
+#define __virt_to_bus(x)        (__virt_to_phys(x))
+#define __bus_to_virt(x)        (__phys_to_virt(x))
 
 
 #endif
diff --git a/include/asm-arm/arch-ixp23xx/io.h b/include/asm-arm/arch-ixp23xx/io.h
index 18415a81ac74..66f5bafc315c 100644
--- a/include/asm-arm/arch-ixp23xx/io.h
+++ b/include/asm-arm/arch-ixp23xx/io.h
@@ -23,7 +23,7 @@
 #include <linux/kernel.h>       /* For BUG */
 
 static inline void __iomem *
-ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned long flags)
+ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
 {
         if (addr >= IXP23XX_PCI_MEM_START &&
                 addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
@@ -34,7 +34,7 @@ ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned long flags)
                         ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
         }
 
-        return __ioremap(addr, size, flags);
+        return __arm_ioremap(addr, size, mtype);
 }
 
 static inline void
diff --git a/include/asm-arm/arch-ixp4xx/cpu.h b/include/asm-arm/arch-ixp4xx/cpu.h
new file mode 100644
index 000000000000..d2523b326c6c
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/cpu.h
@@ -0,0 +1,31 @@
+/*
+ * include/asm-arm/arch-ixp4xx/cpu.h
+ *
+ * IXP4XX cpu type detection
+ *
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_ARCH_CPU_H__
+#define __ASM_ARCH_CPU_H__
+
+extern unsigned int processor_id;
+/* Processor id value in CP15 Register 0 */
+#define IXP425_PROCESSOR_ID_VALUE       0x690541c0
+#define IXP435_PROCESSOR_ID_VALUE       0x69054040
+#define IXP465_PROCESSOR_ID_VALUE       0x69054200
+#define IXP4XX_PROCESSOR_ID_MASK        0xfffffff0
+
+#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+                          IXP425_PROCESSOR_ID_VALUE)
+#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+                          IXP435_PROCESSOR_ID_VALUE)
+#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+                          IXP465_PROCESSOR_ID_VALUE)
+
+#endif  /* _ASM_ARCH_CPU_H */
diff --git a/include/asm-arm/arch-ixp4xx/dma.h b/include/asm-arm/arch-ixp4xx/dma.h
index 789f7f53c357..2c7f5327d80f 100644
--- a/include/asm-arm/arch-ixp4xx/dma.h
+++ b/include/asm-arm/arch-ixp4xx/dma.h
@@ -12,7 +12,6 @@
 #define __ASM_ARCH_DMA_H
 
 #include <linux/device.h>
-#include <linux/pci.h>
 #include <asm/page.h>
 #include <asm/sizes.h>
 #include <asm/hardware.h>
diff --git a/include/asm-arm/arch-ixp4xx/dsmg600.h b/include/asm-arm/arch-ixp4xx/dsmg600.h
new file mode 100644
index 000000000000..a19605ad240d
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/dsmg600.h
@@ -0,0 +1,57 @@
+/*
+ * DSM-G600 platform specific definitions
+ *
+ * Copyright (C) 2006 Tower Technologies
+ * Author: Alessandro Zummo <a.zummo@towertech.it>
+ *
+ * based on ixdp425.h:
+ *      Copyright 2004 (C) MontaVista, Software, Inc.
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H__
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+
+#define DSMG600_SDA_PIN         5
+#define DSMG600_SCL_PIN         4
+
+/*
+ * DSMG600 PCI IRQs
+ */
+#define DSMG600_PCI_MAX_DEV     4
+#define DSMG600_PCI_IRQ_LINES   3
+
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define DSMG600_PCI_INTA_PIN    11
+#define DSMG600_PCI_INTB_PIN    10
+#define DSMG600_PCI_INTC_PIN    9
+#define DSMG600_PCI_INTD_PIN    8
+#define DSMG600_PCI_INTE_PIN    7
+#define DSMG600_PCI_INTF_PIN    6
+
+/* DSM-G600 Timer Setting */
+#define DSMG600_FREQ 66000000
+
+/* Buttons */
+
+#define DSMG600_PB_GPIO         15      /* power button */
+#define DSMG600_PB_BM           (1L << DSMG600_PB_GPIO)
+
+#define DSMG600_RB_GPIO         3       /* reset button */
+
+#define DSMG600_RB_IRQ          IRQ_IXP4XX_GPIO3
+
+#define DSMG600_PO_GPIO         2       /* power off */
+
+/* LEDs */
+
+#define DSMG600_LED_PWR_GPIO    0
+#define DSMG600_LED_PWR_BM      (1L << DSMG600_LED_PWR_GPIO)
+
+#define DSMG600_LED_WLAN_GPIO   14
+#define DSMG600_LED_WLAN_BM     (1L << DSMG600_LED_WLAN_GPIO)
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index dadb568b7ef0..f144a005ed95 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -31,9 +31,9 @@
 
 1001:
                 /*
-                 * IXP465 has an upper IRQ status register
+                 * IXP465/IXP435 has an upper IRQ status register
                  */
-#if defined(CONFIG_CPU_IXP46X)
+#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
                 ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
                 ldr     \irqstat, [\irqstat]            @ get upper interrupts
                 mov     \irqnr, #63
diff --git a/include/asm-arm/arch-ixp4xx/gpio.h b/include/asm-arm/arch-ixp4xx/gpio.h
new file mode 100644
index 000000000000..3a4c5b8ae9e1
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/gpio.h
@@ -0,0 +1,73 @@
+/*
+ * linux/include/asm-arm/arch-ixp4xx/gpio.h
+ *
+ * IXP4XX GPIO wrappers for arch-neutral GPIO calls
+ *
+ * Written by Milan Svoboda <msvoboda@ra.rockwell.com>
+ * Based on PXA implementation by Philipp Zabel <philipp.zabel@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_IXP4XX_GPIO_H
+#define __ASM_ARCH_IXP4XX_GPIO_H
+
+#include <asm/hardware.h>
+
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+        return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+        return;
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+        gpio_line_config(gpio, IXP4XX_GPIO_IN);
+        return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int level)
+{
+        gpio_line_set(gpio, level);
+        gpio_line_config(gpio, IXP4XX_GPIO_OUT);
+        return 0;
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        int value;
+
+        gpio_line_get(gpio, &value);
+
+        return value;
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        gpio_line_set(gpio, value);
+}
+
+#include <asm-generic/gpio.h>                   /* cansleep wrappers */
+
+extern int gpio_to_irq(int gpio);
+extern int irq_to_gpio(int gpio);
+
+#endif
+
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 88fd0877dcc1..297ceda08b61 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -17,8 +17,8 @@
 #ifndef __ASM_ARCH_HARDWARE_H__
 #define __ASM_ARCH_HARDWARE_H__
 
-#define PCIBIOS_MIN_IO                  0x00001000
-#define PCIBIOS_MIN_MEM                 0x48000000
+#define PCIBIOS_MIN_IO          0x00001000
+#define PCIBIOS_MIN_MEM         (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
 
 /*
  * We override the standard dma-mask routines for bouncing.
@@ -27,11 +27,8 @@
 
 #define pcibios_assign_all_busses()     1
 
-#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__)
-extern unsigned int processor_id;
-#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200)
-#else
-#define cpu_is_ixp465() (0)
+#ifndef __ASSEMBLER__
+#include <asm/arch/cpu.h>
 #endif
 
 /* Register locations and bits */
@@ -47,5 +44,6 @@ extern unsigned int processor_id;
 #include "prpmc1100.h"
 #include "nslu2.h"
 #include "nas100d.h"
+#include "dsmg600.h"
 
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index a41ba229c564..c72f9d79417c 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -59,10 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  * fallback to the default.
  */
 static inline void __iomem *
-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
+__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
 {
-        if((addr < 0x48000000) || (addr > 0x4fffffff))
-                return __ioremap(addr, size, flags);
+        if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
+                return __arm_ioremap(addr, size, mtype);
 
         return (void *)addr;
 }
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index e44a563d00ff..11801605047b 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -62,10 +62,10 @@
 /*
  * Only first 32 sources are valid if running on IXP42x systems
  */
-#ifndef CONFIG_CPU_IXP46X
-#define NR_IRQS                 32
-#else
+#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
 #define NR_IRQS                 64
+#else
+#define NR_IRQS                 32
 #endif
 
 #define XSCALE_PMU_IRQ          (IRQ_IXP4XX_XSCALE_PMU)
@@ -118,4 +118,14 @@
 #define        IRQ_NAS100D_PCI_INTD    IRQ_IXP4XX_GPIO8
 #define        IRQ_NAS100D_PCI_INTE    IRQ_IXP4XX_GPIO7
 
+/*
+ * D-Link DSM-G600 RevA board IRQs
+ */
+#define        IRQ_DSMG600_PCI_INTA    IRQ_IXP4XX_GPIO11
+#define        IRQ_DSMG600_PCI_INTB    IRQ_IXP4XX_GPIO10
+#define        IRQ_DSMG600_PCI_INTC    IRQ_IXP4XX_GPIO9
+#define        IRQ_DSMG600_PCI_INTD    IRQ_IXP4XX_GPIO8
+#define        IRQ_DSMG600_PCI_INTE    IRQ_IXP4XX_GPIO7
+#define        IRQ_DSMG600_PCI_INTF    IRQ_IXP4XX_GPIO6
+
 #endif
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index ed35e5c94f40..5d949d763a91 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -607,19 +607,4 @@
 
 #define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
 
-#ifndef __ASSEMBLY__
-static inline int cpu_is_ixp46x(void)
-{
-#ifdef CONFIG_CPU_IXP46X
-        unsigned int processor_id;
-
-        asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
-
-        if ((processor_id & 0xffffff00) == 0x69054200)
-                return 1;
-#endif
-        return 0;
-}
-#endif
-
 #endif
diff --git a/include/asm-arm/arch-netx/netx-regs.h b/include/asm-arm/arch-netx/netx-regs.h
index 8ab45bea83ca..fc9aa21f360c 100644
--- a/include/asm-arm/arch-netx/netx-regs.h
+++ b/include/asm-arm/arch-netx/netx-regs.h
@@ -121,8 +121,8 @@
 #define NETX_SYSTEM_IOC_MR          NETX_SYSTEM_REG(0x08)
 
 /* FIXME: Docs are not consistent */
-#define NETX_SYSTEM_RES_CR          NETX_SYSTEM_REG(0x08)
-/* #define NETX_SYSTEM_RES_CR          NETX_SYSTEM_REG(0x0c) */
+/* #define NETX_SYSTEM_RES_CR          NETX_SYSTEM_REG(0x08) */
+#define NETX_SYSTEM_RES_CR          NETX_SYSTEM_REG(0x0c)
 
 #define NETX_SYSTEM_PHY_CONTROL     NETX_SYSTEM_REG(0x10)
 #define NETX_SYSTEM_REV             NETX_SYSTEM_REG(0x34)
diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h
index 91dc8fb1027f..716f34fdb716 100644
--- a/include/asm-arm/arch-ns9xxx/board.h
+++ b/include/asm-arm/arch-ns9xxx/board.h
@@ -15,4 +15,6 @@
 
 #define board_is_a9m9750dev()   (machine_is_cc9p9360dev())
 
+#define board_is_jscc9p9360()   (machine_is_cc9p9360js())
+
 #endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index a7c5ab3d9011..bf30cbdcc2bf 100644
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -11,13 +11,43 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
+#include <asm/arch-ns9xxx/regs-sys.h>
+
+#define CRYSTAL 29491200 /* Hz */
+
+/* The HRM calls this value f_vco */
 static inline u32 ns9xxx_systemclock(void) __attribute__((const));
 static inline u32 ns9xxx_systemclock(void)
 {
+        u32 pll = SYS_PLL;
+
         /*
-         * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c)
+         * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
+         * time.c).
+         *
+         * The following values are given:
+         *   - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
+         *   - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
+         *   - ND in {0 .. 31}
+         *   - FS in {0 .. 3}
+         *
+         * Assuming the worst, we consider:
+         *   - TIMERCLOCKSELECT == 64
+         *   - ND == 0
+         *   - FS == 3
+         *
+         * So HZ should be a divisor of:
+         *      (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
+         *   == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
+         *   == 2^8 * 3^2 * 5^2
+         *   == 57600
+         *
+         * Currently HZ is defined to be 100 for this platform.
+         *
+         * Fine.
          */
-        return 353894400;
+        return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1)
+                >> REGGET(pll, SYS_PLL, FS);
 }
 
 static inline u32 ns9xxx_cpuclock(void) __attribute__((const));
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
index 6819da7c48d4..25600554c4fe 100644
--- a/include/asm-arm/arch-ns9xxx/hardware.h
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -51,8 +51,9 @@
                        ~(__REGVAL(reg ## _ ## field, value))))          \
                   | (__REGVAL(reg ## _ ## field, value))))
 
-#  define REGGET(reg, field)                                            \
-        ((reg & (reg ## _ ## field)) / (field & (-field)))
+#  define REGGET(var, reg, field)                                       \
+        ((var & (reg ## _ ## field)) /                                  \
+         ((reg ## _ ## field) & (-(reg ## _ ## field))))
 
 #else
 
diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h
index 716c106ac0bf..223e51b8e104 100644
--- a/include/asm-arm/arch-ns9xxx/processor.h
+++ b/include/asm-arm/arch-ns9xxx/processor.h
@@ -13,6 +13,7 @@
 
 #include <asm/mach-types.h>
 
-#define processor_is_ns9360()   (machine_is_cc9p9360dev())
+#define processor_is_ns9360()   (machine_is_cc9p9360dev()               \
+                || machine_is_cc9p9360js())
 
 #endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
index 8162a50bb273..a42546aeb92a 100644
--- a/include/asm-arm/arch-ns9xxx/regs-sys.h
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -48,6 +48,12 @@
 /* PLL Configuration register */
 #define SYS_PLL         __REG(0xa0900188)
 
+/* PLL FS status */
+#define SYS_PLL_FS              __REGBITS(24, 23)
+
+/* PLL ND status */
+#define SYS_PLL_ND              __REGBITS(20, 16)
+
 /* PLL Configuration register: PLL SW change */
 #define SYS_PLL_SWC             __REGBIT(15)
 #define SYS_PLL_SWC_NO                  __REGVAL(SYS_PLL_SWC, 0)
diff --git a/include/asm-arm/arch-pxa/i2c.h b/include/asm-arm/arch-pxa/i2c.h
index 46ec2243974a..e404b233d8a8 100644
--- a/include/asm-arm/arch-pxa/i2c.h
+++ b/include/asm-arm/arch-pxa/i2c.h
@@ -64,6 +64,7 @@ struct i2c_slave_client;
 struct i2c_pxa_platform_data {
         unsigned int            slave_addr;
         struct i2c_slave_client *slave;
+        unsigned int            class;
 };
 
 extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h
index a38a28c4bbd8..ef4f570381d1 100644
--- a/include/asm-arm/arch-pxa/mmc.h
+++ b/include/asm-arm/arch-pxa/mmc.h
@@ -1,7 +1,7 @@
 #ifndef ASMARM_ARCH_MMC_H
 #define ASMARM_ARCH_MMC_H
 
-#include <linux/mmc/protocol.h>
+#include <linux/mmc/host.h>
 #include <linux/interrupt.h>
 
 struct device;
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 139c9d954818..dbcc9298b0c8 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1801,35 +1801,35 @@
 #define CCCR_M_MASK     0x0060          /* Memory Frequency to Run Mode Frequency Multiplier */
 #define CCCR_L_MASK     0x001f          /* Crystal Frequency to Memory Frequency Multiplier */
 
-#define CKEN24_CAMERA   (1 << 24)       /* Camera Interface Clock Enable */
-#define CKEN23_SSP1     (1 << 23)       /* SSP1 Unit Clock Enable */
-#define CKEN22_MEMC     (1 << 22)       /* Memory Controller Clock Enable */
-#define CKEN21_MEMSTK   (1 << 21)       /* Memory Stick Host Controller */
-#define CKEN20_IM       (1 << 20)       /* Internal Memory Clock Enable */
-#define CKEN19_KEYPAD   (1 << 19)       /* Keypad Interface Clock Enable */
-#define CKEN18_USIM     (1 << 18)       /* USIM Unit Clock Enable */
-#define CKEN17_MSL      (1 << 17)       /* MSL Unit Clock Enable */
-#define CKEN16_LCD      (1 << 16)       /* LCD Unit Clock Enable */
-#define CKEN15_PWRI2C   (1 << 15)       /* PWR I2C Unit Clock Enable */
-#define CKEN14_I2C      (1 << 14)       /* I2C Unit Clock Enable */
-#define CKEN13_FICP     (1 << 13)       /* FICP Unit Clock Enable */
-#define CKEN12_MMC      (1 << 12)       /* MMC Unit Clock Enable */
-#define CKEN11_USB      (1 << 11)       /* USB Unit Clock Enable */
-#define CKEN10_ASSP     (1 << 10)       /* ASSP (SSP3) Clock Enable */
-#define CKEN10_USBHOST  (1 << 10)       /* USB Host Unit Clock Enable */
-#define CKEN9_OSTIMER   (1 << 9)        /* OS Timer Unit Clock Enable */
-#define CKEN9_NSSP      (1 << 9)        /* NSSP (SSP2) Clock Enable */
-#define CKEN8_I2S       (1 << 8)        /* I2S Unit Clock Enable */
-#define CKEN7_BTUART    (1 << 7)        /* BTUART Unit Clock Enable */
-#define CKEN6_FFUART    (1 << 6)        /* FFUART Unit Clock Enable */
-#define CKEN5_STUART    (1 << 5)        /* STUART Unit Clock Enable */
-#define CKEN4_HWUART    (1 << 4)        /* HWUART Unit Clock Enable */
-#define CKEN4_SSP3      (1 << 4)        /* SSP3 Unit Clock Enable */
-#define CKEN3_SSP       (1 << 3)        /* SSP Unit Clock Enable */
-#define CKEN3_SSP2      (1 << 3)        /* SSP2 Unit Clock Enable */
-#define CKEN2_AC97      (1 << 2)        /* AC97 Unit Clock Enable */
-#define CKEN1_PWM1      (1 << 1)        /* PWM1 Clock Enable */
-#define CKEN0_PWM0      (1 << 0)        /* PWM0 Clock Enable */
+#define CKEN_CAMERA     (24)    /* Camera Interface Clock Enable */
+#define CKEN_SSP1       (23)    /* SSP1 Unit Clock Enable */
+#define CKEN_MEMC       (22)    /* Memory Controller Clock Enable */
+#define CKEN_MEMSTK     (21)    /* Memory Stick Host Controller */
+#define CKEN_IM         (20)    /* Internal Memory Clock Enable */
+#define CKEN_KEYPAD     (19)    /* Keypad Interface Clock Enable */
+#define CKEN_USIM       (18)    /* USIM Unit Clock Enable */
+#define CKEN_MSL        (17)    /* MSL Unit Clock Enable */
+#define CKEN_LCD        (16)    /* LCD Unit Clock Enable */
+#define CKEN_PWRI2C     (15)    /* PWR I2C Unit Clock Enable */
+#define CKEN_I2C        (14)    /* I2C Unit Clock Enable */
+#define CKEN_FICP       (13)    /* FICP Unit Clock Enable */
+#define CKEN_MMC        (12)    /* MMC Unit Clock Enable */
+#define CKEN_USB        (11)    /* USB Unit Clock Enable */
+#define CKEN_ASSP       (10)    /* ASSP (SSP3) Clock Enable */
+#define CKEN_USBHOST    (10)    /* USB Host Unit Clock Enable */
+#define CKEN_OSTIMER    (9)     /* OS Timer Unit Clock Enable */
+#define CKEN_NSSP       (9)     /* NSSP (SSP2) Clock Enable */
+#define CKEN_I2S        (8)     /* I2S Unit Clock Enable */
+#define CKEN_BTUART     (7)     /* BTUART Unit Clock Enable */
+#define CKEN_FFUART     (6)     /* FFUART Unit Clock Enable */
+#define CKEN_STUART     (5)     /* STUART Unit Clock Enable */
+#define CKEN_HWUART     (4)     /* HWUART Unit Clock Enable */
+#define CKEN_SSP3       (4)     /* SSP3 Unit Clock Enable */
+#define CKEN_SSP        (3)     /* SSP Unit Clock Enable */
+#define CKEN_SSP2       (3)     /* SSP2 Unit Clock Enable */
+#define CKEN_AC97       (2)     /* AC97 Unit Clock Enable */
+#define CKEN_PWM1       (1)     /* PWM1 Clock Enable */
+#define CKEN_PWM0       (0)     /* PWM0 Clock Enable */
 
 #define OSCC_OON        (1 << 1)        /* 32.768kHz OON (write-once only bit) */
 #define OSCC_OOK        (1 << 0)        /* 32.768kHz OOK (read-only bit) */
diff --git a/include/asm-arm/arch-pxa/pxa27x_keyboard.h b/include/asm-arm/arch-pxa/pxa27x_keyboard.h
new file mode 100644
index 000000000000..3aaff923b2ca
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa27x_keyboard.h
@@ -0,0 +1,13 @@
+#define PXAKBD_MAXROW           8
+#define PXAKBD_MAXCOL           8
+
+struct pxa27x_keyboard_platform_data {
+        int nr_rows, nr_cols;
+        int keycodes[PXAKBD_MAXROW][PXAKBD_MAXCOL];
+        int gpio_modes[PXAKBD_MAXROW + PXAKBD_MAXCOL];
+
+#ifdef CONFIG_PM
+        u32 reg_kpc;
+        u32 reg_kprec;
+#endif
+};
diff --git a/include/asm-arm/arch-s3c2410/regs-ac97.h b/include/asm-arm/arch-s3c2410/regs-ac97.h
index bdd6a4f93d7f..b004dee6bcaf 100644
--- a/include/asm-arm/arch-s3c2410/regs-ac97.h
+++ b/include/asm-arm/arch-s3c2410/regs-ac97.h
@@ -13,11 +13,55 @@
 #ifndef __ASM_ARCH_REGS_AC97_H
 #define __ASM_ARCH_REGS_AC97_H __FILE__
 
-#define S3C_AC97_GLBCTRL        (0x00)
-#define S3C_AC97_GLBSTAT        (0x04)
-#define S3C_AC97_CODEC_CMD      (0x08)
-#define S3C_AC97_PCM_ADDR       (0x10)
-#define S3C_AC97_PCM_DATA       (0x18)
-#define S3C_AC97_MIC_DATA       (0x1C)
+#define S3C_AC97_GLBCTRL                                (0x00)
+
+#define S3C_AC97_GLBCTRL_CODECREADYIE                   (1<<22)
+#define S3C_AC97_GLBCTRL_PCMOUTURIE                     (1<<21)
+#define S3C_AC97_GLBCTRL_PCMINORIE                      (1<<20)
+#define S3C_AC97_GLBCTRL_MICINORIE                      (1<<19)
+#define S3C_AC97_GLBCTRL_PCMOUTTIE                      (1<<18)
+#define S3C_AC97_GLBCTRL_PCMINTIE                       (1<<17)
+#define S3C_AC97_GLBCTRL_MICINTIE                       (1<<16)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_OFF                   (0<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_PIO                   (1<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_DMA                   (2<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_MASK                  (3<<12)
+#define S3C_AC97_GLBCTRL_PCMINTM_OFF                    (0<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_PIO                    (1<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_DMA                    (2<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_MASK                   (3<<10)
+#define S3C_AC97_GLBCTRL_MICINTM_OFF                    (0<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_PIO                    (1<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_DMA                    (2<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_MASK                   (3<<8)
+#define S3C_AC97_GLBCTRL_TRANSFERDATAENABLE             (1<<3)
+#define S3C_AC97_GLBCTRL_ACLINKON                       (1<<2)
+#define S3C_AC97_GLBCTRL_WARMRESET                      (1<<1)
+#define S3C_AC97_GLBCTRL_COLDRESET                      (1<<0)
+
+#define S3C_AC97_GLBSTAT                                (0x04)
+
+#define S3C_AC97_GLBSTAT_CODECREADY                     (1<<22)
+#define S3C_AC97_GLBSTAT_PCMOUTUR                       (1<<21)
+#define S3C_AC97_GLBSTAT_PCMINORI                       (1<<20)
+#define S3C_AC97_GLBSTAT_MICINORI                       (1<<19)
+#define S3C_AC97_GLBSTAT_PCMOUTTI                       (1<<18)
+#define S3C_AC97_GLBSTAT_PCMINTI                        (1<<17)
+#define S3C_AC97_GLBSTAT_MICINTI                        (1<<16)
+#define S3C_AC97_GLBSTAT_MAINSTATE_IDLE                 (0<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_INIT                 (1<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_READY                (2<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE               (3<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_LP                   (4<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_WARM                 (5<<0)
+
+#define S3C_AC97_CODEC_CMD                              (0x08)
+
+#define S3C_AC97_CODEC_CMD_READ                         (1<<23)
+
+#define S3C_AC97_STAT                                   (0x0c)
+#define S3C_AC97_PCM_ADDR                               (0x10)
+#define S3C_AC97_PCM_DATA                               (0x18)
+#define S3C_AC97_MIC_DATA                               (0x1C)
 
 #endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h
index 3c8354619b60..e1e9805d2d9a 100644
--- a/include/asm-arm/arch-s3c2410/regs-udc.h
+++ b/include/asm-arm/arch-s3c2410/regs-udc.h
@@ -75,7 +75,7 @@
 #define S3C2410_UDC_OUT_FIFO_CNT1_REG   S3C2410_USBDREG(0x0198)
 #define S3C2410_UDC_OUT_FIFO_CNT2_REG   S3C2410_USBDREG(0x019c)
 
-
+#define S3C2410_UDC_FUNCADDR_UPDATE     (1<<7)
 
 #define S3C2410_UDC_PWR_ISOUP           (1<<7) // R/W
 #define S3C2410_UDC_PWR_RESET           (1<<3) // R
@@ -135,10 +135,6 @@
 #define S3C2410_UDC_OCSR2_ISO           (1<<6) // R/W
 #define S3C2410_UDC_OCSR2_DMAIEN        (1<<5) // R/W
 
-#define S3C2410_UDC_SETIX(base,x)           \
-        writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG);
-
-
 #define S3C2410_UDC_EP0_CSR_OPKRDY      (1<<0)
 #define S3C2410_UDC_EP0_CSR_IPKRDY      (1<<1)
 #define S3C2410_UDC_EP0_CSR_SENTSTL     (1<<2)
diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h
index a0ae2b954d29..3a6d3eb27622 100644
--- a/include/asm-arm/ecard.h
+++ b/include/asm-arm/ecard.h
@@ -160,6 +160,7 @@ struct expansion_card {
         unsigned char           irqmask;        /* IRQ mask                     */
         unsigned char           fiqmask;        /* FIQ mask                     */
         unsigned char           claimed;        /* Card claimed?                */
+        unsigned char           easi;           /* EASI card                    */
 
         void                    *irq_data;      /* Data for use for IRQ by card */
         void                    *fiq_data;      /* Data for use for FIQ by card */
@@ -169,7 +170,6 @@ struct expansion_card {
         CONST unsigned int      dma;            /* DMA number (for request_dma) */
         CONST unsigned int      irq;            /* IRQ number (for request_irq) */
         CONST unsigned int      fiq;            /* FIQ number (for request_irq) */
-        CONST card_type_t       type;           /* Type of card                 */
         CONST struct in_ecid    cid;            /* Card Identification          */
 
         /* Private internal data */
@@ -224,56 +224,6 @@ ecard_address(struct expansion_card *ec, card_type_t type, card_speed_t speed)
 extern int ecard_request_resources(struct expansion_card *ec);
 extern void ecard_release_resources(struct expansion_card *ec);
 
-#ifdef ECARD_C
-/* Definitions internal to ecard.c - for it's use only!!
- *
- * External expansion card header as read from the card
- */
-struct ex_ecid {
-        unsigned char   r_irq:1;
-        unsigned char   r_zero:1;
-        unsigned char   r_fiq:1;
-        unsigned char   r_id:4;
-        unsigned char   r_a:1;
-
-        unsigned char   r_cd:1;
-        unsigned char   r_is:1;
-        unsigned char   r_w:2;
-        unsigned char   r_r1:4;
-
-        unsigned char   r_r2:8;
-
-        unsigned char   r_prod[2];
-
-        unsigned char   r_manu[2];
-
-        unsigned char   r_country;
-
-        unsigned char   r_fiqmask;
-        unsigned char   r_fiqoff[3];
-
-        unsigned char   r_irqmask;
-        unsigned char   r_irqoff[3];
-};
-
-/*
- * Chunk directory entry as read from the card
- */
-struct ex_chunk_dir {
-        unsigned char r_id;
-        unsigned char r_len[3];
-        unsigned long r_start;
-        union {
-                char string[256];
-                char data[1];
-        } d;
-#define c_id(x)         ((x)->r_id)
-#define c_len(x)        ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16))
-#define c_start(x)      ((x)->r_start)
-};
-
-#endif
-
 extern struct bus_type ecard_bus_type;
 
 #define ECARD_DEV(_d)   container_of((_d), struct expansion_card, dev)
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index 15141a9caca8..63feceb7ede5 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -28,6 +28,7 @@
 extern void gpio_line_config(int line, int direction);
 extern int  gpio_line_get(int line);
 extern void gpio_line_set(int line, int value);
+extern int init_atu;
 #endif
 
 
@@ -41,7 +42,7 @@ extern void gpio_line_set(int line, int value);
                                         IOP3XX_PERIPHERAL_SIZE - 1)
 #define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\
                                         IOP3XX_PERIPHERAL_SIZE - 1)
-#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
+#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) (addr) -\
                                         (IOP3XX_PERIPHERAL_PHYS_BASE\
                                         - IOP3XX_PERIPHERAL_VIRT_BASE))
 #define IOP3XX_REG_ADDR(reg)            (IOP3XX_PERIPHERAL_VIRT_BASE + (reg))
@@ -103,6 +104,21 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_PCIXCMD          (volatile u16 *)IOP3XX_REG_ADDR(0x01e2)
 #define IOP3XX_PCIXSR           (volatile u32 *)IOP3XX_REG_ADDR(0x01e4)
 #define IOP3XX_PCIIRSR          (volatile u32 *)IOP3XX_REG_ADDR(0x01ec)
+#define IOP3XX_PCSR_OUT_Q_BUSY (1 << 15)
+#define IOP3XX_PCSR_IN_Q_BUSY   (1 << 14)
+#define IOP3XX_ATUCR_OUT_EN     (1 << 1)
+
+#define IOP3XX_INIT_ATU_DEFAULT 0
+#define IOP3XX_INIT_ATU_DISABLE -1
+#define IOP3XX_INIT_ATU_ENABLE   1
+
+#ifdef CONFIG_IOP3XX_ATU
+#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\
+                                IOP3XX_INIT_ATU_ENABLE : init_atu)
+#else
+#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\
+                                IOP3XX_INIT_ATU_DISABLE : init_atu)
+#endif
 
 /* Messaging Unit  */
 #define IOP3XX_IMR0             (volatile u32 *)IOP3XX_REG_ADDR(0x0310)
@@ -253,14 +269,12 @@ extern void gpio_line_set(int line, int value);
 /*
  * IOP3XX I/O and Mem space regions for PCI autoconfiguration
  */
-#define IOP3XX_PCI_MEM_WINDOW_SIZE      0x04000000
-#define IOP3XX_PCI_LOWER_MEM_PA         0x80000000
-#define IOP3XX_PCI_LOWER_MEM_BA         (*IOP3XX_OMWTVR0)
+#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000
 
 #define IOP3XX_PCI_IO_WINDOW_SIZE       0x00010000
 #define IOP3XX_PCI_LOWER_IO_PA          0x90000000
 #define IOP3XX_PCI_LOWER_IO_VA          0xfe000000
-#define IOP3XX_PCI_LOWER_IO_BA          (*IOP3XX_OIOWTVR)
+#define IOP3XX_PCI_LOWER_IO_BA          0x90000000
 #define IOP3XX_PCI_UPPER_IO_PA          (IOP3XX_PCI_LOWER_IO_PA +\
                                         IOP3XX_PCI_IO_WINDOW_SIZE - 1)
 #define IOP3XX_PCI_UPPER_IO_VA          (IOP3XX_PCI_LOWER_IO_VA +\
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 5f60b4220906..8261ff9e7955 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -56,13 +56,22 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 
 /*
  * Architecture ioremap implementation.
- *
- * __ioremap takes CPU physical address.
- *
- * __ioremap_pfn takes a Page Frame Number and an offset into that page
  */
-extern void __iomem * __ioremap_pfn(unsigned long, unsigned long, size_t, unsigned long);
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+#define MT_DEVICE               0
+#define MT_DEVICE_NONSHARED     1
+#define MT_DEVICE_CACHED        2
+#define MT_DEVICE_IXP2000       3
+/*
+ * types 4 onwards can be found in asm/mach/map.h and are undefined
+ * for ioremap
+ */
+
+/*
+ * __arm_ioremap takes CPU physical address.
+ * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page
+ */
+extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int);
+extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int);
 extern void __iounmap(volatile void __iomem *addr);
 
 /*
@@ -203,14 +212,14 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  *
  */
 #ifndef __arch_ioremap
-#define ioremap(cookie,size)            __ioremap(cookie,size,0)
-#define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0)
-#define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE)
+#define ioremap(cookie,size)            __arm_ioremap(cookie, size, MT_DEVICE)
+#define ioremap_nocache(cookie,size)    __arm_ioremap(cookie, size, MT_DEVICE)
+#define ioremap_cached(cookie,size)     __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
 #define iounmap(cookie)                 __iounmap(cookie)
 #else
-#define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0)
-#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0)
-#define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
+#define ioremap(cookie,size)            __arch_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_cached(cookie,size)     __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
 #define iounmap(cookie)                 __arch_iounmap(cookie)
 #endif
 
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
index cef5364ed5fe..7ef3c8390180 100644
--- a/include/asm-arm/mach/map.h
+++ b/include/asm-arm/mach/map.h
@@ -9,6 +9,8 @@
  *
  *  Page table mapping constructs and function prototypes
  */
+#include <asm/io.h>
+
 struct map_desc {
         unsigned long virtual;
         unsigned long pfn;
@@ -16,15 +18,16 @@ struct map_desc {
         unsigned int type;
 };
 
-#define MT_DEVICE               0
-#define MT_CACHECLEAN           1
-#define MT_MINICLEAN            2
-#define MT_LOW_VECTORS          3
-#define MT_HIGH_VECTORS         4
-#define MT_MEMORY               5
-#define MT_ROM                  6
-#define MT_IXP2000_DEVICE       7
-#define MT_NONSHARED_DEVICE     8
+/* types 0-3 are defined in asm/io.h */
+#define MT_CACHECLEAN           4
+#define MT_MINICLEAN            5
+#define MT_LOW_VECTORS          6
+#define MT_HIGH_VECTORS         7
+#define MT_MEMORY               8
+#define MT_ROM                  9
+
+#define MT_NONSHARED_DEVICE     MT_DEVICE_NONSHARED
+#define MT_IXP2000_DEVICE       MT_DEVICE_IXP2000
 
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);
diff --git a/include/asm-arm/mach/mmc.h b/include/asm-arm/mach/mmc.h
index 1b3555d4b41e..eb91145c00c4 100644
--- a/include/asm-arm/mach/mmc.h
+++ b/include/asm-arm/mach/mmc.h
@@ -4,7 +4,7 @@
 #ifndef ASMARM_MACH_MMC_H
 #define ASMARM_MACH_MMC_H
 
-#include <linux/mmc/protocol.h>
+#include <linux/mmc/host.h>
 
 struct mmc_platform_data {
         unsigned int ocr_mask;                  /* available voltages */
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index d1a65b1edcaa..f8755c818b54 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -16,6 +16,7 @@
 #include <linux/compiler.h>
 #include <asm/cacheflush.h>
 #include <asm/proc-fns.h>
+#include <asm-generic/mm_hooks.h>
 
 void __check_kvm_seq(struct mm_struct *mm);
 
diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/include/asm-arm/plat-s3c24xx/clock.h
index f6135dbb9fa9..235b753cd877 100644
--- a/include/asm-arm/plat-s3c24xx/clock.h
+++ b/include/asm-arm/plat-s3c24xx/clock.h
@@ -56,6 +56,7 @@ extern struct mutex clocks_mutex;
 extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
 
 extern int s3c24xx_register_clock(struct clk *clk);
+extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
 
 extern int s3c24xx_setup_clocks(unsigned long xtal,
                                 unsigned long fclk,
diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h
index 15dd18810905..23e420e8bd5b 100644
--- a/include/asm-arm/plat-s3c24xx/cpu.h
+++ b/include/asm-arm/plat-s3c24xx/cpu.h
@@ -40,22 +40,6 @@ extern void s3c24xx_init_uartdevs(char *name,
                                   struct s3c24xx_uart_resources *res,
                                   struct s3c2410_uartcfg *cfg, int no);
 
-/* the board structure is used at first initialsation time
- * to get info such as the devices to register for this
- * board. This is done because platfrom_add_devices() cannot
- * be called from the map_io entry.
-*/
-
-struct s3c24xx_board {
-        struct platform_device  **devices;
-        unsigned int              devices_count;
-
-        struct clk              **clocks;
-        unsigned int              clocks_count;
-};
-
-extern void s3c24xx_set_board(struct s3c24xx_board *board);
-
 /* timer for 2410/2440 */
 
 struct sys_timer;
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index 5a8ef787dbf8..2d0dad8c10ac 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -10,23 +10,19 @@
 #ifndef __ASM_ARM_PTRACE_H
 #define __ASM_ARM_PTRACE_H
 
-
 #define PTRACE_GETREGS          12
 #define PTRACE_SETREGS          13
 #define PTRACE_GETFPREGS        14
 #define PTRACE_SETFPREGS        15
-
+/* PTRACE_ATTACH is 16 */
+/* PTRACE_DETACH is 17 */
 #define PTRACE_GETWMMXREGS      18
 #define PTRACE_SETWMMXREGS      19
-
+/* 20 is unused */
 #define PTRACE_OLDSETOPTIONS    21
-
 #define PTRACE_GET_THREAD_AREA  22
-
 #define PTRACE_SET_SYSCALL      23
-
 /* PTRACE_SYSCALL is 24 */
-
 #define PTRACE_GETCRUNCHREGS    25
 #define PTRACE_SETCRUNCHREGS    26
 
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 69134c7518c1..63b3080bdac4 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -76,6 +76,8 @@
 #include <linux/linkage.h>
 #include <linux/irqflags.h>
 
+#define __exception     __attribute__((section(".exception.text")))
+
 struct thread_info;
 struct task_struct;
 
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index 5014794f9eb3..eae85b09db2e 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -57,6 +57,7 @@ struct thread_info {
         __u32                   cpu;            /* cpu */
         __u32                   cpu_domain;     /* cpu domain */
         struct cpu_context_save cpu_context;    /* cpu context */
+        __u32                   syscall;        /* syscall number */
         __u8                    used_cp[16];    /* thread used copro */
         unsigned long           tp_value;
         struct crunch_state     crunchstate;
diff --git a/include/asm-arm26/mmu_context.h b/include/asm-arm26/mmu_context.h
index 1a929bfe5c3a..16c821f81b8d 100644
--- a/include/asm-arm26/mmu_context.h
+++ b/include/asm-arm26/mmu_context.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARM_MMU_CONTEXT_H
 #define __ASM_ARM_MMU_CONTEXT_H
 
+#include <asm-generic/mm_hooks.h>
+
 #define init_new_context(tsk,mm)        0
 #define destroy_context(mm)             do { } while(0)
 
diff --git a/include/asm-avr32/mmu_context.h b/include/asm-avr32/mmu_context.h
index 31add1ae8089..c37c391faef6 100644
--- a/include/asm-avr32/mmu_context.h
+++ b/include/asm-avr32/mmu_context.h
@@ -15,6 +15,7 @@
 #include <asm/tlbflush.h>
 #include <asm/pgalloc.h>
 #include <asm/sysreg.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * The MMU "context" consists of two things:
diff --git a/include/asm-avr32/scatterlist.h b/include/asm-avr32/scatterlist.h
index bfe7d753423c..c6d5ce3b3a25 100644
--- a/include/asm-avr32/scatterlist.h
+++ b/include/asm-avr32/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_AVR32_SCATTERLIST_H
 #define __ASM_AVR32_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     struct page         *page;
     unsigned int        offset;
diff --git a/include/asm-cris/mmu_context.h b/include/asm-cris/mmu_context.h
index e6e659dc757b..72ba08dcfd18 100644
--- a/include/asm-cris/mmu_context.h
+++ b/include/asm-cris/mmu_context.h
@@ -1,6 +1,8 @@
 #ifndef __CRIS_MMU_CONTEXT_H
 #define __CRIS_MMU_CONTEXT_H
 
+#include <asm-generic/mm_hooks.h>
+
 extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
 extern void get_mmu_context(struct mm_struct *mm);
 extern void destroy_context(struct mm_struct *mm);
diff --git a/include/asm-frv/mmu_context.h b/include/asm-frv/mmu_context.h
index 72edcaaccd5d..c7daa395156a 100644
--- a/include/asm-frv/mmu_context.h
+++ b/include/asm-frv/mmu_context.h
@@ -15,6 +15,7 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-frv/scatterlist.h b/include/asm-frv/scatterlist.h
index fb38fd329a5f..8e827fa853f1 100644
--- a/include/asm-frv/scatterlist.h
+++ b/include/asm-frv/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_SCATTERLIST_H
 #define _ASM_SCATTERLIST_H
 
+#include <asm/types.h>
+
 /*
  * Drivers must set either ->address or (preferred) ->page and ->offset
  * to indicate where data must be transferred to/from.
diff --git a/include/asm-generic/mm_hooks.h b/include/asm-generic/mm_hooks.h
new file mode 100644
index 000000000000..67dea8123683
--- /dev/null
+++ b/include/asm-generic/mm_hooks.h
@@ -0,0 +1,18 @@
+/*
+ * Define generic no-op hooks for arch_dup_mmap and arch_exit_mmap, to
+ * be included in asm-FOO/mmu_context.h for any arch FOO which doesn't
+ * need to hook these.
+ */
+#ifndef _ASM_GENERIC_MM_HOOKS_H
+#define _ASM_GENERIC_MM_HOOKS_H
+
+static inline void arch_dup_mmap(struct mm_struct *oldmm,
+                                 struct mm_struct *mm)
+{
+}
+
+static inline void arch_exit_mmap(struct mm_struct *mm)
+{
+}
+
+#endif  /* _ASM_GENERIC_MM_HOOKS_H */
diff --git a/include/asm-generic/percpu.h b/include/asm-generic/percpu.h
index 196376262240..d984a9041436 100644
--- a/include/asm-generic/percpu.h
+++ b/include/asm-generic/percpu.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_GENERIC_PERCPU_H_
 #define _ASM_GENERIC_PERCPU_H_
 #include <linux/compiler.h>
+#include <linux/threads.h>
 
 #define __GENERIC_PER_CPU
 #ifdef CONFIG_SMP
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 9fcc8d9fbb14..f3806a74c478 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -208,7 +208,7 @@
         }
 
 #define NOTES                                                           \
-                .notes : { *(.note.*) } :note
+        .notes : { *(.note.*) } :note
 
 #define INITCALLS                                                       \
         *(.initcall0.init)                                              \
diff --git a/include/asm-h8300/mmu_context.h b/include/asm-h8300/mmu_context.h
index 5c165f7bee0e..f44b730da54d 100644
--- a/include/asm-h8300/mmu_context.h
+++ b/include/asm-h8300/mmu_context.h
@@ -4,6 +4,7 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-h8300/scatterlist.h b/include/asm-h8300/scatterlist.h
index 7627f0cd1a2f..985fdf54eaca 100644
--- a/include/asm-h8300/scatterlist.h
+++ b/include/asm-h8300/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef _H8300_SCATTERLIST_H
 #define _H8300_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
         struct page     *page;
         unsigned int    offset;
diff --git a/include/asm-i386/Kbuild b/include/asm-i386/Kbuild
index 5ae93afc67e1..cbf6e8f1087b 100644
--- a/include/asm-i386/Kbuild
+++ b/include/asm-i386/Kbuild
@@ -3,8 +3,10 @@ include include/asm-generic/Kbuild.asm
 header-y += boot.h
 header-y += debugreg.h
 header-y += ldt.h
+header-y += msr-index.h
 header-y += ptrace-abi.h
 header-y += ucontext.h
 
+unifdef-y += msr.h
 unifdef-y += mtrr.h
 unifdef-y += vm86.h
diff --git a/include/asm-i386/agp.h b/include/asm-i386/agp.h
index 9075083bab76..6af173dbf123 100644
--- a/include/asm-i386/agp.h
+++ b/include/asm-i386/agp.h
@@ -12,8 +12,10 @@
  * data corruption on some CPUs.
  */
 
-int map_page_into_agp(struct page *page);
-int unmap_page_from_agp(struct page *page);
+/* Caller's responsibility to call global_flush_tlb() for
+ * performance reasons */
+#define map_page_into_agp(page) change_page_attr(page, 1, PAGE_KERNEL_NOCACHE)
+#define unmap_page_from_agp(page) change_page_attr(page, 1, PAGE_KERNEL)
 #define flush_agp_mappings() global_flush_tlb()
 
 /* Could use CLFLUSH here if the cpu supports it. But then it would
diff --git a/include/asm-i386/alternative.h b/include/asm-i386/alternative.h
index b8fa9557c532..0f70b379b029 100644
--- a/include/asm-i386/alternative.h
+++ b/include/asm-i386/alternative.h
@@ -1,8 +1,6 @@
 #ifndef _I386_ALTERNATIVE_H
 #define _I386_ALTERNATIVE_H
 
-#ifdef __KERNEL__
-
 #include <asm/types.h>
 #include <linux/stddef.h>
 #include <linux/types.h>
@@ -16,6 +14,7 @@ struct alt_instr {
         u8  pad;
 };
 
+extern void alternative_instructions(void);
 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
 
 struct module;
@@ -31,9 +30,7 @@ static inline void alternatives_smp_module_add(struct module *mod, char *name,
                                         void *text, void *text_end) {}
 static inline void alternatives_smp_module_del(struct module *mod) {}
 static inline void alternatives_smp_switch(int smp) {}
-#endif
-
-#endif
+#endif  /* CONFIG_SMP */
 
 /*
  * Alternative instructions for different CPU types or capabilities.
@@ -85,6 +82,21 @@ static inline void alternatives_smp_switch(int smp) {}
                       "663:\n\t" newinstr "\n664:\n"   /* replacement */\
                       ".previous" :: "i" (feature), ##input)
 
+/* Like alternative_input, but with a single output argument */
+#define alternative_io(oldinstr, newinstr, feature, output, input...) \
+        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
+                      ".section .altinstructions,\"a\"\n"               \
+                      "  .align 4\n"                                    \
+                      "  .long 661b\n"            /* label */           \
+                      "  .long 663f\n"            /* new instruction */ \
+                      "  .byte %c[feat]\n"        /* feature bit */     \
+                      "  .byte 662b-661b\n"       /* sourcelen */       \
+                      "  .byte 664f-663f\n"       /* replacementlen */  \
+                      ".previous\n"                                     \
+                      ".section .altinstr_replacement,\"ax\"\n"         \
+                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
+                      ".previous" : output : [feat] "i" (feature), ##input)
+
 /*
  * Alternative inline assembly for SMP.
  *
@@ -118,15 +130,17 @@ static inline void alternatives_smp_switch(int smp) {}
 #define LOCK_PREFIX ""
 #endif
 
-struct paravirt_patch;
+struct paravirt_patch_site;
 #ifdef CONFIG_PARAVIRT
-void apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end);
+void apply_paravirt(struct paravirt_patch_site *start,
+                    struct paravirt_patch_site *end);
 #else
 static inline void
-apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end)
+apply_paravirt(struct paravirt_patch_site *start,
+               struct paravirt_patch_site *end)
 {}
-#define __start_parainstructions NULL
-#define __stop_parainstructions NULL
+#define __parainstructions      NULL
+#define __parainstructions_end  NULL
 #endif
 
 #endif /* _I386_ALTERNATIVE_H */
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index a19810a08ae9..1e8f6f252dd3 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -2,6 +2,7 @@
 #define __ASM_APIC_H
 
 #include <linux/pm.h>
+#include <linux/delay.h>
 #include <asm/fixmap.h>
 #include <asm/apicdef.h>
 #include <asm/processor.h>
@@ -64,12 +65,8 @@ static __inline fastcall unsigned long native_apic_read(unsigned long reg)
         return *((volatile unsigned long *)(APIC_BASE+reg));
 }
 
-static __inline__ void apic_wait_icr_idle(void)
-{
-        while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY )
-                cpu_relax();
-}
-
+void apic_wait_icr_idle(void);
+unsigned long safe_apic_wait_icr_idle(void);
 int get_physical_broadcast(void);
 
 #ifdef CONFIG_X86_GOOD_APIC
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index c90c7c499302..d28979ff73be 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -1,198 +1,12 @@
 /*
- *  include/asm-i386/bugs.h
- *
- *  Copyright (C) 1994  Linus Torvalds
- *
- *  Cyrix stuff, June 1998 by:
- *      - Rafael R. Reilova (moved everything from head.S),
- *        <rreilova@ececs.uc.edu>
- *      - Channing Corn (tests & fixes),
- *      - Andrew D. Balsa (code cleanup).
- */
-
-/*
  * This is included by init/main.c to check for architecture-dependent bugs.
  *
  * Needs:
  *      void check_bugs(void);
  */
+#ifndef _ASM_I386_BUG_H
+#define _ASM_I386_BUG_H
 
-#include <linux/init.h>
-#include <asm/processor.h>
-#include <asm/i387.h>
-#include <asm/msr.h>
-#include <asm/paravirt.h>
-
-static int __init no_halt(char *s)
-{
-        boot_cpu_data.hlt_works_ok = 0;
-        return 1;
-}
-
-__setup("no-hlt", no_halt);
-
-static int __init mca_pentium(char *s)
-{
-        mca_pentium_flag = 1;
-        return 1;
-}
-
-__setup("mca-pentium", mca_pentium);
-
-static int __init no_387(char *s)
-{
-        boot_cpu_data.hard_math = 0;
-        write_cr0(0xE | read_cr0());
-        return 1;
-}
-
-__setup("no387", no_387);
-
-static double __initdata x = 4195835.0;
-static double __initdata y = 3145727.0;
-
-/*
- * This used to check for exceptions.. 
- * However, it turns out that to support that,
- * the XMM trap handlers basically had to
- * be buggy. So let's have a correct XMM trap
- * handler, and forget about printing out
- * some status at boot.
- *
- * We should really only care about bugs here
- * anyway. Not features.
- */
-static void __init check_fpu(void)
-{
-        if (!boot_cpu_data.hard_math) {
-#ifndef CONFIG_MATH_EMULATION
-                printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
-                printk(KERN_EMERG "Giving up.\n");
-                for (;;) ;
-#endif
-                return;
-        }
-
-/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
-        /* Test for the divl bug.. */
-        __asm__("fninit\n\t"
-                "fldl %1\n\t"
-                "fdivl %2\n\t"
-                "fmull %2\n\t"
-                "fldl %1\n\t"
-                "fsubp %%st,%%st(1)\n\t"
-                "fistpl %0\n\t"
-                "fwait\n\t"
-                "fninit"
-                : "=m" (*&boot_cpu_data.fdiv_bug)
-                : "m" (*&x), "m" (*&y));
-        if (boot_cpu_data.fdiv_bug)
-                printk("Hmm, FPU with FDIV bug.\n");
-}
-
-static void __init check_hlt(void)
-{
-        if (paravirt_enabled())
-                return;
-
-        printk(KERN_INFO "Checking 'hlt' instruction... ");
-        if (!boot_cpu_data.hlt_works_ok) {
-                printk("disabled\n");
-                return;
-        }
-        halt();
-        halt();
-        halt();
-        halt();
-        printk("OK.\n");
-}
-
-/*
- *      Most 386 processors have a bug where a POPAD can lock the 
- *      machine even from user space.
- */
- 
-static void __init check_popad(void)
-{
-#ifndef CONFIG_X86_POPAD_OK
-        int res, inp = (int) &res;
-
-        printk(KERN_INFO "Checking for popad bug... ");
-        __asm__ __volatile__( 
-          "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
-          : "=&a" (res)
-          : "d" (inp)
-          : "ecx", "edi" );
-        /* If this fails, it means that any user program may lock the CPU hard. Too bad. */
-        if (res != 12345678) printk( "Buggy.\n" );
-                        else printk( "OK.\n" );
-#endif
-}
-
-/*
- * Check whether we are able to run this kernel safely on SMP.
- *
- * - In order to run on a i386, we need to be compiled for i386
- *   (for due to lack of "invlpg" and working WP on a i386)
- * - In order to run on anything without a TSC, we need to be
- *   compiled for a i486.
- * - In order to support the local APIC on a buggy Pentium machine,
- *   we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
- *   which happens implicitly if compiled for a Pentium or lower
- *   (unless an advanced selection of CPU features is used) as an
- *   otherwise config implies a properly working local APIC without
- *   the need to do extra reads from the APIC.
-*/
-
-static void __init check_config(void)
-{
-/*
- * We'd better not be a i386 if we're configured to use some
- * i486+ only features! (WP works in supervisor mode and the
- * new "invlpg" and "bswap" instructions)
- */
-#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
-        if (boot_cpu_data.x86 == 3)
-                panic("Kernel requires i486+ for 'invlpg' and other features");
-#endif
-
-/*
- * If we configured ourselves for a TSC, we'd better have one!
- */
-#ifdef CONFIG_X86_TSC
-        if (!cpu_has_tsc && !tsc_disable)
-                panic("Kernel compiled for Pentium+, requires TSC feature!");
-#endif
-
-/*
- * If we were told we had a good local APIC, check for buggy Pentia,
- * i.e. all B steppings and the C2 stepping of P54C when using their
- * integrated APIC (see 11AP erratum in "Pentium Processor
- * Specification Update").
- */
-#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
-            && cpu_has_apic
-            && boot_cpu_data.x86 == 5
-            && boot_cpu_data.x86_model == 2
-            && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
-                panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
-#endif
-}
-
-extern void alternative_instructions(void);
+void check_bugs(void);
 
-static void __init check_bugs(void)
-{
-        identify_cpu(&boot_cpu_data);
-#ifndef CONFIG_SMP
-        printk("CPU: ");
-        print_cpu_info(&boot_cpu_data);
-#endif
-        check_config();
-        check_fpu();
-        check_hlt();
-        check_popad();
-        init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
-        alternative_instructions(); 
-}
+#endif  /* _ASM_I386_BUG_H */
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h
index d1b8e4ab6c1a..f514e906643a 100644
--- a/include/asm-i386/cpufeature.h
+++ b/include/asm-i386/cpufeature.h
@@ -7,7 +7,10 @@
 #ifndef __ASM_I386_CPUFEATURE_H
 #define __ASM_I386_CPUFEATURE_H
 
+#ifndef __ASSEMBLY__
 #include <linux/bitops.h>
+#endif
+#include <asm/required-features.h>
 
 #define NCAPINTS        7       /* N 32-bit words worth of info */
 
@@ -49,6 +52,7 @@
 #define X86_FEATURE_MP          (1*32+19) /* MP Capable. */
 #define X86_FEATURE_NX          (1*32+20) /* Execute Disable */
 #define X86_FEATURE_MMXEXT      (1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_RDTSCP      (1*32+27) /* RDTSCP */
 #define X86_FEATURE_LM          (1*32+29) /* Long Mode (x86-64) */
 #define X86_FEATURE_3DNOWEXT    (1*32+30) /* AMD 3DNow! extensions */
 #define X86_FEATURE_3DNOW       (1*32+31) /* 3DNow! */
@@ -76,6 +80,7 @@
 #define X86_FEATURE_PEBS        (3*32+12)  /* Precise-Event Based Sampling */
 #define X86_FEATURE_BTS         (3*32+13)  /* Branch Trace Store */
 #define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */
+#define X86_FEATURE_SYNC_RDTSC  (3*32+15)  /* RDTSC synchronizes the CPU */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* Streaming SIMD Extensions-3 */
@@ -103,8 +108,12 @@
 #define X86_FEATURE_LAHF_LM     (6*32+ 0) /* LAHF/SAHF in long mode */
 #define X86_FEATURE_CMP_LEGACY  (6*32+ 1) /* If yes HyperThreading not valid */
 
-#define cpu_has(c, bit)         test_bit(bit, (c)->x86_capability)
-#define boot_cpu_has(bit)       test_bit(bit, boot_cpu_data.x86_capability)
+#define cpu_has(c, bit)                                 \
+        ((__builtin_constant_p(bit) && (bit) < 32 &&    \
+                (1UL << (bit)) & REQUIRED_MASK1) ?      \
+                1 :                                     \
+        test_bit(bit, (c)->x86_capability))
+#define boot_cpu_has(bit)       cpu_has(&boot_cpu_data, bit)
 
 #define cpu_has_fpu             boot_cpu_has(X86_FEATURE_FPU)
 #define cpu_has_vme             boot_cpu_has(X86_FEATURE_VME)
diff --git a/include/asm-i386/current.h b/include/asm-i386/current.h
index 5252ee0f6d7a..d35248539912 100644
--- a/include/asm-i386/current.h
+++ b/include/asm-i386/current.h
@@ -1,14 +1,15 @@
 #ifndef _I386_CURRENT_H
 #define _I386_CURRENT_H
 
-#include <asm/pda.h>
 #include <linux/compiler.h>
+#include <asm/percpu.h>
 
 struct task_struct;
 
+DECLARE_PER_CPU(struct task_struct *, current_task);
 static __always_inline struct task_struct *get_current(void)
 {
-        return read_pda(pcurrent);
+        return x86_read_percpu(current_task);
 }
  
 #define current get_current()
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 050831f34f71..c547403f341d 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -12,23 +12,24 @@
 
 #include <asm/mmu.h>
 
-extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
-
 struct Xgt_desc_struct {
         unsigned short size;
         unsigned long address __attribute__((packed));
         unsigned short pad;
 } __attribute__ ((packed));
 
-extern struct Xgt_desc_struct idt_descr;
-DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
-extern struct Xgt_desc_struct early_gdt_descr;
+struct gdt_page
+{
+        struct desc_struct gdt[GDT_ENTRIES];
+} __attribute__((aligned(PAGE_SIZE)));
+DECLARE_PER_CPU(struct gdt_page, gdt_page);
 
 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
 {
-        return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
+        return per_cpu(gdt_page, cpu).gdt;
 }
 
+extern struct Xgt_desc_struct idt_descr;
 extern struct desc_struct idt_table[];
 extern void set_intr_gate(unsigned int irq, void * addr);
 
@@ -58,45 +59,33 @@ static inline void pack_gate(__u32 *a, __u32 *b,
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-
-#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
-#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
+#define load_TR_desc() native_load_tr_desc()
+#define load_gdt(dtr) native_load_gdt(dtr)
+#define load_idt(dtr) native_load_idt(dtr)
 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
 
-#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
-#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
-#define store_tr(tr) __asm__ ("str %0":"=m" (tr))
+#define store_gdt(dtr) native_store_gdt(dtr)
+#define store_idt(dtr) native_store_idt(dtr)
+#define store_tr(tr) (tr = native_store_tr())
 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
 
-#if TLS_SIZE != 24
-# error update this code.
-#endif
-
-static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
-{
-#define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
-        C(0); C(1); C(2);
-#undef C
-}
+#define load_TLS(t, cpu) native_load_tls(t, cpu)
+#define set_ldt native_set_ldt
 
 #define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
 #define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
 #define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
+#endif
 
-static inline void write_dt_entry(void *dt, int entry, __u32 entry_a, __u32 entry_b)
+static inline void write_dt_entry(struct desc_struct *dt,
+                                  int entry, u32 entry_low, u32 entry_high)
 {
-        __u32 *lp = (__u32 *)((char *)dt + entry*8);
-        *lp = entry_a;
-        *(lp+1) = entry_b;
+        dt[entry].a = entry_low;
+        dt[entry].b = entry_high;
 }
 
-#define set_ldt native_set_ldt
-#endif /* CONFIG_PARAVIRT */
-
-static inline fastcall void native_set_ldt(const void *addr,
-                                           unsigned int entries)
+static inline void native_set_ldt(const void *addr, unsigned int entries)
 {
         if (likely(entries == 0))
                 __asm__ __volatile__("lldt %w0"::"q" (0));
@@ -112,6 +101,48 @@ static inline fastcall void native_set_ldt(const void *addr,
         }
 }
 
+
+static inline void native_load_tr_desc(void)
+{
+        asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
+}
+
+static inline void native_load_gdt(const struct Xgt_desc_struct *dtr)
+{
+        asm volatile("lgdt %0"::"m" (*dtr));
+}
+
+static inline void native_load_idt(const struct Xgt_desc_struct *dtr)
+{
+        asm volatile("lidt %0"::"m" (*dtr));
+}
+
+static inline void native_store_gdt(struct Xgt_desc_struct *dtr)
+{
+        asm ("sgdt %0":"=m" (*dtr));
+}
+
+static inline void native_store_idt(struct Xgt_desc_struct *dtr)
+{
+        asm ("sidt %0":"=m" (*dtr));
+}
+
+static inline unsigned long native_store_tr(void)
+{
+        unsigned long tr;
+        asm ("str %0":"=r" (tr));
+        return tr;
+}
+
+static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
+{
+        unsigned int i;
+        struct desc_struct *gdt = get_cpu_gdt_table(cpu);
+
+        for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
+                gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
+}
+
 static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg)
 {
         __u32 a, b;
diff --git a/include/asm-i386/e820.h b/include/asm-i386/e820.h
index c5b8fc6109d6..096a2a8eb1da 100644
--- a/include/asm-i386/e820.h
+++ b/include/asm-i386/e820.h
@@ -38,6 +38,7 @@ extern struct e820map e820;
 
 extern int e820_all_mapped(unsigned long start, unsigned long end,
                            unsigned type);
+extern int e820_any_mapped(u64 start, u64 end, unsigned type);
 extern void find_max_pfn(void);
 extern void register_bootmem_low_pages(unsigned long max_low_pfn);
 extern void e820_register_memory(void);
diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h
index 952b3ee3c9bb..d304ab4161ff 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-i386/elf.h
@@ -133,39 +133,31 @@ extern int dump_task_extended_fpu (struct task_struct *, struct user_fxsr_struct
 #define ELF_CORE_COPY_XFPREGS(tsk, elf_xfpregs) dump_task_extended_fpu(tsk, elf_xfpregs)
 
 #define VDSO_HIGH_BASE          (__fix_to_virt(FIX_VDSO))
-#define VDSO_BASE               ((unsigned long)current->mm->context.vdso)
-
-#ifdef CONFIG_COMPAT_VDSO
-# define VDSO_COMPAT_BASE       VDSO_HIGH_BASE
-# define VDSO_PRELINK           VDSO_HIGH_BASE
-#else
-# define VDSO_COMPAT_BASE       VDSO_BASE
-# define VDSO_PRELINK           0
-#endif
+#define VDSO_CURRENT_BASE       ((unsigned long)current->mm->context.vdso)
+#define VDSO_PRELINK            0
 
 #define VDSO_SYM(x) \
-                (VDSO_COMPAT_BASE + (unsigned long)(x) - VDSO_PRELINK)
+                (VDSO_CURRENT_BASE + (unsigned long)(x) - VDSO_PRELINK)
 
 #define VDSO_HIGH_EHDR          ((const struct elfhdr *) VDSO_HIGH_BASE)
-#define VDSO_EHDR               ((const struct elfhdr *) VDSO_COMPAT_BASE)
+#define VDSO_EHDR               ((const struct elfhdr *) VDSO_CURRENT_BASE)
 
 extern void __kernel_vsyscall;
 
 #define VDSO_ENTRY              VDSO_SYM(&__kernel_vsyscall)
 
-#ifndef CONFIG_COMPAT_VDSO
-#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 struct linux_binprm;
+
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
                                        int executable_stack);
-#endif
 
 extern unsigned int vdso_enabled;
 
-#define ARCH_DLINFO                                             \
-do if (vdso_enabled) {                                          \
-                NEW_AUX_ENT(AT_SYSINFO, VDSO_ENTRY);            \
-                NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_COMPAT_BASE); \
+#define ARCH_DLINFO                                                     \
+do if (vdso_enabled) {                                                  \
+                NEW_AUX_ENT(AT_SYSINFO, VDSO_ENTRY);                    \
+                NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_CURRENT_BASE);        \
 } while (0)
 
 #endif
diff --git a/include/asm-i386/fixmap.h b/include/asm-i386/fixmap.h
index 3e9f610c35df..80ea052ee3a4 100644
--- a/include/asm-i386/fixmap.h
+++ b/include/asm-i386/fixmap.h
@@ -19,13 +19,9 @@
  * Leave one empty page between vmalloc'ed areas and
  * the start of the fixmap.
  */
-#ifndef CONFIG_COMPAT_VDSO
 extern unsigned long __FIXADDR_TOP;
-#else
-#define __FIXADDR_TOP  0xfffff000
-#define FIXADDR_USER_START      __fix_to_virt(FIX_VDSO)
-#define FIXADDR_USER_END        __fix_to_virt(FIX_VDSO - 1)
-#endif
+#define FIXADDR_USER_START     __fix_to_virt(FIX_VDSO)
+#define FIXADDR_USER_END       __fix_to_virt(FIX_VDSO - 1)
 
 #ifndef __ASSEMBLY__
 #include <linux/kernel.h>
@@ -88,6 +84,9 @@ enum fixed_addresses {
 #ifdef CONFIG_PCI_MMCONFIG
         FIX_PCIE_MCFG,
 #endif
+#ifdef CONFIG_PARAVIRT
+        FIX_PARAVIRT_BOOTMAP,
+#endif
         __end_of_permanent_fixed_addresses,
         /* temporary boot-time mappings, used before ioremap() is functional */
 #define NR_FIX_BTMAPS   16
diff --git a/include/asm-i386/genapic.h b/include/asm-i386/genapic.h
index fd2be593b06e..33e3ffe1766c 100644
--- a/include/asm-i386/genapic.h
+++ b/include/asm-i386/genapic.h
@@ -36,7 +36,7 @@ struct genapic {
         void (*init_apic_ldr)(void);
         physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
 
-        void (*clustered_apic_check)(void);
+        void (*setup_apic_routing)(void);
         int (*multi_timer_check)(int apic, int irq);
         int (*apicid_to_node)(int logical_apicid); 
         int (*cpu_to_logical_apicid)(int cpu);
@@ -99,7 +99,7 @@ struct genapic {
         APICFUNC(check_apicid_present) \
         APICFUNC(init_apic_ldr) \
         APICFUNC(ioapic_phys_id_map) \
-        APICFUNC(clustered_apic_check) \
+        APICFUNC(setup_apic_routing) \
         APICFUNC(multi_timer_check) \
         APICFUNC(apicid_to_node) \
         APICFUNC(cpu_to_logical_apicid) \
@@ -122,6 +122,6 @@ struct genapic {
         APICFUNC(phys_pkg_id) \
         }
 
-extern struct genapic *genapic, apic_default;
+extern struct genapic *genapic;
 
 #endif
diff --git a/include/asm-i386/highmem.h b/include/asm-i386/highmem.h
index e9a34ebc25d5..13cdcd66fff2 100644
--- a/include/asm-i386/highmem.h
+++ b/include/asm-i386/highmem.h
@@ -24,6 +24,7 @@
 #include <linux/threads.h>
 #include <asm/kmap_types.h>
 #include <asm/tlbflush.h>
+#include <asm/paravirt.h>
 
 /* declarations for highmem.c */
 extern unsigned long highstart_pfn, highend_pfn;
@@ -67,11 +68,16 @@ extern void FASTCALL(kunmap_high(struct page *page));
 
 void *kmap(struct page *page);
 void kunmap(struct page *page);
+void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot);
 void *kmap_atomic(struct page *page, enum km_type type);
 void kunmap_atomic(void *kvaddr, enum km_type type);
 void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
 struct page *kmap_atomic_to_page(void *ptr);
 
+#ifndef CONFIG_PARAVIRT
+#define kmap_atomic_pte(page, type)     kmap_atomic(page, type)
+#endif
+
 #define flush_cache_kmaps()     do { } while (0)
 
 #endif /* __KERNEL__ */
diff --git a/include/asm-i386/hpet.h b/include/asm-i386/hpet.h
index fc03cf9de5c4..dddeedf504b7 100644
--- a/include/asm-i386/hpet.h
+++ b/include/asm-i386/hpet.h
@@ -28,8 +28,6 @@
 
 #include <linux/timex.h>
 
-#include <asm/fixmap.h>
-
 /*
  * Documentation on HPET can be found at:
  *      http://www.intel.com/ial/home/sp/pcmmspec.htm
diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h
index 434936c732d6..cdd1e248e3b4 100644
--- a/include/asm-i386/i387.h
+++ b/include/asm-i386/i387.h
@@ -74,17 +74,18 @@ static inline void __save_init_fpu( struct task_struct *tsk )
         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 }
 
-#define __unlazy_fpu( tsk ) do { \
-        if (task_thread_info(tsk)->status & TS_USEDFPU) \
-                save_init_fpu( tsk );                   \
-        else                                            \
-                tsk->fpu_counter = 0;                   \
+#define __unlazy_fpu( tsk ) do {                                \
+        if (task_thread_info(tsk)->status & TS_USEDFPU) {       \
+                __save_init_fpu(tsk);                           \
+                stts();                                         \
+        } else                                                  \
+                tsk->fpu_counter = 0;                           \
 } while (0)
 
 #define __clear_fpu( tsk )                                      \
 do {                                                            \
-        if (task_thread_info(tsk)->status & TS_USEDFPU) {               \
-                asm volatile("fnclex ; fwait");                         \
+        if (task_thread_info(tsk)->status & TS_USEDFPU) {       \
+                asm volatile("fnclex ; fwait");                 \
                 task_thread_info(tsk)->status &= ~TS_USEDFPU;   \
                 stts();                                         \
         }                                                       \
@@ -113,7 +114,7 @@ static inline void save_init_fpu( struct task_struct *tsk )
         __clear_fpu( tsk );     \
         preempt_enable();       \
 } while (0)
-                                        \
+
 /*
  * FPU state interaction...
  */
diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h
index 59fe616933c4..e797586a5bfc 100644
--- a/include/asm-i386/io.h
+++ b/include/asm-i386/io.h
@@ -250,19 +250,22 @@ static inline void flush_write_buffers(void)
 
 #endif /* __KERNEL__ */
 
+static inline void native_io_delay(void)
+{
+        asm volatile("outb %%al,$0x80" : : : "memory");
+}
+
 #if defined(CONFIG_PARAVIRT)
 #include <asm/paravirt.h>
 #else
 
-#define __SLOW_DOWN_IO "outb %%al,$0x80;"
-
 static inline void slow_down_io(void) {
-        __asm__ __volatile__(
-                __SLOW_DOWN_IO
+        native_io_delay();
 #ifdef REALLY_SLOW_IO
-                __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
+        native_io_delay();
+        native_io_delay();
+        native_io_delay();
 #endif
-                : : );
 }
 
 #endif
diff --git a/include/asm-i386/irq.h b/include/asm-i386/irq.h
index 11761cdaae19..9e15ce0006eb 100644
--- a/include/asm-i386/irq.h
+++ b/include/asm-i386/irq.h
@@ -37,8 +37,6 @@ static __inline__ int irq_canonicalize(int irq)
 extern int irqbalance_disable(char *str);
 #endif
 
-extern void quirk_intel_irqbalance(void);
-
 #ifdef CONFIG_HOTPLUG_CPU
 extern void fixup_irqs(cpumask_t map);
 #endif
diff --git a/include/asm-i386/irq_regs.h b/include/asm-i386/irq_regs.h
index a1b3f7f594a2..3368b20c0b48 100644
--- a/include/asm-i386/irq_regs.h
+++ b/include/asm-i386/irq_regs.h
@@ -1,25 +1,27 @@
 /*
  * Per-cpu current frame pointer - the location of the last exception frame on
- * the stack, stored in the PDA.
+ * the stack, stored in the per-cpu area.
  *
  * Jeremy Fitzhardinge <jeremy@goop.org>
  */
 #ifndef _ASM_I386_IRQ_REGS_H
 #define _ASM_I386_IRQ_REGS_H
 
-#include <asm/pda.h>
+#include <asm/percpu.h>
+
+DECLARE_PER_CPU(struct pt_regs *, irq_regs);
 
 static inline struct pt_regs *get_irq_regs(void)
 {
-        return read_pda(irq_regs);
+        return x86_read_percpu(irq_regs);
 }
 
 static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
 {
         struct pt_regs *old_regs;
 
-        old_regs = read_pda(irq_regs);
-        write_pda(irq_regs, new_regs);
+        old_regs = get_irq_regs();
+        x86_write_percpu(irq_regs, new_regs);
 
         return old_regs;
 }
diff --git a/include/asm-i386/irqflags.h b/include/asm-i386/irqflags.h
index 17b18cf4fe9d..eff8585cb741 100644
--- a/include/asm-i386/irqflags.h
+++ b/include/asm-i386/irqflags.h
@@ -9,6 +9,43 @@
  */
 #ifndef _ASM_IRQFLAGS_H
 #define _ASM_IRQFLAGS_H
+#include <asm/processor-flags.h>
+
+#ifndef __ASSEMBLY__
+static inline unsigned long native_save_fl(void)
+{
+        unsigned long f;
+        asm volatile("pushfl ; popl %0":"=g" (f): /* no input */);
+        return f;
+}
+
+static inline void native_restore_fl(unsigned long f)
+{
+        asm volatile("pushl %0 ; popfl": /* no output */
+                             :"g" (f)
+                             :"memory", "cc");
+}
+
+static inline void native_irq_disable(void)
+{
+        asm volatile("cli": : :"memory");
+}
+
+static inline void native_irq_enable(void)
+{
+        asm volatile("sti": : :"memory");
+}
+
+static inline void native_safe_halt(void)
+{
+        asm volatile("sti; hlt": : :"memory");
+}
+
+static inline void native_halt(void)
+{
+        asm volatile("hlt": : :"memory");
+}
+#endif  /* __ASSEMBLY__ */
 
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
@@ -17,35 +54,22 @@
 
 static inline unsigned long __raw_local_save_flags(void)
 {
-        unsigned long flags;
-
-        __asm__ __volatile__(
-                "pushfl ; popl %0"
-                : "=g" (flags)
-                : /* no input */
-        );
-
-        return flags;
+        return native_save_fl();
 }
 
 static inline void raw_local_irq_restore(unsigned long flags)
 {
-        __asm__ __volatile__(
-                "pushl %0 ; popfl"
-                : /* no output */
-                :"g" (flags)
-                :"memory", "cc"
-        );
+        native_restore_fl(flags);
 }
 
 static inline void raw_local_irq_disable(void)
 {
-        __asm__ __volatile__("cli" : : : "memory");
+        native_irq_disable();
 }
 
 static inline void raw_local_irq_enable(void)
 {
-        __asm__ __volatile__("sti" : : : "memory");
+        native_irq_enable();
 }
 
 /*
@@ -54,7 +78,7 @@ static inline void raw_local_irq_enable(void)
  */
 static inline void raw_safe_halt(void)
 {
-        __asm__ __volatile__("sti; hlt" : : : "memory");
+        native_safe_halt();
 }
 
 /*
@@ -63,7 +87,7 @@ static inline void raw_safe_halt(void)
  */
 static inline void halt(void)
 {
-        __asm__ __volatile__("hlt": : :"memory");
+        native_halt();
 }
 
 /*
@@ -96,7 +120,7 @@ static inline unsigned long __raw_local_irq_save(void)
 
 static inline int raw_irqs_disabled_flags(unsigned long flags)
 {
-        return !(flags & (1 << 9));
+        return !(flags & X86_EFLAGS_IF);
 }
 
 static inline int raw_irqs_disabled(void)
diff --git a/include/asm-i386/kexec.h b/include/asm-i386/kexec.h
index 4dfc9f5ed031..bcb5b21de2d2 100644
--- a/include/asm-i386/kexec.h
+++ b/include/asm-i386/kexec.h
@@ -21,7 +21,6 @@
 
 #ifndef __ASSEMBLY__
 
-#include <asm/fixmap.h>
 #include <asm/ptrace.h>
 #include <asm/string.h>
 
@@ -29,10 +28,6 @@
  * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
  * I.e. Maximum page that is mapped directly into kernel memory,
  * and kmap is not required.
- *
- * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
- * calculation for the amount of memory directly mappable into the
- * kernel memory space.
  */
 
 /* Maximum physical address we can use pages from */
@@ -47,6 +42,9 @@
 /* The native architecture */
 #define KEXEC_ARCH KEXEC_ARCH_386
 
+/* We can also handle crash dumps from 64 bit kernel. */
+#define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
+
 #define MAX_NOTE_BYTES 1024
 
 /* CPU does not save ss and esp on stack if execution is already
diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-i386/mach-bigsmp/mach_apic.h
index 18b19a773440..ebd319f838ab 100644
--- a/include/asm-i386/mach-bigsmp/mach_apic.h
+++ b/include/asm-i386/mach-bigsmp/mach_apic.h
@@ -71,7 +71,7 @@ static inline void init_apic_ldr(void)
         apic_write_around(APIC_LDR, val);
 }
 
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
                 "Physflat", nr_ioapics);
diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-i386/mach-default/mach_apic.h
index 3ef6292db780..6db1c3babe9a 100644
--- a/include/asm-i386/mach-default/mach_apic.h
+++ b/include/asm-i386/mach-default/mach_apic.h
@@ -54,7 +54,7 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
         return phys_map;
 }
 
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
                                         "Flat", nr_ioapics);
diff --git a/include/asm-i386/mach-es7000/mach_apic.h b/include/asm-i386/mach-es7000/mach_apic.h
index 26333685a7fb..2d978928a395 100644
--- a/include/asm-i386/mach-es7000/mach_apic.h
+++ b/include/asm-i386/mach-es7000/mach_apic.h
@@ -73,15 +73,8 @@ static inline void init_apic_ldr(void)
         apic_write_around(APIC_LDR, val);
 }
 
-extern void es7000_sw_apic(void);
-static inline void enable_apic_mode(void)
-{
-        es7000_sw_apic();
-        return;
-}
-
 extern int apic_version [MAX_APICS];
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
         int apic = bios_cpu_apicid[smp_processor_id()];
         printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h
index 24990e546da3..b9fb784e1fd5 100644
--- a/include/asm-i386/mach-es7000/mach_mpparse.h
+++ b/include/asm-i386/mach-es7000/mach_mpparse.h
@@ -18,18 +18,6 @@ extern int parse_unisys_oem (char *oemptr);
 extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
 extern void setup_unisys(void);
 
-static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
-                char *productid)
-{
-        if (mpc->mpc_oemptr) {
-                struct mp_config_oemtable *oem_table =
-                        (struct mp_config_oemtable *)mpc->mpc_oemptr;
-                if (!strncmp(oem, "UNISYS", 6))
-                        return parse_unisys_oem((char *)oem_table);
-        }
-        return 0;
-}
-
 #ifdef CONFIG_ACPI
 
 static inline int es7000_check_dsdt(void)
@@ -41,26 +29,6 @@ static inline int es7000_check_dsdt(void)
                 return 1;
         return 0;
 }
-
-/* Hook from generic ACPI tables.c */
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        unsigned long oem_addr;
-        if (!find_unisys_acpi_oem_table(&oem_addr)) {
-                if (es7000_check_dsdt())
-                        return parse_unisys_oem((char *)oem_addr);
-                else {
-                        setup_unisys();
-                        return 1;
-                }
-        }
-        return 0;
-}
-#else
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
 #endif
 
 #endif /* __ASM_MACH_MPPARSE_H */
diff --git a/include/asm-i386/mach-generic/mach_apic.h b/include/asm-i386/mach-generic/mach_apic.h
index d9dc039da94a..a236e7021528 100644
--- a/include/asm-i386/mach-generic/mach_apic.h
+++ b/include/asm-i386/mach-generic/mach_apic.h
@@ -13,7 +13,7 @@
 #define apic_id_registered (genapic->apic_id_registered)
 #define init_apic_ldr (genapic->init_apic_ldr)
 #define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
-#define clustered_apic_check (genapic->clustered_apic_check) 
+#define setup_apic_routing (genapic->setup_apic_routing)
 #define multi_timer_check (genapic->multi_timer_check)
 #define apicid_to_node (genapic->apicid_to_node)
 #define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) 
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h
index 9d158095da82..5e5e7dd2692e 100644
--- a/include/asm-i386/mach-numaq/mach_apic.h
+++ b/include/asm-i386/mach-numaq/mach_apic.h
@@ -34,7 +34,7 @@ static inline void init_apic_ldr(void)
         /* Already done in NUMA-Q firmware */
 }
 
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
                 "NUMA-Q", nr_ioapics);
diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-i386/mach-summit/mach_apic.h
index 43e5bd8f4a19..732f776aab8e 100644
--- a/include/asm-i386/mach-summit/mach_apic.h
+++ b/include/asm-i386/mach-summit/mach_apic.h
@@ -80,7 +80,7 @@ static inline int apic_id_registered(void)
         return 1;
 }
 
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
         printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
                                                 nr_ioapics);
diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-i386/mach-summit/mach_mpparse.h
index 94268399170d..c2520539d934 100644
--- a/include/asm-i386/mach-summit/mach_mpparse.h
+++ b/include/asm-i386/mach-summit/mach_mpparse.h
@@ -30,7 +30,7 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
                         (!strncmp(productid, "VIGIL SMP", 9) 
                          || !strncmp(productid, "EXA", 3)
                          || !strncmp(productid, "RUTHLESS SMP", 12))){
-                mark_tsc_unstable();
+                mark_tsc_unstable("Summit based system");
                 use_cyclone = 1; /*enable cyclone-timer*/
                 setup_summit();
                 return 1;
@@ -44,7 +44,7 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
         if (!strncmp(oem_id, "IBM", 3) &&
             (!strncmp(oem_table_id, "SERVIGIL", 8)
              || !strncmp(oem_table_id, "EXA", 3))){
-                mark_tsc_unstable();
+                mark_tsc_unstable("Summit based system");
                 use_cyclone = 1; /*enable cyclone-timer*/
                 setup_summit();
                 return 1;
diff --git a/include/asm-i386/mach-visws/mach_apic.h b/include/asm-i386/mach-visws/mach_apic.h
index 18afe6b6fc4d..efac6f0d139f 100644
--- a/include/asm-i386/mach-visws/mach_apic.h
+++ b/include/asm-i386/mach-visws/mach_apic.h
@@ -47,7 +47,7 @@ static inline void summit_check(char *oem, char *productid)
 {
 }
 
-static inline void clustered_apic_check(void)
+static inline void setup_apic_routing(void)
 {
 }
 
diff --git a/include/asm-i386/mmu_context.h b/include/asm-i386/mmu_context.h
index e6aa30f8de5b..8198d1cca1f3 100644
--- a/include/asm-i386/mmu_context.h
+++ b/include/asm-i386/mmu_context.h
@@ -5,6 +5,16 @@
 #include <asm/atomic.h>
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
+#include <asm/paravirt.h>
+#ifndef CONFIG_PARAVIRT
+#include <asm-generic/mm_hooks.h>
+
+static inline void paravirt_activate_mm(struct mm_struct *prev,
+                                        struct mm_struct *next)
+{
+}
+#endif  /* !CONFIG_PARAVIRT */
+
 
 /*
  * Used for LDT copy/destruction.
@@ -65,7 +75,10 @@ static inline void switch_mm(struct mm_struct *prev,
 #define deactivate_mm(tsk, mm)                  \
         asm("movl %0,%%gs": :"r" (0));
 
-#define activate_mm(prev, next) \
-        switch_mm((prev),(next),NULL)
+#define activate_mm(prev, next)                         \
+        do {                                            \
+                paravirt_activate_mm(prev, next);       \
+                switch_mm((prev),(next),NULL);          \
+        } while(0);
 
 #endif
diff --git a/include/asm-i386/module.h b/include/asm-i386/module.h
index 02f8f541cbe0..7e5fda6c3976 100644
--- a/include/asm-i386/module.h
+++ b/include/asm-i386/module.h
@@ -54,6 +54,8 @@ struct mod_arch_specific
 #define MODULE_PROC_FAMILY "CYRIXIII "
 #elif defined CONFIG_MVIAC3_2
 #define MODULE_PROC_FAMILY "VIAC3-2 "
+#elif defined CONFIG_MVIAC7
+#define MODULE_PROC_FAMILY "VIAC7 "
 #elif defined CONFIG_MGEODEGX1
 #define MODULE_PROC_FAMILY "GEODEGX1 "
 #elif defined CONFIG_MGEODE_LX
diff --git a/include/asm-i386/msr-index.h b/include/asm-i386/msr-index.h
new file mode 100644
index 000000000000..a02eb2991349
--- /dev/null
+++ b/include/asm-i386/msr-index.h
@@ -0,0 +1,278 @@
+#ifndef __ASM_MSR_INDEX_H
+#define __ASM_MSR_INDEX_H
+
+/* CPU model specific register (MSR) numbers */
+
+/* x86-64 specific MSRs */
+#define MSR_EFER                0xc0000080 /* extended feature register */
+#define MSR_STAR                0xc0000081 /* legacy mode SYSCALL target */
+#define MSR_LSTAR               0xc0000082 /* long mode SYSCALL target */
+#define MSR_CSTAR               0xc0000083 /* compat mode SYSCALL target */
+#define MSR_SYSCALL_MASK        0xc0000084 /* EFLAGS mask for syscall */
+#define MSR_FS_BASE             0xc0000100 /* 64bit FS base */
+#define MSR_GS_BASE             0xc0000101 /* 64bit GS base */
+#define MSR_KERNEL_GS_BASE      0xc0000102 /* SwapGS GS shadow */
+
+/* EFER bits: */
+#define _EFER_SCE               0  /* SYSCALL/SYSRET */
+#define _EFER_LME               8  /* Long mode enable */
+#define _EFER_LMA               10 /* Long mode active (read-only) */
+#define _EFER_NX                11 /* No execute enable */
+
+#define EFER_SCE                (1<<_EFER_SCE)
+#define EFER_LME                (1<<_EFER_LME)
+#define EFER_LMA                (1<<_EFER_LMA)
+#define EFER_NX                 (1<<_EFER_NX)
+
+/* Intel MSRs. Some also available on other CPUs */
+#define MSR_IA32_PERFCTR0               0x000000c1
+#define MSR_IA32_PERFCTR1               0x000000c2
+#define MSR_FSB_FREQ                    0x000000cd
+
+#define MSR_MTRRcap                     0x000000fe
+#define MSR_IA32_BBL_CR_CTL             0x00000119
+
+#define MSR_IA32_SYSENTER_CS            0x00000174
+#define MSR_IA32_SYSENTER_ESP           0x00000175
+#define MSR_IA32_SYSENTER_EIP           0x00000176
+
+#define MSR_IA32_MCG_CAP                0x00000179
+#define MSR_IA32_MCG_STATUS             0x0000017a
+#define MSR_IA32_MCG_CTL                0x0000017b
+
+#define MSR_IA32_PEBS_ENABLE            0x000003f1
+#define MSR_IA32_DS_AREA                0x00000600
+#define MSR_IA32_PERF_CAPABILITIES      0x00000345
+
+#define MSR_MTRRfix64K_00000            0x00000250
+#define MSR_MTRRfix16K_80000            0x00000258
+#define MSR_MTRRfix16K_A0000            0x00000259
+#define MSR_MTRRfix4K_C0000             0x00000268
+#define MSR_MTRRfix4K_C8000             0x00000269
+#define MSR_MTRRfix4K_D0000             0x0000026a
+#define MSR_MTRRfix4K_D8000             0x0000026b
+#define MSR_MTRRfix4K_E0000             0x0000026c
+#define MSR_MTRRfix4K_E8000             0x0000026d
+#define MSR_MTRRfix4K_F0000             0x0000026e
+#define MSR_MTRRfix4K_F8000             0x0000026f
+#define MSR_MTRRdefType                 0x000002ff
+
+#define MSR_IA32_DEBUGCTLMSR            0x000001d9
+#define MSR_IA32_LASTBRANCHFROMIP       0x000001db
+#define MSR_IA32_LASTBRANCHTOIP         0x000001dc
+#define MSR_IA32_LASTINTFROMIP          0x000001dd
+#define MSR_IA32_LASTINTTOIP            0x000001de
+
+#define MSR_IA32_MC0_CTL                0x00000400
+#define MSR_IA32_MC0_STATUS             0x00000401
+#define MSR_IA32_MC0_ADDR               0x00000402
+#define MSR_IA32_MC0_MISC               0x00000403
+
+#define MSR_P6_PERFCTR0                 0x000000c1
+#define MSR_P6_PERFCTR1                 0x000000c2
+#define MSR_P6_EVNTSEL0                 0x00000186
+#define MSR_P6_EVNTSEL1                 0x00000187
+
+/* K7/K8 MSRs. Not complete. See the architecture manual for a more
+   complete list. */
+#define MSR_K7_EVNTSEL0                 0xc0010000
+#define MSR_K7_PERFCTR0                 0xc0010004
+#define MSR_K7_EVNTSEL1                 0xc0010001
+#define MSR_K7_PERFCTR1                 0xc0010005
+#define MSR_K7_EVNTSEL2                 0xc0010002
+#define MSR_K7_PERFCTR2                 0xc0010006
+#define MSR_K7_EVNTSEL3                 0xc0010003
+#define MSR_K7_PERFCTR3                 0xc0010007
+#define MSR_K8_TOP_MEM1                 0xc001001a
+#define MSR_K7_CLK_CTL                  0xc001001b
+#define MSR_K8_TOP_MEM2                 0xc001001d
+#define MSR_K8_SYSCFG                   0xc0010010
+
+#define K8_MTRRFIXRANGE_DRAM_ENABLE     0x00040000 /* MtrrFixDramEn bit    */
+#define K8_MTRRFIXRANGE_DRAM_MODIFY     0x00080000 /* MtrrFixDramModEn bit */
+#define K8_MTRR_RDMEM_WRMEM_MASK        0x18181818 /* Mask: RdMem|WrMem    */
+
+#define MSR_K7_HWCR                     0xc0010015
+#define MSR_K8_HWCR                     0xc0010015
+#define MSR_K7_FID_VID_CTL              0xc0010041
+#define MSR_K7_FID_VID_STATUS           0xc0010042
+#define MSR_K8_ENABLE_C1E               0xc0010055
+
+/* K6 MSRs */
+#define MSR_K6_EFER                     0xc0000080
+#define MSR_K6_STAR                     0xc0000081
+#define MSR_K6_WHCR                     0xc0000082
+#define MSR_K6_UWCCR                    0xc0000085
+#define MSR_K6_EPMR                     0xc0000086
+#define MSR_K6_PSOR                     0xc0000087
+#define MSR_K6_PFIR                     0xc0000088
+
+/* Centaur-Hauls/IDT defined MSRs. */
+#define MSR_IDT_FCR1                    0x00000107
+#define MSR_IDT_FCR2                    0x00000108
+#define MSR_IDT_FCR3                    0x00000109
+#define MSR_IDT_FCR4                    0x0000010a
+
+#define MSR_IDT_MCR0                    0x00000110
+#define MSR_IDT_MCR1                    0x00000111
+#define MSR_IDT_MCR2                    0x00000112
+#define MSR_IDT_MCR3                    0x00000113
+#define MSR_IDT_MCR4                    0x00000114
+#define MSR_IDT_MCR5                    0x00000115
+#define MSR_IDT_MCR6                    0x00000116
+#define MSR_IDT_MCR7                    0x00000117
+#define MSR_IDT_MCR_CTRL                0x00000120
+
+/* VIA Cyrix defined MSRs*/
+#define MSR_VIA_FCR                     0x00001107
+#define MSR_VIA_LONGHAUL                0x0000110a
+#define MSR_VIA_RNG                     0x0000110b
+#define MSR_VIA_BCR2                    0x00001147
+
+/* Transmeta defined MSRs */
+#define MSR_TMTA_LONGRUN_CTRL           0x80868010
+#define MSR_TMTA_LONGRUN_FLAGS          0x80868011
+#define MSR_TMTA_LRTI_READOUT           0x80868018
+#define MSR_TMTA_LRTI_VOLT_MHZ          0x8086801a
+
+/* Intel defined MSRs. */
+#define MSR_IA32_P5_MC_ADDR             0x00000000
+#define MSR_IA32_P5_MC_TYPE             0x00000001
+#define MSR_IA32_TSC                    0x00000010
+#define MSR_IA32_PLATFORM_ID            0x00000017
+#define MSR_IA32_EBL_CR_POWERON         0x0000002a
+
+#define MSR_IA32_APICBASE               0x0000001b
+#define MSR_IA32_APICBASE_BSP           (1<<8)
+#define MSR_IA32_APICBASE_ENABLE        (1<<11)
+#define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
+
+#define MSR_IA32_UCODE_WRITE            0x00000079
+#define MSR_IA32_UCODE_REV              0x0000008b
+
+#define MSR_IA32_PERF_STATUS            0x00000198
+#define MSR_IA32_PERF_CTL               0x00000199
+
+#define MSR_IA32_MPERF                  0x000000e7
+#define MSR_IA32_APERF                  0x000000e8
+
+#define MSR_IA32_THERM_CONTROL          0x0000019a
+#define MSR_IA32_THERM_INTERRUPT        0x0000019b
+#define MSR_IA32_THERM_STATUS           0x0000019c
+#define MSR_IA32_MISC_ENABLE            0x000001a0
+
+/* Intel Model 6 */
+#define MSR_P6_EVNTSEL0                 0x00000186
+#define MSR_P6_EVNTSEL1                 0x00000187
+
+/* P4/Xeon+ specific */
+#define MSR_IA32_MCG_EAX                0x00000180
+#define MSR_IA32_MCG_EBX                0x00000181
+#define MSR_IA32_MCG_ECX                0x00000182
+#define MSR_IA32_MCG_EDX                0x00000183
+#define MSR_IA32_MCG_ESI                0x00000184
+#define MSR_IA32_MCG_EDI                0x00000185
+#define MSR_IA32_MCG_EBP                0x00000186
+#define MSR_IA32_MCG_ESP                0x00000187
+#define MSR_IA32_MCG_EFLAGS             0x00000188
+#define MSR_IA32_MCG_EIP                0x00000189
+#define MSR_IA32_MCG_RESERVED           0x0000018a
+
+/* Pentium IV performance counter MSRs */
+#define MSR_P4_BPU_PERFCTR0             0x00000300
+#define MSR_P4_BPU_PERFCTR1             0x00000301
+#define MSR_P4_BPU_PERFCTR2             0x00000302
+#define MSR_P4_BPU_PERFCTR3             0x00000303
+#define MSR_P4_MS_PERFCTR0              0x00000304
+#define MSR_P4_MS_PERFCTR1              0x00000305
+#define MSR_P4_MS_PERFCTR2              0x00000306
+#define MSR_P4_MS_PERFCTR3              0x00000307
+#define MSR_P4_FLAME_PERFCTR0           0x00000308
+#define MSR_P4_FLAME_PERFCTR1           0x00000309
+#define MSR_P4_FLAME_PERFCTR2           0x0000030a
+#define MSR_P4_FLAME_PERFCTR3           0x0000030b
+#define MSR_P4_IQ_PERFCTR0              0x0000030c
+#define MSR_P4_IQ_PERFCTR1              0x0000030d
+#define MSR_P4_IQ_PERFCTR2              0x0000030e
+#define MSR_P4_IQ_PERFCTR3              0x0000030f
+#define MSR_P4_IQ_PERFCTR4              0x00000310
+#define MSR_P4_IQ_PERFCTR5              0x00000311
+#define MSR_P4_BPU_CCCR0                0x00000360
+#define MSR_P4_BPU_CCCR1                0x00000361
+#define MSR_P4_BPU_CCCR2                0x00000362
+#define MSR_P4_BPU_CCCR3                0x00000363
+#define MSR_P4_MS_CCCR0                 0x00000364
+#define MSR_P4_MS_CCCR1                 0x00000365
+#define MSR_P4_MS_CCCR2                 0x00000366
+#define MSR_P4_MS_CCCR3                 0x00000367
+#define MSR_P4_FLAME_CCCR0              0x00000368
+#define MSR_P4_FLAME_CCCR1              0x00000369
+#define MSR_P4_FLAME_CCCR2              0x0000036a
+#define MSR_P4_FLAME_CCCR3              0x0000036b
+#define MSR_P4_IQ_CCCR0                 0x0000036c
+#define MSR_P4_IQ_CCCR1                 0x0000036d
+#define MSR_P4_IQ_CCCR2                 0x0000036e
+#define MSR_P4_IQ_CCCR3                 0x0000036f
+#define MSR_P4_IQ_CCCR4                 0x00000370
+#define MSR_P4_IQ_CCCR5                 0x00000371
+#define MSR_P4_ALF_ESCR0                0x000003ca
+#define MSR_P4_ALF_ESCR1                0x000003cb
+#define MSR_P4_BPU_ESCR0                0x000003b2
+#define MSR_P4_BPU_ESCR1                0x000003b3
+#define MSR_P4_BSU_ESCR0                0x000003a0
+#define MSR_P4_BSU_ESCR1                0x000003a1
+#define MSR_P4_CRU_ESCR0                0x000003b8
+#define MSR_P4_CRU_ESCR1                0x000003b9
+#define MSR_P4_CRU_ESCR2                0x000003cc
+#define MSR_P4_CRU_ESCR3                0x000003cd
+#define MSR_P4_CRU_ESCR4                0x000003e0
+#define MSR_P4_CRU_ESCR5                0x000003e1
+#define MSR_P4_DAC_ESCR0                0x000003a8
+#define MSR_P4_DAC_ESCR1                0x000003a9
+#define MSR_P4_FIRM_ESCR0               0x000003a4
+#define MSR_P4_FIRM_ESCR1               0x000003a5
+#define MSR_P4_FLAME_ESCR0              0x000003a6
+#define MSR_P4_FLAME_ESCR1              0x000003a7
+#define MSR_P4_FSB_ESCR0                0x000003a2
+#define MSR_P4_FSB_ESCR1                0x000003a3
+#define MSR_P4_IQ_ESCR0                 0x000003ba
+#define MSR_P4_IQ_ESCR1                 0x000003bb
+#define MSR_P4_IS_ESCR0                 0x000003b4
+#define MSR_P4_IS_ESCR1                 0x000003b5
+#define MSR_P4_ITLB_ESCR0               0x000003b6
+#define MSR_P4_ITLB_ESCR1               0x000003b7
+#define MSR_P4_IX_ESCR0                 0x000003c8
+#define MSR_P4_IX_ESCR1                 0x000003c9
+#define MSR_P4_MOB_ESCR0                0x000003aa
+#define MSR_P4_MOB_ESCR1                0x000003ab
+#define MSR_P4_MS_ESCR0                 0x000003c0
+#define MSR_P4_MS_ESCR1                 0x000003c1
+#define MSR_P4_PMH_ESCR0                0x000003ac
+#define MSR_P4_PMH_ESCR1                0x000003ad
+#define MSR_P4_RAT_ESCR0                0x000003bc
+#define MSR_P4_RAT_ESCR1                0x000003bd
+#define MSR_P4_SAAT_ESCR0               0x000003ae
+#define MSR_P4_SAAT_ESCR1               0x000003af
+#define MSR_P4_SSU_ESCR0                0x000003be
+#define MSR_P4_SSU_ESCR1                0x000003bf /* guess: not in manual */
+
+#define MSR_P4_TBPU_ESCR0               0x000003c2
+#define MSR_P4_TBPU_ESCR1               0x000003c3
+#define MSR_P4_TC_ESCR0                 0x000003c4
+#define MSR_P4_TC_ESCR1                 0x000003c5
+#define MSR_P4_U2L_ESCR0                0x000003b0
+#define MSR_P4_U2L_ESCR1                0x000003b1
+
+/* Intel Core-based CPU performance counters */
+#define MSR_CORE_PERF_FIXED_CTR0        0x00000309
+#define MSR_CORE_PERF_FIXED_CTR1        0x0000030a
+#define MSR_CORE_PERF_FIXED_CTR2        0x0000030b
+#define MSR_CORE_PERF_FIXED_CTR_CTRL    0x0000038d
+#define MSR_CORE_PERF_GLOBAL_STATUS     0x0000038e
+#define MSR_CORE_PERF_GLOBAL_CTRL       0x0000038f
+#define MSR_CORE_PERF_GLOBAL_OVF_CTRL   0x00000390
+
+/* Geode defined MSRs */
+#define MSR_GEODE_BUSCONT_CONF0         0x00001900
+
+#endif /* __ASM_MSR_INDEX_H */
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h
index 2ad3f30b1a68..9559894c7658 100644
--- a/include/asm-i386/msr.h
+++ b/include/asm-i386/msr.h
@@ -1,6 +1,79 @@
 #ifndef __ASM_MSR_H
 #define __ASM_MSR_H
 
+#include <asm/msr-index.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#include <asm/errno.h>
+
+static inline unsigned long long native_read_msr(unsigned int msr)
+{
+        unsigned long long val;
+
+        asm volatile("rdmsr" : "=A" (val) : "c" (msr));
+        return val;
+}
+
+static inline unsigned long long native_read_msr_safe(unsigned int msr,
+                                                      int *err)
+{
+        unsigned long long val;
+
+        asm volatile("2: rdmsr ; xorl %0,%0\n"
+                     "1:\n\t"
+                     ".section .fixup,\"ax\"\n\t"
+                     "3:  movl %3,%0 ; jmp 1b\n\t"
+                     ".previous\n\t"
+                     ".section __ex_table,\"a\"\n"
+                     "   .align 4\n\t"
+                     "   .long  2b,3b\n\t"
+                     ".previous"
+                     : "=r" (*err), "=A" (val)
+                     : "c" (msr), "i" (-EFAULT));
+
+        return val;
+}
+
+static inline void native_write_msr(unsigned int msr, unsigned long long val)
+{
+        asm volatile("wrmsr" : : "c" (msr), "A"(val));
+}
+
+static inline int native_write_msr_safe(unsigned int msr,
+                                        unsigned long long val)
+{
+        int err;
+        asm volatile("2: wrmsr ; xorl %0,%0\n"
+                     "1:\n\t"
+                     ".section .fixup,\"ax\"\n\t"
+                     "3:  movl %4,%0 ; jmp 1b\n\t"
+                     ".previous\n\t"
+                     ".section __ex_table,\"a\"\n"
+                     "   .align 4\n\t"
+                     "   .long  2b,3b\n\t"
+                     ".previous"
+                     : "=a" (err)
+                     : "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)),
+                       "i" (-EFAULT));
+        return err;
+}
+
+static inline unsigned long long native_read_tsc(void)
+{
+        unsigned long long val;
+        asm volatile("rdtsc" : "=A" (val));
+        return val;
+}
+
+static inline unsigned long long native_read_pmc(void)
+{
+        unsigned long long val;
+        asm volatile("rdpmc" : "=A" (val));
+        return val;
+}
+
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
@@ -11,22 +84,20 @@
  * pointer indirection), this allows gcc to optimize better
  */
 
-#define rdmsr(msr,val1,val2) \
-        __asm__ __volatile__("rdmsr" \
-                          : "=a" (val1), "=d" (val2) \
-                          : "c" (msr))
+#define rdmsr(msr,val1,val2)                                            \
+        do {                                                            \
+                unsigned long long __val = native_read_msr(msr);        \
+                val1 = __val;                                           \
+                val2 = __val >> 32;                                     \
+        } while(0)
 
-#define wrmsr(msr,val1,val2) \
-        __asm__ __volatile__("wrmsr" \
-                          : /* no outputs */ \
-                          : "c" (msr), "a" (val1), "d" (val2))
+#define wrmsr(msr,val1,val2)                                            \
+        native_write_msr(msr, ((unsigned long long)val2 << 32) | val1)
 
-#define rdmsrl(msr,val) do { \
-        unsigned long l__,h__; \
-        rdmsr (msr, l__, h__);  \
-        val = l__;  \
-        val |= ((u64)h__<<32);  \
-} while(0)
+#define rdmsrl(msr,val)                                 \
+        do {                                            \
+                (val) = native_read_msr(msr);           \
+        } while(0)
 
 static inline void wrmsrl (unsigned long msr, unsigned long long val)
 {
@@ -37,50 +108,41 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
 }
 
 /* wrmsr with exception handling */
-#define wrmsr_safe(msr,a,b) ({ int ret__;                                               \
-        asm volatile("2: wrmsr ; xorl %0,%0\n"                                          \
-                     "1:\n\t"                                                           \
-                     ".section .fixup,\"ax\"\n\t"                                       \
-                     "3:  movl %4,%0 ; jmp 1b\n\t"                                      \
-                     ".previous\n\t"                                                    \
-                     ".section __ex_table,\"a\"\n"                                      \
-                     "   .align 4\n\t"                                                  \
-                     "   .long  2b,3b\n\t"                                              \
-                     ".previous"                                                        \
-                     : "=a" (ret__)                                                     \
-                     : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
-        ret__; })
+#define wrmsr_safe(msr,val1,val2)                                               \
+        (native_write_msr_safe(msr, ((unsigned long long)val2 << 32) | val1))
 
 /* rdmsr with exception handling */
-#define rdmsr_safe(msr,a,b) ({ int ret__;                                               \
-        asm volatile("2: rdmsr ; xorl %0,%0\n"                                          \
-                     "1:\n\t"                                                           \
-                     ".section .fixup,\"ax\"\n\t"                                       \
-                     "3:  movl %4,%0 ; jmp 1b\n\t"                                      \
-                     ".previous\n\t"                                                    \
-                     ".section __ex_table,\"a\"\n"                                      \
-                     "   .align 4\n\t"                                                  \
-                     "   .long  2b,3b\n\t"                                              \
-                     ".previous"                                                        \
-                     : "=r" (ret__), "=a" (*(a)), "=d" (*(b))                           \
-                     : "c" (msr), "i" (-EFAULT));\
-        ret__; })
-
-#define rdtsc(low,high) \
-     __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
-
-#define rdtscl(low) \
-     __asm__ __volatile__("rdtsc" : "=a" (low) : : "edx")
-
-#define rdtscll(val) \
-     __asm__ __volatile__("rdtsc" : "=A" (val))
+#define rdmsr_safe(msr,p1,p2)                                           \
+        ({                                                              \
+                int __err;                                              \
+                unsigned long long __val = native_read_msr_safe(msr, &__err);\
+                (*p1) = __val;                                          \
+                (*p2) = __val >> 32;                                    \
+                __err;                                                  \
+        })
+
+#define rdtsc(low,high)                                         \
+        do {                                                    \
+                u64 _l = native_read_tsc();                     \
+                (low) = (u32)_l;                                \
+                (high) = _l >> 32;                              \
+        } while(0)
+
+#define rdtscl(low)                                             \
+        do {                                                    \
+                (low) = native_read_tsc();                      \
+        } while(0)
+
+#define rdtscll(val) ((val) = native_read_tsc())
 
 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
 
-#define rdpmc(counter,low,high) \
-     __asm__ __volatile__("rdpmc" \
-                          : "=a" (low), "=d" (high) \
-                          : "c" (counter))
+#define rdpmc(counter,low,high)                                 \
+        do {                                                    \
+                u64 _l = native_read_pmc();                     \
+                low = (u32)_l;                                  \
+                high = _l >> 32;                                \
+        } while(0)
 #endif  /* !CONFIG_PARAVIRT */
 
 #ifdef CONFIG_SMP
@@ -96,234 +158,6 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
         wrmsr(msr_no, l, h);
 }
 #endif  /*  CONFIG_SMP  */
-
-/* symbolic names for some interesting MSRs */
-/* Intel defined MSRs. */
-#define MSR_IA32_P5_MC_ADDR             0
-#define MSR_IA32_P5_MC_TYPE             1
-#define MSR_IA32_PLATFORM_ID            0x17
-#define MSR_IA32_EBL_CR_POWERON         0x2a
-
-#define MSR_IA32_APICBASE               0x1b
-#define MSR_IA32_APICBASE_BSP           (1<<8)
-#define MSR_IA32_APICBASE_ENABLE        (1<<11)
-#define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
-
-#define MSR_IA32_UCODE_WRITE            0x79
-#define MSR_IA32_UCODE_REV              0x8b
-
-#define MSR_P6_PERFCTR0         0xc1
-#define MSR_P6_PERFCTR1         0xc2
-#define MSR_FSB_FREQ            0xcd
-
-
-#define MSR_IA32_BBL_CR_CTL             0x119
-
-#define MSR_IA32_SYSENTER_CS            0x174
-#define MSR_IA32_SYSENTER_ESP           0x175
-#define MSR_IA32_SYSENTER_EIP           0x176
-
-#define MSR_IA32_MCG_CAP                0x179
-#define MSR_IA32_MCG_STATUS             0x17a
-#define MSR_IA32_MCG_CTL                0x17b
-
-/* P4/Xeon+ specific */
-#define MSR_IA32_MCG_EAX                0x180
-#define MSR_IA32_MCG_EBX                0x181
-#define MSR_IA32_MCG_ECX                0x182
-#define MSR_IA32_MCG_EDX                0x183
-#define MSR_IA32_MCG_ESI                0x184
-#define MSR_IA32_MCG_EDI                0x185
-#define MSR_IA32_MCG_EBP                0x186
-#define MSR_IA32_MCG_ESP                0x187
-#define MSR_IA32_MCG_EFLAGS             0x188
-#define MSR_IA32_MCG_EIP                0x189
-#define MSR_IA32_MCG_RESERVED           0x18A
-
-#define MSR_P6_EVNTSEL0                 0x186
-#define MSR_P6_EVNTSEL1                 0x187
-
-#define MSR_IA32_PERF_STATUS            0x198
-#define MSR_IA32_PERF_CTL               0x199
-
-#define MSR_IA32_MPERF                  0xE7
-#define MSR_IA32_APERF                  0xE8
-
-#define MSR_IA32_THERM_CONTROL          0x19a
-#define MSR_IA32_THERM_INTERRUPT        0x19b
-#define MSR_IA32_THERM_STATUS           0x19c
-#define MSR_IA32_MISC_ENABLE            0x1a0
-
-#define MSR_IA32_DEBUGCTLMSR            0x1d9
-#define MSR_IA32_LASTBRANCHFROMIP       0x1db
-#define MSR_IA32_LASTBRANCHTOIP         0x1dc
-#define MSR_IA32_LASTINTFROMIP          0x1dd
-#define MSR_IA32_LASTINTTOIP            0x1de
-
-#define MSR_IA32_MC0_CTL                0x400
-#define MSR_IA32_MC0_STATUS             0x401
-#define MSR_IA32_MC0_ADDR               0x402
-#define MSR_IA32_MC0_MISC               0x403
-
-#define MSR_IA32_PEBS_ENABLE            0x3f1
-#define MSR_IA32_DS_AREA                0x600
-#define MSR_IA32_PERF_CAPABILITIES      0x345
-
-/* Pentium IV performance counter MSRs */
-#define MSR_P4_BPU_PERFCTR0             0x300
-#define MSR_P4_BPU_PERFCTR1             0x301
-#define MSR_P4_BPU_PERFCTR2             0x302
-#define MSR_P4_BPU_PERFCTR3             0x303
-#define MSR_P4_MS_PERFCTR0              0x304
-#define MSR_P4_MS_PERFCTR1              0x305
-#define MSR_P4_MS_PERFCTR2              0x306
-#define MSR_P4_MS_PERFCTR3              0x307
-#define MSR_P4_FLAME_PERFCTR0           0x308
-#define MSR_P4_FLAME_PERFCTR1           0x309
-#define MSR_P4_FLAME_PERFCTR2           0x30a
-#define MSR_P4_FLAME_PERFCTR3           0x30b
-#define MSR_P4_IQ_PERFCTR0              0x30c
-#define MSR_P4_IQ_PERFCTR1              0x30d
-#define MSR_P4_IQ_PERFCTR2              0x30e
-#define MSR_P4_IQ_PERFCTR3              0x30f
-#define MSR_P4_IQ_PERFCTR4              0x310
-#define MSR_P4_IQ_PERFCTR5              0x311
-#define MSR_P4_BPU_CCCR0                0x360
-#define MSR_P4_BPU_CCCR1                0x361
-#define MSR_P4_BPU_CCCR2                0x362
-#define MSR_P4_BPU_CCCR3                0x363
-#define MSR_P4_MS_CCCR0                 0x364
-#define MSR_P4_MS_CCCR1                 0x365
-#define MSR_P4_MS_CCCR2                 0x366
-#define MSR_P4_MS_CCCR3                 0x367
-#define MSR_P4_FLAME_CCCR0              0x368
-#define MSR_P4_FLAME_CCCR1              0x369
-#define MSR_P4_FLAME_CCCR2              0x36a
-#define MSR_P4_FLAME_CCCR3              0x36b
-#define MSR_P4_IQ_CCCR0                 0x36c
-#define MSR_P4_IQ_CCCR1                 0x36d
-#define MSR_P4_IQ_CCCR2                 0x36e
-#define MSR_P4_IQ_CCCR3                 0x36f
-#define MSR_P4_IQ_CCCR4                 0x370
-#define MSR_P4_IQ_CCCR5                 0x371
-#define MSR_P4_ALF_ESCR0                0x3ca
-#define MSR_P4_ALF_ESCR1                0x3cb
-#define MSR_P4_BPU_ESCR0                0x3b2
-#define MSR_P4_BPU_ESCR1                0x3b3
-#define MSR_P4_BSU_ESCR0                0x3a0
-#define MSR_P4_BSU_ESCR1                0x3a1
-#define MSR_P4_CRU_ESCR0                0x3b8
-#define MSR_P4_CRU_ESCR1                0x3b9
-#define MSR_P4_CRU_ESCR2                0x3cc
-#define MSR_P4_CRU_ESCR3                0x3cd
-#define MSR_P4_CRU_ESCR4                0x3e0
-#define MSR_P4_CRU_ESCR5                0x3e1
-#define MSR_P4_DAC_ESCR0                0x3a8
-#define MSR_P4_DAC_ESCR1                0x3a9
-#define MSR_P4_FIRM_ESCR0               0x3a4
-#define MSR_P4_FIRM_ESCR1               0x3a5
-#define MSR_P4_FLAME_ESCR0              0x3a6
-#define MSR_P4_FLAME_ESCR1              0x3a7
-#define MSR_P4_FSB_ESCR0                0x3a2
-#define MSR_P4_FSB_ESCR1                0x3a3
-#define MSR_P4_IQ_ESCR0                 0x3ba
-#define MSR_P4_IQ_ESCR1                 0x3bb
-#define MSR_P4_IS_ESCR0                 0x3b4
-#define MSR_P4_IS_ESCR1                 0x3b5
-#define MSR_P4_ITLB_ESCR0               0x3b6
-#define MSR_P4_ITLB_ESCR1               0x3b7
-#define MSR_P4_IX_ESCR0                 0x3c8
-#define MSR_P4_IX_ESCR1                 0x3c9
-#define MSR_P4_MOB_ESCR0                0x3aa
-#define MSR_P4_MOB_ESCR1                0x3ab
-#define MSR_P4_MS_ESCR0                 0x3c0
-#define MSR_P4_MS_ESCR1                 0x3c1
-#define MSR_P4_PMH_ESCR0                0x3ac
-#define MSR_P4_PMH_ESCR1                0x3ad
-#define MSR_P4_RAT_ESCR0                0x3bc
-#define MSR_P4_RAT_ESCR1                0x3bd
-#define MSR_P4_SAAT_ESCR0               0x3ae
-#define MSR_P4_SAAT_ESCR1               0x3af
-#define MSR_P4_SSU_ESCR0                0x3be
-#define MSR_P4_SSU_ESCR1                0x3bf    /* guess: not defined in manual */
-#define MSR_P4_TBPU_ESCR0               0x3c2
-#define MSR_P4_TBPU_ESCR1               0x3c3
-#define MSR_P4_TC_ESCR0                 0x3c4
-#define MSR_P4_TC_ESCR1                 0x3c5
-#define MSR_P4_U2L_ESCR0                0x3b0
-#define MSR_P4_U2L_ESCR1                0x3b1
-
-/* AMD Defined MSRs */
-#define MSR_K6_EFER                     0xC0000080
-#define MSR_K6_STAR                     0xC0000081
-#define MSR_K6_WHCR                     0xC0000082
-#define MSR_K6_UWCCR                    0xC0000085
-#define MSR_K6_EPMR                     0xC0000086
-#define MSR_K6_PSOR                     0xC0000087
-#define MSR_K6_PFIR                     0xC0000088
-
-#define MSR_K7_EVNTSEL0                 0xC0010000
-#define MSR_K7_EVNTSEL1                 0xC0010001
-#define MSR_K7_EVNTSEL2                 0xC0010002
-#define MSR_K7_EVNTSEL3                 0xC0010003
-#define MSR_K7_PERFCTR0                 0xC0010004
-#define MSR_K7_PERFCTR1                 0xC0010005
-#define MSR_K7_PERFCTR2                 0xC0010006
-#define MSR_K7_PERFCTR3                 0xC0010007
-#define MSR_K7_HWCR                     0xC0010015
-#define MSR_K7_CLK_CTL                  0xC001001b
-#define MSR_K7_FID_VID_CTL              0xC0010041
-#define MSR_K7_FID_VID_STATUS           0xC0010042
-
-#define MSR_K8_ENABLE_C1E               0xC0010055
-
-/* extended feature register */
-#define MSR_EFER                        0xc0000080
-
-/* EFER bits: */
-
-/* Execute Disable enable */
-#define _EFER_NX                        11
-#define EFER_NX                         (1<<_EFER_NX)
-
-/* Centaur-Hauls/IDT defined MSRs. */
-#define MSR_IDT_FCR1                    0x107
-#define MSR_IDT_FCR2                    0x108
-#define MSR_IDT_FCR3                    0x109
-#define MSR_IDT_FCR4                    0x10a
-
-#define MSR_IDT_MCR0                    0x110
-#define MSR_IDT_MCR1                    0x111
-#define MSR_IDT_MCR2                    0x112
-#define MSR_IDT_MCR3                    0x113
-#define MSR_IDT_MCR4                    0x114
-#define MSR_IDT_MCR5                    0x115
-#define MSR_IDT_MCR6                    0x116
-#define MSR_IDT_MCR7                    0x117
-#define MSR_IDT_MCR_CTRL                0x120
-
-/* VIA Cyrix defined MSRs*/
-#define MSR_VIA_FCR                     0x1107
-#define MSR_VIA_LONGHAUL                0x110a
-#define MSR_VIA_RNG                     0x110b
-#define MSR_VIA_BCR2                    0x1147
-
-/* Transmeta defined MSRs */
-#define MSR_TMTA_LONGRUN_CTRL           0x80868010
-#define MSR_TMTA_LONGRUN_FLAGS          0x80868011
-#define MSR_TMTA_LRTI_READOUT           0x80868018
-#define MSR_TMTA_LRTI_VOLT_MHZ          0x8086801a
-
-/* Intel Core-based CPU performance counters */
-#define MSR_CORE_PERF_FIXED_CTR0        0x309
-#define MSR_CORE_PERF_FIXED_CTR1        0x30a
-#define MSR_CORE_PERF_FIXED_CTR2        0x30b
-#define MSR_CORE_PERF_FIXED_CTR_CTRL    0x38d
-#define MSR_CORE_PERF_GLOBAL_STATUS     0x38e
-#define MSR_CORE_PERF_GLOBAL_CTRL       0x38f
-#define MSR_CORE_PERF_GLOBAL_OVF_CTRL   0x390
-
-/* Geode defined MSRs */
-#define MSR_GEODE_BUSCONT_CONF0         0x1900
-
+#endif
+#endif
 #endif /* __ASM_MSR_H */
diff --git a/include/asm-i386/mtrr.h b/include/asm-i386/mtrr.h
index 07f063ae26ea..7e9c7ccbdcfe 100644
--- a/include/asm-i386/mtrr.h
+++ b/include/asm-i386/mtrr.h
@@ -69,6 +69,8 @@ struct mtrr_gentry
 
 /*  The following functions are for use by other drivers  */
 # ifdef CONFIG_MTRR
+extern void mtrr_save_fixed_ranges(void *);
+extern void mtrr_save_state(void);
 extern int mtrr_add (unsigned long base, unsigned long size,
                      unsigned int type, char increment);
 extern int mtrr_add_page (unsigned long base, unsigned long size,
@@ -79,6 +81,8 @@ extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
 extern void mtrr_ap_init(void);
 extern void mtrr_bp_init(void);
 #  else
+#define mtrr_save_fixed_ranges(arg) do {} while (0)
+#define mtrr_save_state() do {} while (0)
 static __inline__ int mtrr_add (unsigned long base, unsigned long size,
                                 unsigned int type, char increment)
 {
diff --git a/include/asm-i386/nmi.h b/include/asm-i386/nmi.h
index b04333ea6f31..fb1e133efd9f 100644
--- a/include/asm-i386/nmi.h
+++ b/include/asm-i386/nmi.h
@@ -50,4 +50,12 @@ void __trigger_all_cpu_backtrace(void);
 
 #endif
 
+void lapic_watchdog_stop(void);
+int lapic_watchdog_init(unsigned nmi_hz);
+int lapic_wd_event(unsigned nmi_hz);
+unsigned lapic_adjust_nmi_hz(unsigned hz);
+int lapic_watchdog_ok(void);
+void disable_lapic_nmi_watchdog(void);
+void enable_lapic_nmi_watchdog(void);
+
 #endif /* ASM_NMI_H */
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index 7b19f454761d..818ac8bf01e2 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -12,7 +12,6 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
-
 #ifdef CONFIG_X86_USE_3DNOW
 
 #include <asm/mmx.h>
@@ -42,26 +41,81 @@
  * These are used to make use of C type-checking..
  */
 extern int nx_enabled;
+
 #ifdef CONFIG_X86_PAE
 extern unsigned long long __supported_pte_mask;
 typedef struct { unsigned long pte_low, pte_high; } pte_t;
 typedef struct { unsigned long long pmd; } pmd_t;
 typedef struct { unsigned long long pgd; } pgd_t;
 typedef struct { unsigned long long pgprot; } pgprot_t;
-#define pmd_val(x)      ((x).pmd)
-#define pte_val(x)      ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
-#define __pmd(x) ((pmd_t) { (x) } )
+
+static inline unsigned long long native_pgd_val(pgd_t pgd)
+{
+        return pgd.pgd;
+}
+
+static inline unsigned long long native_pmd_val(pmd_t pmd)
+{
+        return pmd.pmd;
+}
+
+static inline unsigned long long native_pte_val(pte_t pte)
+{
+        return pte.pte_low | ((unsigned long long)pte.pte_high << 32);
+}
+
+static inline pgd_t native_make_pgd(unsigned long long val)
+{
+        return (pgd_t) { val };
+}
+
+static inline pmd_t native_make_pmd(unsigned long long val)
+{
+        return (pmd_t) { val };
+}
+
+static inline pte_t native_make_pte(unsigned long long val)
+{
+        return (pte_t) { .pte_low = val, .pte_high = (val >> 32) } ;
+}
+
+#ifndef CONFIG_PARAVIRT
+#define pmd_val(x)      native_pmd_val(x)
+#define __pmd(x)        native_make_pmd(x)
+#endif
+
 #define HPAGE_SHIFT     21
 #include <asm-generic/pgtable-nopud.h>
-#else
+#else  /* !CONFIG_X86_PAE */
 typedef struct { unsigned long pte_low; } pte_t;
 typedef struct { unsigned long pgd; } pgd_t;
 typedef struct { unsigned long pgprot; } pgprot_t;
 #define boot_pte_t pte_t /* or would you rather have a typedef */
-#define pte_val(x)      ((x).pte_low)
+
+static inline unsigned long native_pgd_val(pgd_t pgd)
+{
+        return pgd.pgd;
+}
+
+static inline unsigned long native_pte_val(pte_t pte)
+{
+        return pte.pte_low;
+}
+
+static inline pgd_t native_make_pgd(unsigned long val)
+{
+        return (pgd_t) { val };
+}
+
+static inline pte_t native_make_pte(unsigned long val)
+{
+        return (pte_t) { .pte_low = val };
+}
+
 #define HPAGE_SHIFT     22
 #include <asm-generic/pgtable-nopmd.h>
-#endif
+#endif  /* CONFIG_X86_PAE */
+
 #define PTE_MASK        PAGE_MASK
 
 #ifdef CONFIG_HUGETLB_PAGE
@@ -71,13 +125,16 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
 #endif
 
-#define pgd_val(x)      ((x).pgd)
 #define pgprot_val(x)   ((x).pgprot)
-
-#define __pte(x) ((pte_t) { (x) } )
-#define __pgd(x) ((pgd_t) { (x) } )
 #define __pgprot(x)     ((pgprot_t) { (x) } )
 
+#ifndef CONFIG_PARAVIRT
+#define pgd_val(x)      native_pgd_val(x)
+#define __pgd(x)        native_make_pgd(x)
+#define pte_val(x)      native_pte_val(x)
+#define __pte(x)        native_make_pte(x)
+#endif
+
 #endif /* !__ASSEMBLY__ */
 
 /* to align the pointer to the (next) page boundary */
@@ -143,9 +200,7 @@ extern int page_is_ram(unsigned long pagenr);
 #include <asm-generic/memory_model.h>
 #include <asm-generic/page.h>
 
-#ifndef CONFIG_COMPAT_VDSO
 #define __HAVE_ARCH_GATE_AREA 1
-#endif
 #endif /* __KERNEL__ */
 
 #endif /* _I386_PAGE_H */
diff --git a/include/asm-i386/paravirt.h b/include/asm-i386/paravirt.h
index e63f1e444fcf..e2e7f98723c5 100644
--- a/include/asm-i386/paravirt.h
+++ b/include/asm-i386/paravirt.h
@@ -2,20 +2,9 @@
 #define __ASM_PARAVIRT_H
 /* Various instructions on x86 need to be replaced for
  * para-virtualization: those hooks are defined here. */
-#include <linux/linkage.h>
-#include <linux/stringify.h>
-#include <asm/page.h>
 
 #ifdef CONFIG_PARAVIRT
-/* These are the most performance critical ops, so we want to be able to patch
- * callers */
-#define PARAVIRT_IRQ_DISABLE 0
-#define PARAVIRT_IRQ_ENABLE 1
-#define PARAVIRT_RESTORE_FLAGS 2
-#define PARAVIRT_SAVE_FLAGS 3
-#define PARAVIRT_SAVE_FLAGS_IRQ_DISABLE 4
-#define PARAVIRT_INTERRUPT_RETURN 5
-#define PARAVIRT_STI_SYSEXIT 6
+#include <asm/page.h>
 
 /* Bitmask of what can be clobbered: usually at least eax. */
 #define CLBR_NONE 0x0
@@ -25,13 +14,29 @@
 #define CLBR_ANY 0x7
 
 #ifndef __ASSEMBLY__
+#include <linux/types.h>
+#include <linux/cpumask.h>
+#include <asm/kmap_types.h>
+
+struct page;
 struct thread_struct;
 struct Xgt_desc_struct;
 struct tss_struct;
 struct mm_struct;
+struct desc_struct;
+
+/* Lazy mode for batching updates / context switch */
+enum paravirt_lazy_mode {
+        PARAVIRT_LAZY_NONE = 0,
+        PARAVIRT_LAZY_MMU = 1,
+        PARAVIRT_LAZY_CPU = 2,
+        PARAVIRT_LAZY_FLUSH = 3,
+};
+
 struct paravirt_ops
 {
         unsigned int kernel_rpl;
+        int shared_kernel_pmd;
         int paravirt_enabled;
         const char *name;
 
@@ -44,24 +49,33 @@ struct paravirt_ops
          */
         unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len);
 
+        /* Basic arch-specific setup */
         void (*arch_setup)(void);
         char *(*memory_setup)(void);
         void (*init_IRQ)(void);
+        void (*time_init)(void);
 
+        /*
+         * Called before/after init_mm pagetable setup. setup_start
+         * may reset %cr3, and may pre-install parts of the pagetable;
+         * pagetable setup is expected to preserve any existing
+         * mapping.
+         */
+        void (*pagetable_setup_start)(pgd_t *pgd_base);
+        void (*pagetable_setup_done)(pgd_t *pgd_base);
+
+        /* Print a banner to identify the environment */
         void (*banner)(void);
 
+        /* Set and set time of day */
         unsigned long (*get_wallclock)(void);
         int (*set_wallclock)(unsigned long);
-        void (*time_init)(void);
-
-        /* All the function pointers here are declared as "fastcall"
-           so that we get a specific register-based calling
-           convention.  This makes it easier to implement inline
-           assembler replacements. */
 
+        /* cpuid emulation, mostly so that caps bits can be disabled */
         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
                       unsigned int *ecx, unsigned int *edx);
 
+        /* hooks for various privileged instructions */
         unsigned long (*get_debugreg)(int regno);
         void (*set_debugreg)(int regno, unsigned long value);
 
@@ -80,15 +94,23 @@ struct paravirt_ops
         unsigned long (*read_cr4)(void);
         void (*write_cr4)(unsigned long);
 
+        /*
+         * Get/set interrupt state.  save_fl and restore_fl are only
+         * expected to use X86_EFLAGS_IF; all other bits
+         * returned from save_fl are undefined, and may be ignored by
+         * restore_fl.
+         */
         unsigned long (*save_fl)(void);
         void (*restore_fl)(unsigned long);
         void (*irq_disable)(void);
         void (*irq_enable)(void);
         void (*safe_halt)(void);
         void (*halt)(void);
+
         void (*wbinvd)(void);
 
-        /* err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
+        /* MSR, PMC and TSR operations.
+           err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
         u64 (*read_msr)(unsigned int msr, int *err);
         int (*write_msr)(unsigned int msr, u64 val);
 
@@ -97,6 +119,7 @@ struct paravirt_ops
         u64 (*get_scheduled_cycles)(void);
         unsigned long (*get_cpu_khz)(void);
 
+        /* Segment descriptor handling */
         void (*load_tr_desc)(void);
         void (*load_gdt)(const struct Xgt_desc_struct *);
         void (*load_idt)(const struct Xgt_desc_struct *);
@@ -105,59 +128,98 @@ struct paravirt_ops
         void (*set_ldt)(const void *desc, unsigned entries);
         unsigned long (*store_tr)(void);
         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
-        void (*write_ldt_entry)(void *dt, int entrynum,
-                                         u32 low, u32 high);
-        void (*write_gdt_entry)(void *dt, int entrynum,
-                                         u32 low, u32 high);
-        void (*write_idt_entry)(void *dt, int entrynum,
-                                         u32 low, u32 high);
-        void (*load_esp0)(struct tss_struct *tss,
-                                   struct thread_struct *thread);
+        void (*write_ldt_entry)(struct desc_struct *,
+                                int entrynum, u32 low, u32 high);
+        void (*write_gdt_entry)(struct desc_struct *,
+                                int entrynum, u32 low, u32 high);
+        void (*write_idt_entry)(struct desc_struct *,
+                                int entrynum, u32 low, u32 high);
+        void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t);
 
         void (*set_iopl_mask)(unsigned mask);
-
         void (*io_delay)(void);
 
+        /*
+         * Hooks for intercepting the creation/use/destruction of an
+         * mm_struct.
+         */
+        void (*activate_mm)(struct mm_struct *prev,
+                            struct mm_struct *next);
+        void (*dup_mmap)(struct mm_struct *oldmm,
+                         struct mm_struct *mm);
+        void (*exit_mmap)(struct mm_struct *mm);
+
 #ifdef CONFIG_X86_LOCAL_APIC
+        /*
+         * Direct APIC operations, principally for VMI.  Ideally
+         * these shouldn't be in this interface.
+         */
         void (*apic_write)(unsigned long reg, unsigned long v);
         void (*apic_write_atomic)(unsigned long reg, unsigned long v);
         unsigned long (*apic_read)(unsigned long reg);
         void (*setup_boot_clock)(void);
         void (*setup_secondary_clock)(void);
+
+        void (*startup_ipi_hook)(int phys_apicid,
+                                 unsigned long start_eip,
+                                 unsigned long start_esp);
 #endif
 
+        /* TLB operations */
         void (*flush_tlb_user)(void);
         void (*flush_tlb_kernel)(void);
-        void (*flush_tlb_single)(u32 addr);
-
-        void (*map_pt_hook)(int type, pte_t *va, u32 pfn);
+        void (*flush_tlb_single)(unsigned long addr);
+        void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
+                                 unsigned long va);
 
+        /* Hooks for allocating/releasing pagetable pages */
         void (*alloc_pt)(u32 pfn);
         void (*alloc_pd)(u32 pfn);
         void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
         void (*release_pt)(u32 pfn);
         void (*release_pd)(u32 pfn);
 
+        /* Pagetable manipulation functions */
         void (*set_pte)(pte_t *ptep, pte_t pteval);
-        void (*set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval);
+        void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
+                           pte_t *ptep, pte_t pteval);
         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
-        void (*pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep);
-        void (*pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep);
+        void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
+        void (*pte_update_defer)(struct mm_struct *mm,
+                                 unsigned long addr, pte_t *ptep);
+
+#ifdef CONFIG_HIGHPTE
+        void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
+#endif
+
 #ifdef CONFIG_X86_PAE
         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
-        void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
+        void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
         void (*set_pud)(pud_t *pudp, pud_t pudval);
-        void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
+        void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
         void (*pmd_clear)(pmd_t *pmdp);
+
+        unsigned long long (*pte_val)(pte_t);
+        unsigned long long (*pmd_val)(pmd_t);
+        unsigned long long (*pgd_val)(pgd_t);
+
+        pte_t (*make_pte)(unsigned long long pte);
+        pmd_t (*make_pmd)(unsigned long long pmd);
+        pgd_t (*make_pgd)(unsigned long long pgd);
+#else
+        unsigned long (*pte_val)(pte_t);
+        unsigned long (*pgd_val)(pgd_t);
+
+        pte_t (*make_pte)(unsigned long pte);
+        pgd_t (*make_pgd)(unsigned long pgd);
 #endif
 
-        void (*set_lazy_mode)(int mode);
+        /* Set deferred update mode, used for batching operations. */
+        void (*set_lazy_mode)(enum paravirt_lazy_mode mode);
 
         /* These two are jmp to, not actually called. */
         void (*irq_enable_sysexit)(void);
         void (*iret)(void);
-
-        void (*startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp);
 };
 
 /* Mark a paravirt probe function. */
@@ -167,23 +229,202 @@ struct paravirt_ops
 
 extern struct paravirt_ops paravirt_ops;
 
-#define paravirt_enabled() (paravirt_ops.paravirt_enabled)
+#define PARAVIRT_PATCH(x)                                       \
+        (offsetof(struct paravirt_ops, x) / sizeof(void *))
+
+#define paravirt_type(type)                                     \
+        [paravirt_typenum] "i" (PARAVIRT_PATCH(type))
+#define paravirt_clobber(clobber)               \
+        [paravirt_clobber] "i" (clobber)
+
+/*
+ * Generate some code, and mark it as patchable by the
+ * apply_paravirt() alternate instruction patcher.
+ */
+#define _paravirt_alt(insn_string, type, clobber)       \
+        "771:\n\t" insn_string "\n" "772:\n"            \
+        ".pushsection .parainstructions,\"a\"\n"        \
+        "  .long 771b\n"                                \
+        "  .byte " type "\n"                            \
+        "  .byte 772b-771b\n"                           \
+        "  .short " clobber "\n"                        \
+        ".popsection\n"
+
+/* Generate patchable code, with the default asm parameters. */
+#define paravirt_alt(insn_string)                                       \
+        _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
+
+unsigned paravirt_patch_nop(void);
+unsigned paravirt_patch_ignore(unsigned len);
+unsigned paravirt_patch_call(void *target, u16 tgt_clobbers,
+                             void *site, u16 site_clobbers,
+                             unsigned len);
+unsigned paravirt_patch_jmp(void *target, void *site, unsigned len);
+unsigned paravirt_patch_default(u8 type, u16 clobbers, void *site, unsigned len);
+
+unsigned paravirt_patch_insns(void *site, unsigned len,
+                              const char *start, const char *end);
+
+
+/*
+ * This generates an indirect call based on the operation type number.
+ * The type number, computed in PARAVIRT_PATCH, is derived from the
+ * offset into the paravirt_ops structure, and can therefore be freely
+ * converted back into a structure offset.
+ */
+#define PARAVIRT_CALL   "call *(paravirt_ops+%c[paravirt_typenum]*4);"
+
+/*
+ * These macros are intended to wrap calls into a paravirt_ops
+ * operation, so that they can be later identified and patched at
+ * runtime.
+ *
+ * Normally, a call to a pv_op function is a simple indirect call:
+ * (paravirt_ops.operations)(args...).
+ *
+ * Unfortunately, this is a relatively slow operation for modern CPUs,
+ * because it cannot necessarily determine what the destination
+ * address is.  In this case, the address is a runtime constant, so at
+ * the very least we can patch the call to e a simple direct call, or
+ * ideally, patch an inline implementation into the callsite.  (Direct
+ * calls are essentially free, because the call and return addresses
+ * are completely predictable.)
+ *
+ * These macros rely on the standard gcc "regparm(3)" calling
+ * convention, in which the first three arguments are placed in %eax,
+ * %edx, %ecx (in that order), and the remaining arguments are placed
+ * on the stack.  All caller-save registers (eax,edx,ecx) are expected
+ * to be modified (either clobbered or used for return values).
+ *
+ * The call instruction itself is marked by placing its start address
+ * and size into the .parainstructions section, so that
+ * apply_paravirt() in arch/i386/kernel/alternative.c can do the
+ * appropriate patching under the control of the backend paravirt_ops
+ * implementation.
+ *
+ * Unfortunately there's no way to get gcc to generate the args setup
+ * for the call, and then allow the call itself to be generated by an
+ * inline asm.  Because of this, we must do the complete arg setup and
+ * return value handling from within these macros.  This is fairly
+ * cumbersome.
+ *
+ * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
+ * It could be extended to more arguments, but there would be little
+ * to be gained from that.  For each number of arguments, there are
+ * the two VCALL and CALL variants for void and non-void functions.
+ *
+ * When there is a return value, the invoker of the macro must specify
+ * the return type.  The macro then uses sizeof() on that type to
+ * determine whether its a 32 or 64 bit value, and places the return
+ * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
+ * 64-bit).
+ *
+ * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
+ * in low,high order.
+ *
+ * Small structures are passed and returned in registers.  The macro
+ * calling convention can't directly deal with this, so the wrapper
+ * functions must do this.
+ *
+ * These PVOP_* macros are only defined within this header.  This
+ * means that all uses must be wrapped in inline functions.  This also
+ * makes sure the incoming and outgoing types are always correct.
+ */
+#define __PVOP_CALL(rettype, op, pre, post, ...)                        \
+        ({                                                              \
+                rettype __ret;                                          \
+                unsigned long __eax, __edx, __ecx;                      \
+                if (sizeof(rettype) > sizeof(unsigned long)) {          \
+                        asm volatile(pre                                \
+                                     paravirt_alt(PARAVIRT_CALL)        \
+                                     post                               \
+                                     : "=a" (__eax), "=d" (__edx),      \
+                                       "=c" (__ecx)                     \
+                                     : paravirt_type(op),               \
+                                       paravirt_clobber(CLBR_ANY),      \
+                                       ##__VA_ARGS__                    \
+                                     : "memory", "cc");                 \
+                        __ret = (rettype)((((u64)__edx) << 32) | __eax); \
+                } else {                                                \
+                        asm volatile(pre                                \
+                                     paravirt_alt(PARAVIRT_CALL)        \
+                                     post                               \
+                                     : "=a" (__eax), "=d" (__edx),      \
+                                       "=c" (__ecx)                     \
+                                     : paravirt_type(op),               \
+                                       paravirt_clobber(CLBR_ANY),      \
+                                       ##__VA_ARGS__                    \
+                                     : "memory", "cc");                 \
+                        __ret = (rettype)__eax;                         \
+                }                                                       \
+                __ret;                                                  \
+        })
+#define __PVOP_VCALL(op, pre, post, ...)                                \
+        ({                                                              \
+                unsigned long __eax, __edx, __ecx;                      \
+                asm volatile(pre                                        \
+                             paravirt_alt(PARAVIRT_CALL)                \
+                             post                                       \
+                             : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
+                             : paravirt_type(op),                       \
+                               paravirt_clobber(CLBR_ANY),              \
+                               ##__VA_ARGS__                            \
+                             : "memory", "cc");                         \
+        })
+
+#define PVOP_CALL0(rettype, op)                                         \
+        __PVOP_CALL(rettype, op, "", "")
+#define PVOP_VCALL0(op)                                                 \
+        __PVOP_VCALL(op, "", "")
+
+#define PVOP_CALL1(rettype, op, arg1)                                   \
+        __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)))
+#define PVOP_VCALL1(op, arg1)                                           \
+        __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)))
+
+#define PVOP_CALL2(rettype, op, arg1, arg2)                             \
+        __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
+#define PVOP_VCALL2(op, arg1, arg2)                                     \
+        __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
+
+#define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
+        __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)),             \
+                    "1"((u32)(arg2)), "2"((u32)(arg3)))
+#define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
+        __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)),   \
+                     "2"((u32)(arg3)))
+
+#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
+        __PVOP_CALL(rettype, op,                                        \
+                    "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
+                    "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
+                    "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
+#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
+        __PVOP_VCALL(op,                                                \
+                    "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
+                    "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
+                    "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
+
+static inline int paravirt_enabled(void)
+{
+        return paravirt_ops.paravirt_enabled;
+}
 
 static inline void load_esp0(struct tss_struct *tss,
                              struct thread_struct *thread)
 {
-        paravirt_ops.load_esp0(tss, thread);
+        PVOP_VCALL2(load_esp0, tss, thread);
 }
 
 #define ARCH_SETUP                      paravirt_ops.arch_setup();
 static inline unsigned long get_wallclock(void)
 {
-        return paravirt_ops.get_wallclock();
+        return PVOP_CALL0(unsigned long, get_wallclock);
 }
 
 static inline int set_wallclock(unsigned long nowtime)
 {
-        return paravirt_ops.set_wallclock(nowtime);
+        return PVOP_CALL1(int, set_wallclock, nowtime);
 }
 
 static inline void (*choose_time_init(void))(void)
@@ -195,113 +436,208 @@ static inline void (*choose_time_init(void))(void)
 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
                            unsigned int *ecx, unsigned int *edx)
 {
-        paravirt_ops.cpuid(eax, ebx, ecx, edx);
+        PVOP_VCALL4(cpuid, eax, ebx, ecx, edx);
 }
 
 /*
  * These special macros can be used to get or set a debugging register
  */
-#define get_debugreg(var, reg) var = paravirt_ops.get_debugreg(reg)
-#define set_debugreg(val, reg) paravirt_ops.set_debugreg(reg, val)
+static inline unsigned long paravirt_get_debugreg(int reg)
+{
+        return PVOP_CALL1(unsigned long, get_debugreg, reg);
+}
+#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
+static inline void set_debugreg(unsigned long val, int reg)
+{
+        PVOP_VCALL2(set_debugreg, reg, val);
+}
+
+static inline void clts(void)
+{
+        PVOP_VCALL0(clts);
+}
 
-#define clts() paravirt_ops.clts()
+static inline unsigned long read_cr0(void)
+{
+        return PVOP_CALL0(unsigned long, read_cr0);
+}
 
-#define read_cr0() paravirt_ops.read_cr0()
-#define write_cr0(x) paravirt_ops.write_cr0(x)
+static inline void write_cr0(unsigned long x)
+{
+        PVOP_VCALL1(write_cr0, x);
+}
 
-#define read_cr2() paravirt_ops.read_cr2()
-#define write_cr2(x) paravirt_ops.write_cr2(x)
+static inline unsigned long read_cr2(void)
+{
+        return PVOP_CALL0(unsigned long, read_cr2);
+}
 
-#define read_cr3() paravirt_ops.read_cr3()
-#define write_cr3(x) paravirt_ops.write_cr3(x)
+static inline void write_cr2(unsigned long x)
+{
+        PVOP_VCALL1(write_cr2, x);
+}
 
-#define read_cr4() paravirt_ops.read_cr4()
-#define read_cr4_safe(x) paravirt_ops.read_cr4_safe()
-#define write_cr4(x) paravirt_ops.write_cr4(x)
+static inline unsigned long read_cr3(void)
+{
+        return PVOP_CALL0(unsigned long, read_cr3);
+}
+
+static inline void write_cr3(unsigned long x)
+{
+        PVOP_VCALL1(write_cr3, x);
+}
+
+static inline unsigned long read_cr4(void)
+{
+        return PVOP_CALL0(unsigned long, read_cr4);
+}
+static inline unsigned long read_cr4_safe(void)
+{
+        return PVOP_CALL0(unsigned long, read_cr4_safe);
+}
+
+static inline void write_cr4(unsigned long x)
+{
+        PVOP_VCALL1(write_cr4, x);
+}
 
 static inline void raw_safe_halt(void)
 {
-        paravirt_ops.safe_halt();
+        PVOP_VCALL0(safe_halt);
 }
 
 static inline void halt(void)
 {
-        paravirt_ops.safe_halt();
+        PVOP_VCALL0(safe_halt);
+}
+
+static inline void wbinvd(void)
+{
+        PVOP_VCALL0(wbinvd);
 }
-#define wbinvd() paravirt_ops.wbinvd()
 
 #define get_kernel_rpl()  (paravirt_ops.kernel_rpl)
 
-#define rdmsr(msr,val1,val2) do {                               \
-        int _err;                                               \
-        u64 _l = paravirt_ops.read_msr(msr,&_err);              \
-        val1 = (u32)_l;                                         \
-        val2 = _l >> 32;                                        \
+static inline u64 paravirt_read_msr(unsigned msr, int *err)
+{
+        return PVOP_CALL2(u64, read_msr, msr, err);
+}
+static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
+{
+        return PVOP_CALL3(int, write_msr, msr, low, high);
+}
+
+/* These should all do BUG_ON(_err), but our headers are too tangled. */
+#define rdmsr(msr,val1,val2) do {               \
+        int _err;                               \
+        u64 _l = paravirt_read_msr(msr, &_err); \
+        val1 = (u32)_l;                         \
+        val2 = _l >> 32;                        \
 } while(0)
 
-#define wrmsr(msr,val1,val2) do {                               \
-        u64 _l = ((u64)(val2) << 32) | (val1);                  \
-        paravirt_ops.write_msr((msr), _l);                      \
+#define wrmsr(msr,val1,val2) do {               \
+        paravirt_write_msr(msr, val1, val2);    \
 } while(0)
 
-#define rdmsrl(msr,val) do {                                    \
-        int _err;                                               \
-        val = paravirt_ops.read_msr((msr),&_err);               \
+#define rdmsrl(msr,val) do {                    \
+        int _err;                               \
+        val = paravirt_read_msr(msr, &_err);    \
 } while(0)
 
-#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val)))
-#define wrmsr_safe(msr,a,b) ({                                  \
-        u64 _l = ((u64)(b) << 32) | (a);                        \
-        paravirt_ops.write_msr((msr),_l);                       \
-})
+#define wrmsrl(msr,val)         ((void)paravirt_write_msr(msr, val, 0))
+#define wrmsr_safe(msr,a,b)     paravirt_write_msr(msr, a, b)
 
 /* rdmsr with exception handling */
-#define rdmsr_safe(msr,a,b) ({                                  \
-        int _err;                                               \
-        u64 _l = paravirt_ops.read_msr(msr,&_err);              \
-        (*a) = (u32)_l;                                         \
-        (*b) = _l >> 32;                                        \
+#define rdmsr_safe(msr,a,b) ({                  \
+        int _err;                               \
+        u64 _l = paravirt_read_msr(msr, &_err); \
+        (*a) = (u32)_l;                         \
+        (*b) = _l >> 32;                        \
         _err; })
 
-#define rdtsc(low,high) do {                                    \
-        u64 _l = paravirt_ops.read_tsc();                       \
-        low = (u32)_l;                                          \
-        high = _l >> 32;                                        \
+
+static inline u64 paravirt_read_tsc(void)
+{
+        return PVOP_CALL0(u64, read_tsc);
+}
+#define rdtsc(low,high) do {                    \
+        u64 _l = paravirt_read_tsc();           \
+        low = (u32)_l;                          \
+        high = _l >> 32;                        \
 } while(0)
 
-#define rdtscl(low) do {                                        \
-        u64 _l = paravirt_ops.read_tsc();                       \
-        low = (int)_l;                                          \
+#define rdtscl(low) do {                        \
+        u64 _l = paravirt_read_tsc();           \
+        low = (int)_l;                          \
 } while(0)
 
-#define rdtscll(val) (val = paravirt_ops.read_tsc())
+#define rdtscll(val) (val = paravirt_read_tsc())
 
 #define get_scheduled_cycles(val) (val = paravirt_ops.get_scheduled_cycles())
 #define calculate_cpu_khz() (paravirt_ops.get_cpu_khz())
 
 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
 
-#define rdpmc(counter,low,high) do {                            \
-        u64 _l = paravirt_ops.read_pmc();                       \
-        low = (u32)_l;                                          \
-        high = _l >> 32;                                        \
+static inline unsigned long long paravirt_read_pmc(int counter)
+{
+        return PVOP_CALL1(u64, read_pmc, counter);
+}
+
+#define rdpmc(counter,low,high) do {            \
+        u64 _l = paravirt_read_pmc(counter);    \
+        low = (u32)_l;                          \
+        high = _l >> 32;                        \
 } while(0)
 
-#define load_TR_desc() (paravirt_ops.load_tr_desc())
-#define load_gdt(dtr) (paravirt_ops.load_gdt(dtr))
-#define load_idt(dtr) (paravirt_ops.load_idt(dtr))
-#define set_ldt(addr, entries) (paravirt_ops.set_ldt((addr), (entries)))
-#define store_gdt(dtr) (paravirt_ops.store_gdt(dtr))
-#define store_idt(dtr) (paravirt_ops.store_idt(dtr))
-#define store_tr(tr) ((tr) = paravirt_ops.store_tr())
-#define load_TLS(t,cpu) (paravirt_ops.load_tls((t),(cpu)))
-#define write_ldt_entry(dt, entry, low, high)                           \
-        (paravirt_ops.write_ldt_entry((dt), (entry), (low), (high)))
-#define write_gdt_entry(dt, entry, low, high)                           \
-        (paravirt_ops.write_gdt_entry((dt), (entry), (low), (high)))
-#define write_idt_entry(dt, entry, low, high)                           \
-        (paravirt_ops.write_idt_entry((dt), (entry), (low), (high)))
-#define set_iopl_mask(mask) (paravirt_ops.set_iopl_mask(mask))
+static inline void load_TR_desc(void)
+{
+        PVOP_VCALL0(load_tr_desc);
+}
+static inline void load_gdt(const struct Xgt_desc_struct *dtr)
+{
+        PVOP_VCALL1(load_gdt, dtr);
+}
+static inline void load_idt(const struct Xgt_desc_struct *dtr)
+{
+        PVOP_VCALL1(load_idt, dtr);
+}
+static inline void set_ldt(const void *addr, unsigned entries)
+{
+        PVOP_VCALL2(set_ldt, addr, entries);
+}
+static inline void store_gdt(struct Xgt_desc_struct *dtr)
+{
+        PVOP_VCALL1(store_gdt, dtr);
+}
+static inline void store_idt(struct Xgt_desc_struct *dtr)
+{
+        PVOP_VCALL1(store_idt, dtr);
+}
+static inline unsigned long paravirt_store_tr(void)
+{
+        return PVOP_CALL0(unsigned long, store_tr);
+}
+#define store_tr(tr)    ((tr) = paravirt_store_tr())
+static inline void load_TLS(struct thread_struct *t, unsigned cpu)
+{
+        PVOP_VCALL2(load_tls, t, cpu);
+}
+static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high)
+{
+        PVOP_VCALL4(write_ldt_entry, dt, entry, low, high);
+}
+static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high)
+{
+        PVOP_VCALL4(write_gdt_entry, dt, entry, low, high);
+}
+static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high)
+{
+        PVOP_VCALL4(write_idt_entry, dt, entry, low, high);
+}
+static inline void set_iopl_mask(unsigned mask)
+{
+        PVOP_VCALL1(set_iopl_mask, mask);
+}
 
 /* The paravirtualized I/O functions */
 static inline void slow_down_io(void) {
@@ -319,215 +655,390 @@ static inline void slow_down_io(void) {
  */
 static inline void apic_write(unsigned long reg, unsigned long v)
 {
-        paravirt_ops.apic_write(reg,v);
+        PVOP_VCALL2(apic_write, reg, v);
 }
 
 static inline void apic_write_atomic(unsigned long reg, unsigned long v)
 {
-        paravirt_ops.apic_write_atomic(reg,v);
+        PVOP_VCALL2(apic_write_atomic, reg, v);
 }
 
 static inline unsigned long apic_read(unsigned long reg)
 {
-        return paravirt_ops.apic_read(reg);
+        return PVOP_CALL1(unsigned long, apic_read, reg);
 }
 
 static inline void setup_boot_clock(void)
 {
-        paravirt_ops.setup_boot_clock();
+        PVOP_VCALL0(setup_boot_clock);
 }
 
 static inline void setup_secondary_clock(void)
 {
-        paravirt_ops.setup_secondary_clock();
+        PVOP_VCALL0(setup_secondary_clock);
 }
 #endif
 
+static inline void paravirt_pagetable_setup_start(pgd_t *base)
+{
+        if (paravirt_ops.pagetable_setup_start)
+                (*paravirt_ops.pagetable_setup_start)(base);
+}
+
+static inline void paravirt_pagetable_setup_done(pgd_t *base)
+{
+        if (paravirt_ops.pagetable_setup_done)
+                (*paravirt_ops.pagetable_setup_done)(base);
+}
+
 #ifdef CONFIG_SMP
 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
                                     unsigned long start_esp)
 {
-        return paravirt_ops.startup_ipi_hook(phys_apicid, start_eip, start_esp);
+        PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp);
 }
 #endif
 
-#define __flush_tlb() paravirt_ops.flush_tlb_user()
-#define __flush_tlb_global() paravirt_ops.flush_tlb_kernel()
-#define __flush_tlb_single(addr) paravirt_ops.flush_tlb_single(addr)
+static inline void paravirt_activate_mm(struct mm_struct *prev,
+                                        struct mm_struct *next)
+{
+        PVOP_VCALL2(activate_mm, prev, next);
+}
 
-#define paravirt_map_pt_hook(type, va, pfn) paravirt_ops.map_pt_hook(type, va, pfn)
+static inline void arch_dup_mmap(struct mm_struct *oldmm,
+                                 struct mm_struct *mm)
+{
+        PVOP_VCALL2(dup_mmap, oldmm, mm);
+}
 
-#define paravirt_alloc_pt(pfn) paravirt_ops.alloc_pt(pfn)
-#define paravirt_release_pt(pfn) paravirt_ops.release_pt(pfn)
+static inline void arch_exit_mmap(struct mm_struct *mm)
+{
+        PVOP_VCALL1(exit_mmap, mm);
+}
 
-#define paravirt_alloc_pd(pfn) paravirt_ops.alloc_pd(pfn)
-#define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) \
-        paravirt_ops.alloc_pd_clone(pfn, clonepfn, start, count)
-#define paravirt_release_pd(pfn) paravirt_ops.release_pd(pfn)
+static inline void __flush_tlb(void)
+{
+        PVOP_VCALL0(flush_tlb_user);
+}
+static inline void __flush_tlb_global(void)
+{
+        PVOP_VCALL0(flush_tlb_kernel);
+}
+static inline void __flush_tlb_single(unsigned long addr)
+{
+        PVOP_VCALL1(flush_tlb_single, addr);
+}
 
-static inline void set_pte(pte_t *ptep, pte_t pteval)
+static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
+                                    unsigned long va)
 {
-        paravirt_ops.set_pte(ptep, pteval);
+        PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va);
 }
 
-static inline void set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval)
+static inline void paravirt_alloc_pt(unsigned pfn)
 {
-        paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
+        PVOP_VCALL1(alloc_pt, pfn);
+}
+static inline void paravirt_release_pt(unsigned pfn)
+{
+        PVOP_VCALL1(release_pt, pfn);
 }
 
-static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
+static inline void paravirt_alloc_pd(unsigned pfn)
 {
-        paravirt_ops.set_pmd(pmdp, pmdval);
+        PVOP_VCALL1(alloc_pd, pfn);
 }
 
-static inline void pte_update(struct mm_struct *mm, u32 addr, pte_t *ptep)
+static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
+                                           unsigned start, unsigned count)
 {
-        paravirt_ops.pte_update(mm, addr, ptep);
+        PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count);
+}
+static inline void paravirt_release_pd(unsigned pfn)
+{
+        PVOP_VCALL1(release_pd, pfn);
 }
 
-static inline void pte_update_defer(struct mm_struct *mm, u32 addr, pte_t *ptep)
+#ifdef CONFIG_HIGHPTE
+static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
 {
-        paravirt_ops.pte_update_defer(mm, addr, ptep);
+        unsigned long ret;
+        ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type);
+        return (void *)ret;
+}
+#endif
+
+static inline void pte_update(struct mm_struct *mm, unsigned long addr,
+                              pte_t *ptep)
+{
+        PVOP_VCALL3(pte_update, mm, addr, ptep);
+}
+
+static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
+                                    pte_t *ptep)
+{
+        PVOP_VCALL3(pte_update_defer, mm, addr, ptep);
 }
 
 #ifdef CONFIG_X86_PAE
+static inline pte_t __pte(unsigned long long val)
+{
+        unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte,
+                                            val, val >> 32);
+        return (pte_t) { ret, ret >> 32 };
+}
+
+static inline pmd_t __pmd(unsigned long long val)
+{
+        return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) };
+}
+
+static inline pgd_t __pgd(unsigned long long val)
+{
+        return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) };
+}
+
+static inline unsigned long long pte_val(pte_t x)
+{
+        return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high);
+}
+
+static inline unsigned long long pmd_val(pmd_t x)
+{
+        return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32);
+}
+
+static inline unsigned long long pgd_val(pgd_t x)
+{
+        return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32);
+}
+
+static inline void set_pte(pte_t *ptep, pte_t pteval)
+{
+        PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high);
+}
+
+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
+                              pte_t *ptep, pte_t pteval)
+{
+        /* 5 arg words */
+        paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
+}
+
 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
 {
-        paravirt_ops.set_pte_atomic(ptep, pteval);
+        PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high);
 }
 
-static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
+static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
+                                   pte_t *ptep, pte_t pte)
 {
+        /* 5 arg words */
         paravirt_ops.set_pte_present(mm, addr, ptep, pte);
 }
 
+static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
+{
+        PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32);
+}
+
 static inline void set_pud(pud_t *pudp, pud_t pudval)
 {
-        paravirt_ops.set_pud(pudp, pudval);
+        PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32);
 }
 
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-        paravirt_ops.pte_clear(mm, addr, ptep);
+        PVOP_VCALL3(pte_clear, mm, addr, ptep);
 }
 
 static inline void pmd_clear(pmd_t *pmdp)
 {
-        paravirt_ops.pmd_clear(pmdp);
+        PVOP_VCALL1(pmd_clear, pmdp);
 }
-#endif
 
-/* Lazy mode for batching updates / context switch */
-#define PARAVIRT_LAZY_NONE 0
-#define PARAVIRT_LAZY_MMU  1
-#define PARAVIRT_LAZY_CPU  2
-#define PARAVIRT_LAZY_FLUSH 3
+#else  /* !CONFIG_X86_PAE */
+
+static inline pte_t __pte(unsigned long val)
+{
+        return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) };
+}
+
+static inline pgd_t __pgd(unsigned long val)
+{
+        return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) };
+}
+
+static inline unsigned long pte_val(pte_t x)
+{
+        return PVOP_CALL1(unsigned long, pte_val, x.pte_low);
+}
+
+static inline unsigned long pgd_val(pgd_t x)
+{
+        return PVOP_CALL1(unsigned long, pgd_val, x.pgd);
+}
+
+static inline void set_pte(pte_t *ptep, pte_t pteval)
+{
+        PVOP_VCALL2(set_pte, ptep, pteval.pte_low);
+}
+
+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
+                              pte_t *ptep, pte_t pteval)
+{
+        PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low);
+}
+
+static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
+{
+        PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd);
+}
+#endif  /* CONFIG_X86_PAE */
 
 #define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
-#define arch_enter_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_CPU)
-#define arch_leave_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
-#define arch_flush_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_FLUSH)
+static inline void arch_enter_lazy_cpu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU);
+}
+
+static inline void arch_leave_lazy_cpu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
+}
+
+static inline void arch_flush_lazy_cpu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
+}
+
 
 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
-#define arch_enter_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_MMU)
-#define arch_leave_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE)
-#define arch_flush_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_FLUSH)
+static inline void arch_enter_lazy_mmu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU);
+}
+
+static inline void arch_leave_lazy_mmu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
+}
+
+static inline void arch_flush_lazy_mmu_mode(void)
+{
+        PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
+}
+
+void _paravirt_nop(void);
+#define paravirt_nop    ((void *)_paravirt_nop)
 
 /* These all sit in the .parainstructions section to tell us what to patch. */
-struct paravirt_patch {
+struct paravirt_patch_site {
         u8 *instr;              /* original instructions */
         u8 instrtype;           /* type of this instruction */
         u8 len;                 /* length of original instruction */
         u16 clobbers;           /* what registers you may clobber */
 };
 
-#define paravirt_alt(insn_string, typenum, clobber)     \
-        "771:\n\t" insn_string "\n" "772:\n"            \
-        ".pushsection .parainstructions,\"a\"\n"        \
-        "  .long 771b\n"                                \
-        "  .byte " __stringify(typenum) "\n"            \
-        "  .byte 772b-771b\n"                           \
-        "  .short " __stringify(clobber) "\n"           \
-        ".popsection"
+extern struct paravirt_patch_site __parainstructions[],
+        __parainstructions_end[];
 
 static inline unsigned long __raw_local_save_flags(void)
 {
         unsigned long f;
 
-        __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
-                                           "call *%1;"
-                                           "popl %%edx; popl %%ecx",
-                                          PARAVIRT_SAVE_FLAGS, CLBR_NONE)
-                             : "=a"(f): "m"(paravirt_ops.save_fl)
-                             : "memory", "cc");
+        asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
+                                  PARAVIRT_CALL
+                                  "popl %%edx; popl %%ecx")
+                     : "=a"(f)
+                     : paravirt_type(save_fl),
+                       paravirt_clobber(CLBR_EAX)
+                     : "memory", "cc");
         return f;
 }
 
 static inline void raw_local_irq_restore(unsigned long f)
 {
-        __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
-                                           "call *%1;"
-                                           "popl %%edx; popl %%ecx",
-                                          PARAVIRT_RESTORE_FLAGS, CLBR_EAX)
-                             : "=a"(f) : "m" (paravirt_ops.restore_fl), "0"(f)
-                             : "memory", "cc");
+        asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
+                                  PARAVIRT_CALL
+                                  "popl %%edx; popl %%ecx")
+                     : "=a"(f)
+                     : "0"(f),
+                       paravirt_type(restore_fl),
+                       paravirt_clobber(CLBR_EAX)
+                     : "memory", "cc");
 }
 
 static inline void raw_local_irq_disable(void)
 {
-        __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
-                                           "call *%0;"
-                                           "popl %%edx; popl %%ecx",
-                                          PARAVIRT_IRQ_DISABLE, CLBR_EAX)
-                             : : "m" (paravirt_ops.irq_disable)
-                             : "memory", "eax", "cc");
+        asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
+                                  PARAVIRT_CALL
+                                  "popl %%edx; popl %%ecx")
+                     :
+                     : paravirt_type(irq_disable),
+                       paravirt_clobber(CLBR_EAX)
+                     : "memory", "eax", "cc");
 }
 
 static inline void raw_local_irq_enable(void)
 {
-        __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
-                                           "call *%0;"
-                                           "popl %%edx; popl %%ecx",
-                                          PARAVIRT_IRQ_ENABLE, CLBR_EAX)
-                             : : "m" (paravirt_ops.irq_enable)
-                             : "memory", "eax", "cc");
+        asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
+                                  PARAVIRT_CALL
+                                  "popl %%edx; popl %%ecx")
+                     :
+                     : paravirt_type(irq_enable),
+                       paravirt_clobber(CLBR_EAX)
+                     : "memory", "eax", "cc");
 }
 
 static inline unsigned long __raw_local_irq_save(void)
 {
         unsigned long f;
 
-        __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;"
-                                           "call *%1; pushl %%eax;"
-                                           "call *%2; popl %%eax;"
-                                           "popl %%edx; popl %%ecx",
-                                          PARAVIRT_SAVE_FLAGS_IRQ_DISABLE,
-                                          CLBR_NONE)
-                             : "=a"(f)
-                             : "m" (paravirt_ops.save_fl),
-                               "m" (paravirt_ops.irq_disable)
-                             : "memory", "cc");
+        f = __raw_local_save_flags();
+        raw_local_irq_disable();
         return f;
 }
 
-#define CLI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;"             \
-                     "call *paravirt_ops+%c[irq_disable];"              \
-                     "popl %%edx; popl %%ecx",                          \
-                     PARAVIRT_IRQ_DISABLE, CLBR_EAX)
+#define CLI_STRING                                                      \
+        _paravirt_alt("pushl %%ecx; pushl %%edx;"                       \
+                      "call *paravirt_ops+%c[paravirt_cli_type]*4;"     \
+                      "popl %%edx; popl %%ecx",                         \
+                      "%c[paravirt_cli_type]", "%c[paravirt_clobber]")
+
+#define STI_STRING                                                      \
+        _paravirt_alt("pushl %%ecx; pushl %%edx;"                       \
+                      "call *paravirt_ops+%c[paravirt_sti_type]*4;"     \
+                      "popl %%edx; popl %%ecx",                         \
+                      "%c[paravirt_sti_type]", "%c[paravirt_clobber]")
 
-#define STI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;"             \
-                     "call *paravirt_ops+%c[irq_enable];"               \
-                     "popl %%edx; popl %%ecx",                          \
-                     PARAVIRT_IRQ_ENABLE, CLBR_EAX)
 #define CLI_STI_CLOBBERS , "%eax"
-#define CLI_STI_INPUT_ARGS \
+#define CLI_STI_INPUT_ARGS                                              \
         ,                                                               \
-        [irq_disable] "i" (offsetof(struct paravirt_ops, irq_disable)), \
-        [irq_enable] "i" (offsetof(struct paravirt_ops, irq_enable))
+        [paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)),          \
+        [paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)),           \
+        paravirt_clobber(CLBR_EAX)
+
+/* Make sure as little as possible of this mess escapes. */
+#undef PARAVIRT_CALL
+#undef __PVOP_CALL
+#undef __PVOP_VCALL
+#undef PVOP_VCALL0
+#undef PVOP_CALL0
+#undef PVOP_VCALL1
+#undef PVOP_CALL1
+#undef PVOP_VCALL2
+#undef PVOP_CALL2
+#undef PVOP_VCALL3
+#undef PVOP_CALL3
+#undef PVOP_VCALL4
+#undef PVOP_CALL4
 
 #else  /* __ASSEMBLY__ */
 
-#define PARA_PATCH(ptype, clobbers, ops)        \
+#define PARA_PATCH(off) ((off) / 4)
+
+#define PARA_SITE(ptype, clobbers, ops)         \
 771:;                                           \
         ops;                                    \
 772:;                                           \
@@ -538,28 +1049,30 @@ static inline unsigned long __raw_local_irq_save(void)
          .short clobbers;                       \
         .popsection
 
-#define INTERRUPT_RETURN                                \
-        PARA_PATCH(PARAVIRT_INTERRUPT_RETURN, CLBR_ANY, \
-        jmp *%cs:paravirt_ops+PARAVIRT_iret)
+#define INTERRUPT_RETURN                                        \
+        PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE,         \
+                  jmp *%cs:paravirt_ops+PARAVIRT_iret)
 
-#define DISABLE_INTERRUPTS(clobbers)                    \
-        PARA_PATCH(PARAVIRT_IRQ_DISABLE, clobbers,      \
-        pushl %ecx; pushl %edx;                         \
-        call *paravirt_ops+PARAVIRT_irq_disable;        \
-        popl %edx; popl %ecx)                           \
+#define DISABLE_INTERRUPTS(clobbers)                                    \
+        PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers,           \
+                  pushl %eax; pushl %ecx; pushl %edx;                   \
+                  call *%cs:paravirt_ops+PARAVIRT_irq_disable;          \
+                  popl %edx; popl %ecx; popl %eax)                      \
 
-#define ENABLE_INTERRUPTS(clobbers)                     \
-        PARA_PATCH(PARAVIRT_IRQ_ENABLE, clobbers,       \
-        pushl %ecx; pushl %edx;                         \
-        call *%cs:paravirt_ops+PARAVIRT_irq_enable;     \
-        popl %edx; popl %ecx)
+#define ENABLE_INTERRUPTS(clobbers)                                     \
+        PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers,            \
+                  pushl %eax; pushl %ecx; pushl %edx;                   \
+                  call *%cs:paravirt_ops+PARAVIRT_irq_enable;           \
+                  popl %edx; popl %ecx; popl %eax)
 
-#define ENABLE_INTERRUPTS_SYSEXIT                       \
-        PARA_PATCH(PARAVIRT_STI_SYSEXIT, CLBR_ANY,      \
-        jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
+#define ENABLE_INTERRUPTS_SYSEXIT                                       \
+        PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE,   \
+                  jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
 
 #define GET_CR0_INTO_EAX                        \
-        call *paravirt_ops+PARAVIRT_read_cr0
+        push %ecx; push %edx;                   \
+        call *paravirt_ops+PARAVIRT_read_cr0;   \
+        pop %edx; pop %ecx
 
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_PARAVIRT */
diff --git a/include/asm-i386/pda.h b/include/asm-i386/pda.h
deleted file mode 100644
index b12d59a318b7..000000000000
--- a/include/asm-i386/pda.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
-   Per-processor Data Areas
-   Jeremy Fitzhardinge <jeremy@goop.org> 2006
-   Based on asm-x86_64/pda.h by Andi Kleen.
- */
-#ifndef _I386_PDA_H
-#define _I386_PDA_H
-
-#include <linux/stddef.h>
-#include <linux/types.h>
-
-struct i386_pda
-{
-        struct i386_pda *_pda;          /* pointer to self */
-
-        int cpu_number;
-        struct task_struct *pcurrent;   /* current process */
-        struct pt_regs *irq_regs;
-};
-
-extern struct i386_pda *_cpu_pda[];
-
-#define cpu_pda(i)      (_cpu_pda[i])
-
-#define pda_offset(field) offsetof(struct i386_pda, field)
-
-extern void __bad_pda_field(void);
-
-/* This variable is never instantiated.  It is only used as a stand-in
-   for the real per-cpu PDA memory, so that gcc can understand what
-   memory operations the inline asms() below are performing.  This
-   eliminates the need to make the asms volatile or have memory
-   clobbers, so gcc can readily analyse them. */
-extern struct i386_pda _proxy_pda;
-
-#define pda_to_op(op,field,val)                                         \
-        do {                                                            \
-                typedef typeof(_proxy_pda.field) T__;                   \
-                if (0) { T__ tmp__; tmp__ = (val); }                    \
-                switch (sizeof(_proxy_pda.field)) {                     \
-                case 1:                                                 \
-                        asm(op "b %1,%%fs:%c2"                          \
-                            : "+m" (_proxy_pda.field)                   \
-                            :"ri" ((T__)val),                           \
-                             "i"(pda_offset(field)));                   \
-                        break;                                          \
-                case 2:                                                 \
-                        asm(op "w %1,%%fs:%c2"                          \
-                            : "+m" (_proxy_pda.field)                   \
-                            :"ri" ((T__)val),                           \
-                             "i"(pda_offset(field)));                   \
-                        break;                                          \
-                case 4:                                                 \
-                        asm(op "l %1,%%fs:%c2"                          \
-                            : "+m" (_proxy_pda.field)                   \
-                            :"ri" ((T__)val),                           \
-                             "i"(pda_offset(field)));                   \
-                        break;                                          \
-                default: __bad_pda_field();                             \
-                }                                                       \
-        } while (0)
-
-#define pda_from_op(op,field)                                           \
-        ({                                                              \
-                typeof(_proxy_pda.field) ret__;                         \
-                switch (sizeof(_proxy_pda.field)) {                     \
-                case 1:                                                 \
-                        asm(op "b %%fs:%c1,%0"                          \
-                            : "=r" (ret__)                              \
-                            : "i" (pda_offset(field)),                  \
-                              "m" (_proxy_pda.field));                  \
-                        break;                                          \
-                case 2:                                                 \
-                        asm(op "w %%fs:%c1,%0"                          \
-                            : "=r" (ret__)                              \
-                            : "i" (pda_offset(field)),                  \
-                              "m" (_proxy_pda.field));                  \
-                        break;                                          \
-                case 4:                                                 \
-                        asm(op "l %%fs:%c1,%0"                          \
-                            : "=r" (ret__)                              \
-                            : "i" (pda_offset(field)),                  \
-                              "m" (_proxy_pda.field));                  \
-                        break;                                          \
-                default: __bad_pda_field();                             \
-                }                                                       \
-                ret__; })
-
-/* Return a pointer to a pda field */
-#define pda_addr(field)                                                 \
-        ((typeof(_proxy_pda.field) *)((unsigned char *)read_pda(_pda) + \
-                                      pda_offset(field)))
-
-#define read_pda(field) pda_from_op("mov",field)
-#define write_pda(field,val) pda_to_op("mov",field,val)
-#define add_pda(field,val) pda_to_op("add",field,val)
-#define sub_pda(field,val) pda_to_op("sub",field,val)
-#define or_pda(field,val) pda_to_op("or",field,val)
-
-#endif  /* _I386_PDA_H */
diff --git a/include/asm-i386/percpu.h b/include/asm-i386/percpu.h
index 510ae1d3486c..f54830b5d5ac 100644
--- a/include/asm-i386/percpu.h
+++ b/include/asm-i386/percpu.h
@@ -1,9 +1,32 @@
 #ifndef __ARCH_I386_PERCPU__
 #define __ARCH_I386_PERCPU__
 
-#ifndef __ASSEMBLY__
-#include <asm-generic/percpu.h>
-#else
+#ifdef __ASSEMBLY__
+
+/*
+ * PER_CPU finds an address of a per-cpu variable.
+ *
+ * Args:
+ *    var - variable name
+ *    reg - 32bit register
+ *
+ * The resulting address is stored in the "reg" argument.
+ *
+ * Example:
+ *    PER_CPU(cpu_gdt_descr, %ebx)
+ */
+#ifdef CONFIG_SMP
+#define PER_CPU(var, reg)                               \
+        movl %fs:per_cpu__##this_cpu_off, reg;          \
+        lea per_cpu__##var(reg), reg
+#define PER_CPU_VAR(var)        %fs:per_cpu__##var
+#else /* ! SMP */
+#define PER_CPU(var, reg)                       \
+        movl $per_cpu__##var, reg
+#define PER_CPU_VAR(var)        per_cpu__##var
+#endif  /* SMP */
+
+#else /* ...!ASSEMBLY */
 
 /*
  * PER_CPU finds an address of a per-cpu variable.
@@ -18,14 +41,109 @@
  *    PER_CPU(cpu_gdt_descr, %ebx)
  */
 #ifdef CONFIG_SMP
-#define PER_CPU(var, cpu) \
-        movl __per_cpu_offset(,cpu,4), cpu;     \
-        addl $per_cpu__/**/var, cpu;
-#else /* ! SMP */
-#define PER_CPU(var, cpu) \
-        movl $per_cpu__/**/var, cpu;
+/* Same as generic implementation except for optimized local access. */
+#define __GENERIC_PER_CPU
+
+/* This is used for other cpus to find our section. */
+extern unsigned long __per_cpu_offset[];
+
+#define per_cpu_offset(x) (__per_cpu_offset[x])
+
+/* Separate out the type, so (int[3], foo) works. */
+#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name
+#define DEFINE_PER_CPU(type, name) \
+    __attribute__((__section__(".data.percpu"))) __typeof__(type) per_cpu__##name
+
+/* We can use this directly for local CPU (faster). */
+DECLARE_PER_CPU(unsigned long, this_cpu_off);
+
+/* var is in discarded region: offset to particular copy we want */
+#define per_cpu(var, cpu) (*({                          \
+        extern int simple_indentifier_##var(void);      \
+        RELOC_HIDE(&per_cpu__##var, __per_cpu_offset[cpu]); }))
+
+#define __raw_get_cpu_var(var) (*({                                     \
+        extern int simple_indentifier_##var(void);                      \
+        RELOC_HIDE(&per_cpu__##var, x86_read_percpu(this_cpu_off));     \
+}))
+
+#define __get_cpu_var(var) __raw_get_cpu_var(var)
+
+/* A macro to avoid #include hell... */
+#define percpu_modcopy(pcpudst, src, size)                      \
+do {                                                            \
+        unsigned int __i;                                       \
+        for_each_possible_cpu(__i)                              \
+                memcpy((pcpudst)+__per_cpu_offset[__i],         \
+                       (src), (size));                          \
+} while (0)
+
+#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
+#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
+
+/* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */
+#define __percpu_seg "%%fs:"
+#else  /* !SMP */
+#include <asm-generic/percpu.h>
+#define __percpu_seg ""
 #endif  /* SMP */
 
+/* For arch-specific code, we can use direct single-insn ops (they
+ * don't give an lvalue though). */
+extern void __bad_percpu_size(void);
+
+#define percpu_to_op(op,var,val)                                \
+        do {                                                    \
+                typedef typeof(var) T__;                        \
+                if (0) { T__ tmp__; tmp__ = (val); }            \
+                switch (sizeof(var)) {                          \
+                case 1:                                         \
+                        asm(op "b %1,"__percpu_seg"%0"          \
+                            : "+m" (var)                        \
+                            :"ri" ((T__)val));                  \
+                        break;                                  \
+                case 2:                                         \
+                        asm(op "w %1,"__percpu_seg"%0"          \
+                            : "+m" (var)                        \
+                            :"ri" ((T__)val));                  \
+                        break;                                  \
+                case 4:                                         \
+                        asm(op "l %1,"__percpu_seg"%0"          \
+                            : "+m" (var)                        \
+                            :"ri" ((T__)val));                  \
+                        break;                                  \
+                default: __bad_percpu_size();                   \
+                }                                               \
+        } while (0)
+
+#define percpu_from_op(op,var)                                  \
+        ({                                                      \
+                typeof(var) ret__;                              \
+                switch (sizeof(var)) {                          \
+                case 1:                                         \
+                        asm(op "b "__percpu_seg"%1,%0"          \
+                            : "=r" (ret__)                      \
+                            : "m" (var));                       \
+                        break;                                  \
+                case 2:                                         \
+                        asm(op "w "__percpu_seg"%1,%0"          \
+                            : "=r" (ret__)                      \
+                            : "m" (var));                       \
+                        break;                                  \
+                case 4:                                         \
+                        asm(op "l "__percpu_seg"%1,%0"          \
+                            : "=r" (ret__)                      \
+                            : "m" (var));                       \
+                        break;                                  \
+                default: __bad_percpu_size();                   \
+                }                                               \
+                ret__; })
+
+#define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var)
+#define x86_write_percpu(var,val) percpu_to_op("mov", per_cpu__##var, val)
+#define x86_add_percpu(var,val) percpu_to_op("add", per_cpu__##var, val)
+#define x86_sub_percpu(var,val) percpu_to_op("sub", per_cpu__##var, val)
+#define x86_or_percpu(var,val) percpu_to_op("or", per_cpu__##var, val)
 #endif /* !__ASSEMBLY__ */
 
 #endif /* __ARCH_I386_PERCPU__ */
diff --git a/include/asm-i386/pgalloc.h b/include/asm-i386/pgalloc.h
index c8dc2d0141a7..47430175b75f 100644
--- a/include/asm-i386/pgalloc.h
+++ b/include/asm-i386/pgalloc.h
@@ -1,7 +1,6 @@
 #ifndef _I386_PGALLOC_H
 #define _I386_PGALLOC_H
 
-#include <asm/fixmap.h>
 #include <linux/threads.h>
 #include <linux/mm.h>           /* for struct page */
 
diff --git a/include/asm-i386/pgtable-2level-defs.h b/include/asm-i386/pgtable-2level-defs.h
index 02518079f816..0f71c9f13da4 100644
--- a/include/asm-i386/pgtable-2level-defs.h
+++ b/include/asm-i386/pgtable-2level-defs.h
@@ -1,6 +1,8 @@
 #ifndef _I386_PGTABLE_2LEVEL_DEFS_H
 #define _I386_PGTABLE_2LEVEL_DEFS_H
 
+#define SHARED_KERNEL_PMD       0
+
 /*
  * traditional i386 two-level paging structure:
  */
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index 38c3fcc0676d..a50fd1773de8 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -11,10 +11,23 @@
  * within a page table are directly modified.  Thus, the following
  * hook is made available.
  */
+static inline void native_set_pte(pte_t *ptep , pte_t pte)
+{
+        *ptep = pte;
+}
+static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
+                                     pte_t *ptep , pte_t pte)
+{
+        native_set_pte(ptep, pte);
+}
+static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
+{
+        *pmdp = pmd;
+}
 #ifndef CONFIG_PARAVIRT
-#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
+#define set_pte(pteptr, pteval)         native_set_pte(pteptr, pteval)
+#define set_pte_at(mm,addr,ptep,pteval) native_set_pte_at(mm, addr, ptep, pteval)
+#define set_pmd(pmdptr, pmdval)         native_set_pmd(pmdptr, pmdval)
 #endif
 
 #define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval)
@@ -23,11 +36,23 @@
 #define pte_clear(mm,addr,xp)   do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
 #define pmd_clear(xp)   do { set_pmd(xp, __pmd(0)); } while (0)
 
-#define raw_ptep_get_and_clear(xp)      __pte(xchg(&(xp)->pte_low, 0))
+static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
+{
+        *xp = __pte(0);
+}
+
+#ifdef CONFIG_SMP
+static inline pte_t native_ptep_get_and_clear(pte_t *xp)
+{
+        return __pte(xchg(&xp->pte_low, 0));
+}
+#else
+#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
+#endif
 
 #define pte_page(x)             pfn_to_page(pte_pfn(x))
 #define pte_none(x)             (!(x).pte_low)
-#define pte_pfn(x)              ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
+#define pte_pfn(x)              (pte_val(x) >> PAGE_SHIFT)
 #define pfn_pte(pfn, prot)      __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 #define pfn_pmd(pfn, prot)      __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 
@@ -66,6 +91,4 @@ static inline int pte_exec_kernel(pte_t pte)
 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { (pte).pte_low })
 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 
-void vmalloc_sync_all(void);
-
 #endif /* _I386_PGTABLE_2LEVEL_H */
diff --git a/include/asm-i386/pgtable-3level-defs.h b/include/asm-i386/pgtable-3level-defs.h
index eb3a1ea88671..c0df89f66e8b 100644
--- a/include/asm-i386/pgtable-3level-defs.h
+++ b/include/asm-i386/pgtable-3level-defs.h
@@ -1,6 +1,12 @@
 #ifndef _I386_PGTABLE_3LEVEL_DEFS_H
 #define _I386_PGTABLE_3LEVEL_DEFS_H
 
+#ifdef CONFIG_PARAVIRT
+#define SHARED_KERNEL_PMD       (paravirt_ops.shared_kernel_pmd)
+#else
+#define SHARED_KERNEL_PMD       1
+#endif
+
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
  */
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 7a2318f38303..eb0f1d7e96a1 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -42,20 +42,23 @@ static inline int pte_exec_kernel(pte_t pte)
         return pte_x(pte);
 }
 
-#ifndef CONFIG_PARAVIRT
 /* Rules for using set_pte: the pte being assigned *must* be
  * either not present or in a state where the hardware will
  * not attempt to update the pte.  In places where this is
  * not possible, use pte_get_and_clear to obtain the old pte
  * value and then use set_pte to update it.  -ben
  */
-static inline void set_pte(pte_t *ptep, pte_t pte)
+static inline void native_set_pte(pte_t *ptep, pte_t pte)
 {
         ptep->pte_high = pte.pte_high;
         smp_wmb();
         ptep->pte_low = pte.pte_low;
 }
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
+                                     pte_t *ptep , pte_t pte)
+{
+        native_set_pte(ptep, pte);
+}
 
 /*
  * Since this is only called on user PTEs, and the page fault handler
@@ -63,7 +66,8 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
  * we are justified in merely clearing the PTE present bit, followed
  * by a set.  The ordering here is important.
  */
-static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
+static inline void native_set_pte_present(struct mm_struct *mm, unsigned long addr,
+                                          pte_t *ptep, pte_t pte)
 {
         ptep->pte_low = 0;
         smp_wmb();
@@ -72,32 +76,48 @@ static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte
         ptep->pte_low = pte.pte_low;
 }
 
-#define set_pte_atomic(pteptr,pteval) \
-                set_64bit((unsigned long long *)(pteptr),pte_val(pteval))
-#define set_pmd(pmdptr,pmdval) \
-                set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval))
-#define set_pud(pudptr,pudval) \
-                (*(pudptr) = (pudval))
+static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
+{
+        set_64bit((unsigned long long *)(ptep),native_pte_val(pte));
+}
+static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
+{
+        set_64bit((unsigned long long *)(pmdp),native_pmd_val(pmd));
+}
+static inline void native_set_pud(pud_t *pudp, pud_t pud)
+{
+        *pudp = pud;
+}
 
 /*
  * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
  * entry, so clear the bottom half first and enforce ordering with a compiler
  * barrier.
  */
-static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
         ptep->pte_low = 0;
         smp_wmb();
         ptep->pte_high = 0;
 }
 
-static inline void pmd_clear(pmd_t *pmd)
+static inline void native_pmd_clear(pmd_t *pmd)
 {
         u32 *tmp = (u32 *)pmd;
         *tmp = 0;
         smp_wmb();
         *(tmp + 1) = 0;
 }
+
+#ifndef CONFIG_PARAVIRT
+#define set_pte(ptep, pte)                      native_set_pte(ptep, pte)
+#define set_pte_at(mm, addr, ptep, pte)         native_set_pte_at(mm, addr, ptep, pte)
+#define set_pte_present(mm, addr, ptep, pte)    native_set_pte_present(mm, addr, ptep, pte)
+#define set_pte_atomic(ptep, pte)               native_set_pte_atomic(ptep, pte)
+#define set_pmd(pmdp, pmd)                      native_set_pmd(pmdp, pmd)
+#define set_pud(pudp, pud)                      native_set_pud(pudp, pud)
+#define pte_clear(mm, addr, ptep)               native_pte_clear(mm, addr, ptep)
+#define pmd_clear(pmd)                          native_pmd_clear(pmd)
 #endif
 
 /*
@@ -119,7 +139,8 @@ static inline void pud_clear (pud_t * pud) { }
 #define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
                         pmd_index(address))
 
-static inline pte_t raw_ptep_get_and_clear(pte_t *ptep)
+#ifdef CONFIG_SMP
+static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
 {
         pte_t res;
 
@@ -130,6 +151,9 @@ static inline pte_t raw_ptep_get_and_clear(pte_t *ptep)
 
         return res;
 }
+#else
+#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
+#endif
 
 #define __HAVE_ARCH_PTE_SAME
 static inline int pte_same(pte_t a, pte_t b)
@@ -146,28 +170,21 @@ static inline int pte_none(pte_t pte)
 
 static inline unsigned long pte_pfn(pte_t pte)
 {
-        return (pte.pte_low >> PAGE_SHIFT) |
-                (pte.pte_high << (32 - PAGE_SHIFT));
+        return pte_val(pte) >> PAGE_SHIFT;
 }
 
 extern unsigned long long __supported_pte_mask;
 
 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 {
-        pte_t pte;
-
-        pte.pte_high = (page_nr >> (32 - PAGE_SHIFT)) | \
-                                        (pgprot_val(pgprot) >> 32);
-        pte.pte_high &= (__supported_pte_mask >> 32);
-        pte.pte_low = ((page_nr << PAGE_SHIFT) | pgprot_val(pgprot)) & \
-                                                        __supported_pte_mask;
-        return pte;
+        return __pte((((unsigned long long)page_nr << PAGE_SHIFT) |
+                      pgprot_val(pgprot)) & __supported_pte_mask);
 }
 
 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 {
-        return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) | \
-                        pgprot_val(pgprot)) & __supported_pte_mask);
+        return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) |
+                      pgprot_val(pgprot)) & __supported_pte_mask);
 }
 
 /*
@@ -187,6 +204,4 @@ static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 
 #define __pmd_free_tlb(tlb, x)          do { } while (0)
 
-#define vmalloc_sync_all() ((void)0)
-
 #endif /* _I386_PGTABLE_3LEVEL_H */
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index c3b58d473a55..c6b8b944120c 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -159,6 +159,7 @@ void paging_init(void);
 
 extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
 #define __PAGE_KERNEL_RO                (__PAGE_KERNEL & ~_PAGE_RW)
+#define __PAGE_KERNEL_RX                (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
 #define __PAGE_KERNEL_NOCACHE           (__PAGE_KERNEL | _PAGE_PCD)
 #define __PAGE_KERNEL_LARGE             (__PAGE_KERNEL | _PAGE_PSE)
 #define __PAGE_KERNEL_LARGE_EXEC        (__PAGE_KERNEL_EXEC | _PAGE_PSE)
@@ -166,6 +167,7 @@ extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
 #define PAGE_KERNEL             __pgprot(__PAGE_KERNEL)
 #define PAGE_KERNEL_RO          __pgprot(__PAGE_KERNEL_RO)
 #define PAGE_KERNEL_EXEC        __pgprot(__PAGE_KERNEL_EXEC)
+#define PAGE_KERNEL_RX          __pgprot(__PAGE_KERNEL_RX)
 #define PAGE_KERNEL_NOCACHE     __pgprot(__PAGE_KERNEL_NOCACHE)
 #define PAGE_KERNEL_LARGE       __pgprot(__PAGE_KERNEL_LARGE)
 #define PAGE_KERNEL_LARGE_EXEC  __pgprot(__PAGE_KERNEL_LARGE_EXEC)
@@ -241,6 +243,8 @@ static inline pte_t pte_mkyoung(pte_t pte)	{ (pte).pte_low |= _PAGE_ACCESSED; re
 static inline pte_t pte_mkwrite(pte_t pte)      { (pte).pte_low |= _PAGE_RW; return pte; }
 static inline pte_t pte_mkhuge(pte_t pte)       { (pte).pte_low |= _PAGE_PSE; return pte; }
 
+extern void vmalloc_sync_all(void);
+
 #ifdef CONFIG_X86_PAE
 # include <asm/pgtable-3level.h>
 #else
@@ -263,9 +267,18 @@ static inline pte_t pte_mkhuge(pte_t pte)	{ (pte).pte_low |= _PAGE_PSE; return p
  */
 #define pte_update(mm, addr, ptep)              do { } while (0)
 #define pte_update_defer(mm, addr, ptep)        do { } while (0)
-#define paravirt_map_pt_hook(slot, va, pfn)     do { } while (0)
 #endif
 
+/* local pte updates need not use xchg for locking */
+static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
+{
+        pte_t res = *ptep;
+
+        /* Pure native function needs no input for mm, addr */
+        native_pte_clear(NULL, 0, ptep);
+        return res;
+}
+
 /*
  * We only update the dirty/accessed state if we set
  * the dirty bit by hand in the kernel, since the hardware
@@ -330,7 +343,7 @@ do {									\
 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-        pte_t pte = raw_ptep_get_and_clear(ptep);
+        pte_t pte = native_ptep_get_and_clear(ptep);
         pte_update(mm, addr, ptep);
         return pte;
 }
@@ -340,8 +353,11 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
 {
         pte_t pte;
         if (full) {
-                pte = *ptep;
-                pte_clear(mm, addr, ptep);
+                /*
+                 * Full address destruction in progress; paravirt does not
+                 * care about updates and native needs no locking
+                 */
+                pte = native_local_ptep_get_and_clear(ptep);
         } else {
                 pte = ptep_get_and_clear(mm, addr, ptep);
         }
@@ -470,24 +486,10 @@ extern pte_t *lookup_address(unsigned long address);
 #endif
 
 #if defined(CONFIG_HIGHPTE)
-#define pte_offset_map(dir, address)                            \
-({                                                              \
-        pte_t *__ptep;                                          \
-        unsigned pfn = pmd_val(*(dir)) >> PAGE_SHIFT;           \
-        __ptep = (pte_t *)kmap_atomic(pfn_to_page(pfn),KM_PTE0);\
-        paravirt_map_pt_hook(KM_PTE0,__ptep, pfn);              \
-        __ptep = __ptep + pte_index(address);                   \
-        __ptep;                                                 \
-})
-#define pte_offset_map_nested(dir, address)                     \
-({                                                              \
-        pte_t *__ptep;                                          \
-        unsigned pfn = pmd_val(*(dir)) >> PAGE_SHIFT;           \
-        __ptep = (pte_t *)kmap_atomic(pfn_to_page(pfn),KM_PTE1);\
-        paravirt_map_pt_hook(KM_PTE1,__ptep, pfn);              \
-        __ptep = __ptep + pte_index(address);                   \
-        __ptep;                                                 \
-})
+#define pte_offset_map(dir, address) \
+        ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
+#define pte_offset_map_nested(dir, address) \
+        ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
 #else
@@ -510,6 +512,22 @@ do {									\
  * tables contain all the necessary information.
  */
 #define update_mmu_cache(vma,address,pte) do { } while (0)
+
+void native_pagetable_setup_start(pgd_t *base);
+void native_pagetable_setup_done(pgd_t *base);
+
+#ifndef CONFIG_PARAVIRT
+static inline void paravirt_pagetable_setup_start(pgd_t *base)
+{
+        native_pagetable_setup_start(base);
+}
+
+static inline void paravirt_pagetable_setup_done(pgd_t *base)
+{
+        native_pagetable_setup_done(base);
+}
+#endif  /* !CONFIG_PARAVIRT */
+
 #endif /* !__ASSEMBLY__ */
 
 #ifdef CONFIG_FLATMEM
diff --git a/include/asm-i386/processor-flags.h b/include/asm-i386/processor-flags.h
new file mode 100644
index 000000000000..5404e90edd57
--- /dev/null
+++ b/include/asm-i386/processor-flags.h
@@ -0,0 +1,91 @@
+#ifndef __ASM_I386_PROCESSOR_FLAGS_H
+#define __ASM_I386_PROCESSOR_FLAGS_H
+/* Various flags defined: can be included from assembler. */
+
+/*
+ * EFLAGS bits
+ */
+#define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
+#define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
+#define X86_EFLAGS_AF   0x00000010 /* Auxillary carry Flag */
+#define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
+#define X86_EFLAGS_SF   0x00000080 /* Sign Flag */
+#define X86_EFLAGS_TF   0x00000100 /* Trap Flag */
+#define X86_EFLAGS_IF   0x00000200 /* Interrupt Flag */
+#define X86_EFLAGS_DF   0x00000400 /* Direction Flag */
+#define X86_EFLAGS_OF   0x00000800 /* Overflow Flag */
+#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
+#define X86_EFLAGS_NT   0x00004000 /* Nested Task */
+#define X86_EFLAGS_RF   0x00010000 /* Resume Flag */
+#define X86_EFLAGS_VM   0x00020000 /* Virtual Mode */
+#define X86_EFLAGS_AC   0x00040000 /* Alignment Check */
+#define X86_EFLAGS_VIF  0x00080000 /* Virtual Interrupt Flag */
+#define X86_EFLAGS_VIP  0x00100000 /* Virtual Interrupt Pending */
+#define X86_EFLAGS_ID   0x00200000 /* CPUID detection flag */
+
+/*
+ * Basic CPU control in CR0
+ */
+#define X86_CR0_PE      0x00000001 /* Protection Enable */
+#define X86_CR0_MP      0x00000002 /* Monitor Coprocessor */
+#define X86_CR0_EM      0x00000004 /* Emulation */
+#define X86_CR0_TS      0x00000008 /* Task Switched */
+#define X86_CR0_ET      0x00000010 /* Extension Type */
+#define X86_CR0_NE      0x00000020 /* Numeric Error */
+#define X86_CR0_WP      0x00010000 /* Write Protect */
+#define X86_CR0_AM      0x00040000 /* Alignment Mask */
+#define X86_CR0_NW      0x20000000 /* Not Write-through */
+#define X86_CR0_CD      0x40000000 /* Cache Disable */
+#define X86_CR0_PG      0x80000000 /* Paging */
+
+/*
+ * Paging options in CR3
+ */
+#define X86_CR3_PWT     0x00000008 /* Page Write Through */
+#define X86_CR3_PCD     0x00000010 /* Page Cache Disable */
+
+/*
+ * Intel CPU features in CR4
+ */
+#define X86_CR4_VME     0x00000001 /* enable vm86 extensions */
+#define X86_CR4_PVI     0x00000002 /* virtual interrupts flag enable */
+#define X86_CR4_TSD     0x00000004 /* disable time stamp at ipl 3 */
+#define X86_CR4_DE      0x00000008 /* enable debugging extensions */
+#define X86_CR4_PSE     0x00000010 /* enable page size extensions */
+#define X86_CR4_PAE     0x00000020 /* enable physical address extensions */
+#define X86_CR4_MCE     0x00000040 /* Machine check enable */
+#define X86_CR4_PGE     0x00000080 /* enable global pages */
+#define X86_CR4_PCE     0x00000100 /* enable performance counters at ipl 3 */
+#define X86_CR4_OSFXSR  0x00000200 /* enable fast FPU save and restore */
+#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
+#define X86_CR4_VMXE    0x00002000 /* enable VMX virtualization */
+
+/*
+ * x86-64 Task Priority Register, CR8
+ */
+#define X86_CR8_TPR     0x00000007 /* task priority register */
+
+/*
+ * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
+ */
+
+/*
+ *      NSC/Cyrix CPU configuration register indexes
+ */
+#define CX86_PCR0       0x20
+#define CX86_GCR        0xb8
+#define CX86_CCR0       0xc0
+#define CX86_CCR1       0xc1
+#define CX86_CCR2       0xc2
+#define CX86_CCR3       0xc3
+#define CX86_CCR4       0xe8
+#define CX86_CCR5       0xe9
+#define CX86_CCR6       0xea
+#define CX86_CCR7       0xeb
+#define CX86_PCR1       0xf0
+#define CX86_DIR0       0xfe
+#define CX86_DIR1       0xff
+#define CX86_ARR_BASE   0xc4
+#define CX86_RCR_BASE   0xdc
+
+#endif  /* __ASM_I386_PROCESSOR_FLAGS_H */
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 11bf899de8aa..70f3515c3db0 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -21,6 +21,7 @@
 #include <asm/percpu.h>
 #include <linux/cpumask.h>
 #include <linux/init.h>
+#include <asm/processor-flags.h>
 
 /* flag for disabling the tsc */
 extern int tsc_disable;
@@ -115,7 +116,8 @@ extern char ignore_fpu_irq;
 
 void __init cpu_detect(struct cpuinfo_x86 *c);
 
-extern void identify_cpu(struct cpuinfo_x86 *);
+extern void identify_boot_cpu(void);
+extern void identify_secondary_cpu(struct cpuinfo_x86 *);
 extern void print_cpu_info(struct cpuinfo_x86 *);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern unsigned short num_cache_leaves;
@@ -126,28 +128,7 @@ extern void detect_ht(struct cpuinfo_x86 *c);
 static inline void detect_ht(struct cpuinfo_x86 *c) {}
 #endif
 
-/*
- * EFLAGS bits
- */
-#define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
-#define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
-#define X86_EFLAGS_AF   0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF   0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF   0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF   0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF   0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF   0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT   0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF   0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM   0x00020000 /* Virtual Mode */
-#define X86_EFLAGS_AC   0x00040000 /* Alignment Check */
-#define X86_EFLAGS_VIF  0x00080000 /* Virtual Interrupt Flag */
-#define X86_EFLAGS_VIP  0x00100000 /* Virtual Interrupt Pending */
-#define X86_EFLAGS_ID   0x00200000 /* CPUID detection flag */
-
-static inline fastcall void native_cpuid(unsigned int *eax, unsigned int *ebx,
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
                                          unsigned int *ecx, unsigned int *edx)
 {
         /* ecx is often an input as well as an output. */
@@ -162,21 +143,6 @@ static inline fastcall void native_cpuid(unsigned int *eax, unsigned int *ebx,
 #define load_cr3(pgdir) write_cr3(__pa(pgdir))
 
 /*
- * Intel CPU features in CR4
- */
-#define X86_CR4_VME             0x0001  /* enable vm86 extensions */
-#define X86_CR4_PVI             0x0002  /* virtual interrupts flag enable */
-#define X86_CR4_TSD             0x0004  /* disable time stamp at ipl 3 */
-#define X86_CR4_DE              0x0008  /* enable debugging extensions */
-#define X86_CR4_PSE             0x0010  /* enable page size extensions */
-#define X86_CR4_PAE             0x0020  /* enable physical address extensions */
-#define X86_CR4_MCE             0x0040  /* Machine check enable */
-#define X86_CR4_PGE             0x0080  /* enable global pages */
-#define X86_CR4_PCE             0x0100  /* enable performance counters at ipl 3 */
-#define X86_CR4_OSFXSR          0x0200  /* enable fast FPU save and restore */
-#define X86_CR4_OSXMMEXCPT      0x0400  /* enable unmasked SSE exceptions */
-
-/*
  * Save the cr4 feature set we're using (ie
  * Pentium 4MB enable and PPro Global page
  * enable), so that any CPU's that boot up
@@ -203,26 +169,6 @@ static inline void clear_in_cr4 (unsigned long mask)
 }
 
 /*
- *      NSC/Cyrix CPU configuration register indexes
- */
-
-#define CX86_PCR0 0x20
-#define CX86_GCR  0xb8
-#define CX86_CCR0 0xc0
-#define CX86_CCR1 0xc1
-#define CX86_CCR2 0xc2
-#define CX86_CCR3 0xc3
-#define CX86_CCR4 0xe8
-#define CX86_CCR5 0xe9
-#define CX86_CCR6 0xea
-#define CX86_CCR7 0xeb
-#define CX86_PCR1 0xf0
-#define CX86_DIR0 0xfe
-#define CX86_DIR1 0xff
-#define CX86_ARR_BASE 0xc4
-#define CX86_RCR_BASE 0xdc
-
-/*
  *      NSC/Cyrix CPU indexed register access macros
  */
 
@@ -345,7 +291,8 @@ typedef struct {
 
 struct thread_struct;
 
-struct tss_struct {
+/* This is the TSS defined by the hardware. */
+struct i386_hw_tss {
         unsigned short  back_link,__blh;
         unsigned long   esp0;
         unsigned short  ss0,__ss0h;
@@ -369,6 +316,11 @@ struct tss_struct {
         unsigned short  gs, __gsh;
         unsigned short  ldt, __ldth;
         unsigned short  trace, io_bitmap_base;
+} __attribute__((packed));
+
+struct tss_struct {
+        struct i386_hw_tss x86_tss;
+
         /*
          * The extra 1 is there because the CPU will access an
          * additional byte beyond the end of the IO permission
@@ -421,10 +373,11 @@ struct thread_struct {
 };
 
 #define INIT_THREAD  {                                                  \
+        .esp0 = sizeof(init_stack) + (long)&init_stack,                 \
         .vm86_info = NULL,                                              \
         .sysenter_cs = __KERNEL_CS,                                     \
         .io_bitmap_ptr = NULL,                                          \
-        .fs = __KERNEL_PDA,                                             \
+        .fs = __KERNEL_PERCPU,                                          \
 }
 
 /*
@@ -434,10 +387,12 @@ struct thread_struct {
  * be within the limit.
  */
 #define INIT_TSS  {                                                     \
-        .esp0           = sizeof(init_stack) + (long)&init_stack,       \
-        .ss0            = __KERNEL_DS,                                  \
-        .ss1            = __KERNEL_CS,                                  \
-        .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,                     \
+        .x86_tss = {                                                    \
+                .esp0           = sizeof(init_stack) + (long)&init_stack, \
+                .ss0            = __KERNEL_DS,                          \
+                .ss1            = __KERNEL_CS,                          \
+                .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,             \
+         },                                                             \
         .io_bitmap      = { [ 0 ... IO_BITMAP_LONGS] = ~0 },            \
 }
 
@@ -544,40 +499,70 @@ static inline void rep_nop(void)
 
 #define cpu_relax()     rep_nop()
 
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else
-#define paravirt_enabled() 0
-#define __cpuid native_cpuid
-
-static inline void load_esp0(struct tss_struct *tss, struct thread_struct *thread)
+static inline void native_load_esp0(struct tss_struct *tss, struct thread_struct *thread)
 {
-        tss->esp0 = thread->esp0;
+        tss->x86_tss.esp0 = thread->esp0;
         /* This can only happen when SEP is enabled, no need to test "SEP"arately */
-        if (unlikely(tss->ss1 != thread->sysenter_cs)) {
-                tss->ss1 = thread->sysenter_cs;
+        if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
+                tss->x86_tss.ss1 = thread->sysenter_cs;
                 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
         }
 }
 
-/*
- * These special macros can be used to get or set a debugging register
- */
-#define get_debugreg(var, register)                             \
-                __asm__("movl %%db" #register ", %0"            \
-                        :"=r" (var))
-#define set_debugreg(value, register)                   \
-                __asm__("movl %0,%%db" #register                \
-                        : /* no output */                       \
-                        :"r" (value))
 
-#define set_iopl_mask native_set_iopl_mask
-#endif /* CONFIG_PARAVIRT */
+static inline unsigned long native_get_debugreg(int regno)
+{
+        unsigned long val = 0;  /* Damn you, gcc! */
+
+        switch (regno) {
+        case 0:
+                asm("movl %%db0, %0" :"=r" (val)); break;
+        case 1:
+                asm("movl %%db1, %0" :"=r" (val)); break;
+        case 2:
+                asm("movl %%db2, %0" :"=r" (val)); break;
+        case 3:
+                asm("movl %%db3, %0" :"=r" (val)); break;
+        case 6:
+                asm("movl %%db6, %0" :"=r" (val)); break;
+        case 7:
+                asm("movl %%db7, %0" :"=r" (val)); break;
+        default:
+                BUG();
+        }
+        return val;
+}
+
+static inline void native_set_debugreg(int regno, unsigned long value)
+{
+        switch (regno) {
+        case 0:
+                asm("movl %0,%%db0"     : /* no output */ :"r" (value));
+                break;
+        case 1:
+                asm("movl %0,%%db1"     : /* no output */ :"r" (value));
+                break;
+        case 2:
+                asm("movl %0,%%db2"     : /* no output */ :"r" (value));
+                break;
+        case 3:
+                asm("movl %0,%%db3"     : /* no output */ :"r" (value));
+                break;
+        case 6:
+                asm("movl %0,%%db6"     : /* no output */ :"r" (value));
+                break;
+        case 7:
+                asm("movl %0,%%db7"     : /* no output */ :"r" (value));
+                break;
+        default:
+                BUG();
+        }
+}
 
 /*
  * Set IOPL bits in EFLAGS from given mask
  */
-static fastcall inline void native_set_iopl_mask(unsigned mask)
+static inline void native_set_iopl_mask(unsigned mask)
 {
         unsigned int reg;
         __asm__ __volatile__ ("pushfl;"
@@ -590,6 +575,28 @@ static fastcall inline void native_set_iopl_mask(unsigned mask)
                                 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
 }
 
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define paravirt_enabled() 0
+#define __cpuid native_cpuid
+
+static inline void load_esp0(struct tss_struct *tss, struct thread_struct *thread)
+{
+        native_load_esp0(tss, thread);
+}
+
+/*
+ * These special macros can be used to get or set a debugging register
+ */
+#define get_debugreg(var, register)                             \
+        (var) = native_get_debugreg(register)
+#define set_debugreg(value, register)                           \
+        native_set_debugreg(register, value)
+
+#define set_iopl_mask native_set_iopl_mask
+#endif /* CONFIG_PARAVIRT */
+
 /*
  * Generic CPUID function
  * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
@@ -742,8 +749,10 @@ extern unsigned long boot_option_idle_override;
 extern void enable_sep_cpu(void);
 extern int sysenter_setup(void);
 
-extern int init_gdt(int cpu, struct task_struct *idle);
 extern void cpu_set_gdt(int);
-extern void secondary_cpu_init(void);
+extern void switch_to_new_gdt(void);
+extern void cpu_init(void);
+
+extern int force_mwait;
 
 #endif /* __ASM_I386_PROCESSOR_H */
diff --git a/include/asm-i386/reboot.h b/include/asm-i386/reboot.h
new file mode 100644
index 000000000000..e9e3ffc22c07
--- /dev/null
+++ b/include/asm-i386/reboot.h
@@ -0,0 +1,20 @@
+#ifndef _ASM_REBOOT_H
+#define _ASM_REBOOT_H
+
+struct pt_regs;
+
+struct machine_ops
+{
+        void (*restart)(char *cmd);
+        void (*halt)(void);
+        void (*power_off)(void);
+        void (*shutdown)(void);
+        void (*crash_shutdown)(struct pt_regs *);
+        void (*emergency_restart)(void);
+};
+
+extern struct machine_ops machine_ops;
+
+void machine_real_restart(unsigned char *code, int length);
+
+#endif  /* _ASM_REBOOT_H */
diff --git a/include/linux/reboot_fixups.h b/include/asm-i386/reboot_fixups.h
index 480ea2d489d8..0cb7d87c2b68 100644
--- a/include/linux/reboot_fixups.h
+++ b/include/asm-i386/reboot_fixups.h
@@ -1,10 +1,6 @@
 #ifndef _LINUX_REBOOT_FIXUPS_H
 #define _LINUX_REBOOT_FIXUPS_H
 
-#ifdef CONFIG_X86_REBOOTFIXUPS
 extern void mach_reboot_fixups(void);
-#else
-#define mach_reboot_fixups() ((void)(0))
-#endif
 
 #endif /* _LINUX_REBOOT_FIXUPS_H */
diff --git a/include/asm-i386/required-features.h b/include/asm-i386/required-features.h
new file mode 100644
index 000000000000..9db866c1e64c
--- /dev/null
+++ b/include/asm-i386/required-features.h
@@ -0,0 +1,34 @@
+#ifndef _ASM_REQUIRED_FEATURES_H
+#define _ASM_REQUIRED_FEATURES_H 1
+
+/* Define minimum CPUID feature set for kernel These bits are checked
+   really early to actually display a visible error message before the
+   kernel dies.  Only add word 0 bits here
+
+   Some requirements that are not in CPUID yet are also in the
+   CONFIG_X86_MINIMUM_CPU mode which is checked too.
+
+   The real information is in arch/i386/Kconfig.cpu, this just converts
+   the CONFIGs into a bitmask */
+
+#ifdef CONFIG_X86_PAE
+#define NEED_PAE        (1<<X86_FEATURE_PAE)
+#else
+#define NEED_PAE        0
+#endif
+
+#ifdef CONFIG_X86_CMOV
+#define NEED_CMOV       (1<<X86_FEATURE_CMOV)
+#else
+#define NEED_CMOV       0
+#endif
+
+#ifdef CONFIG_X86_CMPXCHG64
+#define NEED_CMPXCHG64  (1<<X86_FEATURE_CX8)
+#else
+#define NEED_CMPXCHG64  0
+#endif
+
+#define REQUIRED_MASK1  (NEED_PAE|NEED_CMOV|NEED_CMPXCHG64)
+
+#endif
diff --git a/include/asm-i386/scatterlist.h b/include/asm-i386/scatterlist.h
index 55d6c953a76e..d7e45a8f1aae 100644
--- a/include/asm-i386/scatterlist.h
+++ b/include/asm-i386/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef _I386_SCATTERLIST_H
 #define _I386_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     struct page         *page;
     unsigned int        offset;
diff --git a/include/asm-i386/segment.h b/include/asm-i386/segment.h
index 065f10bfa487..597a47c2515f 100644
--- a/include/asm-i386/segment.h
+++ b/include/asm-i386/segment.h
@@ -39,7 +39,7 @@
  *  25 - APM BIOS support 
  *
  *  26 - ESPFIX small SS
- *  27 - PDA                            [ per-cpu private data area ]
+ *  27 - per-cpu                        [ offset to per-cpu data area ]
  *  28 - unused
  *  29 - unused
  *  30 - unused
@@ -74,8 +74,12 @@
 #define GDT_ENTRY_ESPFIX_SS             (GDT_ENTRY_KERNEL_BASE + 14)
 #define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS * 8)
 
-#define GDT_ENTRY_PDA                   (GDT_ENTRY_KERNEL_BASE + 15)
-#define __KERNEL_PDA (GDT_ENTRY_PDA * 8)
+#define GDT_ENTRY_PERCPU                        (GDT_ENTRY_KERNEL_BASE + 15)
+#ifdef CONFIG_SMP
+#define __KERNEL_PERCPU (GDT_ENTRY_PERCPU * 8)
+#else
+#define __KERNEL_PERCPU 0
+#endif
 
 #define GDT_ENTRY_DOUBLEFAULT_TSS       31
 
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 6bf0033a301c..090abc1da32a 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -8,19 +8,15 @@
 #include <linux/kernel.h>
 #include <linux/threads.h>
 #include <linux/cpumask.h>
-#include <asm/pda.h>
 #endif
 
-#ifdef CONFIG_X86_LOCAL_APIC
-#ifndef __ASSEMBLY__
-#include <asm/fixmap.h>
+#if defined(CONFIG_X86_LOCAL_APIC) && !defined(__ASSEMBLY__)
 #include <asm/bitops.h>
 #include <asm/mpspec.h>
+#include <asm/apic.h>
 #ifdef CONFIG_X86_IO_APIC
 #include <asm/io_apic.h>
 #endif
-#include <asm/apic.h>
-#endif
 #endif
 
 #define BAD_APICID 0xFFu
@@ -52,6 +48,59 @@ extern void cpu_exit_clear(void);
 extern void cpu_uninit(void);
 #endif
 
+struct smp_ops
+{
+        void (*smp_prepare_boot_cpu)(void);
+        void (*smp_prepare_cpus)(unsigned max_cpus);
+        int (*cpu_up)(unsigned cpu);
+        void (*smp_cpus_done)(unsigned max_cpus);
+
+        void (*smp_send_stop)(void);
+        void (*smp_send_reschedule)(int cpu);
+        int (*smp_call_function_mask)(cpumask_t mask,
+                                      void (*func)(void *info), void *info,
+                                      int wait);
+};
+
+extern struct smp_ops smp_ops;
+
+static inline void smp_prepare_boot_cpu(void)
+{
+        smp_ops.smp_prepare_boot_cpu();
+}
+static inline void smp_prepare_cpus(unsigned int max_cpus)
+{
+        smp_ops.smp_prepare_cpus(max_cpus);
+}
+static inline int __cpu_up(unsigned int cpu)
+{
+        return smp_ops.cpu_up(cpu);
+}
+static inline void smp_cpus_done(unsigned int max_cpus)
+{
+        smp_ops.smp_cpus_done(max_cpus);
+}
+
+static inline void smp_send_stop(void)
+{
+        smp_ops.smp_send_stop();
+}
+static inline void smp_send_reschedule(int cpu)
+{
+        smp_ops.smp_send_reschedule(cpu);
+}
+static inline int smp_call_function_mask(cpumask_t mask,
+                                         void (*func) (void *info), void *info,
+                                         int wait)
+{
+        return smp_ops.smp_call_function_mask(mask, func, info, wait);
+}
+
+void native_smp_prepare_boot_cpu(void);
+void native_smp_prepare_cpus(unsigned int max_cpus);
+int native_cpu_up(unsigned int cpunum);
+void native_smp_cpus_done(unsigned int max_cpus);
+
 #ifndef CONFIG_PARAVIRT
 #define startup_ipi_hook(phys_apicid, start_eip, start_esp)             \
 do { } while (0)
@@ -62,7 +111,8 @@ do { } while (0)
  * from the initial startup. We map APIC_BASE very early in page_setup(),
  * so this is correct in the x86 case.
  */
-#define raw_smp_processor_id() (read_pda(cpu_number))
+DECLARE_PER_CPU(int, cpu_number);
+#define raw_smp_processor_id() (x86_read_percpu(cpu_number))
 
 extern cpumask_t cpu_callout_map;
 extern cpumask_t cpu_callin_map;
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index a6d20d9a1a30..c3a58c08c495 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -88,65 +88,96 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
 #define savesegment(seg, value) \
         asm volatile("mov %%" #seg ",%0":"=rm" (value))
 
+
+static inline void native_clts(void)
+{
+        asm volatile ("clts");
+}
+
+static inline unsigned long native_read_cr0(void)
+{
+        unsigned long val;
+        asm volatile("movl %%cr0,%0\n\t" :"=r" (val));
+        return val;
+}
+
+static inline void native_write_cr0(unsigned long val)
+{
+        asm volatile("movl %0,%%cr0": :"r" (val));
+}
+
+static inline unsigned long native_read_cr2(void)
+{
+        unsigned long val;
+        asm volatile("movl %%cr2,%0\n\t" :"=r" (val));
+        return val;
+}
+
+static inline void native_write_cr2(unsigned long val)
+{
+        asm volatile("movl %0,%%cr2": :"r" (val));
+}
+
+static inline unsigned long native_read_cr3(void)
+{
+        unsigned long val;
+        asm volatile("movl %%cr3,%0\n\t" :"=r" (val));
+        return val;
+}
+
+static inline void native_write_cr3(unsigned long val)
+{
+        asm volatile("movl %0,%%cr3": :"r" (val));
+}
+
+static inline unsigned long native_read_cr4(void)
+{
+        unsigned long val;
+        asm volatile("movl %%cr4,%0\n\t" :"=r" (val));
+        return val;
+}
+
+static inline unsigned long native_read_cr4_safe(void)
+{
+        unsigned long val;
+        /* This could fault if %cr4 does not exist */
+        asm("1: movl %%cr4, %0          \n"
+                "2:                             \n"
+                ".section __ex_table,\"a\"      \n"
+                ".long 1b,2b                    \n"
+                ".previous                      \n"
+                : "=r" (val): "0" (0));
+        return val;
+}
+
+static inline void native_write_cr4(unsigned long val)
+{
+        asm volatile("movl %0,%%cr4": :"r" (val));
+}
+
+static inline void native_wbinvd(void)
+{
+        asm volatile("wbinvd": : :"memory");
+}
+
+
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
-#define read_cr0() ({ \
-        unsigned int __dummy; \
-        __asm__ __volatile__( \
-                "movl %%cr0,%0\n\t" \
-                :"=r" (__dummy)); \
-        __dummy; \
-})
-#define write_cr0(x) \
-        __asm__ __volatile__("movl %0,%%cr0": :"r" (x))
-
-#define read_cr2() ({ \
-        unsigned int __dummy; \
-        __asm__ __volatile__( \
-                "movl %%cr2,%0\n\t" \
-                :"=r" (__dummy)); \
-        __dummy; \
-})
-#define write_cr2(x) \
-        __asm__ __volatile__("movl %0,%%cr2": :"r" (x))
-
-#define read_cr3() ({ \
-        unsigned int __dummy; \
-        __asm__ ( \
-                "movl %%cr3,%0\n\t" \
-                :"=r" (__dummy)); \
-        __dummy; \
-})
-#define write_cr3(x) \
-        __asm__ __volatile__("movl %0,%%cr3": :"r" (x))
-
-#define read_cr4() ({ \
-        unsigned int __dummy; \
-        __asm__( \
-                "movl %%cr4,%0\n\t" \
-                :"=r" (__dummy)); \
-        __dummy; \
-})
-#define read_cr4_safe() ({                            \
-        unsigned int __dummy;                         \
-        /* This could fault if %cr4 does not exist */ \
-        __asm__("1: movl %%cr4, %0              \n"   \
-                "2:                             \n"   \
-                ".section __ex_table,\"a\"      \n"   \
-                ".long 1b,2b                    \n"   \
-                ".previous                      \n"   \
-                : "=r" (__dummy): "0" (0));           \
-        __dummy;                                      \
-})
-#define write_cr4(x) \
-        __asm__ __volatile__("movl %0,%%cr4": :"r" (x))
-
-#define wbinvd() \
-        __asm__ __volatile__ ("wbinvd": : :"memory")
+#define read_cr0()      (native_read_cr0())
+#define write_cr0(x)    (native_write_cr0(x))
+#define read_cr2()      (native_read_cr2())
+#define write_cr2(x)    (native_write_cr2(x))
+#define read_cr3()      (native_read_cr3())
+#define write_cr3(x)    (native_write_cr3(x))
+#define read_cr4()      (native_read_cr4())
+#define read_cr4_safe() (native_read_cr4_safe())
+#define write_cr4(x)    (native_write_cr4(x))
+#define wbinvd()        (native_wbinvd())
 
 /* Clear the 'TS' bit */
-#define clts() __asm__ __volatile__ ("clts")
+#define clts()          (native_clts())
+
 #endif/* CONFIG_PARAVIRT */
 
 /* Set the 'TS' bit */
diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h
index 12dd67bf760f..153770e25faa 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-i386/timer.h
@@ -9,8 +9,6 @@ void setup_pit_timer(void);
 unsigned long long native_sched_clock(void);
 unsigned long native_calculate_cpu_khz(void);
 
-/* Modifiers for buggy PIT handling */
-extern int pit_latch_buggy;
 extern int timer_ack;
 extern int no_timer_check;
 extern int no_sync_cmos_clock;
diff --git a/include/asm-i386/tlbflush.h b/include/asm-i386/tlbflush.h
index 4dd82840d53b..db7f77eacfa0 100644
--- a/include/asm-i386/tlbflush.h
+++ b/include/asm-i386/tlbflush.h
@@ -79,11 +79,15 @@
  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
+ *  - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus
  *
  * ..but the i386 has somewhat limited tlb flushing capabilities,
  * and page-granular flushes are available only on i486 and up.
  */
 
+#define TLB_FLUSH_ALL   0xffffffff
+
+
 #ifndef CONFIG_SMP
 
 #define flush_tlb() __flush_tlb()
@@ -110,7 +114,12 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
                 __flush_tlb();
 }
 
-#else
+static inline void native_flush_tlb_others(const cpumask_t *cpumask,
+                                           struct mm_struct *mm, unsigned long va)
+{
+}
+
+#else  /* SMP */
 
 #include <asm/smp.h>
 
@@ -129,6 +138,9 @@ static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long st
         flush_tlb_mm(vma->vm_mm);
 }
 
+void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
+                             unsigned long va);
+
 #define TLBSTATE_OK     1
 #define TLBSTATE_LAZY   2
 
@@ -139,8 +151,11 @@ struct tlb_state
         char __cacheline_padding[L1_CACHE_BYTES-8];
 };
 DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
+#endif  /* SMP */
 
-
+#ifndef CONFIG_PARAVIRT
+#define flush_tlb_others(mask, mm, va)          \
+        native_flush_tlb_others(&mask, mm, va)
 #endif
 
 #define flush_tlb_kernel_range(start, end) flush_tlb_all()
diff --git a/include/asm-i386/tsc.h b/include/asm-i386/tsc.h
index 84016ff481b9..3f3c1fa000b4 100644
--- a/include/asm-i386/tsc.h
+++ b/include/asm-i386/tsc.h
@@ -35,25 +35,30 @@ static inline cycles_t get_cycles(void)
 static __always_inline cycles_t get_cycles_sync(void)
 {
         unsigned long long ret;
-#ifdef X86_FEATURE_SYNC_RDTSC
         unsigned eax;
 
         /*
+         * Use RDTSCP if possible; it is guaranteed to be synchronous
+         * and doesn't cause a VMEXIT on Hypervisors
+         */
+        alternative_io(ASM_NOP3, ".byte 0x0f,0x01,0xf9", X86_FEATURE_RDTSCP,
+                                 "=A" (ret), "0" (0ULL) : "ecx", "memory");
+        if (ret)
+                return ret;
+
+        /*
          * Don't do an additional sync on CPUs where we know
          * RDTSC is already synchronous:
          */
         alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
                           "=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
-#else
-        sync_core();
-#endif
         rdtscll(ret);
 
         return ret;
 }
 
 extern void tsc_init(void);
-extern void mark_tsc_unstable(void);
+extern void mark_tsc_unstable(char *reason);
 extern int unsynchronized_tsc(void);
 extern void init_tsc_clocksource(void);
 
diff --git a/include/asm-i386/uaccess.h b/include/asm-i386/uaccess.h
index 70829ae3ad52..e2aa5e0d0cc7 100644
--- a/include/asm-i386/uaccess.h
+++ b/include/asm-i386/uaccess.h
@@ -397,7 +397,19 @@ unsigned long __must_check __copy_from_user_ll_nocache(void *to,
 unsigned long __must_check __copy_from_user_ll_nocache_nozero(void *to,
                                 const void __user *from, unsigned long n);
 
-/*
+/**
+ * __copy_to_user_inatomic: - Copy a block of data into user space, with less checking.
+ * @to:   Destination address, in user space.
+ * @from: Source address, in kernel space.
+ * @n:    Number of bytes to copy.
+ *
+ * Context: User context only.
+ *
+ * Copy data from kernel space to user space.  Caller must check
+ * the specified block with access_ok() before calling this function.
+ * The caller should also make sure he pins the user space address
+ * so that the we don't result in page fault and sleep.
+ *
  * Here we special-case 1, 2 and 4-byte copy_*_user invocations.  On a fault
  * we return the initial request size (1, 2 or 4), as copy_*_user should do.
  * If a store crosses a page boundary and gets a fault, the x86 will not write
diff --git a/include/asm-i386/vmi_time.h b/include/asm-i386/vmi_time.h
index c3a1fcf66c96..213930b995cb 100644
--- a/include/asm-i386/vmi_time.h
+++ b/include/asm-i386/vmi_time.h
@@ -53,22 +53,8 @@ extern unsigned long long vmi_get_sched_cycles(void);
 extern unsigned long vmi_cpu_khz(void);
 
 #ifdef CONFIG_X86_LOCAL_APIC
-extern void __init vmi_timer_setup_boot_alarm(void);
-extern void __devinit vmi_timer_setup_secondary_alarm(void);
-extern void apic_vmi_timer_interrupt(void);
-#endif
-
-#ifdef CONFIG_NO_IDLE_HZ
-extern int vmi_stop_hz_timer(void);
-extern void vmi_account_time_restart_hz_timer(void);
-#else
-static inline int vmi_stop_hz_timer(void)
-{
-        return 0;
-}
-static inline void vmi_account_time_restart_hz_timer(void)
-{
-}
+extern void __devinit vmi_time_bsp_init(void);
+extern void __devinit vmi_time_ap_init(void);
 #endif
 
 /*
diff --git a/include/asm-i386/voyager.h b/include/asm-i386/voyager.h
index 5b27838905b2..91a9932937ab 100644
--- a/include/asm-i386/voyager.h
+++ b/include/asm-i386/voyager.h
@@ -487,15 +487,11 @@ extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS];
 extern struct voyager_SUS *voyager_SUS;
 
 /* variables exported always */
+extern struct task_struct *voyager_thread;
 extern int voyager_level;
-extern int kvoyagerd_running;
-extern struct semaphore kvoyagerd_sem;
 extern struct voyager_status voyager_status;
 
-
-
 /* functions exported by the voyager and voyager_smp modules */
-
 extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
 extern void voyager_cat_init(void);
 extern void voyager_detect(struct voyager_bios_info *);
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index b5c65081a3aa..cef2400983fa 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -29,6 +29,7 @@
 #include <linux/spinlock.h>
 
 #include <asm/processor.h>
+#include <asm-generic/mm_hooks.h>
 
 struct ia64_ctx {
         spinlock_t lock;
diff --git a/include/asm-ia64/scatterlist.h b/include/asm-ia64/scatterlist.h
index 9dbea8844d5e..a452ea24205a 100644
--- a/include/asm-ia64/scatterlist.h
+++ b/include/asm-ia64/scatterlist.h
@@ -6,6 +6,8 @@
  *      David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
 
+#include <asm/types.h>
+
 struct scatterlist {
         struct page *page;
         unsigned int offset;
diff --git a/include/asm-m32r/mmu_context.h b/include/asm-m32r/mmu_context.h
index 1f40d4a0acf1..91909e5dd9d0 100644
--- a/include/asm-m32r/mmu_context.h
+++ b/include/asm-m32r/mmu_context.h
@@ -15,6 +15,7 @@
 #include <asm/pgalloc.h>
 #include <asm/mmu.h>
 #include <asm/tlbflush.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * Cache of MMU context last used.
diff --git a/include/asm-m32r/scatterlist.h b/include/asm-m32r/scatterlist.h
index c2de96cb69ed..352415ff5eb9 100644
--- a/include/asm-m32r/scatterlist.h
+++ b/include/asm-m32r/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_M32R_SCATTERLIST_H
 #define _ASM_M32R_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     char *  address;    /* Location data is to be transferred to, NULL for
                          * highmem page */
diff --git a/include/asm-m68k/adb.h b/include/asm-m68k/adb.h
deleted file mode 100644
index 9176b55185bb..000000000000
--- a/include/asm-m68k/adb.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Definitions for talking to ADB and CUDA.  The CUDA is a microcontroller
- * which controls the ADB, system power, RTC, and various other things on
- * later Macintoshes
- *
- * Copyright (C) 1996 Paul Mackerras.
- */
-
-/* First byte sent to or received from CUDA */
-#define ADB_PACKET      0
-#define CUDA_PACKET     1
-#define ERROR_PACKET    2
-#define TIMER_PACKET    3
-#define POWER_PACKET    4
-#define MACIIC_PACKET   5
-
-/* ADB commands (2nd byte) */
-#define ADB_BUSRESET            0
-#define ADB_FLUSH(id)           (1 + ((id) << 4))
-#define ADB_WRITEREG(id, reg)   (8 + (reg) + ((id) << 4))
-#define ADB_READREG(id, reg)    (0xc + (reg) + ((id) << 4))
-
-/* ADB default device IDs (upper 4 bits of 2nd byte) */
-#define ADB_DONGLE      1       /* "software execution control" devices */
-#define ADB_KEYBOARD    2
-#define ADB_MOUSE       3
-#define ADB_TABLET      4
-#define ADB_MODEM       5
-#define ADB_MISC        7       /* maybe a monitor */
-
-/* CUDA commands (2nd byte) */
-#define CUDA_WARM_START         0
-#define CUDA_AUTOPOLL           1
-#define CUDA_GET_6805_ADDR      2
-#define CUDA_GET_TIME           3
-#define CUDA_GET_PRAM           7
-#define CUDA_SET_6805_ADDR      8
-#define CUDA_SET_TIME           9
-#define CUDA_POWERDOWN          0xa
-#define CUDA_POWERUP_TIME       0xb
-#define CUDA_SET_PRAM           0xc
-#define CUDA_MS_RESET           0xd
-#define CUDA_SEND_DFAC          0xe
-#define CUDA_RESET_SYSTEM       0x11
-#define CUDA_SET_IPL            0x12
-#define CUDA_SET_AUTO_RATE      0x14
-#define CUDA_GET_AUTO_RATE      0x16
-#define CUDA_SET_DEVICE_LIST    0x19
-#define CUDA_GET_DEVICE_LIST    0x1a
-#define CUDA_GET_SET_IIC        0x22
-
-#ifdef __KERNEL__
-
-struct adb_request {
-    unsigned char data[16];
-    int nbytes;
-    unsigned char reply[16];
-    int reply_len;
-    unsigned char reply_expected;
-    unsigned char sent;
-    unsigned char got_reply;
-    void (*done)(struct adb_request *);
-    void *arg;
-    struct adb_request *next;
-};
-
-void via_adb_init(void);
-int adb_request(struct adb_request *req,
-                 void (*done)(struct adb_request *), int nbytes, ...);
-int adb_send_request(struct adb_request *req);
-void adb_poll(void);
-int adb_register(int default_id,
-                 void (*handler)(unsigned char *, int, struct pt_regs *));
-
-#endif  /* __KERNEL */
diff --git a/include/asm-m68k/atarikb.h b/include/asm-m68k/atarikb.h
index 18926058fde7..546e7da5804f 100644
--- a/include/asm-m68k/atarikb.h
+++ b/include/asm-m68k/atarikb.h
@@ -36,5 +36,11 @@ void ikbd_joystick_disable(void);
 extern void (*atari_MIDI_interrupt_hook) (void);
 /* Hook for mouse driver */
 extern void (*atari_mouse_interrupt_hook) (char *);
+/* Hook for keyboard inputdev  driver */
+extern void (*atari_input_keyboard_interrupt_hook) (unsigned char, char);
+/* Hook for mouse inputdev  driver */
+extern void (*atari_input_mouse_interrupt_hook) (char *);
+
+int atari_keyb_init(void);
 
 #endif /* _LINUX_ATARIKB_H */
diff --git a/include/asm-m68k/mmu_context.h b/include/asm-m68k/mmu_context.h
index 231d11bd8e32..894dacbcee14 100644
--- a/include/asm-m68k/mmu_context.h
+++ b/include/asm-m68k/mmu_context.h
@@ -1,6 +1,7 @@
 #ifndef __M68K_MMU_CONTEXT_H
 #define __M68K_MMU_CONTEXT_H
 
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h
index 6c077d3a2572..9ccee4278c97 100644
--- a/include/asm-m68knommu/mmu_context.h
+++ b/include/asm-m68knommu/mmu_context.h
@@ -4,6 +4,7 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-m68knommu/scatterlist.h b/include/asm-m68knommu/scatterlist.h
index 2085d6ff8782..4da79d3d3f34 100644
--- a/include/asm-m68knommu/scatterlist.h
+++ b/include/asm-m68knommu/scatterlist.h
@@ -2,6 +2,7 @@
 #define _M68KNOMMU_SCATTERLIST_H
 
 #include <linux/mm.h>
+#include <asm/types.h>
 
 struct scatterlist {
         struct page     *page;
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index fe065d6070ca..65024ffd7879 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -20,6 +20,7 @@
 #include <asm/mipsmtregs.h>
 #include <asm/smtc.h>
 #endif /* SMTC */
+#include <asm-generic/mm_hooks.h>
 
 /*
  * For the fast tlb miss handlers, we keep a per cpu array of pointers
diff --git a/include/asm-mips/scatterlist.h b/include/asm-mips/scatterlist.h
index 22634706e9d5..7af104c95b20 100644
--- a/include/asm-mips/scatterlist.h
+++ b/include/asm-mips/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_SCATTERLIST_H
 #define __ASM_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
         struct page *   page;
         unsigned int    offset;
diff --git a/include/asm-parisc/mmu_context.h b/include/asm-parisc/mmu_context.h
index 9c05836239a2..bad690298f0c 100644
--- a/include/asm-parisc/mmu_context.h
+++ b/include/asm-parisc/mmu_context.h
@@ -5,6 +5,7 @@
 #include <asm/atomic.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-parisc/scatterlist.h b/include/asm-parisc/scatterlist.h
index 236c1d0fba33..e7211c748446 100644
--- a/include/asm-parisc/scatterlist.h
+++ b/include/asm-parisc/scatterlist.h
@@ -2,6 +2,7 @@
 #define _ASM_PARISC_SCATTERLIST_H
 
 #include <asm/page.h>
+#include <asm/types.h>
 
 struct scatterlist {
         struct page *page;
diff --git a/include/asm-powerpc/mmu_context.h b/include/asm-powerpc/mmu_context.h
index 083ac917bd29..c0d7795e3d25 100644
--- a/include/asm-powerpc/mmu_context.h
+++ b/include/asm-powerpc/mmu_context.h
@@ -10,6 +10,7 @@
 #include <linux/mm.h>   
 #include <asm/mmu.h>    
 #include <asm/cputable.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * Copyright (C) 2001 PPC 64 Team, IBM Corp
diff --git a/include/asm-powerpc/ps3av.h b/include/asm-powerpc/ps3av.h
index 43e90ea96136..9efc40f1c778 100644
--- a/include/asm-powerpc/ps3av.h
+++ b/include/asm-powerpc/ps3av.h
@@ -18,8 +18,6 @@
 #ifndef _ASM_POWERPC_PS3AV_H_
 #define _ASM_POWERPC_PS3AV_H_
 
-#include <linux/mutex.h>
-
 /** command for ioctl() **/
 #define PS3AV_VERSION 0x205     /* version of ps3av command */
 
@@ -643,24 +641,6 @@ struct ps3av_pkt_avb_param {
         u8 buf[PS3AV_PKT_AVB_PARAM_MAX_BUF_SIZE];
 };
 
-struct ps3av {
-        int available;
-        struct semaphore sem;
-        struct semaphore ping;
-        struct semaphore pong;
-        struct mutex mutex;
-        int open_count;
-        struct ps3_vuart_port_device *dev;
-
-        int region;
-        struct ps3av_pkt_av_get_hw_conf av_hw_conf;
-        u32 av_port[PS3AV_AV_PORT_MAX + PS3AV_OPT_PORT_MAX];
-        u32 opt_port[PS3AV_OPT_PORT_MAX];
-        u32 head[PS3AV_HEAD_MAX];
-        u32 audio_port;
-        int ps3av_mode;
-        int ps3av_mode_old;
-};
 
 /** command status **/
 #define PS3AV_STATUS_SUCCESS                    0x0000  /* success */
@@ -718,6 +698,7 @@ static inline void ps3av_cmd_av_monitor_info_dump(const struct ps3av_pkt_av_get_
 extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *,
                                             u32);
 
+struct ps3_vuart_port_device;
 extern int ps3av_vuart_write(struct ps3_vuart_port_device *dev,
                              const void *buf, unsigned long size);
 extern int ps3av_vuart_read(struct ps3_vuart_port_device *dev, void *buf,
@@ -725,6 +706,7 @@ extern int ps3av_vuart_read(struct ps3_vuart_port_device *dev, void *buf,
 
 extern int ps3av_set_video_mode(u32, int);
 extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32);
+extern int ps3av_get_auto_mode(int);
 extern int ps3av_set_mode(u32, int);
 extern int ps3av_get_mode(void);
 extern int ps3av_get_scanmode(int);
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
index 2bc8589cc451..a6441a063e5d 100644
--- a/include/asm-ppc/mmu_context.h
+++ b/include/asm-ppc/mmu_context.h
@@ -6,6 +6,7 @@
 #include <asm/bitops.h>
 #include <asm/mmu.h>
 #include <asm/cputable.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
diff --git a/include/asm-s390/ccwdev.h b/include/asm-s390/ccwdev.h
index cfc81533b9ba..6795ecefd15b 100644
--- a/include/asm-s390/ccwdev.h
+++ b/include/asm-s390/ccwdev.h
@@ -164,9 +164,9 @@ extern int ccw_device_resume(struct ccw_device *);
 extern int ccw_device_halt(struct ccw_device *, unsigned long);
 extern int ccw_device_clear(struct ccw_device *, unsigned long);
 
-extern int read_dev_chars(struct ccw_device *cdev, void **buffer, int length);
-extern int read_conf_data(struct ccw_device *cdev, void **buffer, int *length);
-extern int read_conf_data_lpm(struct ccw_device *cdev, void **buffer,
+extern int __deprecated read_dev_chars(struct ccw_device *cdev, void **buffer, int length);
+extern int __deprecated read_conf_data(struct ccw_device *cdev, void **buffer, int *length);
+extern int __deprecated read_conf_data_lpm(struct ccw_device *cdev, void **buffer,
                               int *length, __u8 lpm);
 
 extern int ccw_device_set_online(struct ccw_device *cdev);
diff --git a/include/asm-s390/elf.h b/include/asm-s390/elf.h
index c0d629d61d3e..91d06325cc79 100644
--- a/include/asm-s390/elf.h
+++ b/include/asm-s390/elf.h
@@ -188,7 +188,8 @@ static inline int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
 /* This yields a mask that user programs can use to figure out what
    instruction set this CPU supports. */
 
-#define ELF_HWCAP (0)
+extern unsigned long elf_hwcap;
+#define ELF_HWCAP (elf_hwcap)
 
 /* This yields a string that ld.so will use to load implementation
    specific libraries for optimization.  This is more specific in
@@ -197,7 +198,9 @@ static inline int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
    For the moment, we have only optimizations for the Intel generations,
    but that could change... */
 
-#define ELF_PLATFORM (NULL)
+#define ELF_PLATFORM_SIZE 8
+extern char elf_platform[];
+#define ELF_PLATFORM (elf_platform)
 
 #ifndef __s390x__
 #define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
diff --git a/include/asm-s390/kdebug.h b/include/asm-s390/kdebug.h
index 1b50f89819a4..d2d7ad276148 100644
--- a/include/asm-s390/kdebug.h
+++ b/include/asm-s390/kdebug.h
@@ -22,8 +22,21 @@ struct die_args {
  */
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
-extern int register_page_fault_notifier(struct notifier_block *);
-extern int unregister_page_fault_notifier(struct notifier_block *);
+
+/*
+ * These are only here because kprobes.c wants them to implement a
+ * blatant layering violation. Will hopefully go away soon once all
+ * architectures are updated.
+ */
+static inline int register_page_fault_notifier(struct notifier_block *nb)
+{
+        return 0;
+}
+static inline int unregister_page_fault_notifier(struct notifier_block *nb)
+{
+        return 0;
+}
+
 extern struct atomic_notifier_head s390die_chain;
 
 enum die_val {
@@ -39,7 +52,6 @@ enum die_val {
         DIE_GPF,
         DIE_CALL,
         DIE_NMI_IPI,
-        DIE_PAGE_FAULT,
 };
 
 static inline int notify_die(enum die_val val, const char *str,
diff --git a/include/asm-s390/kprobes.h b/include/asm-s390/kprobes.h
index b847ff0ec3fa..830fe4c4eea6 100644
--- a/include/asm-s390/kprobes.h
+++ b/include/asm-s390/kprobes.h
@@ -97,18 +97,10 @@ void kretprobe_trampoline(void);
 int  is_prohibited_opcode(kprobe_opcode_t *instruction);
 void get_instruction_type(struct arch_specific_insn *ainsn);
 
+int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
+int kprobe_exceptions_notify(struct notifier_block *self,
+        unsigned long val, void *data);
+
 #define flush_insn_slot(p)      do { } while (0)
 
 #endif  /* _ASM_S390_KPROBES_H */
-
-#ifdef CONFIG_KPROBES
-
-extern int kprobe_exceptions_notify(struct notifier_block *self,
-                                        unsigned long val, void *data);
-#else   /* !CONFIG_KPROBES */
-static inline int kprobe_exceptions_notify(struct notifier_block *self,
-                                                unsigned long val, void *data)
-{
-        return 0;
-}
-#endif
diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h
index ffc9788a21a7..801a6fd35b5b 100644
--- a/include/asm-s390/lowcore.h
+++ b/include/asm-s390/lowcore.h
@@ -229,17 +229,19 @@ struct _lowcore
         __u16        subchannel_nr;            /* 0x0ba */
         __u32        io_int_parm;              /* 0x0bc */
         __u32        io_int_word;              /* 0x0c0 */
-        __u8         pad3[0xD4-0xC4];          /* 0x0c4 */
+        __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
+        __u32        stfl_fac_list;            /* 0x0c8 */
+        __u8         pad4[0xd4-0xcc];          /* 0x0cc */
         __u32        extended_save_area_addr;  /* 0x0d4 */
         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
         __u32        clock_comp_save_area[2];  /* 0x0e0 */
         __u32        mcck_interruption_code[2]; /* 0x0e8 */
-        __u8         pad4[0xf4-0xf0];          /* 0x0f0 */
+        __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
         __u32        external_damage_code;     /* 0x0f4 */
         __u32        failing_storage_address;  /* 0x0f8 */
-        __u8         pad5[0x100-0xfc];         /* 0x0fc */
+        __u8         pad6[0x100-0xfc];         /* 0x0fc */
         __u32        st_status_fixed_logout[4];/* 0x100 */
-        __u8         pad6[0x120-0x110];        /* 0x110 */
+        __u8         pad7[0x120-0x110];        /* 0x110 */
         __u32        access_regs_save_area[16];/* 0x120 */
         __u32        floating_pt_save_area[8]; /* 0x160 */
         __u32        gpregs_save_area[16];     /* 0x180 */
diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h
index 1d21da220d49..501cb9b06314 100644
--- a/include/asm-s390/mmu_context.h
+++ b/include/asm-s390/mmu_context.h
@@ -10,6 +10,8 @@
 #define __S390_MMU_CONTEXT_H
 
 #include <asm/pgalloc.h>
+#include <asm-generic/mm_hooks.h>
+
 /*
  * get a new mmu context.. S390 don't know about contexts.
  */
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index 342024425b7d..01acaaae9751 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -12,6 +12,7 @@
 #include <asm/tlbflush.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * The MMU "context" consists of two things:
diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h
index d19e7cd3b023..b9ae53c38365 100644
--- a/include/asm-sh/scatterlist.h
+++ b/include/asm-sh/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_SH_SCATTERLIST_H
 #define __ASM_SH_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     struct page * page; /* Location for highmem page, if any */
     unsigned int offset;/* for highmem, page offset */
diff --git a/include/asm-sh64/mmu_context.h b/include/asm-sh64/mmu_context.h
index 8c860dab2d0e..507bf72bb8e1 100644
--- a/include/asm-sh64/mmu_context.h
+++ b/include/asm-sh64/mmu_context.h
@@ -27,7 +27,7 @@
 extern unsigned long mmu_context_cache;
 
 #include <asm/page.h>
-
+#include <asm-generic/mm_hooks.h>
 
 /* Current mm's pgd */
 extern pgd_t *mmu_pdtp_cache;
diff --git a/include/asm-sh64/scatterlist.h b/include/asm-sh64/scatterlist.h
index 5d8fa32d2e9d..1c723f2d7a95 100644
--- a/include/asm-sh64/scatterlist.h
+++ b/include/asm-sh64/scatterlist.h
@@ -11,6 +11,8 @@
 #ifndef __ASM_SH64_SCATTERLIST_H
 #define __ASM_SH64_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     struct page * page; /* Location for highmem page, if any */
     unsigned int offset;/* for highmem, page offset */
diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h
index ed1e01d04d21..671a997b9e69 100644
--- a/include/asm-sparc/mmu_context.h
+++ b/include/asm-sparc/mmu_context.h
@@ -5,6 +5,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <asm-generic/mm_hooks.h>
+
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
 }
diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h
index 2337eb487719..8d129032013e 100644
--- a/include/asm-sparc64/mmu_context.h
+++ b/include/asm-sparc64/mmu_context.h
@@ -9,6 +9,7 @@
 #include <linux/spinlock.h>
 #include <asm/system.h>
 #include <asm/spitfire.h>
+#include <asm-generic/mm_hooks.h>
 
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h
index 0d3df76aa47f..ced8cbde046d 100644
--- a/include/asm-sparc64/percpu.h
+++ b/include/asm-sparc64/percpu.h
@@ -5,16 +5,6 @@
 
 #ifdef CONFIG_SMP
 
-#ifdef CONFIG_MODULES
-# define PERCPU_MODULE_RESERVE 8192
-#else
-# define PERCPU_MODULE_RESERVE 0
-#endif
-
-#define PERCPU_ENOUGH_ROOM \
-        (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
-         PERCPU_MODULE_RESERVE)
-
 extern void setup_per_cpu_areas(void);
 
 extern unsigned long __per_cpu_base;
diff --git a/include/asm-sparc64/scatterlist.h b/include/asm-sparc64/scatterlist.h
index ec4f3c63fe98..048fdb40e81d 100644
--- a/include/asm-sparc64/scatterlist.h
+++ b/include/asm-sparc64/scatterlist.h
@@ -3,6 +3,7 @@
 #define _SPARC64_SCATTERLIST_H
 
 #include <asm/page.h>
+#include <asm/types.h>
 
 struct scatterlist {
         struct page     *page;
diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h
index f709c784bf12..9aa4b44e8cc1 100644
--- a/include/asm-um/mmu_context.h
+++ b/include/asm-um/mmu_context.h
@@ -6,6 +6,8 @@
 #ifndef __UM_MMU_CONTEXT_H
 #define __UM_MMU_CONTEXT_H
 
+#include <asm-generic/mm_hooks.h>
+
 #include "linux/sched.h"
 #include "choose-mode.h"
 #include "um_mmu.h"
diff --git a/include/asm-v850/mmu_context.h b/include/asm-v850/mmu_context.h
index f521c8050d3c..01daacd5474e 100644
--- a/include/asm-v850/mmu_context.h
+++ b/include/asm-v850/mmu_context.h
@@ -1,6 +1,8 @@
 #ifndef __V850_MMU_CONTEXT_H__
 #define __V850_MMU_CONTEXT_H__
 
+#include <asm-generic/mm_hooks.h>
+
 #define destroy_context(mm)             ((void)0)
 #define init_new_context(tsk,mm)        0
 #define switch_mm(prev,next,tsk)        ((void)0)
diff --git a/include/asm-v850/scatterlist.h b/include/asm-v850/scatterlist.h
index af1cba69a526..56f402920db9 100644
--- a/include/asm-v850/scatterlist.h
+++ b/include/asm-v850/scatterlist.h
@@ -14,6 +14,8 @@
 #ifndef __V850_SCATTERLIST_H__
 #define __V850_SCATTERLIST_H__
 
+#include <asm/types.h>
+
 struct scatterlist {
         struct page     *page;
         unsigned        offset;
diff --git a/include/asm-x86_64/Kbuild b/include/asm-x86_64/Kbuild
index ebd7117782a6..89ad1fc27c8b 100644
--- a/include/asm-x86_64/Kbuild
+++ b/include/asm-x86_64/Kbuild
@@ -8,7 +8,7 @@ header-y += boot.h
 header-y += bootsetup.h
 header-y += debugreg.h
 header-y += ldt.h
-header-y += msr.h
+header-y += msr-index.h
 header-y += prctl.h
 header-y += ptrace-abi.h
 header-y += sigcontext32.h
@@ -16,5 +16,7 @@ header-y += ucontext.h
 header-y += vsyscall32.h
 
 unifdef-y += mce.h
+unifdef-y += msr.h
 unifdef-y += mtrr.h
 unifdef-y += vsyscall.h
+unifdef-y += const.h
diff --git a/include/asm-x86_64/agp.h b/include/asm-x86_64/agp.h
index 06c52ee9c06b..de338666f3f9 100644
--- a/include/asm-x86_64/agp.h
+++ b/include/asm-x86_64/agp.h
@@ -10,8 +10,10 @@
  * with different cachability attributes for the same page.
  */
 
-int map_page_into_agp(struct page *page);
-int unmap_page_from_agp(struct page *page);
+/* Caller's responsibility to call global_flush_tlb() for
+ * performance reasons */
+#define map_page_into_agp(page) change_page_attr(page, 1, PAGE_KERNEL_NOCACHE)
+#define unmap_page_from_agp(page) change_page_attr(page, 1, PAGE_KERNEL)
 #define flush_agp_mappings() global_flush_tlb()
 
 /* Could use CLFLUSH here if the cpu supports it. But then it would
diff --git a/include/asm-x86_64/alternative.h b/include/asm-x86_64/alternative.h
index a6657b4f3e0e..a09fe85c268e 100644
--- a/include/asm-x86_64/alternative.h
+++ b/include/asm-x86_64/alternative.h
@@ -16,6 +16,7 @@ struct alt_instr {
         u8  pad[5];
 };
 
+extern void alternative_instructions(void);
 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
 
 struct module;
@@ -141,8 +142,8 @@ void apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end);
 static inline void
 apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end)
 {}
-#define __start_parainstructions NULL
-#define __stop_parainstructions NULL
+#define __parainstructions NULL
+#define __parainstructions_end NULL
 #endif
 
 #endif /* _X86_64_ALTERNATIVE_H */
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
index 7cfb39cbd918..45e9fca1febc 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86_64/apic.h
@@ -2,6 +2,7 @@
 #define __ASM_APIC_H
 
 #include <linux/pm.h>
+#include <linux/delay.h>
 #include <asm/fixmap.h>
 #include <asm/apicdef.h>
 #include <asm/system.h>
@@ -47,11 +48,8 @@ static __inline unsigned int apic_read(unsigned long reg)
         return *((volatile unsigned int *)(APIC_BASE+reg));
 }
 
-static __inline__ void apic_wait_icr_idle(void)
-{
-        while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
-                cpu_relax();
-}
+extern void apic_wait_icr_idle(void);
+extern unsigned int safe_apic_wait_icr_idle(void);
 
 static inline void ack_APIC_irq(void)
 {
@@ -83,7 +81,7 @@ extern void setup_secondary_APIC_clock (void);
 extern int APIC_init_uniprocessor (void);
 extern void disable_APIC_timer(void);
 extern void enable_APIC_timer(void);
-extern void clustered_apic_check(void);
+extern void setup_apic_routing(void);
 
 extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
                                    unsigned char msg_type, unsigned char mask);
diff --git a/include/asm-x86_64/bugs.h b/include/asm-x86_64/bugs.h
index d86c5dd689fa..b33dc04d8f42 100644
--- a/include/asm-x86_64/bugs.h
+++ b/include/asm-x86_64/bugs.h
@@ -1,28 +1,6 @@
-/*
- *  include/asm-x86_64/bugs.h
- *
- *  Copyright (C) 1994  Linus Torvalds
- *  Copyright (C) 2000  SuSE
- *
- * This is included by init/main.c to check for architecture-dependent bugs.
- *
- * Needs:
- *      void check_bugs(void);
- */
+#ifndef _ASM_X86_64_BUGS_H
+#define _ASM_X86_64_BUGS_H
 
-#include <asm/processor.h>
-#include <asm/i387.h>
-#include <asm/msr.h>
-#include <asm/pda.h>
+void check_bugs(void);
 
-extern void alternative_instructions(void);
-
-static void __init check_bugs(void)
-{
-        identify_cpu(&boot_cpu_data);
-#if !defined(CONFIG_SMP)
-        printk("CPU: ");
-        print_cpu_info(&boot_cpu_data);
-#endif
-        alternative_instructions(); 
-}
+#endif  /* _ASM_X86_64_BUGS_H */
diff --git a/include/asm-x86_64/const.h b/include/asm-x86_64/const.h
new file mode 100644
index 000000000000..54fb08f3db9b
--- /dev/null
+++ b/include/asm-x86_64/const.h
@@ -0,0 +1,20 @@
+/* const.h: Macros for dealing with constants.  */
+
+#ifndef _X86_64_CONST_H
+#define _X86_64_CONST_H
+
+/* Some constant macros are used in both assembler and
+ * C code.  Therefore we cannot annotate them always with
+ * 'UL' and other type specificers unilaterally.  We
+ * use the following macros to deal with this.
+ */
+
+#ifdef __ASSEMBLY__
+#define _AC(X,Y)        X
+#else
+#define __AC(X,Y)       (X##Y)
+#define _AC(X,Y)        __AC(X,Y)
+#endif
+
+
+#endif /* !(_X86_64_CONST_H) */
diff --git a/include/asm-x86_64/desc.h b/include/asm-x86_64/desc.h
index 913d6ac00033..ac991b5ca0fd 100644
--- a/include/asm-x86_64/desc.h
+++ b/include/asm-x86_64/desc.h
@@ -107,16 +107,6 @@ static inline void set_ldt_desc(unsigned cpu, void *addr, int size)
                               DESC_LDT, size * 8 - 1);
 }
 
-static inline void set_seg_base(unsigned cpu, int entry, void *base)
-{ 
-        struct desc_struct *d = &cpu_gdt(cpu)[entry];
-        u32 addr = (u32)(u64)base;
-        BUG_ON((u64)base >> 32); 
-        d->base0 = addr & 0xffff;
-        d->base1 = (addr >> 16) & 0xff;
-        d->base2 = (addr >> 24) & 0xff;
-} 
-
 #define LDT_entry_a(info) \
         ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
 /* Don't allow setting of the lm bit. It is useless anyways because 
@@ -145,16 +135,13 @@ static inline void set_seg_base(unsigned cpu, int entry, void *base)
         (info)->useable         == 0    && \
         (info)->lm              == 0)
 
-#if TLS_SIZE != 24
-# error update this code.
-#endif
-
 static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
 {
+        unsigned int i;
         u64 *gdt = (u64 *)(cpu_gdt(cpu) + GDT_ENTRY_TLS_MIN);
-        gdt[0] = t->tls_array[0];
-        gdt[1] = t->tls_array[1];
-        gdt[2] = t->tls_array[2];
+
+        for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
+                gdt[i] = t->tls_array[i];
 } 
 
 /*
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h
index d2af227f06d0..6897e2a436e5 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86_64/dma-mapping.h
@@ -52,7 +52,7 @@ struct dma_mapping_ops {
 };
 
 extern dma_addr_t bad_dma_address;
-extern struct dma_mapping_ops* dma_ops;
+extern const struct dma_mapping_ops* dma_ops;
 extern int iommu_merge;
 
 static inline int dma_mapping_error(dma_addr_t dma_addr)
diff --git a/include/asm-x86_64/fixmap.h b/include/asm-x86_64/fixmap.h
index 1b620db5b9e3..e90e1677531b 100644
--- a/include/asm-x86_64/fixmap.h
+++ b/include/asm-x86_64/fixmap.h
@@ -15,7 +15,6 @@
 #include <asm/apicdef.h>
 #include <asm/page.h>
 #include <asm/vsyscall.h>
-#include <asm/vsyscall32.h>
 
 /*
  * Here we define all the compile-time 'special' virtual
diff --git a/include/asm-x86_64/genapic.h b/include/asm-x86_64/genapic.h
index b80f4bb5f273..d7e516ccbaa4 100644
--- a/include/asm-x86_64/genapic.h
+++ b/include/asm-x86_64/genapic.h
@@ -29,7 +29,9 @@ struct genapic {
         unsigned int (*phys_pkg_id)(int index_msb);
 };
 
+extern struct genapic *genapic;
 
-extern struct genapic *genapic, *genapic_force, apic_flat;
+extern struct genapic apic_flat;
+extern struct genapic apic_physflat;
 
 #endif
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h
index 2a5c162b7d92..a7c75ea408a8 100644
--- a/include/asm-x86_64/ipi.h
+++ b/include/asm-x86_64/ipi.h
@@ -18,10 +18,8 @@
  * Subject to the GNU Public License, v.2
  */
 
-#include <asm/fixmap.h>
 #include <asm/hw_irq.h>
-#include <asm/apicdef.h>
-#include <asm/genapic.h>
+#include <asm/apic.h>
 
 /*
  * the following functions deal with sending IPIs between CPUs.
@@ -76,10 +74,42 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign
         apic_write(APIC_ICR, cfg);
 }
 
+/*
+ * This is used to send an IPI with no shorthand notation (the destination is
+ * specified in bits 56 to 63 of the ICR).
+ */
+static inline void __send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
+{
+        unsigned long cfg;
+
+        /*
+         * Wait for idle.
+         */
+        if (unlikely(vector == NMI_VECTOR))
+                safe_apic_wait_icr_idle();
+        else
+                apic_wait_icr_idle();
+
+        /*
+         * prepare target chip field
+         */
+        cfg = __prepare_ICR2(mask);
+        apic_write(APIC_ICR2, cfg);
+
+        /*
+         * program the ICR
+         */
+        cfg = __prepare_ICR(0, vector, dest);
+
+        /*
+         * Send the IPI. The write to APIC_ICR fires this off.
+         */
+        apic_write(APIC_ICR, cfg);
+}
 
 static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
 {
-        unsigned long cfg, flags;
+        unsigned long flags;
         unsigned long query_cpu;
 
         /*
@@ -88,28 +118,9 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
          * - mbligh
          */
         local_irq_save(flags);
-
         for_each_cpu_mask(query_cpu, mask) {
-                /*
-                 * Wait for idle.
-                 */
-                apic_wait_icr_idle();
-
-                /*
-                 * prepare target chip field
-                 */
-                cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
-                apic_write(APIC_ICR2, cfg);
-
-                /*
-                 * program the ICR
-                 */
-                cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);
-
-                /*
-                 * Send the IPI. The write to APIC_ICR fires this off.
-                 */
-                apic_write(APIC_ICR, cfg);
+                __send_IPI_dest_field(x86_cpu_to_apicid[query_cpu],
+                                      vector, APIC_DEST_PHYSICAL);
         }
         local_irq_restore(flags);
 }
diff --git a/include/asm-x86_64/irqflags.h b/include/asm-x86_64/irqflags.h
index cce6937e87c0..86e70fe23659 100644
--- a/include/asm-x86_64/irqflags.h
+++ b/include/asm-x86_64/irqflags.h
@@ -9,6 +9,7 @@
  */
 #ifndef _ASM_IRQFLAGS_H
 #define _ASM_IRQFLAGS_H
+#include <asm/processor-flags.h>
 
 #ifndef __ASSEMBLY__
 /*
@@ -53,19 +54,19 @@ static inline void raw_local_irq_disable(void)
 {
         unsigned long flags = __raw_local_save_flags();
 
-        raw_local_irq_restore((flags & ~(1 << 9)) | (1 << 18));
+        raw_local_irq_restore((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
 }
 
 static inline void raw_local_irq_enable(void)
 {
         unsigned long flags = __raw_local_save_flags();
 
-        raw_local_irq_restore((flags | (1 << 9)) & ~(1 << 18));
+        raw_local_irq_restore((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
 }
 
 static inline int raw_irqs_disabled_flags(unsigned long flags)
 {
-        return !(flags & (1<<9)) || (flags & (1 << 18));
+        return !(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC);
 }
 
 #else /* CONFIG_X86_VSMP */
@@ -82,7 +83,7 @@ static inline void raw_local_irq_enable(void)
 
 static inline int raw_irqs_disabled_flags(unsigned long flags)
 {
-        return !(flags & (1 << 9));
+        return !(flags & X86_EFLAGS_IF);
 }
 
 #endif
diff --git a/include/asm-x86_64/mmu_context.h b/include/asm-x86_64/mmu_context.h
index af03b9f852d6..0cce83a78378 100644
--- a/include/asm-x86_64/mmu_context.h
+++ b/include/asm-x86_64/mmu_context.h
@@ -7,6 +7,7 @@
 #include <asm/pda.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm-generic/mm_hooks.h>
 
 /*
  * possibly do the LDT unload here?
diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86_64/mmzone.h
index fb558fb1d211..19a89377b123 100644
--- a/include/asm-x86_64/mmzone.h
+++ b/include/asm-x86_64/mmzone.h
@@ -49,7 +49,7 @@ extern int pfn_valid(unsigned long pfn);
 
 #ifdef CONFIG_NUMA_EMU
 #define FAKE_NODE_MIN_SIZE      (64*1024*1024)
-#define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1ul))
+#define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1uL))
 #endif
 
 #endif
diff --git a/include/asm-x86_64/msr-index.h b/include/asm-x86_64/msr-index.h
new file mode 100644
index 000000000000..d77a63f1ddf2
--- /dev/null
+++ b/include/asm-x86_64/msr-index.h
@@ -0,0 +1 @@
+#include <asm-i386/msr-index.h>
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index 902f9a58617e..a524f0325673 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -1,6 +1,8 @@
 #ifndef X86_64_MSR_H
 #define X86_64_MSR_H 1
 
+#include <asm/msr-index.h>
+
 #ifndef __ASSEMBLY__
 /*
  * Access to machine-specific registers (available on 586 and better only)
@@ -157,9 +159,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
         return edx;
 }
 
-#define MSR_IA32_UCODE_WRITE            0x79
-#define MSR_IA32_UCODE_REV              0x8b
-
 #ifdef CONFIG_SMP
 void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
@@ -172,269 +171,6 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
 {
         wrmsr(msr_no, l, h);
 }
-#endif  /*  CONFIG_SMP  */
-
-#endif
-
-/* AMD/K8 specific MSRs */ 
-#define MSR_EFER 0xc0000080             /* extended feature register */
-#define MSR_STAR 0xc0000081             /* legacy mode SYSCALL target */
-#define MSR_LSTAR 0xc0000082            /* long mode SYSCALL target */
-#define MSR_CSTAR 0xc0000083            /* compatibility mode SYSCALL target */
-#define MSR_SYSCALL_MASK 0xc0000084     /* EFLAGS mask for syscall */
-#define MSR_FS_BASE 0xc0000100          /* 64bit FS base */
-#define MSR_GS_BASE 0xc0000101          /* 64bit GS base */
-#define MSR_KERNEL_GS_BASE  0xc0000102  /* SwapGS GS shadow (or USER_GS from kernel) */ 
-/* EFER bits: */ 
-#define _EFER_SCE 0  /* SYSCALL/SYSRET */
-#define _EFER_LME 8  /* Long mode enable */
-#define _EFER_LMA 10 /* Long mode active (read-only) */
-#define _EFER_NX 11  /* No execute enable */
-
-#define EFER_SCE (1<<_EFER_SCE)
-#define EFER_LME (1<<_EFER_LME)
-#define EFER_LMA (1<<_EFER_LMA)
-#define EFER_NX (1<<_EFER_NX)
-
-/* Intel MSRs. Some also available on other CPUs */
-#define MSR_IA32_TSC            0x10
-#define MSR_IA32_PLATFORM_ID    0x17
-
-#define MSR_IA32_PERFCTR0      0xc1
-#define MSR_IA32_PERFCTR1      0xc2
-#define MSR_FSB_FREQ            0xcd
-
-#define MSR_MTRRcap             0x0fe
-#define MSR_IA32_BBL_CR_CTL        0x119
-
-#define MSR_IA32_SYSENTER_CS    0x174
-#define MSR_IA32_SYSENTER_ESP   0x175
-#define MSR_IA32_SYSENTER_EIP   0x176
-
-#define MSR_IA32_MCG_CAP       0x179
-#define MSR_IA32_MCG_STATUS        0x17a
-#define MSR_IA32_MCG_CTL       0x17b
-
-#define MSR_IA32_EVNTSEL0      0x186
-#define MSR_IA32_EVNTSEL1      0x187
-
-#define MSR_IA32_DEBUGCTLMSR       0x1d9
-#define MSR_IA32_LASTBRANCHFROMIP  0x1db
-#define MSR_IA32_LASTBRANCHTOIP        0x1dc
-#define MSR_IA32_LASTINTFROMIP     0x1dd
-#define MSR_IA32_LASTINTTOIP       0x1de
-
-#define MSR_IA32_PEBS_ENABLE            0x3f1
-#define MSR_IA32_DS_AREA                0x600
-#define MSR_IA32_PERF_CAPABILITIES      0x345
-
-#define MSR_MTRRfix64K_00000    0x250
-#define MSR_MTRRfix16K_80000    0x258
-#define MSR_MTRRfix16K_A0000    0x259
-#define MSR_MTRRfix4K_C0000     0x268
-#define MSR_MTRRfix4K_C8000     0x269
-#define MSR_MTRRfix4K_D0000     0x26a
-#define MSR_MTRRfix4K_D8000     0x26b
-#define MSR_MTRRfix4K_E0000     0x26c
-#define MSR_MTRRfix4K_E8000     0x26d
-#define MSR_MTRRfix4K_F0000     0x26e
-#define MSR_MTRRfix4K_F8000     0x26f
-#define MSR_MTRRdefType         0x2ff
-
-#define MSR_IA32_MC0_CTL       0x400
-#define MSR_IA32_MC0_STATUS        0x401
-#define MSR_IA32_MC0_ADDR      0x402
-#define MSR_IA32_MC0_MISC      0x403
-
-#define MSR_P6_PERFCTR0                 0xc1
-#define MSR_P6_PERFCTR1                 0xc2
-#define MSR_P6_EVNTSEL0                 0x186
-#define MSR_P6_EVNTSEL1                 0x187
-
-/* K7/K8 MSRs. Not complete. See the architecture manual for a more complete list. */
-#define MSR_K7_EVNTSEL0            0xC0010000
-#define MSR_K7_PERFCTR0            0xC0010004
-#define MSR_K7_EVNTSEL1            0xC0010001
-#define MSR_K7_PERFCTR1            0xC0010005
-#define MSR_K7_EVNTSEL2            0xC0010002
-#define MSR_K7_PERFCTR2            0xC0010006
-#define MSR_K7_EVNTSEL3            0xC0010003
-#define MSR_K7_PERFCTR3            0xC0010007
-#define MSR_K8_TOP_MEM1            0xC001001A
-#define MSR_K8_TOP_MEM2            0xC001001D
-#define MSR_K8_SYSCFG              0xC0010010
-#define MSR_K8_HWCR                0xC0010015
-
-/* K6 MSRs */
-#define MSR_K6_EFER                     0xC0000080
-#define MSR_K6_STAR                     0xC0000081
-#define MSR_K6_WHCR                     0xC0000082
-#define MSR_K6_UWCCR                    0xC0000085
-#define MSR_K6_PSOR                     0xC0000087
-#define MSR_K6_PFIR                     0xC0000088
-
-/* Centaur-Hauls/IDT defined MSRs. */
-#define MSR_IDT_FCR1                    0x107
-#define MSR_IDT_FCR2                    0x108
-#define MSR_IDT_FCR3                    0x109
-#define MSR_IDT_FCR4                    0x10a
-
-#define MSR_IDT_MCR0                    0x110
-#define MSR_IDT_MCR1                    0x111
-#define MSR_IDT_MCR2                    0x112
-#define MSR_IDT_MCR3                    0x113
-#define MSR_IDT_MCR4                    0x114
-#define MSR_IDT_MCR5                    0x115
-#define MSR_IDT_MCR6                    0x116
-#define MSR_IDT_MCR7                    0x117
-#define MSR_IDT_MCR_CTRL                0x120
-
-/* VIA Cyrix defined MSRs*/
-#define MSR_VIA_FCR                     0x1107
-#define MSR_VIA_LONGHAUL                0x110a
-#define MSR_VIA_RNG                     0x110b
-#define MSR_VIA_BCR2                    0x1147
-
-/* Intel defined MSRs. */
-#define MSR_IA32_P5_MC_ADDR             0
-#define MSR_IA32_P5_MC_TYPE             1
-#define MSR_IA32_PLATFORM_ID            0x17
-#define MSR_IA32_EBL_CR_POWERON         0x2a
-
-#define MSR_IA32_APICBASE               0x1b
-#define MSR_IA32_APICBASE_BSP           (1<<8)
-#define MSR_IA32_APICBASE_ENABLE        (1<<11)
-#define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
-
-/* P4/Xeon+ specific */
-#define MSR_IA32_MCG_EAX                0x180
-#define MSR_IA32_MCG_EBX                0x181
-#define MSR_IA32_MCG_ECX                0x182
-#define MSR_IA32_MCG_EDX                0x183
-#define MSR_IA32_MCG_ESI                0x184
-#define MSR_IA32_MCG_EDI                0x185
-#define MSR_IA32_MCG_EBP                0x186
-#define MSR_IA32_MCG_ESP                0x187
-#define MSR_IA32_MCG_EFLAGS             0x188
-#define MSR_IA32_MCG_EIP                0x189
-#define MSR_IA32_MCG_RESERVED           0x18A
-
-#define MSR_P6_EVNTSEL0                 0x186
-#define MSR_P6_EVNTSEL1                 0x187
-
-#define MSR_IA32_PERF_STATUS            0x198
-#define MSR_IA32_PERF_CTL               0x199
-
-#define MSR_IA32_MPERF                  0xE7
-#define MSR_IA32_APERF                  0xE8
-
-#define MSR_IA32_THERM_CONTROL          0x19a
-#define MSR_IA32_THERM_INTERRUPT        0x19b
-#define MSR_IA32_THERM_STATUS           0x19c
-#define MSR_IA32_MISC_ENABLE            0x1a0
-
-#define MSR_IA32_DEBUGCTLMSR            0x1d9
-#define MSR_IA32_LASTBRANCHFROMIP       0x1db
-#define MSR_IA32_LASTBRANCHTOIP         0x1dc
-#define MSR_IA32_LASTINTFROMIP          0x1dd
-#define MSR_IA32_LASTINTTOIP            0x1de
-
-#define MSR_IA32_MC0_CTL                0x400
-#define MSR_IA32_MC0_STATUS             0x401
-#define MSR_IA32_MC0_ADDR               0x402
-#define MSR_IA32_MC0_MISC               0x403
-
-/* Pentium IV performance counter MSRs */
-#define MSR_P4_BPU_PERFCTR0             0x300
-#define MSR_P4_BPU_PERFCTR1             0x301
-#define MSR_P4_BPU_PERFCTR2             0x302
-#define MSR_P4_BPU_PERFCTR3             0x303
-#define MSR_P4_MS_PERFCTR0              0x304
-#define MSR_P4_MS_PERFCTR1              0x305
-#define MSR_P4_MS_PERFCTR2              0x306
-#define MSR_P4_MS_PERFCTR3              0x307
-#define MSR_P4_FLAME_PERFCTR0           0x308
-#define MSR_P4_FLAME_PERFCTR1           0x309
-#define MSR_P4_FLAME_PERFCTR2           0x30a
-#define MSR_P4_FLAME_PERFCTR3           0x30b
-#define MSR_P4_IQ_PERFCTR0              0x30c
-#define MSR_P4_IQ_PERFCTR1              0x30d
-#define MSR_P4_IQ_PERFCTR2              0x30e
-#define MSR_P4_IQ_PERFCTR3              0x30f
-#define MSR_P4_IQ_PERFCTR4              0x310
-#define MSR_P4_IQ_PERFCTR5              0x311
-#define MSR_P4_BPU_CCCR0                0x360
-#define MSR_P4_BPU_CCCR1                0x361
-#define MSR_P4_BPU_CCCR2                0x362
-#define MSR_P4_BPU_CCCR3                0x363
-#define MSR_P4_MS_CCCR0                 0x364
-#define MSR_P4_MS_CCCR1                 0x365
-#define MSR_P4_MS_CCCR2                 0x366
-#define MSR_P4_MS_CCCR3                 0x367
-#define MSR_P4_FLAME_CCCR0              0x368
-#define MSR_P4_FLAME_CCCR1              0x369
-#define MSR_P4_FLAME_CCCR2              0x36a
-#define MSR_P4_FLAME_CCCR3              0x36b
-#define MSR_P4_IQ_CCCR0                 0x36c
-#define MSR_P4_IQ_CCCR1                 0x36d
-#define MSR_P4_IQ_CCCR2                 0x36e
-#define MSR_P4_IQ_CCCR3                 0x36f
-#define MSR_P4_IQ_CCCR4                 0x370
-#define MSR_P4_IQ_CCCR5                 0x371
-#define MSR_P4_ALF_ESCR0                0x3ca
-#define MSR_P4_ALF_ESCR1                0x3cb
-#define MSR_P4_BPU_ESCR0                0x3b2
-#define MSR_P4_BPU_ESCR1                0x3b3
-#define MSR_P4_BSU_ESCR0                0x3a0
-#define MSR_P4_BSU_ESCR1                0x3a1
-#define MSR_P4_CRU_ESCR0                0x3b8
-#define MSR_P4_CRU_ESCR1                0x3b9
-#define MSR_P4_CRU_ESCR2                0x3cc
-#define MSR_P4_CRU_ESCR3                0x3cd
-#define MSR_P4_CRU_ESCR4                0x3e0
-#define MSR_P4_CRU_ESCR5                0x3e1
-#define MSR_P4_DAC_ESCR0                0x3a8
-#define MSR_P4_DAC_ESCR1                0x3a9
-#define MSR_P4_FIRM_ESCR0               0x3a4
-#define MSR_P4_FIRM_ESCR1               0x3a5
-#define MSR_P4_FLAME_ESCR0              0x3a6
-#define MSR_P4_FLAME_ESCR1              0x3a7
-#define MSR_P4_FSB_ESCR0                0x3a2
-#define MSR_P4_FSB_ESCR1                0x3a3
-#define MSR_P4_IQ_ESCR0                 0x3ba
-#define MSR_P4_IQ_ESCR1                 0x3bb
-#define MSR_P4_IS_ESCR0                 0x3b4
-#define MSR_P4_IS_ESCR1                 0x3b5
-#define MSR_P4_ITLB_ESCR0               0x3b6
-#define MSR_P4_ITLB_ESCR1               0x3b7
-#define MSR_P4_IX_ESCR0                 0x3c8
-#define MSR_P4_IX_ESCR1                 0x3c9
-#define MSR_P4_MOB_ESCR0                0x3aa
-#define MSR_P4_MOB_ESCR1                0x3ab
-#define MSR_P4_MS_ESCR0                 0x3c0
-#define MSR_P4_MS_ESCR1                 0x3c1
-#define MSR_P4_PMH_ESCR0                0x3ac
-#define MSR_P4_PMH_ESCR1                0x3ad
-#define MSR_P4_RAT_ESCR0                0x3bc
-#define MSR_P4_RAT_ESCR1                0x3bd
-#define MSR_P4_SAAT_ESCR0               0x3ae
-#define MSR_P4_SAAT_ESCR1               0x3af
-#define MSR_P4_SSU_ESCR0                0x3be
-#define MSR_P4_SSU_ESCR1                0x3bf    /* guess: not defined in manual */
-#define MSR_P4_TBPU_ESCR0               0x3c2
-#define MSR_P4_TBPU_ESCR1               0x3c3
-#define MSR_P4_TC_ESCR0                 0x3c4
-#define MSR_P4_TC_ESCR1                 0x3c5
-#define MSR_P4_U2L_ESCR0                0x3b0
-#define MSR_P4_U2L_ESCR1                0x3b1
-
-/* Intel Core-based CPU performance counters */
-#define MSR_CORE_PERF_FIXED_CTR0        0x309
-#define MSR_CORE_PERF_FIXED_CTR1        0x30a
-#define MSR_CORE_PERF_FIXED_CTR2        0x30b
-#define MSR_CORE_PERF_FIXED_CTR_CTRL    0x38d
-#define MSR_CORE_PERF_GLOBAL_STATUS     0x38e
-#define MSR_CORE_PERF_GLOBAL_CTRL       0x38f
-#define MSR_CORE_PERF_GLOBAL_OVF_CTRL   0x390
-
-#endif
+#endif  /* CONFIG_SMP */
+#endif /* __ASSEMBLY__ */
+#endif  /* X86_64_MSR_H */
diff --git a/include/asm-x86_64/mtrr.h b/include/asm-x86_64/mtrr.h
index d6135b2549bf..b557c486bef8 100644
--- a/include/asm-x86_64/mtrr.h
+++ b/include/asm-x86_64/mtrr.h
@@ -135,6 +135,18 @@ struct mtrr_gentry32
 
 #endif /* CONFIG_COMPAT */
 
+#ifdef CONFIG_MTRR
+extern void mtrr_ap_init(void);
+extern void mtrr_bp_init(void);
+extern void mtrr_save_fixed_ranges(void *);
+extern void mtrr_save_state(void);
+#else
+#define mtrr_ap_init() do {} while (0)
+#define mtrr_bp_init() do {} while (0)
+#define mtrr_save_fixed_ranges(arg) do {} while (0)
+#define mtrr_save_state() do {} while (0)
+#endif
+
 #endif /* __KERNEL__ */
 
 #endif  /*  _LINUX_MTRR_H  */
diff --git a/include/asm-x86_64/nmi.h b/include/asm-x86_64/nmi.h
index 72375e7d32a8..d0a7f53b1497 100644
--- a/include/asm-x86_64/nmi.h
+++ b/include/asm-x86_64/nmi.h
@@ -80,4 +80,13 @@ extern int unknown_nmi_panic;
 void __trigger_all_cpu_backtrace(void);
 #define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace()
 
+
+void lapic_watchdog_stop(void);
+int lapic_watchdog_init(unsigned nmi_hz);
+int lapic_wd_event(unsigned nmi_hz);
+unsigned lapic_adjust_nmi_hz(unsigned hz);
+int lapic_watchdog_ok(void);
+void disable_lapic_nmi_watchdog(void);
+void enable_lapic_nmi_watchdog(void);
+
 #endif /* ASM_NMI_H */
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h
index 10f346165cab..b17fc16ec2eb 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86_64/page.h
@@ -1,14 +1,11 @@
 #ifndef _X86_64_PAGE_H
 #define _X86_64_PAGE_H
 
+#include <asm/const.h>
 
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      12
-#ifdef __ASSEMBLY__
-#define PAGE_SIZE       (0x1 << PAGE_SHIFT)
-#else
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
-#endif
+#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 #define PHYSICAL_PAGE_MASK      (~(PAGE_SIZE-1) & __PHYSICAL_MASK)
 
@@ -33,10 +30,10 @@
 #define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
 
 #define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1))
-#define LARGE_PAGE_SIZE (1UL << PMD_SHIFT)
+#define LARGE_PAGE_SIZE (_AC(1,UL) << PMD_SHIFT)
 
 #define HPAGE_SHIFT PMD_SHIFT
-#define HPAGE_SIZE      ((1UL) << HPAGE_SHIFT)
+#define HPAGE_SIZE      (_AC(1,UL) << HPAGE_SHIFT)
 #define HPAGE_MASK      (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 
@@ -64,6 +61,8 @@ typedef struct { unsigned long pgd; } pgd_t;
 
 typedef struct { unsigned long pgprot; } pgprot_t;
 
+extern unsigned long phys_base;
+
 #define pte_val(x)      ((x).pte)
 #define pmd_val(x)      ((x).pmd)
 #define pud_val(x)      ((x).pud)
@@ -76,29 +75,25 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define __pgd(x) ((pgd_t) { (x) } )
 #define __pgprot(x)     ((pgprot_t) { (x) } )
 
-#define __PHYSICAL_START        ((unsigned long)CONFIG_PHYSICAL_START)
-#define __START_KERNEL          (__START_KERNEL_map + __PHYSICAL_START)
-#define __START_KERNEL_map      0xffffffff80000000UL
-#define __PAGE_OFFSET           0xffff810000000000UL
+#endif /* !__ASSEMBLY__ */
 
-#else
 #define __PHYSICAL_START        CONFIG_PHYSICAL_START
+#define __KERNEL_ALIGN          0x200000
 #define __START_KERNEL          (__START_KERNEL_map + __PHYSICAL_START)
 #define __START_KERNEL_map      0xffffffff80000000
 #define __PAGE_OFFSET           0xffff810000000000
-#endif /* !__ASSEMBLY__ */
 
 /* to align the pointer to the (next) page boundary */
 #define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
 
 /* See Documentation/x86_64/mm.txt for a description of the memory map. */
 #define __PHYSICAL_MASK_SHIFT   46
-#define __PHYSICAL_MASK         ((1UL << __PHYSICAL_MASK_SHIFT) - 1)
+#define __PHYSICAL_MASK         ((_AC(1,UL) << __PHYSICAL_MASK_SHIFT) - 1)
 #define __VIRTUAL_MASK_SHIFT    48
-#define __VIRTUAL_MASK          ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
+#define __VIRTUAL_MASK          ((_AC(1,UL) << __VIRTUAL_MASK_SHIFT) - 1)
 
-#define KERNEL_TEXT_SIZE  (40UL*1024*1024)
-#define KERNEL_TEXT_START 0xffffffff80000000UL 
+#define KERNEL_TEXT_SIZE  (40*1024*1024)
+#define KERNEL_TEXT_START 0xffffffff80000000
 
 #ifndef __ASSEMBLY__
 
@@ -106,21 +101,19 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 
 #endif /* __ASSEMBLY__ */
 
-#define PAGE_OFFSET             ((unsigned long)__PAGE_OFFSET)
+#define PAGE_OFFSET             __PAGE_OFFSET
 
 /* Note: __pa(&symbol_visible_to_c) should be always replaced with __pa_symbol.
-   Otherwise you risk miscompilation. */ 
-#define __pa(x)                 (((unsigned long)(x)>=__START_KERNEL_map)?(unsigned long)(x) - (unsigned long)__START_KERNEL_map:(unsigned long)(x) - PAGE_OFFSET)
+   Otherwise you risk miscompilation. */
+#define __pa(x)                 ((unsigned long)(x) - PAGE_OFFSET)
 /* __pa_symbol should be used for C visible symbols.
    This seems to be the official gcc blessed way to do such arithmetic. */ 
 #define __pa_symbol(x)          \
         ({unsigned long v;  \
           asm("" : "=r" (v) : "0" (x)); \
-          __pa(v); })
+          ((v - __START_KERNEL_map) + phys_base); })
 
 #define __va(x)                 ((void *)((unsigned long)(x)+PAGE_OFFSET))
-#define __boot_va(x)            __va(x)
-#define __boot_pa(x)            __pa(x)
 #ifdef CONFIG_FLATMEM
 #define pfn_valid(pfn)          ((pfn) < end_pfn)
 #endif
diff --git a/include/asm-x86_64/percpu.h b/include/asm-x86_64/percpu.h
index 5ed0ef340842..c6fbb67eac90 100644
--- a/include/asm-x86_64/percpu.h
+++ b/include/asm-x86_64/percpu.h
@@ -11,16 +11,6 @@
 
 #include <asm/pda.h>
 
-#ifdef CONFIG_MODULES
-# define PERCPU_MODULE_RESERVE 8192
-#else
-# define PERCPU_MODULE_RESERVE 0
-#endif
-
-#define PERCPU_ENOUGH_ROOM \
-        (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
-         PERCPU_MODULE_RESERVE)
-
 #define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset)
 #define __my_cpu_offset() read_pda(data_offset)
 
diff --git a/include/asm-x86_64/pgalloc.h b/include/asm-x86_64/pgalloc.h
index 4e28b6060a5e..8bb564687860 100644
--- a/include/asm-x86_64/pgalloc.h
+++ b/include/asm-x86_64/pgalloc.h
@@ -1,7 +1,6 @@
 #ifndef _X86_64_PGALLOC_H
 #define _X86_64_PGALLOC_H
 
-#include <asm/fixmap.h>
 #include <asm/pda.h>
 #include <linux/threads.h>
 #include <linux/mm.h>
@@ -45,24 +44,16 @@ static inline void pgd_list_add(pgd_t *pgd)
         struct page *page = virt_to_page(pgd);
 
         spin_lock(&pgd_lock);
-        page->index = (pgoff_t)pgd_list;
-        if (pgd_list)
-                pgd_list->private = (unsigned long)&page->index;
-        pgd_list = page;
-        page->private = (unsigned long)&pgd_list;
+        list_add(&page->lru, &pgd_list);
         spin_unlock(&pgd_lock);
 }
 
 static inline void pgd_list_del(pgd_t *pgd)
 {
-        struct page *next, **pprev, *page = virt_to_page(pgd);
+        struct page *page = virt_to_page(pgd);
 
         spin_lock(&pgd_lock);
-        next = (struct page *)page->index;
-        pprev = (struct page **)page->private;
-        *pprev = next;
-        if (next)
-                next->private = (unsigned long)pprev;
+        list_del(&page->lru);
         spin_unlock(&pgd_lock);
 }
 
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 730bd6028416..599993f6ba84 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -1,25 +1,25 @@
 #ifndef _X86_64_PGTABLE_H
 #define _X86_64_PGTABLE_H
 
+#include <asm/const.h>
+#ifndef __ASSEMBLY__
+
 /*
  * This file contains the functions and defines necessary to modify and use
  * the x86-64 page table tree.
  */
 #include <asm/processor.h>
-#include <asm/fixmap.h>
 #include <asm/bitops.h>
 #include <linux/threads.h>
 #include <asm/pda.h>
 
 extern pud_t level3_kernel_pgt[512];
-extern pud_t level3_physmem_pgt[512];
 extern pud_t level3_ident_pgt[512];
 extern pmd_t level2_kernel_pgt[512];
 extern pgd_t init_level4_pgt[];
-extern pgd_t boot_level4_pgt[];
 extern unsigned long __supported_pte_mask;
 
-#define swapper_pg_dir init_level4_pgt
+#define swapper_pg_dir ((pgd_t *)NULL)
 
 extern void paging_init(void);
 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
@@ -29,7 +29,9 @@ extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
  * for zero-mapped memory areas etc..
  */
 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+#define ZERO_PAGE(vaddr) (pfn_to_page(__pa_symbol(&empty_zero_page) >> PAGE_SHIFT))
+
+#endif /* !__ASSEMBLY__ */
 
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
@@ -55,6 +57,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
  */
 #define PTRS_PER_PTE    512
 
+#ifndef __ASSEMBLY__
+
 #define pte_ERROR(e) \
         printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
 #define pmd_ERROR(e) \
@@ -118,22 +122,23 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
 
 #define pte_pgprot(a)   (__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
 
-#define PMD_SIZE        (1UL << PMD_SHIFT)
+#endif /* !__ASSEMBLY__ */
+
+#define PMD_SIZE        (_AC(1,UL) << PMD_SHIFT)
 #define PMD_MASK        (~(PMD_SIZE-1))
-#define PUD_SIZE        (1UL << PUD_SHIFT)
+#define PUD_SIZE        (_AC(1,UL) << PUD_SHIFT)
 #define PUD_MASK        (~(PUD_SIZE-1))
-#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_SIZE      (_AC(1,UL) << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 
 #define USER_PTRS_PER_PGD       ((TASK_SIZE-1)/PGDIR_SIZE+1)
 #define FIRST_USER_ADDRESS      0
 
-#ifndef __ASSEMBLY__
-#define MAXMEM           0x3fffffffffffUL
-#define VMALLOC_START    0xffffc20000000000UL
-#define VMALLOC_END      0xffffe1ffffffffffUL
-#define MODULES_VADDR    0xffffffff88000000UL
-#define MODULES_END      0xfffffffffff00000UL
+#define MAXMEM           0x3fffffffffff
+#define VMALLOC_START    0xffffc20000000000
+#define VMALLOC_END      0xffffe1ffffffffff
+#define MODULES_VADDR    0xffffffff88000000
+#define MODULES_END      0xfffffffffff00000
 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
 
 #define _PAGE_BIT_PRESENT       0
@@ -159,7 +164,7 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
 #define _PAGE_GLOBAL    0x100   /* Global TLB entry */
 
 #define _PAGE_PROTNONE  0x080   /* If not present */
-#define _PAGE_NX        (1UL<<_PAGE_BIT_NX)
+#define _PAGE_NX        (_AC(1,UL)<<_PAGE_BIT_NX)
 
 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
@@ -221,6 +226,8 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
 #define __S110  PAGE_SHARED_EXEC
 #define __S111  PAGE_SHARED_EXEC
 
+#ifndef __ASSEMBLY__
+
 static inline unsigned long pgd_bad(pgd_t pgd)
 {
         return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
@@ -403,11 +410,9 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 
 extern spinlock_t pgd_lock;
-extern struct page *pgd_list;
+extern struct list_head pgd_list;
 void vmalloc_sync_all(void);
 
-#endif /* !__ASSEMBLY__ */
-
 extern int kern_addr_valid(unsigned long addr); 
 
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
@@ -437,5 +442,6 @@ extern int kern_addr_valid(unsigned long addr);
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 #define __HAVE_ARCH_PTE_SAME
 #include <asm-generic/pgtable.h>
+#endif /* !__ASSEMBLY__ */
 
 #endif /* _X86_64_PGTABLE_H */
diff --git a/include/asm-x86_64/processor-flags.h b/include/asm-x86_64/processor-flags.h
new file mode 100644
index 000000000000..ec99a57b2c6a
--- /dev/null
+++ b/include/asm-x86_64/processor-flags.h
@@ -0,0 +1 @@
+#include <asm-i386/processor-flags.h>
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 76552d72804c..461ffe4c1fcc 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -20,6 +20,7 @@
 #include <asm/percpu.h>
 #include <linux/personality.h>
 #include <linux/cpumask.h>
+#include <asm/processor-flags.h>
 
 #define TF_MASK         0x00000100
 #define IF_MASK         0x00000200
@@ -103,42 +104,6 @@ extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern unsigned short num_cache_leaves;
 
 /*
- * EFLAGS bits
- */
-#define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
-#define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
-#define X86_EFLAGS_AF   0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF   0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF   0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF   0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF   0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF   0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT   0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF   0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM   0x00020000 /* Virtual Mode */
-#define X86_EFLAGS_AC   0x00040000 /* Alignment Check */
-#define X86_EFLAGS_VIF  0x00080000 /* Virtual Interrupt Flag */
-#define X86_EFLAGS_VIP  0x00100000 /* Virtual Interrupt Pending */
-#define X86_EFLAGS_ID   0x00200000 /* CPUID detection flag */
-
-/*
- * Intel CPU features in CR4
- */
-#define X86_CR4_VME             0x0001  /* enable vm86 extensions */
-#define X86_CR4_PVI             0x0002  /* virtual interrupts flag enable */
-#define X86_CR4_TSD             0x0004  /* disable time stamp at ipl 3 */
-#define X86_CR4_DE              0x0008  /* enable debugging extensions */
-#define X86_CR4_PSE             0x0010  /* enable page size extensions */
-#define X86_CR4_PAE             0x0020  /* enable physical address extensions */
-#define X86_CR4_MCE             0x0040  /* Machine check enable */
-#define X86_CR4_PGE             0x0080  /* enable global pages */
-#define X86_CR4_PCE             0x0100  /* enable performance counters at ipl 3 */
-#define X86_CR4_OSFXSR          0x0200  /* enable fast FPU save and restore */
-#define X86_CR4_OSXMMEXCPT      0x0400  /* enable unmasked SSE exceptions */
-
-/*
  * Save the cr4 feature set we're using (ie
  * Pentium 4MB enable and PPro Global page
  * enable), so that any CPU's that boot up
@@ -201,7 +166,7 @@ struct i387_fxsave_struct {
         u32     mxcsr;
         u32     mxcsr_mask;
         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
-        u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 128 bytes */
+        u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
         u32     padding[24];
 } __attribute__ ((aligned (16)));
 
@@ -427,22 +392,6 @@ static inline void prefetchw(void *x)
 #define cpu_relax()   rep_nop()
 
 /*
- *      NSC/Cyrix CPU configuration register indexes
- */
-#define CX86_CCR0 0xc0
-#define CX86_CCR1 0xc1
-#define CX86_CCR2 0xc2
-#define CX86_CCR3 0xc3
-#define CX86_CCR4 0xe8
-#define CX86_CCR5 0xe9
-#define CX86_CCR6 0xea
-#define CX86_CCR7 0xeb
-#define CX86_DIR0 0xfe
-#define CX86_DIR1 0xff
-#define CX86_ARR_BASE 0xc4
-#define CX86_RCR_BASE 0xdc
-
-/*
  *      NSC/Cyrix CPU indexed register access macros
  */
 
diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h
index b6e65a699f2a..85255db1e82d 100644
--- a/include/asm-x86_64/proto.h
+++ b/include/asm-x86_64/proto.h
@@ -11,18 +11,9 @@ struct pt_regs;
 extern void start_kernel(void);
 extern void pda_init(int); 
 
-extern void zap_low_mappings(int cpu);
-
 extern void early_idt_handler(void);
 
 extern void mcheck_init(struct cpuinfo_x86 *c);
-#ifdef CONFIG_MTRR
-extern void mtrr_ap_init(void);
-extern void mtrr_bp_init(void);
-#else
-#define mtrr_ap_init() do {} while (0)
-#define mtrr_bp_init() do {} while (0)
-#endif
 extern void init_memory_mapping(unsigned long start, unsigned long end);
 
 extern void system_call(void); 
@@ -82,7 +73,6 @@ extern void syscall32_cpu_init(void);
 extern void setup_node_bootmem(int nodeid, unsigned long start, unsigned long end);
 
 extern void early_quirks(void);
-extern void quirk_intel_irqbalance(void);
 extern void check_efer(void);
 
 extern int unhandled_signal(struct task_struct *tsk, int sig);
@@ -93,6 +83,7 @@ extern unsigned long table_start, table_end;
 
 extern int exception_trace;
 extern unsigned cpu_khz;
+extern unsigned tsc_khz;
 
 extern void no_iommu_init(void);
 extern int force_iommu, no_iommu;
@@ -121,8 +112,12 @@ extern int gsi_irq_sharing(int gsi);
 
 extern void smp_local_timer_interrupt(void);
 
+extern int force_mwait;
+
 long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
 
+void i8254_timer_resume(void);
+
 #define round_up(x,y) (((x) + (y) - 1) & ~((y)-1))
 #define round_down(x,y) ((x) & ~((y)-1))
 
diff --git a/include/asm-x86_64/scatterlist.h b/include/asm-x86_64/scatterlist.h
index 49d89f8129cd..eaf7ada27e14 100644
--- a/include/asm-x86_64/scatterlist.h
+++ b/include/asm-x86_64/scatterlist.h
@@ -1,6 +1,8 @@
 #ifndef _X8664_SCATTERLIST_H
 #define _X8664_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
     struct page         *page;
     unsigned int        offset;
diff --git a/include/asm-x86_64/segment.h b/include/asm-x86_64/segment.h
index 334ddcdd8f92..adf2bf1e187c 100644
--- a/include/asm-x86_64/segment.h
+++ b/include/asm-x86_64/segment.h
@@ -6,7 +6,7 @@
 #define __KERNEL_CS     0x10
 #define __KERNEL_DS     0x18
 
-#define __KERNEL32_CS   0x38
+#define __KERNEL32_CS   0x08
 
 /* 
  * we cannot use the same code segment descriptor for user and kernel
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
index de592a408c07..d5704421456b 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86_64/smp.h
@@ -10,10 +10,9 @@
 #include <linux/init.h>
 extern int disable_apic;
 
-#include <asm/fixmap.h>
 #include <asm/mpspec.h>
-#include <asm/io_apic.h>
 #include <asm/apic.h>
+#include <asm/io_apic.h>
 #include <asm/thread_info.h>
 
 #ifdef CONFIG_SMP
@@ -38,7 +37,6 @@ extern void lock_ipi_call_lock(void);
 extern void unlock_ipi_call_lock(void);
 extern int smp_num_siblings;
 extern void smp_send_reschedule(int cpu);
-void smp_stop_cpu(void);
 
 extern cpumask_t cpu_sibling_map[NR_CPUS];
 extern cpumask_t cpu_core_map[NR_CPUS];
diff --git a/include/asm-x86_64/suspend.h b/include/asm-x86_64/suspend.h
index bc7f81715e5e..9c3f8de90d2d 100644
--- a/include/asm-x86_64/suspend.h
+++ b/include/asm-x86_64/suspend.h
@@ -17,6 +17,7 @@ struct saved_context {
         u16 ds, es, fs, gs, ss;
         unsigned long gs_base, gs_kernel_base, fs_base;
         unsigned long cr0, cr2, cr3, cr4, cr8;
+        unsigned long efer;
         u16 gdt_pad;
         u16 gdt_limit;
         unsigned long gdt_base;
@@ -44,12 +45,12 @@ extern unsigned long saved_context_eflags;
 extern void fix_processor_context(void);
 
 #ifdef CONFIG_ACPI_SLEEP
-extern unsigned long saved_eip;
-extern unsigned long saved_esp;
-extern unsigned long saved_ebp;
-extern unsigned long saved_ebx;
-extern unsigned long saved_esi;
-extern unsigned long saved_edi;
+extern unsigned long saved_rip;
+extern unsigned long saved_rsp;
+extern unsigned long saved_rbp;
+extern unsigned long saved_rbx;
+extern unsigned long saved_rsi;
+extern unsigned long saved_rdi;
 
 /* routines for saving/restoring kernel state */
 extern int acpi_save_state_mem(void);
diff --git a/include/asm-x86_64/system.h b/include/asm-x86_64/system.h
index bd376bc8c4ab..213b7fe5d998 100644
--- a/include/asm-x86_64/system.h
+++ b/include/asm-x86_64/system.h
@@ -89,6 +89,11 @@ static inline unsigned long read_cr3(void)
         return cr3;
 } 
 
+static inline void write_cr3(unsigned long val)
+{
+        asm volatile("movq %0,%%cr3" :: "r" (val) : "memory");
+}
+
 static inline unsigned long read_cr4(void)
 { 
         unsigned long cr4;
@@ -98,7 +103,7 @@ static inline unsigned long read_cr4(void)
 
 static inline void write_cr4(unsigned long val)
 { 
-        asm volatile("movq %0,%%cr4" :: "r" (val));
+        asm volatile("movq %0,%%cr4" :: "r" (val) : "memory");
 } 
 
 #define stts() write_cr0(8 | read_cr0())
diff --git a/include/asm-x86_64/timex.h b/include/asm-x86_64/timex.h
index 8c6808a3fba4..f6527e1b6c1c 100644
--- a/include/asm-x86_64/timex.h
+++ b/include/asm-x86_64/timex.h
@@ -27,6 +27,6 @@ extern int read_current_timer(unsigned long *timer_value);
 #define NS_SCALE        10 /* 2^10, carefully chosen */
 #define US_SCALE        32 /* 2^32, arbitralrily chosen */
 
-extern void mark_tsc_unstable(void);
+extern void mark_tsc_unstable(char *msg);
 extern void set_cyc2ns_scale(unsigned long khz);
 #endif
diff --git a/include/asm-x86_64/tlbflush.h b/include/asm-x86_64/tlbflush.h
index 983bd296c81a..512401b8725f 100644
--- a/include/asm-x86_64/tlbflush.h
+++ b/include/asm-x86_64/tlbflush.h
@@ -3,41 +3,18 @@
 
 #include <linux/mm.h>
 #include <asm/processor.h>
-
-static inline unsigned long get_cr3(void)
-{
-        unsigned long cr3;
-        asm volatile("mov %%cr3,%0" : "=r" (cr3));
-        return cr3;
-}
-
-static inline void set_cr3(unsigned long cr3)
-{
-        asm volatile("mov %0,%%cr3" :: "r" (cr3) : "memory");
-}
+#include <asm/system.h>
 
 static inline void __flush_tlb(void)
 {
-        set_cr3(get_cr3());
-}
-
-static inline unsigned long get_cr4(void)
-{
-        unsigned long cr4;
-        asm volatile("mov %%cr4,%0" : "=r" (cr4));
-        return cr4;
-}
-
-static inline void set_cr4(unsigned long cr4)
-{
-        asm volatile("mov %0,%%cr4" :: "r" (cr4) : "memory");
+        write_cr3(read_cr3());
 }
 
 static inline void __flush_tlb_all(void)
 {
-        unsigned long cr4 = get_cr4();
-        set_cr4(cr4 & ~X86_CR4_PGE);    /* clear PGE */
-        set_cr4(cr4);                   /* write old PGE again and flush TLBs */
+        unsigned long cr4 = read_cr4();
+        write_cr4(cr4 & ~X86_CR4_PGE);  /* clear PGE */
+        write_cr4(cr4);                 /* write old PGE again and flush TLBs */
 }
 
 #define __flush_tlb_one(addr) \
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index c5f596e71faa..26e23e01c54a 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -620,8 +620,6 @@ __SYSCALL(__NR_vmsplice, sys_vmsplice)
 #define __NR_move_pages         279
 __SYSCALL(__NR_move_pages, sys_move_pages)
 
-#define __NR_syscall_max __NR_move_pages
-
 #ifndef __NO_STUBS
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_OLD_STAT
@@ -655,7 +653,6 @@ __SYSCALL(__NR_move_pages, sys_move_pages)
 #include <asm/ptrace.h>
 
 asmlinkage long sys_iopl(unsigned int level, struct pt_regs *regs);
-asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on);
 struct sigaction;
 asmlinkage long sys_rt_sigaction(int sig,
                                 const struct sigaction __user *act,
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
index f14851f086c3..92f948392ebc 100644
--- a/include/asm-xtensa/mmu_context.h
+++ b/include/asm-xtensa/mmu_context.h
@@ -18,6 +18,7 @@
 #include <asm/pgtable.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
+#include <asm-generic/mm_hooks.h>
 
 #define XCHAL_MMU_ASID_BITS     8
 
diff --git a/include/asm-xtensa/scatterlist.h b/include/asm-xtensa/scatterlist.h
index 38a2b9acd658..ca337a294290 100644
--- a/include/asm-xtensa/scatterlist.h
+++ b/include/asm-xtensa/scatterlist.h
@@ -11,6 +11,8 @@
 #ifndef _XTENSA_SCATTERLIST_H
 #define _XTENSA_SCATTERLIST_H
 
+#include <asm/types.h>
+
 struct scatterlist {
         struct page     *page;
         unsigned int    offset;
diff --git a/include/crypto/algapi.h b/include/crypto/algapi.h
index 4e05e93ff681..b2b1e6efd812 100644
--- a/include/crypto/algapi.h
+++ b/include/crypto/algapi.h
@@ -13,8 +13,11 @@
 #define _CRYPTO_ALGAPI_H
 
 #include <linux/crypto.h>
+#include <linux/list.h>
+#include <linux/kernel.h>
 
 struct module;
+struct rtattr;
 struct seq_file;
 
 struct crypto_type {
@@ -38,7 +41,7 @@ struct crypto_template {
         struct hlist_head instances;
         struct module *module;
 
-        struct crypto_instance *(*alloc)(void *param, unsigned int len);
+        struct crypto_instance *(*alloc)(struct rtattr **tb);
         void (*free)(struct crypto_instance *inst);
 
         char name[CRYPTO_MAX_ALG_NAME];
@@ -48,6 +51,15 @@ struct crypto_spawn {
         struct list_head list;
         struct crypto_alg *alg;
         struct crypto_instance *inst;
+        u32 mask;
+};
+
+struct crypto_queue {
+        struct list_head list;
+        struct list_head *backlog;
+
+        unsigned int qlen;
+        unsigned int max_qlen;
 };
 
 struct scatter_walk {
@@ -81,6 +93,7 @@ struct blkcipher_walk {
         int flags;
 };
 
+extern const struct crypto_type crypto_ablkcipher_type;
 extern const struct crypto_type crypto_blkcipher_type;
 extern const struct crypto_type crypto_hash_type;
 
@@ -91,16 +104,23 @@ void crypto_unregister_template(struct crypto_template *tmpl);
 struct crypto_template *crypto_lookup_template(const char *name);
 
 int crypto_init_spawn(struct crypto_spawn *spawn, struct crypto_alg *alg,
-                      struct crypto_instance *inst);
+                      struct crypto_instance *inst, u32 mask);
 void crypto_drop_spawn(struct crypto_spawn *spawn);
 struct crypto_tfm *crypto_spawn_tfm(struct crypto_spawn *spawn, u32 type,
                                     u32 mask);
 
-struct crypto_alg *crypto_get_attr_alg(void *param, unsigned int len,
-                                       u32 type, u32 mask);
+struct crypto_attr_type *crypto_get_attr_type(struct rtattr **tb);
+int crypto_check_attr_type(struct rtattr **tb, u32 type);
+struct crypto_alg *crypto_get_attr_alg(struct rtattr **tb, u32 type, u32 mask);
 struct crypto_instance *crypto_alloc_instance(const char *name,
                                               struct crypto_alg *alg);
 
+void crypto_init_queue(struct crypto_queue *queue, unsigned int max_qlen);
+int crypto_enqueue_request(struct crypto_queue *queue,
+                           struct crypto_async_request *request);
+struct crypto_async_request *crypto_dequeue_request(struct crypto_queue *queue);
+int crypto_tfm_in_queue(struct crypto_queue *queue, struct crypto_tfm *tfm);
+
 int blkcipher_walk_done(struct blkcipher_desc *desc,
                         struct blkcipher_walk *walk, int err);
 int blkcipher_walk_virt(struct blkcipher_desc *desc,
@@ -118,11 +138,37 @@ static inline void *crypto_tfm_ctx_aligned(struct crypto_tfm *tfm)
         return (void *)ALIGN(addr, align);
 }
 
+static inline struct crypto_instance *crypto_tfm_alg_instance(
+        struct crypto_tfm *tfm)
+{
+        return container_of(tfm->__crt_alg, struct crypto_instance, alg);
+}
+
 static inline void *crypto_instance_ctx(struct crypto_instance *inst)
 {
         return inst->__ctx;
 }
 
+static inline struct ablkcipher_alg *crypto_ablkcipher_alg(
+        struct crypto_ablkcipher *tfm)
+{
+        return &crypto_ablkcipher_tfm(tfm)->__crt_alg->cra_ablkcipher;
+}
+
+static inline void *crypto_ablkcipher_ctx(struct crypto_ablkcipher *tfm)
+{
+        return crypto_tfm_ctx(&tfm->base);
+}
+
+static inline struct crypto_blkcipher *crypto_spawn_blkcipher(
+        struct crypto_spawn *spawn)
+{
+        u32 type = CRYPTO_ALG_TYPE_BLKCIPHER;
+        u32 mask = CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC;
+
+        return __crypto_blkcipher_cast(crypto_spawn_tfm(spawn, type, mask));
+}
+
 static inline void *crypto_blkcipher_ctx(struct crypto_blkcipher *tfm)
 {
         return crypto_tfm_ctx(&tfm->base);
@@ -170,5 +216,35 @@ static inline void blkcipher_walk_init(struct blkcipher_walk *walk,
         walk->total = nbytes;
 }
 
+static inline struct crypto_async_request *crypto_get_backlog(
+        struct crypto_queue *queue)
+{
+        return queue->backlog == &queue->list ? NULL :
+               container_of(queue->backlog, struct crypto_async_request, list);
+}
+
+static inline int ablkcipher_enqueue_request(struct ablkcipher_alg *alg,
+                                             struct ablkcipher_request *request)
+{
+        return crypto_enqueue_request(alg->queue, &request->base);
+}
+
+static inline struct ablkcipher_request *ablkcipher_dequeue_request(
+        struct ablkcipher_alg *alg)
+{
+        return ablkcipher_request_cast(crypto_dequeue_request(alg->queue));
+}
+
+static inline void *ablkcipher_request_ctx(struct ablkcipher_request *req)
+{
+        return req->__ctx;
+}
+
+static inline int ablkcipher_tfm_in_queue(struct crypto_ablkcipher *tfm)
+{
+        return crypto_tfm_in_queue(crypto_ablkcipher_alg(tfm)->queue,
+                                   crypto_ablkcipher_tfm(tfm));
+}
+
 #endif  /* _CRYPTO_ALGAPI_H */
 
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 4ff0f57d0add..9f05279e7dd3 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -96,6 +96,7 @@ header-y += iso_fs.h
 header-y += ixjuser.h
 header-y += jffs2.h
 header-y += keyctl.h
+header-y += kvm.h
 header-y += limits.h
 header-y += lock_dlm_plock.h
 header-y += magic.h
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index 81c07cd18643..0365ec9fc0c9 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -122,9 +122,9 @@ extern void *alloc_large_system_hash(const char *tablename,
 #define HASH_EARLY      0x00000001      /* Allocating during early boot? */
 
 /* Only NUMA needs hash distribution.
- * IA64 is known to have sufficient vmalloc space.
+ * IA64 and x86_64 have sufficient vmalloc space.
  */
-#if defined(CONFIG_NUMA) && defined(CONFIG_IA64)
+#if defined(CONFIG_NUMA) && (defined(CONFIG_IA64) || defined(CONFIG_X86_64))
 #define HASHDIST_DEFAULT 1
 #else
 #define HASHDIST_DEFAULT 0
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 0899e2cdcdd1..963051a967d6 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -32,7 +32,15 @@
  *                     CPUFREQ NOTIFIER INTERFACE                    *
  *********************************************************************/
 
+#ifdef CONFIG_CPU_FREQ
 int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list);
+#else
+static inline int cpufreq_register_notifier(struct notifier_block *nb,
+                                                unsigned int list)
+{
+        return 0;
+}
+#endif
 int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list);
 
 #define CPUFREQ_TRANSITION_NOTIFIER     (0)
@@ -257,21 +265,25 @@ struct freq_attr {
 /*********************************************************************
  *                        CPUFREQ 2.6. INTERFACE                     *
  *********************************************************************/
-int cpufreq_set_policy(struct cpufreq_policy *policy);
 int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu);
 int cpufreq_update_policy(unsigned int cpu);
 
-/* query the current CPU frequency (in kHz). If zero, cpufreq couldn't detect it */
-unsigned int cpufreq_get(unsigned int cpu);
 
-/* query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it */
+/*
+ * query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it
+ */
 #ifdef CONFIG_CPU_FREQ
 unsigned int cpufreq_quick_get(unsigned int cpu);
+unsigned int cpufreq_get(unsigned int cpu);
 #else
 static inline unsigned int cpufreq_quick_get(unsigned int cpu)
 {
         return 0;
 }
+static inline unsigned int cpufreq_get(unsigned int cpu)
+{
+        return 0;
+}
 #endif
 
 
diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h
index 32503657f14f..22c7ac5cd80c 100644
--- a/include/linux/crash_dump.h
+++ b/include/linux/crash_dump.h
@@ -14,5 +14,13 @@ extern ssize_t copy_oldmem_page(unsigned long, char *, size_t,
 extern const struct file_operations proc_vmcore_operations;
 extern struct proc_dir_entry *proc_vmcore;
 
+/* Architecture code defines this if there are other possible ELF
+ * machine types, e.g. on bi-arch capable hardware. */
+#ifndef vmcore_elf_check_arch_cross
+#define vmcore_elf_check_arch_cross(x) 0
+#endif
+
+#define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x))
+
 #endif /* CONFIG_CRASH_DUMP */
 #endif /* LINUX_CRASHDUMP_H */
diff --git a/include/linux/crypto.h b/include/linux/crypto.h
index 779aa78ee643..0de7e2ace822 100644
--- a/include/linux/crypto.h
+++ b/include/linux/crypto.h
@@ -56,6 +56,7 @@
 
 #define CRYPTO_TFM_REQ_WEAK_KEY         0x00000100
 #define CRYPTO_TFM_REQ_MAY_SLEEP        0x00000200
+#define CRYPTO_TFM_REQ_MAY_BACKLOG      0x00000400
 #define CRYPTO_TFM_RES_WEAK_KEY         0x00100000
 #define CRYPTO_TFM_RES_BAD_KEY_LEN      0x00200000
 #define CRYPTO_TFM_RES_BAD_KEY_SCHED    0x00400000
@@ -88,11 +89,38 @@
 #endif
 
 struct scatterlist;
+struct crypto_ablkcipher;
+struct crypto_async_request;
 struct crypto_blkcipher;
 struct crypto_hash;
+struct crypto_queue;
 struct crypto_tfm;
 struct crypto_type;
 
+typedef void (*crypto_completion_t)(struct crypto_async_request *req, int err);
+
+struct crypto_async_request {
+        struct list_head list;
+        crypto_completion_t complete;
+        void *data;
+        struct crypto_tfm *tfm;
+
+        u32 flags;
+};
+
+struct ablkcipher_request {
+        struct crypto_async_request base;
+
+        unsigned int nbytes;
+
+        void *info;
+
+        struct scatterlist *src;
+        struct scatterlist *dst;
+
+        void *__ctx[] CRYPTO_MINALIGN_ATTR;
+};
+
 struct blkcipher_desc {
         struct crypto_blkcipher *tfm;
         void *info;
@@ -116,6 +144,19 @@ struct hash_desc {
  * Algorithms: modular crypto algorithm implementations, managed
  * via crypto_register_alg() and crypto_unregister_alg().
  */
+struct ablkcipher_alg {
+        int (*setkey)(struct crypto_ablkcipher *tfm, const u8 *key,
+                      unsigned int keylen);
+        int (*encrypt)(struct ablkcipher_request *req);
+        int (*decrypt)(struct ablkcipher_request *req);
+
+        struct crypto_queue *queue;
+
+        unsigned int min_keysize;
+        unsigned int max_keysize;
+        unsigned int ivsize;
+};
+
 struct blkcipher_alg {
         int (*setkey)(struct crypto_tfm *tfm, const u8 *key,
                       unsigned int keylen);
@@ -170,6 +211,7 @@ struct compress_alg {
                               unsigned int slen, u8 *dst, unsigned int *dlen);
 };
 
+#define cra_ablkcipher  cra_u.ablkcipher
 #define cra_blkcipher   cra_u.blkcipher
 #define cra_cipher      cra_u.cipher
 #define cra_digest      cra_u.digest
@@ -194,6 +236,7 @@ struct crypto_alg {
         const struct crypto_type *cra_type;
 
         union {
+                struct ablkcipher_alg ablkcipher;
                 struct blkcipher_alg blkcipher;
                 struct cipher_alg cipher;
                 struct digest_alg digest;
@@ -232,6 +275,15 @@ static inline int crypto_has_alg(const char *name, u32 type, u32 mask)
  * crypto_free_*(), as well as the various helpers below.
  */
 
+struct ablkcipher_tfm {
+        int (*setkey)(struct crypto_ablkcipher *tfm, const u8 *key,
+                      unsigned int keylen);
+        int (*encrypt)(struct ablkcipher_request *req);
+        int (*decrypt)(struct ablkcipher_request *req);
+        unsigned int ivsize;
+        unsigned int reqsize;
+};
+
 struct blkcipher_tfm {
         void *iv;
         int (*setkey)(struct crypto_tfm *tfm, const u8 *key,
@@ -290,6 +342,7 @@ struct compress_tfm {
                               u8 *dst, unsigned int *dlen);
 };
 
+#define crt_ablkcipher  crt_u.ablkcipher
 #define crt_blkcipher   crt_u.blkcipher
 #define crt_cipher      crt_u.cipher
 #define crt_hash        crt_u.hash
@@ -300,6 +353,7 @@ struct crypto_tfm {
         u32 crt_flags;
         
         union {
+                struct ablkcipher_tfm ablkcipher;
                 struct blkcipher_tfm blkcipher;
                 struct cipher_tfm cipher;
                 struct hash_tfm hash;
@@ -311,6 +365,10 @@ struct crypto_tfm {
         void *__crt_ctx[] CRYPTO_MINALIGN_ATTR;
 };
 
+struct crypto_ablkcipher {
+        struct crypto_tfm base;
+};
+
 struct crypto_blkcipher {
         struct crypto_tfm base;
 };
@@ -330,12 +388,21 @@ struct crypto_hash {
 enum {
         CRYPTOA_UNSPEC,
         CRYPTOA_ALG,
+        CRYPTOA_TYPE,
+        __CRYPTOA_MAX,
 };
 
+#define CRYPTOA_MAX (__CRYPTOA_MAX - 1)
+
 struct crypto_attr_alg {
         char name[CRYPTO_MAX_ALG_NAME];
 };
 
+struct crypto_attr_type {
+        u32 type;
+        u32 mask;
+};
+
 /* 
  * Transform user interface.
  */
@@ -411,6 +478,167 @@ static inline unsigned int crypto_tfm_ctx_alignment(void)
 /*
  * API wrappers.
  */
+static inline struct crypto_ablkcipher *__crypto_ablkcipher_cast(
+        struct crypto_tfm *tfm)
+{
+        return (struct crypto_ablkcipher *)tfm;
+}
+
+static inline struct crypto_ablkcipher *crypto_alloc_ablkcipher(
+        const char *alg_name, u32 type, u32 mask)
+{
+        type &= ~CRYPTO_ALG_TYPE_MASK;
+        type |= CRYPTO_ALG_TYPE_BLKCIPHER;
+        mask |= CRYPTO_ALG_TYPE_MASK;
+
+        return __crypto_ablkcipher_cast(
+                crypto_alloc_base(alg_name, type, mask));
+}
+
+static inline struct crypto_tfm *crypto_ablkcipher_tfm(
+        struct crypto_ablkcipher *tfm)
+{
+        return &tfm->base;
+}
+
+static inline void crypto_free_ablkcipher(struct crypto_ablkcipher *tfm)
+{
+        crypto_free_tfm(crypto_ablkcipher_tfm(tfm));
+}
+
+static inline int crypto_has_ablkcipher(const char *alg_name, u32 type,
+                                        u32 mask)
+{
+        type &= ~CRYPTO_ALG_TYPE_MASK;
+        type |= CRYPTO_ALG_TYPE_BLKCIPHER;
+        mask |= CRYPTO_ALG_TYPE_MASK;
+
+        return crypto_has_alg(alg_name, type, mask);
+}
+
+static inline struct ablkcipher_tfm *crypto_ablkcipher_crt(
+        struct crypto_ablkcipher *tfm)
+{
+        return &crypto_ablkcipher_tfm(tfm)->crt_ablkcipher;
+}
+
+static inline unsigned int crypto_ablkcipher_ivsize(
+        struct crypto_ablkcipher *tfm)
+{
+        return crypto_ablkcipher_crt(tfm)->ivsize;
+}
+
+static inline unsigned int crypto_ablkcipher_blocksize(
+        struct crypto_ablkcipher *tfm)
+{
+        return crypto_tfm_alg_blocksize(crypto_ablkcipher_tfm(tfm));
+}
+
+static inline unsigned int crypto_ablkcipher_alignmask(
+        struct crypto_ablkcipher *tfm)
+{
+        return crypto_tfm_alg_alignmask(crypto_ablkcipher_tfm(tfm));
+}
+
+static inline u32 crypto_ablkcipher_get_flags(struct crypto_ablkcipher *tfm)
+{
+        return crypto_tfm_get_flags(crypto_ablkcipher_tfm(tfm));
+}
+
+static inline void crypto_ablkcipher_set_flags(struct crypto_ablkcipher *tfm,
+                                               u32 flags)
+{
+        crypto_tfm_set_flags(crypto_ablkcipher_tfm(tfm), flags);
+}
+
+static inline void crypto_ablkcipher_clear_flags(struct crypto_ablkcipher *tfm,
+                                                 u32 flags)
+{
+        crypto_tfm_clear_flags(crypto_ablkcipher_tfm(tfm), flags);
+}
+
+static inline int crypto_ablkcipher_setkey(struct crypto_ablkcipher *tfm,
+                                           const u8 *key, unsigned int keylen)
+{
+        return crypto_ablkcipher_crt(tfm)->setkey(tfm, key, keylen);
+}
+
+static inline struct crypto_ablkcipher *crypto_ablkcipher_reqtfm(
+        struct ablkcipher_request *req)
+{
+        return __crypto_ablkcipher_cast(req->base.tfm);
+}
+
+static inline int crypto_ablkcipher_encrypt(struct ablkcipher_request *req)
+{
+        struct ablkcipher_tfm *crt =
+                crypto_ablkcipher_crt(crypto_ablkcipher_reqtfm(req));
+        return crt->encrypt(req);
+}
+
+static inline int crypto_ablkcipher_decrypt(struct ablkcipher_request *req)
+{
+        struct ablkcipher_tfm *crt =
+                crypto_ablkcipher_crt(crypto_ablkcipher_reqtfm(req));
+        return crt->decrypt(req);
+}
+
+static inline int crypto_ablkcipher_reqsize(struct crypto_ablkcipher *tfm)
+{
+        return crypto_ablkcipher_crt(tfm)->reqsize;
+}
+
+static inline void ablkcipher_request_set_tfm(
+        struct ablkcipher_request *req, struct crypto_ablkcipher *tfm)
+{
+        req->base.tfm = crypto_ablkcipher_tfm(tfm);
+}
+
+static inline struct ablkcipher_request *ablkcipher_request_cast(
+        struct crypto_async_request *req)
+{
+        return container_of(req, struct ablkcipher_request, base);
+}
+
+static inline struct ablkcipher_request *ablkcipher_request_alloc(
+        struct crypto_ablkcipher *tfm, gfp_t gfp)
+{
+        struct ablkcipher_request *req;
+
+        req = kmalloc(sizeof(struct ablkcipher_request) +
+                      crypto_ablkcipher_reqsize(tfm), gfp);
+
+        if (likely(req))
+                ablkcipher_request_set_tfm(req, tfm);
+
+        return req;
+}
+
+static inline void ablkcipher_request_free(struct ablkcipher_request *req)
+{
+        kfree(req);
+}
+
+static inline void ablkcipher_request_set_callback(
+        struct ablkcipher_request *req,
+        u32 flags, crypto_completion_t complete, void *data)
+{
+        req->base.complete = complete;
+        req->base.data = data;
+        req->base.flags = flags;
+}
+
+static inline void ablkcipher_request_set_crypt(
+        struct ablkcipher_request *req,
+        struct scatterlist *src, struct scatterlist *dst,
+        unsigned int nbytes, void *iv)
+{
+        req->src = src;
+        req->dst = dst;
+        req->nbytes = nbytes;
+        req->info = iv;
+}
+
 static inline struct crypto_blkcipher *__crypto_blkcipher_cast(
         struct crypto_tfm *tfm)
 {
@@ -427,9 +655,9 @@ static inline struct crypto_blkcipher *crypto_blkcipher_cast(
 static inline struct crypto_blkcipher *crypto_alloc_blkcipher(
         const char *alg_name, u32 type, u32 mask)
 {
-        type &= ~CRYPTO_ALG_TYPE_MASK;
+        type &= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC);
         type |= CRYPTO_ALG_TYPE_BLKCIPHER;
-        mask |= CRYPTO_ALG_TYPE_MASK;
+        mask |= CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC;
 
         return __crypto_blkcipher_cast(crypto_alloc_base(alg_name, type, mask));
 }
@@ -447,9 +675,9 @@ static inline void crypto_free_blkcipher(struct crypto_blkcipher *tfm)
 
 static inline int crypto_has_blkcipher(const char *alg_name, u32 type, u32 mask)
 {
-        type &= ~CRYPTO_ALG_TYPE_MASK;
+        type &= ~(CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC);
         type |= CRYPTO_ALG_TYPE_BLKCIPHER;
-        mask |= CRYPTO_ALG_TYPE_MASK;
+        mask |= CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_ASYNC;
 
         return crypto_has_alg(alg_name, type, mask);
 }
diff --git a/include/linux/device.h b/include/linux/device.h
index a0cd2ced31a9..6579068134d1 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -53,7 +53,7 @@ struct bus_type {
         const char              * name;
         struct module           * owner;
 
-        struct subsystem        subsys;
+        struct kset             subsys;
         struct kset             drivers;
         struct kset             devices;
         struct klist            klist_devices;
@@ -80,7 +80,6 @@ struct bus_type {
         int (*resume)(struct device * dev);
 
         unsigned int drivers_autoprobe:1;
-        unsigned int multithread_probe:1;
 };
 
 extern int __must_check bus_register(struct bus_type * bus);
@@ -179,7 +178,7 @@ struct class {
         const char              * name;
         struct module           * owner;
 
-        struct subsystem        subsys;
+        struct kset             subsys;
         struct list_head        children;
         struct list_head        devices;
         struct list_head        interfaces;
@@ -559,8 +558,8 @@ extern void device_shutdown(void);
 
 
 /* drivers/base/firmware.c */
-extern int __must_check firmware_register(struct subsystem *);
-extern void firmware_unregister(struct subsystem *);
+extern int __must_check firmware_register(struct kset *);
+extern void firmware_unregister(struct kset *);
 
 /* debugging and troubleshooting/diagnostic helpers. */
 extern const char *dev_driver_string(struct device *dev);
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 60713e6ea297..8b17ffe222c4 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -83,6 +83,23 @@ typedef __s64	Elf64_Sxword;
 #define DT_DEBUG        21
 #define DT_TEXTREL      22
 #define DT_JMPREL       23
+#define DT_ENCODING     32
+#define OLD_DT_LOOS     0x60000000
+#define DT_LOOS         0x6000000d
+#define DT_HIOS         0x6ffff000
+#define DT_VALRNGLO     0x6ffffd00
+#define DT_VALRNGHI     0x6ffffdff
+#define DT_ADDRRNGLO    0x6ffffe00
+#define DT_ADDRRNGHI    0x6ffffeff
+#define DT_VERSYM       0x6ffffff0
+#define DT_RELACOUNT    0x6ffffff9
+#define DT_RELCOUNT     0x6ffffffa
+#define DT_FLAGS_1      0x6ffffffb
+#define DT_VERDEF       0x6ffffffc
+#define DT_VERDEFNUM    0x6ffffffd
+#define DT_VERNEED      0x6ffffffe
+#define DT_VERNEEDNUM   0x6fffffff
+#define OLD_DT_HIOS     0x6fffffff
 #define DT_LOPROC       0x70000000
 #define DT_HIPROC       0x7fffffff
 
diff --git a/include/linux/elfnote.h b/include/linux/elfnote.h
index 67396db141e8..9a1e0674e56c 100644
--- a/include/linux/elfnote.h
+++ b/include/linux/elfnote.h
@@ -39,12 +39,12 @@
  *      ELFNOTE(XYZCo, 12, .long, 0xdeadbeef)
  */
 #define ELFNOTE(name, type, desctype, descdata) \
-.pushsection .note.name                 ;       \
+.pushsection .note.name, "",@note       ;       \
   .align 4                              ;       \
   .long 2f - 1f         /* namesz */    ;       \
   .long 4f - 3f         /* descsz */    ;       \
   .long type                            ;       \
-1:.asciz "name"                         ;       \
+1:.asciz #name                          ;       \
 2:.align 4                              ;       \
 3:desctype descdata                     ;       \
 4:.align 4                              ;       \
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index c6310aef5ab0..f2d248f8cc92 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -434,6 +434,7 @@ struct ethtool_ops {
 #define SUPPORTED_10000baseT_Full       (1 << 12)
 #define SUPPORTED_Pause                 (1 << 13)
 #define SUPPORTED_Asym_Pause            (1 << 14)
+#define SUPPORTED_2500baseX_Full        (1 << 15)
 
 /* Indicates what features are advertised by the interface. */
 #define ADVERTISED_10baseT_Half         (1 << 0)
@@ -451,6 +452,7 @@ struct ethtool_ops {
 #define ADVERTISED_10000baseT_Full      (1 << 12)
 #define ADVERTISED_Pause                (1 << 13)
 #define ADVERTISED_Asym_Pause           (1 << 14)
+#define ADVERTISED_2500baseX_Full       (1 << 15)
 
 /* The following are all involved in forcing a particular link
  * mode for the device for setting things.  When getting the
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 095a9c9a64fb..7c0077f06e24 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -1416,7 +1416,7 @@ extern void mnt_set_mountpoint(struct vfsmount *, struct dentry *,
 extern int vfs_statfs(struct dentry *, struct kstatfs *);
 
 /* /sys/fs */
-extern struct subsystem fs_subsys;
+extern struct kset fs_subsys;
 
 #define FLOCK_VERIFY_READ  1
 #define FLOCK_VERIFY_WRITE 2
diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
index 2b217c7b9312..265d17830a0f 100644
--- a/include/linux/gpio_keys.h
+++ b/include/linux/gpio_keys.h
@@ -3,10 +3,11 @@
 
 struct gpio_keys_button {
         /* Configuration parameters */
-        int keycode;
+        int code;               /* input event code (KEY_*, SW_*) */
         int gpio;
         int active_low;
         char *desc;
+        int type;               /* input event type (EV_KEY, EV_SW) */
 };
 
 struct gpio_keys_platform_data {
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index 645d440807c2..a515eb0afdfb 100644
--- a/include/linux/highmem.h
+++ b/include/linux/highmem.h
@@ -27,6 +27,8 @@ static inline void flush_kernel_dcache_page(struct page *page)
 unsigned int nr_free_highpages(void);
 extern unsigned long totalhigh_pages;
 
+void kmap_flush_unused(void);
+
 #else /* CONFIG_HIGHMEM */
 
 static inline unsigned int nr_free_highpages(void) { return 0; }
@@ -42,11 +44,20 @@ static inline void *kmap(struct page *page)
 
 #define kunmap(page) do { (void) (page); } while (0)
 
-#define kmap_atomic(page, idx) \
-        ({ pagefault_disable(); page_address(page); })
+#include <asm/kmap_types.h>
+
+static inline void *kmap_atomic(struct page *page, enum km_type idx)
+{
+        pagefault_disable();
+        return page_address(page);
+}
+#define kmap_atomic_prot(page, idx, prot)       kmap_atomic(page, idx)
+
 #define kunmap_atomic(addr, idx)        do { pagefault_enable(); } while (0)
 #define kmap_atomic_pfn(pfn, idx)       kmap_atomic(pfn_to_page(pfn), (idx))
 #define kmap_atomic_to_page(ptr)        virt_to_page(ptr)
+
+#define kmap_flush_unused()     do {} while(0)
 #endif
 
 #endif /* CONFIG_HIGHMEM */
diff --git a/include/linux/hp_sdc.h b/include/linux/hp_sdc.h
index debd71515312..9db3d454887f 100644
--- a/include/linux/hp_sdc.h
+++ b/include/linux/hp_sdc.h
@@ -71,6 +71,7 @@ typedef struct {
           struct semaphore *semaphore;  /* Semaphore to sleep on. */
         } act;
 } hp_sdc_transaction;
+int __hp_sdc_enqueue_transaction(hp_sdc_transaction *this);
 int hp_sdc_enqueue_transaction(hp_sdc_transaction *this);
 int hp_sdc_dequeue_transaction(hp_sdc_transaction *this);
 
diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h
index 937da70cb4c4..9ee0f800592f 100644
--- a/include/linux/i2c-algo-bit.h
+++ b/include/linux/i2c-algo-bit.h
@@ -38,11 +38,14 @@ struct i2c_algo_bit_data {
         int  (*getscl) (void *data);
 
         /* local settings */
-        int udelay;             /* half-clock-cycle time in microsecs */
-                                /* i.e. clock is (500 / udelay) KHz */
+        int udelay;             /* half clock cycle time in us,
+                                   minimum 2 us for fast-mode I2C,
+                                   minimum 5 us for standard-mode I2C and SMBus,
+                                   maximum 50 us for SMBus */
         int timeout;            /* in jiffies */
 };
 
 int i2c_bit_add_bus(struct i2c_adapter *);
+int i2c_bit_add_numbered_bus(struct i2c_adapter *);
 
 #endif /* _LINUX_I2C_ALGO_BIT_H */
diff --git a/include/linux/i2c-gpio.h b/include/linux/i2c-gpio.h
new file mode 100644
index 000000000000..c1bcb1f1d73b
--- /dev/null
+++ b/include/linux/i2c-gpio.h
@@ -0,0 +1,38 @@
+/*
+ * i2c-gpio interface to platform code
+ *
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _LINUX_I2C_GPIO_H
+#define _LINUX_I2C_GPIO_H
+
+/**
+ * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
+ * @sda_pin: GPIO pin ID to use for SDA
+ * @scl_pin: GPIO pin ID to use for SCL
+ * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
+ * @timeout: clock stretching timeout in jiffies. If the slave keeps
+ *      SCL low for longer than this, the transfer will time out.
+ * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin
+ *      isn't actively driven high when setting the output value high.
+ *      gpio_get_value() must return the actual pin state even if the
+ *      pin is configured as an output.
+ * @scl_is_open_drain: SCL is set up as open drain. Same requirements
+ *      as for sda_is_open_drain apply.
+ * @scl_is_output_only: SCL output drivers cannot be turned off.
+ */
+struct i2c_gpio_platform_data {
+        unsigned int    sda_pin;
+        unsigned int    scl_pin;
+        int             udelay;
+        int             timeout;
+        unsigned int    sda_is_open_drain:1;
+        unsigned int    scl_is_open_drain:1;
+        unsigned int    scl_is_output_only:1;
+};
+
+#endif /* _LINUX_I2C_GPIO_H */
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 9c21dc793d7b..0e8da684ce68 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -258,8 +258,9 @@
 /* --- MCP107 adapter */
 #define I2C_HW_MPC107           0x0d0000
 
-/* --- Marvell mv64xxx i2c adapter */
+/* --- Embedded adapters */
 #define I2C_HW_MV64XXX          0x190000
+#define I2C_HW_BLACKFIN         0x190001 /* ADI Blackfin I2C TWI driver */
 
 /* --- Miscellaneous adapters */
 #define I2C_HW_SAA7146          0x060000 /* SAA7146 video decoder bus */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 9428092017e3..cae7d618030c 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -35,11 +35,6 @@
 #include <linux/sched.h>        /* for completion */
 #include <linux/mutex.h>
 
-/* --- For i2c-isa ---------------------------------------------------- */
-
-extern void i2c_adapter_dev_release(struct device *dev);
-extern struct device_driver i2c_adapter_driver;
-extern struct class i2c_adapter_class;
 extern struct bus_type i2c_bus_type;
 
 /* --- General options ------------------------------------------------ */
@@ -87,6 +82,9 @@ extern s32 i2c_smbus_write_byte_data(struct i2c_client * client,
 extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command);
 extern s32 i2c_smbus_write_word_data(struct i2c_client * client,
                                      u8 command, u16 value);
+/* Returns the number of read bytes */
+extern s32 i2c_smbus_read_block_data(struct i2c_client *client,
+                                     u8 command, u8 *values);
 extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
                                       u8 command, u8 length,
                                       const u8 *values);
@@ -114,7 +112,7 @@ struct i2c_driver {
          * can be used by the driver to test if the bus meets its conditions
          * & seek for the presence of the chip(s) it supports. If found, it
          * registers the client(s) that are on the bus to the i2c admin. via
-         * i2c_attach_client.
+         * i2c_attach_client.  (LEGACY I2C DRIVERS ONLY)
          */
         int (*attach_adapter)(struct i2c_adapter *);
         int (*detach_adapter)(struct i2c_adapter *);
@@ -122,10 +120,17 @@ struct i2c_driver {
         /* tells the driver that a client is about to be deleted & gives it
          * the chance to remove its private data. Also, if the client struct
          * has been dynamically allocated by the driver in the function above,
-         * it must be freed here.
+         * it must be freed here.  (LEGACY I2C DRIVERS ONLY)
          */
         int (*detach_client)(struct i2c_client *);
 
+        /* Standard driver model interfaces, for "new style" i2c drivers.
+         * With the driver model, device enumeration is NEVER done by drivers;
+         * it's done by infrastructure.  (NEW STYLE DRIVERS ONLY)
+         */
+        int (*probe)(struct i2c_client *);
+        int (*remove)(struct i2c_client *);
+
         /* driver model interfaces that don't relate to enumeration  */
         void (*shutdown)(struct i2c_client *);
         int (*suspend)(struct i2c_client *, pm_message_t mesg);
@@ -141,25 +146,34 @@ struct i2c_driver {
 };
 #define to_i2c_driver(d) container_of(d, struct i2c_driver, driver)
 
-#define I2C_NAME_SIZE   50
+#define I2C_NAME_SIZE   20
 
-/*
- * i2c_client identifies a single device (i.e. chip) that is connected to an
- * i2c bus. The behaviour is defined by the routines of the driver. This
- * function is mainly used for lookup & other admin. functions.
+/**
+ * struct i2c_client - represent an I2C slave device
+ * @addr: Address used on the I2C bus connected to the parent adapter.
+ * @name: Indicates the type of the device, usually a chip name that's
+ *      generic enough to hide second-sourcing and compatible revisions.
+ * @dev: Driver model device node for the slave.
+ * @driver_name: Identifies new-style driver used with this device; also
+ *      used as the module name for hotplug/coldplug modprobe support.
+ *
+ * An i2c_client identifies a single device (i.e. chip) connected to an
+ * i2c bus. The behaviour is defined by the routines of the driver.
  */
 struct i2c_client {
-        unsigned int flags;             /* div., see below              */
+        unsigned short flags;           /* div., see below              */
         unsigned short addr;            /* chip address - NOTE: 7bit    */
                                         /* addresses are stored in the  */
                                         /* _LOWER_ 7 bits               */
+        char name[I2C_NAME_SIZE];
         struct i2c_adapter *adapter;    /* the adapter we sit on        */
         struct i2c_driver *driver;      /* and our access routines      */
         int usage_count;                /* How many accesses currently  */
                                         /* to the client                */
         struct device dev;              /* the device structure         */
+        int irq;                        /* irq issued by device (or -1) */
+        char driver_name[KOBJ_NAME_LEN];
         struct list_head list;
-        char name[I2C_NAME_SIZE];
         struct completion released;
 };
 #define to_i2c_client(d) container_of(d, struct i2c_client, dev)
@@ -179,6 +193,76 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data)
         dev_set_drvdata (&dev->dev, data);
 }
 
+/**
+ * struct i2c_board_info - template for device creation
+ * @driver_name: identifies the driver to be bound to the device
+ * @type: optional chip type information, to initialize i2c_client.name
+ * @flags: to initialize i2c_client.flags
+ * @addr: stored in i2c_client.addr
+ * @platform_data: stored in i2c_client.dev.platform_data
+ * @irq: stored in i2c_client.irq
+
+ * I2C doesn't actually support hardware probing, although controllers and
+ * devices may be able to use I2C_SMBUS_QUICK to tell whether or not there's
+ * a device at a given address.  Drivers commonly need more information than
+ * that, such as chip type, configuration, associated IRQ, and so on.
+ *
+ * i2c_board_info is used to build tables of information listing I2C devices
+ * that are present.  This information is used to grow the driver model tree
+ * for "new style" I2C drivers.  For mainboards this is done statically using
+ * i2c_register_board_info(), where @bus_num represents an adapter that isn't
+ * yet available.  For add-on boards, i2c_new_device() does this dynamically
+ * with the adapter already known.
+ */
+struct i2c_board_info {
+        char            driver_name[KOBJ_NAME_LEN];
+        char            type[I2C_NAME_SIZE];
+        unsigned short  flags;
+        unsigned short  addr;
+        void            *platform_data;
+        int             irq;
+};
+
+/**
+ * I2C_BOARD_INFO - macro used to list an i2c device and its driver
+ * @driver: identifies the driver to use with the device
+ * @dev_addr: the device's address on the bus.
+ *
+ * This macro initializes essential fields of a struct i2c_board_info,
+ * declaring what has been provided on a particular board.  Optional
+ * fields (such as the chip type, its associated irq, or device-specific
+ * platform_data) are provided using conventional syntax.
+ */
+#define I2C_BOARD_INFO(driver,dev_addr) \
+        .driver_name = (driver), .addr = (dev_addr)
+
+
+/* Add-on boards should register/unregister their devices; e.g. a board
+ * with integrated I2C, a config eeprom, sensors, and a codec that's
+ * used in conjunction with the primary hardware.
+ */
+extern struct i2c_client *
+i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info);
+
+/* If you don't know the exact address of an I2C device, use this variant
+ * instead, which can probe for device presence in a list of possible
+ * addresses.
+ */
+extern struct i2c_client *
+i2c_new_probed_device(struct i2c_adapter *adap,
+                      struct i2c_board_info *info,
+                      unsigned short const *addr_list);
+
+extern void i2c_unregister_device(struct i2c_client *);
+
+/* Mainboard arch_initcall() code should register all its I2C devices.
+ * This is done at arch_initcall time, before declaring any i2c adapters.
+ * Modules for add-on boards must use other calls.
+ */
+extern int
+i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n);
+
+
 /*
  * The following structs are for those who like to implement new bus drivers:
  * i2c_algorithm is the interface to a class of hardware solutions which can
@@ -228,17 +312,14 @@ struct i2c_adapter {
         int timeout;
         int retries;
         struct device dev;              /* the adapter device */
-        struct class_device class_dev;  /* the class device */
 
         int nr;
         struct list_head clients;
         struct list_head list;
-        char name[I2C_NAME_SIZE];
+        char name[48];
         struct completion dev_released;
-        struct completion class_dev_released;
 };
-#define dev_to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
-#define class_dev_to_i2c_adapter(d) container_of(d, struct i2c_adapter, class_dev)
+#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
 
 static inline void *i2c_get_adapdata (struct i2c_adapter *dev)
 {
@@ -290,9 +371,10 @@ struct i2c_client_address_data {
  */
 extern int i2c_add_adapter(struct i2c_adapter *);
 extern int i2c_del_adapter(struct i2c_adapter *);
+extern int i2c_add_numbered_adapter(struct i2c_adapter *);
 
 extern int i2c_register_driver(struct module *, struct i2c_driver *);
-extern int i2c_del_driver(struct i2c_driver *);
+extern void i2c_del_driver(struct i2c_driver *);
 
 static inline int i2c_add_driver(struct i2c_driver *driver)
 {
@@ -365,6 +447,7 @@ struct i2c_msg {
 #define I2C_M_REV_DIR_ADDR      0x2000
 #define I2C_M_IGNORE_NAK        0x1000
 #define I2C_M_NO_RD_ACK         0x0800
+#define I2C_M_RECV_LEN          0x0400 /* length will be first received byte */
         __u16 len;              /* msg length                           */
         __u8 *buf;              /* pointer to msg data                  */
 };
diff --git a/include/linux/ide.h b/include/linux/ide.h
index d3bbc7188b6a..418dfb5adadd 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -613,7 +613,6 @@ typedef struct ide_drive_s {
 
         u8      quirk_list;     /* considered quirky, set for a specific host */
         u8      init_speed;     /* transfer rate set at boot */
-        u8      pio_speed;      /* unused by core, used by some drivers for fallback from DMA */
         u8      current_speed;  /* current transfer rate set */
         u8      desired_speed;  /* desired transfer rate set */
         u8      dn;             /* now wide spread use */
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
new file mode 100644
index 000000000000..ecd61e8438a5
--- /dev/null
+++ b/include/linux/ieee80211.h
@@ -0,0 +1,342 @@
+/*
+ * IEEE 802.11 defines
+ *
+ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+ * <jkmaline@cc.hut.fi>
+ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+ * Copyright (c) 2005, Devicescape Software, Inc.
+ * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef IEEE80211_H
+#define IEEE80211_H
+
+#include <linux/types.h>
+
+#define FCS_LEN 4
+
+#define IEEE80211_FCTL_VERS             0x0003
+#define IEEE80211_FCTL_FTYPE            0x000c
+#define IEEE80211_FCTL_STYPE            0x00f0
+#define IEEE80211_FCTL_TODS             0x0100
+#define IEEE80211_FCTL_FROMDS           0x0200
+#define IEEE80211_FCTL_MOREFRAGS        0x0400
+#define IEEE80211_FCTL_RETRY            0x0800
+#define IEEE80211_FCTL_PM               0x1000
+#define IEEE80211_FCTL_MOREDATA         0x2000
+#define IEEE80211_FCTL_PROTECTED        0x4000
+#define IEEE80211_FCTL_ORDER            0x8000
+
+#define IEEE80211_SCTL_FRAG             0x000F
+#define IEEE80211_SCTL_SEQ              0xFFF0
+
+#define IEEE80211_FTYPE_MGMT            0x0000
+#define IEEE80211_FTYPE_CTL             0x0004
+#define IEEE80211_FTYPE_DATA            0x0008
+
+/* management */
+#define IEEE80211_STYPE_ASSOC_REQ       0x0000
+#define IEEE80211_STYPE_ASSOC_RESP      0x0010
+#define IEEE80211_STYPE_REASSOC_REQ     0x0020
+#define IEEE80211_STYPE_REASSOC_RESP    0x0030
+#define IEEE80211_STYPE_PROBE_REQ       0x0040
+#define IEEE80211_STYPE_PROBE_RESP      0x0050
+#define IEEE80211_STYPE_BEACON          0x0080
+#define IEEE80211_STYPE_ATIM            0x0090
+#define IEEE80211_STYPE_DISASSOC        0x00A0
+#define IEEE80211_STYPE_AUTH            0x00B0
+#define IEEE80211_STYPE_DEAUTH          0x00C0
+#define IEEE80211_STYPE_ACTION          0x00D0
+
+/* control */
+#define IEEE80211_STYPE_PSPOLL          0x00A0
+#define IEEE80211_STYPE_RTS             0x00B0
+#define IEEE80211_STYPE_CTS             0x00C0
+#define IEEE80211_STYPE_ACK             0x00D0
+#define IEEE80211_STYPE_CFEND           0x00E0
+#define IEEE80211_STYPE_CFENDACK        0x00F0
+
+/* data */
+#define IEEE80211_STYPE_DATA                    0x0000
+#define IEEE80211_STYPE_DATA_CFACK              0x0010
+#define IEEE80211_STYPE_DATA_CFPOLL             0x0020
+#define IEEE80211_STYPE_DATA_CFACKPOLL          0x0030
+#define IEEE80211_STYPE_NULLFUNC                0x0040
+#define IEEE80211_STYPE_CFACK                   0x0050
+#define IEEE80211_STYPE_CFPOLL                  0x0060
+#define IEEE80211_STYPE_CFACKPOLL               0x0070
+#define IEEE80211_STYPE_QOS_DATA                0x0080
+#define IEEE80211_STYPE_QOS_DATA_CFACK          0x0090
+#define IEEE80211_STYPE_QOS_DATA_CFPOLL         0x00A0
+#define IEEE80211_STYPE_QOS_DATA_CFACKPOLL      0x00B0
+#define IEEE80211_STYPE_QOS_NULLFUNC            0x00C0
+#define IEEE80211_STYPE_QOS_CFACK               0x00D0
+#define IEEE80211_STYPE_QOS_CFPOLL              0x00E0
+#define IEEE80211_STYPE_QOS_CFACKPOLL           0x00F0
+
+
+/* miscellaneous IEEE 802.11 constants */
+#define IEEE80211_MAX_FRAG_THRESHOLD    2346
+#define IEEE80211_MAX_RTS_THRESHOLD     2347
+#define IEEE80211_MAX_AID               2007
+#define IEEE80211_MAX_TIM_LEN           251
+#define IEEE80211_MAX_DATA_LEN          2304
+/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
+   6.2.1.1.2.
+
+   The figure in section 7.1.2 suggests a body size of up to 2312
+   bytes is allowed, which is a bit confusing, I suspect this
+   represents the 2304 bytes of real data, plus a possible 8 bytes of
+   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
+
+#define IEEE80211_MAX_SSID_LEN          32
+
+struct ieee80211_hdr {
+        __le16 frame_control;
+        __le16 duration_id;
+        u8 addr1[6];
+        u8 addr2[6];
+        u8 addr3[6];
+        __le16 seq_ctrl;
+        u8 addr4[6];
+} __attribute__ ((packed));
+
+
+struct ieee80211_mgmt {
+        __le16 frame_control;
+        __le16 duration;
+        u8 da[6];
+        u8 sa[6];
+        u8 bssid[6];
+        __le16 seq_ctrl;
+        union {
+                struct {
+                        __le16 auth_alg;
+                        __le16 auth_transaction;
+                        __le16 status_code;
+                        /* possibly followed by Challenge text */
+                        u8 variable[0];
+                } __attribute__ ((packed)) auth;
+                struct {
+                        __le16 reason_code;
+                } __attribute__ ((packed)) deauth;
+                struct {
+                        __le16 capab_info;
+                        __le16 listen_interval;
+                        /* followed by SSID and Supported rates */
+                        u8 variable[0];
+                } __attribute__ ((packed)) assoc_req;
+                struct {
+                        __le16 capab_info;
+                        __le16 status_code;
+                        __le16 aid;
+                        /* followed by Supported rates */
+                        u8 variable[0];
+                } __attribute__ ((packed)) assoc_resp, reassoc_resp;
+                struct {
+                        __le16 capab_info;
+                        __le16 listen_interval;
+                        u8 current_ap[6];
+                        /* followed by SSID and Supported rates */
+                        u8 variable[0];
+                } __attribute__ ((packed)) reassoc_req;
+                struct {
+                        __le16 reason_code;
+                } __attribute__ ((packed)) disassoc;
+                struct {
+                        __le64 timestamp;
+                        __le16 beacon_int;
+                        __le16 capab_info;
+                        /* followed by some of SSID, Supported rates,
+                         * FH Params, DS Params, CF Params, IBSS Params, TIM */
+                        u8 variable[0];
+                } __attribute__ ((packed)) beacon;
+                struct {
+                        /* only variable items: SSID, Supported rates */
+                        u8 variable[0];
+                } __attribute__ ((packed)) probe_req;
+                struct {
+                        __le64 timestamp;
+                        __le16 beacon_int;
+                        __le16 capab_info;
+                        /* followed by some of SSID, Supported rates,
+                         * FH Params, DS Params, CF Params, IBSS Params */
+                        u8 variable[0];
+                } __attribute__ ((packed)) probe_resp;
+                struct {
+                        u8 category;
+                        union {
+                                struct {
+                                        u8 action_code;
+                                        u8 dialog_token;
+                                        u8 status_code;
+                                        u8 variable[0];
+                                } __attribute__ ((packed)) wme_action;
+                                struct{
+                                        u8 action_code;
+                                        u8 element_id;
+                                        u8 length;
+                                        u8 switch_mode;
+                                        u8 new_chan;
+                                        u8 switch_count;
+                                } __attribute__((packed)) chan_switch;
+                        } u;
+                } __attribute__ ((packed)) action;
+        } u;
+} __attribute__ ((packed));
+
+
+/* Control frames */
+struct ieee80211_rts {
+        __le16 frame_control;
+        __le16 duration;
+        u8 ra[6];
+        u8 ta[6];
+} __attribute__ ((packed));
+
+struct ieee80211_cts {
+        __le16 frame_control;
+        __le16 duration;
+        u8 ra[6];
+} __attribute__ ((packed));
+
+
+/* Authentication algorithms */
+#define WLAN_AUTH_OPEN 0
+#define WLAN_AUTH_SHARED_KEY 1
+#define WLAN_AUTH_FAST_BSS_TRANSITION 2
+#define WLAN_AUTH_LEAP 128
+
+#define WLAN_AUTH_CHALLENGE_LEN 128
+
+#define WLAN_CAPABILITY_ESS             (1<<0)
+#define WLAN_CAPABILITY_IBSS            (1<<1)
+#define WLAN_CAPABILITY_CF_POLLABLE     (1<<2)
+#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
+#define WLAN_CAPABILITY_PRIVACY         (1<<4)
+#define WLAN_CAPABILITY_SHORT_PREAMBLE  (1<<5)
+#define WLAN_CAPABILITY_PBCC            (1<<6)
+#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
+/* 802.11h */
+#define WLAN_CAPABILITY_SPECTRUM_MGMT   (1<<8)
+#define WLAN_CAPABILITY_QOS             (1<<9)
+#define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10)
+#define WLAN_CAPABILITY_DSSS_OFDM       (1<<13)
+
+/* Status codes */
+enum ieee80211_statuscode {
+        WLAN_STATUS_SUCCESS = 0,
+        WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
+        WLAN_STATUS_CAPS_UNSUPPORTED = 10,
+        WLAN_STATUS_REASSOC_NO_ASSOC = 11,
+        WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
+        WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
+        WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
+        WLAN_STATUS_CHALLENGE_FAIL = 15,
+        WLAN_STATUS_AUTH_TIMEOUT = 16,
+        WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
+        WLAN_STATUS_ASSOC_DENIED_RATES = 18,
+        /* 802.11b */
+        WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
+        WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
+        WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
+        /* 802.11h */
+        WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
+        WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
+        WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
+        /* 802.11g */
+        WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
+        WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
+        /* 802.11i */
+        WLAN_STATUS_INVALID_IE = 40,
+        WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
+        WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
+        WLAN_STATUS_INVALID_AKMP = 43,
+        WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
+        WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
+        WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
+};
+
+
+/* Reason codes */
+enum ieee80211_reasoncode {
+        WLAN_REASON_UNSPECIFIED = 1,
+        WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
+        WLAN_REASON_DEAUTH_LEAVING = 3,
+        WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
+        WLAN_REASON_DISASSOC_AP_BUSY = 5,
+        WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
+        WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
+        WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
+        WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
+        /* 802.11h */
+        WLAN_REASON_DISASSOC_BAD_POWER = 10,
+        WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
+        /* 802.11i */
+        WLAN_REASON_INVALID_IE = 13,
+        WLAN_REASON_MIC_FAILURE = 14,
+        WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
+        WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
+        WLAN_REASON_IE_DIFFERENT = 17,
+        WLAN_REASON_INVALID_GROUP_CIPHER = 18,
+        WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
+        WLAN_REASON_INVALID_AKMP = 20,
+        WLAN_REASON_UNSUPP_RSN_VERSION = 21,
+        WLAN_REASON_INVALID_RSN_IE_CAP = 22,
+        WLAN_REASON_IEEE8021X_FAILED = 23,
+        WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
+};
+
+
+/* Information Element IDs */
+enum ieee80211_eid {
+        WLAN_EID_SSID = 0,
+        WLAN_EID_SUPP_RATES = 1,
+        WLAN_EID_FH_PARAMS = 2,
+        WLAN_EID_DS_PARAMS = 3,
+        WLAN_EID_CF_PARAMS = 4,
+        WLAN_EID_TIM = 5,
+        WLAN_EID_IBSS_PARAMS = 6,
+        WLAN_EID_CHALLENGE = 16,
+        /* 802.11d */
+        WLAN_EID_COUNTRY = 7,
+        WLAN_EID_HP_PARAMS = 8,
+        WLAN_EID_HP_TABLE = 9,
+        WLAN_EID_REQUEST = 10,
+        /* 802.11h */
+        WLAN_EID_PWR_CONSTRAINT = 32,
+        WLAN_EID_PWR_CAPABILITY = 33,
+        WLAN_EID_TPC_REQUEST = 34,
+        WLAN_EID_TPC_REPORT = 35,
+        WLAN_EID_SUPPORTED_CHANNELS = 36,
+        WLAN_EID_CHANNEL_SWITCH = 37,
+        WLAN_EID_MEASURE_REQUEST = 38,
+        WLAN_EID_MEASURE_REPORT = 39,
+        WLAN_EID_QUIET = 40,
+        WLAN_EID_IBSS_DFS = 41,
+        /* 802.11g */
+        WLAN_EID_ERP_INFO = 42,
+        WLAN_EID_EXT_SUPP_RATES = 50,
+        /* 802.11i */
+        WLAN_EID_RSN = 48,
+        WLAN_EID_WPA = 221,
+        WLAN_EID_GENERIC = 221,
+        WLAN_EID_VENDOR_SPECIFIC = 221,
+        WLAN_EID_QOS_PARAMETER = 222
+};
+
+/* cipher suite selectors */
+#define WLAN_CIPHER_SUITE_USE_GROUP     0x000FAC00
+#define WLAN_CIPHER_SUITE_WEP40         0x000FAC01
+#define WLAN_CIPHER_SUITE_TKIP          0x000FAC02
+/* reserved:                            0x000FAC03 */
+#define WLAN_CIPHER_SUITE_CCMP          0x000FAC04
+#define WLAN_CIPHER_SUITE_WEP104        0x000FAC05
+
+#define WLAN_MAX_KEY_LEN                32
+
+#endif /* IEEE80211_H */
diff --git a/include/linux/init.h b/include/linux/init.h
index e290a010e3f2..9abf120ec9f8 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -52,9 +52,14 @@
 #endif
 
 /* For assembly routines */
+#ifdef CONFIG_HOTPLUG_CPU
+#define __INIT          .section        ".text","ax"
+#define __INITDATA      .section        ".data","aw"
+#else
 #define __INIT          .section        ".init.text","ax"
-#define __FINIT         .previous
 #define __INITDATA      .section        ".init.data","aw"
+#endif
+#define __FINIT         .previous
 
 #ifndef __ASSEMBLY__
 /*
diff --git a/include/linux/input-polldev.h b/include/linux/input-polldev.h
new file mode 100644
index 000000000000..597a0077b3c5
--- /dev/null
+++ b/include/linux/input-polldev.h
@@ -0,0 +1,46 @@
+#ifndef _INPUT_POLLDEV_H
+#define _INPUT_POLLDEV_H
+
+/*
+ * Copyright (c) 2007 Dmitry Torokhov
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <linux/input.h>
+#include <linux/workqueue.h>
+
+/**
+ * struct input_polled_dev - simple polled input device
+ * @private: private driver data
+ * @flush: driver-supplied method that flushes device's state upon
+ *      opening (optional)
+ * @poll: driver-supplied method that polls the device and posts
+ *      input events (mandatory).
+ * @poll_interval: specifies how often the poll() method shoudl be called.
+ * @input: input device structire associated with the polled device.
+ *      Must be properly initialized by the driver (id, name, phys, bits).
+ *
+ * Polled input device provides a skeleton for supporting simple input
+ * devices that do not raise interrupts but have to be periodically
+ * scanned or polled to detect changes in their state.
+ */
+struct input_polled_dev {
+        void *private;
+
+        void (*flush)(struct input_polled_dev *dev);
+        void (*poll)(struct input_polled_dev *dev);
+        unsigned int poll_interval; /* msec */
+
+        struct input_dev *input;
+        struct delayed_work work;
+};
+
+struct input_polled_dev *input_allocate_polled_device(void);
+void input_free_polled_device(struct input_polled_dev *dev);
+int input_register_polled_device(struct input_polled_dev *dev);
+void input_unregister_polled_device(struct input_polled_dev *dev);
+
+#endif
diff --git a/include/linux/input.h b/include/linux/input.h
index 13d510c3a5aa..be2bf3a2b031 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -506,6 +506,7 @@ struct input_absinfo {
 #define KEY_VOICEMAIL           0x1ac
 #define KEY_ADDRESSBOOK         0x1ad
 #define KEY_MESSENGER           0x1ae
+#define KEY_DISPLAYTOGGLE       0x1af   /* Turn display (LCD) on and off */
 
 #define KEY_DEL_EOL             0x1c0
 #define KEY_DEL_EOS             0x1c1
@@ -676,6 +677,7 @@ struct input_absinfo {
 #define BUS_I2C                 0x18
 #define BUS_HOST                0x19
 #define BUS_GSC                 0x1A
+#define BUS_ATARI               0x1B
 
 /*
  * Values describing the status of a force-feedback effect
@@ -913,33 +915,6 @@ struct ff_effect {
 #define BIT(x)  (1UL<<((x)%BITS_PER_LONG))
 #define LONG(x) ((x)/BITS_PER_LONG)
 
-#define INPUT_KEYCODE(dev, scancode) ((dev->keycodesize == 1) ? ((u8*)dev->keycode)[scancode] : \
-        ((dev->keycodesize == 2) ? ((u16*)dev->keycode)[scancode] : (((u32*)dev->keycode)[scancode])))
-
-#define SET_INPUT_KEYCODE(dev, scancode, val)                   \
-                ({      unsigned __old;                         \
-                switch (dev->keycodesize) {                     \
-                        case 1: {                               \
-                                u8 *k = (u8 *)dev->keycode;     \
-                                __old = k[scancode];            \
-                                k[scancode] = val;              \
-                                break;                          \
-                        }                                       \
-                        case 2: {                               \
-                                u16 *k = (u16 *)dev->keycode;   \
-                                __old = k[scancode];            \
-                                k[scancode] = val;              \
-                                break;                          \
-                        }                                       \
-                        default: {                              \
-                                u32 *k = (u32 *)dev->keycode;   \
-                                __old = k[scancode];            \
-                                k[scancode] = val;              \
-                                break;                          \
-                        }                                       \
-                }                                               \
-                __old; })
-
 struct input_dev {
 
         void *private;
@@ -962,6 +937,8 @@ struct input_dev {
         unsigned int keycodemax;
         unsigned int keycodesize;
         void *keycode;
+        int (*setkeycode)(struct input_dev *dev, int scancode, int keycode);
+        int (*getkeycode)(struct input_dev *dev, int scancode, int *keycode);
 
         struct ff_device *ff;
 
@@ -996,6 +973,9 @@ struct input_dev {
         unsigned int users;
 
         struct class_device cdev;
+        union {                 /* temporarily so while we switching to struct device */
+                struct device *parent;
+        } dev;
 
         struct list_head        h_list;
         struct list_head        node;
@@ -1078,7 +1058,7 @@ struct input_handler {
         void *private;
 
         void (*event)(struct input_handle *handle, unsigned int type, unsigned int code, int value);
-        struct input_handle* (*connect)(struct input_handler *handler, struct input_dev *dev, const struct input_device_id *id);
+        int (*connect)(struct input_handler *handler, struct input_dev *dev, const struct input_device_id *id);
         void (*disconnect)(struct input_handle *handle);
         void (*start)(struct input_handle *handle);
 
@@ -1108,7 +1088,7 @@ struct input_handle {
 };
 
 #define to_dev(n) container_of(n,struct input_dev,node)
-#define to_handler(n) container_of(n,struct input_handler,node);
+#define to_handler(n) container_of(n,struct input_handler,node)
 #define to_handle(n) container_of(n,struct input_handle,d_node)
 #define to_handle_h(n) container_of(n,struct input_handle,h_node)
 
@@ -1125,12 +1105,25 @@ static inline void input_put_device(struct input_dev *dev)
         class_device_put(&dev->cdev);
 }
 
+static inline void *input_get_drvdata(struct input_dev *dev)
+{
+        return dev->private;
+}
+
+static inline void input_set_drvdata(struct input_dev *dev, void *data)
+{
+        dev->private = data;
+}
+
 int input_register_device(struct input_dev *);
 void input_unregister_device(struct input_dev *);
 
 int input_register_handler(struct input_handler *);
 void input_unregister_handler(struct input_handler *);
 
+int input_register_handle(struct input_handle *);
+void input_unregister_handle(struct input_handle *);
+
 int input_grab_device(struct input_handle *);
 void input_release_device(struct input_handle *);
 
@@ -1172,6 +1165,8 @@ static inline void input_sync(struct input_dev *dev)
         input_event(dev, EV_SYN, SYN_REPORT, 0);
 }
 
+void input_set_capability(struct input_dev *dev, unsigned int type, unsigned int code);
+
 static inline void input_set_abs_params(struct input_dev *dev, int axis, int min, int max, int fuzz, int flat)
 {
         dev->absmin[axis] = min;
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 838cf5a5bd7f..0319f665dd3f 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -185,10 +185,14 @@ static inline int disable_irq_wake(unsigned int irq)
  * validator need to define the methods below in their asm/irq.h
  * files, under an #ifdef CONFIG_LOCKDEP section.
  */
-# ifndef CONFIG_LOCKDEP
+#ifndef CONFIG_LOCKDEP
 #  define disable_irq_nosync_lockdep(irq)       disable_irq_nosync(irq)
+#  define disable_irq_nosync_lockdep_irqsave(irq, flags) \
+                                                disable_irq_nosync(irq)
 #  define disable_irq_lockdep(irq)              disable_irq(irq)
 #  define enable_irq_lockdep(irq)               enable_irq(irq)
+#  define enable_irq_lockdep_irqrestore(irq, flags) \
+                                                enable_irq(irq)
 # endif
 
 #endif /* CONFIG_GENERIC_HARDIRQS */
diff --git a/include/linux/kobject.h b/include/linux/kobject.h
index eb0e63ef297f..c288e41ba331 100644
--- a/include/linux/kobject.h
+++ b/include/linux/kobject.h
@@ -124,7 +124,6 @@ struct kset_uevent_ops {
 };
 
 struct kset {
-        struct subsystem        * subsys;
         struct kobj_type        * ktype;
         struct list_head        list;
         spinlock_t              list_lock;
@@ -171,32 +170,23 @@ extern struct kobject * kset_find_obj(struct kset *, const char *);
 #define set_kset_name(str)      .kset = { .kobj = { .name = str } }
 
 
-
-struct subsystem {
-        struct kset             kset;
-};
-
 #define decl_subsys(_name,_type,_uevent_ops) \
-struct subsystem _name##_subsys = { \
-        .kset = { \
-                .kobj = { .name = __stringify(_name) }, \
-                .ktype = _type, \
-                .uevent_ops =_uevent_ops, \
-        } \
+struct kset _name##_subsys = { \
+        .kobj = { .name = __stringify(_name) }, \
+        .ktype = _type, \
+        .uevent_ops =_uevent_ops, \
 }
 #define decl_subsys_name(_varname,_name,_type,_uevent_ops) \
-struct subsystem _varname##_subsys = { \
-        .kset = { \
-                .kobj = { .name = __stringify(_name) }, \
-                .ktype = _type, \
-                .uevent_ops =_uevent_ops, \
-        } \
+struct kset _varname##_subsys = { \
+        .kobj = { .name = __stringify(_name) }, \
+        .ktype = _type, \
+        .uevent_ops =_uevent_ops, \
 }
 
 /* The global /sys/kernel/ subsystem for people to chain off of */
-extern struct subsystem kernel_subsys;
+extern struct kset kernel_subsys;
 /* The global /sys/hypervisor/ subsystem  */
-extern struct subsystem hypervisor_subsys;
+extern struct kset hypervisor_subsys;
 
 /**
  * Helpers for setting the kset of registered objects.
@@ -214,7 +204,7 @@ extern struct subsystem hypervisor_subsys;
  */
 
 #define kobj_set_kset_s(obj,subsys) \
-        (obj)->kobj.kset = &(subsys).kset
+        (obj)->kobj.kset = &(subsys)
 
 /**
  *      kset_set_kset_s(obj,subsys) - set kset for embedded kset.
@@ -228,7 +218,7 @@ extern struct subsystem hypervisor_subsys;
  */
 
 #define kset_set_kset_s(obj,subsys) \
-        (obj)->kset.kobj.kset = &(subsys).kset
+        (obj)->kset.kobj.kset = &(subsys)
 
 /**
  *      subsys_set_kset(obj,subsys) - set kset for subsystem
@@ -241,29 +231,31 @@ extern struct subsystem hypervisor_subsys;
  */
 
 #define subsys_set_kset(obj,_subsys) \
-        (obj)->subsys.kset.kobj.kset = &(_subsys).kset
+        (obj)->subsys.kobj.kset = &(_subsys)
 
-extern void subsystem_init(struct subsystem *);
-extern int __must_check subsystem_register(struct subsystem *);
-extern void subsystem_unregister(struct subsystem *);
+extern void subsystem_init(struct kset *);
+extern int __must_check subsystem_register(struct kset *);
+extern void subsystem_unregister(struct kset *);
 
-static inline struct subsystem * subsys_get(struct subsystem * s)
+static inline struct kset *subsys_get(struct kset *s)
 {
-        return s ? container_of(kset_get(&s->kset),struct subsystem,kset) : NULL;
+        if (s)
+                return kset_get(s);
+        return NULL;
 }
 
-static inline void subsys_put(struct subsystem * s)
+static inline void subsys_put(struct kset *s)
 {
-        kset_put(&s->kset);
+        kset_put(s);
 }
 
 struct subsys_attribute {
         struct attribute attr;
-        ssize_t (*show)(struct subsystem *, char *);
-        ssize_t (*store)(struct subsystem *, const char *, size_t); 
+        ssize_t (*show)(struct kset *, char *);
+        ssize_t (*store)(struct kset *, const char *, size_t);
 };
 
-extern int __must_check subsys_create_file(struct subsystem * ,
+extern int __must_check subsys_create_file(struct kset *,
                                         struct subsys_attribute *);
 
 #if defined(CONFIG_HOTPLUG)
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index 275354ffa1cb..e6edca81ab84 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -11,7 +11,7 @@
 #include <asm/types.h>
 #include <linux/ioctl.h>
 
-#define KVM_API_VERSION 4
+#define KVM_API_VERSION 12
 
 /*
  * Architectural interrupt line count, and the size of the bitmap needed
@@ -33,37 +33,39 @@ struct kvm_memory_region {
 /* for kvm_memory_region::flags */
 #define KVM_MEM_LOG_DIRTY_PAGES  1UL
 
-
-#define KVM_EXIT_TYPE_FAIL_ENTRY 1
-#define KVM_EXIT_TYPE_VM_EXIT    2
+struct kvm_memory_alias {
+        __u32 slot;  /* this has a different namespace than memory slots */
+        __u32 flags;
+        __u64 guest_phys_addr;
+        __u64 memory_size;
+        __u64 target_phys_addr;
+};
 
 enum kvm_exit_reason {
         KVM_EXIT_UNKNOWN          = 0,
         KVM_EXIT_EXCEPTION        = 1,
         KVM_EXIT_IO               = 2,
-        KVM_EXIT_CPUID            = 3,
+        KVM_EXIT_HYPERCALL        = 3,
         KVM_EXIT_DEBUG            = 4,
         KVM_EXIT_HLT              = 5,
         KVM_EXIT_MMIO             = 6,
         KVM_EXIT_IRQ_WINDOW_OPEN  = 7,
         KVM_EXIT_SHUTDOWN         = 8,
+        KVM_EXIT_FAIL_ENTRY       = 9,
+        KVM_EXIT_INTR             = 10,
 };
 
-/* for KVM_RUN */
+/* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
 struct kvm_run {
         /* in */
-        __u32 emulated;  /* skip current instruction */
-        __u32 mmio_completed; /* mmio request completed */
         __u8 request_interrupt_window;
         __u8 padding1[7];
 
         /* out */
-        __u32 exit_type;
         __u32 exit_reason;
-        __u32 instruction_length;
         __u8 ready_for_interrupt_injection;
         __u8 if_flag;
-        __u16 padding2;
+        __u8 padding2[2];
 
         /* in (pre_kvm_run), out (post_kvm_run) */
         __u64 cr8;
@@ -72,29 +74,26 @@ struct kvm_run {
         union {
                 /* KVM_EXIT_UNKNOWN */
                 struct {
-                        __u32 hardware_exit_reason;
+                        __u64 hardware_exit_reason;
                 } hw;
+                /* KVM_EXIT_FAIL_ENTRY */
+                struct {
+                        __u64 hardware_entry_failure_reason;
+                } fail_entry;
                 /* KVM_EXIT_EXCEPTION */
                 struct {
                         __u32 exception;
                         __u32 error_code;
                 } ex;
                 /* KVM_EXIT_IO */
-                struct {
+                struct kvm_io {
 #define KVM_EXIT_IO_IN  0
 #define KVM_EXIT_IO_OUT 1
                         __u8 direction;
                         __u8 size; /* bytes */
-                        __u8 string;
-                        __u8 string_down;
-                        __u8 rep;
-                        __u8 pad;
                         __u16 port;
-                        __u64 count;
-                        union {
-                                __u64 address;
-                                __u32 value;
-                        };
+                        __u32 count;
+                        __u64 data_offset; /* relative to kvm_run start */
                 } io;
                 struct {
                 } debug;
@@ -105,6 +104,13 @@ struct kvm_run {
                         __u32 len;
                         __u8  is_write;
                 } mmio;
+                /* KVM_EXIT_HYPERCALL */
+                struct {
+                        __u64 args[6];
+                        __u64 ret;
+                        __u32 longmode;
+                        __u32 pad;
+                } hypercall;
         };
 };
 
@@ -118,6 +124,21 @@ struct kvm_regs {
         __u64 rip, rflags;
 };
 
+/* for KVM_GET_FPU and KVM_SET_FPU */
+struct kvm_fpu {
+        __u8  fpr[8][16];
+        __u16 fcw;
+        __u16 fsw;
+        __u8  ftwx;  /* in fxsave format */
+        __u8  pad1;
+        __u16 last_opcode;
+        __u64 last_ip;
+        __u64 last_dp;
+        __u8  xmm[16][16];
+        __u32 mxcsr;
+        __u32 pad2;
+};
+
 struct kvm_segment {
         __u64 base;
         __u32 limit;
@@ -210,38 +231,74 @@ struct kvm_dirty_log {
         };
 };
 
+struct kvm_cpuid_entry {
+        __u32 function;
+        __u32 eax;
+        __u32 ebx;
+        __u32 ecx;
+        __u32 edx;
+        __u32 padding;
+};
+
+/* for KVM_SET_CPUID */
+struct kvm_cpuid {
+        __u32 nent;
+        __u32 padding;
+        struct kvm_cpuid_entry entries[0];
+};
+
+/* for KVM_SET_SIGNAL_MASK */
+struct kvm_signal_mask {
+        __u32 len;
+        __u8  sigset[0];
+};
+
 #define KVMIO 0xAE
 
 /*
  * ioctls for /dev/kvm fds:
  */
-#define KVM_GET_API_VERSION       _IO(KVMIO, 1)
-#define KVM_CREATE_VM             _IO(KVMIO, 2) /* returns a VM fd */
-#define KVM_GET_MSR_INDEX_LIST    _IOWR(KVMIO, 15, struct kvm_msr_list)
+#define KVM_GET_API_VERSION       _IO(KVMIO,   0x00)
+#define KVM_CREATE_VM             _IO(KVMIO,   0x01) /* returns a VM fd */
+#define KVM_GET_MSR_INDEX_LIST    _IOWR(KVMIO, 0x02, struct kvm_msr_list)
+/*
+ * Check if a kvm extension is available.  Argument is extension number,
+ * return is 1 (yes) or 0 (no, sorry).
+ */
+#define KVM_CHECK_EXTENSION       _IO(KVMIO,   0x03)
+/*
+ * Get size for mmap(vcpu_fd)
+ */
+#define KVM_GET_VCPU_MMAP_SIZE    _IO(KVMIO,   0x04) /* in bytes */
 
 /*
  * ioctls for VM fds
  */
-#define KVM_SET_MEMORY_REGION     _IOW(KVMIO, 10, struct kvm_memory_region)
+#define KVM_SET_MEMORY_REGION     _IOW(KVMIO, 0x40, struct kvm_memory_region)
 /*
  * KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns
  * a vcpu fd.
  */
-#define KVM_CREATE_VCPU           _IOW(KVMIO, 11, int)
-#define KVM_GET_DIRTY_LOG         _IOW(KVMIO, 12, struct kvm_dirty_log)
+#define KVM_CREATE_VCPU           _IO(KVMIO,  0x41)
+#define KVM_GET_DIRTY_LOG         _IOW(KVMIO, 0x42, struct kvm_dirty_log)
+#define KVM_SET_MEMORY_ALIAS      _IOW(KVMIO, 0x43, struct kvm_memory_alias)
 
 /*
  * ioctls for vcpu fds
  */
-#define KVM_RUN                   _IOWR(KVMIO, 2, struct kvm_run)
-#define KVM_GET_REGS              _IOR(KVMIO, 3, struct kvm_regs)
-#define KVM_SET_REGS              _IOW(KVMIO, 4, struct kvm_regs)
-#define KVM_GET_SREGS             _IOR(KVMIO, 5, struct kvm_sregs)
-#define KVM_SET_SREGS             _IOW(KVMIO, 6, struct kvm_sregs)
-#define KVM_TRANSLATE             _IOWR(KVMIO, 7, struct kvm_translation)
-#define KVM_INTERRUPT             _IOW(KVMIO, 8, struct kvm_interrupt)
-#define KVM_DEBUG_GUEST           _IOW(KVMIO, 9, struct kvm_debug_guest)
-#define KVM_GET_MSRS              _IOWR(KVMIO, 13, struct kvm_msrs)
-#define KVM_SET_MSRS              _IOW(KVMIO, 14, struct kvm_msrs)
+#define KVM_RUN                   _IO(KVMIO,   0x80)
+#define KVM_GET_REGS              _IOR(KVMIO,  0x81, struct kvm_regs)
+#define KVM_SET_REGS              _IOW(KVMIO,  0x82, struct kvm_regs)
+#define KVM_GET_SREGS             _IOR(KVMIO,  0x83, struct kvm_sregs)
+#define KVM_SET_SREGS             _IOW(KVMIO,  0x84, struct kvm_sregs)
+#define KVM_TRANSLATE             _IOWR(KVMIO, 0x85, struct kvm_translation)
+#define KVM_INTERRUPT             _IOW(KVMIO,  0x86, struct kvm_interrupt)
+#define KVM_DEBUG_GUEST           _IOW(KVMIO,  0x87, struct kvm_debug_guest)
+#define KVM_GET_MSRS              _IOWR(KVMIO, 0x88, struct kvm_msrs)
+#define KVM_SET_MSRS              _IOW(KVMIO,  0x89, struct kvm_msrs)
+#define KVM_SET_CPUID             _IOW(KVMIO,  0x8a, struct kvm_cpuid)
+#define KVM_SET_SIGNAL_MASK       _IOW(KVMIO,  0x8b, struct kvm_signal_mask)
+#define KVM_GET_FPU               _IOR(KVMIO,  0x8c, struct kvm_fpu)
+#define KVM_SET_FPU               _IOW(KVMIO,  0x8d, struct kvm_fpu)
 
 #endif
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index ac25b5649c59..f6a81e0b1b93 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -88,7 +88,7 @@ struct nlm_wait;
 /*
  * Memory chunk for NLM client RPC request.
  */
-#define NLMCLNT_OHSIZE          (sizeof(utsname()->nodename)+10)
+#define NLMCLNT_OHSIZE          ((__NEW_UTS_LEN) + 10u)
 struct nlm_rqst {
         unsigned int            a_flags;        /* initial RPC task flags */
         struct nlm_host *       a_host;         /* host handle */
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h
index 326da7d500c7..dff9ea32606a 100644
--- a/include/linux/miscdevice.h
+++ b/include/linux/miscdevice.h
@@ -29,6 +29,7 @@
 
 #define TUN_MINOR            200
 #define HPET_MINOR           228
+#define KVM_MINOR            232
 
 struct device;
 
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index e45712acfac5..badf702fcff4 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -10,7 +10,7 @@
 #ifndef LINUX_MMC_CARD_H
 #define LINUX_MMC_CARD_H
 
-#include <linux/mmc/mmc.h>
+#include <linux/mmc/core.h>
 
 struct mmc_cid {
         unsigned int            manfid;
@@ -41,6 +41,7 @@ struct mmc_csd {
 
 struct mmc_ext_csd {
         unsigned int            hs_max_dtr;
+        unsigned int            sectors;
 };
 
 struct sd_scr {
@@ -60,18 +61,17 @@ struct mmc_host;
  * MMC device
  */
 struct mmc_card {
-        struct list_head        node;           /* node in hosts devices list */
         struct mmc_host         *host;          /* the host this device belongs to */
         struct device           dev;            /* the device */
         unsigned int            rca;            /* relative card address of device */
+        unsigned int            type;           /* card type */
+#define MMC_TYPE_MMC            0               /* MMC card */
+#define MMC_TYPE_SD             1               /* SD card */
         unsigned int            state;          /* (our) card state */
 #define MMC_STATE_PRESENT       (1<<0)          /* present in sysfs */
-#define MMC_STATE_DEAD          (1<<1)          /* device no longer in stack */
-#define MMC_STATE_BAD           (1<<2)          /* unrecognised device */
-#define MMC_STATE_SDCARD        (1<<3)          /* is an SD card */
-#define MMC_STATE_READONLY      (1<<4)          /* card is read-only */
-#define MMC_STATE_HIGHSPEED     (1<<5)          /* card is in high speed mode */
-#define MMC_STATE_BLOCKADDR     (1<<6)          /* card uses block-addressing */
+#define MMC_STATE_READONLY      (1<<1)          /* card is read-only */
+#define MMC_STATE_HIGHSPEED     (1<<2)          /* card is in high speed mode */
+#define MMC_STATE_BLOCKADDR     (1<<3)          /* card uses block-addressing */
         u32                     raw_cid[4];     /* raw card CID */
         u32                     raw_csd[4];     /* raw card CSD */
         u32                     raw_scr[2];     /* raw card SCR */
@@ -82,18 +82,15 @@ struct mmc_card {
         struct sd_switch_caps   sw_caps;        /* switch (CMD6) caps */
 };
 
+#define mmc_card_mmc(c)         ((c)->type == MMC_TYPE_MMC)
+#define mmc_card_sd(c)          ((c)->type == MMC_TYPE_SD)
+
 #define mmc_card_present(c)     ((c)->state & MMC_STATE_PRESENT)
-#define mmc_card_dead(c)        ((c)->state & MMC_STATE_DEAD)
-#define mmc_card_bad(c)         ((c)->state & MMC_STATE_BAD)
-#define mmc_card_sd(c)          ((c)->state & MMC_STATE_SDCARD)
 #define mmc_card_readonly(c)    ((c)->state & MMC_STATE_READONLY)
 #define mmc_card_highspeed(c)   ((c)->state & MMC_STATE_HIGHSPEED)
 #define mmc_card_blockaddr(c)   ((c)->state & MMC_STATE_BLOCKADDR)
 
 #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
-#define mmc_card_set_dead(c)    ((c)->state |= MMC_STATE_DEAD)
-#define mmc_card_set_bad(c)     ((c)->state |= MMC_STATE_BAD)
-#define mmc_card_set_sd(c)      ((c)->state |= MMC_STATE_SDCARD)
 #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
 #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
 #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
@@ -119,11 +116,4 @@ struct mmc_driver {
 extern int mmc_register_driver(struct mmc_driver *);
 extern void mmc_unregister_driver(struct mmc_driver *);
 
-static inline int mmc_card_claim_host(struct mmc_card *card)
-{
-        return __mmc_claim_host(card->host, card);
-}
-
-#define mmc_card_release_host(c)        mmc_release_host((c)->host)
-
 #endif
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
new file mode 100644
index 000000000000..04bbe12fae8d
--- /dev/null
+++ b/include/linux/mmc/core.h
@@ -0,0 +1,112 @@
+/*
+ *  linux/include/linux/mmc/core.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef LINUX_MMC_CORE_H
+#define LINUX_MMC_CORE_H
+
+#include <linux/interrupt.h>
+#include <linux/device.h>
+
+struct request;
+struct mmc_data;
+struct mmc_request;
+
+struct mmc_command {
+        u32                     opcode;
+        u32                     arg;
+        u32                     resp[4];
+        unsigned int            flags;          /* expected response type */
+#define MMC_RSP_PRESENT (1 << 0)
+#define MMC_RSP_136     (1 << 1)                /* 136 bit response */
+#define MMC_RSP_CRC     (1 << 2)                /* expect valid crc */
+#define MMC_RSP_BUSY    (1 << 3)                /* card may send busy */
+#define MMC_RSP_OPCODE  (1 << 4)                /* response contains opcode */
+#define MMC_CMD_MASK    (3 << 5)                /* command type */
+#define MMC_CMD_AC      (0 << 5)
+#define MMC_CMD_ADTC    (1 << 5)
+#define MMC_CMD_BC      (2 << 5)
+#define MMC_CMD_BCR     (3 << 5)
+
+/*
+ * These are the response types, and correspond to valid bit
+ * patterns of the above flags.  One additional valid pattern
+ * is all zeros, which means we don't expect a response.
+ */
+#define MMC_RSP_NONE    (0)
+#define MMC_RSP_R1      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+#define MMC_RSP_R1B     (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
+#define MMC_RSP_R2      (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
+#define MMC_RSP_R3      (MMC_RSP_PRESENT)
+#define MMC_RSP_R6      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+#define MMC_RSP_R7      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+
+#define mmc_resp_type(cmd)      ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
+
+/*
+ * These are the command types.
+ */
+#define mmc_cmd_type(cmd)       ((cmd)->flags & MMC_CMD_MASK)
+
+        unsigned int            retries;        /* max number of retries */
+        unsigned int            error;          /* command error */
+
+#define MMC_ERR_NONE    0
+#define MMC_ERR_TIMEOUT 1
+#define MMC_ERR_BADCRC  2
+#define MMC_ERR_FIFO    3
+#define MMC_ERR_FAILED  4
+#define MMC_ERR_INVALID 5
+
+        struct mmc_data         *data;          /* data segment associated with cmd */
+        struct mmc_request      *mrq;           /* associated request */
+};
+
+struct mmc_data {
+        unsigned int            timeout_ns;     /* data timeout (in ns, max 80ms) */
+        unsigned int            timeout_clks;   /* data timeout (in clocks) */
+        unsigned int            blksz;          /* data block size */
+        unsigned int            blocks;         /* number of blocks */
+        unsigned int            error;          /* data error */
+        unsigned int            flags;
+
+#define MMC_DATA_WRITE  (1 << 8)
+#define MMC_DATA_READ   (1 << 9)
+#define MMC_DATA_STREAM (1 << 10)
+#define MMC_DATA_MULTI  (1 << 11)
+
+        unsigned int            bytes_xfered;
+
+        struct mmc_command      *stop;          /* stop command */
+        struct mmc_request      *mrq;           /* associated request */
+
+        unsigned int            sg_len;         /* size of scatter list */
+        struct scatterlist      *sg;            /* I/O scatter list */
+};
+
+struct mmc_request {
+        struct mmc_command      *cmd;
+        struct mmc_data         *data;
+        struct mmc_command      *stop;
+
+        void                    *done_data;     /* completion data */
+        void                    (*done)(struct mmc_request *);/* completion function */
+};
+
+struct mmc_host;
+struct mmc_card;
+
+extern int mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
+extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
+extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
+        struct mmc_command *, int);
+
+extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int);
+
+extern void mmc_claim_host(struct mmc_host *host);
+extern void mmc_release_host(struct mmc_host *host);
+
+#endif
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index bfcef8a1ad8b..b1350dfd3e91 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -10,36 +10,13 @@
 #ifndef LINUX_MMC_HOST_H
 #define LINUX_MMC_HOST_H
 
-#include <linux/mmc/mmc.h>
+#include <linux/mmc/core.h>
 
 struct mmc_ios {
         unsigned int    clock;                  /* clock rate */
         unsigned short  vdd;
 
-#define MMC_VDD_150     0
-#define MMC_VDD_155     1
-#define MMC_VDD_160     2
-#define MMC_VDD_165     3
-#define MMC_VDD_170     4
-#define MMC_VDD_180     5
-#define MMC_VDD_190     6
-#define MMC_VDD_200     7
-#define MMC_VDD_210     8
-#define MMC_VDD_220     9
-#define MMC_VDD_230     10
-#define MMC_VDD_240     11
-#define MMC_VDD_250     12
-#define MMC_VDD_260     13
-#define MMC_VDD_270     14
-#define MMC_VDD_280     15
-#define MMC_VDD_290     16
-#define MMC_VDD_300     17
-#define MMC_VDD_310     18
-#define MMC_VDD_320     19
-#define MMC_VDD_330     20
-#define MMC_VDD_340     21
-#define MMC_VDD_350     22
-#define MMC_VDD_360     23
+/* vdd stores the bit number of the selected voltage range from below. */
 
         unsigned char   bus_mode;               /* command output mode */
 
@@ -88,6 +65,24 @@ struct mmc_host {
         unsigned int            f_max;
         u32                     ocr_avail;
 
+#define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
+#define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
+#define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
+#define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
+#define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
+#define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
+#define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
+#define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
+#define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
+#define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
+#define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
+#define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
+#define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
+#define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
+#define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
+#define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
+#define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
+
         unsigned long           caps;           /* Host capabilities */
 
 #define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
@@ -106,6 +101,8 @@ struct mmc_host {
         unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 
         /* private data */
+        spinlock_t              lock;           /* lock for claim and bus ops */
+
         struct mmc_ios          ios;            /* current io bus settings */
         u32                     ocr;            /* the current OCR setting */
 
@@ -113,15 +110,19 @@ struct mmc_host {
 #define MMC_MODE_MMC            0
 #define MMC_MODE_SD             1
 
-        struct list_head        cards;          /* devices attached to this host */
+        struct mmc_card         *card;          /* device attached to this host */
 
         wait_queue_head_t       wq;
-        spinlock_t              lock;           /* claimed lock */
         unsigned int            claimed:1;      /* host exclusively claimed */
 
-        struct mmc_card         *card_selected; /* the selected MMC card */
-
         struct delayed_work     detect;
+#ifdef CONFIG_MMC_DEBUG
+        unsigned int            removed:1;      /* host is being removed */
+#endif
+
+        const struct mmc_bus_ops *bus_ops;      /* current bus driver */
+        unsigned int            bus_refs;       /* reference counter */
+        unsigned int            bus_dead:1;     /* bus has been released */
 
         unsigned long           private[0] ____cacheline_aligned;
 };
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index cdc54be804f1..e3ed9b95040e 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -1,119 +1,257 @@
 /*
- *  linux/include/linux/mmc/mmc.h
+ * Header for MultiMediaCard (MMC)
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright 2002 Hewlett-Packard Company
+ *
+ * Use consistent with the GNU GPL is permitted,
+ * provided that this copyright notice is
+ * preserved in its entirety in all copies and derived works.
+ *
+ * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Many thanks to Alessandro Rubini and Jonathan Corbet!
+ *
+ * Based strongly on code by:
+ *
+ * Author: Yong-iL Joh <tolkien@mizi.com>
+ * Date  : $Date: 2002/06/18 12:37:30 $
+ *
+ * Author:  Andrew Christian
+ *          15 May 2002
  */
-#ifndef MMC_H
-#define MMC_H
-
-#include <linux/list.h>
-#include <linux/interrupt.h>
-#include <linux/device.h>
-
-struct request;
-struct mmc_data;
-struct mmc_request;
-
-struct mmc_command {
-        u32                     opcode;
-        u32                     arg;
-        u32                     resp[4];
-        unsigned int            flags;          /* expected response type */
-#define MMC_RSP_PRESENT (1 << 0)
-#define MMC_RSP_136     (1 << 1)                /* 136 bit response */
-#define MMC_RSP_CRC     (1 << 2)                /* expect valid crc */
-#define MMC_RSP_BUSY    (1 << 3)                /* card may send busy */
-#define MMC_RSP_OPCODE  (1 << 4)                /* response contains opcode */
-#define MMC_CMD_MASK    (3 << 5)                /* command type */
-#define MMC_CMD_AC      (0 << 5)
-#define MMC_CMD_ADTC    (1 << 5)
-#define MMC_CMD_BC      (2 << 5)
-#define MMC_CMD_BCR     (3 << 5)
+
+#ifndef MMC_MMC_H
+#define MMC_MMC_H
+
+/* Standard MMC commands (4.1)           type  argument     response */
+   /* class 1 */
+#define MMC_GO_IDLE_STATE         0   /* bc                          */
+#define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
+#define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
+#define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
+#define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
+#define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
+#define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
+#define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
+#define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
+#define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
+#define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
+#define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
+#define MMC_SEND_STATUS          13   /* ac   [31:16] RCA        R1  */
+#define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */
+
+  /* class 2 */
+#define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
+#define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
+#define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
+
+  /* class 3 */
+#define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
+
+  /* class 4 */
+#define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
+#define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
+#define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
+#define MMC_PROGRAM_CID          26   /* adtc                    R1  */
+#define MMC_PROGRAM_CSD          27   /* adtc                    R1  */
+
+  /* class 6 */
+#define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
+#define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
+#define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */
+
+  /* class 5 */
+#define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
+#define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
+#define MMC_ERASE                38   /* ac                      R1b */
+
+  /* class 9 */
+#define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
+#define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */
+
+  /* class 7 */
+#define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */
+
+  /* class 8 */
+#define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
+#define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
 
 /*
- * These are the response types, and correspond to valid bit
- * patterns of the above flags.  One additional valid pattern
- * is all zeros, which means we don't expect a response.
+ * MMC_SWITCH argument format:
+ *
+ *      [31:26] Always 0
+ *      [25:24] Access Mode
+ *      [23:16] Location of target Byte in EXT_CSD
+ *      [15:08] Value Byte
+ *      [07:03] Always 0
+ *      [02:00] Command Set
  */
-#define MMC_RSP_NONE    (0)
-#define MMC_RSP_R1      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
-#define MMC_RSP_R1B     (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
-#define MMC_RSP_R2      (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
-#define MMC_RSP_R3      (MMC_RSP_PRESENT)
-#define MMC_RSP_R6      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
-#define MMC_RSP_R7      (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
-
-#define mmc_resp_type(cmd)      ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
 
 /*
- * These are the command types.
+  MMC status in R1
+  Type
+        e : error bit
+        s : status bit
+        r : detected and set for the actual command response
+        x : detected and set during command execution. the host must poll
+            the card by sending status command in order to read these bits.
+  Clear condition
+        a : according to the card state
+        b : always related to the previous command. Reception of
+            a valid command will clear it (with a delay of one command)
+        c : clear by read
  */
-#define mmc_cmd_type(cmd)       ((cmd)->flags & MMC_CMD_MASK)
 
-        unsigned int            retries;        /* max number of retries */
-        unsigned int            error;          /* command error */
+#define R1_OUT_OF_RANGE         (1 << 31)       /* er, c */
+#define R1_ADDRESS_ERROR        (1 << 30)       /* erx, c */
+#define R1_BLOCK_LEN_ERROR      (1 << 29)       /* er, c */
+#define R1_ERASE_SEQ_ERROR      (1 << 28)       /* er, c */
+#define R1_ERASE_PARAM          (1 << 27)       /* ex, c */
+#define R1_WP_VIOLATION         (1 << 26)       /* erx, c */
+#define R1_CARD_IS_LOCKED       (1 << 25)       /* sx, a */
+#define R1_LOCK_UNLOCK_FAILED   (1 << 24)       /* erx, c */
+#define R1_COM_CRC_ERROR        (1 << 23)       /* er, b */
+#define R1_ILLEGAL_COMMAND      (1 << 22)       /* er, b */
+#define R1_CARD_ECC_FAILED      (1 << 21)       /* ex, c */
+#define R1_CC_ERROR             (1 << 20)       /* erx, c */
+#define R1_ERROR                (1 << 19)       /* erx, c */
+#define R1_UNDERRUN             (1 << 18)       /* ex, c */
+#define R1_OVERRUN              (1 << 17)       /* ex, c */
+#define R1_CID_CSD_OVERWRITE    (1 << 16)       /* erx, c, CID/CSD overwrite */
+#define R1_WP_ERASE_SKIP        (1 << 15)       /* sx, c */
+#define R1_CARD_ECC_DISABLED    (1 << 14)       /* sx, a */
+#define R1_ERASE_RESET          (1 << 13)       /* sr, c */
+#define R1_STATUS(x)            (x & 0xFFFFE000)
+#define R1_CURRENT_STATE(x)     ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
+#define R1_READY_FOR_DATA       (1 << 8)        /* sx, a */
+#define R1_APP_CMD              (1 << 5)        /* sr, c */
 
-#define MMC_ERR_NONE    0
-#define MMC_ERR_TIMEOUT 1
-#define MMC_ERR_BADCRC  2
-#define MMC_ERR_FIFO    3
-#define MMC_ERR_FAILED  4
-#define MMC_ERR_INVALID 5
+/* These are unpacked versions of the actual responses */
 
-        struct mmc_data         *data;          /* data segment associated with cmd */
-        struct mmc_request      *mrq;           /* associated request */
+struct _mmc_csd {
+        u8  csd_structure;
+        u8  spec_vers;
+        u8  taac;
+        u8  nsac;
+        u8  tran_speed;
+        u16 ccc;
+        u8  read_bl_len;
+        u8  read_bl_partial;
+        u8  write_blk_misalign;
+        u8  read_blk_misalign;
+        u8  dsr_imp;
+        u16 c_size;
+        u8  vdd_r_curr_min;
+        u8  vdd_r_curr_max;
+        u8  vdd_w_curr_min;
+        u8  vdd_w_curr_max;
+        u8  c_size_mult;
+        union {
+                struct { /* MMC system specification version 3.1 */
+                        u8  erase_grp_size;
+                        u8  erase_grp_mult;
+                } v31;
+                struct { /* MMC system specification version 2.2 */
+                        u8  sector_size;
+                        u8  erase_grp_size;
+                } v22;
+        } erase;
+        u8  wp_grp_size;
+        u8  wp_grp_enable;
+        u8  default_ecc;
+        u8  r2w_factor;
+        u8  write_bl_len;
+        u8  write_bl_partial;
+        u8  file_format_grp;
+        u8  copy;
+        u8  perm_write_protect;
+        u8  tmp_write_protect;
+        u8  file_format;
+        u8  ecc;
 };
 
-struct mmc_data {
-        unsigned int            timeout_ns;     /* data timeout (in ns, max 80ms) */
-        unsigned int            timeout_clks;   /* data timeout (in clocks) */
-        unsigned int            blksz;          /* data block size */
-        unsigned int            blocks;         /* number of blocks */
-        unsigned int            error;          /* data error */
-        unsigned int            flags;
+/*
+ * OCR bits are mostly in host.h
+ */
+#define MMC_CARD_BUSY   0x80000000      /* Card Power up status bit */
 
-#define MMC_DATA_WRITE  (1 << 8)
-#define MMC_DATA_READ   (1 << 9)
-#define MMC_DATA_STREAM (1 << 10)
-#define MMC_DATA_MULTI  (1 << 11)
+/*
+ * Card Command Classes (CCC)
+ */
+#define CCC_BASIC               (1<<0)  /* (0) Basic protocol functions */
+                                        /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
+#define CCC_STREAM_READ         (1<<1)  /* (1) Stream read commands */
+                                        /* (CMD11) */
+#define CCC_BLOCK_READ          (1<<2)  /* (2) Block read commands */
+                                        /* (CMD16,17,18) */
+#define CCC_STREAM_WRITE        (1<<3)  /* (3) Stream write commands */
+                                        /* (CMD20) */
+#define CCC_BLOCK_WRITE         (1<<4)  /* (4) Block write commands */
+                                        /* (CMD16,24,25,26,27) */
+#define CCC_ERASE               (1<<5)  /* (5) Ability to erase blocks */
+                                        /* (CMD32,33,34,35,36,37,38,39) */
+#define CCC_WRITE_PROT          (1<<6)  /* (6) Able to write protect blocks */
+                                        /* (CMD28,29,30) */
+#define CCC_LOCK_CARD           (1<<7)  /* (7) Able to lock down card */
+                                        /* (CMD16,CMD42) */
+#define CCC_APP_SPEC            (1<<8)  /* (8) Application specific */
+                                        /* (CMD55,56,57,ACMD*) */
+#define CCC_IO_MODE             (1<<9)  /* (9) I/O mode */
+                                        /* (CMD5,39,40,52,53) */
+#define CCC_SWITCH              (1<<10) /* (10) High speed switch */
+                                        /* (CMD6,34,35,36,37,50) */
+                                        /* (11) Reserved */
+                                        /* (CMD?) */
 
-        unsigned int            bytes_xfered;
+/*
+ * CSD field definitions
+ */
 
-        struct mmc_command      *stop;          /* stop command */
-        struct mmc_request      *mrq;           /* associated request */
+#define CSD_STRUCT_VER_1_0  0           /* Valid for system specification 1.0 - 1.2 */
+#define CSD_STRUCT_VER_1_1  1           /* Valid for system specification 1.4 - 2.2 */
+#define CSD_STRUCT_VER_1_2  2           /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
+#define CSD_STRUCT_EXT_CSD  3           /* Version is coded in CSD_STRUCTURE in EXT_CSD */
 
-        unsigned int            sg_len;         /* size of scatter list */
-        struct scatterlist      *sg;            /* I/O scatter list */
-};
+#define CSD_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.2 */
+#define CSD_SPEC_VER_1      1           /* Implements system specification 1.4 */
+#define CSD_SPEC_VER_2      2           /* Implements system specification 2.0 - 2.2 */
+#define CSD_SPEC_VER_3      3           /* Implements system specification 3.1 - 3.2 - 3.31 */
+#define CSD_SPEC_VER_4      4           /* Implements system specification 4.0 - 4.1 */
 
-struct mmc_request {
-        struct mmc_command      *cmd;
-        struct mmc_data         *data;
-        struct mmc_command      *stop;
+/*
+ * EXT_CSD fields
+ */
 
-        void                    *done_data;     /* completion data */
-        void                    (*done)(struct mmc_request *);/* completion function */
-};
+#define EXT_CSD_BUS_WIDTH       183     /* R/W */
+#define EXT_CSD_HS_TIMING       185     /* R/W */
+#define EXT_CSD_CARD_TYPE       196     /* RO */
+#define EXT_CSD_SEC_CNT         212     /* RO, 4 bytes */
+
+/*
+ * EXT_CSD field definitions
+ */
 
-struct mmc_host;
-struct mmc_card;
+#define EXT_CSD_CMD_SET_NORMAL          (1<<0)
+#define EXT_CSD_CMD_SET_SECURE          (1<<1)
+#define EXT_CSD_CMD_SET_CPSECURE        (1<<2)
 
-extern int mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
-extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
-extern int mmc_wait_for_app_cmd(struct mmc_host *, unsigned int,
-        struct mmc_command *, int);
+#define EXT_CSD_CARD_TYPE_26    (1<<0)  /* Card can run at 26MHz */
+#define EXT_CSD_CARD_TYPE_52    (1<<1)  /* Card can run at 52MHz */
 
-extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int);
+#define EXT_CSD_BUS_WIDTH_1     0       /* Card is in 1 bit mode */
+#define EXT_CSD_BUS_WIDTH_4     1       /* Card is in 4 bit mode */
+#define EXT_CSD_BUS_WIDTH_8     2       /* Card is in 8 bit mode */
 
-extern int __mmc_claim_host(struct mmc_host *host, struct mmc_card *card);
+/*
+ * MMC_SWITCH access modes
+ */
 
-static inline void mmc_claim_host(struct mmc_host *host)
-{
-        __mmc_claim_host(host, (struct mmc_card *)-1);
-}
+#define MMC_SWITCH_MODE_CMD_SET         0x00    /* Change the command set */
+#define MMC_SWITCH_MODE_SET_BITS        0x01    /* Set bits which are 1 in value */
+#define MMC_SWITCH_MODE_CLEAR_BITS      0x02    /* Clear bits which are 1 in value */
+#define MMC_SWITCH_MODE_WRITE_BYTE      0x03    /* Set target to value */
 
-extern void mmc_release_host(struct mmc_host *host);
+#endif  /* MMC_MMC_PROTOCOL_H */
 
-#endif
diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h
deleted file mode 100644
index c90b6768329d..000000000000
--- a/include/linux/mmc/protocol.h
+++ /dev/null
@@ -1,327 +0,0 @@
-/*
- * Header for MultiMediaCard (MMC)
- *
- * Copyright 2002 Hewlett-Packard Company
- *
- * Use consistent with the GNU GPL is permitted,
- * provided that this copyright notice is
- * preserved in its entirety in all copies and derived works.
- *
- * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
- * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
- * FITNESS FOR ANY PARTICULAR PURPOSE.
- *
- * Many thanks to Alessandro Rubini and Jonathan Corbet!
- *
- * Based strongly on code by:
- *
- * Author: Yong-iL Joh <tolkien@mizi.com>
- * Date  : $Date: 2002/06/18 12:37:30 $
- *
- * Author:  Andrew Christian
- *          15 May 2002
- */
-
-#ifndef MMC_MMC_PROTOCOL_H
-#define MMC_MMC_PROTOCOL_H
-
-/* Standard MMC commands (4.1)           type  argument     response */
-   /* class 1 */
-#define MMC_GO_IDLE_STATE         0   /* bc                          */
-#define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
-#define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
-#define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
-#define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
-#define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
-#define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
-#define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
-#define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
-#define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
-#define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
-#define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
-#define MMC_SEND_STATUS          13   /* ac   [31:16] RCA        R1  */
-#define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */
-
-  /* class 2 */
-#define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
-#define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
-#define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
-
-  /* class 3 */
-#define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
-
-  /* class 4 */
-#define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
-#define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
-#define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
-#define MMC_PROGRAM_CID          26   /* adtc                    R1  */
-#define MMC_PROGRAM_CSD          27   /* adtc                    R1  */
-
-  /* class 6 */
-#define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
-#define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
-#define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */
-
-  /* class 5 */
-#define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
-#define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
-#define MMC_ERASE                38   /* ac                      R1b */
-
-  /* class 9 */
-#define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
-#define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */
-
-  /* class 7 */
-#define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */
-
-  /* class 8 */
-#define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
-#define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
-
-/* SD commands                           type  argument     response */
-  /* class 0 */
-/* This is basically the same command as for MMC with some quirks. */
-#define SD_SEND_RELATIVE_ADDR     3   /* bcr                     R6  */
-#define SD_SEND_IF_COND           8   /* bcr  [11:0] See below   R7  */
-
-  /* class 10 */
-#define SD_SWITCH                 6   /* adtc [31:0] See below   R1  */
-
-  /* Application commands */
-#define SD_APP_SET_BUS_WIDTH      6   /* ac   [1:0] bus width    R1  */
-#define SD_APP_SEND_NUM_WR_BLKS  22   /* adtc                    R1  */
-#define SD_APP_OP_COND           41   /* bcr  [31:0] OCR         R3  */
-#define SD_APP_SEND_SCR          51   /* adtc                    R1  */
-
-/*
- * MMC_SWITCH argument format:
- *
- *      [31:26] Always 0
- *      [25:24] Access Mode
- *      [23:16] Location of target Byte in EXT_CSD
- *      [15:08] Value Byte
- *      [07:03] Always 0
- *      [02:00] Command Set
- */
-
-/*
- * SD_SWITCH argument format:
- *
- *      [31] Check (0) or switch (1)
- *      [30:24] Reserved (0)
- *      [23:20] Function group 6
- *      [19:16] Function group 5
- *      [15:12] Function group 4
- *      [11:8] Function group 3
- *      [7:4] Function group 2
- *      [3:0] Function group 1
- */
-
-/*
- * SD_SEND_IF_COND argument format:
- *
- *      [31:12] Reserved (0)
- *      [11:8] Host Voltage Supply Flags
- *      [7:0] Check Pattern (0xAA)
- */
-
-/*
-  MMC status in R1
-  Type
-        e : error bit
-        s : status bit
-        r : detected and set for the actual command response
-        x : detected and set during command execution. the host must poll
-            the card by sending status command in order to read these bits.
-  Clear condition
-        a : according to the card state
-        b : always related to the previous command. Reception of
-            a valid command will clear it (with a delay of one command)
-        c : clear by read
- */
-
-#define R1_OUT_OF_RANGE         (1 << 31)       /* er, c */
-#define R1_ADDRESS_ERROR        (1 << 30)       /* erx, c */
-#define R1_BLOCK_LEN_ERROR      (1 << 29)       /* er, c */
-#define R1_ERASE_SEQ_ERROR      (1 << 28)       /* er, c */
-#define R1_ERASE_PARAM          (1 << 27)       /* ex, c */
-#define R1_WP_VIOLATION         (1 << 26)       /* erx, c */
-#define R1_CARD_IS_LOCKED       (1 << 25)       /* sx, a */
-#define R1_LOCK_UNLOCK_FAILED   (1 << 24)       /* erx, c */
-#define R1_COM_CRC_ERROR        (1 << 23)       /* er, b */
-#define R1_ILLEGAL_COMMAND      (1 << 22)       /* er, b */
-#define R1_CARD_ECC_FAILED      (1 << 21)       /* ex, c */
-#define R1_CC_ERROR             (1 << 20)       /* erx, c */
-#define R1_ERROR                (1 << 19)       /* erx, c */
-#define R1_UNDERRUN             (1 << 18)       /* ex, c */
-#define R1_OVERRUN              (1 << 17)       /* ex, c */
-#define R1_CID_CSD_OVERWRITE    (1 << 16)       /* erx, c, CID/CSD overwrite */
-#define R1_WP_ERASE_SKIP        (1 << 15)       /* sx, c */
-#define R1_CARD_ECC_DISABLED    (1 << 14)       /* sx, a */
-#define R1_ERASE_RESET          (1 << 13)       /* sr, c */
-#define R1_STATUS(x)            (x & 0xFFFFE000)
-#define R1_CURRENT_STATE(x)     ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
-#define R1_READY_FOR_DATA       (1 << 8)        /* sx, a */
-#define R1_APP_CMD              (1 << 5)        /* sr, c */
-
-/* These are unpacked versions of the actual responses */
-
-struct _mmc_csd {
-        u8  csd_structure;
-        u8  spec_vers;
-        u8  taac;
-        u8  nsac;
-        u8  tran_speed;
-        u16 ccc;
-        u8  read_bl_len;
-        u8  read_bl_partial;
-        u8  write_blk_misalign;
-        u8  read_blk_misalign;
-        u8  dsr_imp;
-        u16 c_size;
-        u8  vdd_r_curr_min;
-        u8  vdd_r_curr_max;
-        u8  vdd_w_curr_min;
-        u8  vdd_w_curr_max;
-        u8  c_size_mult;
-        union {
-                struct { /* MMC system specification version 3.1 */
-                        u8  erase_grp_size;
-                        u8  erase_grp_mult;
-                } v31;
-                struct { /* MMC system specification version 2.2 */
-                        u8  sector_size;
-                        u8  erase_grp_size;
-                } v22;
-        } erase;
-        u8  wp_grp_size;
-        u8  wp_grp_enable;
-        u8  default_ecc;
-        u8  r2w_factor;
-        u8  write_bl_len;
-        u8  write_bl_partial;
-        u8  file_format_grp;
-        u8  copy;
-        u8  perm_write_protect;
-        u8  tmp_write_protect;
-        u8  file_format;
-        u8  ecc;
-};
-
-#define MMC_VDD_145_150 0x00000001      /* VDD voltage 1.45 - 1.50 */
-#define MMC_VDD_150_155 0x00000002      /* VDD voltage 1.50 - 1.55 */
-#define MMC_VDD_155_160 0x00000004      /* VDD voltage 1.55 - 1.60 */
-#define MMC_VDD_160_165 0x00000008      /* VDD voltage 1.60 - 1.65 */
-#define MMC_VDD_165_170 0x00000010      /* VDD voltage 1.65 - 1.70 */
-#define MMC_VDD_17_18   0x00000020      /* VDD voltage 1.7 - 1.8 */
-#define MMC_VDD_18_19   0x00000040      /* VDD voltage 1.8 - 1.9 */
-#define MMC_VDD_19_20   0x00000080      /* VDD voltage 1.9 - 2.0 */
-#define MMC_VDD_20_21   0x00000100      /* VDD voltage 2.0 ~ 2.1 */
-#define MMC_VDD_21_22   0x00000200      /* VDD voltage 2.1 ~ 2.2 */
-#define MMC_VDD_22_23   0x00000400      /* VDD voltage 2.2 ~ 2.3 */
-#define MMC_VDD_23_24   0x00000800      /* VDD voltage 2.3 ~ 2.4 */
-#define MMC_VDD_24_25   0x00001000      /* VDD voltage 2.4 ~ 2.5 */
-#define MMC_VDD_25_26   0x00002000      /* VDD voltage 2.5 ~ 2.6 */
-#define MMC_VDD_26_27   0x00004000      /* VDD voltage 2.6 ~ 2.7 */
-#define MMC_VDD_27_28   0x00008000      /* VDD voltage 2.7 ~ 2.8 */
-#define MMC_VDD_28_29   0x00010000      /* VDD voltage 2.8 ~ 2.9 */
-#define MMC_VDD_29_30   0x00020000      /* VDD voltage 2.9 ~ 3.0 */
-#define MMC_VDD_30_31   0x00040000      /* VDD voltage 3.0 ~ 3.1 */
-#define MMC_VDD_31_32   0x00080000      /* VDD voltage 3.1 ~ 3.2 */
-#define MMC_VDD_32_33   0x00100000      /* VDD voltage 3.2 ~ 3.3 */
-#define MMC_VDD_33_34   0x00200000      /* VDD voltage 3.3 ~ 3.4 */
-#define MMC_VDD_34_35   0x00400000      /* VDD voltage 3.4 ~ 3.5 */
-#define MMC_VDD_35_36   0x00800000      /* VDD voltage 3.5 ~ 3.6 */
-#define MMC_CARD_BUSY   0x80000000      /* Card Power up status bit */
-
-/*
- * Card Command Classes (CCC)
- */
-#define CCC_BASIC               (1<<0)  /* (0) Basic protocol functions */
-                                        /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
-#define CCC_STREAM_READ         (1<<1)  /* (1) Stream read commands */
-                                        /* (CMD11) */
-#define CCC_BLOCK_READ          (1<<2)  /* (2) Block read commands */
-                                        /* (CMD16,17,18) */
-#define CCC_STREAM_WRITE        (1<<3)  /* (3) Stream write commands */
-                                        /* (CMD20) */
-#define CCC_BLOCK_WRITE         (1<<4)  /* (4) Block write commands */
-                                        /* (CMD16,24,25,26,27) */
-#define CCC_ERASE               (1<<5)  /* (5) Ability to erase blocks */
-                                        /* (CMD32,33,34,35,36,37,38,39) */
-#define CCC_WRITE_PROT          (1<<6)  /* (6) Able to write protect blocks */
-                                        /* (CMD28,29,30) */
-#define CCC_LOCK_CARD           (1<<7)  /* (7) Able to lock down card */
-                                        /* (CMD16,CMD42) */
-#define CCC_APP_SPEC            (1<<8)  /* (8) Application specific */
-                                        /* (CMD55,56,57,ACMD*) */
-#define CCC_IO_MODE             (1<<9)  /* (9) I/O mode */
-                                        /* (CMD5,39,40,52,53) */
-#define CCC_SWITCH              (1<<10) /* (10) High speed switch */
-                                        /* (CMD6,34,35,36,37,50) */
-                                        /* (11) Reserved */
-                                        /* (CMD?) */
-
-/*
- * CSD field definitions
- */
-
-#define CSD_STRUCT_VER_1_0  0           /* Valid for system specification 1.0 - 1.2 */
-#define CSD_STRUCT_VER_1_1  1           /* Valid for system specification 1.4 - 2.2 */
-#define CSD_STRUCT_VER_1_2  2           /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
-#define CSD_STRUCT_EXT_CSD  3           /* Version is coded in CSD_STRUCTURE in EXT_CSD */
-
-#define CSD_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.2 */
-#define CSD_SPEC_VER_1      1           /* Implements system specification 1.4 */
-#define CSD_SPEC_VER_2      2           /* Implements system specification 2.0 - 2.2 */
-#define CSD_SPEC_VER_3      3           /* Implements system specification 3.1 - 3.2 - 3.31 */
-#define CSD_SPEC_VER_4      4           /* Implements system specification 4.0 - 4.1 */
-
-/*
- * EXT_CSD fields
- */
-
-#define EXT_CSD_BUS_WIDTH       183     /* R/W */
-#define EXT_CSD_HS_TIMING       185     /* R/W */
-#define EXT_CSD_CARD_TYPE       196     /* RO */
-
-/*
- * EXT_CSD field definitions
- */
-
-#define EXT_CSD_CMD_SET_NORMAL          (1<<0)
-#define EXT_CSD_CMD_SET_SECURE          (1<<1)
-#define EXT_CSD_CMD_SET_CPSECURE        (1<<2)
-
-#define EXT_CSD_CARD_TYPE_26    (1<<0)  /* Card can run at 26MHz */
-#define EXT_CSD_CARD_TYPE_52    (1<<1)  /* Card can run at 52MHz */
-
-#define EXT_CSD_BUS_WIDTH_1     0       /* Card is in 1 bit mode */
-#define EXT_CSD_BUS_WIDTH_4     1       /* Card is in 4 bit mode */
-#define EXT_CSD_BUS_WIDTH_8     2       /* Card is in 8 bit mode */
-
-/*
- * MMC_SWITCH access modes
- */
-
-#define MMC_SWITCH_MODE_CMD_SET         0x00    /* Change the command set */
-#define MMC_SWITCH_MODE_SET_BITS        0x01    /* Set bits which are 1 in value */
-#define MMC_SWITCH_MODE_CLEAR_BITS      0x02    /* Clear bits which are 1 in value */
-#define MMC_SWITCH_MODE_WRITE_BYTE      0x03    /* Set target to value */
-
-/*
- * SCR field definitions
- */
-
-#define SCR_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.01 */
-#define SCR_SPEC_VER_1      1           /* Implements system specification 1.10 */
-#define SCR_SPEC_VER_2      2           /* Implements system specification 2.00 */
-
-/*
- * SD bus widths
- */
-#define SD_BUS_WIDTH_1      0
-#define SD_BUS_WIDTH_4      2
-
-#endif  /* MMC_MMC_PROTOCOL_H */
-
diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h
new file mode 100644
index 000000000000..f310062cffb4
--- /dev/null
+++ b/include/linux/mmc/sd.h
@@ -0,0 +1,83 @@
+/*
+ *  include/linux/mmc/sd.h
+ *
+ *  Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#ifndef MMC_SD_H
+#define MMC_SD_H
+
+/* SD commands                           type  argument     response */
+  /* class 0 */
+/* This is basically the same command as for MMC with some quirks. */
+#define SD_SEND_RELATIVE_ADDR     3   /* bcr                     R6  */
+#define SD_SEND_IF_COND           8   /* bcr  [11:0] See below   R7  */
+
+  /* class 10 */
+#define SD_SWITCH                 6   /* adtc [31:0] See below   R1  */
+
+  /* Application commands */
+#define SD_APP_SET_BUS_WIDTH      6   /* ac   [1:0] bus width    R1  */
+#define SD_APP_SEND_NUM_WR_BLKS  22   /* adtc                    R1  */
+#define SD_APP_OP_COND           41   /* bcr  [31:0] OCR         R3  */
+#define SD_APP_SEND_SCR          51   /* adtc                    R1  */
+
+/*
+ * SD_SWITCH argument format:
+ *
+ *      [31] Check (0) or switch (1)
+ *      [30:24] Reserved (0)
+ *      [23:20] Function group 6
+ *      [19:16] Function group 5
+ *      [15:12] Function group 4
+ *      [11:8] Function group 3
+ *      [7:4] Function group 2
+ *      [3:0] Function group 1
+ */
+
+/*
+ * SD_SEND_IF_COND argument format:
+ *
+ *      [31:12] Reserved (0)
+ *      [11:8] Host Voltage Supply Flags
+ *      [7:0] Check Pattern (0xAA)
+ */
+
+/*
+ * SCR field definitions
+ */
+
+#define SCR_SPEC_VER_0          0       /* Implements system specification 1.0 - 1.01 */
+#define SCR_SPEC_VER_1          1       /* Implements system specification 1.10 */
+#define SCR_SPEC_VER_2          2       /* Implements system specification 2.00 */
+
+/*
+ * SD bus widths
+ */
+#define SD_BUS_WIDTH_1          0
+#define SD_BUS_WIDTH_4          2
+
+/*
+ * SD_SWITCH mode
+ */
+#define SD_SWITCH_CHECK         0
+#define SD_SWITCH_SET           1
+
+/*
+ * SD_SWITCH function groups
+ */
+#define SD_SWITCH_GRP_ACCESS    0
+
+/*
+ * SD_SWITCH access modes
+ */
+#define SD_SWITCH_ACCESS_DEF    0
+#define SD_SWITCH_ACCESS_HS     1
+
+#endif
+
diff --git a/include/linux/module.h b/include/linux/module.h
index 95679eb8571e..f0b0faf42d5d 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -568,7 +568,7 @@ struct device_driver;
 #ifdef CONFIG_SYSFS
 struct module;
 
-extern struct subsystem module_subsys;
+extern struct kset module_subsys;
 
 int mod_sysfs_init(struct module *mod);
 int mod_sysfs_setup(struct module *mod,
diff --git a/include/linux/msi.h b/include/linux/msi.h
index e38fe6822cb4..94bb46d82efd 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -1,6 +1,8 @@
 #ifndef LINUX_MSI_H
 #define LINUX_MSI_H
 
+#include <linux/list.h>
+
 struct msi_msg {
         u32     address_lo;     /* low 32 bits of msi message address */
         u32     address_hi;     /* high 32 bits of msi message address */
@@ -24,10 +26,8 @@ struct msi_desc {
                 unsigned default_irq;   /* default pre-assigned irq       */
         }msi_attrib;
 
-        struct {
-                __u16   head;
-                __u16   tail;
-        }link;
+        unsigned int irq;
+        struct list_head list;
 
         void __iomem *mask_base;
         struct pci_dev *dev;
@@ -41,6 +41,9 @@ struct msi_desc {
  */
 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
 void arch_teardown_msi_irq(unsigned int irq);
+extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
+extern void arch_teardown_msi_irqs(struct pci_dev *dev);
+extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
 
 
 #endif /* LINUX_MSI_H */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index ac0c92b1e002..30446222b396 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -304,7 +304,7 @@ struct net_device
 
         unsigned long           state;
 
-        struct net_device       *next;
+        struct list_head        dev_list;
         
         /* The device initialization function. Called only once. */
         int                     (*init)(struct net_device *dev);
@@ -575,13 +575,36 @@ struct packet_type {
 #include <linux/notifier.h>
 
 extern struct net_device                loopback_dev;           /* The loopback */
-extern struct net_device                *dev_base;              /* All devices */
+extern struct list_head                 dev_base_head;          /* All devices */
 extern rwlock_t                         dev_base_lock;          /* Device list lock */
 
+#define for_each_netdev(d)              \
+                list_for_each_entry(d, &dev_base_head, dev_list)
+#define for_each_netdev_safe(d, n)      \
+                list_for_each_entry_safe(d, n, &dev_base_head, dev_list)
+#define for_each_netdev_continue(d)             \
+                list_for_each_entry_continue(d, &dev_base_head, dev_list)
+#define net_device_entry(lh)    list_entry(lh, struct net_device, dev_list)
+
+static inline struct net_device *next_net_device(struct net_device *dev)
+{
+        struct list_head *lh;
+
+        lh = dev->dev_list.next;
+        return lh == &dev_base_head ? NULL : net_device_entry(lh);
+}
+
+static inline struct net_device *first_net_device(void)
+{
+        return list_empty(&dev_base_head) ? NULL :
+                net_device_entry(dev_base_head.next);
+}
+
 extern int                      netdev_boot_setup_check(struct net_device *dev);
 extern unsigned long            netdev_boot_base(const char *prefix, int unit);
 extern struct net_device    *dev_getbyhwaddr(unsigned short type, char *hwaddr);
 extern struct net_device *dev_getfirstbyhwtype(unsigned short type);
+extern struct net_device *__dev_getfirstbyhwtype(unsigned short type);
 extern void             dev_add_pack(struct packet_type *pt);
 extern void             dev_remove_pack(struct packet_type *pt);
 extern void             __dev_remove_pack(struct packet_type *pt);
diff --git a/include/linux/netfilter/nf_conntrack_proto_gre.h b/include/linux/netfilter/nf_conntrack_proto_gre.h
index 4e6bbce04ff8..535e4219d2bb 100644
--- a/include/linux/netfilter/nf_conntrack_proto_gre.h
+++ b/include/linux/netfilter/nf_conntrack_proto_gre.h
@@ -87,24 +87,6 @@ int nf_ct_gre_keymap_add(struct nf_conn *ct, enum ip_conntrack_dir dir,
 /* delete keymap entries */
 void nf_ct_gre_keymap_destroy(struct nf_conn *ct);
 
-/* get pointer to gre key, if present */
-static inline __be32 *gre_key(struct gre_hdr *greh)
-{
-        if (!greh->key)
-                return NULL;
-        if (greh->csum || greh->routing)
-                return (__be32 *)(greh+sizeof(*greh)+4);
-        return (__be32 *)(greh+sizeof(*greh));
-}
-
-/* get pointer ot gre csum, if present */
-static inline __sum16 *gre_csum(struct gre_hdr *greh)
-{
-        if (!greh->csum)
-                return NULL;
-        return (__sum16 *)(greh+sizeof(*greh));
-}
-
 extern void nf_ct_gre_keymap_flush(void);
 extern void nf_nat_need_gre(void);
 
diff --git a/include/linux/netfilter_bridge.h b/include/linux/netfilter_bridge.h
index 19060030bac9..533ee351a273 100644
--- a/include/linux/netfilter_bridge.h
+++ b/include/linux/netfilter_bridge.h
@@ -55,18 +55,25 @@ static inline int nf_bridge_maybe_copy_header(struct sk_buff *skb)
         return 0;
 }
 
+static inline unsigned int nf_bridge_encap_header_len(const struct sk_buff *skb)
+{
+        switch (skb->protocol) {
+        case __constant_htons(ETH_P_8021Q):
+                return VLAN_HLEN;
+        case __constant_htons(ETH_P_PPP_SES):
+                return PPPOE_SES_HLEN;
+        default:
+                return 0;
+        }
+}
+
 /* This is called by the IP fragmenting code and it ensures there is
  * enough room for the encapsulating header (if there is one). */
-static inline int nf_bridge_pad(const struct sk_buff *skb)
+static inline unsigned int nf_bridge_pad(const struct sk_buff *skb)
 {
-        int padding = 0;
-
-        if (skb->nf_bridge && skb->protocol == htons(ETH_P_8021Q))
-                padding = VLAN_HLEN;
-        else if (skb->nf_bridge && skb->protocol == htons(ETH_P_PPP_SES))
-                padding = PPPOE_SES_HLEN;
-
-        return padding;
+        if (skb->nf_bridge)
+                return nf_bridge_encap_header_len(skb);
+        return 0;
 }
 
 struct bridge_skb_cb {
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index f41688f56632..2e23353c28a5 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -31,7 +31,7 @@ struct sockaddr_nl
 {
         sa_family_t     nl_family;      /* AF_NETLINK   */
         unsigned short  nl_pad;         /* zero         */
-        __u32           nl_pid;         /* process pid  */
+        __u32           nl_pid;         /* port ID      */
         __u32           nl_groups;      /* multicast groups mask */
 };
 
@@ -41,7 +41,7 @@ struct nlmsghdr
         __u16           nlmsg_type;     /* Message content */
         __u16           nlmsg_flags;    /* Additional flags */
         __u32           nlmsg_seq;      /* Sequence number */
-        __u32           nlmsg_pid;      /* Sending process PID */
+        __u32           nlmsg_pid;      /* Sending process port ID */
 };
 
 /* Flags values */
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index e9ae0c6e2c62..0543439a97af 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -455,7 +455,7 @@ nfs_have_writebacks(struct inode *inode)
 /*
  * Allocate nfs_write_data structures
  */
-extern struct nfs_write_data *nfs_writedata_alloc(size_t len);
+extern struct nfs_write_data *nfs_writedata_alloc(unsigned int npages);
 
 /*
  * linux/fs/nfs/read.c
@@ -469,7 +469,7 @@ extern void nfs_readdata_release(void *data);
 /*
  * Allocate nfs_read_data structures
  */
-extern struct nfs_read_data *nfs_readdata_alloc(size_t len);
+extern struct nfs_read_data *nfs_readdata_alloc(unsigned int npages);
 
 /*
  * linux/fs/nfs3proc.c
diff --git a/include/linux/nfs_mount.h b/include/linux/nfs_mount.h
index 659c75438454..cc8b9c59acb8 100644
--- a/include/linux/nfs_mount.h
+++ b/include/linux/nfs_mount.h
@@ -61,6 +61,7 @@ struct nfs_mount_data {
 #define NFS_MOUNT_NOACL         0x0800  /* 4 */
 #define NFS_MOUNT_STRICTLOCK    0x1000  /* reserved for NFSv4 */
 #define NFS_MOUNT_SECFLAVOUR    0x2000  /* 5 */
+#define NFS_MOUNT_NORDIRPLUS    0x4000  /* 5 */
 #define NFS_MOUNT_FLAGMASK      0xFFFF
 
 #endif
diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h
index 16b0266b14fd..41afab6b5f09 100644
--- a/include/linux/nfs_page.h
+++ b/include/linux/nfs_page.h
@@ -21,8 +21,7 @@
 /*
  * Valid flags for the radix tree
  */
-#define NFS_PAGE_TAG_DIRTY      0
-#define NFS_PAGE_TAG_WRITEBACK  1
+#define NFS_PAGE_TAG_WRITEBACK  0
 
 /*
  * Valid flags for a dirty buffer
@@ -39,7 +38,7 @@ struct nfs_page {
         struct page             *wb_page;       /* page to read in/write out */
         struct nfs_open_context *wb_context;    /* File state context info */
         atomic_t                wb_complete;    /* i/os we're waiting for */
-        unsigned long           wb_index;       /* Offset >> PAGE_CACHE_SHIFT */
+        pgoff_t                 wb_index;       /* Offset >> PAGE_CACHE_SHIFT */
         unsigned int            wb_offset,      /* Offset & ~PAGE_CACHE_MASK */
                                 wb_pgbase,      /* Start of page data */
                                 wb_bytes;       /* Length of request */
@@ -48,6 +47,19 @@ struct nfs_page {
         struct nfs_writeverf    wb_verf;        /* Commit cookie */
 };
 
+struct nfs_pageio_descriptor {
+        struct list_head        pg_list;
+        unsigned long           pg_bytes_written;
+        size_t                  pg_count;
+        size_t                  pg_bsize;
+        unsigned int            pg_base;
+
+        struct inode            *pg_inode;
+        int                     (*pg_doio)(struct inode *, struct list_head *, unsigned int, size_t, int);
+        int                     pg_ioflags;
+        int                     pg_error;
+};
+
 #define NFS_WBACK_BUSY(req)     (test_bit(PG_BUSY,&(req)->wb_flags))
 
 extern  struct nfs_page *nfs_create_request(struct nfs_open_context *ctx,
@@ -59,13 +71,16 @@ extern	void nfs_clear_request(struct nfs_page *req);
 extern  void nfs_release_request(struct nfs_page *req);
 
 
-extern  long nfs_scan_dirty(struct address_space *mapping,
-                                struct writeback_control *wbc,
-                                struct list_head *dst);
 extern  int nfs_scan_list(struct nfs_inode *nfsi, struct list_head *head, struct list_head *dst,
-                          unsigned long idx_start, unsigned int npages);
-extern  int nfs_coalesce_requests(struct list_head *, struct list_head *,
-                                  unsigned int);
+                          pgoff_t idx_start, unsigned int npages);
+extern  void nfs_pageio_init(struct nfs_pageio_descriptor *desc,
+                             struct inode *inode,
+                             int (*doio)(struct inode *, struct list_head *, unsigned int, size_t, int),
+                             size_t bsize,
+                             int how);
+extern  int nfs_pageio_add_request(struct nfs_pageio_descriptor *,
+                                   struct nfs_page *);
+extern  void nfs_pageio_complete(struct nfs_pageio_descriptor *desc);
 extern  int nfs_wait_on_request(struct nfs_page *);
 extern  void nfs_unlock_request(struct nfs_page *req);
 extern  int nfs_set_page_writeback_locked(struct nfs_page *req);
diff --git a/include/linux/nubus.h b/include/linux/nubus.h
index 870e66a96286..cdb3e9b8db54 100644
--- a/include/linux/nubus.h
+++ b/include/linux/nubus.h
@@ -28,18 +28,18 @@ enum nubus_category {
 };
 
 enum nubus_type_network {
-        NUBUS_TYPE_ETHERNET      = 0x0001,
-        NUBUS_TYPE_RS232         = 0x0002
+        NUBUS_TYPE_ETHERNET      = 0x0001,
+        NUBUS_TYPE_RS232         = 0x0002
 };
 
 enum nubus_type_display {
-        NUBUS_TYPE_VIDEO         = 0x0001
+        NUBUS_TYPE_VIDEO         = 0x0001
 };
 
 enum nubus_type_cpu {
-        NUBUS_TYPE_68020         = 0x0003,
-        NUBUS_TYPE_68030         = 0x0004,
-        NUBUS_TYPE_68040         = 0x0005
+        NUBUS_TYPE_68020         = 0x0003,
+        NUBUS_TYPE_68030         = 0x0004,
+        NUBUS_TYPE_68040         = 0x0005
 };
 
 /* Known <Cat,Type,SW,HW> tuples: (according to TattleTech and Slots)
@@ -56,6 +56,7 @@ enum nubus_type_cpu {
  *
  *  SONIC comm-slot/on-board and DuoDock Ethernet: <4,1,1,272>
  *  SONIC LC-PDS Ethernet (Dayna, but like Apple 16-bit, sort of): <4,1,1,271>
+ *  Apple SONIC LC-PDS Ethernet ("Apple Ethernet LC Twisted-Pair Card"): <4,1,0,281>
  *  Sonic Systems Ethernet A-Series Card: <4,1,268,256>
  *  Asante MacCon NuBus-A: <4,1,260,256> (alpha-1.0,1.1 revision)
  *   ROM on the above card: <2,1,0,0>
@@ -80,24 +81,26 @@ enum nubus_type_cpu {
 /* Add known DrSW values here */
 enum nubus_drsw {
         /* NUBUS_CAT_DISPLAY */
-        NUBUS_DRSW_APPLE        = 0x0001,
-        NUBUS_DRSW_APPLE_HIRES  = 0x0013, /* MacII HiRes card driver */
+        NUBUS_DRSW_APPLE        = 0x0001,
+        NUBUS_DRSW_APPLE_HIRES  = 0x0013, /* MacII HiRes card driver */
         
         /* NUBUS_CAT_NETWORK */
-        NUBUS_DRSW_CABLETRON    = 0x0001,
-        NUBUS_DRSW_SONIC_LC     = 0x0001,
-        NUBUS_DRSW_KINETICS     = 0x0103,
-        NUBUS_DRSW_ASANTE       = 0x0104,
-        NUBUS_DRSW_DAYNA        = 0x010b,
-        NUBUS_DRSW_FARALLON     = 0x010c,
-        NUBUS_DRSW_APPLE_SN     = 0x010f,
-        NUBUS_DRSW_DAYNA2       = 0x0115,
+        NUBUS_DRSW_3COM         = 0x0000,
+        NUBUS_DRSW_CABLETRON    = 0x0001,
+        NUBUS_DRSW_SONIC_LC     = 0x0001,
+        NUBUS_DRSW_KINETICS     = 0x0103,
+        NUBUS_DRSW_ASANTE       = 0x0104,
+        NUBUS_DRSW_TECHWORKS    = 0x0109,
+        NUBUS_DRSW_DAYNA        = 0x010b,
+        NUBUS_DRSW_FARALLON     = 0x010c,
+        NUBUS_DRSW_APPLE_SN     = 0x010f,
+        NUBUS_DRSW_DAYNA2       = 0x0115,
         NUBUS_DRSW_FOCUS        = 0x011a,
         NUBUS_DRSW_ASANTE_CS    = 0x011d, /* use asante SMC9194 driver */
-        NUBUS_DRSW_DAYNA_LC     = 0x011e,
+        NUBUS_DRSW_DAYNA_LC     = 0x011e,
 
         /* NUBUS_CAT_CPU */
-        NUBUS_DRSW_NONE         = 0x0000,
+        NUBUS_DRSW_NONE         = 0x0000,
 };
 
 /* DrHW: Uniquely identifies the hardware interface to a board (or at
@@ -107,27 +110,48 @@ enum nubus_drsw {
 /* Add known DrHW values here */
 enum nubus_drhw {
         /* NUBUS_CAT_DISPLAY */
-        NUBUS_DRHW_APPLE_TFB    = 0x0001, /* Toby frame buffer card */
-        NUBUS_DRHW_APPLE_HRVC   = 0x0013, /* Mac II High Res Video card */
-        NUBUS_DRHW_APPLE_RBV1   = 0x0018, /* IIci RBV video */
-        NUBUS_DRHW_APPLE_MDC    = 0x0019, /* Macintosh Display Card */
-        NUBUS_DRHW_APPLE_SONORA = 0x0022, /* Sonora built-in video */
-        NUBUS_DRHW_APPLE_JET    = 0x0029, /* Jet framebuffer (DuoDock) */
+        NUBUS_DRHW_APPLE_TFB      = 0x0001, /* Toby frame buffer card */
+        NUBUS_DRHW_APPLE_WVC      = 0x0006, /* Apple Workstation Video Card */
+        NUBUS_DRHW_SIGMA_CLRMAX   = 0x0007, /* Sigma Design ColorMax */
+        NUBUS_DRHW_APPLE_SE30     = 0x0009, /* Apple SE/30 video */
+        NUBUS_DRHW_APPLE_HRVC     = 0x0013, /* Mac II High-Res Video Card */
+        NUBUS_DRHW_APPLE_PVC      = 0x0017, /* Mac II Portrait Video Card */
+        NUBUS_DRHW_APPLE_RBV1     = 0x0018, /* IIci RBV video */
+        NUBUS_DRHW_APPLE_MDC      = 0x0019, /* Macintosh Display Card */
+        NUBUS_DRHW_APPLE_SONORA   = 0x0022, /* Sonora built-in video */
+        NUBUS_DRHW_APPLE_24AC     = 0x002b, /* Mac 24AC Video Card */
         NUBUS_DRHW_APPLE_VALKYRIE = 0x002e,
-        NUBUS_DRHW_THUNDER24    = 0x02cb, /* SuperMac Thunder/24 */
+        NUBUS_DRHW_APPLE_JET      = 0x0029, /* Jet framebuffer (DuoDock) */
+        NUBUS_DRHW_SMAC_GFX       = 0x0105, /* SuperMac GFX */
+        NUBUS_DRHW_RASTER_CB264   = 0x013B, /* RasterOps ColorBoard 264 */
+        NUBUS_DRHW_MICRON_XCEED   = 0x0146, /* Micron Exceed color */
+        NUBUS_DRHW_RDIUS_GSC      = 0x0153, /* Radius GS/C */
+        NUBUS_DRHW_SMAC_SPEC8     = 0x017B, /* SuperMac Spectrum/8 */
+        NUBUS_DRHW_SMAC_SPEC24    = 0x017C, /* SuperMac Spectrum/24 */
+        NUBUS_DRHW_RASTER_CB364   = 0x026F, /* RasterOps ColorBoard 364 */
+        NUBUS_DRHW_RDIUS_DCGX     = 0x027C, /* Radius DirectColor/GX */
+        NUBUS_DRHW_RDIUS_PC8      = 0x0291, /* Radius PrecisionColor 8 */
+        NUBUS_DRHW_LAPIS_PCS8     = 0x0292, /* Lapis ProColorServer 8 */
+        NUBUS_DRHW_RASTER_24LXI   = 0x02A0, /* RasterOps 8/24 XLi */
+        NUBUS_DRHW_RASTER_PBPGT   = 0x02A5, /* RasterOps PaintBoard Prism GT */
+        NUBUS_DRHW_EMACH_FSX      = 0x02AE, /* E-Machines Futura SX */
+        NUBUS_DRHW_SMAC_THUND24   = 0x02CB, /* SuperMac Thunder/24 */
+        NUBUS_DRHW_RDIUS_PC24XP   = 0x0406, /* Radius PrecisionColor 24Xp */
+        NUBUS_DRHW_RDIUS_PC24X    = 0x040A, /* Radius PrecisionColor 24X */
+        NUBUS_DRHW_RDIUS_PC8XJ    = 0x040B, /* Radius PrecisionColor 8XJ */
         
         /* NUBUS_CAT_NETWORK */
-        NUBUS_DRHW_INTERLAN     = 0x0100,
-        NUBUS_DRHW_SMC9194      = 0x0101,
-        NUBUS_DRHW_KINETICS     = 0x0106,
-        NUBUS_DRHW_CABLETRON    = 0x0109,
-        NUBUS_DRHW_ASANTE_LC    = 0x010f,
-        NUBUS_DRHW_SONIC        = 0x0110,
-        NUBUS_DRHW_SONIC_NB     = 0x0118,
-        NUBUS_DRHW_SONIC_LC     = 0x0119,
-        
-        /* NUBUS_CAT_COMMUNICATIONS */
-        NUBUS_DRHW_DOVEFAX      = 0x0100,
+        NUBUS_DRHW_INTERLAN       = 0x0100,
+        NUBUS_DRHW_SMC9194        = 0x0101,
+        NUBUS_DRHW_KINETICS       = 0x0106,
+        NUBUS_DRHW_CABLETRON      = 0x0109,
+        NUBUS_DRHW_ASANTE_LC      = 0x010f,
+        NUBUS_DRHW_SONIC          = 0x0110,
+        NUBUS_DRHW_TECHWORKS      = 0x0112,
+        NUBUS_DRHW_APPLE_SONIC_NB = 0x0118,
+        NUBUS_DRHW_APPLE_SONIC_LC = 0x0119,
+        NUBUS_DRHW_FOCUS          = 0x011c,
+        NUBUS_DRHW_SONNET         = 0x011d,
 };
 
 /* Resource IDs: These are the identifiers for the various weird and
@@ -153,17 +177,17 @@ enum nubus_res_id {
 
 /* Category-specific resources. */
 enum nubus_board_res_id {
-        NUBUS_RESID_BOARDID      = 0x0020,
+        NUBUS_RESID_BOARDID      = 0x0020,
         NUBUS_RESID_PRAMINITDATA = 0x0021,
-        NUBUS_RESID_PRIMARYINIT  = 0x0022,
+        NUBUS_RESID_PRIMARYINIT  = 0x0022,
         NUBUS_RESID_TIMEOUTCONST = 0x0023,
-        NUBUS_RESID_VENDORINFO   = 0x0024,
-        NUBUS_RESID_BOARDFLAGS   = 0x0025,
-        NUBUS_RESID_SECONDINIT   = 0x0026,
+        NUBUS_RESID_VENDORINFO   = 0x0024,
+        NUBUS_RESID_BOARDFLAGS   = 0x0025,
+        NUBUS_RESID_SECONDINIT   = 0x0026,
 
         /* Not sure why Apple put these next two in here */
-        NUBUS_RESID_VIDNAMES     = 0x0041,
-        NUBUS_RESID_VIDMODES     = 0x007e
+        NUBUS_RESID_VIDNAMES     = 0x0041,
+        NUBUS_RESID_VIDMODES     = 0x007e
 };
 
 /* Fields within the vendor info directory */
@@ -185,13 +209,13 @@ enum nubus_cpu_res_id {
 };
 
 enum nubus_display_res_id {
-        NUBUS_RESID_GAMMADIR    = 0x0040,
-        NUBUS_RESID_FIRSTMODE   = 0x0080,
-        NUBUS_RESID_SECONDMODE  = 0x0081,
-        NUBUS_RESID_THIRDMODE   = 0x0082,
-        NUBUS_RESID_FOURTHMODE  = 0x0083,
-        NUBUS_RESID_FIFTHMODE   = 0x0084,
-        NUBUS_RESID_SIXTHMODE   = 0x0085
+        NUBUS_RESID_GAMMADIR    = 0x0040,
+        NUBUS_RESID_FIRSTMODE   = 0x0080,
+        NUBUS_RESID_SECONDMODE  = 0x0081,
+        NUBUS_RESID_THIRDMODE   = 0x0082,
+        NUBUS_RESID_FOURTHMODE  = 0x0083,
+        NUBUS_RESID_FIFTHMODE   = 0x0084,
+        NUBUS_RESID_SIXTHMODE   = 0x0085
 };
 
 struct nubus_dir
@@ -214,7 +238,7 @@ struct nubus_board {
         struct nubus_board* next;
         struct nubus_dev* first_dev;
         
-        /* Only 9-E actually exist, though 0-8 are also theoretically
+        /* Only 9-E actually exist, though 0-8 are also theoretically
            possible, and 0 is a special case which represents the
            motherboard and onboard peripherals (Ethernet, video) */
         int slot;
diff --git a/include/linux/parser.h b/include/linux/parser.h
index fa3332861a09..26b2bdfcaf06 100644
--- a/include/linux/parser.h
+++ b/include/linux/parser.h
@@ -11,7 +11,7 @@
 /* associates an integer enumerator with a pattern string. */
 struct match_token {
         int token;
-        char *pattern;
+        const char *pattern;
 };
 
 typedef struct match_token match_table_t[];
@@ -29,5 +29,5 @@ int match_token(char *, match_table_t table, substring_t args[]);
 int match_int(substring_t *, int *result);
 int match_octal(substring_t *, int *result);
 int match_hex(substring_t *, int *result);
-void match_strcpy(char *, substring_t *);
-char *match_strdup(substring_t *);
+void match_strcpy(char *, const substring_t *);
+char *match_strdup(const substring_t *);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 972491089ac9..fbf3766dac1e 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -96,6 +96,19 @@ enum pci_channel_state {
         pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
 };
 
+typedef unsigned int __bitwise pcie_reset_state_t;
+
+enum pcie_reset_state {
+        /* Reset is NOT asserted (Use to deassert reset) */
+        pcie_deassert_reset = (__force pcie_reset_state_t) 1,
+
+        /* Use #PERST to reset PCI-E device */
+        pcie_warm_reset = (__force pcie_reset_state_t) 2,
+
+        /* Use PCI-E Hot Reset to reset device */
+        pcie_hot_reset = (__force pcie_reset_state_t) 3
+};
+
 typedef unsigned short __bitwise pci_bus_flags_t;
 enum pci_bus_flags {
         PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
@@ -176,10 +189,12 @@ struct pci_dev {
         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
 #ifdef CONFIG_PCI_MSI
-        unsigned int first_msi_irq;
+        struct list_head msi_list;
 #endif
 };
 
+extern struct pci_dev *alloc_pci_dev(void);
+
 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
@@ -392,12 +407,6 @@ struct pci_driver {
         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 
-/*
- * pci_module_init is obsolete, this stays here till we fix up all usages of it
- * in the tree.
- */
-#define pci_module_init pci_register_driver
-
 /**
  * PCI_VDEVICE - macro used to describe a specific pci device in short form
  * @vend: the vendor name
@@ -532,6 +541,7 @@ static inline int pci_is_managed(struct pci_dev *pdev)
 
 void pci_disable_device(struct pci_dev *dev);
 void pci_set_master(struct pci_dev *dev);
+int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
 #define HAVE_PCI_SET_MWI
 int __must_check pci_set_mwi(struct pci_dev *dev);
 void pci_clear_mwi(struct pci_dev *dev);
@@ -730,6 +740,9 @@ static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) {
 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
 
+static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; }
+static inline void pci_release_regions(struct pci_dev *dev) { }
+
 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
 
 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index a675a05c4091..ab4cb6ecd47c 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -174,7 +174,7 @@ extern int pci_hp_register		(struct hotplug_slot *slot);
 extern int pci_hp_deregister            (struct hotplug_slot *slot);
 extern int __must_check pci_hp_change_slot_info (struct hotplug_slot *slot,
                                                  struct hotplug_slot_info *info);
-extern struct subsystem pci_hotplug_slots_subsys;
+extern struct kset pci_hotplug_slots_subsys;
 
 /* PCI Setting Record (Type 0) */
 struct hpp_type0 {
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 1b0ddbb8a804..ae849f0d4430 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1213,11 +1213,13 @@
 #define PCI_DEVICE_ID_NVIDIA_NVENET_16              0x03E5
 #define PCI_DEVICE_ID_NVIDIA_NVENET_17              0x03E6
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA      0x03E7
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS     0x03EB
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE       0x03EC
 #define PCI_DEVICE_ID_NVIDIA_NVENET_18              0x03EE
 #define PCI_DEVICE_ID_NVIDIA_NVENET_19              0x03EF
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2     0x03F6
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3     0x03F7
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS     0x0446
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE       0x0448
 #define PCI_DEVICE_ID_NVIDIA_NVENET_20              0x0450
 #define PCI_DEVICE_ID_NVIDIA_NVENET_21              0x0451
@@ -1924,6 +1926,7 @@
 #define PCI_DEVICE_ID_TIGON3_5752       0x1600
 #define PCI_DEVICE_ID_TIGON3_5752M      0x1601
 #define PCI_DEVICE_ID_NX2_5709          0x1639
+#define PCI_DEVICE_ID_NX2_5709S         0x163a
 #define PCI_DEVICE_ID_TIGON3_5700       0x1644
 #define PCI_DEVICE_ID_TIGON3_5701       0x1645
 #define PCI_DEVICE_ID_TIGON3_5702       0x1646
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 600e3d387ffc..b72be2f79e6a 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -11,9 +11,16 @@
 
 /* Enough to cover all DEFINE_PER_CPUs in kernel, including modules. */
 #ifndef PERCPU_ENOUGH_ROOM
-#define PERCPU_ENOUGH_ROOM 32768
+#ifdef CONFIG_MODULES
+#define PERCPU_MODULE_RESERVE   8192
+#else
+#define PERCPU_MODULE_RESERVE   0
 #endif
 
+#define PERCPU_ENOUGH_ROOM                                              \
+        (__per_cpu_end - __per_cpu_start + PERCPU_MODULE_RESERVE)
+#endif  /* PERCPU_ENOUGH_ROOM */
+
 /*
  * Must be an lvalue. Since @var must be a simple identifier,
  * we force a syntax error here if it isn't.
diff --git a/include/linux/poison.h b/include/linux/poison.h
index 3e628f990fdf..89580b764959 100644
--- a/include/linux/poison.h
+++ b/include/linux/poison.h
@@ -26,9 +26,6 @@
 /********** arch/$ARCH/mm/init.c **********/
 #define POISON_FREE_INITMEM     0xcc
 
-/********** arch/x86_64/mm/init.c **********/
-#define POISON_FREE_INITDATA    0xba
-
 /********** arch/ia64/hp/common/sba_iommu.c **********/
 /*
  * arch/ia64/hp/common/sba_iommu.c uses a 16-byte poison string with a
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 253a2b9be9d6..e7367c74e1bb 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -197,7 +197,7 @@ typedef unsigned char *sk_buff_data_t;
  *      @tstamp: Time we arrived
  *      @dev: Device we arrived on/are leaving by
  *      @iif: ifindex of device we arrived on
- *      @h: Transport layer header
+ *      @transport_header: Transport layer header
  *      @network_header: Network layer header
  *      @mac_header: Link layer header
  *      @dst: destination entry
diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h
index c7a78eef2b4f..66611423c8ee 100644
--- a/include/linux/sunrpc/clnt.h
+++ b/include/linux/sunrpc/clnt.h
@@ -84,7 +84,8 @@ struct rpc_procinfo {
         u32                     p_proc;         /* RPC procedure number */
         kxdrproc_t              p_encode;       /* XDR encode function */
         kxdrproc_t              p_decode;       /* XDR decode function */
-        unsigned int            p_bufsiz;       /* req. buffer size */
+        unsigned int            p_arglen;       /* argument hdr length (u32) */
+        unsigned int            p_replen;       /* reply hdr length (u32) */
         unsigned int            p_count;        /* call count */
         unsigned int            p_timer;        /* Which RTT timer to use */
         u32                     p_statidx;      /* Which procedure to account */
@@ -121,8 +122,8 @@ struct rpc_clnt *rpc_clone_client(struct rpc_clnt *);
 int             rpc_shutdown_client(struct rpc_clnt *);
 int             rpc_destroy_client(struct rpc_clnt *);
 void            rpc_release_client(struct rpc_clnt *);
-void            rpc_getport(struct rpc_task *);
-int             rpc_register(u32, u32, int, unsigned short, int *);
+int             rpcb_register(u32, u32, int, unsigned short, int *);
+void            rpcb_getport(struct rpc_task *);
 
 void            rpc_call_setup(struct rpc_task *, struct rpc_message *, int);
 
@@ -144,7 +145,7 @@ char *		rpc_peeraddr2str(struct rpc_clnt *, enum rpc_display_format_t);
 /*
  * Helper function for NFSroot support
  */
-int             rpc_getport_external(struct sockaddr_in *, __u32, __u32, int);
+int             rpcb_getport_external(struct sockaddr_in *, __u32, __u32, int);
 
 #endif /* __KERNEL__ */
 #endif /* _LINUX_SUNRPC_CLNT_H */
diff --git a/include/linux/sunrpc/debug.h b/include/linux/sunrpc/debug.h
index b7c7307ceec6..3912cf16361e 100644
--- a/include/linux/sunrpc/debug.h
+++ b/include/linux/sunrpc/debug.h
@@ -17,7 +17,7 @@
 #define RPCDBG_DEBUG            0x0004
 #define RPCDBG_NFS              0x0008
 #define RPCDBG_AUTH             0x0010
-#define RPCDBG_PMAP             0x0020
+#define RPCDBG_BIND             0x0020
 #define RPCDBG_SCHED            0x0040
 #define RPCDBG_TRANS            0x0080
 #define RPCDBG_SVCSOCK          0x0100
diff --git a/include/linux/sunrpc/msg_prot.h b/include/linux/sunrpc/msg_prot.h
index 606cb2165232..784d4c3ef651 100644
--- a/include/linux/sunrpc/msg_prot.h
+++ b/include/linux/sunrpc/msg_prot.h
@@ -78,10 +78,6 @@ enum rpc_auth_stat {
         RPCSEC_GSS_CTXPROBLEM = 14
 };
 
-#define RPC_PMAP_PROGRAM        100000
-#define RPC_PMAP_VERSION        2
-#define RPC_PMAP_PORT           111
-
 #define RPC_MAXNETNAMELEN       256
 
 /*
diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h
index 3069ecca0129..2047fb202a13 100644
--- a/include/linux/sunrpc/sched.h
+++ b/include/linux/sunrpc/sched.h
@@ -264,7 +264,7 @@ struct rpc_task *rpc_wake_up_next(struct rpc_wait_queue *);
 void            rpc_wake_up_status(struct rpc_wait_queue *, int);
 void            rpc_delay(struct rpc_task *, unsigned long);
 void *          rpc_malloc(struct rpc_task *, size_t);
-void            rpc_free(struct rpc_task *);
+void            rpc_free(void *);
 int             rpciod_up(void);
 void            rpciod_down(void);
 int             __rpc_wait_for_completion_task(struct rpc_task *task, int (*)(void *));
diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h
index f780e72fc417..fa89ce6ce076 100644
--- a/include/linux/sunrpc/xprt.h
+++ b/include/linux/sunrpc/xprt.h
@@ -84,7 +84,9 @@ struct rpc_rqst {
         struct list_head        rq_list;
 
         __u32 *                 rq_buffer;      /* XDR encode buffer */
-        size_t                  rq_bufsize;
+        size_t                  rq_bufsize,
+                                rq_callsize,
+                                rq_rcvsize;
 
         struct xdr_buf          rq_private_buf;         /* The receive buffer
                                                          * used in the softirq.
@@ -112,7 +114,7 @@ struct rpc_xprt_ops {
         void            (*set_port)(struct rpc_xprt *xprt, unsigned short port);
         void            (*connect)(struct rpc_task *task);
         void *          (*buf_alloc)(struct rpc_task *task, size_t size);
-        void            (*buf_free)(struct rpc_task *task);
+        void            (*buf_free)(void *buffer);
         int             (*send_request)(struct rpc_task *task);
         void            (*set_retrans_timeout)(struct rpc_task *task);
         void            (*timer)(struct rpc_task *task);
@@ -150,6 +152,7 @@ struct rpc_xprt {
         unsigned long           state;          /* transport state */
         unsigned char           shutdown   : 1, /* being shut down */
                                 resvport   : 1; /* use a reserved port */
+        unsigned int            bind_index;     /* bind function index */
 
         /*
          * Connection of transports
diff --git a/include/linux/tifm.h b/include/linux/tifm.h
index 3deb0a6c1370..2a196982601f 100644
--- a/include/linux/tifm.h
+++ b/include/linux/tifm.h
@@ -14,16 +14,16 @@
 
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
-#include <linux/wait.h>
 #include <linux/delay.h>
 #include <linux/pci.h>
-#include <linux/kthread.h>
+#include <linux/workqueue.h>
 
 /* Host registers (relative to pci base address): */
 enum {
         FM_SET_INTERRUPT_ENABLE   = 0x008,
         FM_CLEAR_INTERRUPT_ENABLE = 0x00c,
-        FM_INTERRUPT_STATUS       = 0x014 };
+        FM_INTERRUPT_STATUS       = 0x014
+};
 
 /* Socket registers (relative to socket base address): */
 enum {
@@ -58,14 +58,8 @@ enum {
         SOCK_MS_DATA                   = 0x188,
         SOCK_MS_STATUS                 = 0x18c,
         SOCK_MS_SYSTEM                 = 0x190,
-        SOCK_FIFO_ACCESS               = 0x200 };
-
-
-#define TIFM_IRQ_ENABLE           0x80000000
-#define TIFM_IRQ_SOCKMASK(x)      (x)
-#define TIFM_IRQ_CARDMASK(x)      ((x) << 8)
-#define TIFM_IRQ_FIFOMASK(x)      ((x) << 16)
-#define TIFM_IRQ_SETALL           0xffffffff
+        SOCK_FIFO_ACCESS               = 0x200
+};
 
 #define TIFM_CTRL_LED             0x00000040
 #define TIFM_CTRL_FAST_CLK        0x00000100
@@ -73,63 +67,76 @@ enum {
 #define TIFM_SOCK_STATE_OCCUPIED  0x00000008
 #define TIFM_SOCK_STATE_POWERED   0x00000080
 
-#define TIFM_FIFO_ENABLE          0x00000001 /* Meaning of this constant is unverified */
+#define TIFM_FIFO_ENABLE          0x00000001
+#define TIFM_FIFO_READY           0x00000001
 #define TIFM_FIFO_INT_SETALL      0x0000ffff
-#define TIFM_FIFO_INTMASK         0x00000005 /* Meaning of this constant is unverified */
+#define TIFM_FIFO_INTMASK         0x00000005
+
+#define TIFM_DMA_RESET            0x00000002
+#define TIFM_DMA_TX               0x00008000
+#define TIFM_DMA_EN               0x00000001
+#define TIFM_DMA_TSIZE            0x0000007f
 
-#define TIFM_DMA_RESET            0x00000002 /* Meaning of this constant is unverified */
-#define TIFM_DMA_TX               0x00008000 /* Meaning of this constant is unverified */
-#define TIFM_DMA_EN               0x00000001 /* Meaning of this constant is unverified */
+#define TIFM_TYPE_XD 1
+#define TIFM_TYPE_MS 2
+#define TIFM_TYPE_SD 3
 
-typedef enum {FM_NULL = 0, FM_XD = 0x01, FM_MS = 0x02, FM_SD = 0x03} tifm_media_id;
+struct tifm_device_id {
+        unsigned char type;
+};
 
 struct tifm_driver;
 struct tifm_dev {
-        char __iomem            *addr;
-        spinlock_t              lock;
-        tifm_media_id           media_id;
-        unsigned int            socket_id;
+        char __iomem  *addr;
+        spinlock_t    lock;
+        unsigned char type;
+        unsigned int  socket_id;
 
-        void                    (*signal_irq)(struct tifm_dev *sock,
-                                              unsigned int sock_irq_status);
+        void          (*card_event)(struct tifm_dev *sock);
+        void          (*data_event)(struct tifm_dev *sock);
 
-        struct tifm_driver      *drv;
-        struct device           dev;
+        struct device dev;
 };
 
 struct tifm_driver {
-        tifm_media_id        *id_table;
-        int                  (*probe)(struct tifm_dev *dev);
-        void                 (*remove)(struct tifm_dev *dev);
-        int                  (*suspend)(struct tifm_dev *dev,
-                                        pm_message_t state);
-        int                  (*resume)(struct tifm_dev *dev);
-
-        struct device_driver driver;
+        struct tifm_device_id *id_table;
+        int                   (*probe)(struct tifm_dev *dev);
+        void                  (*remove)(struct tifm_dev *dev);
+        int                   (*suspend)(struct tifm_dev *dev,
+                                         pm_message_t state);
+        int                   (*resume)(struct tifm_dev *dev);
+
+        struct device_driver  driver;
 };
 
 struct tifm_adapter {
-        char __iomem            *addr;
-        spinlock_t              lock;
-        unsigned int            irq_status;
-        unsigned int            socket_change_set;
-        wait_queue_head_t       change_set_notify;
-        unsigned int            id;
-        unsigned int            num_sockets;
-        struct tifm_dev         **sockets;
-        struct task_struct      *media_switcher;
-        struct class_device     cdev;
-        struct device           *dev;
-
-        void                    (*eject)(struct tifm_adapter *fm, struct tifm_dev *sock);
+        char __iomem        *addr;
+        spinlock_t          lock;
+        unsigned int        irq_status;
+        unsigned int        socket_change_set;
+        unsigned int        id;
+        unsigned int        num_sockets;
+        struct completion   *finish_me;
+
+        struct work_struct  media_switcher;
+        struct class_device cdev;
+
+        void                (*eject)(struct tifm_adapter *fm,
+                                     struct tifm_dev *sock);
+
+        struct tifm_dev     *sockets[0];
 };
 
-struct tifm_adapter *tifm_alloc_adapter(void);
-void tifm_free_device(struct device *dev);
-void tifm_free_adapter(struct tifm_adapter *fm);
-int tifm_add_adapter(struct tifm_adapter *fm, int (*mediathreadfn)(void *data));
+struct tifm_adapter *tifm_alloc_adapter(unsigned int num_sockets,
+                                        struct device *dev);
+int tifm_add_adapter(struct tifm_adapter *fm);
 void tifm_remove_adapter(struct tifm_adapter *fm);
-struct tifm_dev *tifm_alloc_device(struct tifm_adapter *fm);
+void tifm_free_adapter(struct tifm_adapter *fm);
+
+void tifm_free_device(struct device *dev);
+struct tifm_dev *tifm_alloc_device(struct tifm_adapter *fm, unsigned int id,
+                                   unsigned char type);
+
 int tifm_register_driver(struct tifm_driver *drv);
 void tifm_unregister_driver(struct tifm_driver *drv);
 void tifm_eject(struct tifm_dev *sock);
@@ -137,11 +144,11 @@ int tifm_map_sg(struct tifm_dev *sock, struct scatterlist *sg, int nents,
                 int direction);
 void tifm_unmap_sg(struct tifm_dev *sock, struct scatterlist *sg, int nents,
                    int direction);
-
+void tifm_queue_work(struct work_struct *work);
 
 static inline void *tifm_get_drvdata(struct tifm_dev *dev)
 {
-        return dev_get_drvdata(&dev->dev);
+        return dev_get_drvdata(&dev->dev);
 }
 
 static inline void tifm_set_drvdata(struct tifm_dev *dev, void *data)
@@ -149,8 +156,4 @@ static inline void tifm_set_drvdata(struct tifm_dev *dev, void *data)
         dev_set_drvdata(&dev->dev, data);
 }
 
-struct tifm_device_id {
-        tifm_media_id media_id;
-};
-
 #endif
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 0c78f7f4a976..daa6c125f66e 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -59,6 +59,8 @@ struct writeback_control {
         unsigned for_reclaim:1;         /* Invoked from the page allocator */
         unsigned for_writepages:1;      /* This is a writepages() call */
         unsigned range_cyclic:1;        /* range_start is cyclic */
+
+        void *fs_private;               /* For use by ->writepages() */
 };
 
 /*
diff --git a/include/linux/xfrm.h b/include/linux/xfrm.h
index a5d53e0fe152..b58adc52448d 100644
--- a/include/linux/xfrm.h
+++ b/include/linux/xfrm.h
@@ -243,17 +243,6 @@ enum xfrm_ae_ftype_t {
 #define XFRM_AE_MAX (__XFRM_AE_MAX - 1)
 };
 
-/* SAD Table filter flags  */
-enum xfrm_sad_ftype_t {
-        XFRM_SAD_UNSPEC,
-        XFRM_SAD_HMASK=1,
-        XFRM_SAD_HMAX=2,
-        XFRM_SAD_CNT=4,
-        __XFRM_SAD_MAX
-
-#define XFRM_SAD_MAX (__XFRM_SAD_MAX - 1)
-};
-
 struct xfrm_userpolicy_type {
         __u8            type;
         __u16           reserved1;
@@ -287,44 +276,41 @@ enum xfrm_attr_type_t {
 
 enum xfrm_sadattr_type_t {
         XFRMA_SAD_UNSPEC,
-        XFRMA_SADHMASK,
-        XFRMA_SADHMAX,
-        XFRMA_SADCNT,
+        XFRMA_SAD_CNT,
+        XFRMA_SAD_HINFO,
         __XFRMA_SAD_MAX
 
 #define XFRMA_SAD_MAX (__XFRMA_SAD_MAX - 1)
 };
 
-/* SPD Table filter flags  */
-enum xfrm_spd_ftype_t {
-        XFRM_SPD_UNSPEC,
-        XFRM_SPD_HMASK=1,
-        XFRM_SPD_HMAX=2,
-        XFRM_SPD_ICNT=4,
-        XFRM_SPD_OCNT=8,
-        XFRM_SPD_FCNT=16,
-        XFRM_SPD_ISCNT=32,
-        XFRM_SPD_OSCNT=64,
-        XFRM_SPD_FSCNT=128,
-        __XFRM_SPD_MAX
-
-#define XFRM_SPD_MAX (__XFRM_SPD_MAX - 1)
+struct xfrmu_sadhinfo {
+        __u32 sadhcnt; /* current hash bkts */
+        __u32 sadhmcnt; /* max allowed hash bkts */
 };
+
 enum xfrm_spdattr_type_t {
         XFRMA_SPD_UNSPEC,
-        XFRMA_SPDHMASK,
-        XFRMA_SPDHMAX,
-        XFRMA_SPDICNT,
-        XFRMA_SPDOCNT,
-        XFRMA_SPDFCNT,
-        XFRMA_SPDISCNT,
-        XFRMA_SPDOSCNT,
-        XFRMA_SPDFSCNT,
+        XFRMA_SPD_INFO,
+        XFRMA_SPD_HINFO,
         __XFRMA_SPD_MAX
 
 #define XFRMA_SPD_MAX (__XFRMA_SPD_MAX - 1)
 };
 
+struct xfrmu_spdinfo {
+        __u32 incnt;
+        __u32 outcnt;
+        __u32 fwdcnt;
+        __u32 inscnt;
+        __u32 outscnt;
+        __u32 fwdscnt;
+};
+
+struct xfrmu_spdhinfo {
+        __u32 spdhcnt;
+        __u32 spdhmcnt;
+};
+
 struct xfrm_usersa_info {
         struct xfrm_selector            sel;
         struct xfrm_id                  id;
diff --git a/include/media/ovcamchip.h b/include/media/ovcamchip.h
index 0f43451f8bb3..05b9569ef1c8 100644
--- a/include/media/ovcamchip.h
+++ b/include/media/ovcamchip.h
@@ -16,7 +16,6 @@
 
 #include <linux/videodev.h>
 #include <media/v4l2-common.h>
-#include <linux/i2c.h>
 
 /* --------------------------------- */
 /*           ENUMERATIONS            */
diff --git a/include/media/tuner.h b/include/media/tuner.h
index a41ac41113ac..6dcf3c45707d 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -23,6 +23,7 @@
 #define _TUNER_H
 
 #include <linux/videodev2.h>
+#include <linux/i2c.h>
 #include <media/tuner-types.h>
 
 extern int tuner_debug;
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index f70afef9c3cc..4fa5dfe886c4 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -204,9 +204,9 @@ struct ip6_flowlabel
 {
         struct ip6_flowlabel    *next;
         __be32                  label;
+        atomic_t                users;
         struct in6_addr         dst;
         struct ipv6_txoptions   *opt;
-        atomic_t                users;
         unsigned long           linger;
         u8                      share;
         u32                     owner;
@@ -291,7 +291,7 @@ static inline int ipv6_addr_src_scope(const struct in6_addr *addr)
 
 static inline int ipv6_addr_cmp(const struct in6_addr *a1, const struct in6_addr *a2)
 {
-        return memcmp((const void *) a1, (const void *) a2, sizeof(struct in6_addr));
+        return memcmp(a1, a2, sizeof(struct in6_addr));
 }
 
 static inline int
@@ -308,7 +308,7 @@ ipv6_masked_addr_cmp(const struct in6_addr *a1, const struct in6_addr *m,
 
 static inline void ipv6_addr_copy(struct in6_addr *a1, const struct in6_addr *a2)
 {
-        memcpy((void *) a1, (const void *) a2, sizeof(struct in6_addr));
+        memcpy(a1, a2, sizeof(struct in6_addr));
 }
 
 static inline void ipv6_addr_prefix(struct in6_addr *pfx, 
@@ -319,16 +319,12 @@ static inline void ipv6_addr_prefix(struct in6_addr *pfx,
         int o = plen >> 3,
             b = plen & 0x7;
 
+        memset(pfx->s6_addr, 0, sizeof(pfx->s6_addr));
         memcpy(pfx->s6_addr, addr, o);
-        if (b != 0) {
+        if (b != 0)
                 pfx->s6_addr[o] = addr->s6_addr[o] & (0xff00 >> b);
-                o++;
-        }
-        if (o < 16)
-                memset(pfx->s6_addr + o, 0, 16 - o);
 }
 
-#ifndef __HAVE_ARCH_ADDR_SET
 static inline void ipv6_addr_set(struct in6_addr *addr, 
                                      __be32 w1, __be32 w2,
                                      __be32 w3, __be32 w4)
@@ -338,7 +334,6 @@ static inline void ipv6_addr_set(struct in6_addr *addr,
         addr->s6_addr32[2] = w3;
         addr->s6_addr32[3] = w4;
 }
-#endif
 
 static inline int ipv6_addr_equal(const struct in6_addr *a1,
                                   const struct in6_addr *a2)
diff --git a/include/net/iucv/af_iucv.h b/include/net/iucv/af_iucv.h
index 04d1abb72d25..f9bd11be1891 100644
--- a/include/net/iucv/af_iucv.h
+++ b/include/net/iucv/af_iucv.h
@@ -28,6 +28,7 @@ enum {
         IUCV_LISTEN,
         IUCV_SEVERED,
         IUCV_DISCONN,
+        IUCV_CLOSING,
         IUCV_CLOSED
 };
 
@@ -62,6 +63,7 @@ struct iucv_sock {
         struct sock             *parent;
         struct iucv_path        *path;
         struct sk_buff_head     send_skb_q;
+        struct sk_buff_head     backlog_skb_q;
         unsigned int            send_tag;
 };
 
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
new file mode 100644
index 000000000000..a7f122b79948
--- /dev/null
+++ b/include/net/mac80211.h
@@ -0,0 +1,1045 @@
+/*
+ * Low-level hardware driver -- IEEE 802.11 driver (80211.o) interface
+ * Copyright 2002-2005, Devicescape Software, Inc.
+ * Copyright 2006-2007  Jiri Benc <jbenc@suse.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef MAC80211_H
+#define MAC80211_H
+
+#include <linux/kernel.h>
+#include <linux/if_ether.h>
+#include <linux/skbuff.h>
+#include <linux/wireless.h>
+#include <linux/device.h>
+#include <linux/ieee80211.h>
+#include <net/wireless.h>
+#include <net/cfg80211.h>
+
+/* Note! Only ieee80211_tx_status_irqsafe() and ieee80211_rx_irqsafe() can be
+ * called in hardware interrupt context. The low-level driver must not call any
+ * other functions in hardware interrupt context. If there is a need for such
+ * call, the low-level driver should first ACK the interrupt and perform the
+ * IEEE 802.11 code call after this, e.g., from a scheduled tasklet (in
+ * software interrupt context).
+ */
+
+/*
+ * Frame format used when passing frame between low-level hardware drivers
+ * and IEEE 802.11 driver the same as used in the wireless media, i.e.,
+ * buffers start with IEEE 802.11 header and include the same octets that
+ * are sent over air.
+ *
+ * If hardware uses IEEE 802.3 headers (and perform 802.3 <-> 802.11
+ * conversion in firmware), upper layer 802.11 code needs to be changed to
+ * support this.
+ *
+ * If the receive frame format is not the same as the real frame sent
+ * on the wireless media (e.g., due to padding etc.), upper layer 802.11 code
+ * could be updated to provide support for such format assuming this would
+ * optimize the performance, e.g., by removing need to re-allocation and
+ * copying of the data.
+ */
+
+#define IEEE80211_CHAN_W_SCAN 0x00000001
+#define IEEE80211_CHAN_W_ACTIVE_SCAN 0x00000002
+#define IEEE80211_CHAN_W_IBSS 0x00000004
+
+/* Channel information structure. Low-level driver is expected to fill in chan,
+ * freq, and val fields. Other fields will be filled in by 80211.o based on
+ * hostapd information and low-level driver does not need to use them. The
+ * limits for each channel will be provided in 'struct ieee80211_conf' when
+ * configuring the low-level driver with hw->config callback. If a device has
+ * a default regulatory domain, IEEE80211_HW_DEFAULT_REG_DOMAIN_CONFIGURED
+ * can be set to let the driver configure all fields */
+struct ieee80211_channel {
+        short chan; /* channel number (IEEE 802.11) */
+        short freq; /* frequency in MHz */
+        int val; /* hw specific value for the channel */
+        int flag; /* flag for hostapd use (IEEE80211_CHAN_*) */
+        unsigned char power_level;
+        unsigned char antenna_max;
+};
+
+#define IEEE80211_RATE_ERP 0x00000001
+#define IEEE80211_RATE_BASIC 0x00000002
+#define IEEE80211_RATE_PREAMBLE2 0x00000004
+#define IEEE80211_RATE_SUPPORTED 0x00000010
+#define IEEE80211_RATE_OFDM 0x00000020
+#define IEEE80211_RATE_CCK 0x00000040
+#define IEEE80211_RATE_TURBO 0x00000080
+#define IEEE80211_RATE_MANDATORY 0x00000100
+
+#define IEEE80211_RATE_CCK_2 (IEEE80211_RATE_CCK | IEEE80211_RATE_PREAMBLE2)
+#define IEEE80211_RATE_MODULATION(f) \
+        (f & (IEEE80211_RATE_CCK | IEEE80211_RATE_OFDM))
+
+/* Low-level driver should set PREAMBLE2, OFDM, CCK, and TURBO flags.
+ * BASIC, SUPPORTED, ERP, and MANDATORY flags are set in 80211.o based on the
+ * configuration. */
+struct ieee80211_rate {
+        int rate; /* rate in 100 kbps */
+        int val; /* hw specific value for the rate */
+        int flags; /* IEEE80211_RATE_ flags */
+        int val2; /* hw specific value for the rate when using short preamble
+                   * (only when IEEE80211_RATE_PREAMBLE2 flag is set, i.e., for
+                   * 2, 5.5, and 11 Mbps) */
+        signed char min_rssi_ack;
+        unsigned char min_rssi_ack_delta;
+
+        /* following fields are set by 80211.o and need not be filled by the
+         * low-level driver */
+        int rate_inv; /* inverse of the rate (LCM(all rates) / rate) for
+                       * optimizing channel utilization estimates */
+};
+
+/* 802.11g is backwards-compatible with 802.11b, so a wlan card can
+ * actually be both in 11b and 11g modes at the same time. */
+enum {
+        MODE_IEEE80211A, /* IEEE 802.11a */
+        MODE_IEEE80211B, /* IEEE 802.11b only */
+        MODE_ATHEROS_TURBO, /* Atheros Turbo mode (2x.11a at 5 GHz) */
+        MODE_IEEE80211G, /* IEEE 802.11g (and 802.11b compatibility) */
+        MODE_ATHEROS_TURBOG, /* Atheros Turbo mode (2x.11g at 2.4 GHz) */
+
+        /* keep last */
+        NUM_IEEE80211_MODES
+};
+
+struct ieee80211_hw_mode {
+        int mode; /* MODE_IEEE80211... */
+        int num_channels; /* Number of channels (below) */
+        struct ieee80211_channel *channels; /* Array of supported channels */
+        int num_rates; /* Number of rates (below) */
+        struct ieee80211_rate *rates; /* Array of supported rates */
+
+        struct list_head list; /* Internal, don't touch */
+};
+
+struct ieee80211_tx_queue_params {
+        int aifs; /* 0 .. 255; -1 = use default */
+        int cw_min; /* 2^n-1: 1, 3, 7, .. , 1023; 0 = use default */
+        int cw_max; /* 2^n-1: 1, 3, 7, .. , 1023; 0 = use default */
+        int burst_time; /* maximum burst time in 0.1 ms (i.e., 10 = 1 ms);
+                         * 0 = disabled */
+};
+
+struct ieee80211_tx_queue_stats_data {
+        unsigned int len; /* num packets in queue */
+        unsigned int limit; /* queue len (soft) limit */
+        unsigned int count; /* total num frames sent */
+};
+
+enum {
+        IEEE80211_TX_QUEUE_DATA0,
+        IEEE80211_TX_QUEUE_DATA1,
+        IEEE80211_TX_QUEUE_DATA2,
+        IEEE80211_TX_QUEUE_DATA3,
+        IEEE80211_TX_QUEUE_DATA4,
+        IEEE80211_TX_QUEUE_SVP,
+
+        NUM_TX_DATA_QUEUES,
+
+/* due to stupidity in the sub-ioctl userspace interface, the items in
+ * this struct need to have fixed values. As soon as it is removed, we can
+ * fix these entries. */
+        IEEE80211_TX_QUEUE_AFTER_BEACON = 6,
+        IEEE80211_TX_QUEUE_BEACON = 7
+};
+
+struct ieee80211_tx_queue_stats {
+        struct ieee80211_tx_queue_stats_data data[NUM_TX_DATA_QUEUES];
+};
+
+struct ieee80211_low_level_stats {
+        unsigned int dot11ACKFailureCount;
+        unsigned int dot11RTSFailureCount;
+        unsigned int dot11FCSErrorCount;
+        unsigned int dot11RTSSuccessCount;
+};
+
+/* Transmit control fields. This data structure is passed to low-level driver
+ * with each TX frame. The low-level driver is responsible for configuring
+ * the hardware to use given values (depending on what is supported). */
+#define HW_KEY_IDX_INVALID -1
+
+struct ieee80211_tx_control {
+        int tx_rate; /* Transmit rate, given as the hw specific value for the
+                      * rate (from struct ieee80211_rate) */
+        int rts_cts_rate; /* Transmit rate for RTS/CTS frame, given as the hw
+                           * specific value for the rate (from
+                           * struct ieee80211_rate) */
+
+#define IEEE80211_TXCTL_REQ_TX_STATUS   (1<<0)/* request TX status callback for
+                                                * this frame */
+#define IEEE80211_TXCTL_DO_NOT_ENCRYPT  (1<<1) /* send this frame without
+                                                * encryption; e.g., for EAPOL
+                                                * frames */
+#define IEEE80211_TXCTL_USE_RTS_CTS     (1<<2) /* use RTS-CTS before sending
+                                                * frame */
+#define IEEE80211_TXCTL_USE_CTS_PROTECT (1<<3) /* use CTS protection for the
+                                                * frame (e.g., for combined
+                                                * 802.11g / 802.11b networks) */
+#define IEEE80211_TXCTL_NO_ACK          (1<<4) /* tell the low level not to
+                                                * wait for an ack */
+#define IEEE80211_TXCTL_RATE_CTRL_PROBE (1<<5)
+#define IEEE80211_TXCTL_CLEAR_DST_MASK  (1<<6)
+#define IEEE80211_TXCTL_REQUEUE         (1<<7)
+#define IEEE80211_TXCTL_FIRST_FRAGMENT  (1<<8) /* this is a first fragment of
+                                                * the frame */
+#define IEEE80211_TXCTL_TKIP_NEW_PHASE1_KEY (1<<9)
+        u32 flags;                             /* tx control flags defined
+                                                * above */
+        u8 retry_limit;         /* 1 = only first attempt, 2 = one retry, .. */
+        u8 power_level;         /* per-packet transmit power level, in dBm */
+        u8 antenna_sel_tx;      /* 0 = default/diversity, 1 = Ant0, 2 = Ant1 */
+        s8 key_idx;             /* -1 = do not encrypt, >= 0 keyidx from
+                                 * hw->set_key() */
+        u8 icv_len;             /* length of the ICV/MIC field in octets */
+        u8 iv_len;              /* length of the IV field in octets */
+        u8 tkip_key[16];        /* generated phase2/phase1 key for hw TKIP */
+        u8 queue;               /* hardware queue to use for this frame;
+                                 * 0 = highest, hw->queues-1 = lowest */
+        u8 sw_retry_attempt;    /* number of times hw has tried to
+                                 * transmit frame (not incl. hw retries) */
+
+        struct ieee80211_rate *rate;            /* internal 80211.o rate */
+        struct ieee80211_rate *rts_rate;        /* internal 80211.o rate
+                                                 * for RTS/CTS */
+        int alt_retry_rate; /* retry rate for the last retries, given as the
+                             * hw specific value for the rate (from
+                             * struct ieee80211_rate). To be used to limit
+                             * packet dropping when probing higher rates, if hw
+                             * supports multiple retry rates. -1 = not used */
+        int type;       /* internal */
+        int ifindex;    /* internal */
+};
+
+/* Receive status. The low-level driver should provide this information
+ * (the subset supported by hardware) to the 802.11 code with each received
+ * frame. */
+struct ieee80211_rx_status {
+        u64 mactime;
+        int freq; /* receive frequency in Mhz */
+        int channel;
+        int phymode;
+        int ssi;
+        int signal; /* used as qual in statistics reporting */
+        int noise;
+        int antenna;
+        int rate;
+#define RX_FLAG_MMIC_ERROR      (1<<0)
+#define RX_FLAG_DECRYPTED       (1<<1)
+#define RX_FLAG_RADIOTAP        (1<<2)
+        int flag;
+};
+
+/* Transmit status. The low-level driver should provide this information
+ * (the subset supported by hardware) to the 802.11 code for each transmit
+ * frame. */
+struct ieee80211_tx_status {
+        /* copied ieee80211_tx_control structure */
+        struct ieee80211_tx_control control;
+
+#define IEEE80211_TX_STATUS_TX_FILTERED (1<<0)
+#define IEEE80211_TX_STATUS_ACK         (1<<1) /* whether the TX frame was ACKed */
+        u32 flags;              /* tx staus flags defined above */
+
+        int ack_signal; /* measured signal strength of the ACK frame */
+        int excessive_retries;
+        int retry_count;
+
+        int queue_length;      /* information about TX queue */
+        int queue_number;
+};
+
+
+/**
+ * struct ieee80211_conf - configuration of the device
+ *
+ * This struct indicates how the driver shall configure the hardware.
+ *
+ * @radio_enabled: when zero, driver is required to switch off the radio.
+ */
+struct ieee80211_conf {
+        int channel;                    /* IEEE 802.11 channel number */
+        int freq;                       /* MHz */
+        int channel_val;                /* hw specific value for the channel */
+
+        int phymode;                    /* MODE_IEEE80211A, .. */
+        struct ieee80211_channel *chan;
+        struct ieee80211_hw_mode *mode;
+        unsigned int regulatory_domain;
+        int radio_enabled;
+
+        int beacon_int;
+
+#define IEEE80211_CONF_SHORT_SLOT_TIME  (1<<0) /* use IEEE 802.11g Short Slot
+                                                * Time */
+#define IEEE80211_CONF_SSID_HIDDEN      (1<<1) /* do not broadcast the ssid */
+#define IEEE80211_CONF_RADIOTAP         (1<<2) /* use radiotap if supported
+                                                  check this bit at RX time */
+        u32 flags;                      /* configuration flags defined above */
+
+        u8 power_level;                 /* transmit power limit for current
+                                         * regulatory domain; in dBm */
+        u8 antenna_max;                 /* maximum antenna gain */
+        short tx_power_reduction; /* in 0.1 dBm */
+
+        /* 0 = default/diversity, 1 = Ant0, 2 = Ant1 */
+        u8 antenna_sel_tx;
+        u8 antenna_sel_rx;
+
+        int antenna_def;
+        int antenna_mode;
+
+        /* Following five fields are used for IEEE 802.11H */
+        unsigned int radar_detect;
+        unsigned int spect_mgmt;
+        /* All following fields are currently unused. */
+        unsigned int quiet_duration; /* duration of quiet period */
+        unsigned int quiet_offset; /* how far into the beacon is the quiet
+                                    * period */
+        unsigned int quiet_period;
+        u8 radar_firpwr_threshold;
+        u8 radar_rssi_threshold;
+        u8 pulse_height_threshold;
+        u8 pulse_rssi_threshold;
+        u8 pulse_inband_threshold;
+};
+
+/**
+ * enum ieee80211_if_types - types of 802.11 network interfaces
+ *
+ * @IEEE80211_IF_TYPE_AP: interface in AP mode.
+ * @IEEE80211_IF_TYPE_MGMT: special interface for communication with hostap
+ *      daemon. Drivers should never see this type.
+ * @IEEE80211_IF_TYPE_STA: interface in STA (client) mode.
+ * @IEEE80211_IF_TYPE_IBSS: interface in IBSS (ad-hoc) mode.
+ * @IEEE80211_IF_TYPE_MNTR: interface in monitor (rfmon) mode.
+ * @IEEE80211_IF_TYPE_WDS: interface in WDS mode.
+ * @IEEE80211_IF_TYPE_VLAN: not used.
+ */
+enum ieee80211_if_types {
+        IEEE80211_IF_TYPE_AP = 0x00000000,
+        IEEE80211_IF_TYPE_MGMT = 0x00000001,
+        IEEE80211_IF_TYPE_STA = 0x00000002,
+        IEEE80211_IF_TYPE_IBSS = 0x00000003,
+        IEEE80211_IF_TYPE_MNTR = 0x00000004,
+        IEEE80211_IF_TYPE_WDS = 0x5A580211,
+        IEEE80211_IF_TYPE_VLAN = 0x00080211,
+};
+
+/**
+ * struct ieee80211_if_init_conf - initial configuration of an interface
+ *
+ * @if_id: internal interface ID. This number has no particular meaning to
+ *      drivers and the only allowed usage is to pass it to
+ *      ieee80211_beacon_get() and ieee80211_get_buffered_bc() functions.
+ *      This field is not valid for monitor interfaces
+ *      (interfaces of %IEEE80211_IF_TYPE_MNTR type).
+ * @type: one of &enum ieee80211_if_types constants. Determines the type of
+ *      added/removed interface.
+ * @mac_addr: pointer to MAC address of the interface. This pointer is valid
+ *      until the interface is removed (i.e. it cannot be used after
+ *      remove_interface() callback was called for this interface).
+ *
+ * This structure is used in add_interface() and remove_interface()
+ * callbacks of &struct ieee80211_hw.
+ */
+struct ieee80211_if_init_conf {
+        int if_id;
+        int type;
+        void *mac_addr;
+};
+
+/**
+ * struct ieee80211_if_conf - configuration of an interface
+ *
+ * @type: type of the interface. This is always the same as was specified in
+ *      &struct ieee80211_if_init_conf. The type of an interface never changes
+ *      during the life of the interface; this field is present only for
+ *      convenience.
+ * @bssid: BSSID of the network we are associated to/creating.
+ * @ssid: used (together with @ssid_len) by drivers for hardware that
+ *      generate beacons independently. The pointer is valid only during the
+ *      config_interface() call, so copy the value somewhere if you need
+ *      it.
+ * @ssid_len: length of the @ssid field.
+ * @generic_elem: used (together with @generic_elem_len) by drivers for
+ *      hardware that generate beacons independently. The pointer is valid
+ *      only during the config_interface() call, so copy the value somewhere
+ *      if you need it.
+ * @generic_elem_len: length of the generic element.
+ * @beacon: beacon template. Valid only if @host_gen_beacon_template in
+ *      &struct ieee80211_hw is set. The driver is responsible of freeing
+ *      the sk_buff.
+ * @beacon_control: tx_control for the beacon template, this field is only
+ *      valid when the @beacon field was set.
+ *
+ * This structure is passed to the config_interface() callback of
+ * &struct ieee80211_hw.
+ */
+struct ieee80211_if_conf {
+        int type;
+        u8 *bssid;
+        u8 *ssid;
+        size_t ssid_len;
+        u8 *generic_elem;
+        size_t generic_elem_len;
+        struct sk_buff *beacon;
+        struct ieee80211_tx_control *beacon_control;
+};
+
+typedef enum { ALG_NONE, ALG_WEP, ALG_TKIP, ALG_CCMP, ALG_NULL }
+ieee80211_key_alg;
+
+
+struct ieee80211_key_conf {
+
+        int hw_key_idx;                 /* filled + used by low-level driver */
+        ieee80211_key_alg alg;
+        int keylen;
+
+#define IEEE80211_KEY_FORCE_SW_ENCRYPT (1<<0) /* to be cleared by low-level
+                                                 driver */
+#define IEEE80211_KEY_DEFAULT_TX_KEY   (1<<1) /* This key is the new default TX
+                                                 key (used only for broadcast
+                                                 keys). */
+#define IEEE80211_KEY_DEFAULT_WEP_ONLY (1<<2) /* static WEP is the only
+                                                 configured security policy;
+                                                 this allows some low-level
+                                                 drivers to determine when
+                                                 hwaccel can be used */
+        u32 flags; /* key configuration flags defined above */
+
+        s8 keyidx;                      /* WEP key index */
+        u8 key[0];
+};
+
+#define IEEE80211_SEQ_COUNTER_RX        0
+#define IEEE80211_SEQ_COUNTER_TX        1
+
+typedef enum {
+        SET_KEY, DISABLE_KEY, REMOVE_ALL_KEYS,
+} set_key_cmd;
+
+/* This is driver-visible part of the per-hw state the stack keeps. */
+struct ieee80211_hw {
+        /* points to the cfg80211 wiphy for this piece. Note
+         * that you must fill in the perm_addr and dev fields
+         * of this structure, use the macros provided below. */
+        struct wiphy *wiphy;
+
+        /* assigned by mac80211, don't write */
+        struct ieee80211_conf conf;
+
+        /* Single thread workqueue available for driver use
+         * Allocated by mac80211 on registration */
+        struct workqueue_struct *workqueue;
+
+        /* Pointer to the private area that was
+         * allocated with this struct for you. */
+        void *priv;
+
+        /* The rest is information about your hardware */
+
+        /* TODO: frame_type 802.11/802.3, sw_encryption requirements */
+
+        /* Some wireless LAN chipsets generate beacons in the hardware/firmware
+         * and others rely on host generated beacons. This option is used to
+         * configure the upper layer IEEE 802.11 module to generate beacons.
+         * The low-level driver can use ieee80211_beacon_get() to fetch the
+         * next beacon frame. */
+#define IEEE80211_HW_HOST_GEN_BEACON (1<<0)
+
+        /* The device needs to be supplied with a beacon template only. */
+#define IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE (1<<1)
+
+        /* Some devices handle decryption internally and do not
+         * indicate whether the frame was encrypted (unencrypted frames
+         * will be dropped by the hardware, unless specifically allowed
+         * through) */
+#define IEEE80211_HW_DEVICE_HIDES_WEP (1<<2)
+
+        /* Whether RX frames passed to ieee80211_rx() include FCS in the end */
+#define IEEE80211_HW_RX_INCLUDES_FCS (1<<3)
+
+        /* Some wireless LAN chipsets buffer broadcast/multicast frames for
+         * power saving stations in the hardware/firmware and others rely on
+         * the host system for such buffering. This option is used to
+         * configure the IEEE 802.11 upper layer to buffer broadcast/multicast
+         * frames when there are power saving stations so that low-level driver
+         * can fetch them with ieee80211_get_buffered_bc(). */
+#define IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING (1<<4)
+
+#define IEEE80211_HW_WEP_INCLUDE_IV (1<<5)
+
+        /* will data nullfunc frames get proper TX status callback */
+#define IEEE80211_HW_DATA_NULLFUNC_ACK (1<<6)
+
+        /* Force software encryption for TKIP packets if WMM is enabled. */
+#define IEEE80211_HW_NO_TKIP_WMM_HWACCEL (1<<7)
+
+        /* Some devices handle Michael MIC internally and do not include MIC in
+         * the received packets passed up. device_strips_mic must be set
+         * for such devices. The 'encryption' frame control bit is expected to
+         * be still set in the IEEE 802.11 header with this option unlike with
+         * the device_hides_wep configuration option.
+         */
+#define IEEE80211_HW_DEVICE_STRIPS_MIC (1<<8)
+
+        /* Device is capable of performing full monitor mode even during
+         * normal operation. */
+#define IEEE80211_HW_MONITOR_DURING_OPER (1<<9)
+
+        /* Device does not need BSSID filter set to broadcast in order to
+         * receive all probe responses while scanning */
+#define IEEE80211_HW_NO_PROBE_FILTERING (1<<10)
+
+        /* Channels are already configured to the default regulatory domain
+         * specified in the device's EEPROM */
+#define IEEE80211_HW_DEFAULT_REG_DOMAIN_CONFIGURED (1<<11)
+
+        /* calculate Michael MIC for an MSDU when doing hwcrypto */
+#define IEEE80211_HW_TKIP_INCLUDE_MMIC (1<<12)
+        /* Do TKIP phase1 key mixing in stack to support cards only do
+         * phase2 key mixing when doing hwcrypto */
+#define IEEE80211_HW_TKIP_REQ_PHASE1_KEY (1<<13)
+        /* Do TKIP phase1 and phase2 key mixing in stack and send the generated
+         * per-packet RC4 key with each TX frame when doing hwcrypto */
+#define IEEE80211_HW_TKIP_REQ_PHASE2_KEY (1<<14)
+
+        u32 flags;                      /* hardware flags defined above */
+
+        /* Set to the size of a needed device specific skb headroom for TX skbs. */
+        unsigned int extra_tx_headroom;
+
+        /* This is the time in us to change channels
+         */
+        int channel_change_time;
+        /* Maximum values for various statistics.
+         * Leave at 0 to indicate no support. Use negative numbers for dBm. */
+        s8 max_rssi;
+        s8 max_signal;
+        s8 max_noise;
+
+        /* Number of available hardware TX queues for data packets.
+         * WMM requires at least four queues. */
+        int queues;
+};
+
+static inline void SET_IEEE80211_DEV(struct ieee80211_hw *hw, struct device *dev)
+{
+        set_wiphy_dev(hw->wiphy, dev);
+}
+
+static inline void SET_IEEE80211_PERM_ADDR(struct ieee80211_hw *hw, u8 *addr)
+{
+        memcpy(hw->wiphy->perm_addr, addr, ETH_ALEN);
+}
+
+/* Configuration block used by the low-level driver to tell the 802.11 code
+ * about supported hardware features and to pass function pointers to callback
+ * functions. */
+struct ieee80211_ops {
+        /* Handler that 802.11 module calls for each transmitted frame.
+         * skb contains the buffer starting from the IEEE 802.11 header.
+         * The low-level driver should send the frame out based on
+         * configuration in the TX control data.
+         * Must be atomic. */
+        int (*tx)(struct ieee80211_hw *hw, struct sk_buff *skb,
+                  struct ieee80211_tx_control *control);
+
+        /* Handler for performing hardware reset. */
+        int (*reset)(struct ieee80211_hw *hw);
+
+        /* Handler that is called when any netdevice attached to the hardware
+         * device is set UP for the first time. This can be used, e.g., to
+         * enable interrupts and beacon sending. */
+        int (*open)(struct ieee80211_hw *hw);
+
+        /* Handler that is called when the last netdevice attached to the
+         * hardware device is set DOWN. This can be used, e.g., to disable
+         * interrupts and beacon sending. */
+        int (*stop)(struct ieee80211_hw *hw);
+
+        /* Handler for asking a driver if a new interface can be added (or,
+         * more exactly, set UP). If the handler returns zero, the interface
+         * is added. Driver should perform any initialization it needs prior
+         * to returning zero. By returning non-zero addition of the interface
+         * is inhibited. Unless monitor_during_oper is set, it is guaranteed
+         * that monitor interfaces and normal interfaces are mutually
+         * exclusive. The open() handler is called after add_interface()
+         * if this is the first device added. At least one of the open()
+         * open() and add_interface() callbacks has to be assigned. If
+         * add_interface() is NULL, one STA interface is permitted only. */
+        int (*add_interface)(struct ieee80211_hw *hw,
+                             struct ieee80211_if_init_conf *conf);
+
+        /* Notify a driver that an interface is going down. The stop() handler
+         * is called prior to this if this is a last interface. */
+        void (*remove_interface)(struct ieee80211_hw *hw,
+                                 struct ieee80211_if_init_conf *conf);
+
+        /* Handler for configuration requests. IEEE 802.11 code calls this
+         * function to change hardware configuration, e.g., channel. */
+        int (*config)(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
+
+        /* Handler for configuration requests related to interfaces (e.g.
+         * BSSID). */
+        int (*config_interface)(struct ieee80211_hw *hw,
+                                int if_id, struct ieee80211_if_conf *conf);
+
+        /* ieee80211 drivers do not have access to the &struct net_device
+         * that is (are) connected with their device. Hence (and because
+         * we need to combine the multicast lists and flags for multiple
+         * virtual interfaces), they cannot assign set_multicast_list.
+         * The parameters here replace dev->flags and dev->mc_count,
+         * dev->mc_list is replaced by calling ieee80211_get_mc_list_item.
+         * Must be atomic. */
+        void (*set_multicast_list)(struct ieee80211_hw *hw,
+                                   unsigned short flags, int mc_count);
+
+        /* Set TIM bit handler. If the hardware/firmware takes care of beacon
+         * generation, IEEE 802.11 code uses this function to tell the
+         * low-level to set (or clear if set==0) TIM bit for the given aid. If
+         * host system is used to generate beacons, this handler is not used
+         * and low-level driver should set it to NULL.
+         * Must be atomic. */
+        int (*set_tim)(struct ieee80211_hw *hw, int aid, int set);
+
+        /* Set encryption key. IEEE 802.11 module calls this function to set
+         * encryption keys. addr is ff:ff:ff:ff:ff:ff for default keys and
+         * station hwaddr for individual keys. aid of the station is given
+         * to help low-level driver in selecting which key->hw_key_idx to use
+         * for this key. TX control data will use the hw_key_idx selected by
+         * the low-level driver.
+         * Must be atomic. */
+        int (*set_key)(struct ieee80211_hw *hw, set_key_cmd cmd,
+                       u8 *addr, struct ieee80211_key_conf *key, int aid);
+
+        /* Set TX key index for default/broadcast keys. This is needed in cases
+         * where wlan card is doing full WEP/TKIP encapsulation (wep_include_iv
+         * is not set), in other cases, this function pointer can be set to
+         * NULL since the IEEE 802. 11 module takes care of selecting the key
+         * index for each TX frame. */
+        int (*set_key_idx)(struct ieee80211_hw *hw, int idx);
+
+        /* Enable/disable IEEE 802.1X. This item requests wlan card to pass
+         * unencrypted EAPOL-Key frames even when encryption is configured.
+         * If the wlan card does not require such a configuration, this
+         * function pointer can be set to NULL. */
+        int (*set_ieee8021x)(struct ieee80211_hw *hw, int use_ieee8021x);
+
+        /* Set port authorization state (IEEE 802.1X PAE) to be authorized
+         * (authorized=1) or unauthorized (authorized=0). This function can be
+         * used if the wlan hardware or low-level driver implements PAE.
+         * 80211.o module will anyway filter frames based on authorization
+         * state, so this function pointer can be NULL if low-level driver does
+         * not require event notification about port state changes.
+         * Currently unused. */
+        int (*set_port_auth)(struct ieee80211_hw *hw, u8 *addr,
+                             int authorized);
+
+        /* Ask the hardware to service the scan request, no need to start
+         * the scan state machine in stack. */
+        int (*hw_scan)(struct ieee80211_hw *hw, u8 *ssid, size_t len);
+
+        /* return low-level statistics */
+        int (*get_stats)(struct ieee80211_hw *hw,
+                         struct ieee80211_low_level_stats *stats);
+
+        /* For devices that generate their own beacons and probe response
+         * or association responses this updates the state of privacy_invoked
+         * returns 0 for success or an error number */
+        int (*set_privacy_invoked)(struct ieee80211_hw *hw,
+                                   int privacy_invoked);
+
+        /* For devices that have internal sequence counters, allow 802.11
+         * code to access the current value of a counter */
+        int (*get_sequence_counter)(struct ieee80211_hw *hw,
+                                    u8* addr, u8 keyidx, u8 txrx,
+                                    u32* iv32, u16* iv16);
+
+        /* Configuration of RTS threshold (if device needs it) */
+        int (*set_rts_threshold)(struct ieee80211_hw *hw, u32 value);
+
+        /* Configuration of fragmentation threshold.
+         * Assign this if the device does fragmentation by itself,
+         * if this method is assigned then the stack will not do
+         * fragmentation. */
+        int (*set_frag_threshold)(struct ieee80211_hw *hw, u32 value);
+
+        /* Configuration of retry limits (if device needs it) */
+        int (*set_retry_limit)(struct ieee80211_hw *hw,
+                               u32 short_retry, u32 long_retr);
+
+        /* Number of STAs in STA table notification (NULL = disabled).
+         * Must be atomic. */
+        void (*sta_table_notification)(struct ieee80211_hw *hw,
+                                       int num_sta);
+
+        /* Configure TX queue parameters (EDCF (aifs, cw_min, cw_max),
+         * bursting) for a hardware TX queue.
+         * queue = IEEE80211_TX_QUEUE_*.
+         * Must be atomic. */
+        int (*conf_tx)(struct ieee80211_hw *hw, int queue,
+                       const struct ieee80211_tx_queue_params *params);
+
+        /* Get statistics of the current TX queue status. This is used to get
+         * number of currently queued packets (queue length), maximum queue
+         * size (limit), and total number of packets sent using each TX queue
+         * (count).
+         * Currently unused. */
+        int (*get_tx_stats)(struct ieee80211_hw *hw,
+                            struct ieee80211_tx_queue_stats *stats);
+
+        /* Get the current TSF timer value from firmware/hardware. Currently,
+         * this is only used for IBSS mode debugging and, as such, is not a
+         * required function.
+         * Must be atomic. */
+        u64 (*get_tsf)(struct ieee80211_hw *hw);
+
+        /* Reset the TSF timer and allow firmware/hardware to synchronize with
+         * other STAs in the IBSS. This is only used in IBSS mode. This
+         * function is optional if the firmware/hardware takes full care of
+         * TSF synchronization. */
+        void (*reset_tsf)(struct ieee80211_hw *hw);
+
+        /* Setup beacon data for IBSS beacons. Unlike access point (Master),
+         * IBSS uses a fixed beacon frame which is configured using this
+         * function. This handler is required only for IBSS mode. */
+        int (*beacon_update)(struct ieee80211_hw *hw,
+                             struct sk_buff *skb,
+                             struct ieee80211_tx_control *control);
+
+        /* Determine whether the last IBSS beacon was sent by us. This is
+         * needed only for IBSS mode and the result of this function is used to
+         * determine whether to reply to Probe Requests. */
+        int (*tx_last_beacon)(struct ieee80211_hw *hw);
+};
+
+/* Allocate a new hardware device. This must be called once for each
+ * hardware device. The returned pointer must be used to refer to this
+ * device when calling other functions. 802.11 code allocates a private data
+ * area for the low-level driver. The size of this area is given as
+ * priv_data_len.
+ */
+struct ieee80211_hw *ieee80211_alloc_hw(size_t priv_data_len,
+                                        const struct ieee80211_ops *ops);
+
+/* Register hardware device to the IEEE 802.11 code and kernel. Low-level
+ * drivers must call this function before using any other IEEE 802.11
+ * function except ieee80211_register_hwmode. */
+int ieee80211_register_hw(struct ieee80211_hw *hw);
+
+/* driver can use this and ieee80211_get_rx_led_name to get the
+ * name of the registered LEDs after ieee80211_register_hw
+ * was called.
+ * This is useful to set the default trigger on the LED class
+ * device that your driver should export for each LED the device
+ * has, that way the default behaviour will be as expected but
+ * the user can still change it/turn off the LED etc.
+ */
+#ifdef CONFIG_MAC80211_LEDS
+extern char *__ieee80211_get_tx_led_name(struct ieee80211_hw *hw);
+extern char *__ieee80211_get_rx_led_name(struct ieee80211_hw *hw);
+#endif
+static inline char *ieee80211_get_tx_led_name(struct ieee80211_hw *hw)
+{
+#ifdef CONFIG_MAC80211_LEDS
+        return __ieee80211_get_tx_led_name(hw);
+#else
+        return NULL;
+#endif
+}
+
+static inline char *ieee80211_get_rx_led_name(struct ieee80211_hw *hw)
+{
+#ifdef CONFIG_MAC80211_LEDS
+        return __ieee80211_get_rx_led_name(hw);
+#else
+        return NULL;
+#endif
+}
+
+/* Register a new hardware PHYMODE capability to the stack. */
+int ieee80211_register_hwmode(struct ieee80211_hw *hw,
+                              struct ieee80211_hw_mode *mode);
+
+/* Unregister a hardware device. This function instructs 802.11 code to free
+ * allocated resources and unregister netdevices from the kernel. */
+void ieee80211_unregister_hw(struct ieee80211_hw *hw);
+
+/* Free everything that was allocated including private data of a driver. */
+void ieee80211_free_hw(struct ieee80211_hw *hw);
+
+/* Receive frame callback function. The low-level driver uses this function to
+ * send received frames to the IEEE 802.11 code. Receive buffer (skb) must
+ * start with IEEE 802.11 header. */
+void __ieee80211_rx(struct ieee80211_hw *hw, struct sk_buff *skb,
+                    struct ieee80211_rx_status *status);
+void ieee80211_rx_irqsafe(struct ieee80211_hw *hw,
+                          struct sk_buff *skb,
+                          struct ieee80211_rx_status *status);
+
+/* Transmit status callback function. The low-level driver must call this
+ * function to report transmit status for all the TX frames that had
+ * req_tx_status set in the transmit control fields. In addition, this should
+ * be called at least for all unicast frames to provide information for TX rate
+ * control algorithm. In order to maintain all statistics, this function is
+ * recommended to be called after each frame, including multicast/broadcast, is
+ * sent. */
+void ieee80211_tx_status(struct ieee80211_hw *hw,
+                         struct sk_buff *skb,
+                         struct ieee80211_tx_status *status);
+void ieee80211_tx_status_irqsafe(struct ieee80211_hw *hw,
+                                 struct sk_buff *skb,
+                                 struct ieee80211_tx_status *status);
+
+/**
+ * ieee80211_beacon_get - beacon generation function
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @if_id: interface ID from &struct ieee80211_if_init_conf.
+ * @control: will be filled with information needed to send this beacon.
+ *
+ * If the beacon frames are generated by the host system (i.e., not in
+ * hardware/firmware), the low-level driver uses this function to receive
+ * the next beacon frame from the 802.11 code. The low-level is responsible
+ * for calling this function before beacon data is needed (e.g., based on
+ * hardware interrupt). Returned skb is used only once and low-level driver
+ * is responsible of freeing it.
+ */
+struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
+                                     int if_id,
+                                     struct ieee80211_tx_control *control);
+
+/**
+ * ieee80211_rts_get - RTS frame generation function
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @frame: pointer to the frame that is going to be protected by the RTS.
+ * @frame_len: the frame length (in octets).
+ * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @rts: The buffer where to store the RTS frame.
+ *
+ * If the RTS frames are generated by the host system (i.e., not in
+ * hardware/firmware), the low-level driver uses this function to receive
+ * the next RTS frame from the 802.11 code. The low-level is responsible
+ * for calling this function before and RTS frame is needed.
+ */
+void ieee80211_rts_get(struct ieee80211_hw *hw,
+                       const void *frame, size_t frame_len,
+                       const struct ieee80211_tx_control *frame_txctl,
+                       struct ieee80211_rts *rts);
+
+/**
+ * ieee80211_rts_duration - Get the duration field for an RTS frame
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @frame_len: the length of the frame that is going to be protected by the RTS.
+ * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ *
+ * If the RTS is generated in firmware, but the host system must provide
+ * the duration field, the low-level driver uses this function to receive
+ * the duration field value in little-endian byteorder.
+ */
+__le16 ieee80211_rts_duration(struct ieee80211_hw *hw,
+                              size_t frame_len,
+                              const struct ieee80211_tx_control *frame_txctl);
+
+/**
+ * ieee80211_ctstoself_get - CTS-to-self frame generation function
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @frame: pointer to the frame that is going to be protected by the CTS-to-self.
+ * @frame_len: the frame length (in octets).
+ * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ * @cts: The buffer where to store the CTS-to-self frame.
+ *
+ * If the CTS-to-self frames are generated by the host system (i.e., not in
+ * hardware/firmware), the low-level driver uses this function to receive
+ * the next CTS-to-self frame from the 802.11 code. The low-level is responsible
+ * for calling this function before and CTS-to-self frame is needed.
+ */
+void ieee80211_ctstoself_get(struct ieee80211_hw *hw,
+                             const void *frame, size_t frame_len,
+                             const struct ieee80211_tx_control *frame_txctl,
+                             struct ieee80211_cts *cts);
+
+/**
+ * ieee80211_ctstoself_duration - Get the duration field for a CTS-to-self frame
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @frame_len: the length of the frame that is going to be protected by the CTS-to-self.
+ * @frame_txctl: &struct ieee80211_tx_control of the frame.
+ *
+ * If the CTS-to-self is generated in firmware, but the host system must provide
+ * the duration field, the low-level driver uses this function to receive
+ * the duration field value in little-endian byteorder.
+ */
+__le16 ieee80211_ctstoself_duration(struct ieee80211_hw *hw,
+                                    size_t frame_len,
+                                    const struct ieee80211_tx_control *frame_txctl);
+
+/**
+ * ieee80211_generic_frame_duration - Calculate the duration field for a frame
+ * @hw: pointer obtained from ieee80211_alloc_hw().
+ * @frame_len: the length of the frame.
+ * @rate: the rate (in 100kbps) at which the frame is going to be transmitted.
+ *
+ * Calculate the duration field of some generic frame, given its
+ * length and transmission rate (in 100kbps).
+ */
+__le16 ieee80211_generic_frame_duration(struct ieee80211_hw *hw,
+                                        size_t frame_len,
+                                        int rate);
+
+/**
+ * ieee80211_get_buffered_bc - accessing buffered broadcast and multicast frames
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ * @if_id: interface ID from &struct ieee80211_if_init_conf.
+ * @control: will be filled with information needed to send returned frame.
+ *
+ * Function for accessing buffered broadcast and multicast frames. If
+ * hardware/firmware does not implement buffering of broadcast/multicast
+ * frames when power saving is used, 802.11 code buffers them in the host
+ * memory. The low-level driver uses this function to fetch next buffered
+ * frame. In most cases, this is used when generating beacon frame. This
+ * function returns a pointer to the next buffered skb or NULL if no more
+ * buffered frames are available.
+ *
+ * Note: buffered frames are returned only after DTIM beacon frame was
+ * generated with ieee80211_beacon_get() and the low-level driver must thus
+ * call ieee80211_beacon_get() first. ieee80211_get_buffered_bc() returns
+ * NULL if the previous generated beacon was not DTIM, so the low-level driver
+ * does not need to check for DTIM beacons separately and should be able to
+ * use common code for all beacons.
+ */
+struct sk_buff *
+ieee80211_get_buffered_bc(struct ieee80211_hw *hw, int if_id,
+                          struct ieee80211_tx_control *control);
+
+/* Low level drivers that have their own MLME and MAC indicate
+ * the aid for an associating station with this call */
+int ieee80211_set_aid_for_sta(struct ieee80211_hw *hw,
+                              u8 *peer_address, u16 aid);
+
+
+/* Given an sk_buff with a raw 802.11 header at the data pointer this function
+ * returns the 802.11 header length in bytes (not including encryption
+ * headers). If the data in the sk_buff is too short to contain a valid 802.11
+ * header the function returns 0.
+ */
+int ieee80211_get_hdrlen_from_skb(const struct sk_buff *skb);
+
+/* Like ieee80211_get_hdrlen_from_skb() but takes a FC in CPU order. */
+int ieee80211_get_hdrlen(u16 fc);
+
+/**
+ * ieee80211_wake_queue - wake specific queue
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ * @queue: queue number (counted from zero).
+ *
+ * Drivers should use this function instead of netif_wake_queue.
+ */
+void ieee80211_wake_queue(struct ieee80211_hw *hw, int queue);
+
+/**
+ * ieee80211_stop_queue - stop specific queue
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ * @queue: queue number (counted from zero).
+ *
+ * Drivers should use this function instead of netif_stop_queue.
+ */
+void ieee80211_stop_queue(struct ieee80211_hw *hw, int queue);
+
+/**
+ * ieee80211_start_queues - start all queues
+ * @hw: pointer to as obtained from ieee80211_alloc_hw().
+ *
+ * Drivers should use this function instead of netif_start_queue.
+ */
+void ieee80211_start_queues(struct ieee80211_hw *hw);
+
+/**
+ * ieee80211_stop_queues - stop all queues
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ *
+ * Drivers should use this function instead of netif_stop_queue.
+ */
+void ieee80211_stop_queues(struct ieee80211_hw *hw);
+
+/**
+ * ieee80211_wake_queues - wake all queues
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ *
+ * Drivers should use this function instead of netif_wake_queue.
+ */
+void ieee80211_wake_queues(struct ieee80211_hw *hw);
+
+/**
+ * ieee80211_get_mc_list_item - iteration over items in multicast list
+ * @hw: pointer as obtained from ieee80211_alloc_hw().
+ * @prev: value returned by previous call to ieee80211_get_mc_list_item() or
+ *      NULL to start a new iteration.
+ * @ptr: pointer to buffer of void * type for internal usage of
+ *      ieee80211_get_mc_list_item().
+ *
+ * Iterates over items in multicast list of given device. To get the first
+ * item, pass NULL in @prev and in *@ptr. In subsequent calls, pass the
+ * value returned by previous call in @prev. Don't alter *@ptr during
+ * iteration. When there are no more items, NULL is returned.
+ */
+struct dev_mc_list *
+ieee80211_get_mc_list_item(struct ieee80211_hw *hw,
+                           struct dev_mc_list *prev,
+                           void **ptr);
+
+/* called by driver to notify scan status completed */
+void ieee80211_scan_completed(struct ieee80211_hw *hw);
+
+/* Function to indicate Radar Detection. The low level driver must call this
+ * function to indicate the presence of radar in the current channel.
+ * Additionally the radar type also could be sent */
+int  ieee80211_radar_status(struct ieee80211_hw *hw, int channel,
+                            int radar, int radar_type);
+
+/* return a pointer to the source address (SA) */
+static inline u8 *ieee80211_get_SA(struct ieee80211_hdr *hdr)
+{
+        u8 *raw = (u8 *) hdr;
+        u8 tofrom = (*(raw+1)) & 3; /* get the TODS and FROMDS bits */
+
+        switch (tofrom) {
+                case 2:
+                        return hdr->addr3;
+                case 3:
+                        return hdr->addr4;
+        }
+        return hdr->addr2;
+}
+
+/* return a pointer to the destination address (DA) */
+static inline u8 *ieee80211_get_DA(struct ieee80211_hdr *hdr)
+{
+        u8 *raw = (u8 *) hdr;
+        u8 to_ds = (*(raw+1)) & 1; /* get the TODS bit */
+
+        if (to_ds)
+                return hdr->addr3;
+        return hdr->addr1;
+}
+
+static inline int ieee80211_get_morefrag(struct ieee80211_hdr *hdr)
+{
+        return (le16_to_cpu(hdr->frame_control) &
+                IEEE80211_FCTL_MOREFRAGS) != 0;
+}
+
+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_ARG(x) ((u8*)(x))[0], ((u8*)(x))[1], ((u8*)(x))[2], \
+                   ((u8*)(x))[3], ((u8*)(x))[4], ((u8*)(x))[5]
+
+#endif /* MAC80211_H */
diff --git a/include/net/sctp/command.h b/include/net/sctp/command.h
index 6114c4f54b0a..f56c8d695a82 100644
--- a/include/net/sctp/command.h
+++ b/include/net/sctp/command.h
@@ -100,6 +100,8 @@ typedef enum {
         SCTP_CMD_T3_RTX_TIMERS_STOP, /* Stops T3-rtx pending timers */
         SCTP_CMD_FORCE_PRIM_RETRAN,  /* Forces retrans. over primary path. */
         SCTP_CMD_SET_SK_ERR,     /* Set sk_err */
+        SCTP_CMD_ASSOC_CHANGE,   /* generate and send assoc_change event */
+        SCTP_CMD_ADAPTATION_IND, /* generate and send adaptation event */
         SCTP_CMD_LAST
 } sctp_verb_t;
 
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index 28af68059521..dda72bf5b9b4 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -378,11 +378,15 @@ static inline int sctp_sysctl_jiffies_ms(ctl_table *table, int __user *name, int
 
 int sctp_v6_init(void);
 void sctp_v6_exit(void);
+int sctp_v6_add_protocol(void);
+void sctp_v6_del_protocol(void);
 
 #else /* #ifdef defined(CONFIG_IPV6) */
 
 static inline int sctp_v6_init(void) { return 0; }
 static inline void sctp_v6_exit(void) { return; }
+static inline int sctp_v6_add_protocol(void) { return 0; }
+static inline void sctp_v6_del_protocol(void) { return; }
 
 #endif /* #if defined(CONFIG_IPV6) */
 
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 7b4fff93ba7f..5e81984b8478 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -1857,6 +1857,7 @@ int sctp_assoc_set_bind_addr_from_ep(struct sctp_association *,
 int sctp_assoc_set_bind_addr_from_cookie(struct sctp_association *,
                                          struct sctp_cookie*,
                                          gfp_t gfp);
+int sctp_assoc_set_id(struct sctp_association *, gfp_t);
 
 int sctp_cmp_addr_exact(const union sctp_addr *ss1,
                         const union sctp_addr *ss2);
diff --git a/include/net/tcp.h b/include/net/tcp.h
index ef8f9d4dae85..e22b4f0305a3 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -736,7 +736,8 @@ static inline __u32 tcp_current_ssthresh(const struct sock *sk)
 
 static inline void tcp_sync_left_out(struct tcp_sock *tp)
 {
-        BUG_ON(tp->sacked_out + tp->lost_out > tp->packets_out);
+        BUG_ON(tp->rx_opt.sack_ok &&
+               (tp->sacked_out + tp->lost_out > tp->packets_out));
         tp->left_out = tp->sacked_out + tp->lost_out;
 }
 
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index 66c2d3eec03c..39ef925d39dd 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -416,25 +416,6 @@ struct xfrm_audit
         u32     secid;
 };
 
-/* SAD metadata, add more later */
-struct xfrm_sadinfo
-{
-        u32 sadhcnt; /* current hash bkts */
-        u32 sadhmcnt; /* max allowed hash bkts */
-        u32 sadcnt; /* current running count */
-};
-
-struct xfrm_spdinfo
-{
-        u32 incnt;
-        u32 outcnt;
-        u32 fwdcnt;
-        u32 inscnt;
-        u32 outscnt;
-        u32 fwdscnt;
-        u32 spdhcnt;
-        u32 spdhmcnt;
-};
 #ifdef CONFIG_AUDITSYSCALL
 extern void xfrm_audit_log(uid_t auid, u32 secid, int type, int result,
                     struct xfrm_policy *xp, struct xfrm_state *x);
@@ -964,11 +945,29 @@ static inline int xfrm_state_sort(struct xfrm_state **dst, struct xfrm_state **s
         return -ENOSYS;
 }
 #endif
+
+struct xfrmk_sadinfo {
+        u32 sadhcnt; /* current hash bkts */
+        u32 sadhmcnt; /* max allowed hash bkts */
+        u32 sadcnt; /* current running count */
+};
+
+struct xfrmk_spdinfo {
+        u32 incnt;
+        u32 outcnt;
+        u32 fwdcnt;
+        u32 inscnt;
+        u32 outscnt;
+        u32 fwdscnt;
+        u32 spdhcnt;
+        u32 spdhmcnt;
+};
+
 extern struct xfrm_state *xfrm_find_acq_byseq(u32 seq);
 extern int xfrm_state_delete(struct xfrm_state *x);
 extern void xfrm_state_flush(u8 proto, struct xfrm_audit *audit_info);
-extern void xfrm_sad_getinfo(struct xfrm_sadinfo *si);
-extern void xfrm_spd_getinfo(struct xfrm_spdinfo *si);
+extern void xfrm_sad_getinfo(struct xfrmk_sadinfo *si);
+extern void xfrm_spd_getinfo(struct xfrmk_spdinfo *si);
 extern int xfrm_replay_check(struct xfrm_state *x, __be32 seq);
 extern void xfrm_replay_advance(struct xfrm_state *x, __be32 seq);
 extern void xfrm_replay_notify(struct xfrm_state *x, int event);
diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h
index 585d28e960dd..739fa4d0e539 100644
--- a/include/rdma/ib_mad.h
+++ b/include/rdma/ib_mad.h
@@ -39,8 +39,6 @@
 #if !defined( IB_MAD_H )
 #define IB_MAD_H
 
-#include <linux/pci.h>
-
 #include <rdma/ib_verbs.h>
 
 /* Management base version */
diff --git a/include/scsi/iscsi_proto.h b/include/scsi/iscsi_proto.h
index 4a44278ed768..8d1e4e8026fe 100644
--- a/include/scsi/iscsi_proto.h
+++ b/include/scsi/iscsi_proto.h
@@ -588,7 +588,17 @@ struct iscsi_reject {
 #define VALUE_MAXLEN            255
 #define TARGET_NAME_MAXLEN      VALUE_MAXLEN
 
-#define DEFAULT_MAX_RECV_DATA_SEGMENT_LENGTH    8192
+#define ISCSI_DEF_MAX_RECV_SEG_LEN              8192
+#define ISCSI_MIN_MAX_RECV_SEG_LEN              512
+#define ISCSI_MAX_MAX_RECV_SEG_LEN              16777215
+
+#define ISCSI_DEF_FIRST_BURST_LEN               65536
+#define ISCSI_MIN_FIRST_BURST_LEN               512
+#define ISCSI_MAX_FIRST_BURST_LEN               16777215
+
+#define ISCSI_DEF_MAX_BURST_LEN                 262144
+#define ISCSI_MIN_MAX_BURST_LEN                 512
+#define ISCSI_MAX_MAX_BURST_LEN                 16777215
 
 /************************* RFC 3720 End *****************************/
 
diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h
index 5c0e9791441c..9f8f80ab0c8b 100644
--- a/include/scsi/scsi.h
+++ b/include/scsi/scsi.h
@@ -203,6 +203,7 @@ static inline int scsi_status_is_good(int status)
 
 /*
  *  DEVICE TYPES
+ *  Please keep them in 0x%02x format for $MODALIAS to work
  */
 
 #define TYPE_DISK           0x00
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index d6948d0e8cdb..a2e0c1032491 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -73,9 +73,6 @@ struct scsi_cmnd {
         unsigned short use_sg;  /* Number of pieces of scatter-gather */
         unsigned short sglist_len;      /* size of malloc'd scatter-gather list */
 
-        /* offset in cmd we are at (for multi-transfer tgt cmds) */
-        unsigned offset;
-
         unsigned underflow;     /* Return error if less than
                                    this amount is transferred */
 
diff --git a/include/scsi/scsi_dbg.h b/include/scsi/scsi_dbg.h
index 3bbbfbe8cbfc..5a43a4cd96c6 100644
--- a/include/scsi/scsi_dbg.h
+++ b/include/scsi/scsi_dbg.h
@@ -5,14 +5,16 @@ struct scsi_cmnd;
 struct scsi_sense_hdr;
 
 extern void scsi_print_command(struct scsi_cmnd *);
-extern void scsi_print_sense_hdr(const char *, struct scsi_sense_hdr *);
 extern void __scsi_print_command(unsigned char *);
-extern void scsi_print_sense(const char *, struct scsi_cmnd *);
+extern void scsi_show_extd_sense(unsigned char, unsigned char);
+extern void scsi_show_sense_hdr(struct scsi_sense_hdr *);
+extern void scsi_print_sense_hdr(const char *, struct scsi_sense_hdr *);
+extern void scsi_print_sense(char *, struct scsi_cmnd *);
 extern void __scsi_print_sense(const char *name,
                                const unsigned char *sense_buffer,
                                int sense_len);
-extern void scsi_print_driverbyte(int);
-extern void scsi_print_hostbyte(int);
+extern void scsi_show_result(int);
+extern void scsi_print_result(struct scsi_cmnd *);
 extern void scsi_print_status(unsigned char);
 extern const char *scsi_sense_key_string(unsigned char);
 extern const char *scsi_extd_sense_format(unsigned char, unsigned char);
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 9dd37e2f5a84..2f3c5b8b1d6a 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -5,6 +5,7 @@
 #include <linux/list.h>
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
+#include <linux/blkdev.h>
 #include <asm/atomic.h>
 
 struct request_queue;
@@ -119,6 +120,7 @@ struct scsi_device {
         unsigned use_192_bytes_for_3f:1; /* ask for 192 bytes from page 0x3f */
         unsigned no_start_on_add:1;     /* do not issue start on add */
         unsigned allow_restart:1; /* issue START_UNIT in error handler */
+        unsigned manage_start_stop:1;   /* Let HLD (sd) manage start/stop */
         unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
         unsigned select_no_atn:1;
         unsigned fix_capacity:1;        /* READ_CAPACITY is too high by 1 */
@@ -154,8 +156,11 @@ struct scsi_device {
 #define sdev_printk(prefix, sdev, fmt, a...)    \
         dev_printk(prefix, &(sdev)->sdev_gendev, fmt, ##a)
 
-#define scmd_printk(prefix, scmd, fmt, a...)    \
-        dev_printk(prefix, &(scmd)->device->sdev_gendev, fmt, ##a)
+#define scmd_printk(prefix, scmd, fmt, a...)                            \
+        (scmd)->request->rq_disk ?                                      \
+        sdev_printk(prefix, (scmd)->device, "[%s] " fmt,                \
+                    (scmd)->request->rq_disk->disk_name, ##a) :         \
+        sdev_printk(prefix, (scmd)->device, fmt, ##a)
 
 enum scsi_target_state {
         STARGET_RUNNING = 1,
@@ -353,4 +358,9 @@ static inline int scsi_device_qas(struct scsi_device *sdev)
                 return 0;
         return sdev->inquiry[56] & 0x02;
 }
+
+#define MODULE_ALIAS_SCSI_DEVICE(type) \
+        MODULE_ALIAS("scsi:t-" __stringify(type) "*")
+#define SCSI_DEVICE_MODALIAS_FMT "scsi:t-0x%02x"
+
 #endif /* _SCSI_SCSI_DEVICE_H */
diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h
index 7f1f411d07af..68f461b7a835 100644
--- a/include/scsi/scsi_host.h
+++ b/include/scsi/scsi_host.h
@@ -129,6 +129,11 @@ struct scsi_host_template {
          * the LLD. When the driver is finished processing the command
          * the done callback is invoked.
          *
+         * This is called to inform the LLD to transfer
+         * cmd->request_bufflen bytes. The cmd->use_sg speciefies the
+         * number of scatterlist entried in the command and
+         * cmd->request_buffer contains the scatterlist.
+         *
          * return values: see queuecommand
          *
          * If the LLD accepts the cmd, it should set the result to an
@@ -139,20 +144,6 @@ struct scsi_host_template {
         /* TODO: rename */
         int (* transfer_response)(struct scsi_cmnd *,
                                   void (*done)(struct scsi_cmnd *));
-        /*
-         * This is called to inform the LLD to transfer cmd->request_bufflen
-         * bytes of the cmd at cmd->offset in the cmd. The cmd->use_sg
-         * speciefies the number of scatterlist entried in the command
-         * and cmd->request_buffer contains the scatterlist.
-         *
-         * If the command cannot be processed in one transfer_data call
-         * becuase a scatterlist within the LLD's limits cannot be
-         * created then transfer_data will be called multiple times.
-         * It is initially called from process context, and later
-         * calls are from the interrup context.
-         */
-        int (* transfer_data)(struct scsi_cmnd *,
-                              void (*done)(struct scsi_cmnd *));
 
         /* Used as callback for the completion of task management request. */
         int (* tsk_mgmt_response)(u64 mid, int result);
@@ -335,6 +326,19 @@ struct scsi_host_template {
         int (*proc_info)(struct Scsi_Host *, char *, char **, off_t, int, int);
 
         /*
+         * This is an optional routine that allows the transport to become
+         * involved when a scsi io timer fires. The return value tells the
+         * timer routine how to finish the io timeout handling:
+         * EH_HANDLED:          I fixed the error, please complete the command
+         * EH_RESET_TIMER:      I need more time, reset the timer and
+         *                      begin counting again
+         * EH_NOT_HANDLED       Begin normal error recovery
+         *
+         * Status: OPTIONAL
+         */
+        enum scsi_eh_timer_return (* eh_timed_out)(struct scsi_cmnd *);
+
+        /*
          * suspend support
          */
         int (*resume)(struct scsi_device *);
diff --git a/include/scsi/scsi_tgt_if.h b/include/scsi/scsi_tgt_if.h
index 07d6e77ae895..4cf9dff29a2f 100644
--- a/include/scsi/scsi_tgt_if.h
+++ b/include/scsi/scsi_tgt_if.h
@@ -45,11 +45,13 @@ struct tgt_event {
                 /* user-> kernel */
                 struct {
                         int host_no;
-                        uint32_t len;
                         int result;
+                        aligned_u64 tag;
                         aligned_u64 uaddr;
+                        aligned_u64 sense_uaddr;
+                        uint32_t len;
+                        uint32_t sense_len;
                         uint8_t rw;
-                        aligned_u64 tag;
                 } cmd_rsp;
                 struct {
                         int host_no;
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index 798f7c7ee426..1e797308640a 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -108,6 +108,8 @@ enum fc_port_state {
 #define FC_PORTSPEED_2GBIT              2
 #define FC_PORTSPEED_4GBIT              4
 #define FC_PORTSPEED_10GBIT             8
+#define FC_PORTSPEED_8GBIT              0x10
+#define FC_PORTSPEED_16GBIT             0x20
 #define FC_PORTSPEED_NOT_NEGOTIATED     (1 << 15) /* Speed not established */
 
 /*
diff --git a/include/scsi/sd.h b/include/scsi/sd.h
new file mode 100644
index 000000000000..5261488e1108
--- /dev/null
+++ b/include/scsi/sd.h
@@ -0,0 +1,72 @@
+#ifndef _SCSI_DISK_H
+#define _SCSI_DISK_H
+
+/*
+ * More than enough for everybody ;)  The huge number of majors
+ * is a leftover from 16bit dev_t days, we don't really need that
+ * much numberspace.
+ */
+#define SD_MAJORS       16
+
+/*
+ * This is limited by the naming scheme enforced in sd_probe,
+ * add another character to it if you really need more disks.
+ */
+#define SD_MAX_DISKS    (((26 * 26) + 26 + 1) * 26)
+
+/*
+ * Time out in seconds for disks and Magneto-opticals (which are slower).
+ */
+#define SD_TIMEOUT              (30 * HZ)
+#define SD_MOD_TIMEOUT          (75 * HZ)
+
+/*
+ * Number of allowed retries
+ */
+#define SD_MAX_RETRIES          5
+#define SD_PASSTHROUGH_RETRIES  1
+
+/*
+ * Size of the initial data buffer for mode and read capacity data
+ */
+#define SD_BUF_SIZE             512
+
+struct scsi_disk {
+        struct scsi_driver *driver;     /* always &sd_template */
+        struct scsi_device *device;
+        struct class_device cdev;
+        struct gendisk  *disk;
+        unsigned int    openers;        /* protected by BKL for now, yuck */
+        sector_t        capacity;       /* size in 512-byte sectors */
+        u32             index;
+        u8              media_present;
+        u8              write_prot;
+        unsigned        WCE : 1;        /* state of disk WCE bit */
+        unsigned        RCD : 1;        /* state of disk RCD bit, unused */
+        unsigned        DPOFUA : 1;     /* state of disk DPOFUA bit */
+};
+#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,cdev)
+
+static int  sd_revalidate_disk(struct gendisk *disk);
+static void sd_rw_intr(struct scsi_cmnd * SCpnt);
+static int  sd_probe(struct device *);
+static int  sd_remove(struct device *);
+static void sd_shutdown(struct device *dev);
+static int sd_suspend(struct device *dev, pm_message_t state);
+static int sd_resume(struct device *dev);
+static void sd_rescan(struct device *);
+static int  sd_init_command(struct scsi_cmnd *);
+static int  sd_issue_flush(struct device *, sector_t *);
+static void sd_prepare_flush(request_queue_t *, struct request *);
+static void sd_read_capacity(struct scsi_disk *sdkp, unsigned char *buffer);
+static void scsi_disk_release(struct class_device *cdev);
+static void sd_print_sense_hdr(struct scsi_disk *, struct scsi_sense_hdr *);
+static void sd_print_result(struct scsi_disk *, int);
+
+#define sd_printk(prefix, sdsk, fmt, a...)                              \
+        (sdsk)->disk ?                                                  \
+        sdev_printk(prefix, (sdsk)->device, "[%s] " fmt,                \
+                    (sdsk)->disk->disk_name, ##a) :                     \
+        sdev_printk(prefix, (sdsk)->device, fmt, ##a)
+
+#endif /* _SCSI_DISK_H */