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-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_ide.h18
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h4
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h4
3 files changed, 4 insertions, 22 deletions
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index e4fe26c160ba..89655c0cdcd6 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -122,24 +122,6 @@ static const struct drive_list_entry dma_black_list [] = {
122}; 122};
123#endif 123#endif
124 124
125/* function prototyping */
126u8 auide_inb(unsigned long port);
127u16 auide_inw(unsigned long port);
128u32 auide_inl(unsigned long port);
129void auide_insw(unsigned long port, void *addr, u32 count);
130void auide_insl(unsigned long port, void *addr, u32 count);
131void auide_outb(u8 addr, unsigned long port);
132void auide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port);
133void auide_outw(u16 addr, unsigned long port);
134void auide_outl(u32 addr, unsigned long port);
135void auide_outsw(unsigned long port, void *addr, u32 count);
136void auide_outsl(unsigned long port, void *addr, u32 count);
137static void auide_tune_drive(ide_drive_t *drive, byte pio);
138static int auide_tune_chipset(ide_drive_t *drive, u8 speed);
139static int auide_ddma_init( _auide_hwif *auide );
140static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
141int __init auide_probe(void);
142
143/******************************************************************************* 125/*******************************************************************************
144* PIO Mode timing calculation : * 126* PIO Mode timing calculation : *
145* * 127* *
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index a6bdac61ab49..d2e28e64932e 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -173,8 +173,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
173#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT 173#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
174 174
175#define AU1XXX_ATA_PHYS_ADDR (0x18800000) 175#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
176#define AU1XXX_ATA_PHYS_LEN (0x100) 176#define AU1XXX_ATA_REG_OFFSET (5)
177#define AU1XXX_ATA_REG_OFFSET (5) 177#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET)
178#define AU1XXX_ATA_INT DB1200_IDE_INT 178#define AU1XXX_ATA_INT DB1200_IDE_INT
179#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; 179#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
180#define AU1XXX_ATA_RQSIZE 128 180#define AU1XXX_ATA_RQSIZE 128
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 72213e3d02c7..edaa489b58f1 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -186,8 +186,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
186#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT 186#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
187 187
188#define AU1XXX_ATA_PHYS_ADDR (0x0C800000) 188#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
189#define AU1XXX_ATA_PHYS_LEN (0x100) 189#define AU1XXX_ATA_REG_OFFSET (5)
190#define AU1XXX_ATA_REG_OFFSET (5) 190#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET)
191#define AU1XXX_ATA_INT PB1200_IDE_INT 191#define AU1XXX_ATA_INT PB1200_IDE_INT
192#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; 192#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
193#define AU1XXX_ATA_RQSIZE 128 193#define AU1XXX_ATA_RQSIZE 128