aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/linux/if_ether.h3
-rw-r--r--include/linux/netfilter.h2
-rw-r--r--include/linux/netfilter/Kbuild2
-rw-r--r--include/linux/netfilter/xt_hashlimit.h1
-rw-r--r--include/linux/ssb/ssb.h12
-rw-r--r--include/linux/ssb/ssb_driver_chipcommon.h18
-rw-r--r--include/linux/ssb/ssb_driver_extif.h18
-rw-r--r--include/linux/ssb/ssb_driver_pci.h5
-rw-r--r--include/linux/ssb/ssb_embedded.h18
-rw-r--r--include/net/ip6_tunnel.h2
10 files changed, 67 insertions, 14 deletions
diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h
index 42dc6a3571ec..e157c1399b61 100644
--- a/include/linux/if_ether.h
+++ b/include/linux/if_ether.h
@@ -129,7 +129,8 @@ extern ssize_t sysfs_format_mac(char *buf, const unsigned char *addr, int len);
129/* 129/*
130 * Display a 6 byte device address (MAC) in a readable format. 130 * Display a 6 byte device address (MAC) in a readable format.
131 */ 131 */
132extern __pure char *print_mac(char *buf, const unsigned char *addr); 132extern char *print_mac(char *buf, const unsigned char *addr);
133#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
133#define MAC_BUF_SIZE 18 134#define MAC_BUF_SIZE 18
134#define DECLARE_MAC_BUF(var) char var[MAC_BUF_SIZE] __maybe_unused 135#define DECLARE_MAC_BUF(var) char var[MAC_BUF_SIZE] __maybe_unused
135 136
diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h
index d74e79bacd2d..b74b615492e8 100644
--- a/include/linux/netfilter.h
+++ b/include/linux/netfilter.h
@@ -51,7 +51,7 @@ enum nf_inet_hooks {
51}; 51};
52 52
53union nf_inet_addr { 53union nf_inet_addr {
54 u_int32_t all[4]; 54 __u32 all[4];
55 __be32 ip; 55 __be32 ip;
56 __be32 ip6[4]; 56 __be32 ip6[4];
57 struct in_addr in; 57 struct in_addr in;
diff --git a/include/linux/netfilter/Kbuild b/include/linux/netfilter/Kbuild
index 91fef0cae42f..3aff513d12c8 100644
--- a/include/linux/netfilter/Kbuild
+++ b/include/linux/netfilter/Kbuild
@@ -30,7 +30,6 @@ header-y += xt_mark.h
30header-y += xt_multiport.h 30header-y += xt_multiport.h
31header-y += xt_owner.h 31header-y += xt_owner.h
32header-y += xt_pkttype.h 32header-y += xt_pkttype.h
33header-y += xt_policy.h
34header-y += xt_rateest.h 33header-y += xt_rateest.h
35header-y += xt_realm.h 34header-y += xt_realm.h
36header-y += xt_sctp.h 35header-y += xt_sctp.h
@@ -47,3 +46,4 @@ unifdef-y += nfnetlink.h
47unifdef-y += nfnetlink_compat.h 46unifdef-y += nfnetlink_compat.h
48unifdef-y += x_tables.h 47unifdef-y += x_tables.h
49unifdef-y += xt_physdev.h 48unifdef-y += xt_physdev.h
49unifdef-y += xt_policy.h
diff --git a/include/linux/netfilter/xt_hashlimit.h b/include/linux/netfilter/xt_hashlimit.h
index 58b818ee41ca..51b18d83b477 100644
--- a/include/linux/netfilter/xt_hashlimit.h
+++ b/include/linux/netfilter/xt_hashlimit.h
@@ -61,7 +61,6 @@ struct xt_hashlimit_mtinfo1 {
61 61
62 /* Used internally by the kernel */ 62 /* Used internally by the kernel */
63 struct xt_hashlimit_htable *hinfo __attribute__((aligned(8))); 63 struct xt_hashlimit_htable *hinfo __attribute__((aligned(8)));
64 struct xt_hashlimit_mtinfo1 *master __attribute__((aligned(8)));
65}; 64};
66 65
67#endif /*_XT_HASHLIMIT_H*/ 66#endif /*_XT_HASHLIMIT_H*/
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 9d5da8b2ccf9..20add65215af 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -282,6 +282,13 @@ struct ssb_bus {
282 struct ssb_boardinfo boardinfo; 282 struct ssb_boardinfo boardinfo;
283 /* Contents of the SPROM. */ 283 /* Contents of the SPROM. */
284 struct ssb_sprom sprom; 284 struct ssb_sprom sprom;
285 /* If the board has a cardbus slot, this is set to true. */
286 bool has_cardbus_slot;
287
288#ifdef CONFIG_SSB_EMBEDDED
289 /* Lock for GPIO register access. */
290 spinlock_t gpio_lock;
291#endif /* EMBEDDED */
285 292
286 /* Internal-only stuff follows. Do not touch. */ 293 /* Internal-only stuff follows. Do not touch. */
287 struct list_head list; 294 struct list_head list;
@@ -294,8 +301,13 @@ struct ssb_bus {
294 301
295/* The initialization-invariants. */ 302/* The initialization-invariants. */
296struct ssb_init_invariants { 303struct ssb_init_invariants {
304 /* Versioning information about the PCB. */
297 struct ssb_boardinfo boardinfo; 305 struct ssb_boardinfo boardinfo;
306 /* The SPROM information. That's either stored in an
307 * EEPROM or NVRAM on the board. */
298 struct ssb_sprom sprom; 308 struct ssb_sprom sprom;
309 /* If the board has a cardbus slot, this is set to true. */
310 bool has_cardbus_slot;
299}; 311};
300/* Type of function to fetch the invariants. */ 312/* Type of function to fetch the invariants. */
301typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus, 313typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index 4cb995494662..536851b946f6 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -51,9 +51,12 @@
51#define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */ 51#define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */
52#define SSB_CHIPCO_CAP_BROM 0x00800000 /* Internal boot ROM active */ 52#define SSB_CHIPCO_CAP_BROM 0x00800000 /* Internal boot ROM active */
53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */ 53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
54#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
55#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
54#define SSB_CHIPCO_CORECTL 0x0008 56#define SSB_CHIPCO_CORECTL 0x0008
55#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */ 57#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
56#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ 58#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
59#define SSB_CHIPCO_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
57#define SSB_CHIPCO_BIST 0x000C 60#define SSB_CHIPCO_BIST 0x000C
58#define SSB_CHIPCO_OTPS 0x0010 /* OTP status */ 61#define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
59#define SSB_CHIPCO_OTPS_PROGFAIL 0x80000000 62#define SSB_CHIPCO_OTPS_PROGFAIL 0x80000000
@@ -357,6 +360,11 @@ struct ssb_chipcommon {
357 u16 fast_pwrup_delay; 360 u16 fast_pwrup_delay;
358}; 361};
359 362
363static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
364{
365 return (cc->dev != NULL);
366}
367
360extern void ssb_chipcommon_init(struct ssb_chipcommon *cc); 368extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
361 369
362#include <linux/pm.h> 370#include <linux/pm.h>
@@ -382,11 +390,13 @@ extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
382extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, 390extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
383 u32 ticks); 391 u32 ticks);
384 392
393/* Chipcommon GPIO pin access. */
385u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask); 394u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
386 395u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
387void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value); 396u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
388 397u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
389void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value); 398u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
399u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
390 400
391#ifdef CONFIG_SSB_SERIAL 401#ifdef CONFIG_SSB_SERIAL
392extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc, 402extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
diff --git a/include/linux/ssb/ssb_driver_extif.h b/include/linux/ssb/ssb_driver_extif.h
index a9164357b5ae..91161f0aa22b 100644
--- a/include/linux/ssb/ssb_driver_extif.h
+++ b/include/linux/ssb/ssb_driver_extif.h
@@ -171,11 +171,15 @@ extern void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
171extern void ssb_extif_timing_init(struct ssb_extif *extif, 171extern void ssb_extif_timing_init(struct ssb_extif *extif,
172 unsigned long ns); 172 unsigned long ns);
173 173
174u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask); 174extern void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
175 175 u32 ticks);
176void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
177 176
178void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value); 177/* Extif GPIO pin access */
178u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
179u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
180u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
181u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value);
182u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value);
179 183
180#ifdef CONFIG_SSB_SERIAL 184#ifdef CONFIG_SSB_SERIAL
181extern int ssb_extif_serial_init(struct ssb_extif *extif, 185extern int ssb_extif_serial_init(struct ssb_extif *extif,
@@ -200,5 +204,11 @@ void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
200{ 204{
201} 205}
202 206
207static inline
208void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
209 u32 ticks)
210{
211}
212
203#endif /* CONFIG_SSB_DRIVER_EXTIF */ 213#endif /* CONFIG_SSB_DRIVER_EXTIF */
204#endif /* LINUX_SSB_EXTIFCORE_H_ */ 214#endif /* LINUX_SSB_EXTIFCORE_H_ */
diff --git a/include/linux/ssb/ssb_driver_pci.h b/include/linux/ssb/ssb_driver_pci.h
index 9cfffb7b1a27..5e25bac4ed31 100644
--- a/include/linux/ssb/ssb_driver_pci.h
+++ b/include/linux/ssb/ssb_driver_pci.h
@@ -51,6 +51,11 @@
51#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000 51#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000
52#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */ 52#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
53#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000 53#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000
54#define SSB_PCICORE_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
55#define SSB_PCICORE_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
56#define SSB_PCICORE_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
57#define SSB_PCICORE_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
58#define SSB_PCICORE_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
54 59
55/* SBtoPCIx */ 60/* SBtoPCIx */
56#define SSB_PCICORE_SBTOPCI_MEM 0x00000000 61#define SSB_PCICORE_SBTOPCI_MEM 0x00000000
diff --git a/include/linux/ssb/ssb_embedded.h b/include/linux/ssb/ssb_embedded.h
new file mode 100644
index 000000000000..8d8dedff059d
--- /dev/null
+++ b/include/linux/ssb/ssb_embedded.h
@@ -0,0 +1,18 @@
1#ifndef LINUX_SSB_EMBEDDED_H_
2#define LINUX_SSB_EMBEDDED_H_
3
4#include <linux/types.h>
5#include <linux/ssb/ssb.h>
6
7
8extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks);
9
10/* Generic GPIO API */
11u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
12u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
13u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
14u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
15u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
16u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
17
18#endif /* LINUX_SSB_EMBEDDED_H_ */
diff --git a/include/net/ip6_tunnel.h b/include/net/ip6_tunnel.h
index c17fa1fdc356..6512d85f11b3 100644
--- a/include/net/ip6_tunnel.h
+++ b/include/net/ip6_tunnel.h
@@ -14,8 +14,6 @@
14/* capable of receiving packets */ 14/* capable of receiving packets */
15#define IP6_TNL_F_CAP_RCV 0x20000 15#define IP6_TNL_F_CAP_RCV 0x20000
16 16
17#define IP6_TNL_MAX 128
18
19/* IPv6 tunnel */ 17/* IPv6 tunnel */
20 18
21struct ip6_tnl { 19struct ip6_tnl {