58 files changed, 702 insertions, 2117 deletions
diff --git a/include/asm-ppc64/a.out.h b/include/asm-powerpc/a.out.h
index 3871e252a6f1..c7393a977364 100644
--- a/include/asm-ppc64/a.out.h
+++ b/include/asm-powerpc/a.out.h
@@ -1,14 +1,5 @@
-#ifndef __PPC64_A_OUT_H__
+#ifndef _ASM_POWERPC_A_OUT_H
-#define __PPC64_A_OUT_H__
+#define _ASM_POWERPC_A_OUT_H
-/*
- * c 2001 PPC 64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
 struct exec
 {
@@ -27,6 +18,7 @@ struct exec
 #define N_SYMSIZE(a)    ((a).a_syms)
 #ifdef __KERNEL__
+#ifdef __powerpc64__
 #define STACK_TOP_USER64 TASK_SIZE_USER64
 #define STACK_TOP_USER32 TASK_SIZE_USER32
@@ -34,6 +26,11 @@ struct exec
 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
                   STACK_TOP_USER32 : STACK_TOP_USER64)
+#else /* __powerpc64__ */
+#define STACK_TOP TASK_SIZE
+#endif /* __powerpc64__ */
 #endif /* __KERNEL__ */
-#endif /* __PPC64_A_OUT_H__ */
+#endif /* _ASM_POWERPC_A_OUT_H */
diff --git a/include/asm-ppc/atomic.h b/include/asm-powerpc/atomic.h
index eeafd505836e..ed4b345ed75d 100644
--- a/include/asm-ppc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -1,29 +1,20 @@
+#ifndef _ASM_POWERPC_ATOMIC_H_
+#define _ASM_POWERPC_ATOMIC_H_
 /*
 * PowerPC atomic operations
 */
-#ifndef _ASM_PPC_ATOMIC_H_
-#define _ASM_PPC_ATOMIC_H_
 typedef struct { volatile int counter; } atomic_t;
 #ifdef __KERNEL__
+#include <asm/synch.h>
-#define ATOMIC_INIT(i)  { (i) }
+#define ATOMIC_INIT(i)          { (i) }
 #define atomic_read(v)          ((v)->counter)
 #define atomic_set(v,i)         (((v)->counter) = (i))
-extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
-#ifdef CONFIG_SMP
-#define SMP_SYNC        "sync"
-#define SMP_ISYNC       "\n\tisync"
-#else
-#define SMP_SYNC        ""
-#define SMP_ISYNC
-#endif
 /* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
 * The old ATOMIC_SYNC_FIX covered some but not all of this.
 */
@@ -53,12 +44,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
        int t;
        __asm__ __volatile__(
+        EIEIO_ON_SMP
 "1:     lwarx   %0,0,%2         # atomic_add_return\n\
        add     %0,%1,%0\n"
        PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%2 \n\
        bne-    1b"
-        SMP_ISYNC
+        ISYNC_ON_SMP
        : "=&r" (t)
        : "r" (a), "r" (&v->counter)
        : "cc", "memory");
@@ -88,12 +80,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
        int t;
        __asm__ __volatile__(
+        EIEIO_ON_SMP
 "1:     lwarx   %0,0,%2         # atomic_sub_return\n\
        subf    %0,%1,%0\n"
        PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%2 \n\
        bne-    1b"
-        SMP_ISYNC
+        ISYNC_ON_SMP
        : "=&r" (t)
        : "r" (a), "r" (&v->counter)
        : "cc", "memory");
@@ -121,12 +114,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
        int t;
        __asm__ __volatile__(
+        EIEIO_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_inc_return\n\
        addic   %0,%0,1\n"
        PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1 \n\
        bne-    1b"
-        SMP_ISYNC
+        ISYNC_ON_SMP
        : "=&r" (t)
        : "r" (&v->counter)
        : "cc", "memory");
@@ -164,12 +158,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
        int t;
        __asm__ __volatile__(
+        EIEIO_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_dec_return\n\
        addic   %0,%0,-1\n"
        PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1\n\
        bne-    1b"
-        SMP_ISYNC
+        ISYNC_ON_SMP
        : "=&r" (t)
        : "r" (&v->counter)
        : "cc", "memory");
@@ -189,13 +184,14 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
        int t;
        __asm__ __volatile__(
+        EIEIO_ON_SMP
 "1:     lwarx   %0,0,%1         # atomic_dec_if_positive\n\
        addic.  %0,%0,-1\n\
        blt-    2f\n"
        PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1\n\
        bne-    1b"
-        SMP_ISYNC
+        ISYNC_ON_SMP
        "\n\
 2:"     : "=&r" (t)
        : "r" (&v->counter)
@@ -204,11 +200,10 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
        return t;
 }
-#define __MB    __asm__ __volatile__ (SMP_SYNC : : : "memory")
+#define smp_mb__before_atomic_dec()     smp_mb()
-#define smp_mb__before_atomic_dec()     __MB
+#define smp_mb__after_atomic_dec()      smp_mb()
-#define smp_mb__after_atomic_dec()      __MB
+#define smp_mb__before_atomic_inc()     smp_mb()
-#define smp_mb__before_atomic_inc()     __MB
+#define smp_mb__after_atomic_inc()      smp_mb()
-#define smp_mb__after_atomic_inc()      __MB
 #endif /* __KERNEL__ */
-#endif /* _ASM_PPC_ATOMIC_H_ */
+#endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-powerpc/auxvec.h
index ac6381a106e1..79d8c4732309 100644
--- a/include/asm-ppc64/auxvec.h
+++ b/include/asm-powerpc/auxvec.h
@@ -1,5 +1,5 @@
-#ifndef __PPC64_AUXVEC_H
+#ifndef _ASM_POWERPC_AUXVEC_H
-#define __PPC64_AUXVEC_H
+#define _ASM_POWERPC_AUXVEC_H
 /*
 * We need to put in some extra aux table entries to tell glibc what
@@ -14,6 +14,8 @@
 /* The vDSO location. We have to use the same value as x86 for glibc's
 * sake :-)
 */
+#ifdef __powerpc64__
 #define AT_SYSINFO_EHDR         33
+#endif
-#endif /* __PPC64_AUXVEC_H */
+#endif
diff --git a/include/asm-ppc64/bug.h b/include/asm-powerpc/bug.h
index 160178278861..e4d028e87020 100644
--- a/include/asm-ppc64/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -1,5 +1,5 @@
-#ifndef _PPC64_BUG_H
+#ifndef _ASM_POWERPC_BUG_H
-#define _PPC64_BUG_H
+#define _ASM_POWERPC_BUG_H
 /*
 * Define an illegal instr to trap on the bug.
@@ -11,9 +11,21 @@
 #ifndef __ASSEMBLY__
+#ifdef __powerpc64__
+#define BUG_TABLE_ENTRY(label, line, file, func) \
+        ".llong " #label "\n .long " #line "\n .llong " #file ", " #func "\n"
+#define TRAP_OP(ra, rb) "1: tdnei " #ra ", " #rb "\n"
+#define DATA_TYPE long long
+#else 
+#define BUG_TABLE_ENTRY(label, line, file, func) \
+        ".long " #label ", " #line ", " #file ", " #func "\n"
+#define TRAP_OP(ra, rb) "1: twnei " #ra ", " #rb "\n"
+#define DATA_TYPE int
+#endif /* __powerpc64__ */
 struct bug_entry {
        unsigned long   bug_addr;
-        long            line;
+        int             line;
        const char      *file;
        const char      *function;
 };
@@ -32,28 +44,28 @@ struct bug_entry *find_bug(unsigned long bugaddr);
        __asm__ __volatile__(                                            \
                "1:     twi 31,0,0\n"                                    \
                ".section __bug_table,\"a\"\n\t"                         \
-                "       .llong 1b,%0,%1,%2\n"                            \
+                BUG_TABLE_ENTRY(1b,%0,%1,%2)                             \
                ".previous"                                              \
                : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
 } while (0)
 #define BUG_ON(x) do {                                          \
        __asm__ __volatile__(                                   \
-                "1:     tdnei %0,0\n"                           \
+                TRAP_OP(%0,0)                                   \
                ".section __bug_table,\"a\"\n\t"                \
-                "       .llong 1b,%1,%2,%3\n"                   \
+                BUG_TABLE_ENTRY(1b,%1,%2,%3)                    \
                ".previous"                                     \
-                : : "r" ((long long)(x)), "i" (__LINE__),       \
+                : : "r" ((DATA_TYPE)(x)), "i" (__LINE__),       \
                    "i" (__FILE__), "i" (__FUNCTION__));        \
 } while (0)
 #define WARN_ON(x) do {                                         \
        __asm__ __volatile__(                                   \
-                "1:     tdnei %0,0\n"                           \
+                TRAP_OP(%0,0)                                   \
                ".section __bug_table,\"a\"\n\t"                \
-                "       .llong 1b,%1,%2,%3\n"                   \
+                BUG_TABLE_ENTRY(1b,%1,%2,%3)                    \
                ".previous"                                     \
-                : : "r" ((long long)(x)),                       \
+                : : "r" ((DATA_TYPE)(x)),                       \
                    "i" (__LINE__ + BUG_WARNING_TRAP),          \
                    "i" (__FILE__), "i" (__FUNCTION__));        \
 } while (0)
@@ -61,9 +73,9 @@ struct bug_entry *find_bug(unsigned long bugaddr);
 #define HAVE_ARCH_BUG
 #define HAVE_ARCH_BUG_ON
 #define HAVE_ARCH_WARN_ON
-#endif
+#endif /* CONFIG_BUG */
-#endif
+#endif /* __ASSEMBLY __ */
 #include <asm-generic/bug.h>
-#endif
+#endif /* _ASM_POWERPC_BUG_H */
diff --git a/include/asm-ppc/dma.h b/include/asm-powerpc/dma.h
index cc8e5cd8c9d2..926378d2cd94 100644
--- a/include/asm-ppc/dma.h
+++ b/include/asm-powerpc/dma.h
@@ -1,18 +1,14 @@
+#ifndef _ASM_POWERPC_DMA_H
+#define _ASM_POWERPC_DMA_H
 /*
- * include/asm-ppc/dma.h: Defines for using and allocating dma channels.
+ * Defines for using and allocating dma channels.
 * Written by Hennus Bergman, 1992.
 * High DMA channel support & info by Hannu Savolainen
 * and John Boyd, Nov. 1992.
 * Changes for ppc sound by Christoph Nadig
 */
-#ifdef __KERNEL__
-#include <linux/config.h>
-#include <asm/io.h>
-#include <linux/spinlock.h>
-#include <asm/system.h>
 /*
 * Note: Adapted for PowerPC by Gary Thomas
 * Modified by Cort Dougan <cort@cs.nmt.edu>
@@ -25,8 +21,10 @@
 * with a grain of salt.
 */
-#ifndef _ASM_DMA_H
+#include <linux/config.h>
-#define _ASM_DMA_H
+#include <asm/io.h>
+#include <linux/spinlock.h>
+#include <asm/system.h>
 #ifndef MAX_DMA_CHANNELS
 #define MAX_DMA_CHANNELS        8
@@ -34,11 +32,9 @@
 /* The maximum address that we can perform a DMA transfer to on this platform */
 /* Doesn't really apply... */
-#define MAX_DMA_ADDRESS         0xFFFFFFFF
+#define MAX_DMA_ADDRESS         (~0UL)
-/* in arch/ppc/kernel/setup.c -- Cort */
+#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
-extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
-extern unsigned long ISA_DMA_THRESHOLD;
 #ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
 #define dma_outb        outb_p
@@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
 #define DMA1_EXT_REG            0x40B
 #define DMA2_EXT_REG            0x4D6
+#ifndef __powerpc64__
+    /* in arch/ppc/kernel/setup.c -- Cort */
+    extern unsigned int DMA_MODE_WRITE;
+    extern unsigned int DMA_MODE_READ;
+    extern unsigned long ISA_DMA_THRESHOLD;
+#else
+    #define DMA_MODE_READ       0x44    /* I/O to memory, no autoinit, increment, single mode */
+    #define DMA_MODE_WRITE      0x48    /* memory to I/O, no autoinit, increment, single mode */
+#endif
 #define DMA_MODE_CASCADE        0xC0    /* pass thru DREQ->HRQ, DACK<-HLDA only */
 #define DMA_AUTOINIT            0x10
 extern spinlock_t dma_spin_lock;
@@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr)
        if (dmanr <= 3) {
                dma_outb(dmanr, DMA1_MASK_REG);
                dma_outb(ucDmaCmd, DMA1_CMD_REG);       /* Enable group */
-        } else
+        } else {
                dma_outb(dmanr & 3, DMA2_MASK_REG);
+        }
 }
 static __inline__ void disable_dma(unsigned int dmanr)
@@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
 static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
 {
        if (dmanr <= 3) {
-                dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
+                dma_outb(phys & 0xff,
-                dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
+                         ((dmanr & 3) << 1) + IO_DMA1_BASE);
+                dma_outb((phys >> 8) & 0xff,
+                         ((dmanr & 3) << 1) + IO_DMA1_BASE);
        } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
-                dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                dma_outb(phys & 0xff,
-                dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                         ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                dma_outb((phys >> 8) & 0xff,
+                         ((dmanr & 3) << 2) + IO_DMA2_BASE);
                dma_outb((dmanr & 3), DMA2_EXT_REG);
        } else {
-                dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                dma_outb((phys >> 1) & 0xff,
-                dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                         ((dmanr & 3) << 2) + IO_DMA2_BASE);
+                dma_outb((phys >> 9) & 0xff,
+                         ((dmanr & 3) << 2) + IO_DMA2_BASE);
        }
        set_dma_page(dmanr, phys >> 16);
 }
 /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
 * a specific DMA channel.
 * You must ensure the parameters are valid.
@@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
 {
        count--;
        if (dmanr <= 3) {
-                dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
+                dma_outb(count & 0xff,
-                dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 +
+                         ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
-                         IO_DMA1_BASE);
+                dma_outb((count >> 8) & 0xff,
+                         ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
        } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
-                dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
+                dma_outb(count & 0xff,
-                dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +
+                         ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
-                         IO_DMA2_BASE);
+                dma_outb((count >> 8) & 0xff,
+                         ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
        } else {
-                dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 +
+                dma_outb((count >> 1) & 0xff,
-                         IO_DMA2_BASE);
+                         ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
-                dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 +
+                dma_outb((count >> 9) & 0xff,
-                         IO_DMA2_BASE);
+                         ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
        }
 }
 /* Get DMA residue count. After a DMA transfer, this
 * should return zero. Reading this while a DMA transfer is
 * still in progress will return unpredictable results.
@@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
 */
 static __inline__ int get_dma_residue(unsigned int dmanr)
 {
-        unsigned int io_port = (dmanr <= 3) ?
+        unsigned int io_port = (dmanr <= 3)
-            ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
+            ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
            : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
        /* using short to get 16-bit wrap around */
@@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
        return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
            ? count : (count << 1);
 }
 /* These are in kernel/dma.c: */
@@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy;
 #else
 #define isa_dma_bridge_buggy    (0)
 #endif
-#endif                          /* _ASM_DMA_H */
-#endif                          /* __KERNEL__ */
+#endif  /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
+#endif  /* _ASM_POWERPC_DMA_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-powerpc/elf.h
index c919a89343db..36b9d5cec50c 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -1,10 +1,11 @@
-#ifndef __PPC64_ELF_H
+#ifndef _ASM_POWERPC_ELF_H
-#define __PPC64_ELF_H
+#define _ASM_POWERPC_ELF_H
 #include <asm/types.h>
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
 #include <asm/auxvec.h>
+#include <asm/page.h>
 /* PowerPC relocations defined by the ABIs */
 #define R_PPC_NONE              0
@@ -75,7 +76,7 @@
 #define R_PPC_GOT_DTPREL16_HI   93 /* half16*   (sym+add)@got@dtprel@h */
 #define R_PPC_GOT_DTPREL16_HA   94 /* half16*   (sym+add)@got@dtprel@ha */
-/* Keep this the last entry.  */
+/* keep this the last entry. */
 #define R_PPC_NUM               95
 /*
@@ -90,8 +91,6 @@
 #define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
 #define ELF_NFPREG      33      /* includes fpscr */
-#define ELF_NVRREG32    33      /* includes vscr & vrsave stuffed together */
-#define ELF_NVRREG      34      /* includes vscr & vrsave in split vectors */
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
@@ -100,8 +99,21 @@ typedef unsigned int elf_greg_t32;
 typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
 /*
- * These are used to set parameters in the core dumps.
+ * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
 */
+#ifdef __powerpc64__
+# define ELF_NVRREG32   33      /* includes vscr & vrsave stuffed together */
+# define ELF_NVRREG     34      /* includes vscr & vrsave in split vectors */
+# define ELF_GREG_TYPE  elf_greg_t64
+#else
+# define ELF_NEVRREG    34      /* includes acc (as 2) */
+# define ELF_NVRREG     33      /* includes vscr */
+# define ELF_GREG_TYPE  elf_greg_t32
+# define ELF_ARCH       EM_PPC
+# define ELF_CLASS      ELFCLASS32
+# define ELF_DATA       ELFDATA2MSB
+#endif /* __powerpc64__ */
 #ifndef ELF_ARCH
 # define ELF_ARCH       EM_PPC64
 # define ELF_CLASS      ELFCLASS64
@@ -114,8 +126,9 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
  typedef elf_greg_t32 elf_greg_t;
  typedef elf_gregset_t32 elf_gregset_t;
 # define elf_addr_t u32
-#endif
+#endif /* ELF_ARCH */
+/* Floating point registers */
 typedef double elf_fpreg_t;
 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
@@ -125,7 +138,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 * The entry with index 32 contains the vscr as the last word (offset 12) 
 * within the quadword.  This allows the vscr to be stored as either a 
 * quadword (since it must be copied via a vector register to/from storage) 
- * or as a word.  The entry with index 33 contains the vrsave as the first 
+ * or as a word.  
+ *
+ * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  
 * word (offset 0) within the quadword.
 *
 * This definition of the VMX state is compatible with the current PPC32 
@@ -138,7 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 */
 typedef __vector128 elf_vrreg_t;
 typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
+#ifdef __powerpc64__
 typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
+#endif
 /*
 * This is used to ensure we don't load something for the wrong architecture.
@@ -146,7 +163,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
 #define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE       4096
+#define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
   use of this is to invoke "./ld.so someprog" to test out a new version of
@@ -158,26 +175,30 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 #ifdef __KERNEL__
 /* Common routine for both 32-bit and 64-bit processes */
-static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs,
+static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
                                            struct pt_regs *regs)
 {
        int i;
-        int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64);
+        int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
        if (gprs > ELF_NGREG)
                gprs = ELF_NGREG;
        for (i=0; i < gprs; i++)
-                elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i];
+                elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
+        memset((char *)(elf_regs) + sizeof(struct pt_regs), 0,          \
+               sizeof(elf_gregset_t) - sizeof(struct pt_regs));
 }
-#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs);
+#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
 static inline int dump_task_regs(struct task_struct *tsk,
                                 elf_gregset_t *elf_regs)
 {
        struct pt_regs *regs = tsk->thread.regs;
        if (regs)
-                ppc64_elf_core_copy_regs(*elf_regs, regs);
+                ppc_elf_core_copy_regs(*elf_regs, regs);
        return 1;
 }
@@ -186,15 +207,21 @@ static inline int dump_task_regs(struct task_struct *tsk,
 extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 
 #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
-/* XXX Should we define the XFPREGS using altivec ??? */
+#endif /* __KERNEL__ */
-#endif
-/* This yields a mask that user programs can use to figure out what
+/* ELF_HWCAP yields a mask that user programs can use to figure out what
   instruction set this cpu supports.  This could be done in userspace,
   but it's not easy, and we've already done it here.  */
+#ifdef __powerpc64__
-#define ELF_HWCAP       (cur_cpu_spec->cpu_user_features)
+# define ELF_HWCAP      (cur_cpu_spec->cpu_user_features)
+# define ELF_PLAT_INIT(_r, load_addr)   do { \
+        memset(_r->gpr, 0, sizeof(_r->gpr)); \
+        _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
+        _r->gpr[2] = load_addr; \
+} while (0)
+#else
+# define ELF_HWCAP      (cur_cpu_spec[0]->cpu_user_features)
+#endif /* __powerpc64__ */
 /* This yields a string that ld.so will use to load implementation
   specific libraries for optimization.  This is more specific in
@@ -205,14 +232,10 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
 #define ELF_PLATFORM    (NULL)
-#define ELF_PLAT_INIT(_r, load_addr)    do { \
-        memset(_r->gpr, 0, sizeof(_r->gpr)); \
-        _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
-        _r->gpr[2] = load_addr; \
-} while (0)
 #ifdef __KERNEL__
-#define SET_PERSONALITY(ex, ibcs2)                              \
+#ifdef __powerpc64__
+# define SET_PERSONALITY(ex, ibcs2)                             \
 do {                                                            \
        unsigned long new_flags = 0;                            \
        if ((ex).e_ident[EI_CLASS] == ELFCLASS32)               \
@@ -225,7 +248,6 @@ do {								\
        if (personality(current->personality) != PER_LINUX32)   \
                set_personality(PER_LINUX);                     \
 } while (0)
 /*
 * An executable for which elf_read_implies_exec() returns TRUE will
 * have the READ_IMPLIES_EXEC personality flag set automatically. This
@@ -233,19 +255,26 @@ do {								\
 * the 64bit ABI has never had these issues dont enable the workaround
 * even if we have an executable stack.
 */
-#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
+# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
                (exec_stk != EXSTACK_DISABLE_X) : 0)
+#else 
+# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
+#endif /* __powerpc64__ */
-#endif
+#endif /* __KERNEL__ */
 extern int dcache_bsize;
 extern int icache_bsize;
 extern int ucache_bsize;
-/* We do have an arch_setup_additional_pages for vDSO matters */
+#ifdef __powerpc64__
-#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 struct linux_binprm;
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
 extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
+#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
+#else
+#define VDSO_AUX_ENT(a,b)
+#endif /* __powerpc64__ */
 /*
 * The requirements here are:
@@ -265,9 +294,8 @@ do {									\
        NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
        NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
        NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
-        /* vDSO base */                                                 \
+        VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base)        \
-        NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base);        \
+} while (0)
- } while (0)
 /* PowerPC64 relocations defined by the ABIs */
 #define R_PPC64_NONE    R_PPC_NONE
@@ -384,4 +412,4 @@ do {									\
 /* Keep this the last entry.  */
 #define R_PPC64_NUM             107
-#endif /* __PPC64_ELF_H */
+#endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-ppc/hardirq.h b/include/asm-powerpc/hardirq.h
index 94f1411b1a93..2c0a31b1008d 100644
--- a/include/asm-ppc/hardirq.h
+++ b/include/asm-powerpc/hardirq.h
@@ -1,11 +1,5 @@
-#ifdef __KERNEL__
+#ifndef _ASM_POWERPC_HARDIRQ_H
-#ifndef __ASM_HARDIRQ_H
+#define _ASM_POWERPC_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/smp_lock.h>
-#include <asm/irq.h>
 /* The __last_jiffy_stamp field is needed to ensure that no decrementer
 * interrupt is lost on SMP machines. Since on most CPUs it is in the same
@@ -13,7 +7,7 @@
 * for uniformity.
 */
 typedef struct {
-        unsigned long __softirq_pending;        /* set_bit is used on this */
+        unsigned int __softirq_pending; /* set_bit is used on this */
        unsigned int __last_jiffy_stamp;
 } ____cacheline_aligned irq_cpustat_t;
@@ -27,5 +21,4 @@ static inline void ack_bad_irq(int irq)
        BUG();
 }
-#endif /* __ASM_HARDIRQ_H */
+#endif /* _ASM_POWERPC_HARDIRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/hw_irq.h b/include/asm-powerpc/hw_irq.h
index baea40e695ec..605a65e42063 100644
--- a/include/asm-ppc64/hw_irq.h
+++ b/include/asm-powerpc/hw_irq.h
@@ -1,22 +1,18 @@
 /*
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- *
- * Use inline IRQs where possible - Anton Blanchard <anton@au.ibm.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
 */
+#ifndef _ASM_POWERPC_HW_IRQ_H
+#define _ASM_POWERPC_HW_IRQ_H
 #ifdef __KERNEL__
-#ifndef _PPC64_HW_IRQ_H
-#define _PPC64_HW_IRQ_H
 #include <linux/config.h>
 #include <linux/errno.h>
+#include <asm/ptrace.h>
+#include <asm/processor.h>
 #include <asm/irq.h>
-int timer_interrupt(struct pt_regs *);
+extern void timer_interrupt(struct pt_regs *);
 extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
 #ifdef CONFIG_PPC_ISERIES
@@ -33,45 +29,60 @@ extern void local_irq_restore(unsigned long);
 #else
-#define local_save_flags(flags) ((flags) = mfmsr())
+#if defined(CONFIG_BOOKE)
+#define SET_MSR_EE(x)   mtmsr(x)
+#define local_irq_restore(flags)        __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
+#elif defined(__powerpc64__)
+#define SET_MSR_EE(x)   __mtmsrd(x, 1)
 #define local_irq_restore(flags) do { \
        __asm__ __volatile__("": : :"memory"); \
        __mtmsrd((flags), 1); \
 } while(0)
+#else
+#define SET_MSR_EE(x)   mtmsr(x)
+#define local_irq_restore(flags)        mtmsr(flags)
+#endif
 static inline void local_irq_disable(void)
 {
+#ifdef CONFIG_BOOKE
+        __asm__ __volatile__("wrteei 0": : :"memory");
+#else
        unsigned long msr;
-        msr = mfmsr();
-        __mtmsrd(msr & ~MSR_EE, 1);
        __asm__ __volatile__("": : :"memory");
+        msr = mfmsr();
+        SET_MSR_EE(msr & ~MSR_EE);
+#endif
 }
 static inline void local_irq_enable(void)
 {
+#ifdef CONFIG_BOOKE
+        __asm__ __volatile__("wrteei 1": : :"memory");
+#else
        unsigned long msr;
        __asm__ __volatile__("": : :"memory");
        msr = mfmsr();
-        __mtmsrd(msr | MSR_EE, 1);
+        SET_MSR_EE(msr | MSR_EE);
+#endif
 }
-static inline void __do_save_and_cli(unsigned long *flags)
+static inline void local_irq_save_ptr(unsigned long *flags)
 {
        unsigned long msr;
        msr = mfmsr();
        *flags = msr;
-        __mtmsrd(msr & ~MSR_EE, 1);
+#ifdef CONFIG_BOOKE
+        __asm__ __volatile__("wrteei 0": : :"memory");
+#else
+        SET_MSR_EE(msr & ~MSR_EE);
+#endif
        __asm__ __volatile__("": : :"memory");
 }
-#define local_irq_save(flags)          __do_save_and_cli(&flags)
+#define local_save_flags(flags) ((flags) = mfmsr())
+#define local_irq_save(flags)   local_irq_save_ptr(&flags)
-#define irqs_disabled()                         \
+#define irqs_disabled()         ((mfmsr() & MSR_EE) == 0)
-({                                              \
-        unsigned long flags;                    \
-        local_save_flags(flags);                \
-        !(flags & MSR_EE);                      \
-})
 #endif /* CONFIG_PPC_ISERIES */
@@ -99,6 +110,6 @@ static inline void __do_save_and_cli(unsigned long *flags)
 */
 struct hw_interrupt_type;
 static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
- 
-#endif /* _PPC64_HW_IRQ_H */
+#endif  /* __KERNEL__ */
-#endif /* __KERNEL__ */
+#endif  /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/include/asm-powerpc/kmap_types.h b/include/asm-powerpc/kmap_types.h
new file mode 100644
index 000000000000..b6bac6f61c16
--- /dev/null
+++ b/include/asm-powerpc/kmap_types.h
@@ -0,0 +1,33 @@
+#ifndef _ASM_POWERPC_KMAP_TYPES_H
+#define _ASM_POWERPC_KMAP_TYPES_H
+#ifdef __KERNEL__
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+enum km_type {
+        KM_BOUNCE_READ,
+        KM_SKB_SUNRPC_DATA,
+        KM_SKB_DATA_SOFTIRQ,
+        KM_USER0,
+        KM_USER1,
+        KM_BIO_SRC_IRQ,
+        KM_BIO_DST_IRQ,
+        KM_PTE0,
+        KM_PTE1,
+        KM_IRQ0,
+        KM_IRQ1,
+        KM_SOFTIRQ0,
+        KM_SOFTIRQ1,
+        KM_PPC_SYNC_PAGE,
+        KM_PPC_SYNC_ICACHE,
+        KM_TYPE_NR
+};
+#endif  /* __KERNEL__ */
+#endif  /* _ASM_POWERPC_KMAP_TYPES_H */
diff --git a/include/asm-ppc64/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index b04f1dfb1421..8013cd273ced 100644
--- a/include/asm-ppc64/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -9,39 +9,49 @@
 * 2 of the License, or (at your option) any later version.
 */
-#ifndef OP_IMPL_H
+#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
-#define OP_IMPL_H 1
+#define _ASM_POWERPC_OPROFILE_IMPL_H
 #define OP_MAX_COUNTER 8
 /* Per-counter configuration as set via oprofilefs.  */
 struct op_counter_config {
+#ifdef __powerpc64__
        unsigned long valid;
+#endif
        unsigned long enabled;
        unsigned long event;
        unsigned long count;
        unsigned long kernel;
+#ifdef __powerpc64__
        /* We dont support per counter user/kernel selection */
+#endif
        unsigned long user;
        unsigned long unit_mask;
 };
 /* System-wide configuration as set via oprofilefs.  */
 struct op_system_config {
+#ifdef __powerpc64__
        unsigned long mmcr0;
        unsigned long mmcr1;
        unsigned long mmcra;
+#endif
        unsigned long enable_kernel;
        unsigned long enable_user;
+#ifdef __powerpc64__
        unsigned long backtrace_spinlocks;
+#endif
 };
 /* Per-arch configuration */
-struct op_ppc64_model {
+struct op_powerpc_model {
        void (*reg_setup) (struct op_counter_config *,
                           struct op_system_config *,
                           int num_counters);
+#ifdef __powerpc64__
        void (*cpu_setup) (void *);
+#endif
        void (*start) (struct op_counter_config *);
        void (*stop) (void);
        void (*handle_interrupt) (struct pt_regs *,
@@ -49,8 +59,9 @@ struct op_ppc64_model {
        int num_counters;
 };
-extern struct op_ppc64_model op_model_rs64;
+#ifdef __powerpc64__
-extern struct op_ppc64_model op_model_power4;
+extern struct op_powerpc_model op_model_rs64;
+extern struct op_powerpc_model op_model_power4;
 static inline unsigned int ctr_read(unsigned int i)
 {
@@ -107,5 +118,6 @@ static inline void ctr_write(unsigned int i, unsigned int val)
                break;
        }
 }
+#endif /* __powerpc64__ */
-#endif
+#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
diff --git a/include/asm-ppc64/posix_types.h b/include/asm-powerpc/posix_types.h
index 516de7201b5d..c6391077224f 100644
--- a/include/asm-ppc64/posix_types.h
+++ b/include/asm-powerpc/posix_types.h
@@ -1,44 +1,54 @@
-#ifndef _PPC64_POSIX_TYPES_H
+#ifndef _ASM_POWERPC_POSIX_TYPES_H
-#define _PPC64_POSIX_TYPES_H
+#define _ASM_POWERPC_POSIX_TYPES_H
 /*
 * This file is generally used by user-level software, so you need to
 * be a little careful about namespace pollution etc.  Also, we cannot
 * assume GCC is being used.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
 */
 typedef unsigned long   __kernel_ino_t;
-typedef unsigned long   __kernel_nlink_t;
 typedef unsigned int    __kernel_mode_t;
 typedef long            __kernel_off_t;
-typedef long long       __kernel_loff_t;
 typedef int             __kernel_pid_t;
-typedef int             __kernel_ipc_pid_t;
 typedef unsigned int    __kernel_uid_t;
 typedef unsigned int    __kernel_gid_t;
-typedef unsigned long   __kernel_size_t;
-typedef long            __kernel_ssize_t;
 typedef long            __kernel_ptrdiff_t;
 typedef long            __kernel_time_t;
+typedef long            __kernel_clock_t;
 typedef int             __kernel_timer_t;
 typedef int             __kernel_clockid_t;
 typedef long            __kernel_suseconds_t;
-typedef long            __kernel_clock_t;
 typedef int             __kernel_daddr_t;
 typedef char *          __kernel_caddr_t;
 typedef unsigned short  __kernel_uid16_t;
 typedef unsigned short  __kernel_gid16_t;
 typedef unsigned int    __kernel_uid32_t;
 typedef unsigned int    __kernel_gid32_t;
 typedef unsigned int    __kernel_old_uid_t;
 typedef unsigned int    __kernel_old_gid_t;
+#ifdef __powerpc64__
+typedef unsigned long   __kernel_nlink_t;
+typedef int             __kernel_ipc_pid_t;
+typedef unsigned long   __kernel_size_t;
+typedef long            __kernel_ssize_t;
 typedef unsigned long   __kernel_old_dev_t;
+#else
+typedef unsigned short  __kernel_nlink_t;
+typedef short           __kernel_ipc_pid_t;
+typedef unsigned int    __kernel_size_t;
+typedef int             __kernel_ssize_t;
+typedef unsigned int    __kernel_old_dev_t;
+#endif
+#ifdef __powerpc64__
+typedef long long       __kernel_loff_t;
+#else
+#ifdef __GNUC__
+typedef long long       __kernel_loff_t;
+#endif
+#endif
 typedef struct {
        int     val[2];
@@ -116,4 +126,4 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p)
 #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
 #endif /* __GNUC__ */
-#endif /* _PPC64_POSIX_TYPES_H */
+#endif /* _ASM_POWERPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index bb53e2def363..4efa71878fa9 100644
--- a/include/asm-ppc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -1,38 +1,40 @@
 /*
- * include/asm-ppc/ppc_asm.h
- *
- * Definitions used by various bits of low-level assembly code on PowerPC.
- *
 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
 */
-#include <linux/config.h>
+#ifndef _ASM_POWERPC_PPC_ASM_H
+#define _ASM_POWERPC_PPC_ASM_H
+#ifdef __ASSEMBLY__
 /*
 * Macros for storing registers into and loading registers from
 * exception frames.
 */
+#ifdef __powerpc64__
+#define SAVE_GPR(n, base)       std     n,GPR0+8*(n)(base)
+#define REST_GPR(n, base)       ld      n,GPR0+8*(n)(base)
+#define SAVE_NVGPRS(base)       SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
+#define REST_NVGPRS(base)       REST_8GPRS(14, base); REST_10GPRS(22, base)
+#else
 #define SAVE_GPR(n, base)       stw     n,GPR0+4*(n)(base)
+#define REST_GPR(n, base)       lwz     n,GPR0+4*(n)(base)
+#define SAVE_NVGPRS(base)       SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
+                                SAVE_10GPRS(22, base)
+#define REST_NVGPRS(base)       REST_GPR(13, base); REST_8GPRS(14, base); \
+                                REST_10GPRS(22, base)
+#endif
 #define SAVE_2GPRS(n, base)     SAVE_GPR(n, base); SAVE_GPR(n+1, base)
 #define SAVE_4GPRS(n, base)     SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
 #define SAVE_8GPRS(n, base)     SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
 #define SAVE_10GPRS(n, base)    SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
-#define REST_GPR(n, base)       lwz     n,GPR0+4*(n)(base)
 #define REST_2GPRS(n, base)     REST_GPR(n, base); REST_GPR(n+1, base)
 #define REST_4GPRS(n, base)     REST_2GPRS(n, base); REST_2GPRS(n+2, base)
 #define REST_8GPRS(n, base)     REST_4GPRS(n, base); REST_4GPRS(n+4, base)
 #define REST_10GPRS(n, base)    REST_8GPRS(n, base); REST_2GPRS(n+8, base)
-#define SAVE_NVGPRS(base)       SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
-                                SAVE_10GPRS(22, base)
-#define REST_NVGPRS(base)       REST_GPR(13, base); REST_8GPRS(14, base); \
-                                REST_10GPRS(22, base)
 #define SAVE_FPR(n, base)       stfd    n,THREAD_FPR0+8*(n)(base)
 #define SAVE_2FPRS(n, base)     SAVE_FPR(n, base); SAVE_FPR(n+1, base)
 #define SAVE_4FPRS(n, base)     SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
@@ -47,32 +49,83 @@
 #define REST_32FPRS(n, base)    REST_16FPRS(n, base); REST_16FPRS(n+16, base)
 #define SAVE_VR(n,b,base)       li b,THREAD_VR0+(16*(n));  stvx n,b,base
-#define SAVE_2VR(n,b,base)      SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
+#define SAVE_2VRS(n,b,base)     SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
-#define SAVE_4VR(n,b,base)      SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
+#define SAVE_4VRS(n,b,base)     SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
-#define SAVE_8VR(n,b,base)      SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
+#define SAVE_8VRS(n,b,base)     SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
-#define SAVE_16VR(n,b,base)     SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
+#define SAVE_16VRS(n,b,base)    SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
-#define SAVE_32VR(n,b,base)     SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
+#define SAVE_32VRS(n,b,base)    SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
 #define REST_VR(n,b,base)       li b,THREAD_VR0+(16*(n)); lvx n,b,base
-#define REST_2VR(n,b,base)      REST_VR(n,b,base); REST_VR(n+1,b,base)
+#define REST_2VRS(n,b,base)     REST_VR(n,b,base); REST_VR(n+1,b,base)
-#define REST_4VR(n,b,base)      REST_2VR(n,b,base); REST_2VR(n+2,b,base)
+#define REST_4VRS(n,b,base)     REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
-#define REST_8VR(n,b,base)      REST_4VR(n,b,base); REST_4VR(n+4,b,base)
+#define REST_8VRS(n,b,base)     REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
-#define REST_16VR(n,b,base)     REST_8VR(n,b,base); REST_8VR(n+8,b,base)
+#define REST_16VRS(n,b,base)    REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
-#define REST_32VR(n,b,base)     REST_16VR(n,b,base); REST_16VR(n+16,b,base)
+#define REST_32VRS(n,b,base)    REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
 #define SAVE_EVR(n,s,base)      evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
-#define SAVE_2EVR(n,s,base)     SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
+#define SAVE_2EVRS(n,s,base)    SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
-#define SAVE_4EVR(n,s,base)     SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base)
+#define SAVE_4EVRS(n,s,base)    SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
-#define SAVE_8EVR(n,s,base)     SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base)
+#define SAVE_8EVRS(n,s,base)    SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
-#define SAVE_16EVR(n,s,base)    SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base)
+#define SAVE_16EVRS(n,s,base)   SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
-#define SAVE_32EVR(n,s,base)    SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base)
+#define SAVE_32EVRS(n,s,base)   SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
 #define REST_EVR(n,s,base)      lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
-#define REST_2EVR(n,s,base)     REST_EVR(n,s,base); REST_EVR(n+1,s,base)
+#define REST_2EVRS(n,s,base)    REST_EVR(n,s,base); REST_EVR(n+1,s,base)
-#define REST_4EVR(n,s,base)     REST_2EVR(n,s,base); REST_2EVR(n+2,s,base)
+#define REST_4EVRS(n,s,base)    REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
-#define REST_8EVR(n,s,base)     REST_4EVR(n,s,base); REST_4EVR(n+4,s,base)
+#define REST_8EVRS(n,s,base)    REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
-#define REST_16EVR(n,s,base)    REST_8EVR(n,s,base); REST_8EVR(n+8,s,base)
+#define REST_16EVRS(n,s,base)   REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
-#define REST_32EVR(n,s,base)    REST_16EVR(n,s,base); REST_16EVR(n+16,s,base)
+#define REST_32EVRS(n,s,base)   REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
+/* Macros to adjust thread priority for Iseries hardware multithreading */
+#define HMT_VERY_LOW    or   31,31,31   # very low priority\n"
+#define HMT_LOW         or 1,1,1
+#define HMT_MEDIUM_LOW  or   6,6,6      # medium low priority\n"
+#define HMT_MEDIUM      or 2,2,2
+#define HMT_MEDIUM_HIGH or   5,5,5      # medium high priority\n"
+#define HMT_HIGH        or 3,3,3
+/* handle instructions that older assemblers may not know */
+#define RFCI            .long 0x4c000066        /* rfci instruction */
+#define RFDI            .long 0x4c00004e        /* rfdi instruction */
+#define RFMCI           .long 0x4c00004c        /* rfmci instruction */
+/* 
+ * LOADADDR( rn, name )
+ *   loads the address of 'name' into 'rn'
+ *
+ * LOADBASE( rn, name )
+ *   loads the address (less the low 16 bits) of 'name' into 'rn'
+ *   suitable for base+disp addressing
+ */
+#ifdef __powerpc64__
+#define LOADADDR(rn,name) \
+        lis     rn,name##@highest;      \
+        ori     rn,rn,name##@higher;    \
+        rldicr  rn,rn,32,31;            \
+        oris    rn,rn,name##@h;         \
+        ori     rn,rn,name##@l
+#define LOADBASE(rn,name) \
+        lis     rn,name@highest;        \
+        ori     rn,rn,name@higher;      \
+        rldicr  rn,rn,32,31;            \
+        oris    rn,rn,name@ha
+#define SET_REG_TO_CONST(reg, value)                    \
+        lis     reg,(((value)>>48)&0xFFFF);             \
+        ori     reg,reg,(((value)>>32)&0xFFFF);         \
+        rldicr  reg,reg,32,31;                          \
+        oris    reg,reg,(((value)>>16)&0xFFFF);         \
+        ori     reg,reg,((value)&0xFFFF);
+#define SET_REG_TO_LABEL(reg, label)                    \
+        lis     reg,(label)@highest;                    \
+        ori     reg,reg,(label)@higher;                 \
+        rldicr  reg,reg,32,31;                          \
+        oris    reg,reg,(label)@h;                      \
+        ori     reg,reg,(label)@l;
+#endif
+/* various errata or part fixups */
 #ifdef CONFIG_PPC601_SYNC_FIX
 #define SYNC                            \
 BEGIN_FTR_SECTION                       \
@@ -93,6 +146,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
 #define ISYNC_601
 #endif
 #ifndef CONFIG_SMP
 #define TLBSYNC
 #else /* CONFIG_SMP */
@@ -104,6 +158,7 @@ BEGIN_FTR_SECTION			\
 END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #endif
+        
 /*
 * This instruction is not implemented on the PPC 603 or 601; however, on
 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
@@ -121,14 +176,44 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
        bdnz    0b
 #endif
-#ifdef CONFIG_BOOKE
+#ifdef CONFIG_IBM405_ERR77
+#define PPC405_ERR77(ra,rb)     dcbt    ra, rb;
+#define PPC405_ERR77_SYNC       sync;
+#else
+#define PPC405_ERR77(ra,rb)
+#define PPC405_ERR77_SYNC
+#endif
+#ifdef CONFIG_IBM440EP_ERR42
+#define PPC440EP_ERR42 isync
+#else
+#define PPC440EP_ERR42
+#endif
+#if defined(CONFIG_BOOKE)
 #define tophys(rd,rs)                           \
        addis   rd,rs,0
 #define tovirt(rd,rs)                           \
        addis   rd,rs,0
-#else  /* CONFIG_BOOKE */
+#elif defined(CONFIG_PPC64)
+/* PPPBBB - DRENG  If KERNELBASE is always 0xC0...,
+ * Then we can easily do this with one asm insn. -Peter
+ */
+#define tophys(rd,rs)                           \
+        lis     rd,((KERNELBASE>>48)&0xFFFF);   \
+        rldicr  rd,rd,32,31;                    \
+        sub     rd,rs,rd
+#define tovirt(rd,rs)                           \
+        lis     rd,((KERNELBASE>>48)&0xFFFF);   \
+        rldicr  rd,rd,32,31;                    \
+        add     rd,rs,rd
+#else
 /*
 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
 * physical base address of RAM at compile time.
@@ -146,14 +231,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
        .align  1;                              \
        .long   0b;                             \
        .previous
-#endif  /* CONFIG_BOOKE */
+#endif
 /*
 * On 64-bit cpus, we use the rfid instruction instead of rfi, but
 * we then have to make sure we preserve the top 32 bits except for
 * the 64-bit mode bit, which we clear.
 */
-#ifdef CONFIG_PPC64BRIDGE
+#if defined(CONFIG_PPC64BRIDGE)
 #define FIX_SRR1(ra, rb)        \
        mr      rb,ra;          \
        mfmsr   ra;             \
@@ -162,6 +247,17 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define RFI             .long   0x4c000024      /* rfid instruction */
 #define MTMSRD(r)       .long   (0x7c000164 + ((r) << 21))      /* mtmsrd */
 #define CLR_TOP32(r)    rlwinm  (r),(r),0,0,31  /* clear top 32 bits */
+#elif defined(CONFIG_PPC64)
+/* Insert the high 32 bits of the MSR into what will be the new
+   MSR (via SRR1 and rfid)  This preserves the MSR.SF and MSR.ISF
+   bits. */
+#define FIX_SRR1(ra, rb)        \
+        mr      rb,ra;          \
+        mfmsr   ra;             \
+        rldimi  ra,rb,0,32
+#define CLR_TOP32(r)    rlwinm  (r),(r),0,0,31  /* clear top 32 bits */
 #else
 #define FIX_SRR1(ra, rb)
@@ -172,24 +268,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #endif
 #define MTMSRD(r)       mtmsr   r
 #define CLR_TOP32(r)
-#endif /* CONFIG_PPC64BRIDGE */
-#define RFCI            .long 0x4c000066        /* rfci instruction */
-#define RFDI            .long 0x4c00004e        /* rfdi instruction */
-#define RFMCI           .long 0x4c00004c        /* rfmci instruction */
-#ifdef CONFIG_IBM405_ERR77
-#define PPC405_ERR77(ra,rb)     dcbt    ra, rb;
-#define PPC405_ERR77_SYNC       sync;
-#else
-#define PPC405_ERR77(ra,rb)
-#define PPC405_ERR77_SYNC
-#endif
-#ifdef CONFIG_IBM440EP_ERR42
-#define PPC440EP_ERR42 isync
-#else
-#define PPC440EP_ERR42
 #endif
 /* The boring bits... */
@@ -277,6 +355,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define fr30    30
 #define fr31    31
+/* AltiVec Registers (VPRs) */
 #define vr0     0
 #define vr1     1
 #define vr2     2
@@ -310,6 +390,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define vr30    30
 #define vr31    31
+/* SPE Registers (EVPRs) */
 #define evr0    0
 #define evr1    1
 #define evr2    2
@@ -348,3 +430,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define N_RSYM  64
 #define N_SLINE 68
 #define N_SO    100
+#define ASM_CONST(x) x
+#else
+  #define __ASM_CONST(x) x##UL
+  #define ASM_CONST(x) __ASM_CONST(x)
+#endif /*  __ASSEMBLY__ */
+#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/include/asm-ppc64/rwsem.h b/include/asm-powerpc/rwsem.h
index bd5c2f093575..0a5b83a3c949 100644
--- a/include/asm-ppc64/rwsem.h
+++ b/include/asm-powerpc/rwsem.h
@@ -1,18 +1,14 @@
+#ifndef _ASM_POWERPC_RWSEM_H
+#define _ASM_POWERPC_RWSEM_H
+#ifdef __KERNEL__
 /*
 * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff
 * in lib/rwsem.c.  Adapted largely from include/asm-i386/rwsem.h
 * by Paul Mackerras <paulus@samba.org>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
 */
-#ifndef _PPC64_RWSEM_H
-#define _PPC64_RWSEM_H
-#ifdef __KERNEL__
 #include <linux/list.h>
 #include <linux/spinlock.h>
 #include <asm/atomic.h>
@@ -163,5 +159,5 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
        return atomic_add_return(delta, (atomic_t *)(&sem->count));
 }
-#endif /* __KERNEL__ */
+#endif  /* __KERNEL__ */
-#endif /* _PPC_RWSEM_XADD_H */
+#endif  /* _ASM_POWERPC_RWSEM_H */
diff --git a/include/asm-ppc64/seccomp.h b/include/asm-powerpc/seccomp.h
index c130c334bda1..1e1cfe12882b 100644
--- a/include/asm-ppc64/seccomp.h
+++ b/include/asm-powerpc/seccomp.h
@@ -1,11 +1,6 @@
-#ifndef _ASM_SECCOMP_H
+#ifndef _ASM_POWERPC_SECCOMP_H
-#include <linux/thread_info.h> /* already defines TIF_32BIT */
-#ifndef TIF_32BIT
-#error "unexpected TIF_32BIT on ppc64"
-#endif
+#include <linux/thread_info.h>
 #include <linux/unistd.h>
 #define __NR_seccomp_read __NR_read
@@ -18,4 +13,4 @@
 #define __NR_seccomp_exit_32 __NR_exit
 #define __NR_seccomp_sigreturn_32 __NR_sigreturn
-#endif /* _ASM_SECCOMP_H */
+#endif  /* _ASM_POWERPC_SECCOMP_H */
diff --git a/include/asm-ppc64/sections.h b/include/asm-powerpc/sections.h
index 308ca6f5ced2..47be2ac2a925 100644
--- a/include/asm-ppc64/sections.h
+++ b/include/asm-powerpc/sections.h
@@ -1,22 +1,11 @@
-#ifndef _PPC64_SECTIONS_H
+#ifndef _ASM_POWERPC_SECTIONS_H
-#define _PPC64_SECTIONS_H
+#define _ASM_POWERPC_SECTIONS_H
-extern char _end[];
 #include <asm-generic/sections.h>
-#define __pmac
+#ifdef __powerpc64__
-#define __pmacdata
-#define __prep
-#define __prepdata
-#define __chrp
-#define __chrpdata
-#define __openfirmware
-#define __openfirmwaredata
+extern char _end[];
 static inline int in_kernel_text(unsigned long addr)
 {
@@ -27,3 +16,5 @@ static inline int in_kernel_text(unsigned long addr)
 }
 #endif
+#endif  /* _ASM_POWERPC_SECTIONS_H */
diff --git a/include/asm-ppc64/semaphore.h b/include/asm-powerpc/semaphore.h
index aefe7753ea41..fd42fe97158f 100644
--- a/include/asm-ppc64/semaphore.h
+++ b/include/asm-powerpc/semaphore.h
@@ -1,5 +1,5 @@
-#ifndef _PPC64_SEMAPHORE_H
+#ifndef _ASM_POWERPC_SEMAPHORE_H
-#define _PPC64_SEMAPHORE_H
+#define _ASM_POWERPC_SEMAPHORE_H
 /*
 * Remove spinlock-based RW semaphores; RW semaphore definitions are
@@ -95,4 +95,4 @@ static inline void up(struct semaphore * sem)
 #endif /* __KERNEL__ */
-#endif /* !(_PPC64_SEMAPHORE_H) */
+#endif /* _ASM_POWERPC_SEMAPHORE_H */
diff --git a/include/asm-ppc64/spinlock_types.h b/include/asm-powerpc/spinlock_types.h
index a37c8eabb9f2..74236c9f05b1 100644
--- a/include/asm-ppc64/spinlock_types.h
+++ b/include/asm-powerpc/spinlock_types.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_SPINLOCK_TYPES_H
+#ifndef _ASM_POWERPC_SPINLOCK_TYPES_H
-#define __ASM_SPINLOCK_TYPES_H
+#define _ASM_POWERPC_SPINLOCK_TYPES_H
 #ifndef __LINUX_SPINLOCK_TYPES_H
 # error "please don't include this file directly"
diff --git a/include/asm-ppc64/statfs.h b/include/asm-powerpc/statfs.h
index 3c985e5246a7..67024026c10d 100644
--- a/include/asm-ppc64/statfs.h
+++ b/include/asm-powerpc/statfs.h
@@ -1,12 +1,11 @@
-#ifndef _PPC64_STATFS_H
+#ifndef _ASM_POWERPC_STATFS_H
-#define _PPC64_STATFS_H
+#define _ASM_POWERPC_STATFS_H
-/*
+/* For ppc32 we just use the generic definitions, not so simple on ppc64 */
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
+#ifndef __powerpc64__
- * as published by the Free Software Foundation; either version
+#include <asm-generic/statfs.h>
- * 2 of the License, or (at your option) any later version.
+#else
- */
 #ifndef __KERNEL_STRICT_NAMES
 #include <linux/types.h>
@@ -57,5 +56,5 @@ struct compat_statfs64 {
        __u32 f_frsize;
        __u32 f_spare[5];
 };
+#endif /* ! __powerpc64__ */
-#endif  /* _PPC64_STATFS_H */
+#endif
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
new file mode 100644
index 000000000000..4660c0394a77
--- /dev/null
+++ b/include/asm-powerpc/synch.h
@@ -0,0 +1,51 @@
+#ifndef _ASM_POWERPC_SYNCH_H 
+#define _ASM_POWERPC_SYNCH_H 
+#include <linux/config.h>
+#ifdef __powerpc64__
+#define __SUBARCH_HAS_LWSYNC
+#endif
+#ifdef __SUBARCH_HAS_LWSYNC
+#    define LWSYNC      lwsync
+#else
+#    define LWSYNC      sync
+#endif
+/*
+ * Arguably the bitops and *xchg operations don't imply any memory barrier
+ * or SMP ordering, but in fact a lot of drivers expect them to imply
+ * both, since they do on x86 cpus.
+ */
+#ifdef CONFIG_SMP
+#define EIEIO_ON_SMP    "eieio\n"
+#define ISYNC_ON_SMP    "\n\tisync"
+#define SYNC_ON_SMP     __stringify(LWSYNC) "\n"
+#else
+#define EIEIO_ON_SMP
+#define ISYNC_ON_SMP
+#define SYNC_ON_SMP
+#endif
+static inline void eieio(void)
+{
+        __asm__ __volatile__ ("eieio" : : : "memory");
+}
+static inline void isync(void)
+{
+        __asm__ __volatile__ ("isync" : : : "memory");
+}
+#ifdef CONFIG_SMP
+#define eieio_on_smp()  eieio()
+#define isync_on_smp()  isync()
+#else
+#define eieio_on_smp()  __asm__ __volatile__("": : :"memory")
+#define isync_on_smp()  __asm__ __volatile__("": : :"memory")
+#endif
+#endif  /* _ASM_POWERPC_SYNCH_H */
diff --git a/include/asm-ppc64/vga.h b/include/asm-powerpc/vga.h
index c09849743f45..f8d350aabf1a 100644
--- a/include/asm-ppc64/vga.h
+++ b/include/asm-powerpc/vga.h
@@ -1,16 +1,14 @@
+#ifndef _ASM_POWERPC_VGA_H_
+#define _ASM_POWERPC_VGA_H_
+#ifdef __KERNEL__
 /*
 *      Access to VGA videoram
 *
 *      (c) 1998 Martin Mares <mj@ucw.cz>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
 */
-#ifndef _LINUX_ASM_VGA_H_
-#define _LINUX_ASM_VGA_H_
 #include <asm/io.h>
@@ -42,9 +40,15 @@ static inline u16 scr_readw(volatile const u16 *addr)
 #endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
 extern unsigned long vgacon_remap_base;
+#ifdef __powerpc64__
 #define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0))
+#else
+#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
+#endif
 #define vga_readb(x) (*(x))
 #define vga_writeb(x,y) (*(y) = (x))
-#endif
+#endif  /* __KERNEL__ */
+#endif  /* _ASM_POWERPC_VGA_H_ */
diff --git a/include/asm-ppc/a.out.h b/include/asm-ppc/a.out.h
deleted file mode 100644
index 8979a94c4a81..000000000000
--- a/include/asm-ppc/a.out.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __PPC_A_OUT_H__
-#define __PPC_A_OUT_H__
-/* grabbed from the intel stuff  */
-#define STACK_TOP TASK_SIZE
-struct exec
-{
-  unsigned long a_info;         /* Use macros N_MAGIC, etc for access */
-  unsigned a_text;              /* length of text, in bytes */
-  unsigned a_data;              /* length of data, in bytes */
-  unsigned a_bss;               /* length of uninitialized data area for file, in bytes */
-  unsigned a_syms;              /* length of symbol table data in file, in bytes */
-  unsigned a_entry;             /* start address */
-  unsigned a_trsize;            /* length of relocation info for text, in bytes */
-  unsigned a_drsize;            /* length of relocation info for data, in bytes */
-};
-#define N_TRSIZE(a)     ((a).a_trsize)
-#define N_DRSIZE(a)     ((a).a_drsize)
-#define N_SYMSIZE(a)    ((a).a_syms)
-#endif
diff --git a/include/asm-ppc/auxvec.h b/include/asm-ppc/auxvec.h
deleted file mode 100644
index 172358df29c8..000000000000
--- a/include/asm-ppc/auxvec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __PPC_AUXVEC_H
-#define __PPC_AUXVEC_H
-/*
- * We need to put in some extra aux table entries to tell glibc what
- * the cache block size is, so it can use the dcbz instruction safely.
- */
-#define AT_DCACHEBSIZE          19
-#define AT_ICACHEBSIZE          20
-#define AT_UCACHEBSIZE          21
-/* A special ignored type value for PPC, for glibc compatibility.  */
-#define AT_IGNOREPPC            22
-#endif
diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h
deleted file mode 100644
index 8b34fd682b0d..000000000000
--- a/include/asm-ppc/bug.h
+++ /dev/null
@@ -1,58 +0,0 @@
-#ifndef _PPC_BUG_H
-#define _PPC_BUG_H
-struct bug_entry {
-        unsigned long   bug_addr;
-        int             line;
-        const char      *file;
-        const char      *function;
-};
-/*
- * If this bit is set in the line number it means that the trap
- * is for WARN_ON rather than BUG or BUG_ON.
- */
-#define BUG_WARNING_TRAP        0x1000000
-#ifdef CONFIG_BUG
-#define BUG() do {                                                       \
-        __asm__ __volatile__(                                            \
-                "1:     twi 31,0,0\n"                                    \
-                ".section __bug_table,\"a\"\n\t"                         \
-                "       .long 1b,%0,%1,%2\n"                             \
-                ".previous"                                              \
-                : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-#define BUG_ON(x) do {                                                  \
-        if (!__builtin_constant_p(x) || (x)) {                          \
-                __asm__ __volatile__(                                   \
-                        "1:     twnei %0,0\n"                           \
-                        ".section __bug_table,\"a\"\n\t"                \
-                        "       .long 1b,%1,%2,%3\n"                    \
-                        ".previous"                                     \
-                        : : "r" (x), "i" (__LINE__), "i" (__FILE__),    \
-                            "i" (__FUNCTION__));                        \
-        }                                                               \
-} while (0)
-#define WARN_ON(x) do {                                                 \
-        if (!__builtin_constant_p(x) || (x)) {                          \
-                __asm__ __volatile__(                                   \
-                        "1:     twnei %0,0\n"                           \
-                        ".section __bug_table,\"a\"\n\t"                \
-                        "       .long 1b,%1,%2,%3\n"                    \
-                        ".previous"                                     \
-                        : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \
-                            "i" (__FILE__), "i" (__FUNCTION__));        \
-        }                                                               \
-} while (0)
-#define HAVE_ARCH_BUG
-#define HAVE_ARCH_BUG_ON
-#define HAVE_ARCH_WARN_ON
-#endif
-#include <asm-generic/bug.h>
-#endif
diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h
deleted file mode 100644
index c25cc35e6ab5..000000000000
--- a/include/asm-ppc/elf.h
+++ /dev/null
@@ -1,151 +0,0 @@
-#ifndef __PPC_ELF_H
-#define __PPC_ELF_H
-/*
- * ELF register definitions..
- */
-#include <asm/types.h>
-#include <asm/ptrace.h>
-#include <asm/cputable.h>
-#include <asm/auxvec.h>
-/* PowerPC relocations defined by the ABIs */
-#define R_PPC_NONE              0
-#define R_PPC_ADDR32            1       /* 32bit absolute address */
-#define R_PPC_ADDR24            2       /* 26bit address, 2 bits ignored.  */
-#define R_PPC_ADDR16            3       /* 16bit absolute address */
-#define R_PPC_ADDR16_LO         4       /* lower 16bit of absolute address */
-#define R_PPC_ADDR16_HI         5       /* high 16bit of absolute address */
-#define R_PPC_ADDR16_HA         6       /* adjusted high 16bit */
-#define R_PPC_ADDR14            7       /* 16bit address, 2 bits ignored */
-#define R_PPC_ADDR14_BRTAKEN    8
-#define R_PPC_ADDR14_BRNTAKEN   9
-#define R_PPC_REL24             10      /* PC relative 26 bit */
-#define R_PPC_REL14             11      /* PC relative 16 bit */
-#define R_PPC_REL14_BRTAKEN     12
-#define R_PPC_REL14_BRNTAKEN    13
-#define R_PPC_GOT16             14
-#define R_PPC_GOT16_LO          15
-#define R_PPC_GOT16_HI          16
-#define R_PPC_GOT16_HA          17
-#define R_PPC_PLTREL24          18
-#define R_PPC_COPY              19
-#define R_PPC_GLOB_DAT          20
-#define R_PPC_JMP_SLOT          21
-#define R_PPC_RELATIVE          22
-#define R_PPC_LOCAL24PC         23
-#define R_PPC_UADDR32           24
-#define R_PPC_UADDR16           25
-#define R_PPC_REL32             26
-#define R_PPC_PLT32             27
-#define R_PPC_PLTREL32          28
-#define R_PPC_PLT16_LO          29
-#define R_PPC_PLT16_HI          30
-#define R_PPC_PLT16_HA          31
-#define R_PPC_SDAREL16          32
-#define R_PPC_SECTOFF           33
-#define R_PPC_SECTOFF_LO        34
-#define R_PPC_SECTOFF_HI        35
-#define R_PPC_SECTOFF_HA        36
-/* Keep this the last entry.  */
-#define R_PPC_NUM               37
-#define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
-#define ELF_NFPREG      33      /* includes fpscr */
-#define ELF_NVRREG      33      /* includes vscr */
-#define ELF_NEVRREG     34      /* includes acc (as 2) */
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH        EM_PPC
-#define ELF_CLASS       ELFCLASS32
-#define ELF_DATA        ELFDATA2MSB
-/* General registers */
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-/* Floating point registers */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-/* Altivec registers */
-typedef __vector128 elf_vrreg_t;
-typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
-#ifdef __KERNEL__
-struct task_struct;
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
-/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
-   use of this is to invoke "./ld.so someprog" to test out a new version of
-   the loader.  We need to make sure that it is out of the way of the program
-   that it will "exec", and that there is sufficient room for the brk.  */
-#define ELF_ET_DYN_BASE         (0x08000000)
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE       4096
-#define ELF_CORE_COPY_REGS(gregs, regs)                         \
-        memcpy((gregs), (regs), sizeof(struct pt_regs));        \
-        memset((char *)(gregs) + sizeof(struct pt_regs), 0,     \
-               sizeof(elf_gregset_t) - sizeof(struct pt_regs));
-#define ELF_CORE_COPY_TASK_REGS(t, elfregs)                     \
-        ((t)->thread.regs?                                      \
-         ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
-extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
-#define ELF_CORE_COPY_FPREGS(t, fpu)    dump_task_fpu((t), (fpu))
-/* This yields a mask that user programs can use to figure out what
-   instruction set this cpu supports.  This could be done in userspace,
-   but it's not easy, and we've already done it here.  */
-#define ELF_HWCAP       (cur_cpu_spec[0]->cpu_user_features)
-/* This yields a string that ld.so will use to load implementation
-   specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo.
-   For the moment, we have only optimizations for the Intel generations,
-   but that could change... */
-#define ELF_PLATFORM    (NULL)
-#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
-extern int dcache_bsize;
-extern int icache_bsize;
-extern int ucache_bsize;
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- *   AUXV is greater than 16 for glibc compatibility.
- *   AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- */
-#define ARCH_DLINFO                                                     \
-do {                                                                    \
-        /* Handle glibc compatibility. */                               \
-        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-        /* Cache size items */                                          \
-        NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
-        NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
-        NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
- } while (0)
-#endif /* __KERNEL__ */
-#endif
diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h
deleted file mode 100644
index 47dc7990fb26..000000000000
--- a/include/asm-ppc/hw_irq.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- */
-#ifdef __KERNEL__
-#ifndef _PPC_HW_IRQ_H
-#define _PPC_HW_IRQ_H
-#include <asm/ptrace.h>
-#include <asm/reg.h>
-extern void timer_interrupt(struct pt_regs *);
-#define INLINE_IRQS
-#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
-#ifdef INLINE_IRQS
-static inline void local_irq_disable(void)
-{
-        unsigned long msr;
-        msr = mfmsr();
-        mtmsr(msr & ~MSR_EE);
-        __asm__ __volatile__("": : :"memory");
-}
-static inline void local_irq_enable(void)
-{
-        unsigned long msr;
-        __asm__ __volatile__("": : :"memory");
-        msr = mfmsr();
-        mtmsr(msr | MSR_EE);
-}
-static inline void local_irq_save_ptr(unsigned long *flags)
-{
-        unsigned long msr;
-        msr = mfmsr();
-        *flags = msr;
-        mtmsr(msr & ~MSR_EE);
-        __asm__ __volatile__("": : :"memory");
-}
-#define local_save_flags(flags)         ((flags) = mfmsr())
-#define local_irq_save(flags)           local_irq_save_ptr(&flags)
-#define local_irq_restore(flags)        mtmsr(flags)
-#else
-extern void local_irq_enable(void);
-extern void local_irq_disable(void);
-extern void local_irq_restore(unsigned long);
-extern void local_save_flags_ptr(unsigned long *);
-#define local_save_flags(flags) local_save_flags_ptr(&flags)
-#define local_irq_save(flags) ({local_save_flags(flags);local_irq_disable();})
-#endif
-extern void do_lost_interrupts(unsigned long);
-#define mask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->disable) irq_desc[irq].handler->disable(irq);})
-#define unmask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->enable) irq_desc[irq].handler->enable(irq);})
-#define ack_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->ack) irq_desc[irq].handler->ack(irq);})
-/* Should we handle this via lost interrupts and IPIs or should we don't care like
- * we do now ? --BenH.
- */
-struct hw_interrupt_type;
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
-#endif /* _PPC_HW_IRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 7eb7cf6360bd..39caf067a31b 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -8,6 +8,7 @@
 #include <asm/page.h>
 #include <asm/byteorder.h>
+#include <asm/synch.h>
 #include <asm/mmu.h>
 #define SIO_CONFIG_RA   0x398
@@ -440,16 +441,6 @@ extern inline void * phys_to_virt(unsigned long address)
 #define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
 #define page_to_bus(page)       (page_to_phys(page) + PCI_DRAM_OFFSET)
-/*
- * Enforce In-order Execution of I/O:
- * Acts as a barrier to ensure all previous I/O accesses have
- * completed before any further ones are issued.
- */
-extern inline void eieio(void)
-{
-        __asm__ __volatile__ ("eieio" : : : "memory");
-}
 /* Enforce in-order execution of data I/O.
 * No distinction between read/write on PPC; use eieio for all three.
 */
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index bd9674807f05..137ea0cf34d3 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -24,6 +24,12 @@
 */
 #define ARCH_HAS_IRQ_PER_CPU
+#define get_irq_desc(irq) (&irq_desc[(irq)])
+/* Define a way to iterate across irqs. */
+#define for_each_irq(i) \
+        for ((i) = 0; (i) < NR_IRQS; ++(i))
 #if defined(CONFIG_40x)
 #include <asm/ibm4xx.h>
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
deleted file mode 100644
index 6d6fc78731e5..000000000000
--- a/include/asm-ppc/kmap_types.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-enum km_type {
-        KM_BOUNCE_READ,
-        KM_SKB_SUNRPC_DATA,
-        KM_SKB_DATA_SOFTIRQ,
-        KM_USER0,
-        KM_USER1,
-        KM_BIO_SRC_IRQ,
-        KM_BIO_DST_IRQ,
-        KM_PTE0,
-        KM_PTE1,
-        KM_IRQ0,
-        KM_IRQ1,
-        KM_SOFTIRQ0,
-        KM_SOFTIRQ1,
-        KM_PPC_SYNC_PAGE,
-        KM_PPC_SYNC_ICACHE,
-        KM_TYPE_NR
-};
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/perfmon.h b/include/asm-ppc/perfmon.h
index 5e7a89c47b5b..2ae031594a4e 100644
--- a/include/asm-ppc/perfmon.h
+++ b/include/asm-ppc/perfmon.h
@@ -3,8 +3,8 @@
 extern void (*perf_irq)(struct pt_regs *);
-int request_perfmon_irq(void (*handler)(struct pt_regs *));
+int reserve_pmc_hardware(void (*handler)(struct pt_regs *));
-void free_perfmon_irq(void);
+void release_pmc_hardware(void);
 #ifdef CONFIG_FSL_BOOKE
 void init_pmc_stop(int ctr);
@@ -16,7 +16,7 @@ void pmc_start_ctrs(int enable);
 void pmc_stop_ctrs(void);
 void dump_pmcs(void);
-extern struct op_ppc32_model op_model_fsl_booke;
+extern struct op_powerpc_model op_model_fsl_booke;
 #endif
 #endif /* __PERFMON_H */
diff --git a/include/asm-ppc/posix_types.h b/include/asm-ppc/posix_types.h
deleted file mode 100644
index a14a82abe8d2..000000000000
--- a/include/asm-ppc/posix_types.h
+++ /dev/null
@@ -1,111 +0,0 @@
-#ifndef _PPC_POSIX_TYPES_H
-#define _PPC_POSIX_TYPES_H
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-typedef unsigned long   __kernel_ino_t;
-typedef unsigned int    __kernel_mode_t;
-typedef unsigned short  __kernel_nlink_t;
-typedef long            __kernel_off_t;
-typedef int             __kernel_pid_t;
-typedef unsigned int    __kernel_uid_t;
-typedef unsigned int    __kernel_gid_t;
-typedef unsigned int    __kernel_size_t;
-typedef int             __kernel_ssize_t;
-typedef long            __kernel_ptrdiff_t;
-typedef long            __kernel_time_t;
-typedef long            __kernel_suseconds_t;
-typedef long            __kernel_clock_t;
-typedef int             __kernel_timer_t;
-typedef int             __kernel_clockid_t;
-typedef int             __kernel_daddr_t;
-typedef char *          __kernel_caddr_t;
-typedef short             __kernel_ipc_pid_t;
-typedef unsigned short  __kernel_uid16_t;
-typedef unsigned short  __kernel_gid16_t;
-typedef unsigned int    __kernel_uid32_t;
-typedef unsigned int    __kernel_gid32_t;
-typedef unsigned int    __kernel_old_uid_t;
-typedef unsigned int    __kernel_old_gid_t;
-typedef unsigned int    __kernel_old_dev_t;
-#ifdef __GNUC__
-typedef long long       __kernel_loff_t;
-#endif
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-#ifndef __GNUC__
-#define __FD_SET(d, set)        ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-#define __FD_CLR(d, set)        ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-#define __FD_ISSET(d, set)      ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
-#define __FD_ZERO(set)  \
-  ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
-#else /* __GNUC__ */
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
-    || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
-/* With GNU C, use inline functions instead so args are evaluated only once: */
-#undef __FD_SET
-static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-#undef __FD_CLR
-static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-#undef __FD_ISSET
-static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-/*
- * This will unroll the loop for the normal constant case (8 ints,
- * for a 256-bit fd_set)
- */
-#undef __FD_ZERO
-static __inline__ void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned int *tmp = (unsigned int *)p->fds_bits;
-        int i;
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 8:
-                                tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0;
-                                tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0;
-                                return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
-#endif /* __GNUC__ */
-#endif /* _PPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/rwsem.h b/include/asm-ppc/rwsem.h
deleted file mode 100644
index 3e738f483c11..000000000000
--- a/include/asm-ppc/rwsem.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * include/asm-ppc/rwsem.h: R/W semaphores for PPC using the stuff
- * in lib/rwsem.c.  Adapted largely from include/asm-i386/rwsem.h
- * by Paul Mackerras <paulus@samba.org>.
- */
-#ifndef _PPC_RWSEM_H
-#define _PPC_RWSEM_H
-#ifdef __KERNEL__
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <asm/atomic.h>
-#include <asm/system.h>
-/*
- * the semaphore definition
- */
-struct rw_semaphore {
-        /* XXX this should be able to be an atomic_t  -- paulus */
-        signed long             count;
-#define RWSEM_UNLOCKED_VALUE            0x00000000
-#define RWSEM_ACTIVE_BIAS               0x00000001
-#define RWSEM_ACTIVE_MASK               0x0000ffff
-#define RWSEM_WAITING_BIAS              (-0x00010000)
-#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
-#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
-        spinlock_t              wait_lock;
-        struct list_head        wait_list;
-#if RWSEM_DEBUG
-        int                     debug;
-#endif
-};
-/*
- * initialisation
- */
-#if RWSEM_DEBUG
-#define __RWSEM_DEBUG_INIT      , 0
-#else
-#define __RWSEM_DEBUG_INIT      /* */
-#endif
-#define __RWSEM_INITIALIZER(name) \
-        { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
-          LIST_HEAD_INIT((name).wait_list) \
-          __RWSEM_DEBUG_INIT }
-#define DECLARE_RWSEM(name)             \
-        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
-extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
-static inline void init_rwsem(struct rw_semaphore *sem)
-{
-        sem->count = RWSEM_UNLOCKED_VALUE;
-        spin_lock_init(&sem->wait_lock);
-        INIT_LIST_HEAD(&sem->wait_list);
-#if RWSEM_DEBUG
-        sem->debug = 0;
-#endif
-}
-/*
- * lock for reading
- */
-static inline void __down_read(struct rw_semaphore *sem)
-{
-        if (atomic_inc_return((atomic_t *)(&sem->count)) > 0)
-                smp_wmb();
-        else
-                rwsem_down_read_failed(sem);
-}
-static inline int __down_read_trylock(struct rw_semaphore *sem)
-{
-        int tmp;
-        while ((tmp = sem->count) >= 0) {
-                if (tmp == cmpxchg(&sem->count, tmp,
-                                   tmp + RWSEM_ACTIVE_READ_BIAS)) {
-                        smp_wmb();
-                        return 1;
-                }
-        }
-        return 0;
-}
-/*
- * lock for writing
- */
-static inline void __down_write(struct rw_semaphore *sem)
-{
-        int tmp;
-        tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
-                                (atomic_t *)(&sem->count));
-        if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
-                smp_wmb();
-        else
-                rwsem_down_write_failed(sem);
-}
-static inline int __down_write_trylock(struct rw_semaphore *sem)
-{
-        int tmp;
-        tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
-                      RWSEM_ACTIVE_WRITE_BIAS);
-        smp_wmb();
-        return tmp == RWSEM_UNLOCKED_VALUE;
-}
-/*
- * unlock after reading
- */
-static inline void __up_read(struct rw_semaphore *sem)
-{
-        int tmp;
-        smp_wmb();
-        tmp = atomic_dec_return((atomic_t *)(&sem->count));
-        if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
-                rwsem_wake(sem);
-}
-/*
- * unlock after writing
- */
-static inline void __up_write(struct rw_semaphore *sem)
-{
-        smp_wmb();
-        if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
-                              (atomic_t *)(&sem->count)) < 0)
-                rwsem_wake(sem);
-}
-/*
- * implement atomic add functionality
- */
-static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
-{
-        atomic_add(delta, (atomic_t *)(&sem->count));
-}
-/*
- * downgrade write lock to read lock
- */
-static inline void __downgrade_write(struct rw_semaphore *sem)
-{
-        int tmp;
-        smp_wmb();
-        tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
-        if (tmp < 0)
-                rwsem_downgrade_wake(sem);
-}
-/*
- * implement exchange and add functionality
- */
-static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
-{
-        smp_mb();
-        return atomic_add_return(delta, (atomic_t *)(&sem->count));
-}
-#endif /* __KERNEL__ */
-#endif /* _PPC_RWSEM_XADD_H */
diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h
deleted file mode 100644
index 666c4da96d87..000000000000
--- a/include/asm-ppc/seccomp.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_SECCOMP_H
-#include <linux/unistd.h>
-#define __NR_seccomp_read __NR_read
-#define __NR_seccomp_write __NR_write
-#define __NR_seccomp_exit __NR_exit
-#define __NR_seccomp_sigreturn __NR_rt_sigreturn
-#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-ppc/sections.h b/include/asm-ppc/sections.h
deleted file mode 100644
index ba8f43ac9bf3..000000000000
--- a/include/asm-ppc/sections.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_SECTIONS_H
-#define _PPC_SECTIONS_H
-#include <asm-generic/sections.h>
-#define __pmac __attribute__ ((__section__ (".pmac.text")))
-#define __pmacdata __attribute__ ((__section__ (".pmac.data")))
-#define __pmacfunc(__argpmac) \
-        __argpmac __pmac; \
-        __argpmac
-        
-#define __prep __attribute__ ((__section__ (".prep.text")))
-#define __prepdata __attribute__ ((__section__ (".prep.data")))
-#define __prepfunc(__argprep) \
-        __argprep __prep; \
-        __argprep
-#define __chrp __attribute__ ((__section__ (".chrp.text")))
-#define __chrpdata __attribute__ ((__section__ (".chrp.data")))
-#define __chrpfunc(__argchrp) \
-        __argchrp __chrp; \
-        __argchrp
-/* this is actually just common chrp/pmac code, not OF code -- Cort */
-#define __openfirmware __attribute__ ((__section__ (".openfirmware.text")))
-#define __openfirmwaredata __attribute__ ((__section__ (".openfirmware.data")))
-#define __openfirmwarefunc(__argopenfirmware) \
-        __argopenfirmware __openfirmware; \
-        __argopenfirmware
-        
-#endif /* _PPC_SECTIONS_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h
deleted file mode 100644
index 89e6e73be08c..000000000000
--- a/include/asm-ppc/semaphore.h
+++ /dev/null
@@ -1,111 +0,0 @@
-#ifndef _PPC_SEMAPHORE_H
-#define _PPC_SEMAPHORE_H
-/*
- * Swiped from asm-sparc/semaphore.h and modified
- * -- Cort (cort@cs.nmt.edu)
- *
- * Stole some rw spinlock-based semaphore stuff from asm-alpha/semaphore.h
- * -- Ani Joshi (ajoshi@unixbox.com)
- *
- * Remove spinlock-based RW semaphores; RW semaphore definitions are
- * now in rwsem.h and we use the generic lib/rwsem.c implementation.
- * Rework semaphores to use atomic_dec_if_positive.
- * -- Paul Mackerras (paulus@samba.org)
- */
-#ifdef __KERNEL__
-#include <asm/atomic.h>
-#include <asm/system.h>
-#include <linux/wait.h>
-#include <linux/rwsem.h>
-struct semaphore {
-        /*
-         * Note that any negative value of count is equivalent to 0,
-         * but additionally indicates that some process(es) might be
-         * sleeping on `wait'.
-         */
-        atomic_t count;
-        wait_queue_head_t wait;
-};
-#define __SEMAPHORE_INITIALIZER(name, n)                                \
-{                                                                       \
-        .count          = ATOMIC_INIT(n),                               \
-        .wait           = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait)    \
-}
-#define __MUTEX_INITIALIZER(name) \
-        __SEMAPHORE_INITIALIZER(name, 1)
-#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
-        struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
-#define DECLARE_MUTEX(name)             __DECLARE_SEMAPHORE_GENERIC(name, 1)
-#define DECLARE_MUTEX_LOCKED(name)      __DECLARE_SEMAPHORE_GENERIC(name, 0)
-static inline void sema_init (struct semaphore *sem, int val)
-{
-        atomic_set(&sem->count, val);
-        init_waitqueue_head(&sem->wait);
-}
-static inline void init_MUTEX (struct semaphore *sem)
-{
-        sema_init(sem, 1);
-}
-static inline void init_MUTEX_LOCKED (struct semaphore *sem)
-{
-        sema_init(sem, 0);
-}
-extern void __down(struct semaphore * sem);
-extern int  __down_interruptible(struct semaphore * sem);
-extern void __up(struct semaphore * sem);
-extern inline void down(struct semaphore * sem)
-{
-        might_sleep();
-        /*
-         * Try to get the semaphore, take the slow path if we fail.
-         */
-        if (atomic_dec_return(&sem->count) < 0)
-                __down(sem);
-        smp_wmb();
-}
-extern inline int down_interruptible(struct semaphore * sem)
-{
-        int ret = 0;
-        might_sleep();
-        if (atomic_dec_return(&sem->count) < 0)
-                ret = __down_interruptible(sem);
-        smp_wmb();
-        return ret;
-}
-extern inline int down_trylock(struct semaphore * sem)
-{
-        int ret;
-        ret = atomic_dec_if_positive(&sem->count) < 0;
-        smp_wmb();
-        return ret;
-}
-extern inline void up(struct semaphore * sem)
-{
-        smp_wmb();
-        if (atomic_inc_return(&sem->count) <= 0)
-                __up(sem);
-}
-#endif /* __KERNEL__ */
-#endif /* !(_PPC_SEMAPHORE_H) */
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
index 20edcf2a6e0c..5c64b75f0295 100644
--- a/include/asm-ppc/spinlock.h
+++ b/include/asm-ppc/spinlock.h
@@ -9,7 +9,7 @@
 * (the type definitions are in asm/raw_spinlock_types.h)
 */
-#define __raw_spin_is_locked(x)         ((x)->lock != 0)
+#define __raw_spin_is_locked(x)         ((x)->slock != 0)
 #define __raw_spin_unlock_wait(lock) \
        do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
 #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
@@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
        bne-    2b\n\
        isync"
        : "=&r"(tmp)
-        : "r"(&lock->lock), "r"(1)
+        : "r"(&lock->slock), "r"(1)
        : "cr0", "memory");
 }
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
 {
        __asm__ __volatile__("eieio     # __raw_spin_unlock": : :"memory");
-        lock->lock = 0;
+        lock->slock = 0;
 }
-#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock))
+#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock)))
 /*
 * Read-write spinlocks, allowing multiple readers
diff --git a/include/asm-ppc/spinlock_types.h b/include/asm-ppc/spinlock_types.h
deleted file mode 100644
index 7919ccc75b8a..000000000000
--- a/include/asm-ppc/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __ASM_SPINLOCK_TYPES_H
-#define __ASM_SPINLOCK_TYPES_H
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
-typedef struct {
-        volatile unsigned long lock;
-} raw_spinlock_t;
-#define __RAW_SPIN_LOCK_UNLOCKED        { 0 }
-typedef struct {
-        volatile signed int lock;
-} raw_rwlock_t;
-#define __RAW_RW_LOCK_UNLOCKED          { 0 }
-#endif
diff --git a/include/asm-ppc/statfs.h b/include/asm-ppc/statfs.h
deleted file mode 100644
index 807c69954a1b..000000000000
--- a/include/asm-ppc/statfs.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _PPC_STATFS_H
-#define _PPC_STATFS_H
-#include <asm-generic/statfs.h>
-#endif
diff --git a/include/asm-ppc/vga.h b/include/asm-ppc/vga.h
deleted file mode 100644
index c5864734e3e1..000000000000
--- a/include/asm-ppc/vga.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- *      Access to VGA videoram
- *
- *      (c) 1998 Martin Mares <mj@ucw.cz>
- */
-#ifdef __KERNEL__
-#ifndef _LINUX_ASM_VGA_H_
-#define _LINUX_ASM_VGA_H_
-#include <asm/io.h>
-#include <linux/config.h>
-#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE)
-#define VT_BUF_HAVE_RW
-/*
- *  These are only needed for supporting VGA or MDA text mode, which use little
- *  endian byte ordering.
- *  In other cases, we can optimize by using native byte ordering and
- *  <linux/vt_buffer.h> has already done the right job for us.
- */
-extern inline void scr_writew(u16 val, volatile u16 *addr)
-{
-    st_le16(addr, val);
-}
-extern inline u16 scr_readw(volatile const u16 *addr)
-{
-    return ld_le16(addr);
-}
-#define VT_BUF_HAVE_MEMCPYW
-#define scr_memcpyw     memcpy
-#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
-extern unsigned long vgacon_remap_base;
-#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
-#define vga_readb(x) (*(x))
-#define vga_writeb(x,y) (*(y) = (x))
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/atomic.h b/include/asm-ppc64/atomic.h
deleted file mode 100644
index 0e5f25e83bc0..000000000000
--- a/include/asm-ppc64/atomic.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * PowerPC64 atomic operations
- *
- * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM
- * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef _ASM_PPC64_ATOMIC_H_ 
-#define _ASM_PPC64_ATOMIC_H_
-#include <asm/memory.h>
-typedef struct { volatile int counter; } atomic_t;
-#define ATOMIC_INIT(i)  { (i) }
-#define atomic_read(v)          ((v)->counter)
-#define atomic_set(v,i)         (((v)->counter) = (i))
-static __inline__ void atomic_add(int a, atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%3         # atomic_add\n\
-        add     %0,%2,%0\n\
-        stwcx.  %0,0,%3\n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-static __inline__ int atomic_add_return(int a, atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-        EIEIO_ON_SMP
-"1:     lwarx   %0,0,%2         # atomic_add_return\n\
-        add     %0,%1,%0\n\
-        stwcx.  %0,0,%2\n\
-        bne-    1b"
-        ISYNC_ON_SMP
-        : "=&r" (t)
-        : "r" (a), "r" (&v->counter)
-        : "cc", "memory");
-        return t;
-}
-#define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
-static __inline__ void atomic_sub(int a, atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%3         # atomic_sub\n\
-        subf    %0,%2,%0\n\
-        stwcx.  %0,0,%3\n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-static __inline__ int atomic_sub_return(int a, atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-        EIEIO_ON_SMP
-"1:     lwarx   %0,0,%2         # atomic_sub_return\n\
-        subf    %0,%1,%0\n\
-        stwcx.  %0,0,%2\n\
-        bne-    1b"
-        ISYNC_ON_SMP
-        : "=&r" (t)
-        : "r" (a), "r" (&v->counter)
-        : "cc", "memory");
-        return t;
-}
-static __inline__ void atomic_inc(atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_inc\n\
-        addic   %0,%0,1\n\
-        stwcx.  %0,0,%2\n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-static __inline__ int atomic_inc_return(atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-        EIEIO_ON_SMP
-"1:     lwarx   %0,0,%1         # atomic_inc_return\n\
-        addic   %0,%0,1\n\
-        stwcx.  %0,0,%1\n\
-        bne-    1b"
-        ISYNC_ON_SMP
-        : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-        return t;
-}
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-static __inline__ void atomic_dec(atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_dec\n\
-        addic   %0,%0,-1\n\
-        stwcx.  %0,0,%2\n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-static __inline__ int atomic_dec_return(atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-        EIEIO_ON_SMP
-"1:     lwarx   %0,0,%1         # atomic_dec_return\n\
-        addic   %0,%0,-1\n\
-        stwcx.  %0,0,%1\n\
-        bne-    1b"
-        ISYNC_ON_SMP
-        : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-        return t;
-}
-#define atomic_sub_and_test(a, v)       (atomic_sub_return((a), (v)) == 0)
-#define atomic_dec_and_test(v)          (atomic_dec_return((v)) == 0)
-/*
- * Atomically test *v and decrement if it is greater than 0.
- * The function returns the old value of *v minus 1.
- */
-static __inline__ int atomic_dec_if_positive(atomic_t *v)
-{
-        int t;
-        __asm__ __volatile__(
-        EIEIO_ON_SMP
-"1:     lwarx   %0,0,%1         # atomic_dec_if_positive\n\
-        addic.  %0,%0,-1\n\
-        blt-    2f\n\
-        stwcx.  %0,0,%1\n\
-        bne-    1b"
-        ISYNC_ON_SMP
-        "\n\
-2:"     : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-        return t;
-}
-#define smp_mb__before_atomic_dec()     smp_mb()
-#define smp_mb__after_atomic_dec()      smp_mb()
-#define smp_mb__before_atomic_inc()     smp_mb()
-#define smp_mb__after_atomic_inc()      smp_mb()
-#endif /* _ASM_PPC64_ATOMIC_H_ */
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h
index a0f831224f96..dbfa42ef4a99 100644
--- a/include/asm-ppc64/bitops.h
+++ b/include/asm-ppc64/bitops.h
@@ -42,7 +42,7 @@
 #ifdef __KERNEL__
-#include <asm/memory.h>
+#include <asm/synch.h>
 /*
 * clear_bit doesn't imply a memory barrier
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h
index acc9b4d6c168..3eef40efd082 100644
--- a/include/asm-ppc64/cputable.h
+++ b/include/asm-ppc64/cputable.h
@@ -16,7 +16,7 @@
 #define __ASM_PPC_CPUTABLE_H
 #include <linux/config.h>
-#include <asm/page.h> /* for ASM_CONST */
+#include <asm/ppc_asm.h> /* for ASM_CONST */
 /* Exposed to userland CPU features - Must match ppc32 definitions */
 #define PPC_FEATURE_32                  0x80000000
@@ -36,7 +36,7 @@
 * via the mkdefs mechanism.
 */
 struct cpu_spec;
-struct op_ppc64_model;
+struct op_powerpc_model;
 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
@@ -65,7 +65,7 @@ struct cpu_spec {
        char            *oprofile_cpu_type;
        /* Processor specific oprofile operations */
-        struct op_ppc64_model *oprofile_model;
+        struct op_powerpc_model *oprofile_model;
 };
 extern struct cpu_spec          cpu_specs[];
diff --git a/include/asm-ppc64/dart.h b/include/asm-ppc64/dart.h
new file mode 100644
index 000000000000..a9000de8a2e3
--- /dev/null
+++ b/include/asm-ppc64/dart.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ASM_DART_H
+#define _ASM_DART_H
+/* physical base of DART registers */
+#define DART_BASE        0xf8033000UL
+/* Offset from base to control register */
+#define DARTCNTL   0
+/* Offset from base to exception register */
+#define DARTEXCP   0x10
+/* Offset from base to TLB tag registers */
+#define DARTTAG    0x1000
+/* Control Register fields */
+/* base address of table (pfn) */
+#define DARTCNTL_BASE_MASK    0xfffff
+#define DARTCNTL_BASE_SHIFT   12
+#define DARTCNTL_FLUSHTLB     0x400
+#define DARTCNTL_ENABLE       0x200
+/* size of table in pages */
+#define DARTCNTL_SIZE_MASK    0x1ff
+#define DARTCNTL_SIZE_SHIFT   0
+/* DART table fields */
+#define DARTMAP_VALID   0x80000000
+#define DARTMAP_RPNMASK 0x00ffffff
+#define DART_SHIFT              12
+#define DART_PAGE_SIZE          (1 << DART_SHIFT)
+#define DART_PAGE_FACTOR        (PAGE_SHIFT - DART_SHIFT)
+#endif
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h
deleted file mode 100644
index dfd1f69059ba..000000000000
--- a/include/asm-ppc64/dma.h
+++ /dev/null
@@ -1,329 +0,0 @@
-/* 
- * linux/include/asm/dma.h: Defines for using and allocating dma channels.
- * Written by Hennus Bergman, 1992.
- * High DMA channel support & info by Hannu Savolainen
- * and John Boyd, Nov. 1992.
- * Changes for ppc sound by Christoph Nadig
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef _ASM_DMA_H
-#define _ASM_DMA_H
-#include <linux/config.h>
-#include <asm/io.h>
-#include <linux/spinlock.h>
-#include <asm/system.h>
-#ifndef MAX_DMA_CHANNELS
-#define MAX_DMA_CHANNELS        8
-#endif
-/* The maximum address that we can perform a DMA transfer to on this platform */
-/* Doesn't really apply... */
-#define MAX_DMA_ADDRESS  (~0UL)
-#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
-#define dma_outb        outb
-#define dma_inb         inb
-/*
- * NOTES about DMA transfers:
- *
- *  controller 1: channels 0-3, byte operations, ports 00-1F
- *  controller 2: channels 4-7, word operations, ports C0-DF
- *
- *  - ALL registers are 8 bits only, regardless of transfer size
- *  - channel 4 is not used - cascades 1 into 2.
- *  - channels 0-3 are byte - addresses/counts are for physical bytes
- *  - channels 5-7 are word - addresses/counts are for physical words
- *  - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
- *  - transfer count loaded to registers is 1 less than actual count
- *  - controller 2 offsets are all even (2x offsets for controller 1)
- *  - page registers for 5-7 don't use data bit 0, represent 128K pages
- *  - page registers for 0-3 use bit 0, represent 64K pages
- *
- * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory.  
- * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing.
- * Note that addresses loaded into registers must be _physical_ addresses,
- * not logical addresses (which may differ if paging is active).
- *
- *  Address mapping for channels 0-3:
- *
- *   A23 ... A16 A15 ... A8  A7 ... A0    (Physical addresses)
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *   P7  ...  P0  A7 ... A0  A7 ... A0   
- * |    Page    | Addr MSB | Addr LSB |   (DMA registers)
- *
- *  Address mapping for channels 5-7:
- *
- *   A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0    (Physical addresses)
- *    |  ...  |   \   \   ... \  \  \  ... \  \
- *    |  ...  |    \   \   ... \  \  \  ... \  (not used)
- *    |  ...  |     \   \   ... \  \  \  ... \
- *   P7  ...  P1 (0) A7 A6  ... A0 A7 A6 ... A0   
- * |      Page      |  Addr MSB   |  Addr LSB  |   (DMA registers)
- *
- * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
- * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
- * the hardware level, so odd-byte transfers aren't possible).
- *
- * Transfer count (_not # bytes_) is limited to 64K, represented as actual
- * count - 1 : 64K => 0xFFFF, 1 => 0x0000.  Thus, count is always 1 or more,
- * and up to 128K bytes may be transferred on channels 5-7 in one operation. 
- *
- */
-/* 8237 DMA controllers */
-#define IO_DMA1_BASE    0x00    /* 8 bit slave DMA, channels 0..3 */
-#define IO_DMA2_BASE    0xC0    /* 16 bit master DMA, ch 4(=slave input)..7 */
-/* DMA controller registers */
-#define DMA1_CMD_REG            0x08    /* command register (w) */
-#define DMA1_STAT_REG           0x08    /* status register (r) */
-#define DMA1_REQ_REG            0x09    /* request register (w) */
-#define DMA1_MASK_REG           0x0A    /* single-channel mask (w) */
-#define DMA1_MODE_REG           0x0B    /* mode register (w) */
-#define DMA1_CLEAR_FF_REG       0x0C    /* clear pointer flip-flop (w) */
-#define DMA1_TEMP_REG           0x0D    /* Temporary Register (r) */
-#define DMA1_RESET_REG          0x0D    /* Master Clear (w) */
-#define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
-#define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
-#define DMA2_CMD_REG            0xD0    /* command register (w) */
-#define DMA2_STAT_REG           0xD0    /* status register (r) */
-#define DMA2_REQ_REG            0xD2    /* request register (w) */
-#define DMA2_MASK_REG           0xD4    /* single-channel mask (w) */
-#define DMA2_MODE_REG           0xD6    /* mode register (w) */
-#define DMA2_CLEAR_FF_REG       0xD8    /* clear pointer flip-flop (w) */
-#define DMA2_TEMP_REG           0xDA    /* Temporary Register (r) */
-#define DMA2_RESET_REG          0xDA    /* Master Clear (w) */
-#define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
-#define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
-#define DMA_ADDR_0              0x00    /* DMA address registers */
-#define DMA_ADDR_1              0x02
-#define DMA_ADDR_2              0x04
-#define DMA_ADDR_3              0x06
-#define DMA_ADDR_4              0xC0
-#define DMA_ADDR_5              0xC4
-#define DMA_ADDR_6              0xC8
-#define DMA_ADDR_7              0xCC
-#define DMA_CNT_0               0x01    /* DMA count registers */
-#define DMA_CNT_1               0x03
-#define DMA_CNT_2               0x05
-#define DMA_CNT_3               0x07
-#define DMA_CNT_4               0xC2
-#define DMA_CNT_5               0xC6
-#define DMA_CNT_6               0xCA
-#define DMA_CNT_7               0xCE
-#define DMA_LO_PAGE_0              0x87    /* DMA page registers */
-#define DMA_LO_PAGE_1              0x83
-#define DMA_LO_PAGE_2              0x81
-#define DMA_LO_PAGE_3              0x82
-#define DMA_LO_PAGE_5              0x8B
-#define DMA_LO_PAGE_6              0x89
-#define DMA_LO_PAGE_7              0x8A
-#define DMA_HI_PAGE_0              0x487    /* DMA page registers */
-#define DMA_HI_PAGE_1              0x483
-#define DMA_HI_PAGE_2              0x481
-#define DMA_HI_PAGE_3              0x482
-#define DMA_HI_PAGE_5              0x48B
-#define DMA_HI_PAGE_6              0x489
-#define DMA_HI_PAGE_7              0x48A
-#define DMA1_EXT_REG               0x40B
-#define DMA2_EXT_REG               0x4D6
-#define DMA_MODE_READ   0x44    /* I/O to memory, no autoinit, increment, single mode */
-#define DMA_MODE_WRITE  0x48    /* memory to I/O, no autoinit, increment, single mode */
-#define DMA_MODE_CASCADE 0xC0   /* pass thru DREQ->HRQ, DACK<-HLDA only */
-#define DMA_AUTOINIT     0x10
-extern spinlock_t  dma_spin_lock;
-static __inline__ unsigned long claim_dma_lock(void)
-{
-        unsigned long flags;
-        spin_lock_irqsave(&dma_spin_lock, flags);
-        return flags;
-}
-static __inline__ void release_dma_lock(unsigned long flags)
-{
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
-        unsigned char ucDmaCmd=0x00;
-        if (dmanr != 4)
-        {
-                dma_outb(0, DMA2_MASK_REG);  /* This may not be enabled */
-                dma_outb(ucDmaCmd, DMA2_CMD_REG);  /* Enable group */
-        }
-        if (dmanr<=3)
-        {
-                dma_outb(dmanr,  DMA1_MASK_REG);
-                dma_outb(ucDmaCmd, DMA1_CMD_REG);  /* Enable group */
-        } else
-        {
-                dma_outb(dmanr & 3,  DMA2_MASK_REG);
-        }
-}
-static __inline__ void disable_dma(unsigned int dmanr)
-{
-        if (dmanr<=3)
-                dma_outb(dmanr | 4,  DMA1_MASK_REG);
-        else
-                dma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
-}
-/* Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while interrupts are disabled! ---
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
-        if (dmanr<=3)
-                dma_outb(0,  DMA1_CLEAR_FF_REG);
-        else
-                dma_outb(0,  DMA2_CLEAR_FF_REG);
-}
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
-        if (dmanr<=3)
-                dma_outb(mode | dmanr,  DMA1_MODE_REG);
-        else
-                dma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
-}
-/* Set only the page register bits of the transfer address.
- * This is used for successive transfers when we know the contents of
- * the lower 16 bits of the DMA current address register, but a 64k boundary
- * may have been crossed.
- */
-static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
-{
-        switch(dmanr) {
-                case 0:
-                        dma_outb(pagenr, DMA_LO_PAGE_0);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_0);
-                        break;
-                case 1:
-                        dma_outb(pagenr, DMA_LO_PAGE_1);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_1);
-                        break;
-                case 2:
-                        dma_outb(pagenr, DMA_LO_PAGE_2);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_2); 
-                        break;
-                case 3:
-                        dma_outb(pagenr, DMA_LO_PAGE_3);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_3); 
-                        break;
-                case 5:
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_5);
-                        break;
-                case 6:
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_6);
-                        break;
-                case 7:
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
-                        dma_outb(pagenr>>8, DMA_HI_PAGE_7);
-                  break;
-        }
-}
-/* Set transfer address & page bits for specific DMA channel.
- * Assumes dma flipflop is clear.
- */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
-{
-        if (dmanr <= 3)  {
-            dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
-            dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
-        }  else  {
-            dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
-            dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
-        }
-        set_dma_page(dmanr, phys>>16);
-}
-/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
- * a specific DMA channel.
- * You must ensure the parameters are valid.
- * NOTE: from a manual: "the number of transfers is one more
- * than the initial word count"! This is taken into account.
- * Assumes dma flip-flop is clear.
- * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-        count--;
-        if (dmanr <= 3)  {
-            dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
-            dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
-        } else {
-            dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
-            dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
-        }
-}
-/* Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * If called before the channel has been used, it may return 1.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- *
- * Assumes DMA flip-flop is clear.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
-        unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
-                                         : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
-        /* using short to get 16-bit wrap around */
-        unsigned short count;
-        count = 1 + dma_inb(io_port);
-        count += dma_inb(io_port) << 8;
-        
-        return (dmanr <= 3)? count : (count<<1);
-}
-/* These are in kernel/dma.c: */
-extern int request_dma(unsigned int dmanr, const char * device_id);     /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr);       /* release it again */
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;                                        
-#else                                                         
-#define isa_dma_bridge_buggy   (0)
-#endif
-#endif  /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
-#endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc64/futex.h b/include/asm-ppc64/futex.h
index cb2640b3a408..266b460de44e 100644
--- a/include/asm-ppc64/futex.h
+++ b/include/asm-ppc64/futex.h
@@ -5,7 +5,7 @@
 #include <linux/futex.h>
 #include <asm/errno.h>
-#include <asm/memory.h>
+#include <asm/synch.h>
 #include <asm/uaccess.h>
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h
deleted file mode 100644
index 4ee72bb1fd48..000000000000
--- a/include/asm-ppc64/hardirq.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __ASM_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/preempt.h>
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-static inline void ack_bad_irq(int irq)
-{
-        printk(KERN_CRIT "illegal vector %d received!\n", irq);
-        BUG();
-}
-#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h
index 59c958aea4db..bd7c9532d77b 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-ppc64/io.h
@@ -15,7 +15,7 @@
 #ifdef CONFIG_PPC_ISERIES 
 #include <asm/iSeries/iSeries_io.h>
 #endif  
-#include <asm/memory.h>
+#include <asm/synch.h>
 #include <asm/delay.h>
 #include <asm-generic/iomap.h>
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h
index 72dcf8116b04..a6a173d49506 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-ppc64/iommu.h
@@ -1,5 +1,4 @@
 /*
- * iommu.h
 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
 * Rewrite, cleanup:
 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
@@ -29,44 +28,11 @@
 /*
 * IOMAP_MAX_ORDER defines the largest contiguous block
- * of dma (tce) space we can get.  IOMAP_MAX_ORDER = 13
+ * of dma space we can get.  IOMAP_MAX_ORDER = 13
 * allows up to 2**12 pages (4096 * 4096) = 16 MB
 */
 #define IOMAP_MAX_ORDER 13
-/*
- * Tces come in two formats, one for the virtual bus and a different
- * format for PCI
- */
-#define TCE_VB  0
-#define TCE_PCI 1
-/* tce_entry
- * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
- * abstracted so layout is irrelevant.
- */
-union tce_entry {
-        unsigned long te_word;
-        struct {
-                unsigned int  tb_cacheBits :6;  /* Cache hash bits - not used */
-                unsigned int  tb_rsvd      :6;
-                unsigned long tb_rpn       :40; /* Real page number */
-                unsigned int  tb_valid     :1;  /* Tce is valid (vb only) */
-                unsigned int  tb_allio     :1;  /* Tce is valid for all lps (vb only) */
-                unsigned int  tb_lpindex   :8;  /* LpIndex for user of TCE (vb only) */
-                unsigned int  tb_pciwr     :1;  /* Write allowed (pci only) */
-                unsigned int  tb_rdwr      :1;  /* Read allowed  (pci), Write allowed (vb) */
-        } te_bits;
-#define te_cacheBits te_bits.tb_cacheBits
-#define te_rpn       te_bits.tb_rpn
-#define te_valid     te_bits.tb_valid
-#define te_allio     te_bits.tb_allio
-#define te_lpindex   te_bits.tb_lpindex
-#define te_pciwr     te_bits.tb_pciwr
-#define te_rdwr      te_bits.tb_rdwr
-};
 struct iommu_table {
        unsigned long  it_busno;     /* Bus number this table belongs to */
        unsigned long  it_size;      /* Size of iommu table in entries */
diff --git a/include/asm-ppc64/kmap_types.h b/include/asm-ppc64/kmap_types.h
deleted file mode 100644
index fd1574648223..000000000000
--- a/include/asm-ppc64/kmap_types.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-enum km_type {
-        KM_BOUNCE_READ,
-        KM_SKB_SUNRPC_DATA,
-        KM_SKB_DATA_SOFTIRQ,
-        KM_USER0,
-        KM_USER1,
-        KM_BIO_SRC_IRQ,
-        KM_BIO_DST_IRQ,
-        KM_PTE0,
-        KM_PTE1,
-        KM_IRQ0,
-        KM_IRQ1,
-        KM_SOFTIRQ0,
-        KM_SOFTIRQ1,    
-        KM_TYPE_NR
-};
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index 8027160ec96d..d35d9d3e44cf 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -56,9 +56,8 @@ struct machdep_calls {
                                       unsigned long vflags,
                                       unsigned long rflags);
        long            (*hpte_remove)(unsigned long hpte_group);
-        void            (*flush_hash_range)(unsigned long context,
+        void            (*flush_hash_range)(unsigned long number, int local);
-                                            unsigned long number,
-                                            int local);
        /* special for kexec, to be called in real mode, linar mapping is
         * destroyed as well */
        void            (*hpte_clear_all)(void);
diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h
deleted file mode 100644
index af53ffb55726..000000000000
--- a/include/asm-ppc64/memory.h
+++ /dev/null
@@ -1,61 +0,0 @@
-#ifndef _ASM_PPC64_MEMORY_H_ 
-#define _ASM_PPC64_MEMORY_H_ 
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/config.h>
-/*
- * Arguably the bitops and *xchg operations don't imply any memory barrier
- * or SMP ordering, but in fact a lot of drivers expect them to imply
- * both, since they do on x86 cpus.
- */
-#ifdef CONFIG_SMP
-#define EIEIO_ON_SMP    "eieio\n"
-#define ISYNC_ON_SMP    "\n\tisync"
-#define SYNC_ON_SMP     "lwsync\n\t"
-#else
-#define EIEIO_ON_SMP
-#define ISYNC_ON_SMP
-#define SYNC_ON_SMP
-#endif
-static inline void eieio(void)
-{
-        __asm__ __volatile__ ("eieio" : : : "memory");
-}
-static inline void isync(void)
-{
-        __asm__ __volatile__ ("isync" : : : "memory");
-}
-#ifdef CONFIG_SMP
-#define eieio_on_smp()  eieio()
-#define isync_on_smp()  isync()
-#else
-#define eieio_on_smp()  __asm__ __volatile__("": : :"memory")
-#define isync_on_smp()  __asm__ __volatile__("": : :"memory")
-#endif
-/* Macros for adjusting thread priority (hardware multi-threading) */
-#define HMT_very_low()    asm volatile("or 31,31,31   # very low priority")
-#define HMT_low()       asm volatile("or 1,1,1          # low priority")
-#define HMT_medium_low()  asm volatile("or 6,6,6      # medium low priority")
-#define HMT_medium()    asm volatile("or 2,2,2          # medium priority")
-#define HMT_medium_high() asm volatile("or 5,5,5      # medium high priority")
-#define HMT_high()      asm volatile("or 3,3,3          # high priority")
-#define HMT_VERY_LOW    "\tor   31,31,31        # very low priority\n"
-#define HMT_LOW         "\tor   1,1,1           # low priority\n"
-#define HMT_MEDIUM_LOW  "\tor   6,6,6           # medium low priority\n"
-#define HMT_MEDIUM      "\tor   2,2,2           # medium priority\n"
-#define HMT_MEDIUM_HIGH "\tor   5,5,5           # medium high priority\n"
-#define HMT_HIGH        "\tor   3,3,3           # high priority\n"
-#endif
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index 7bc42eb087ad..d2b0b796d35e 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -14,6 +14,7 @@
 #define _PPC64_MMU_H_
 #include <linux/config.h>
+#include <asm/ppc_asm.h> /* for ASM_CONST */
 #include <asm/page.h>
 /*
@@ -29,7 +30,7 @@
 /* Location of cpu0's segment table */
 #define STAB0_PAGE      0x6
-#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
+#define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
 #ifndef __ASSEMBLY__
 extern char initial_stab[];
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a15422bcf30d..d404431f0a9a 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -11,13 +11,7 @@
 */
 #include <linux/config.h>
+#include <asm/ppc_asm.h> /* for ASM_CONST */
-#ifdef __ASSEMBLY__
-  #define ASM_CONST(x) x
-#else
-  #define __ASM_CONST(x) x##UL
-  #define ASM_CONST(x) __ASM_CONST(x)
-#endif
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      12
diff --git a/include/asm-ppc64/ppc_asm.h b/include/asm-ppc64/ppc_asm.h
deleted file mode 100644
index 9031d8a29aca..000000000000
--- a/include/asm-ppc64/ppc_asm.h
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * arch/ppc64/kernel/ppc_asm.h
- *
- * Definitions used by various bits of low-level assembly code on PowerPC.
- *
- * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-#ifndef _PPC64_PPC_ASM_H
-#define _PPC64_PPC_ASM_H
-/*
- * Macros for storing registers into and loading registers from
- * exception frames.
- */
-#define SAVE_GPR(n, base)       std     n,GPR0+8*(n)(base)
-#define SAVE_2GPRS(n, base)     SAVE_GPR(n, base); SAVE_GPR(n+1, base)
-#define SAVE_4GPRS(n, base)     SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
-#define SAVE_8GPRS(n, base)     SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
-#define SAVE_10GPRS(n, base)    SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
-#define REST_GPR(n, base)       ld      n,GPR0+8*(n)(base)
-#define REST_2GPRS(n, base)     REST_GPR(n, base); REST_GPR(n+1, base)
-#define REST_4GPRS(n, base)     REST_2GPRS(n, base); REST_2GPRS(n+2, base)
-#define REST_8GPRS(n, base)     REST_4GPRS(n, base); REST_4GPRS(n+4, base)
-#define REST_10GPRS(n, base)    REST_8GPRS(n, base); REST_2GPRS(n+8, base)
-#define SAVE_NVGPRS(base)       SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
-#define REST_NVGPRS(base)       REST_8GPRS(14, base); REST_10GPRS(22, base)
-#define SAVE_FPR(n, base)       stfd    n,THREAD_FPR0+8*(n)(base)
-#define SAVE_2FPRS(n, base)     SAVE_FPR(n, base); SAVE_FPR(n+1, base)
-#define SAVE_4FPRS(n, base)     SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
-#define SAVE_8FPRS(n, base)     SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
-#define SAVE_16FPRS(n, base)    SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
-#define SAVE_32FPRS(n, base)    SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
-#define REST_FPR(n, base)       lfd     n,THREAD_FPR0+8*(n)(base)
-#define REST_2FPRS(n, base)     REST_FPR(n, base); REST_FPR(n+1, base)
-#define REST_4FPRS(n, base)     REST_2FPRS(n, base); REST_2FPRS(n+2, base)
-#define REST_8FPRS(n, base)     REST_4FPRS(n, base); REST_4FPRS(n+4, base)
-#define REST_16FPRS(n, base)    REST_8FPRS(n, base); REST_8FPRS(n+8, base)
-#define REST_32FPRS(n, base)    REST_16FPRS(n, base); REST_16FPRS(n+16, base)
-#define SAVE_VR(n,b,base)       li b,THREAD_VR0+(16*(n));  stvx n,b,base
-#define SAVE_2VRS(n,b,base)     SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
-#define SAVE_4VRS(n,b,base)     SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
-#define SAVE_8VRS(n,b,base)     SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
-#define SAVE_16VRS(n,b,base)    SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
-#define SAVE_32VRS(n,b,base)    SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
-#define REST_VR(n,b,base)       li b,THREAD_VR0+(16*(n)); lvx n,b,base
-#define REST_2VRS(n,b,base)     REST_VR(n,b,base); REST_VR(n+1,b,base)
-#define REST_4VRS(n,b,base)     REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
-#define REST_8VRS(n,b,base)     REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
-#define REST_16VRS(n,b,base)    REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
-#define REST_32VRS(n,b,base)    REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
-/* Macros to adjust thread priority for Iseries hardware multithreading */
-#define HMT_LOW         or 1,1,1
-#define HMT_MEDIUM      or 2,2,2
-#define HMT_HIGH        or 3,3,3
-/* Insert the high 32 bits of the MSR into what will be the new
-   MSR (via SRR1 and rfid)  This preserves the MSR.SF and MSR.ISF
-   bits. */
-#define FIX_SRR1(ra, rb)        \
-        mr      rb,ra;          \
-        mfmsr   ra;             \
-        rldimi  ra,rb,0,32
-#define CLR_TOP32(r)    rlwinm  (r),(r),0,0,31  /* clear top 32 bits */
-/* 
- * LOADADDR( rn, name )
- *   loads the address of 'name' into 'rn'
- *
- * LOADBASE( rn, name )
- *   loads the address (less the low 16 bits) of 'name' into 'rn'
- *   suitable for base+disp addressing
- */
-#define LOADADDR(rn,name) \
-        lis     rn,name##@highest;      \
-        ori     rn,rn,name##@higher;    \
-        rldicr  rn,rn,32,31;            \
-        oris    rn,rn,name##@h;         \
-        ori     rn,rn,name##@l
-#define LOADBASE(rn,name) \
-        lis     rn,name@highest;        \
-        ori     rn,rn,name@higher;      \
-        rldicr  rn,rn,32,31;            \
-        oris    rn,rn,name@ha
-#define SET_REG_TO_CONST(reg, value)                    \
-        lis     reg,(((value)>>48)&0xFFFF);             \
-        ori     reg,reg,(((value)>>32)&0xFFFF);         \
-        rldicr  reg,reg,32,31;                          \
-        oris    reg,reg,(((value)>>16)&0xFFFF);         \
-        ori     reg,reg,((value)&0xFFFF);
-#define SET_REG_TO_LABEL(reg, label)                    \
-        lis     reg,(label)@highest;                    \
-        ori     reg,reg,(label)@higher;                 \
-        rldicr  reg,reg,32,31;                          \
-        oris    reg,reg,(label)@h;                      \
-        ori     reg,reg,(label)@l;
-/* PPPBBB - DRENG  If KERNELBASE is always 0xC0...,
- * Then we can easily do this with one asm insn. -Peter
- */
-#define tophys(rd,rs)                           \
-        lis     rd,((KERNELBASE>>48)&0xFFFF);   \
-        rldicr  rd,rd,32,31;                    \
-        sub     rd,rs,rd
-#define tovirt(rd,rs)                           \
-        lis     rd,((KERNELBASE>>48)&0xFFFF);   \
-        rldicr  rd,rd,32,31;                    \
-        add     rd,rs,rd
-/* Condition Register Bit Fields */
-#define cr0     0
-#define cr1     1
-#define cr2     2
-#define cr3     3
-#define cr4     4
-#define cr5     5
-#define cr6     6
-#define cr7     7
-/* General Purpose Registers (GPRs) */
-#define r0      0
-#define r1      1
-#define r2      2
-#define r3      3
-#define r4      4
-#define r5      5
-#define r6      6
-#define r7      7
-#define r8      8
-#define r9      9
-#define r10     10
-#define r11     11
-#define r12     12
-#define r13     13
-#define r14     14
-#define r15     15
-#define r16     16
-#define r17     17
-#define r18     18
-#define r19     19
-#define r20     20
-#define r21     21
-#define r22     22
-#define r23     23
-#define r24     24
-#define r25     25
-#define r26     26
-#define r27     27
-#define r28     28
-#define r29     29
-#define r30     30
-#define r31     31
-/* Floating Point Registers (FPRs) */
-#define fr0     0
-#define fr1     1
-#define fr2     2
-#define fr3     3
-#define fr4     4
-#define fr5     5
-#define fr6     6
-#define fr7     7
-#define fr8     8
-#define fr9     9
-#define fr10    10
-#define fr11    11
-#define fr12    12
-#define fr13    13
-#define fr14    14
-#define fr15    15
-#define fr16    16
-#define fr17    17
-#define fr18    18
-#define fr19    19
-#define fr20    20
-#define fr21    21
-#define fr22    22
-#define fr23    23
-#define fr24    24
-#define fr25    25
-#define fr26    26
-#define fr27    27
-#define fr28    28
-#define fr29    29
-#define fr30    30
-#define fr31    31
-#define vr0     0
-#define vr1     1
-#define vr2     2
-#define vr3     3
-#define vr4     4
-#define vr5     5
-#define vr6     6
-#define vr7     7
-#define vr8     8
-#define vr9     9
-#define vr10    10
-#define vr11    11
-#define vr12    12
-#define vr13    13
-#define vr14    14
-#define vr15    15
-#define vr16    16
-#define vr17    17
-#define vr18    18
-#define vr19    19
-#define vr20    20
-#define vr21    21
-#define vr22    22
-#define vr23    23
-#define vr24    24
-#define vr25    25
-#define vr26    26
-#define vr27    27
-#define vr28    28
-#define vr29    29
-#define vr30    30
-#define vr31    31
-#endif /* _PPC64_PPC_ASM_H */
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 4146189006e3..e5fc18531ec1 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -368,6 +368,14 @@ GLUE(.,name):
 #define mfasr()         ({unsigned long rval; \
                        asm volatile("mfasr %0" : "=r" (rval)); rval;})
+/* Macros for adjusting thread priority (hardware multi-threading) */
+#define HMT_very_low()    asm volatile("or 31,31,31   # very low priority")
+#define HMT_low()       asm volatile("or 1,1,1          # low priority")
+#define HMT_medium_low()  asm volatile("or 6,6,6      # medium low priority")
+#define HMT_medium()    asm volatile("or 2,2,2          # medium priority")
+#define HMT_medium_high() asm volatile("or 5,5,5      # medium high priority")
+#define HMT_high()      asm volatile("or 3,3,3          # high priority")
 static inline void set_tb(unsigned int upper, unsigned int lower)
 {
        mttbl(0);
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 375015c62f20..1fbdc9f0590c 100644
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -13,7 +13,7 @@
 #include <asm/page.h>
 #include <asm/processor.h>
 #include <asm/hw_irq.h>
-#include <asm/memory.h>
+#include <asm/synch.h>
 /*
 * Memory barrier.
@@ -48,7 +48,7 @@
 #ifdef CONFIG_SMP
 #define smp_mb()        mb()
 #define smp_rmb()       rmb()
-#define smp_wmb()       __asm__ __volatile__ ("eieio" : : : "memory")
+#define smp_wmb()       eieio()
 #define smp_read_barrier_depends()  read_barrier_depends()
 #else
 #define smp_mb()        __asm__ __volatile__("": : :"memory")
diff --git a/include/asm-ppc64/tce.h b/include/asm-ppc64/tce.h
new file mode 100644
index 000000000000..d40b6b42ab35
--- /dev/null
+++ b/include/asm-ppc64/tce.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
+ * Rewrite, cleanup:
+ * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ASM_TCE_H
+#define _ASM_TCE_H
+/*
+ * Tces come in two formats, one for the virtual bus and a different
+ * format for PCI
+ */
+#define TCE_VB  0
+#define TCE_PCI 1
+/* TCE page size is 4096 bytes (1 << 12) */
+#define TCE_SHIFT       12
+#define TCE_PAGE_SIZE   (1 << TCE_SHIFT)
+#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
+/* tce_entry
+ * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
+ * abstracted so layout is irrelevant.
+ */
+union tce_entry {
+        unsigned long te_word;
+        struct {
+                unsigned int  tb_cacheBits :6;  /* Cache hash bits - not used */
+                unsigned int  tb_rsvd      :6;
+                unsigned long tb_rpn       :40; /* Real page number */
+                unsigned int  tb_valid     :1;  /* Tce is valid (vb only) */
+                unsigned int  tb_allio     :1;  /* Tce is valid for all lps (vb only) */
+                unsigned int  tb_lpindex   :8;  /* LpIndex for user of TCE (vb only) */
+                unsigned int  tb_pciwr     :1;  /* Write allowed (pci only) */
+                unsigned int  tb_rdwr      :1;  /* Read allowed  (pci), Write allowed (vb) */
+        } te_bits;
+#define te_cacheBits te_bits.tb_cacheBits
+#define te_rpn       te_bits.tb_rpn
+#define te_valid     te_bits.tb_valid
+#define te_allio     te_bits.tb_allio
+#define te_lpindex   te_bits.tb_lpindex
+#define te_pciwr     te_bits.tb_pciwr
+#define te_rdwr      te_bits.tb_rdwr
+};
+#endif
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-ppc64/thread_info.h
index 0494df6fca74..71244d8a427d 100644
--- a/include/asm-ppc64/thread_info.h
+++ b/include/asm-ppc64/thread_info.h
@@ -54,9 +54,9 @@ struct thread_info {
 /* thread information allocation */
-#define THREAD_ORDER            2
+#define THREAD_SHIFT            14
-#define THREAD_SIZE             (PAGE_SIZE << THREAD_ORDER)
+#define THREAD_ORDER            (THREAD_SHIFT - PAGE_SHIFT)
-#define THREAD_SHIFT            (PAGE_SHIFT + THREAD_ORDER)
+#define THREAD_SIZE             (1 << THREAD_SHIFT)
 #ifdef CONFIG_DEBUG_STACK_USAGE
 #define alloc_thread_info(tsk)                                  \
        ({                                                      \
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
index 45411a67e082..800bc0010cfb 100644
--- a/include/asm-ppc64/tlbflush.h
+++ b/include/asm-ppc64/tlbflush.h
@@ -20,10 +20,8 @@
 struct mm_struct;
 struct ppc64_tlb_batch {
        unsigned long index;
-        unsigned long context;
        struct mm_struct *mm;
        pte_t pte[PPC64_TLB_BATCH_NR];
-        unsigned long addr[PPC64_TLB_BATCH_NR];
        unsigned long vaddr[PPC64_TLB_BATCH_NR];
 };
 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
@@ -47,8 +45,7 @@ static inline void flush_tlb_pending(void)
 #define flush_tlb_kernel_range(start, end)      flush_tlb_pending()
 #define flush_tlb_pgtables(mm, start, end)      do { } while (0)
-extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
+extern void flush_hash_page(unsigned long va, pte_t pte, int local);
-                            int local);
+void flush_hash_range(unsigned long number, int local);
-void flush_hash_range(unsigned long context, unsigned long number, int local);
 #endif /* _PPC64_TLBFLUSH_H */