diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/pci-bridge.h | 16 | ||||
-rw-r--r-- | include/linux/pci_ids.h | 17 |
2 files changed, 30 insertions, 3 deletions
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index e72c2a60853c..d53e0eb1de16 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h | |||
@@ -45,10 +45,17 @@ struct pci_controller { | |||
45 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS | 45 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS |
46 | * to determine which bus number to match on when generating type0 | 46 | * to determine which bus number to match on when generating type0 |
47 | * config cycles | 47 | * config cycles |
48 | * NO_PCIE_LINK - the Freescale PCI-e controllers have issues with | ||
49 | * hanging if we don't have link and try to do config cycles to | ||
50 | * anything but the PHB. Only allow talking to the PHB if this is | ||
51 | * set. | ||
52 | * BIG_ENDIAN - cfg_addr is a big endian register | ||
48 | */ | 53 | */ |
49 | #define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) | 54 | #define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) |
50 | #define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) | 55 | #define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) |
51 | #define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) | 56 | #define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) |
57 | #define PPC_INDIRECT_TYPE_NO_PCIE_LINK (0x00000008) | ||
58 | #define PPC_INDIRECT_TYPE_BIG_ENDIAN (0x00000010) | ||
52 | u32 indirect_type; | 59 | u32 indirect_type; |
53 | 60 | ||
54 | /* Currently, we limit ourselves to 1 IO range and 3 mem | 61 | /* Currently, we limit ourselves to 1 IO range and 3 mem |
@@ -79,11 +86,14 @@ int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn, | |||
79 | int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn, | 86 | int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn, |
80 | int where, u32 val); | 87 | int where, u32 val); |
81 | 88 | ||
82 | extern void setup_indirect_pci_nomap(struct pci_controller* hose, | 89 | extern int early_find_capability(struct pci_controller *hose, int bus, |
83 | void __iomem *cfg_addr, void __iomem *cfg_data); | 90 | int dev_fn, int cap); |
91 | |||
84 | extern void setup_indirect_pci(struct pci_controller* hose, | 92 | extern void setup_indirect_pci(struct pci_controller* hose, |
85 | u32 cfg_addr, u32 cfg_data); | 93 | u32 cfg_addr, u32 cfg_data, u32 flags); |
86 | extern void setup_grackle(struct pci_controller *hose); | 94 | extern void setup_grackle(struct pci_controller *hose); |
95 | extern void __init update_bridge_resource(struct pci_dev *dev, | ||
96 | struct resource *res); | ||
87 | 97 | ||
88 | #else | 98 | #else |
89 | 99 | ||
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 42d3278c6b56..dc41ad4203b8 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2079,6 +2079,23 @@ | |||
2079 | #define PCI_VENDOR_ID_TDI 0x192E | 2079 | #define PCI_VENDOR_ID_TDI 0x192E |
2080 | #define PCI_DEVICE_ID_TDI_EHCI 0x0101 | 2080 | #define PCI_DEVICE_ID_TDI_EHCI 0x0101 |
2081 | 2081 | ||
2082 | #define PCI_VENDOR_ID_FREESCALE 0x1957 | ||
2083 | #define PCI_DEVICE_ID_MPC8548E 0x0012 | ||
2084 | #define PCI_DEVICE_ID_MPC8548 0x0013 | ||
2085 | #define PCI_DEVICE_ID_MPC8543E 0x0014 | ||
2086 | #define PCI_DEVICE_ID_MPC8543 0x0015 | ||
2087 | #define PCI_DEVICE_ID_MPC8547E 0x0018 | ||
2088 | #define PCI_DEVICE_ID_MPC8545E 0x0019 | ||
2089 | #define PCI_DEVICE_ID_MPC8545 0x001a | ||
2090 | #define PCI_DEVICE_ID_MPC8568E 0x0020 | ||
2091 | #define PCI_DEVICE_ID_MPC8568 0x0021 | ||
2092 | #define PCI_DEVICE_ID_MPC8567E 0x0022 | ||
2093 | #define PCI_DEVICE_ID_MPC8567 0x0023 | ||
2094 | #define PCI_DEVICE_ID_MPC8544E 0x0030 | ||
2095 | #define PCI_DEVICE_ID_MPC8544 0x0031 | ||
2096 | #define PCI_DEVICE_ID_MPC8641 0x7010 | ||
2097 | #define PCI_DEVICE_ID_MPC8641D 0x7011 | ||
2098 | |||
2082 | #define PCI_VENDOR_ID_PASEMI 0x1959 | 2099 | #define PCI_VENDOR_ID_PASEMI 0x1959 |
2083 | 2100 | ||
2084 | #define PCI_VENDOR_ID_ATTANSIC 0x1969 | 2101 | #define PCI_VENDOR_ID_ATTANSIC 0x1969 |