104 files changed, 1768 insertions, 1587 deletions
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h
index 286e1d844f63..544c69af8168 100644
--- a/include/asm-alpha/smp.h
+++ b/include/asm-alpha/smp.h
@@ -47,12 +47,13 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
 extern int smp_num_cpus;
 #define cpu_possible_map        cpu_present_map
-int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #else /* CONFIG_SMP */
 #define hard_smp_processor_id()         0
-#define smp_call_function_on_cpu(func,info,retry,wait,cpu)    ({ 0; })
+#define smp_call_function_on_cpu(func,info,wait,cpu)    ({ 0; })
 #endif /* CONFIG_SMP */
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index af99636db400..7fffa2404b8e 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -101,6 +101,9 @@ extern void platform_cpu_die(unsigned int cpu);
 extern int platform_cpu_kill(unsigned int cpu);
 extern void platform_cpu_enable(unsigned int cpu);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 /*
 * Local timer interrupt handling function (can be IPI'ed).
 */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 4fce3db2cecc..ef87f889ef62 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -195,7 +195,6 @@ static inline int pmd_none_or_clear_bad(pmd_t *pmd)
        }
        return 0;
 }
-#endif /* CONFIG_MMU */
 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
                                             unsigned long addr,
@@ -253,6 +252,7 @@ static inline void ptep_modify_prot_commit(struct mm_struct *mm,
        __ptep_modify_prot_commit(mm, addr, ptep, pte);
 }
 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
+#endif /* CONFIG_MMU */
 /*
 * A facility to provide lazy MMU batching.  This allows PTE updates and
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index bf2851f93937..b20409404c7d 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -88,6 +88,13 @@
                VMLINUX_SYMBOL(__end_pci_fixups_resume) = .;            \
        }                                                               \
                                                                        \
+        /* Built-in firmware blobs */                                   \
+        .builtin_fw        : AT(ADDR(.builtin_fw) - LOAD_OFFSET) {      \
+                VMLINUX_SYMBOL(__start_builtin_fw) = .;                 \
+                *(.builtin_fw)                                          \
+                VMLINUX_SYMBOL(__end_builtin_fw) = .;                   \
+        }                                                               \
+                                                                        \
        /* RapidIO route ops */                                         \
        .rio_route        : AT(ADDR(.rio_route) - LOAD_OFFSET) {        \
                VMLINUX_SYMBOL(__start_rio_route_ops) = .;              \
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index ec5f355fb7e3..27731e032ee9 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -38,9 +38,6 @@ ia64_get_lid (void)
        return lid.f.id << 8 | lid.f.eid;
 }
-extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
-                                  void *info, int wait);
 #define hard_smp_processor_id()         ia64_get_lid()
 #ifdef CONFIG_SMP
@@ -124,11 +121,12 @@ extern void __init init_smp_config (void);
 extern void smp_do_timer (struct pt_regs *regs);
 extern void smp_send_reschedule (int cpu);
-extern void lock_ipi_calllock(void);
-extern void unlock_ipi_calllock(void);
 extern void identify_siblings (struct cpuinfo_ia64 *);
 extern int is_multithreading_enabled(void);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #else /* CONFIG_SMP */
 #define cpu_logical_id(i)               0
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h
index 078e1a51a042..c5dd66916692 100644
--- a/include/asm-m32r/smp.h
+++ b/include/asm-m32r/smp.h
@@ -89,6 +89,9 @@ static __inline__ unsigned int num_booting_cpus(void)
 extern void smp_send_timer(void);
 extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #endif  /* not __ASSEMBLY__ */
 #define NO_PROC_ID (0xff)       /* No processor magic marker */
@@ -104,6 +107,7 @@ extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
 #define LOCAL_TIMER_IPI         (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
 #define INVALIDATE_CACHE_IPI    (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
 #define CPU_BOOT_IPI            (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
+#define CALL_FUNC_SINGLE_IPI    (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
 #define IPI_SHIFT       (0)
 #define NR_IPIS         (8)
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index 9d8cfbb5e796..8e9ac313ca3b 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -92,11 +92,25 @@
 #define fast_wmb()      __sync()
 #define fast_rmb()      __sync()
 #define fast_mb()       __sync()
+#ifdef CONFIG_SGI_IP28
+#define fast_iob()                              \
+        __asm__ __volatile__(                   \
+                ".set   push\n\t"               \
+                ".set   noreorder\n\t"          \
+                "lw     $0,%0\n\t"              \
+                "sync\n\t"                      \
+                "lw     $0,%0\n\t"              \
+                ".set   pop"                    \
+                : /* no output */               \
+                : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
+                : "memory")
+#else
 #define fast_iob()                              \
        do {                                    \
                __sync();                       \
                __fast_iob();                   \
        } while (0)
+#endif
 #ifdef CONFIG_CPU_HAS_WB
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 642724734eba..9a7274ba6a0b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                "2:     b       1b                                      \n"
                "       .previous                                       \n"
                : "=&r" (temp), "=m" (*m)
-                : "ir" (bit), "m" (*m), "r" (~0));
+                : "i" (bit), "m" (*m), "r" (~0));
 #endif /* CONFIG_CPU_MIPSR2 */
        } else if (cpu_has_llsc) {
                __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                "2:     b       1b                                      \n"
                "       .previous                                       \n"
                : "=&r" (temp), "=m" (*m)
-                : "ir" (bit), "m" (*m));
+                : "i" (bit), "m" (*m));
 #endif /* CONFIG_CPU_MIPSR2 */
        } else if (cpu_has_llsc) {
                __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr,
                "2:     b       1b                                      \n"
                "       .previous                                       \n"
                : "=&r" (temp), "=m" (*m), "=&r" (res)
-                : "ri" (bit), "m" (*m)
+                : "i" (bit), "m" (*m)
                : "memory");
 #endif
        } else if (cpu_has_llsc) {
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index e031bdff9920..d39e143b4a3c 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -26,13 +26,6 @@
 #define  MACH_UNKNOWN           0       /* whatever...                  */
 /*
- * Valid machtype values for group JAZZ
- */
-#define  MACH_ACER_PICA_61      0       /* Acer PICA-61 (PICA1)         */
-#define  MACH_MIPS_MAGNUM_4000  1       /* Mips Magnum 4000 "RC4030"    */
-#define  MACH_OLIVETTI_M700     2       /* Olivetti M700-10 (-15 ??)    */
-/*
 * Valid machtype for group DEC
 */
 #define  MACH_DSUNKNOWN         0
@@ -48,42 +41,6 @@
 #define  MACH_DS5900            10      /* DECsystem 5900               */
 /*
- * Valid machtype for group SNI_RM
- */
-#define  MACH_SNI_RM200_PCI     0       /* RM200/RM300/RM400 PCI series */
-/*
- * Valid machtype for group SGI
- */
-#define  MACH_SGI_IP22          0       /* Indy, Indigo2, Challenge S   */
-#define  MACH_SGI_IP27          1       /* Origin 200, Origin 2000, Onyx 2 */
-#define  MACH_SGI_IP28          2       /* Indigo2 Impact               */
-#define  MACH_SGI_IP32          3       /* O2                           */
-#define  MACH_SGI_IP30          4       /* Octane, Octane2              */
-/*
- * Valid machtypes for group Toshiba
- */
-#define  MACH_PALLAS            0
-#define  MACH_TOPAS             1
-#define  MACH_JMR               2
-#define  MACH_TOSHIBA_JMR3927   3       /* JMR-TX3927 CPU/IO board */
-#define  MACH_TOSHIBA_RBTX4927  4
-#define  MACH_TOSHIBA_RBTX4937  5
-#define  MACH_TOSHIBA_RBTX4938  6
-/*
- * Valid machtype for group LASAT
- */
-#define  MACH_LASAT_100         0       /* Masquerade II/SP100/SP50/SP25 */
-#define  MACH_LASAT_200         1       /* Masquerade PRO/SP200 */
-/*
- * Valid machtype for group NEC EMMA2RH
- */
-#define  MACH_NEC_MARKEINS      0       /* NEC EMMA2RH Mark-eins        */
-/*
 * Valid machtype for group PMC-MSP
 */
 #define MACH_MSP4200_EVAL       0       /* PMC-Sierra MSP4200 Evaluation */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac6f35b..229a786101d9 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
 #define PRID_IMP_RM7000         0x2700
 #define PRID_IMP_NEVADA         0x2800          /* RM5260 ??? */
 #define PRID_IMP_RM9000         0x3400
+#define PRID_IMP_LOONGSON1      0x4200
 #define PRID_IMP_R5432          0x5400
 #define PRID_IMP_R5500          0x5500
+#define PRID_IMP_LOONGSON2      0x6300
 #define PRID_IMP_UNKNOWN        0xff00
@@ -90,8 +92,6 @@
 #define PRID_IMP_24KE           0x9600
 #define PRID_IMP_74K            0x9700
 #define PRID_IMP_1004K          0x9900
-#define PRID_IMP_LOONGSON1      0x4200
-#define PRID_IMP_LOONGSON2      0x6300
 /*
 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h
index 15fe8f881e60..56d22dc8803a 100644
--- a/include/asm-mips/dec/kn05.h
+++ b/include/asm-mips/dec/kn05.h
@@ -6,7 +6,7 @@
 *      KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
 *      definitions.
 *
- *      Copyright (C) 2002, 2003, 2005  Maciej W. Rozycki
+ *      Copyright (C) 2002, 2003, 2005, 2008  Maciej W. Rozycki
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
@@ -54,11 +54,11 @@
 */
 #define KN4K_MB_INT_TC          (1<<0)          /* TURBOchannel? */
 #define KN4K_MB_INT_RTC         (1<<1)          /* RTC? */
-#define KN4K_MB_INT_MT          (1<<3)          /* ??? */
+#define KN4K_MB_INT_MT          (1<<3)          /* I/O ASIC cascade */
 /*
 * Bits for the MB control & status register.
- * Set to 0x00bf8001 on my system by the ROM.
+ * Set to 0x00bf8001 for KN05 and to 0x003f8000 for KN04 by the firmware.
 */
 #define KN4K_MB_CSR_PF          (1<<0)          /* PreFetching enable? */
 #define KN4K_MB_CSR_F           (1<<1)          /* ??? */
@@ -69,7 +69,8 @@
 #define KN4K_MB_CSR_IM          (1<<13)         /* ??? */
 #define KN4K_MB_CSR_NC          (1<<14)         /* ??? */
 #define KN4K_MB_CSR_EE          (1<<15)         /* (bus) Exception Enable? */
-#define KN4K_MB_CSR_MSK         (0x1f<<16)      /* ??? */
+#define KN4K_MB_CSR_MSK         (0x1f<<16)      /* CPU Int[4:0] mask */
 #define KN4K_MB_CSR_FW          (1<<21)         /* ??? */
+#define KN4K_MB_CSR_W           (1<<31)         /* ??? */
 #endif /* __ASM_MIPS_DEC_KN05_H */
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
deleted file mode 100644
index cc88aed23f0f..000000000000
--- a/include/asm-mips/inventory.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Miguel de Icaza
- */
-#ifndef __ASM_INVENTORY_H
-#define __ASM_INVENTORY_H
-#include <linux/compiler.h>
-typedef struct inventory_s {
-        struct inventory_s *inv_next;
-        int    inv_class;
-        int    inv_type;
-        int    inv_controller;
-        int    inv_unit;
-        int    inv_state;
-} inventory_t;
-extern int inventory_items;
-extern void add_to_inventory(int class, int type, int controller, int unit, int state);
-extern int dump_inventory_to_user(void __user *userbuf, int size);
-extern int __init init_inventory(void);
-#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d2816cbec..501a40b9f18d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
 #define bus_to_virt phys_to_virt
 /*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.  This implies the assumption that there is only
- * one of these busses.
- */
-extern unsigned long isa_slot_offset;
-/*
 * Change "struct page" to physical address.
 */
 #define page_to_phys(page)      ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
 }
 /*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define __ISA_IO_base ((char *)(isa_slot_offset))
-/*
 * The caches on some architectures aren't dma-coherent and have need to
 * handle this in software.  There are three types of operations that
 * can be applied to dma buffers.
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
index ea04d9262edc..caeba1e302a2 100644
--- a/include/asm-mips/lasat/lasat.h
+++ b/include/asm-mips/lasat/lasat.h
@@ -240,6 +240,8 @@ static inline void lasat_ndelay(unsigned int ns)
        __delay(ns / lasat_ndelay_divider);
 }
+#define IS_LASAT_200()     (current_cpu_data.cputype == CPU_R5000)
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 #define LASAT_SERVICEMODE_MAGIC_1     0xdeadbeef
diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h
deleted file mode 100644
index 51d337e1bbd1..000000000000
--- a/include/asm-mips/mach-atlas/mc146818rtc.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2005  MIPS Technologies, Inc.
- *      All rights reserved.
- *      Authors: Carsten Langgaard <carstenl@mips.com>
- *               Maciej W. Rozycki <macro@mips.com>
- * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
-#define __ASM_MACH_ATLAS_MC146818RTC_H
-#include <linux/types.h>
-#include <asm/addrspace.h>
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#define ARCH_RTC_LOCATION
-#define RTC_PORT(x)     (ATLAS_RTC_ADR_REG + (x) * 8)
-#define RTC_IO_EXTENT   0x100
-#define RTC_IOMAPPED    0
-#define RTC_IRQ         ATLAS_INT_RTC
-static inline unsigned char CMOS_READ(unsigned long addr)
-{
-        volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
-        volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-        *ireg = addr;
-        return *dreg;
-}
-static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
-{
-        volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
-        volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-        *ireg = addr;
-        *dreg = data;
-}
-#define RTC_ALWAYS_BCD  0
-#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
-#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 612ae90dbcb8..1a515b8c870f 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -146,51 +146,6 @@ typedef volatile struct
        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
 /*
- * SD controller macros
- */
-/* Detect card. */
-#define mmc_card_inserted(_n_, _res_) \
-        do { \
-                BCSR * const bcsr = (BCSR *)0xAE000000; \
-                unsigned long mmc_wp, board_specific; \
-                if ((_n_)) { \
-                        mmc_wp = BCSR_BOARD_SD1_WP; \
-                } else { \
-                        mmc_wp = BCSR_BOARD_SD0_WP; \
-                } \
-                board_specific = au_readl((unsigned long)(&bcsr->specific)); \
-                if (!(board_specific & mmc_wp)) {/* low means card present */ \
-                        *(int *)(_res_) = 1; \
-                } else { \
-                        *(int *)(_res_) = 0; \
-                } \
-        } while (0)
-/*
- * Apply power to card slot(s).
- */
-#define mmc_power_on(_n_) \
-        do { \
-                BCSR * const bcsr = (BCSR *)0xAE000000; \
-                unsigned long mmc_pwr, mmc_wp, board_specific; \
-                if ((_n_)) { \
-                        mmc_pwr = BCSR_BOARD_SD1_PWR; \
-                        mmc_wp  = BCSR_BOARD_SD1_WP; \
-                } else { \
-                        mmc_pwr = BCSR_BOARD_SD0_PWR; \
-                        mmc_wp  = BCSR_BOARD_SD0_WP; \
-                } \
-                board_specific = au_readl((unsigned long)(&bcsr->specific)); \
-                if (!(board_specific & mmc_wp)) {/* low means card present */ \
-                        board_specific |= mmc_pwr; \
-                        au_writel(board_specific, (int)(&bcsr->specific)); \
-                        au_sync(); \
-                } \
-        } while (0)
-/*
 * NAND defines
 *
 * Timing values as described in databook, * ns value stripped of the
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-malta/cpu-feature-overrides.h
index 7f3e3f9bd23a..7f3e3f9bd23a 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-malta/cpu-feature-overrides.h
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-malta/irq.h
index 9b9da26683c2..9b9da26683c2 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-malta/irq.h
diff --git a/include/asm-mips/mach-mips/kernel-entry-init.h b/include/asm-mips/mach-malta/kernel-entry-init.h
index 0b793e7bf67e..0b793e7bf67e 100644
--- a/include/asm-mips/mach-mips/kernel-entry-init.h
+++ b/include/asm-mips/mach-malta/kernel-entry-init.h
diff --git a/include/asm-mips/mach-mips/mach-gt64120.h b/include/asm-mips/mach-malta/mach-gt64120.h
index 0f863148f3b6..0f863148f3b6 100644
--- a/include/asm-mips/mach-mips/mach-gt64120.h
+++ b/include/asm-mips/mach-malta/mach-gt64120.h
diff --git a/include/asm-mips/mach-mips/mc146818rtc.h b/include/asm-mips/mach-malta/mc146818rtc.h
index ea612f37f614..ea612f37f614 100644
--- a/include/asm-mips/mach-mips/mc146818rtc.h
+++ b/include/asm-mips/mach-malta/mc146818rtc.h
diff --git a/include/asm-mips/mach-mips/war.h b/include/asm-mips/mach-malta/war.h
index 7c6931d5f45f..7c6931d5f45f 100644
--- a/include/asm-mips/mach-mips/war.h
+++ b/include/asm-mips/mach-malta/war.h
diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-tx39xx/ioremap.h
index 29989ff10d66..93c6c04ffda3 100644
--- a/include/asm-mips/mach-jmr3927/ioremap.h
+++ b/include/asm-mips/mach-tx39xx/ioremap.h
@@ -1,13 +1,13 @@
 /*
- *      include/asm-mips/mach-jmr3927/ioremap.h
+ *      include/asm-mips/mach-tx39xx/ioremap.h
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */
-#ifndef __ASM_MACH_JMR3927_IOREMAP_H
+#ifndef __ASM_MACH_TX39XX_IOREMAP_H
-#define __ASM_MACH_JMR3927_IOREMAP_H
+#define __ASM_MACH_TX39XX_IOREMAP_H
 #include <linux/types.h>
@@ -35,4 +35,4 @@ static inline int plat_iounmap(const volatile void __iomem *addr)
        return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
 }
-#endif /* __ASM_MACH_JMR3927_IOREMAP_H */
+#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-tx39xx/mangle-port.h
index 11bffcd1043b..ef0b502fd8b7 100644
--- a/include/asm-mips/mach-jmr3927/mangle-port.h
+++ b/include/asm-mips/mach-tx39xx/mangle-port.h
@@ -1,7 +1,12 @@
-#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H
+#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
-#define __ASM_MACH_JMR3927_MANGLE_PORT_H
+#define __ASM_MACH_TX39XX_MANGLE_PORT_H
-extern unsigned long __swizzle_addr_b(unsigned long port);
+#if defined(CONFIG_TOSHIBA_JMR3927)
+extern unsigned long (*__swizzle_addr_b)(unsigned long port);
+#define NEEDS_TXX9_SWIZZLE_ADDR_B
+#else
+#define __swizzle_addr_b(port)  (port)
+#endif
 #define __swizzle_addr_w(port)  (port)
 #define __swizzle_addr_l(port)  (port)
 #define __swizzle_addr_q(port)  (port)
@@ -15,4 +20,4 @@ extern unsigned long __swizzle_addr_b(unsigned long port);
 #define ioswabq(a, x)           le64_to_cpu(x)
 #define __mem_ioswabq(a, x)     (x)
-#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */
+#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-jmr3927/war.h b/include/asm-mips/mach-tx39xx/war.h
index 1ff55fb3fbcb..433814616359 100644
--- a/include/asm-mips/mach-jmr3927/war.h
+++ b/include/asm-mips/mach-tx39xx/war.h
@@ -5,8 +5,8 @@
 *
 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
 */
-#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H
+#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
-#define __ASM_MIPS_MACH_JMR3927_WAR_H
+#define __ASM_MIPS_MACH_TX39XX_WAR_H
 #define R4600_V1_INDEX_ICACHEOP_WAR     0
 #define R4600_V1_HIT_CACHEOP_WAR        0
@@ -22,4 +22,4 @@
 #define R10000_LLSC_WAR                 0
 #define MIPS34K_MISSED_ITLB_WAR         0
-#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */
+#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h
index 848812296052..862058d3f81b 100644
--- a/include/asm-mips/mach-vr41xx/irq.h
+++ b/include/asm-mips/mach-vr41xx/irq.h
@@ -2,9 +2,6 @@
 #define __ASM_MACH_VR41XX_IRQ_H
 #include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
-#ifdef CONFIG_NEC_CMBVR4133
-#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
-#endif
 #include_next <irq.h>
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 33407bee4e73..7f0b034dd9a5 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -27,12 +27,8 @@
 /*
 * Display register base.
 */
-#ifdef CONFIG_MIPS_SEAD
-#define ASCII_DISPLAY_POS_BASE     0x1f0005c0
-#else
 #define ASCII_DISPLAY_WORD_BASE    0x1f000410
 #define ASCII_DISPLAY_POS_BASE     0x1f000418
-#endif
 /*
@@ -44,13 +40,8 @@
 /*
 * Reset register.
 */
-#ifdef CONFIG_MIPS_SEAD
-#define SOFTRES_REG       0x1e800050
-#define GORESET           0x4d
-#else
 #define SOFTRES_REG       0x1f000500
 #define GORESET           0x42
-#endif
 /*
 * Revision register.
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index c94d12d1f868..a6605a752469 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -1,26 +1,11 @@
 #ifndef _ASM_NAMEI_H
 #define _ASM_NAMEI_H
-#include <linux/personality.h>
+/*
-#include <linux/stddef.h>
+ * This dummy routine maybe changed to something useful
+ * for /usr/gnemul/ emulation stuff.
+ */
-#define IRIX_EMUL       "/usr/gnemul/irix/"
+#define __emul_prefix() NULL
-#define RISCOS_EMUL     "/usr/gnemul/riscos/"
-static inline char *__emul_prefix(void)
-{
-        switch (current->personality) {
-        case PER_IRIX32:
-        case PER_IRIXN32:
-        case PER_IRIX64:
-                return IRIX_EMUL;
-        case PER_RISCOS:
-                return RISCOS_EMUL;
-        default:
-                return NULL;
-        }
-}
 #endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 301ff2f28012..d3be83436070 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -172,4 +172,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
        return channel ? 15 : 14;
 }
+extern int pci_probe_only;
+extern unsigned int pcibios_max_latency;
 #endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
deleted file mode 100644
index 8121a9a75bfd..000000000000
--- a/include/asm-mips/prctl.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * IRIX prctl interface
- *
- * The IRIX kernel maps a page at PRDA_ADDRESS with the
- * contents of prda and fills it the bits on prda_sys.
- */
-#ifndef __PRCTL_H__
-#define __PRCTL_H__
-#define PRDA_ADDRESS 0x200000L
-#define PRDA ((struct prda *) PRDA_ADDRESS)
-struct prda_sys {
-        pid_t t_pid;
-        u32   t_hint;
-        u32   t_dlactseq;
-        u32   t_fpflags;
-        u32   t_prid;           /* processor type, $prid CP0 register */
-        u32   t_dlendseq;
-        u64   t_unused1[5];
-        pid_t t_rpid;
-        s32   t_resched;
-        u32   t_unused[8];
-        u32   t_cpu;            /* current/last cpu */
-        /* FIXME: The signal information, not supported by Linux now */
-        u32   t_flags;          /* if true, then the sigprocmask is in userspace */
-        u32   t_sigprocmask [1]; /* the sigprocmask */
-};
-struct prda {
-        char fill [0xe00];
-        struct prda_sys prda_sys;
-};
-#define t_sys           prda_sys
-ptrdiff_t prctl(int op, int v1, int v2);
-#endif
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
index 70009a902639..883f59bfa097 100644
--- a/include/asm-mips/setup.h
+++ b/include/asm-mips/setup.h
@@ -3,4 +3,6 @@
 #define COMMAND_LINE_SIZE       256
+extern void setup_early_printk(void);
 #endif /* __SETUP_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 7a28989f7ee3..bee5153aca48 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -119,9 +119,6 @@ struct sigaction {
 struct k_sigaction {
        struct sigaction sa;
-#ifdef CONFIG_BINFMT_IRIX
-        void            (*sa_restorer)(void);
-#endif
 };
 /* IRIX compatible stack_t  */
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 84fef1aeec0c..0ff5b523ea77 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -35,16 +35,6 @@ extern int __cpu_logical_map[NR_CPUS];
 #define NO_PROC_ID      (-1)
-struct call_data_struct {
-        void            (*func)(void *);
-        void            *info;
-        atomic_t        started;
-        atomic_t        finished;
-        int             wait;
-};
-extern struct call_data_struct *call_data;
 #define SMP_RESCHEDULE_YOURSELF 0x1     /* XXX braindead */
 #define SMP_CALL_FUNCTION       0x2
@@ -67,4 +57,7 @@ static inline void smp_send_reschedule(int cpu)
 extern asmlinkage void smp_call_function_interrupt(void);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #endif /* __ASM_SMP_H */
diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h
index e5dbde625ec2..90ff2f497c50 100644
--- a/include/asm-mips/traps.h
+++ b/include/asm-mips/traps.h
@@ -24,6 +24,5 @@ extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
 extern void (*board_nmi_handler_setup)(void);
 extern void (*board_ejtag_handler_setup)(void);
 extern void (*board_bind_eic_interrupt)(int irq, int regset);
-extern void (*board_watchpoint_handler)(struct pt_regs *regs);
 #endif /* _ASM_TRAPS_H */
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
deleted file mode 100644
index 193e80a17c12..000000000000
--- a/include/asm-mips/tx4927/tx4927.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Author: MontaVista Software, Inc.
- *         source@mvista.com
- *
- * Copyright 2001-2006 MontaVista Software Inc.
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TX4927_TX4927_H
-#define __ASM_TX4927_TX4927_H
-#include <asm/txx9irq.h>
-#define TX4927_IRQ_CP0_BEG  MIPS_CPU_IRQ_BASE
-#define TX4927_IRQ_CP0_END  (MIPS_CPU_IRQ_BASE + 8 - 1)
-#define TX4927_IRQ_PIC_BEG  TXX9_IRQ_BASE
-#define TX4927_IRQ_PIC_END  (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-#define TX4927_IRQ_USER0            (TX4927_IRQ_CP0_BEG+0)
-#define TX4927_IRQ_USER1            (TX4927_IRQ_CP0_BEG+1)
-#define TX4927_IRQ_NEST_PIC_ON_CP0  (TX4927_IRQ_CP0_BEG+2)
-#define TX4927_IRQ_CPU_TIMER        (TX4927_IRQ_CP0_BEG+7)
-#define TX4927_IRQ_NEST_EXT_ON_PIC  (TX4927_IRQ_PIC_BEG+3)
-#endif /* __ASM_TX4927_TX4927_H */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
deleted file mode 100644
index 0be77df70f2b..000000000000
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- */
-#ifndef __ASM_TX4927_TX4927_PCI_H
-#define __ASM_TX4927_TX4927_PCI_H
-#define TX4927_CCFG_TOE 0x00004000
-#define TX4927_CCFG_WR  0x00008000
-#define TX4927_CCFG_TINTDIS     0x01000000
-#define TX4927_PCIMEM      0x08000000
-#define TX4927_PCIMEM_SIZE 0x08000000
-#define TX4927_PCIIO       0x16000000
-#define TX4927_PCIIO_SIZE  0x01000000
-#define TX4927_SDRAMC_REG       0xff1f8000
-#define TX4927_EBUSC_REG        0xff1f9000
-#define TX4927_PCIC_REG         0xff1fd000
-#define TX4927_CCFG_REG         0xff1fe000
-#define TX4927_IRC_REG          0xff1ff600
-#define TX4927_NR_TMR   3
-#define TX4927_TMR_REG(ch)      (0xff1ff000 + (ch) * 0x100)
-#define TX4927_CE3      0x17f00000      /* 1M */
-#define TX4927_PCIRESET_ADDR    0xbc00f006
-#define TX4927_PCI_CLK_ADDR     (KSEG1 + TX4927_CE3 + 0x00040020)
-#define TX4927_IMSTAT_ADDR(n)   (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
-#define tx4927_imstat_ptr(n)    \
-        ((volatile unsigned char *)TX4927_IMSTAT_ADDR(n))
-/* bits for ISTAT3/IMASK3/IMSTAT3 */
-#define TX4927_INT3B_PCID       0
-#define TX4927_INT3B_PCIC       1
-#define TX4927_INT3B_PCIB       2
-#define TX4927_INT3B_PCIA       3
-#define TX4927_INT3F_PCID       (1 << TX4927_INT3B_PCID)
-#define TX4927_INT3F_PCIC       (1 << TX4927_INT3B_PCIC)
-#define TX4927_INT3F_PCIB       (1 << TX4927_INT3B_PCIB)
-#define TX4927_INT3F_PCIA       (1 << TX4927_INT3B_PCIA)
-/* bits for PCI_CLK (S6) */
-#define TX4927_PCI_CLK_HOST     0x80
-#define TX4927_PCI_CLK_MASK     (0x0f << 3)
-#define TX4927_PCI_CLK_33       (0x01 << 3)
-#define TX4927_PCI_CLK_25       (0x04 << 3)
-#define TX4927_PCI_CLK_66       (0x09 << 3)
-#define TX4927_PCI_CLK_50       (0x0c << 3)
-#define TX4927_PCI_CLK_ACK      0x04
-#define TX4927_PCI_CLK_ACE      0x02
-#define TX4927_PCI_CLK_ENDIAN   0x01
-#define TX4927_NR_IRQ_LOCAL     TX4927_IRQ_PIC_BEG
-#define TX4927_NR_IRQ_IRC       32      /* On-Chip IRC */
-#define TX4927_IR_PCIC          16
-#define TX4927_IR_PCIERR        22
-#define TX4927_IR_PCIPMA        23
-#define TX4927_IRQ_IRC_PCIC     (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIC)
-#define TX4927_IRQ_IRC_PCIERR   (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIERR)
-#define TX4927_IRQ_IOC1         (TX4927_NR_IRQ_LOCAL + TX4927_NR_IRQ_IRC)
-#define TX4927_IRQ_IOC_PCID     (TX4927_IRQ_IOC1 + TX4927_INT3B_PCID)
-#define TX4927_IRQ_IOC_PCIC     (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIC)
-#define TX4927_IRQ_IOC_PCIB     (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIB)
-#define TX4927_IRQ_IOC_PCIA     (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIA)
-#ifdef _LANGUAGE_ASSEMBLY
-#define _CONST64(c)     c
-#else
-#define _CONST64(c)     c##ull
-#include <asm/byteorder.h>
-#define tx4927_pcireset_ptr     \
-        ((volatile unsigned char *)TX4927_PCIRESET_ADDR)
-#define tx4927_pci_clk_ptr      \
-        ((volatile unsigned char *)TX4927_PCI_CLK_ADDR)
-struct tx4927_sdramc_reg {
-        volatile unsigned long long cr[4];
-        volatile unsigned long long unused0[4];
-        volatile unsigned long long tr;
-        volatile unsigned long long unused1[2];
-        volatile unsigned long long cmd;
-};
-struct tx4927_ebusc_reg {
-        volatile unsigned long long cr[8];
-};
-struct tx4927_ccfg_reg {
-        volatile unsigned long long ccfg;
-        volatile unsigned long long crir;
-        volatile unsigned long long pcfg;
-        volatile unsigned long long tear;
-        volatile unsigned long long clkctr;
-        volatile unsigned long long unused0;
-        volatile unsigned long long garbc;
-        volatile unsigned long long unused1;
-        volatile unsigned long long unused2;
-        volatile unsigned long long ramp;
-};
-struct tx4927_pcic_reg {
-        volatile unsigned long pciid;
-        volatile unsigned long pcistatus;
-        volatile unsigned long pciccrev;
-        volatile unsigned long pcicfg1;
-        volatile unsigned long p2gm0plbase;             /* +10 */
-        volatile unsigned long p2gm0pubase;
-        volatile unsigned long p2gm1plbase;
-        volatile unsigned long p2gm1pubase;
-        volatile unsigned long p2gm2pbase;              /* +20 */
-        volatile unsigned long p2giopbase;
-        volatile unsigned long unused0;
-        volatile unsigned long pcisid;
-        volatile unsigned long unused1;         /* +30 */
-        volatile unsigned long pcicapptr;
-        volatile unsigned long unused2;
-        volatile unsigned long pcicfg2;
-        volatile unsigned long g2ptocnt;                /* +40 */
-        volatile unsigned long unused3[15];
-        volatile unsigned long g2pstatus;               /* +80 */
-        volatile unsigned long g2pmask;
-        volatile unsigned long pcisstatus;
-        volatile unsigned long pcimask;
-        volatile unsigned long p2gcfg;          /* +90 */
-        volatile unsigned long p2gstatus;
-        volatile unsigned long p2gmask;
-        volatile unsigned long p2gccmd;
-        volatile unsigned long unused4[24];             /* +a0 */
-        volatile unsigned long pbareqport;              /* +100 */
-        volatile unsigned long pbacfg;
-        volatile unsigned long pbastatus;
-        volatile unsigned long pbamask;
-        volatile unsigned long pbabm;           /* +110 */
-        volatile unsigned long pbacreq;
-        volatile unsigned long pbacgnt;
-        volatile unsigned long pbacstate;
-        volatile unsigned long long g2pmgbase[3];               /* +120 */
-        volatile unsigned long long g2piogbase;
-        volatile unsigned long g2pmmask[3];             /* +140 */
-        volatile unsigned long g2piomask;
-        volatile unsigned long long g2pmpbase[3];               /* +150 */
-        volatile unsigned long long g2piopbase;
-        volatile unsigned long pciccfg;         /* +170 */
-        volatile unsigned long pcicstatus;
-        volatile unsigned long pcicmask;
-        volatile unsigned long unused5;
-        volatile unsigned long long p2gmgbase[3];               /* +180 */
-        volatile unsigned long long p2giogbase;
-        volatile unsigned long g2pcfgadrs;              /* +1a0 */
-        volatile unsigned long g2pcfgdata;
-        volatile unsigned long unused6[8];
-        volatile unsigned long g2pintack;
-        volatile unsigned long g2pspc;
-        volatile unsigned long unused7[12];             /* +1d0 */
-        volatile unsigned long long pdmca;              /* +200 */
-        volatile unsigned long long pdmga;
-        volatile unsigned long long pdmpa;
-        volatile unsigned long long pdmcut;
-        volatile unsigned long long pdmcnt;             /* +220 */
-        volatile unsigned long long pdmsts;
-        volatile unsigned long long unused8[2];
-        volatile unsigned long long pdmdb[4];           /* +240 */
-        volatile unsigned long long pdmtdh;             /* +260 */
-        volatile unsigned long long pdmdms;
-};
-#endif /* _LANGUAGE_ASSEMBLY */
-/*
- * PCIC
- */
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4927_PCIC_G2PSTATUS_ALL       0x00000003
-#define TX4927_PCIC_G2PSTATUS_TTOE      0x00000002
-#define TX4927_PCIC_G2PSTATUS_RTOE      0x00000001
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4927_PCIC_PCISTATUS_ALL       0x0000f900
-/* bits for PBACFG */
-#define TX4927_PCIC_PBACFG_RPBA 0x00000004
-#define TX4927_PCIC_PBACFG_PBAEN        0x00000002
-#define TX4927_PCIC_PBACFG_BMCEN        0x00000001
-/* bits for G2PMnGBASE */
-#define TX4927_PCIC_G2PMnGBASE_BSDIS    _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PMnGBASE_ECHG     _CONST64(0x0000001000000000)
-/* bits for G2PIOGBASE */
-#define TX4927_PCIC_G2PIOGBASE_BSDIS    _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PIOGBASE_ECHG     _CONST64(0x0000001000000000)
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4927_PCIC_PCICSTATUS_ALL      0x000007dc
-/* bits for PCICCFG */
-#define TX4927_PCIC_PCICCFG_LBWC_MASK   0x0fff0000
-#define TX4927_PCIC_PCICCFG_HRST        0x00000800
-#define TX4927_PCIC_PCICCFG_SRST        0x00000400
-#define TX4927_PCIC_PCICCFG_IRBER       0x00000200
-#define TX4927_PCIC_PCICCFG_IMSE0       0x00000100
-#define TX4927_PCIC_PCICCFG_IMSE1       0x00000080
-#define TX4927_PCIC_PCICCFG_IMSE2       0x00000040
-#define TX4927_PCIC_PCICCFG_IISE        0x00000020
-#define TX4927_PCIC_PCICCFG_ATR 0x00000010
-#define TX4927_PCIC_PCICCFG_ICAE        0x00000008
-/* bits for P2GMnGBASE */
-#define TX4927_PCIC_P2GMnGBASE_TMEMEN   _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GMnGBASE_TBSDIS   _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GMnGBASE_TECHG    _CONST64(0x0000001000000000)
-/* bits for P2GIOGBASE */
-#define TX4927_PCIC_P2GIOGBASE_TIOEN    _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GIOGBASE_TBSDIS   _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GIOGBASE_TECHG    _CONST64(0x0000001000000000)
-#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad)        ((ad) - 11)
-#define TX4927_PCIC_MAX_DEVNU   TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4927_CCFG_PCI66       0x00800000
-#define TX4927_CCFG_PCIMIDE     0x00400000
-#define TX4927_CCFG_PCIXARB     0x00002000
-#define TX4927_CCFG_PCIDIVMODE_MASK     0x00001800
-#define TX4927_CCFG_PCIDIVMODE_2_5      0x00000000
-#define TX4927_CCFG_PCIDIVMODE_3        0x00000800
-#define TX4927_CCFG_PCIDIVMODE_5        0x00001000
-#define TX4927_CCFG_PCIDIVMODE_6        0x00001800
-#define TX4937_CCFG_PCIDIVMODE_MASK     0x00001c00
-#define TX4937_CCFG_PCIDIVMODE_8        0x00000000
-#define TX4937_CCFG_PCIDIVMODE_4        0x00000400
-#define TX4937_CCFG_PCIDIVMODE_9        0x00000800
-#define TX4937_CCFG_PCIDIVMODE_4_5      0x00000c00
-#define TX4937_CCFG_PCIDIVMODE_10       0x00001000
-#define TX4937_CCFG_PCIDIVMODE_5        0x00001400
-#define TX4937_CCFG_PCIDIVMODE_11       0x00001800
-#define TX4937_CCFG_PCIDIVMODE_5_5      0x00001c00
-/* PCFG : Pin Configuration */
-#define TX4927_PCFG_PCICLKEN_ALL        0x003f0000
-#define TX4927_PCFG_PCICLKEN(ch)        (0x00010000<<(ch))
-/* CLKCTR : Clock Control */
-#define TX4927_CLKCTR_PCICKD    0x00400000
-#define TX4927_CLKCTR_PCIRST    0x00000040
-#ifndef _LANGUAGE_ASSEMBLY
-#define tx4927_sdramcptr        ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
-#define tx4927_pcicptr          ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
-#define tx4927_ccfgptr          ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
-#define tx4927_ebuscptr         ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
-#endif /* _LANGUAGE_ASSEMBLY */
-#endif /* __ASM_TX4927_TX4927_PCI_H */
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
new file mode 100644
index 000000000000..d8756660523d
--- /dev/null
+++ b/include/asm-mips/txx9/generic.h
@@ -0,0 +1,41 @@
+/*
+ * linux/include/asm-mips/txx9/generic.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_GENERIC_H
+#define __ASM_TXX9_GENERIC_H
+#include <linux/init.h>
+#include <linux/ioport.h>       /* for struct resource */
+extern struct resource txx9_ce_res[];
+extern char txx9_pcode_str[8];
+void txx9_reg_res_init(unsigned int pcode, unsigned long base,
+                       unsigned long size);
+extern unsigned int txx9_master_clock;
+extern unsigned int txx9_cpu_clock;
+extern unsigned int txx9_gbus_clock;
+struct pci_dev;
+struct txx9_board_vec {
+        const char *system;
+        void (*prom_init)(void);
+        void (*mem_setup)(void);
+        void (*irq_setup)(void);
+        void (*time_init)(void);
+        void (*arch_init)(void);
+        void (*device_init)(void);
+#ifdef CONFIG_PCI
+        int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
+#endif
+};
+extern struct txx9_board_vec *txx9_board_vec;
+extern int (*txx9_irq_dispatch)(int pending);
+void prom_init_cmdline(void);
+char *prom_getcmdline(void);
+#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/txx9/jmr3927.h
index a162268f17df..d6eb1b6a54eb 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/txx9/jmr3927.h
@@ -7,10 +7,10 @@
 *
 * Copyright (C) 2000-2001 Toshiba Corporation
 */
-#ifndef __ASM_TX3927_JMR3927_H
+#ifndef __ASM_TXX9_JMR3927_H
-#define __ASM_TX3927_JMR3927_H
+#define __ASM_TXX9_JMR3927_H
-#include <asm/jmr3927/tx3927.h>
+#include <asm/txx9/tx3927.h>
 #include <asm/addrspace.h>
 #include <asm/system.h>
 #include <asm/txx9irq.h>
@@ -174,4 +174,9 @@
 *      INT[3:0]
 */
-#endif /* __ASM_TX3927_JMR3927_H */
+void jmr3927_prom_init(void);
+void jmr3927_irq_setup(void);
+struct pci_dev;
+int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+#endif /* __ASM_TXX9_JMR3927_H */
diff --git a/include/asm-mips/txx9/pci.h b/include/asm-mips/txx9/pci.h
new file mode 100644
index 000000000000..d89a45091e24
--- /dev/null
+++ b/include/asm-mips/txx9/pci.h
@@ -0,0 +1,36 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_PCI_H
+#define __ASM_TXX9_PCI_H
+#include <linux/pci.h>
+extern struct pci_controller txx9_primary_pcic;
+struct pci_controller *
+txx9_alloc_pci_controller(struct pci_controller *pcic,
+                          unsigned long mem_base, unsigned long mem_size,
+                          unsigned long io_base, unsigned long io_size);
+int txx9_pci66_check(struct pci_controller *hose, int top_bus,
+                        int current_bus);
+extern int txx9_pci_mem_high __initdata;
+extern int txx9_pci_option;
+#define TXX9_PCI_OPT_PICMG      0x0002
+#define TXX9_PCI_OPT_CLK_33     0x0008
+#define TXX9_PCI_OPT_CLK_66     0x0010
+#define TXX9_PCI_OPT_CLK_MASK   \
+        (TXX9_PCI_OPT_CLK_33 | TXX9_PCI_OPT_CLK_66)
+#define TXX9_PCI_OPT_CLK_AUTO   TXX9_PCI_OPT_CLK_MASK
+enum txx9_pci_err_action {
+        TXX9_PCI_ERR_REPORT,
+        TXX9_PCI_ERR_IGNORE,
+        TXX9_PCI_ERR_PANIC,
+};
+extern enum txx9_pci_err_action txx9_pci_err_action;
+#endif /* __ASM_TXX9_PCI_H */
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h
index b188a659ce02..bf194589216f 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/txx9/rbtx4927.h
@@ -24,18 +24,42 @@
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 */
-#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
+#ifndef __ASM_TXX9_RBTX4927_H
-#define __ASM_TX4927_TOSHIBA_RBTX4927_H
+#define __ASM_TXX9_RBTX4927_H
-#include <asm/tx4927/tx4927.h>
+#include <asm/txx9/tx4927.h>
-#ifdef CONFIG_PCI
-#include <asm/tx4927/tx4927_pci.h>
+#define RBTX4927_PCIMEM         0x08000000
-#endif
+#define RBTX4927_PCIMEM_SIZE    0x08000000
+#define RBTX4927_PCIIO          0x16000000
+#define RBTX4927_PCIIO_SIZE     0x01000000
+#define rbtx4927_pcireset_addr  ((__u8 __iomem *)0xbc00f006UL)
+/* bits for ISTAT/IMASK/IMSTAT */
+#define RBTX4927_INTB_PCID      0
+#define RBTX4927_INTB_PCIC      1
+#define RBTX4927_INTB_PCIB      2
+#define RBTX4927_INTB_PCIA      3
+#define RBTX4927_INTF_PCID      (1 << RBTX4927_INTB_PCID)
+#define RBTX4927_INTF_PCIC      (1 << RBTX4927_INTB_PCIC)
+#define RBTX4927_INTF_PCIB      (1 << RBTX4927_INTB_PCIB)
+#define RBTX4927_INTF_PCIA      (1 << RBTX4927_INTB_PCIA)
+#define RBTX4927_NR_IRQ_IOC     8       /* IOC */
+#define RBTX4927_IRQ_IOC        (TXX9_IRQ_BASE + TX4927_NUM_IR)
+#define RBTX4927_IRQ_IOC_PCID   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
+#define RBTX4927_IRQ_IOC_PCIC   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
+#define RBTX4927_IRQ_IOC_PCIB   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
+#define RBTX4927_IRQ_IOC_PCIA   (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
+#define RBTX4927_IRQ_IOCINT     (TXX9_IRQ_BASE + TX4927_IR_INT(1))
 #ifdef CONFIG_PCI
-#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
+#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
 #else
-#define TBTX4927_ISA_IO_OFFSET 0
+#define RBTX4927_ISA_IO_OFFSET 0
 #endif
 #define RBTX4927_SW_RESET_DO         (void __iomem *)0xbc00f000UL
@@ -44,10 +68,12 @@
 #define RBTX4927_SW_RESET_ENABLE     (void __iomem *)0xbc00f002UL
 #define RBTX4927_SW_RESET_ENABLE_SET            0x01
+#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
+#define RBTX4927_RTL_8019_IRQ  (TXX9_IRQ_BASE + TX4927_IR_INT(3))
-#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
+void rbtx4927_prom_init(void);
-#define RBTX4927_RTL_8019_IRQ  (TX4927_IRQ_PIC_BEG + 5)
+void rbtx4927_irq_setup(void);
+struct pci_dev;
-int toshiba_rbtx4927_irq_nested(int sw_irq);
+int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
+#endif /* __ASM_TXX9_RBTX4927_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h
index dfed7beb533f..2f5d5e705a41 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/txx9/rbtx4938.h
@@ -1,5 +1,4 @@
 /*
- * linux/include/asm-mips/tx4938/rbtx4938.h
 * Definitions for TX4937/TX4938
 *
 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@@ -9,12 +8,12 @@
 *
 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
 */
-#ifndef __ASM_TX_BOARDS_RBTX4938_H
+#ifndef __ASM_TXX9_RBTX4938_H
-#define __ASM_TX_BOARDS_RBTX4938_H
+#define __ASM_TXX9_RBTX4938_H
 #include <asm/addrspace.h>
-#include <asm/tx4938/tx4938.h>
 #include <asm/txx9irq.h>
+#include <asm/txx9/tx4938.h>
 /* CS */
 #define RBTX4938_CE0    0x1c000000      /* 64M */
@@ -102,35 +101,12 @@
 * that particular IRQ on an RBTX4938 machine.  Add new 'spaces' as new
 * IRQ hardware is supported.
 */
-#define RBTX4938_NR_IRQ_LOCAL   8
-#define RBTX4938_NR_IRQ_IRC     32      /* On-Chip IRC */
 #define RBTX4938_NR_IRQ_IOC     8
-#define TX4938_IRQ_CP0_BEG  MIPS_CPU_IRQ_BASE
+#define RBTX4938_IRQ_IRC        TXX9_IRQ_BASE
-#define TX4938_IRQ_CP0_END  (MIPS_CPU_IRQ_BASE + 8 - 1)
+#define RBTX4938_IRQ_IOC        (TXX9_IRQ_BASE + TX4938_NUM_IR)
-#define TX4938_IRQ_PIC_BEG  TXX9_IRQ_BASE
-#define TX4938_IRQ_PIC_END  (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-#define TX4938_IRQ_NEST_EXT_ON_PIC  (TX4938_IRQ_PIC_BEG+2)
-#define TX4938_IRQ_NEST_PIC_ON_CP0  (TX4938_IRQ_CP0_BEG+2)
-#define TX4938_IRQ_USER0            (TX4938_IRQ_CP0_BEG+0)
-#define TX4938_IRQ_USER1            (TX4938_IRQ_CP0_BEG+1)
-#define TX4938_IRQ_CPU_TIMER        (TX4938_IRQ_CP0_BEG+7)
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG   0
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END   7
-#define TOSHIBA_RBTX4938_IRQ_IOC_BEG  ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
-#define TOSHIBA_RBTX4938_IRQ_IOC_END  ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
-#define RBTX4938_IRQ_LOCAL      TX4938_IRQ_CP0_BEG
-#define RBTX4938_IRQ_IRC        (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
-#define RBTX4938_IRQ_IOC        (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
 #define RBTX4938_IRQ_END        (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
-#define RBTX4938_IRQ_LOCAL_SOFT0        (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
-#define RBTX4938_IRQ_LOCAL_SOFT1        (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
-#define RBTX4938_IRQ_LOCAL_IRC  (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
-#define RBTX4938_IRQ_LOCAL_TIMER        (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
 #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
 #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
 #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
@@ -158,11 +134,16 @@
 /* IOC (PCI, etc) */
-#define RBTX4938_IRQ_IOCINT     (TX4938_IRQ_NEST_EXT_ON_PIC)
+#define RBTX4938_IRQ_IOCINT     (TXX9_IRQ_BASE + TX4938_IR_INT(0))
 /* Onboard 10M Ether */
-#define RBTX4938_IRQ_ETHER      (TX4938_IRQ_NEST_EXT_ON_PIC + 1)
+#define RBTX4938_IRQ_ETHER      (TXX9_IRQ_BASE + TX4938_IR_INT(1))
 #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
 #define RBTX4938_RTL_8019_IRQ  (RBTX4938_IRQ_ETHER)
-#endif /* __ASM_TX_BOARDS_RBTX4938_H */
+void rbtx4938_prom_init(void);
+void rbtx4938_irq_setup(void);
+struct pci_dev;
+int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+#endif /* __ASM_TXX9_RBTX4938_H */
diff --git a/include/asm-mips/tx4927/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h
index 5d93bab51254..9375e4fc2289 100644
--- a/include/asm-mips/tx4927/smsc_fdc37m81x.h
+++ b/include/asm-mips/txx9/smsc_fdc37m81x.h
@@ -1,6 +1,4 @@
 /*
- * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
- *
 * Interface for smsc fdc48m81x Super IO chip
 *
 * Author: MontaVista Software, Inc. source@mvista.com
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/txx9/spi.h
index 6a60c83e152b..ddfb2a0dc432 100644
--- a/include/asm-mips/tx4938/spi.h
+++ b/include/asm-mips/txx9/spi.h
@@ -1,5 +1,4 @@
 /*
- * linux/include/asm-mips/tx4938/spi.h
 * Definitions for TX4937/TX4938 SPI
 *
 * Copyright (C) 2000-2001 Toshiba Corporation
@@ -11,10 +10,10 @@
 *
 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
 */
-#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
+#ifndef __ASM_TXX9_SPI_H
-#define __ASM_TX_BOARDS_TX4938_SPI_H
+#define __ASM_TXX9_SPI_H
 extern int spi_eeprom_register(int chipid);
 extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
-#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
+#endif /* __ASM_TXX9_SPI_H */
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/txx9/tx3927.h
index fb580333c102..ca414c7624e1 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -5,10 +5,10 @@
 *
 * Copyright (C) 2000 Toshiba Corporation
 */
-#ifndef __ASM_TX3927_H
+#ifndef __ASM_TXX9_TX3927_H
-#define __ASM_TX3927_H
+#define __ASM_TXX9_TX3927_H
-#include <asm/jmr3927/txx927.h>
+#include <asm/txx9/txx927.h>
 #define TX3927_SDRAMC_REG       0xfffe8000
 #define TX3927_ROMC_REG         0xfffe9000
@@ -316,4 +316,8 @@ struct tx3927_ccfg_reg {
 #define tx3927_sioptr(ch)       ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
 #define tx3927_pioptr           ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
-#endif /* __ASM_TX3927_H */
+struct pci_controller;
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+                              unsigned long sdram_size, int extarb);
+#endif /* __ASM_TXX9_TX3927_H */
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
new file mode 100644
index 000000000000..46d60afc038b
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927.h
@@ -0,0 +1,219 @@
+/*
+ * Author: MontaVista Software, Inc.
+ *         source@mvista.com
+ *
+ * Copyright 2001-2006 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_TXX9_TX4927_H
+#define __ASM_TXX9_TX4927_H
+#include <linux/types.h>
+#include <linux/io.h>
+#include <asm/txx9irq.h>
+#include <asm/txx9/tx4927pcic.h>
+#define TX4927_SDRAMC_REG       0xff1f8000
+#define TX4927_EBUSC_REG        0xff1f9000
+#define TX4927_PCIC_REG         0xff1fd000
+#define TX4927_CCFG_REG         0xff1fe000
+#define TX4927_IRC_REG          0xff1ff600
+#define TX4927_NR_TMR   3
+#define TX4927_TMR_REG(ch)      (0xff1ff000 + (ch) * 0x100)
+#define TX4927_IR_INT(n)        (2 + (n))
+#define TX4927_IR_SIO(n)        (8 + (n))
+#define TX4927_IR_PCIC          16
+#define TX4927_IR_PCIERR        22
+#define TX4927_NUM_IR   32
+#define TX4927_IRC_INT  2       /* IP[2] in Status register */
+struct tx4927_sdramc_reg {
+        volatile unsigned long long cr[4];
+        volatile unsigned long long unused0[4];
+        volatile unsigned long long tr;
+        volatile unsigned long long unused1[2];
+        volatile unsigned long long cmd;
+};
+struct tx4927_ebusc_reg {
+        volatile unsigned long long cr[8];
+};
+struct tx4927_ccfg_reg {
+        u64 ccfg;
+        u64 crir;
+        u64 pcfg;
+        u64 toea;
+        u64 clkctr;
+        u64 unused0;
+        u64 garbc;
+        u64 unused1;
+        u64 unused2;
+        u64 ramp;
+};
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX4927_CCFG_WDRST       0x0000020000000000ULL
+#define TX4927_CCFG_WDREXEN     0x0000010000000000ULL
+#define TX4927_CCFG_BCFG_MASK   0x000000ff00000000ULL
+#define TX4927_CCFG_TINTDIS     0x01000000
+#define TX4927_CCFG_PCI66       0x00800000
+#define TX4927_CCFG_PCIMODE     0x00400000
+#define TX4927_CCFG_DIVMODE_MASK        0x000e0000
+#define TX4927_CCFG_DIVMODE_8   (0x0 << 17)
+#define TX4927_CCFG_DIVMODE_12  (0x1 << 17)
+#define TX4927_CCFG_DIVMODE_16  (0x2 << 17)
+#define TX4927_CCFG_DIVMODE_10  (0x3 << 17)
+#define TX4927_CCFG_DIVMODE_2   (0x4 << 17)
+#define TX4927_CCFG_DIVMODE_3   (0x5 << 17)
+#define TX4927_CCFG_DIVMODE_4   (0x6 << 17)
+#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
+#define TX4927_CCFG_BEOW        0x00010000
+#define TX4927_CCFG_WR  0x00008000
+#define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_PCIARB      0x00002000
+#define TX4927_CCFG_PCIDIVMODE_MASK     0x00001800
+#define TX4927_CCFG_PCIDIVMODE_2_5      0x00000000
+#define TX4927_CCFG_PCIDIVMODE_3        0x00000800
+#define TX4927_CCFG_PCIDIVMODE_5        0x00001000
+#define TX4927_CCFG_PCIDIVMODE_6        0x00001800
+#define TX4927_CCFG_SYSSP_MASK  0x000000c0
+#define TX4927_CCFG_ENDIAN      0x00000004
+#define TX4927_CCFG_HALT        0x00000002
+#define TX4927_CCFG_ACEHOLD     0x00000001
+#define TX4927_CCFG_W1CBITS     (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
+/* PCFG : Pin Configuration */
+#define TX4927_PCFG_SDCLKDLY_MASK       0x30000000
+#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
+#define TX4927_PCFG_SYSCLKEN    0x08000000
+#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
+#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
+#define TX4927_PCFG_PCICLKEN_ALL        0x003f0000
+#define TX4927_PCFG_PCICLKEN(ch)        (0x00010000<<(ch))
+#define TX4927_PCFG_SEL2        0x00000200
+#define TX4927_PCFG_SEL1        0x00000100
+#define TX4927_PCFG_DMASEL_ALL  0x000000ff
+#define TX4927_PCFG_DMASEL0_MASK        0x00000003
+#define TX4927_PCFG_DMASEL1_MASK        0x0000000c
+#define TX4927_PCFG_DMASEL2_MASK        0x00000030
+#define TX4927_PCFG_DMASEL3_MASK        0x000000c0
+#define TX4927_PCFG_DMASEL0_DRQ0        0x00000000
+#define TX4927_PCFG_DMASEL0_SIO1        0x00000001
+#define TX4927_PCFG_DMASEL0_ACL0        0x00000002
+#define TX4927_PCFG_DMASEL0_ACL2        0x00000003
+#define TX4927_PCFG_DMASEL1_DRQ1        0x00000000
+#define TX4927_PCFG_DMASEL1_SIO1        0x00000004
+#define TX4927_PCFG_DMASEL1_ACL1        0x00000008
+#define TX4927_PCFG_DMASEL1_ACL3        0x0000000c
+#define TX4927_PCFG_DMASEL2_DRQ2        0x00000000      /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_SIO0        0x00000010      /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_ACL1        0x00000000      /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL2        0x00000020      /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL0        0x00000030      /* SEL2=1 */
+#define TX4927_PCFG_DMASEL3_DRQ3        0x00000000
+#define TX4927_PCFG_DMASEL3_SIO0        0x00000040
+#define TX4927_PCFG_DMASEL3_ACL3        0x00000080
+#define TX4927_PCFG_DMASEL3_ACL1        0x000000c0
+/* CLKCTR : Clock Control */
+#define TX4927_CLKCTR_ACLCKD    0x02000000
+#define TX4927_CLKCTR_PIOCKD    0x01000000
+#define TX4927_CLKCTR_DMACKD    0x00800000
+#define TX4927_CLKCTR_PCICKD    0x00400000
+#define TX4927_CLKCTR_TM0CKD    0x00100000
+#define TX4927_CLKCTR_TM1CKD    0x00080000
+#define TX4927_CLKCTR_TM2CKD    0x00040000
+#define TX4927_CLKCTR_SIO0CKD   0x00020000
+#define TX4927_CLKCTR_SIO1CKD   0x00010000
+#define TX4927_CLKCTR_ACLRST    0x00000200
+#define TX4927_CLKCTR_PIORST    0x00000100
+#define TX4927_CLKCTR_DMARST    0x00000080
+#define TX4927_CLKCTR_PCIRST    0x00000040
+#define TX4927_CLKCTR_TM0RST    0x00000010
+#define TX4927_CLKCTR_TM1RST    0x00000008
+#define TX4927_CLKCTR_TM2RST    0x00000004
+#define TX4927_CLKCTR_SIO0RST   0x00000002
+#define TX4927_CLKCTR_SIO1RST   0x00000001
+#define tx4927_sdramcptr        ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
+#define tx4927_pcicptr \
+                ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
+#define tx4927_ccfgptr \
+                ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
+#define tx4927_ebuscptr         ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
+/* utilities */
+static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+        unsigned long flags;
+        local_irq_save(flags);
+#endif
+        ____raw_writeq(____raw_readq(adr) & ~bits, adr);
+#ifdef CONFIG_32BIT
+        local_irq_restore(flags);
+#endif
+}
+static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+        unsigned long flags;
+        local_irq_save(flags);
+#endif
+        ____raw_writeq(____raw_readq(adr) | bits, adr);
+#ifdef CONFIG_32BIT
+        local_irq_restore(flags);
+#endif
+}
+/* These functions are not interrupt safe. */
+static inline void tx4927_ccfg_clear(__u64 bits)
+{
+        ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
+                       & ~(TX4927_CCFG_W1CBITS | bits),
+                       &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_set(__u64 bits)
+{
+        ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+                        & ~TX4927_CCFG_W1CBITS) | bits,
+                       &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_change(__u64 change, __u64 new)
+{
+        ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+                        & ~(TX4927_CCFG_W1CBITS | change)) |
+                       new,
+                       &tx4927_ccfgptr->ccfg);
+}
+int tx4927_report_pciclk(void);
+int tx4927_pciclk66_setup(void);
+void tx4927_irq_init(void);
+#endif /* __ASM_TXX9_TX4927_H */
diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h
new file mode 100644
index 000000000000..d61c3d09c4a2
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927pcic.h
@@ -0,0 +1,199 @@
+/*
+ * include/asm-mips/txx9/tx4927pcic.h
+ * TX4927 PCI controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_TX4927PCIC_H
+#define __ASM_TXX9_TX4927PCIC_H
+#include <linux/pci.h>
+struct tx4927_pcic_reg {
+        u32 pciid;
+        u32 pcistatus;
+        u32 pciccrev;
+        u32 pcicfg1;
+        u32 p2gm0plbase;                /* +10 */
+        u32 p2gm0pubase;
+        u32 p2gm1plbase;
+        u32 p2gm1pubase;
+        u32 p2gm2pbase;         /* +20 */
+        u32 p2giopbase;
+        u32 unused0;
+        u32 pcisid;
+        u32 unused1;            /* +30 */
+        u32 pcicapptr;
+        u32 unused2;
+        u32 pcicfg2;
+        u32 g2ptocnt;           /* +40 */
+        u32 unused3[15];
+        u32 g2pstatus;          /* +80 */
+        u32 g2pmask;
+        u32 pcisstatus;
+        u32 pcimask;
+        u32 p2gcfg;             /* +90 */
+        u32 p2gstatus;
+        u32 p2gmask;
+        u32 p2gccmd;
+        u32 unused4[24];                /* +a0 */
+        u32 pbareqport;         /* +100 */
+        u32 pbacfg;
+        u32 pbastatus;
+        u32 pbamask;
+        u32 pbabm;              /* +110 */
+        u32 pbacreq;
+        u32 pbacgnt;
+        u32 pbacstate;
+        u64 g2pmgbase[3];               /* +120 */
+        u64 g2piogbase;
+        u32 g2pmmask[3];                /* +140 */
+        u32 g2piomask;
+        u64 g2pmpbase[3];               /* +150 */
+        u64 g2piopbase;
+        u32 pciccfg;            /* +170 */
+        u32 pcicstatus;
+        u32 pcicmask;
+        u32 unused5;
+        u64 p2gmgbase[3];               /* +180 */
+        u64 p2giogbase;
+        u32 g2pcfgadrs;         /* +1a0 */
+        u32 g2pcfgdata;
+        u32 unused6[8];
+        u32 g2pintack;
+        u32 g2pspc;
+        u32 unused7[12];                /* +1d0 */
+        u64 pdmca;              /* +200 */
+        u64 pdmga;
+        u64 pdmpa;
+        u64 pdmctr;
+        u64 pdmcfg;             /* +220 */
+        u64 pdmsts;
+};
+/* bits for PCICMD */
+/* see PCI_COMMAND_XXX in linux/pci_regs.h */
+/* bits for PCISTAT */
+/* see PCI_STATUS_XXX in linux/pci_regs.h */
+/* bits for IOBA/MBA */
+/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
+/* bits for G2PSTATUS/G2PMASK */
+#define TX4927_PCIC_G2PSTATUS_ALL       0x00000003
+#define TX4927_PCIC_G2PSTATUS_TTOE      0x00000002
+#define TX4927_PCIC_G2PSTATUS_RTOE      0x00000001
+/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
+#define TX4927_PCIC_PCISTATUS_ALL       0x0000f900
+/* bits for PBACFG */
+#define TX4927_PCIC_PBACFG_FIXPA        0x00000008
+#define TX4927_PCIC_PBACFG_RPBA 0x00000004
+#define TX4927_PCIC_PBACFG_PBAEN        0x00000002
+#define TX4927_PCIC_PBACFG_BMCEN        0x00000001
+/* bits for PBASTATUS/PBAMASK */
+#define TX4927_PCIC_PBASTATUS_ALL       0x00000001
+#define TX4927_PCIC_PBASTATUS_BM        0x00000001
+/* bits for G2PMnGBASE */
+#define TX4927_PCIC_G2PMnGBASE_BSDIS    0x0000002000000000ULL
+#define TX4927_PCIC_G2PMnGBASE_ECHG     0x0000001000000000ULL
+/* bits for G2PIOGBASE */
+#define TX4927_PCIC_G2PIOGBASE_BSDIS    0x0000002000000000ULL
+#define TX4927_PCIC_G2PIOGBASE_ECHG     0x0000001000000000ULL
+/* bits for PCICSTATUS/PCICMASK */
+#define TX4927_PCIC_PCICSTATUS_ALL      0x000007b8
+#define TX4927_PCIC_PCICSTATUS_PME      0x00000400
+#define TX4927_PCIC_PCICSTATUS_TLB      0x00000200
+#define TX4927_PCIC_PCICSTATUS_NIB      0x00000100
+#define TX4927_PCIC_PCICSTATUS_ZIB      0x00000080
+#define TX4927_PCIC_PCICSTATUS_PERR     0x00000020
+#define TX4927_PCIC_PCICSTATUS_SERR     0x00000010
+#define TX4927_PCIC_PCICSTATUS_GBE      0x00000008
+#define TX4927_PCIC_PCICSTATUS_IWB      0x00000002
+#define TX4927_PCIC_PCICSTATUS_E2PDONE  0x00000001
+/* bits for PCICCFG */
+#define TX4927_PCIC_PCICCFG_GBWC_MASK   0x0fff0000
+#define TX4927_PCIC_PCICCFG_HRST        0x00000800
+#define TX4927_PCIC_PCICCFG_SRST        0x00000400
+#define TX4927_PCIC_PCICCFG_IRBER       0x00000200
+#define TX4927_PCIC_PCICCFG_G2PMEN(ch)  (0x00000100>>(ch))
+#define TX4927_PCIC_PCICCFG_G2PM0EN     0x00000100
+#define TX4927_PCIC_PCICCFG_G2PM1EN     0x00000080
+#define TX4927_PCIC_PCICCFG_G2PM2EN     0x00000040
+#define TX4927_PCIC_PCICCFG_G2PIOEN     0x00000020
+#define TX4927_PCIC_PCICCFG_TCAR        0x00000010
+#define TX4927_PCIC_PCICCFG_ICAEN       0x00000008
+/* bits for P2GMnGBASE */
+#define TX4927_PCIC_P2GMnGBASE_TMEMEN   0x0000004000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TBSDIS   0x0000002000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TECHG    0x0000001000000000ULL
+/* bits for P2GIOGBASE */
+#define TX4927_PCIC_P2GIOGBASE_TIOEN    0x0000004000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TBSDIS   0x0000002000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TECHG    0x0000001000000000ULL
+#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad)        ((ad) - 11)
+#define TX4927_PCIC_MAX_DEVNU   TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
+/* bits for PDMCFG */
+#define TX4927_PCIC_PDMCFG_RSTFIFO      0x00200000
+#define TX4927_PCIC_PDMCFG_EXFER        0x00100000
+#define TX4927_PCIC_PDMCFG_REQDLY_MASK  0x00003800
+#define TX4927_PCIC_PDMCFG_REQDLY_NONE  (0 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_16    (1 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_32    (2 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_64    (3 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_128   (4 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_256   (5 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_512   (6 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_1024  (7 << 11)
+#define TX4927_PCIC_PDMCFG_ERRIE        0x00000400
+#define TX4927_PCIC_PDMCFG_NCCMPIE      0x00000200
+#define TX4927_PCIC_PDMCFG_NTCMPIE      0x00000100
+#define TX4927_PCIC_PDMCFG_CHNEN        0x00000080
+#define TX4927_PCIC_PDMCFG_XFRACT       0x00000040
+#define TX4927_PCIC_PDMCFG_BSWAP        0x00000020
+#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW  0x00000000
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW  0x00000004
+#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW  0x00000008
+#define TX4927_PCIC_PDMCFG_XFRDIRC      0x00000002
+#define TX4927_PCIC_PDMCFG_CHRST        0x00000001
+/* bits for PDMSTS */
+#define TX4927_PCIC_PDMSTS_REQCNT_MASK  0x3f000000
+#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
+#define TX4927_PCIC_PDMSTS_FIFOWP_MASK  0x000c0000
+#define TX4927_PCIC_PDMSTS_FIFORP_MASK  0x00030000
+#define TX4927_PCIC_PDMSTS_ERRINT       0x00000800
+#define TX4927_PCIC_PDMSTS_DONEINT      0x00000400
+#define TX4927_PCIC_PDMSTS_CHNEN        0x00000200
+#define TX4927_PCIC_PDMSTS_XFRACT       0x00000100
+#define TX4927_PCIC_PDMSTS_ACCMP        0x00000080
+#define TX4927_PCIC_PDMSTS_NCCMP        0x00000040
+#define TX4927_PCIC_PDMSTS_NTCMP        0x00000020
+#define TX4927_PCIC_PDMSTS_CFGERR       0x00000008
+#define TX4927_PCIC_PDMSTS_PCIERR       0x00000004
+#define TX4927_PCIC_PDMSTS_CHNERR       0x00000002
+#define TX4927_PCIC_PDMSTS_DATAERR      0x00000001
+#define TX4927_PCIC_PDMSTS_ALL_CMP      0x000000e0
+#define TX4927_PCIC_PDMSTS_ALL_ERR      0x0000000f
+struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
+        struct pci_controller *channel);
+void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
+                              struct pci_controller *channel, int extarb);
+void tx4927_report_pcic_status(void);
+#endif /* __ASM_TXX9_TX4927PCIC_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/txx9/tx4938.h
index e8807f5c61e9..12de68a4c10a 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/txx9/tx4938.h
@@ -1,5 +1,4 @@
 /*
- * linux/include/asm-mips/tx4938/tx4938.h
 * Definitions for TX4937/TX4938
 * Copyright (C) 2000-2001 Toshiba Corporation
 *
@@ -10,17 +9,15 @@
 *
 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
 */
-#ifndef __ASM_TX_BOARDS_TX4938_H
+#ifndef __ASM_TXX9_TX4938_H
-#define __ASM_TX_BOARDS_TX4938_H
+#define __ASM_TXX9_TX4938_H
+/* some controllers are compatible with 4927 */
+#include <asm/txx9/tx4927.h>
 #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
 #define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
-#define TX4938_NR_IRQ_LOCAL     TX4938_IRQ_PIC_BEG
-#define TX4938_IRQ_IRC_PCIC     (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
-#define TX4938_IRQ_IRC_PCIERR   (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
 #define TX4938_PCIIO_0 0x10000000
 #define TX4938_PCIIO_1 0x01010000
 #define TX4938_PCIMEM_0 0x08000000
@@ -52,9 +49,6 @@
 #define TX4938_ACLC_REG         (TX4938_REG_BASE + 0xf700)
 #define TX4938_SPI_REG          (TX4938_REG_BASE + 0xf800)
-#ifdef __ASSEMBLY__
-#define _CONST64(c)     c
-#else
 #define _CONST64(c)     c##ull
 #include <asm/byteorder.h>
@@ -114,68 +108,6 @@ struct tx4938_dma_reg {
        endian_def_l2(unused0, mcr);
 };
-struct tx4938_pcic_reg {
-        volatile unsigned long pciid;
-        volatile unsigned long pcistatus;
-        volatile unsigned long pciccrev;
-        volatile unsigned long pcicfg1;
-        volatile unsigned long p2gm0plbase;             /* +10 */
-        volatile unsigned long p2gm0pubase;
-        volatile unsigned long p2gm1plbase;
-        volatile unsigned long p2gm1pubase;
-        volatile unsigned long p2gm2pbase;              /* +20 */
-        volatile unsigned long p2giopbase;
-        volatile unsigned long unused0;
-        volatile unsigned long pcisid;
-        volatile unsigned long unused1;         /* +30 */
-        volatile unsigned long pcicapptr;
-        volatile unsigned long unused2;
-        volatile unsigned long pcicfg2;
-        volatile unsigned long g2ptocnt;                /* +40 */
-        volatile unsigned long unused3[15];
-        volatile unsigned long g2pstatus;               /* +80 */
-        volatile unsigned long g2pmask;
-        volatile unsigned long pcisstatus;
-        volatile unsigned long pcimask;
-        volatile unsigned long p2gcfg;          /* +90 */
-        volatile unsigned long p2gstatus;
-        volatile unsigned long p2gmask;
-        volatile unsigned long p2gccmd;
-        volatile unsigned long unused4[24];             /* +a0 */
-        volatile unsigned long pbareqport;              /* +100 */
-        volatile unsigned long pbacfg;
-        volatile unsigned long pbastatus;
-        volatile unsigned long pbamask;
-        volatile unsigned long pbabm;           /* +110 */
-        volatile unsigned long pbacreq;
-        volatile unsigned long pbacgnt;
-        volatile unsigned long pbacstate;
-        volatile unsigned long long g2pmgbase[3];               /* +120 */
-        volatile unsigned long long g2piogbase;
-        volatile unsigned long g2pmmask[3];             /* +140 */
-        volatile unsigned long g2piomask;
-        volatile unsigned long long g2pmpbase[3];               /* +150 */
-        volatile unsigned long long g2piopbase;
-        volatile unsigned long pciccfg;         /* +170 */
-        volatile unsigned long pcicstatus;
-        volatile unsigned long pcicmask;
-        volatile unsigned long unused5;
-        volatile unsigned long long p2gmgbase[3];               /* +180 */
-        volatile unsigned long long p2giogbase;
-        volatile unsigned long g2pcfgadrs;              /* +1a0 */
-        volatile unsigned long g2pcfgdata;
-        volatile unsigned long unused6[8];
-        volatile unsigned long g2pintack;
-        volatile unsigned long g2pspc;
-        volatile unsigned long unused7[12];             /* +1d0 */
-        volatile unsigned long long pdmca;              /* +200 */
-        volatile unsigned long long pdmga;
-        volatile unsigned long long pdmpa;
-        volatile unsigned long long pdmctr;
-        volatile unsigned long long pdmcfg;             /* +220 */
-        volatile unsigned long long pdmsts;
-};
 struct tx4938_aclc_reg {
        volatile unsigned long acctlen;
        volatile unsigned long acctldis;
@@ -263,18 +195,18 @@ struct tx4938_sramc_reg {
 };
 struct tx4938_ccfg_reg {
-        volatile unsigned long long ccfg;
+        u64 ccfg;
-        volatile unsigned long long crir;
+        u64 crir;
-        volatile unsigned long long pcfg;
+        u64 pcfg;
-        volatile unsigned long long tear;
+        u64 toea;
-        volatile unsigned long long clkctr;
+        u64 clkctr;
-        volatile unsigned long long unused0;
+        u64 unused0;
-        volatile unsigned long long garbc;
+        u64 garbc;
-        volatile unsigned long long unused1;
+        u64 unused1;
-        volatile unsigned long long unused2;
+        u64 unused2;
-        volatile unsigned long long ramp;
+        u64 ramp;
-        volatile unsigned long long unused3;
+        u64 unused3;
-        volatile unsigned long long jmpadr;
+        u64 jmpadr;
 };
 #undef endian_def_l2
@@ -283,8 +215,6 @@ struct tx4938_ccfg_reg {
 #undef endian_def_b2s
 #undef endian_def_b4
-#endif /* __ASSEMBLY__ */
 /*
 * NDFMC
 */
@@ -336,6 +266,8 @@ struct tx4938_ccfg_reg {
 #define TX4938_IR_ETH0  TX4938_IR_INT(4)
 #define TX4938_IR_ETH1  TX4938_IR_INT(3)
+#define TX4938_IRC_INT  2       /* IP[2] in Status register */
 /*
 * CCFG
 */
@@ -361,7 +293,7 @@ struct tx4938_ccfg_reg {
 #define TX4938_CCFG_BEOW        0x00010000
 #define TX4938_CCFG_WR  0x00008000
 #define TX4938_CCFG_TOE 0x00004000
-#define TX4938_CCFG_PCIXARB     0x00002000
+#define TX4938_CCFG_PCIARB      0x00002000
 #define TX4938_CCFG_PCIDIVMODE_MASK     0x00001c00
 #define TX4938_CCFG_PCIDIVMODE_4        (0x1 << 10)
 #define TX4938_CCFG_PCIDIVMODE_4_5      (0x3 << 10)
@@ -437,110 +369,6 @@ struct tx4938_ccfg_reg {
 #define TX4938_CLKCTR_SIO0RST   0x00000002
 #define TX4938_CLKCTR_SIO1RST   0x00000001
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4938_PCIC_G2PSTATUS_ALL       0x00000003
-#define TX4938_PCIC_G2PSTATUS_TTOE      0x00000002
-#define TX4938_PCIC_G2PSTATUS_RTOE      0x00000001
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4938_PCIC_PCISTATUS_ALL       0x0000f900
-/* bits for PBACFG */
-#define TX4938_PCIC_PBACFG_FIXPA        0x00000008
-#define TX4938_PCIC_PBACFG_RPBA 0x00000004
-#define TX4938_PCIC_PBACFG_PBAEN        0x00000002
-#define TX4938_PCIC_PBACFG_BMCEN        0x00000001
-/* bits for G2PMnGBASE */
-#define TX4938_PCIC_G2PMnGBASE_BSDIS    _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PMnGBASE_ECHG     _CONST64(0x0000001000000000)
-/* bits for G2PIOGBASE */
-#define TX4938_PCIC_G2PIOGBASE_BSDIS    _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PIOGBASE_ECHG     _CONST64(0x0000001000000000)
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4938_PCIC_PCICSTATUS_ALL      0x000007b8
-#define TX4938_PCIC_PCICSTATUS_PME      0x00000400
-#define TX4938_PCIC_PCICSTATUS_TLB      0x00000200
-#define TX4938_PCIC_PCICSTATUS_NIB      0x00000100
-#define TX4938_PCIC_PCICSTATUS_ZIB      0x00000080
-#define TX4938_PCIC_PCICSTATUS_PERR     0x00000020
-#define TX4938_PCIC_PCICSTATUS_SERR     0x00000010
-#define TX4938_PCIC_PCICSTATUS_GBE      0x00000008
-#define TX4938_PCIC_PCICSTATUS_IWB      0x00000002
-#define TX4938_PCIC_PCICSTATUS_E2PDONE  0x00000001
-/* bits for PCICCFG */
-#define TX4938_PCIC_PCICCFG_GBWC_MASK   0x0fff0000
-#define TX4938_PCIC_PCICCFG_HRST        0x00000800
-#define TX4938_PCIC_PCICCFG_SRST        0x00000400
-#define TX4938_PCIC_PCICCFG_IRBER       0x00000200
-#define TX4938_PCIC_PCICCFG_G2PMEN(ch)  (0x00000100>>(ch))
-#define TX4938_PCIC_PCICCFG_G2PM0EN     0x00000100
-#define TX4938_PCIC_PCICCFG_G2PM1EN     0x00000080
-#define TX4938_PCIC_PCICCFG_G2PM2EN     0x00000040
-#define TX4938_PCIC_PCICCFG_G2PIOEN     0x00000020
-#define TX4938_PCIC_PCICCFG_TCAR        0x00000010
-#define TX4938_PCIC_PCICCFG_ICAEN       0x00000008
-/* bits for P2GMnGBASE */
-#define TX4938_PCIC_P2GMnGBASE_TMEMEN   _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GMnGBASE_TBSDIS   _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GMnGBASE_TECHG    _CONST64(0x0000001000000000)
-/* bits for P2GIOGBASE */
-#define TX4938_PCIC_P2GIOGBASE_TIOEN    _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GIOGBASE_TBSDIS   _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GIOGBASE_TECHG    _CONST64(0x0000001000000000)
-#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad)        ((ad) - 11)
-#define TX4938_PCIC_MAX_DEVNU   TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
-/* bits for PDMCFG */
-#define TX4938_PCIC_PDMCFG_RSTFIFO      0x00200000
-#define TX4938_PCIC_PDMCFG_EXFER        0x00100000
-#define TX4938_PCIC_PDMCFG_REQDLY_MASK  0x00003800
-#define TX4938_PCIC_PDMCFG_REQDLY_NONE  (0 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_16    (1 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_32    (2 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_64    (3 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_128   (4 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_256   (5 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_512   (6 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_1024  (7 << 11)
-#define TX4938_PCIC_PDMCFG_ERRIE        0x00000400
-#define TX4938_PCIC_PDMCFG_NCCMPIE      0x00000200
-#define TX4938_PCIC_PDMCFG_NTCMPIE      0x00000100
-#define TX4938_PCIC_PDMCFG_CHNEN        0x00000080
-#define TX4938_PCIC_PDMCFG_XFRACT       0x00000040
-#define TX4938_PCIC_PDMCFG_BSWAP        0x00000020
-#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW  0x00000000
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW  0x00000004
-#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW  0x00000008
-#define TX4938_PCIC_PDMCFG_XFRDIRC      0x00000002
-#define TX4938_PCIC_PDMCFG_CHRST        0x00000001
-/* bits for PDMSTS */
-#define TX4938_PCIC_PDMSTS_REQCNT_MASK  0x3f000000
-#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
-#define TX4938_PCIC_PDMSTS_FIFOWP_MASK  0x000c0000
-#define TX4938_PCIC_PDMSTS_FIFORP_MASK  0x00030000
-#define TX4938_PCIC_PDMSTS_ERRINT       0x00000800
-#define TX4938_PCIC_PDMSTS_DONEINT      0x00000400
-#define TX4938_PCIC_PDMSTS_CHNEN        0x00000200
-#define TX4938_PCIC_PDMSTS_XFRACT       0x00000100
-#define TX4938_PCIC_PDMSTS_ACCMP        0x00000080
-#define TX4938_PCIC_PDMSTS_NCCMP        0x00000040
-#define TX4938_PCIC_PDMSTS_NTCMP        0x00000020
-#define TX4938_PCIC_PDMSTS_CFGERR       0x00000008
-#define TX4938_PCIC_PDMSTS_PCIERR       0x00000004
-#define TX4938_PCIC_PDMSTS_CHNERR       0x00000002
-#define TX4938_PCIC_PDMSTS_DATAERR      0x00000001
-#define TX4938_PCIC_PDMSTS_ALL_CMP      0x000000e0
-#define TX4938_PCIC_PDMSTS_ALL_ERR      0x0000000f
 /*
 * DMA
 */
@@ -596,15 +424,15 @@ struct tx4938_ccfg_reg {
 #define TX4938_DMA_CSR_DESERR   0x00000002
 #define TX4938_DMA_CSR_SORERR   0x00000001
-#ifndef __ASSEMBLY__
 #define tx4938_sdramcptr        ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
 #define tx4938_ebuscptr         ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
 #define tx4938_dmaptr(ch)       ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
 #define tx4938_ndfmcptr         ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
-#define tx4938_pcicptr          ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
+#define tx4938_pcicptr          tx4927_pcicptr
-#define tx4938_pcic1ptr         ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
+#define tx4938_pcic1ptr \
-#define tx4938_ccfgptr          ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
+                ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
+#define tx4938_ccfgptr \
+                ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
 #define tx4938_sioptr(ch)       ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
 #define tx4938_pioptr           ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
 #define tx4938_aclcptr          ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
@@ -612,17 +440,26 @@ struct tx4938_ccfg_reg {
 #define tx4938_sramcptr         ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
-#define TX4938_REV_MAJ_MIN()    ((unsigned long)tx4938_ccfgptr->crir & 0x00ff)
+#define TX4938_REV_PCODE()      \
-#define TX4938_REV_PCODE()      ((unsigned long)tx4938_ccfgptr->crir >> 16)
+        ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
+#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
+#define tx4938_ccfg_set(bits)   tx4927_ccfg_set(bits)
+#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
 #define TX4938_SDRAMC_BA(ch)    ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
 #define TX4938_SDRAMC_SIZE(ch)  (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
+#define TX4938_EBUSC_CR(ch)     __raw_readq(&tx4938_ebuscptr->cr[(ch)])
 #define TX4938_EBUSC_BA(ch)     ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
 #define TX4938_EBUSC_SIZE(ch)   \
        (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
+int tx4938_report_pciclk(void);
-#endif /* !__ASSEMBLY__ */
+void tx4938_report_pci1clk(void);
+int tx4938_pciclk66_setup(void);
+struct pci_dev;
+int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
+void tx4938_irq_init(void);
 #endif
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/txx9/txx927.h
index 25dcf2feb095..97dd7ad1a890 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/txx9/txx927.h
@@ -7,8 +7,8 @@
 *
 * Copyright (C) 2000 Toshiba Corporation
 */
-#ifndef __ASM_TXX927_H
+#ifndef __ASM_TXX9_TXX927_H
-#define __ASM_TXX927_H
+#define __ASM_TXX9_TXX927_H
 struct txx927_sio_reg {
        volatile unsigned long lcr;
@@ -118,4 +118,4 @@ struct txx927_sio_reg {
 * PIO
 */
-#endif /* __ASM_TXX927_H */
+#endif /* __ASM_TXX9_TXX927_H */
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
deleted file mode 100644
index 42300037d593..000000000000
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * include/asm-mips/vr41xx/cmbvr4133.h
- *
- * Include file for NEC CMB-VR4133.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- *         Jun Sun <jsun@mvista.com, or source@mvista.com> and
- *         Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __NEC_CMBVR4133_H
-#define __NEC_CMBVR4133_H
-#include <asm/vr41xx/irq.h>
-/*
- * General-Purpose I/O Pin Number
- */
-#define CMBVR41XX_INTA_PIN              1
-#define CMBVR41XX_INTB_PIN              1
-#define CMBVR41XX_INTC_PIN              3
-#define CMBVR41XX_INTD_PIN              1
-#define CMBVR41XX_INTE_PIN              1
-/*
- * Interrupt Number
- */
-#define CMBVR41XX_INTA_IRQ              GIU_IRQ(CMBVR41XX_INTA_PIN)
-#define CMBVR41XX_INTB_IRQ              GIU_IRQ(CMBVR41XX_INTB_PIN)
-#define CMBVR41XX_INTC_IRQ              GIU_IRQ(CMBVR41XX_INTC_PIN)
-#define CMBVR41XX_INTD_IRQ              GIU_IRQ(CMBVR41XX_INTD_PIN)
-#define CMBVR41XX_INTE_IRQ              GIU_IRQ(CMBVR41XX_INTE_PIN)
-#define I8259A_IRQ_BASE                 72
-#define I8259_IRQ(x)                    (I8259A_IRQ_BASE + (x))
-#define TIMER_IRQ                       I8259_IRQ(0)
-#define KEYBOARD_IRQ                    I8259_IRQ(1)
-#define I8259_SLAVE_IRQ                 I8259_IRQ(2)
-#define UART3_IRQ                       I8259_IRQ(3)
-#define UART1_IRQ                       I8259_IRQ(4)
-#define UART2_IRQ                       I8259_IRQ(5)
-#define FDC_IRQ                         I8259_IRQ(6)
-#define PARPORT_IRQ                     I8259_IRQ(7)
-#define RTC_IRQ                         I8259_IRQ(8)
-#define USB_IRQ                         I8259_IRQ(9)
-#define I8259_INTA_IRQ                  I8259_IRQ(10)
-#define AUDIO_IRQ                       I8259_IRQ(11)
-#define AUX_IRQ                         I8259_IRQ(12)
-#define IDE_PRIMARY_IRQ                 I8259_IRQ(14)
-#define IDE_SECONDARY_IRQ               I8259_IRQ(15)
-#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 306f4950e32e..398cdbaf4e54 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -30,6 +30,9 @@ extern cpumask_t cpu_online_map;
 extern void smp_send_reschedule(int cpu);
 extern void smp_send_all_nop(void);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #endif /* !ASSEMBLY */
 /*
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index 1cd43e3d94fb..416d4c288cea 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -69,10 +69,7 @@ DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
 * in /proc/interrupts will be wrong!!! --Troy */
 #define PPC_MSG_CALL_FUNCTION   0
 #define PPC_MSG_RESCHEDULE      1
-/* This is unused now */
+#define PPC_MSG_CALL_FUNC_SINGLE        2
-#if 0
-#define PPC_MSG_MIGRATE_TASK    2
-#endif
 #define PPC_MSG_DEBUGGER_BREAK  3
 void smp_init_iSeries(void);
@@ -119,6 +116,9 @@ extern void smp_generic_take_timebase(void);
 extern struct smp_ops_t *smp_ops;
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h
index 9c8d34b07ebf..593343cd26ee 100644
--- a/include/asm-sh/smp.h
+++ b/include/asm-sh/smp.h
@@ -26,18 +26,10 @@ extern int __cpu_logical_map[NR_CPUS];
 #define NO_PROC_ID      (-1)
-struct smp_fn_call_struct {
-        spinlock_t lock;
-        atomic_t   finished;
-        void (*fn)(void *);
-        void *data;
-};
-extern struct smp_fn_call_struct smp_fn_call;
 #define SMP_MSG_FUNCTION        0
 #define SMP_MSG_RESCHEDULE      1
-#define SMP_MSG_NR              2
+#define SMP_MSG_FUNCTION_SINGLE 2
+#define SMP_MSG_NR              3
 void plat_smp_setup(void);
 void plat_prepare_cpus(unsigned int max_cpus);
@@ -46,6 +38,8 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
 void plat_send_ipi(unsigned int cpu, unsigned int message);
 int plat_register_ipi_handler(unsigned int message,
                              void (*handler)(void *), void *arg);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
 #else
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index e6d561599726..b61e74bea06a 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -72,7 +72,7 @@ static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
                           unsigned long arg3, unsigned long arg4, unsigned long arg5)
 { smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
-static inline int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait)
+static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
 {
        xc1((smpfunc_t)func, (unsigned long)info);
        return 0;
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h
index 0bfe250894f7..738bb9fb3e53 100644
--- a/include/asm-x86/dwarf2.h
+++ b/include/asm-x86/dwarf2.h
@@ -38,23 +38,23 @@
 /* Due to the structure of pre-exisiting code, don't use assembler line
   comment character # to ignore the arguments. Instead, use a dummy macro. */
-.macro ignore a=0, b=0, c=0, d=0
+.macro cfi_ignore a=0, b=0, c=0, d=0
 .endm
-#define CFI_STARTPROC   ignore
+#define CFI_STARTPROC   cfi_ignore
-#define CFI_ENDPROC     ignore
+#define CFI_ENDPROC     cfi_ignore
-#define CFI_DEF_CFA     ignore
+#define CFI_DEF_CFA     cfi_ignore
-#define CFI_DEF_CFA_REGISTER    ignore
+#define CFI_DEF_CFA_REGISTER    cfi_ignore
-#define CFI_DEF_CFA_OFFSET      ignore
+#define CFI_DEF_CFA_OFFSET      cfi_ignore
-#define CFI_ADJUST_CFA_OFFSET   ignore
+#define CFI_ADJUST_CFA_OFFSET   cfi_ignore
-#define CFI_OFFSET      ignore
+#define CFI_OFFSET      cfi_ignore
-#define CFI_REL_OFFSET  ignore
+#define CFI_REL_OFFSET  cfi_ignore
-#define CFI_REGISTER    ignore
+#define CFI_REGISTER    cfi_ignore
-#define CFI_RESTORE     ignore
+#define CFI_RESTORE     cfi_ignore
-#define CFI_REMEMBER_STATE ignore
+#define CFI_REMEMBER_STATE cfi_ignore
-#define CFI_RESTORE_STATE ignore
+#define CFI_RESTORE_STATE cfi_ignore
-#define CFI_UNDEFINED ignore
+#define CFI_UNDEFINED cfi_ignore
-#define CFI_SIGNAL_FRAME ignore
+#define CFI_SIGNAL_FRAME cfi_ignore
 #endif
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 18f067c310f7..77ba51df5668 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -48,6 +48,7 @@ extern void irq_move_cleanup_interrupt(void);
 extern void threshold_interrupt(void);
 extern void call_function_interrupt(void);
+extern void call_function_single_interrupt(void);
 /* PIC specific functions */
 extern void disable_8259A_irq(unsigned int irq);
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index 0ac864ef3cd4..90b1d1f12f08 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -64,6 +64,7 @@
 # define INVALIDATE_TLB_VECTOR          0xfd
 # define RESCHEDULE_VECTOR              0xfc
 # define CALL_FUNCTION_VECTOR           0xfb
+# define CALL_FUNCTION_SINGLE_VECTOR    0xfa
 # define THERMAL_APIC_VECTOR            0xf0
 #else
@@ -72,6 +73,7 @@
 #define ERROR_APIC_VECTOR               0xfe
 #define RESCHEDULE_VECTOR               0xfd
 #define CALL_FUNCTION_VECTOR            0xfc
+#define CALL_FUNCTION_SINGLE_VECTOR     0xfb
 #define THERMAL_APIC_VECTOR             0xfa
 #define THRESHOLD_APIC_VECTOR           0xf9
 #define INVALIDATE_TLB_VECTOR_END       0xf7
@@ -143,6 +145,7 @@
 #define VIC_RESCHEDULE_CPI              4
 #define VIC_ENABLE_IRQ_CPI              5
 #define VIC_CALL_FUNCTION_CPI           6
+#define VIC_CALL_FUNCTION_SINGLE_CPI    7
 /* Now the QIC CPIs:  Since we don't need the two initial levels,
 * these are 2 less than the VIC CPIs */
@@ -152,9 +155,10 @@
 #define QIC_RESCHEDULE_CPI              (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
 #define QIC_ENABLE_IRQ_CPI              (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
 #define QIC_CALL_FUNCTION_CPI           (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
+#define QIC_CALL_FUNCTION_SINGLE_CPI    (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
 #define VIC_START_FAKE_CPI              VIC_TIMER_CPI
-#define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_CPI
+#define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_SINGLE_CPI
 /* this is the SYS_INT CPI. */
 #define VIC_SYS_INT                     8
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
index bc861469bdba..9283b60a1dd2 100644
--- a/include/asm-x86/mach-default/entry_arch.h
+++ b/include/asm-x86/mach-default/entry_arch.h
@@ -13,6 +13,7 @@
 BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
 BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
 BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
+BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
 #endif
 /*
diff --git a/include/asm-x86/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h
index b183fa6d83d9..86be554342d4 100644
--- a/include/asm-x86/mach-visws/entry_arch.h
+++ b/include/asm-x86/mach-visws/entry_arch.h
@@ -1,23 +1,5 @@
 /*
- * The following vectors are part of the Linux architecture, there
+ * VISWS uses the standard Linux entry points:
- * is no hardware IRQ pin equivalent for them, they are triggered
- * through the ICC by us (IPIs)
 */
-#ifdef CONFIG_X86_SMP
-BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
-BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
-BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
-#endif
-/*
+#include "../mach-default/entry_arch.h"
- * every pentium local APIC has two 'local interrupts', with a
- * soft-definable vector attached to both interrupts, one of
- * which is a timer interrupt, the other one is error counter
- * overflow. Linux uses the local APIC timer interrupt to get
- * a much simpler SMP time architecture:
- */
-#ifdef CONFIG_X86_LOCAL_APIC
-BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
-BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
-BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
-#endif
diff --git a/include/asm-x86/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h
index 4a1e1e8c10b6..ae52624b5937 100644
--- a/include/asm-x86/mach-voyager/entry_arch.h
+++ b/include/asm-x86/mach-voyager/entry_arch.h
@@ -23,4 +23,4 @@ BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
 BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
 BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
 BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
+BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 2e221f1ce0b2..c2784b3e0b77 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -50,9 +50,9 @@ struct smp_ops {
        void (*smp_send_stop)(void);
        void (*smp_send_reschedule)(int cpu);
-        int (*smp_call_function_mask)(cpumask_t mask,
-                                      void (*func)(void *info), void *info,
+        void (*send_call_func_ipi)(cpumask_t mask);
-                                      int wait);
+        void (*send_call_func_single_ipi)(int cpu);
 };
 /* Globals due to paravirt */
@@ -94,17 +94,22 @@ static inline void smp_send_reschedule(int cpu)
        smp_ops.smp_send_reschedule(cpu);
 }
-static inline int smp_call_function_mask(cpumask_t mask,
+static inline void arch_send_call_function_single_ipi(int cpu)
-                                         void (*func) (void *info), void *info,
+{
-                                         int wait)
+        smp_ops.send_call_func_single_ipi(cpu);
+}
+static inline void arch_send_call_function_ipi(cpumask_t mask)
 {
-        return smp_ops.smp_call_function_mask(mask, func, info, wait);
+        smp_ops.send_call_func_ipi(mask);
 }
 void native_smp_prepare_boot_cpu(void);
 void native_smp_prepare_cpus(unsigned int max_cpus);
 void native_smp_cpus_done(unsigned int max_cpus);
 int native_cpu_up(unsigned int cpunum);
+void native_send_call_func_ipi(cpumask_t mask);
+void native_send_call_func_single_ipi(int cpu);
 extern int __cpu_disable(void);
 extern void __cpu_die(unsigned int cpu);
@@ -197,7 +202,5 @@ static inline int hard_smp_processor_id(void)
 extern void cpu_uninit(void);
 #endif
-extern void lock_ipi_call_lock(void);
-extern void unlock_ipi_call_lock(void);
 #endif /* __ASSEMBLY__ */
 #endif
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
index 596312a7bfc9..f8d57ea1f05f 100644
--- a/include/asm-x86/xen/events.h
+++ b/include/asm-x86/xen/events.h
@@ -4,6 +4,7 @@
 enum ipi_vector {
        XEN_RESCHEDULE_VECTOR,
        XEN_CALL_FUNCTION_VECTOR,
+        XEN_CALL_FUNCTION_SINGLE_VECTOR,
        XEN_NR_IPIS,
 };
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 0764b662b339..1c1b13e29223 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1089,6 +1089,7 @@ extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size);
 extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size);
 extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev);
+extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev);
 extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev);
 static __inline__ struct drm_map *drm_core_findmap(struct drm_device *dev,
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 1ffd8bfdc4c9..32a441b05fd5 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -651,7 +651,6 @@ extern void generic_make_request(struct bio *bio);
 extern void blk_rq_init(struct request_queue *q, struct request *rq);
 extern void blk_put_request(struct request *);
 extern void __blk_put_request(struct request_queue *, struct request *);
-extern void blk_end_sync_rq(struct request *rq, int error);
 extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
 extern void blk_insert_request(struct request_queue *, struct request *, int, void *);
 extern void blk_requeue_request(struct request_queue *, struct request *);
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index d982eb89c77d..98202c672fde 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -3,6 +3,7 @@
 #include <asm/atomic.h>
 #include <linux/list.h>
+#include <linux/rculist.h>
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/rcupdate.h>
diff --git a/include/linux/firmware.h b/include/linux/firmware.h
index 6c7eff2ebada..c8ecf5b2a207 100644
--- a/include/linux/firmware.h
+++ b/include/linux/firmware.h
@@ -1,18 +1,39 @@
 #ifndef _LINUX_FIRMWARE_H
 #define _LINUX_FIRMWARE_H
 #include <linux/module.h>
 #include <linux/types.h>
+#include <linux/compiler.h>
 #define FIRMWARE_NAME_MAX 30 
 #define FW_ACTION_NOHOTPLUG 0
 #define FW_ACTION_HOTPLUG 1
 struct firmware {
        size_t size;
-        u8 *data;
+        const u8 *data;
 };
 struct device;
+struct builtin_fw {
+        char *name;
+        void *data;
+        unsigned long size;
+};
+/* We have to play tricks here much like stringify() to get the
+   __COUNTER__ macro to be expanded as we want it */
+#define __fw_concat1(x, y) x##y
+#define __fw_concat(x, y) __fw_concat1(x, y)
+#define DECLARE_BUILTIN_FIRMWARE(name, blob)                                 \
+        DECLARE_BUILTIN_FIRMWARE_SIZE(name, &(blob), sizeof(blob))
+#define DECLARE_BUILTIN_FIRMWARE_SIZE(name, blob, size)                      \
+        static const struct builtin_fw __fw_concat(__builtin_fw,__COUNTER__) \
+        __used __section(.builtin_fw) = { name, blob, size }
 #if defined(CONFIG_FW_LOADER) || (defined(CONFIG_FW_LOADER_MODULE) && defined(MODULE))
 int request_firmware(const struct firmware **fw, const char *name,
                     struct device *device);
diff --git a/include/linux/fs.h b/include/linux/fs.h
index faac13e2cc5c..52e510a0aec2 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -1740,6 +1740,8 @@ extern int wait_on_page_writeback_range(struct address_space *mapping,
                                pgoff_t start, pgoff_t end);
 extern int __filemap_fdatawrite_range(struct address_space *mapping,
                                loff_t start, loff_t end, int sync_mode);
+extern int filemap_fdatawrite_range(struct address_space *mapping,
+                                loff_t start, loff_t end);
 extern long do_fsync(struct file *file, int datasync);
 extern void sync_supers(void);
diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h
index 77afbb60fd11..0177d280f733 100644
--- a/include/linux/i2c-algo-pcf.h
+++ b/include/linux/i2c-algo-pcf.h
@@ -33,9 +33,11 @@ struct i2c_algo_pcf_data {
        int  (*getclock) (void *data);
        void (*waitforpin) (void);
-        /* local settings */
+        /* Multi-master lost arbitration back-off delay (msecs)
-        int udelay;
+         * This should be set by the bus adapter or knowledgable client
-        int timeout;
+         * if bus is multi-mastered, else zero
+         */
+        unsigned long lab_mdelay;
 };
 int i2c_pcf_add_bus(struct i2c_adapter *);
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 580acc93903e..ef13b7c66df3 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -91,8 +91,6 @@
 #define I2C_DRIVERID_M52790     95      /* Mitsubishi M52790SP/FP AV switch */
 #define I2C_DRIVERID_CS5345     96      /* cs5345 audio processor       */
-#define I2C_DRIVERID_I2CDEV     900
 #define I2C_DRIVERID_OV7670 1048        /* Omnivision 7670 camera */
 /*
@@ -111,7 +109,6 @@
 #define I2C_HW_B_RIVA           0x010010 /* Riva based graphics cards */
 #define I2C_HW_B_IOC            0x010011 /* IOC bit-wiggling */
 #define I2C_HW_B_IXP2000        0x010016 /* GPIO on IXP2000 systems */
-#define I2C_HW_B_S3VIA          0x010018 /* S3Via ProSavage adapter */
 #define I2C_HW_B_ZR36067        0x010019 /* Zoran-36057/36067 based boards */
 #define I2C_HW_B_PCILYNX        0x01001a /* TI PCILynx I2C adapter */
 #define I2C_HW_B_CX2388x        0x01001b /* connexant 2388x based tv cards */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 8dc730132192..08be0d21864c 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -35,6 +35,8 @@
 #include <linux/sched.h>        /* for completion */
 #include <linux/mutex.h>
+extern struct bus_type i2c_bus_type;
 /* --- General options ------------------------------------------------ */
 struct i2c_msg;
@@ -43,6 +45,7 @@ struct i2c_adapter;
 struct i2c_client;
 struct i2c_driver;
 union i2c_smbus_data;
+struct i2c_board_info;
 /*
 * The master routines are the ones normally used to transmit data to devices
@@ -69,9 +72,8 @@ extern s32 i2c_smbus_xfer (struct i2c_adapter * adapter, u16 addr,
                           union i2c_smbus_data * data);
 /* Now follow the 'nice' access routines. These also document the calling
-   conventions of smbus_access. */
+   conventions of i2c_smbus_xfer. */
-extern s32 i2c_smbus_write_quick(struct i2c_client * client, u8 value);
 extern s32 i2c_smbus_read_byte(struct i2c_client * client);
 extern s32 i2c_smbus_write_byte(struct i2c_client * client, u8 value);
 extern s32 i2c_smbus_read_byte_data(struct i2c_client * client, u8 command);
@@ -93,15 +95,33 @@ extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client,
                                          u8 command, u8 length,
                                          const u8 *values);
-/*
+/**
- * A driver is capable of handling one or more physical devices present on
+ * struct i2c_driver - represent an I2C device driver
- * I2C adapters. This information is used to inform the driver of adapter
+ * @class: What kind of i2c device we instantiate (for detect)
- * events.
+ * @detect: Callback for device detection
+ * @address_data: The I2C addresses to probe, ignore or force (for detect)
+ * @clients: List of detected clients we created (for i2c-core use only)
 *
 * The driver.owner field should be set to the module owner of this driver.
 * The driver.name field should be set to the name of this driver.
+ *
+ * For automatic device detection, both @detect and @address_data must
+ * be defined. @class should also be set, otherwise only devices forced
+ * with module parameters will be created. The detect function must
+ * fill at least the name field of the i2c_board_info structure it is
+ * handed upon successful detection, and possibly also the flags field.
+ *
+ * If @detect is missing, the driver will still work fine for enumerated
+ * devices. Detected devices simply won't be supported. This is expected
+ * for the many I2C/SMBus devices which can't be detected reliably, and
+ * the ones which can always be enumerated in practice.
+ *
+ * The i2c_client structure which is handed to the @detect callback is
+ * not a real i2c_client. It is initialized just enough so that you can
+ * call i2c_smbus_read_byte_data and friends on it. Don't do anything
+ * else with it. In particular, calling dev_dbg and friends on it is
+ * not allowed.
 */
 struct i2c_driver {
        int id;
        unsigned int class;
@@ -141,6 +161,11 @@ struct i2c_driver {
        struct device_driver driver;
        const struct i2c_device_id *id_table;
+        /* Device detection callback for automatic device creation */
+        int (*detect)(struct i2c_client *, int kind, struct i2c_board_info *);
+        const struct i2c_client_address_data *address_data;
+        struct list_head clients;
 };
 #define to_i2c_driver(d) container_of(d, struct i2c_driver, driver)
@@ -156,6 +181,7 @@ struct i2c_driver {
 * @dev: Driver model device node for the slave.
 * @irq: indicates the IRQ generated by this device (if any)
 * @list: list of active/busy clients (DEPRECATED)
+ * @detected: member of an i2c_driver.clients list
 * @released: used to synchronize client releases & detaches and references
 *
 * An i2c_client identifies a single device (i.e. chip) connected to an
@@ -173,6 +199,7 @@ struct i2c_client {
        struct device dev;              /* the device structure         */
        int irq;                        /* irq issued by device         */
        struct list_head list;          /* DEPRECATED */
+        struct list_head detected;
        struct completion released;
 };
 #define to_i2c_client(d) container_of(d, struct i2c_client, dev)
@@ -350,10 +377,11 @@ static inline void i2c_set_adapdata (struct i2c_adapter *dev, void *data)
 #define I2C_CLASS_HWMON         (1<<0)  /* lm_sensors, ... */
 #define I2C_CLASS_TV_ANALOG     (1<<1)  /* bttv + friends */
 #define I2C_CLASS_TV_DIGITAL    (1<<2)  /* dvb cards */
-#define I2C_CLASS_DDC           (1<<3)  /* i2c-matroxfb ? */
+#define I2C_CLASS_DDC           (1<<3)  /* DDC bus on graphics adapters */
 #define I2C_CLASS_CAM_ANALOG    (1<<4)  /* camera with analog CCD */
 #define I2C_CLASS_CAM_DIGITAL   (1<<5)  /* most webcams */
 #define I2C_CLASS_SOUND         (1<<6)  /* sound devices */
+#define I2C_CLASS_SPD           (1<<7)  /* SPD EEPROMs and similar */
 #define I2C_CLASS_ALL           (UINT_MAX) /* all of the above */
 /* i2c_client_address_data is the struct for holding default client
@@ -537,7 +565,7 @@ union i2c_smbus_data {
                               /* and one more for user-space compatibility */
 };
-/* smbus_access read or write markers */
+/* i2c_smbus_xfer read or write markers */
 #define I2C_SMBUS_READ  1
 #define I2C_SMBUS_WRITE 0
diff --git a/include/linux/i2c/at24.h b/include/linux/i2c/at24.h
new file mode 100644
index 000000000000..f6edd522a929
--- /dev/null
+++ b/include/linux/i2c/at24.h
@@ -0,0 +1,28 @@
+#ifndef _LINUX_AT24_H
+#define _LINUX_AT24_H
+#include <linux/types.h>
+/*
+ * As seen through Linux I2C, differences between the most common types of I2C
+ * memory include:
+ * - How much memory is available (usually specified in bit)?
+ * - What write page size does it support?
+ * - Special flags (16 bit addresses, read_only, world readable...)?
+ *
+ * If you set up a custom eeprom type, please double-check the parameters.
+ * Especially page_size needs extra care, as you risk data loss if your value
+ * is bigger than what the chip actually supports!
+ */
+struct at24_platform_data {
+        u32             byte_len;               /* size (sum of all addr) */
+        u16             page_size;              /* for writes */
+        u8              flags;
+#define AT24_FLAG_ADDR16        0x80    /* address pointer is 16 bit */
+#define AT24_FLAG_READONLY      0x40    /* sysfs-entry will be read-only */
+#define AT24_FLAG_IRUGO         0x20    /* sysfs-entry will be world-readable */
+#define AT24_FLAG_TAKE8ADDR     0x10    /* take always 8 addresses (24c00) */
+};
+#endif /* _LINUX_AT24_H */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index eddb6daadf4a..ac4eeb2932ef 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -364,7 +364,6 @@ typedef struct ide_drive_s {
        u8      wcache;         /* status of write cache */
        u8      acoustic;       /* acoustic management */
        u8      media;          /* disk, cdrom, tape, floppy, ... */
-        u8      ctl;            /* "normal" value for Control register */
        u8      ready_stat;     /* min status value for drive ready */
        u8      mult_count;     /* current multiple sector setting */
        u8      mult_req;       /* requested multiple sector setting */
@@ -493,7 +492,7 @@ typedef struct hwif_s {
        void (*ide_dma_clear_irq)(ide_drive_t *drive);
        void (*OUTB)(u8 addr, unsigned long port);
-        void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
+        void (*OUTBSYNC)(struct hwif_s *hwif, u8 addr, unsigned long port);
        u8  (*INB)(unsigned long port);
@@ -532,7 +531,6 @@ typedef struct hwif_s {
        unsigned        serialized : 1; /* serialized all channel operation */
        unsigned        sharing_irq: 1; /* 1 = sharing irq with another hwif */
        unsigned        sg_mapped  : 1; /* sg_table and sg_nents are ready */
-        unsigned        mmio       : 1; /* host uses MMIO */
        struct device           gendev;
        struct device           *portdev;
@@ -604,12 +602,13 @@ enum {
        PC_FLAG_SUPPRESS_ERROR          = (1 << 1),
        PC_FLAG_WAIT_FOR_DSC            = (1 << 2),
        PC_FLAG_DMA_OK                  = (1 << 3),
-        PC_FLAG_DMA_RECOMMENDED         = (1 << 4),
+        PC_FLAG_DMA_IN_PROGRESS         = (1 << 4),
-        PC_FLAG_DMA_IN_PROGRESS         = (1 << 5),
+        PC_FLAG_DMA_ERROR               = (1 << 5),
-        PC_FLAG_DMA_ERROR               = (1 << 6),
+        PC_FLAG_WRITING                 = (1 << 6),
-        PC_FLAG_WRITING                 = (1 << 7),
        /* command timed out */
-        PC_FLAG_TIMEDOUT                = (1 << 8),
+        PC_FLAG_TIMEDOUT                = (1 << 7),
+        PC_FLAG_ZIP_DRIVE               = (1 << 8),
+        PC_FLAG_DRQ_INTERRUPT           = (1 << 9),
 };
 struct ide_atapi_pc {
@@ -642,8 +641,8 @@ struct ide_atapi_pc {
         * to change/removal later.
         */
        u8 pc_buf[256];
-        void (*idefloppy_callback) (ide_drive_t *);
-        ide_startstop_t (*idetape_callback) (ide_drive_t *);
+        void (*callback)(ide_drive_t *);
        /* idetape only */
        struct idetape_bh *bh;
@@ -813,10 +812,6 @@ int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsig
 #ifndef _IDE_C
 extern  ide_hwif_t      ide_hwifs[];            /* master data repository */
 #endif
-extern int ide_noacpi;
-extern int ide_acpigtf;
-extern int ide_acpionboot;
-extern int noautodma;
 extern int ide_vlb_clk;
 extern int ide_pci_clk;
@@ -857,25 +852,12 @@ int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
 extern ide_startstop_t ide_do_reset (ide_drive_t *);
-extern void ide_init_drive_cmd (struct request *rq);
+extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
-/*
- * "action" parameter type for ide_do_drive_cmd() below.
- */
-typedef enum {
-        ide_wait,       /* insert rq at end of list, and wait for it */
-        ide_preempt,    /* insert rq in front of current request */
-        ide_head_wait,  /* insert rq in front of current request and wait for it */
-        ide_end         /* insert rq at end of list, but don't wait for it */
-} ide_action_t;
-extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
 enum {
        IDE_TFLAG_LBA48                 = (1 << 0),
-        IDE_TFLAG_NO_SELECT_MASK        = (1 << 1),
        IDE_TFLAG_FLAGGED               = (1 << 2),
        IDE_TFLAG_OUT_DATA              = (1 << 3),
        IDE_TFLAG_OUT_HOB_FEATURE       = (1 << 4),
@@ -980,11 +962,23 @@ typedef struct ide_task_s {
 void ide_tf_dump(const char *, struct ide_taskfile *);
 extern void SELECT_DRIVE(ide_drive_t *);
+void SELECT_MASK(ide_drive_t *, int);
 extern int drive_is_ready(ide_drive_t *);
 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
+ide_startstop_t ide_pc_intr(ide_drive_t *drive, struct ide_atapi_pc *pc,
+        ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry,
+        void (*update_buffers)(ide_drive_t *, struct ide_atapi_pc *),
+        void (*retry_pc)(ide_drive_t *), void (*dsc_handle)(ide_drive_t *),
+        void (*io_buffers)(ide_drive_t *, struct ide_atapi_pc *, unsigned int,
+                           int));
+ide_startstop_t ide_transfer_pc(ide_drive_t *, struct ide_atapi_pc *,
+                                ide_handler_t *, unsigned int, ide_expiry_t *);
+ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_atapi_pc *,
+                             ide_handler_t *, unsigned int, ide_expiry_t *);
 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
 void task_end_request(ide_drive_t *, struct request *, u8);
@@ -996,8 +990,6 @@ int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
-extern int system_bus_clock(void);
 extern int ide_driveid_update(ide_drive_t *);
 extern int ide_config_drive_speed(ide_drive_t *, u8);
 extern u8 eighty_ninty_three (ide_drive_t *);
@@ -1349,7 +1341,8 @@ static inline void ide_set_irq(ide_drive_t *drive, int on)
 {
        ide_hwif_t *hwif = drive->hwif;
-        hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr);
+        hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | (on ? 0 : 2),
+                       hwif->io_ports.ctl_addr);
 }
 static inline u8 ide_read_status(ide_drive_t *drive)
diff --git a/include/linux/ihex.h b/include/linux/ihex.h
new file mode 100644
index 000000000000..2baace2788a7
--- /dev/null
+++ b/include/linux/ihex.h
@@ -0,0 +1,74 @@
+/*
+ * Compact binary representation of ihex records. Some devices need their
+ * firmware loaded in strange orders rather than a single big blob, but
+ * actually parsing ihex-as-text within the kernel seems silly. Thus,...
+ */
+#ifndef __LINUX_IHEX_H__
+#define __LINUX_IHEX_H__
+#include <linux/types.h>
+#include <linux/firmware.h>
+#include <linux/device.h>
+/* Intel HEX files actually limit the length to 256 bytes, but we have
+   drivers which would benefit from using separate records which are
+   longer than that, so we extend to 16 bits of length */
+struct ihex_binrec {
+        __be32 addr;
+        __be16 len;
+        uint8_t data[0];
+} __attribute__((aligned(4)));
+/* Find the next record, taking into account the 4-byte alignment */
+static inline const struct ihex_binrec *
+ihex_next_binrec(const struct ihex_binrec *rec)
+{
+        int next = ((be16_to_cpu(rec->len) + 5) & ~3) - 2;
+        rec = (void *)&rec->data[next];
+        return be16_to_cpu(rec->len) ? rec : NULL;
+}
+/* Check that ihex_next_binrec() won't take us off the end of the image... */
+static inline int ihex_validate_fw(const struct firmware *fw)
+{
+        const struct ihex_binrec *rec;
+        size_t ofs = 0;
+        while (ofs <= fw->size - sizeof(*rec)) {
+                rec = (void *)&fw->data[ofs];
+                /* Zero length marks end of records */
+                if (!be16_to_cpu(rec->len))
+                        return 0;
+                /* Point to next record... */
+                ofs += (sizeof(*rec) + be16_to_cpu(rec->len) + 3) & ~3;
+        }
+        return -EINVAL;
+}
+/* Request firmware and validate it so that we can trust we won't
+ * run off the end while reading records... */
+static inline int request_ihex_firmware(const struct firmware **fw,
+                                        const char *fw_name,
+                                        struct device *dev)
+{
+        const struct firmware *lfw;
+        int ret;
+        ret = request_firmware(&lfw, fw_name, dev);
+        if (ret)
+                return ret;
+        ret = ihex_validate_fw(lfw);
+        if (ret) {
+                dev_err(dev, "Firmware \"%s\" not valid IHEX records\n",
+                        fw_name);
+                release_firmware(lfw);
+                return ret;
+        }
+        *fw = lfw;
+        return 0;
+}
+#endif /* __LINUX_IHEX_H__ */
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index a86186dd0474..62aa4f895abe 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -104,8 +104,11 @@ extern void enable_irq(unsigned int irq);
 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
+extern cpumask_t irq_default_affinity;
 extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
 extern int irq_can_set_affinity(unsigned int irq);
+extern int irq_select_affinity(unsigned int irq);
 #else /* CONFIG_SMP */
@@ -119,6 +122,8 @@ static inline int irq_can_set_affinity(unsigned int irq)
        return 0;
 }
+static inline int irq_select_affinity(unsigned int irq)  { return 0; }
 #endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */
 #ifdef CONFIG_GENERIC_HARDIRQS
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 552e0ec269c9..8ccb462ea42c 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -244,15 +244,6 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
 }
 #endif
-#ifdef CONFIG_AUTO_IRQ_AFFINITY
-extern int select_smp_affinity(unsigned int irq);
-#else
-static inline int select_smp_affinity(unsigned int irq)
-{
-        return 1;
-}
-#endif
 extern int no_irq_affinity;
 static inline int irq_balancing_disabled(unsigned int irq)
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index d147f0f90360..3dd209007098 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -168,6 +168,8 @@ struct commit_header {
        unsigned char   h_chksum_size;
        unsigned char   h_padding[2];
        __be32          h_chksum[JBD2_CHECKSUM_BYTES];
+        __be64          h_commit_sec;
+        __be32          h_commit_nsec;
 };
 /*
@@ -379,6 +381,38 @@ static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh)
        bit_spin_unlock(BH_JournalHead, &bh->b_state);
 }
+/* Flags in jbd_inode->i_flags */
+#define __JI_COMMIT_RUNNING 0
+/* Commit of the inode data in progress. We use this flag to protect us from
+ * concurrent deletion of inode. We cannot use reference to inode for this
+ * since we cannot afford doing last iput() on behalf of kjournald
+ */
+#define JI_COMMIT_RUNNING (1 << __JI_COMMIT_RUNNING)
+/**
+ * struct jbd_inode is the structure linking inodes in ordered mode
+ *   present in a transaction so that we can sync them during commit.
+ */
+struct jbd2_inode {
+        /* Which transaction does this inode belong to? Either the running
+         * transaction or the committing one. [j_list_lock] */
+        transaction_t *i_transaction;
+        /* Pointer to the running transaction modifying inode's data in case
+         * there is already a committing transaction touching it. [j_list_lock] */
+        transaction_t *i_next_transaction;
+        /* List of inodes in the i_transaction [j_list_lock] */
+        struct list_head i_list;
+        /* VFS inode this inode belongs to [constant during the lifetime
+         * of the structure] */
+        struct inode *i_vfs_inode;
+        /* Flags of inode [j_list_lock] */
+        unsigned int i_flags;
+};
 struct jbd2_revoke_table_s;
 /**
@@ -509,24 +543,12 @@ struct transaction_s
        struct journal_head     *t_reserved_list;
        /*
-         * Doubly-linked circular list of all buffers under writeout during
-         * commit [j_list_lock]
-         */
-        struct journal_head     *t_locked_list;
-        /*
         * Doubly-linked circular list of all metadata buffers owned by this
         * transaction [j_list_lock]
         */
        struct journal_head     *t_buffers;
        /*
-         * Doubly-linked circular list of all data buffers still to be
-         * flushed before this transaction can be committed [j_list_lock]
-         */
-        struct journal_head     *t_sync_datalist;
-        /*
         * Doubly-linked circular list of all forget buffers (superseded
         * buffers which we can un-checkpoint once this transaction commits)
         * [j_list_lock]
@@ -565,6 +587,12 @@ struct transaction_s
        struct journal_head     *t_log_list;
        /*
+         * List of inodes whose data we've modified in data=ordered mode.
+         * [j_list_lock]
+         */
+        struct list_head        t_inode_list;
+        /*
         * Protects info related to handles
         */
        spinlock_t              t_handle_lock;
@@ -1004,7 +1032,6 @@ extern int	 jbd2_journal_extend (handle_t *, int nblocks);
 extern int       jbd2_journal_get_write_access(handle_t *, struct buffer_head *);
 extern int       jbd2_journal_get_create_access (handle_t *, struct buffer_head *);
 extern int       jbd2_journal_get_undo_access(handle_t *, struct buffer_head *);
-extern int       jbd2_journal_dirty_data (handle_t *, struct buffer_head *);
 extern int       jbd2_journal_dirty_metadata (handle_t *, struct buffer_head *);
 extern void      jbd2_journal_release_buffer (handle_t *, struct buffer_head *);
 extern int       jbd2_journal_forget (handle_t *, struct buffer_head *);
@@ -1044,6 +1071,10 @@ extern void	   jbd2_journal_ack_err    (journal_t *);
 extern int         jbd2_journal_clear_err  (journal_t *);
 extern int         jbd2_journal_bmap(journal_t *, unsigned long, unsigned long long *);
 extern int         jbd2_journal_force_commit(journal_t *);
+extern int         jbd2_journal_file_inode(handle_t *handle, struct jbd2_inode *inode);
+extern int         jbd2_journal_begin_ordered_truncate(struct jbd2_inode *inode, loff_t new_size);
+extern void        jbd2_journal_init_jbd_inode(struct jbd2_inode *jinode, struct inode *inode);
+extern void        jbd2_journal_release_jbd_inode(journal_t *journal, struct jbd2_inode *jinode);
 /*
 * journal_head management
@@ -1179,15 +1210,13 @@ static inline int jbd_space_needed(journal_t *journal)
 /* journaling buffer types */
 #define BJ_None         0       /* Not journaled */
-#define BJ_SyncData     1       /* Normal data: flush before commit */
+#define BJ_Metadata     1       /* Normal journaled metadata */
-#define BJ_Metadata     2       /* Normal journaled metadata */
+#define BJ_Forget       2       /* Buffer superseded by this transaction */
-#define BJ_Forget       3       /* Buffer superseded by this transaction */
+#define BJ_IO           3       /* Buffer is for temporary IO use */
-#define BJ_IO           4       /* Buffer is for temporary IO use */
+#define BJ_Shadow       4       /* Buffer contents being shadowed to the log */
-#define BJ_Shadow       5       /* Buffer contents being shadowed to the log */
+#define BJ_LogCtl       5       /* Buffer contains log descriptors */
-#define BJ_LogCtl       6       /* Buffer contains log descriptors */
+#define BJ_Reserved     6       /* Buffer is reserved for access by journal */
-#define BJ_Reserved     7       /* Buffer is reserved for access by journal */
+#define BJ_Types        7
-#define BJ_Locked       8       /* Locked for I/O during commit */
-#define BJ_Types        9
 extern int jbd_blocks_per_page(struct inode *inode);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index e57e5d08312d..5b247b8a6b3b 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -27,6 +27,7 @@
 #define __LINUX_LIBATA_H__
 #include <linux/delay.h>
+#include <linux/jiffies.h>
 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
 #include <linux/scatterlist.h>
@@ -115,7 +116,7 @@ enum {
        /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
        ATA_MAX_QUEUE           = 32,
        ATA_TAG_INTERNAL        = ATA_MAX_QUEUE - 1,
-        ATA_SHORT_PAUSE         = (HZ >> 6) + 1,
+        ATA_SHORT_PAUSE         = 16,
        ATAPI_MAX_DRAIN         = 16 << 10,
@@ -168,6 +169,7 @@ enum {
        ATA_LFLAG_ASSUME_CLASS  = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
        ATA_LFLAG_NO_RETRY      = (1 << 5), /* don't retry this link */
        ATA_LFLAG_DISABLED      = (1 << 6), /* link is disabled */
+        ATA_LFLAG_SW_ACTIVITY   = (1 << 7), /* keep activity stats */
        /* struct ata_port flags */
        ATA_FLAG_SLAVE_POSS     = (1 << 0), /* host supports slave dev */
@@ -190,6 +192,10 @@ enum {
        ATA_FLAG_AN             = (1 << 18), /* controller supports AN */
        ATA_FLAG_PMP            = (1 << 19), /* controller supports PMP */
        ATA_FLAG_IPM            = (1 << 20), /* driver can handle IPM */
+        ATA_FLAG_EM             = (1 << 21), /* driver supports enclosure
+                                              * management */
+        ATA_FLAG_SW_ACTIVITY    = (1 << 22), /* driver supports sw activity
+                                              * led */
        /* The following flag belongs to ap->pflags but is kept in
         * ap->flags because it's referenced in many LLDs and will be
@@ -234,17 +240,16 @@ enum {
        /* bits 24:31 of host->flags are reserved for LLD specific flags */
        /* various lengths of time */
-        ATA_TMOUT_BOOT          = 30 * HZ,      /* heuristic */
+        ATA_TMOUT_BOOT          = 30000,        /* heuristic */
-        ATA_TMOUT_BOOT_QUICK    = 7 * HZ,       /* heuristic */
+        ATA_TMOUT_BOOT_QUICK    =  7000,        /* heuristic */
-        ATA_TMOUT_INTERNAL      = 30 * HZ,
+        ATA_TMOUT_INTERNAL_QUICK = 5000,
-        ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
        /* FIXME: GoVault needs 2s but we can't afford that without
         * parallel probing.  800ms is enough for iVDR disk
         * HHD424020F7SV00.  Increase to 2secs when parallel probing
         * is in place.
         */
-        ATA_TMOUT_FF_WAIT       = 4 * HZ / 5,
+        ATA_TMOUT_FF_WAIT       =  800,
        /* Spec mandates to wait for ">= 2ms" before checking status
         * after reset.  We wait 150ms, because that was the magic
@@ -256,14 +261,14 @@ enum {
         *
         * Old drivers/ide uses the 2mS rule and then waits for ready.
         */
-        ATA_WAIT_AFTER_RESET_MSECS = 150,
+        ATA_WAIT_AFTER_RESET    =  150,
        /* If PMP is supported, we have to do follow-up SRST.  As some
         * PMPs don't send D2H Reg FIS after hardreset, LLDs are
         * advised to wait only for the following duration before
         * doing SRST.
         */
-        ATA_TMOUT_PMP_SRST_WAIT = 1 * HZ,
+        ATA_TMOUT_PMP_SRST_WAIT = 1000,
        /* ATA bus states */
        BUS_UNKNOWN             = 0,
@@ -340,6 +345,11 @@ enum {
        SATA_PMP_RW_TIMEOUT     = 3000,         /* PMP read/write timeout */
+        /* This should match the actual table size of
+         * ata_eh_cmd_timeout_table in libata-eh.c.
+         */
+        ATA_EH_CMD_TIMEOUT_TABLE_SIZE = 5,
        /* Horkage types. May be set by libata or controller on drives
           (some horkage may be drive/controller pair dependant */
@@ -441,6 +451,15 @@ enum link_pm {
        MEDIUM_POWER,
 };
 extern struct device_attribute dev_attr_link_power_management_policy;
+extern struct device_attribute dev_attr_em_message_type;
+extern struct device_attribute dev_attr_em_message;
+extern struct device_attribute dev_attr_sw_activity;
+enum sw_activity {
+        OFF,
+        BLINK_ON,
+        BLINK_OFF,
+};
 #ifdef CONFIG_ATA_SFF
 struct ata_ioports {
@@ -597,10 +616,14 @@ struct ata_eh_info {
 struct ata_eh_context {
        struct ata_eh_info      i;
        int                     tries[ATA_MAX_DEVICES];
+        int                     cmd_timeout_idx[ATA_MAX_DEVICES]
+                                               [ATA_EH_CMD_TIMEOUT_TABLE_SIZE];
        unsigned int            classes[ATA_MAX_DEVICES];
        unsigned int            did_probe_mask;
        unsigned int            saved_ncq_enabled;
        u8                      saved_xfer_mode[ATA_MAX_DEVICES];
+        /* timestamp for the last reset attempt or success */
+        unsigned long           last_reset;
 };
 struct ata_acpi_drive
@@ -692,6 +715,7 @@ struct ata_port {
        struct timer_list       fastdrain_timer;
        unsigned long           fastdrain_cnt;
+        int                     em_message_type;
        void                    *private_data;
 #ifdef CONFIG_ATA_ACPI
@@ -783,6 +807,12 @@ struct ata_port_operations {
        u8   (*bmdma_status)(struct ata_port *ap);
 #endif /* CONFIG_ATA_SFF */
+        ssize_t (*em_show)(struct ata_port *ap, char *buf);
+        ssize_t (*em_store)(struct ata_port *ap, const char *message,
+                            size_t size);
+        ssize_t (*sw_activity_show)(struct ata_device *dev, char *buf);
+        ssize_t (*sw_activity_store)(struct ata_device *dev,
+                                     enum sw_activity val);
        /*
         * Obsolete
         */
@@ -895,8 +925,7 @@ extern void ata_host_resume(struct ata_host *host);
 #endif
 extern int ata_ratelimit(void);
 extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
-                             unsigned long interval_msec,
+                             unsigned long interval, unsigned long timeout);
-                             unsigned long timeout_msec);
 extern int atapi_cmd_type(u8 opcode);
 extern void ata_tf_to_fis(const struct ata_taskfile *tf,
                          u8 pmp, int is_cmd, u8 *fis);
@@ -1389,6 +1418,12 @@ static inline int ata_check_ready(u8 status)
        return 0;
 }
+static inline unsigned long ata_deadline(unsigned long from_jiffies,
+                                         unsigned long timeout_msecs)
+{
+        return from_jiffies + msecs_to_jiffies(timeout_msecs);
+}
 /**************************************************************************
 * PMP - drivers/ata/libata-pmp.c
diff --git a/include/linux/list.h b/include/linux/list.h
index 08cf4f651889..139ec41d9c2e 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -85,65 +85,6 @@ static inline void list_add_tail(struct list_head *new, struct list_head *head)
 }
 /*
- * Insert a new entry between two known consecutive entries.
- *
- * This is only for internal list manipulation where we know
- * the prev/next entries already!
- */
-static inline void __list_add_rcu(struct list_head * new,
-                struct list_head * prev, struct list_head * next)
-{
-        new->next = next;
-        new->prev = prev;
-        smp_wmb();
-        next->prev = new;
-        prev->next = new;
-}
-/**
- * list_add_rcu - add a new entry to rcu-protected list
- * @new: new entry to be added
- * @head: list head to add it after
- *
- * Insert a new entry after the specified head.
- * This is good for implementing stacks.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as list_add_rcu()
- * or list_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * list_for_each_entry_rcu().
- */
-static inline void list_add_rcu(struct list_head *new, struct list_head *head)
-{
-        __list_add_rcu(new, head, head->next);
-}
-/**
- * list_add_tail_rcu - add a new entry to rcu-protected list
- * @new: new entry to be added
- * @head: list head to add it before
- *
- * Insert a new entry before the specified head.
- * This is useful for implementing queues.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as list_add_tail_rcu()
- * or list_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * list_for_each_entry_rcu().
- */
-static inline void list_add_tail_rcu(struct list_head *new,
-                                        struct list_head *head)
-{
-        __list_add_rcu(new, head->prev, head);
-}
-/*
 * Delete a list entry by making the prev/next entries
 * point to each other.
 *
@@ -174,36 +115,6 @@ extern void list_del(struct list_head *entry);
 #endif
 /**
- * list_del_rcu - deletes entry from list without re-initialization
- * @entry: the element to delete from the list.
- *
- * Note: list_empty() on entry does not return true after this,
- * the entry is in an undefined state. It is useful for RCU based
- * lockfree traversal.
- *
- * In particular, it means that we can not poison the forward
- * pointers that may still be used for walking the list.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as list_del_rcu()
- * or list_add_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * list_for_each_entry_rcu().
- *
- * Note that the caller is not permitted to immediately free
- * the newly deleted entry.  Instead, either synchronize_rcu()
- * or call_rcu() must be used to defer freeing until an RCU
- * grace period has elapsed.
- */
-static inline void list_del_rcu(struct list_head *entry)
-{
-        __list_del(entry->prev, entry->next);
-        entry->prev = LIST_POISON2;
-}
-/**
 * list_replace - replace old entry by new one
 * @old : the element to be replaced
 * @new : the new element to insert
@@ -227,25 +138,6 @@ static inline void list_replace_init(struct list_head *old,
 }
 /**
- * list_replace_rcu - replace old entry by new one
- * @old : the element to be replaced
- * @new : the new element to insert
- *
- * The @old entry will be replaced with the @new entry atomically.
- * Note: @old should not be empty.
- */
-static inline void list_replace_rcu(struct list_head *old,
-                                struct list_head *new)
-{
-        new->next = old->next;
-        new->prev = old->prev;
-        smp_wmb();
-        new->next->prev = new;
-        new->prev->next = new;
-        old->prev = LIST_POISON2;
-}
-/**
 * list_del_init - deletes entry from list and reinitialize it.
 * @entry: the element to delete from the list.
 */
@@ -369,62 +261,6 @@ static inline void list_splice_init(struct list_head *list,
 }
 /**
- * list_splice_init_rcu - splice an RCU-protected list into an existing list.
- * @list:       the RCU-protected list to splice
- * @head:       the place in the list to splice the first list into
- * @sync:       function to sync: synchronize_rcu(), synchronize_sched(), ...
- *
- * @head can be RCU-read traversed concurrently with this function.
- *
- * Note that this function blocks.
- *
- * Important note: the caller must take whatever action is necessary to
- *      prevent any other updates to @head.  In principle, it is possible
- *      to modify the list as soon as sync() begins execution.
- *      If this sort of thing becomes necessary, an alternative version
- *      based on call_rcu() could be created.  But only if -really-
- *      needed -- there is no shortage of RCU API members.
- */
-static inline void list_splice_init_rcu(struct list_head *list,
-                                        struct list_head *head,
-                                        void (*sync)(void))
-{
-        struct list_head *first = list->next;
-        struct list_head *last = list->prev;
-        struct list_head *at = head->next;
-        if (list_empty(head))
-                return;
-        /* "first" and "last" tracking list, so initialize it. */
-        INIT_LIST_HEAD(list);
-        /*
-         * At this point, the list body still points to the source list.
-         * Wait for any readers to finish using the list before splicing
-         * the list body into the new list.  Any new readers will see
-         * an empty list.
-         */
-        sync();
-        /*
-         * Readers are finished with the source list, so perform splice.
-         * The order is important if the new list is global and accessible
-         * to concurrent RCU readers.  Note that RCU readers are not
-         * permitted to traverse the prev pointers without excluding
-         * this function.
-         */
-        last->next = at;
-        smp_wmb();
-        head->next = first;
-        first->prev = head;
-        at->prev = last;
-}
-/**
 * list_entry - get the struct for this entry
 * @ptr:        the &struct list_head pointer.
 * @type:       the type of the struct this is embedded in.
@@ -629,57 +465,6 @@ static inline void list_splice_init_rcu(struct list_head *list,
             &pos->member != (head);                                    \
             pos = n, n = list_entry(n->member.prev, typeof(*n), member))
-/**
- * list_for_each_rcu    -       iterate over an rcu-protected list
- * @pos:        the &struct list_head to use as a loop cursor.
- * @head:       the head for your list.
- *
- * This list-traversal primitive may safely run concurrently with
- * the _rcu list-mutation primitives such as list_add_rcu()
- * as long as the traversal is guarded by rcu_read_lock().
- */
-#define list_for_each_rcu(pos, head) \
-        for (pos = rcu_dereference((head)->next); \
-                prefetch(pos->next), pos != (head); \
-                pos = rcu_dereference(pos->next))
-#define __list_for_each_rcu(pos, head) \
-        for (pos = rcu_dereference((head)->next); \
-                pos != (head); \
-                pos = rcu_dereference(pos->next))
-/**
- * list_for_each_entry_rcu      -       iterate over rcu list of given type
- * @pos:        the type * to use as a loop cursor.
- * @head:       the head for your list.
- * @member:     the name of the list_struct within the struct.
- *
- * This list-traversal primitive may safely run concurrently with
- * the _rcu list-mutation primitives such as list_add_rcu()
- * as long as the traversal is guarded by rcu_read_lock().
- */
-#define list_for_each_entry_rcu(pos, head, member) \
-        for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
-                prefetch(pos->member.next), &pos->member != (head); \
-                pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
-/**
- * list_for_each_continue_rcu
- * @pos:        the &struct list_head to use as a loop cursor.
- * @head:       the head for your list.
- *
- * Iterate over an rcu-protected list, continuing after current point.
- *
- * This list-traversal primitive may safely run concurrently with
- * the _rcu list-mutation primitives such as list_add_rcu()
- * as long as the traversal is guarded by rcu_read_lock().
- */
-#define list_for_each_continue_rcu(pos, head) \
-        for ((pos) = rcu_dereference((pos)->next); \
-                prefetch((pos)->next), (pos) != (head); \
-                (pos) = rcu_dereference((pos)->next))
 /*
 * Double linked lists with a single pointer list head.
 * Mostly useful for hash tables where the two pointer list head is
@@ -730,31 +515,6 @@ static inline void hlist_del(struct hlist_node *n)
        n->pprev = LIST_POISON2;
 }
-/**
- * hlist_del_rcu - deletes entry from hash list without re-initialization
- * @n: the element to delete from the hash list.
- *
- * Note: list_unhashed() on entry does not return true after this,
- * the entry is in an undefined state. It is useful for RCU based
- * lockfree traversal.
- *
- * In particular, it means that we can not poison the forward
- * pointers that may still be used for walking the hash list.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as hlist_add_head_rcu()
- * or hlist_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * hlist_for_each_entry().
- */
-static inline void hlist_del_rcu(struct hlist_node *n)
-{
-        __hlist_del(n);
-        n->pprev = LIST_POISON2;
-}
 static inline void hlist_del_init(struct hlist_node *n)
 {
        if (!hlist_unhashed(n)) {
@@ -763,27 +523,6 @@ static inline void hlist_del_init(struct hlist_node *n)
        }
 }
-/**
- * hlist_replace_rcu - replace old entry by new one
- * @old : the element to be replaced
- * @new : the new element to insert
- *
- * The @old entry will be replaced with the @new entry atomically.
- */
-static inline void hlist_replace_rcu(struct hlist_node *old,
-                                        struct hlist_node *new)
-{
-        struct hlist_node *next = old->next;
-        new->next = next;
-        new->pprev = old->pprev;
-        smp_wmb();
-        if (next)
-                new->next->pprev = &new->next;
-        *new->pprev = new;
-        old->pprev = LIST_POISON2;
-}
 static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
 {
        struct hlist_node *first = h->first;
@@ -794,38 +533,6 @@ static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
        n->pprev = &h->first;
 }
-/**
- * hlist_add_head_rcu
- * @n: the element to add to the hash list.
- * @h: the list to add to.
- *
- * Description:
- * Adds the specified element to the specified hlist,
- * while permitting racing traversals.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as hlist_add_head_rcu()
- * or hlist_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * hlist_for_each_entry_rcu(), used to prevent memory-consistency
- * problems on Alpha CPUs.  Regardless of the type of CPU, the
- * list-traversal primitive must be guarded by rcu_read_lock().
- */
-static inline void hlist_add_head_rcu(struct hlist_node *n,
-                                        struct hlist_head *h)
-{
-        struct hlist_node *first = h->first;
-        n->next = first;
-        n->pprev = &h->first;
-        smp_wmb();
-        if (first)
-                first->pprev = &n->next;
-        h->first = n;
-}
 /* next must be != NULL */
 static inline void hlist_add_before(struct hlist_node *n,
                                        struct hlist_node *next)
@@ -847,63 +554,6 @@ static inline void hlist_add_after(struct hlist_node *n,
                next->next->pprev  = &next->next;
 }
-/**
- * hlist_add_before_rcu
- * @n: the new element to add to the hash list.
- * @next: the existing element to add the new element before.
- *
- * Description:
- * Adds the specified element to the specified hlist
- * before the specified node while permitting racing traversals.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as hlist_add_head_rcu()
- * or hlist_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * hlist_for_each_entry_rcu(), used to prevent memory-consistency
- * problems on Alpha CPUs.
- */
-static inline void hlist_add_before_rcu(struct hlist_node *n,
-                                        struct hlist_node *next)
-{
-        n->pprev = next->pprev;
-        n->next = next;
-        smp_wmb();
-        next->pprev = &n->next;
-        *(n->pprev) = n;
-}
-/**
- * hlist_add_after_rcu
- * @prev: the existing element to add the new element after.
- * @n: the new element to add to the hash list.
- *
- * Description:
- * Adds the specified element to the specified hlist
- * after the specified node while permitting racing traversals.
- *
- * The caller must take whatever precautions are necessary
- * (such as holding appropriate locks) to avoid racing
- * with another list-mutation primitive, such as hlist_add_head_rcu()
- * or hlist_del_rcu(), running on this same list.
- * However, it is perfectly legal to run concurrently with
- * the _rcu list-traversal primitives, such as
- * hlist_for_each_entry_rcu(), used to prevent memory-consistency
- * problems on Alpha CPUs.
- */
-static inline void hlist_add_after_rcu(struct hlist_node *prev,
-                                       struct hlist_node *n)
-{
-        n->next = prev->next;
-        n->pprev = &prev->next;
-        smp_wmb();
-        prev->next = n;
-        if (n->next)
-                n->next->pprev = &n->next;
-}
 #define hlist_entry(ptr, type, member) container_of(ptr,type,member)
 #define hlist_for_each(pos, head) \
@@ -964,21 +614,4 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
                ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
             pos = n)
-/**
- * hlist_for_each_entry_rcu - iterate over rcu list of given type
- * @tpos:       the type * to use as a loop cursor.
- * @pos:        the &struct hlist_node to use as a loop cursor.
- * @head:       the head for your list.
- * @member:     the name of the hlist_node within the struct.
- *
- * This list-traversal primitive may safely run concurrently with
- * the _rcu list-mutation primitives such as hlist_add_head_rcu()
- * as long as the traversal is guarded by rcu_read_lock().
- */
-#define hlist_for_each_entry_rcu(tpos, pos, head, member)                \
-        for (pos = rcu_dereference((head)->first);                       \
-                pos && ({ prefetch(pos->next); 1;}) &&                   \
-                ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
-             pos = rcu_dereference(pos->next))
 #endif
diff --git a/include/linux/lm_interface.h b/include/linux/lm_interface.h
index f274997bc283..2ed8fa1b762b 100644
--- a/include/linux/lm_interface.h
+++ b/include/linux/lm_interface.h
@@ -122,11 +122,9 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
 */
 #define LM_OUT_ST_MASK          0x00000003
-#define LM_OUT_CACHEABLE        0x00000004
 #define LM_OUT_CANCELED         0x00000008
 #define LM_OUT_ASYNC            0x00000080
 #define LM_OUT_ERROR            0x00000100
-#define LM_OUT_CONV_DEADLK      0x00000200
 /*
 * lm_callback_t types
@@ -138,9 +136,6 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
 * LM_CB_NEED_RECOVERY
 * The given journal needs to be recovered.
 *
- * LM_CB_DROPLOCKS
- * Reduce the number of cached locks.
- *
 * LM_CB_ASYNC
 * The given lock has been granted.
 */
@@ -149,7 +144,6 @@ typedef void (*lm_callback_t) (void *ptr, unsigned int type, void *data);
 #define LM_CB_NEED_D            258
 #define LM_CB_NEED_S            259
 #define LM_CB_NEED_RECOVERY     260
-#define LM_CB_DROPLOCKS         261
 #define LM_CB_ASYNC             262
 /*
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index a744383d16e9..81b3dd5206e0 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -398,7 +398,8 @@ int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_waterm
 int mlx4_INIT_PORT(struct mlx4_dev *dev, int port);
 int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port);
-int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
+int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
+                          int block_mcast_loopback);
 int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
 int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
diff --git a/include/linux/mpage.h b/include/linux/mpage.h
index 068a0c9946af..5c42821da2d1 100644
--- a/include/linux/mpage.h
+++ b/include/linux/mpage.h
@@ -11,11 +11,21 @@
 */
 #ifdef CONFIG_BLOCK
+struct mpage_data {
+        struct bio *bio;
+        sector_t last_block_in_bio;
+        get_block_t *get_block;
+        unsigned use_writepage;
+};
 struct writeback_control;
+struct bio *mpage_bio_submit(int rw, struct bio *bio);
 int mpage_readpages(struct address_space *mapping, struct list_head *pages,
                                unsigned nr_pages, get_block_t get_block);
 int mpage_readpage(struct page *page, get_block_t get_block);
+int __mpage_writepage(struct page *page, struct writeback_control *wbc,
+                      void *data);
 int mpage_writepages(struct address_space *mapping,
                struct writeback_control *wbc, get_block_t get_block);
 int mpage_writepage(struct page *page, get_block_t *get_block,
diff --git a/include/linux/percpu_counter.h b/include/linux/percpu_counter.h
index 9007ccdfc112..208388835357 100644
--- a/include/linux/percpu_counter.h
+++ b/include/linux/percpu_counter.h
@@ -35,7 +35,7 @@ int percpu_counter_init_irq(struct percpu_counter *fbc, s64 amount);
 void percpu_counter_destroy(struct percpu_counter *fbc);
 void percpu_counter_set(struct percpu_counter *fbc, s64 amount);
 void __percpu_counter_add(struct percpu_counter *fbc, s64 amount, s32 batch);
-s64 __percpu_counter_sum(struct percpu_counter *fbc);
+s64 __percpu_counter_sum(struct percpu_counter *fbc, int set);
 static inline void percpu_counter_add(struct percpu_counter *fbc, s64 amount)
 {
@@ -44,13 +44,19 @@ static inline void percpu_counter_add(struct percpu_counter *fbc, s64 amount)
 static inline s64 percpu_counter_sum_positive(struct percpu_counter *fbc)
 {
-        s64 ret = __percpu_counter_sum(fbc);
+        s64 ret = __percpu_counter_sum(fbc, 0);
        return ret < 0 ? 0 : ret;
 }
+static inline s64 percpu_counter_sum_and_set(struct percpu_counter *fbc)
+{
+        return __percpu_counter_sum(fbc, 1);
+}
 static inline s64 percpu_counter_sum(struct percpu_counter *fbc)
 {
-        return __percpu_counter_sum(fbc);
+        return __percpu_counter_sum(fbc, 0);
 }
 static inline s64 percpu_counter_read(struct percpu_counter *fbc)
diff --git a/include/linux/rcuclassic.h b/include/linux/rcuclassic.h
index b3aa05baab8a..8c774905dcfe 100644
--- a/include/linux/rcuclassic.h
+++ b/include/linux/rcuclassic.h
@@ -151,7 +151,10 @@ extern struct lockdep_map rcu_lock_map;
 #define __synchronize_sched() synchronize_rcu()
+#define call_rcu_sched(head, func) call_rcu(head, func)
 extern void __rcu_init(void);
+#define rcu_init_sched()        do { } while (0)
 extern void rcu_check_callbacks(int cpu, int user);
 extern void rcu_restart_cpu(int cpu);
diff --git a/include/linux/rculist.h b/include/linux/rculist.h
index bde4586f4382..b0f39be08b6c 100644
--- a/include/linux/rculist.h
+++ b/include/linux/rculist.h
@@ -1,6 +1,373 @@
 #ifndef _LINUX_RCULIST_H
 #define _LINUX_RCULIST_H
+#ifdef __KERNEL__
+/*
+ * RCU-protected list version
+ */
 #include <linux/list.h>
+#include <linux/rcupdate.h>
+/*
+ * Insert a new entry between two known consecutive entries.
+ *
+ * This is only for internal list manipulation where we know
+ * the prev/next entries already!
+ */
+static inline void __list_add_rcu(struct list_head *new,
+                struct list_head *prev, struct list_head *next)
+{
+        new->next = next;
+        new->prev = prev;
+        rcu_assign_pointer(prev->next, new);
+        next->prev = new;
+}
+/**
+ * list_add_rcu - add a new entry to rcu-protected list
+ * @new: new entry to be added
+ * @head: list head to add it after
+ *
+ * Insert a new entry after the specified head.
+ * This is good for implementing stacks.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as list_add_rcu()
+ * or list_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * list_for_each_entry_rcu().
+ */
+static inline void list_add_rcu(struct list_head *new, struct list_head *head)
+{
+        __list_add_rcu(new, head, head->next);
+}
+/**
+ * list_add_tail_rcu - add a new entry to rcu-protected list
+ * @new: new entry to be added
+ * @head: list head to add it before
+ *
+ * Insert a new entry before the specified head.
+ * This is useful for implementing queues.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as list_add_tail_rcu()
+ * or list_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * list_for_each_entry_rcu().
+ */
+static inline void list_add_tail_rcu(struct list_head *new,
+                                        struct list_head *head)
+{
+        __list_add_rcu(new, head->prev, head);
+}
+/**
+ * list_del_rcu - deletes entry from list without re-initialization
+ * @entry: the element to delete from the list.
+ *
+ * Note: list_empty() on entry does not return true after this,
+ * the entry is in an undefined state. It is useful for RCU based
+ * lockfree traversal.
+ *
+ * In particular, it means that we can not poison the forward
+ * pointers that may still be used for walking the list.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as list_del_rcu()
+ * or list_add_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * list_for_each_entry_rcu().
+ *
+ * Note that the caller is not permitted to immediately free
+ * the newly deleted entry.  Instead, either synchronize_rcu()
+ * or call_rcu() must be used to defer freeing until an RCU
+ * grace period has elapsed.
+ */
+static inline void list_del_rcu(struct list_head *entry)
+{
+        __list_del(entry->prev, entry->next);
+        entry->prev = LIST_POISON2;
+}
+/**
+ * list_replace_rcu - replace old entry by new one
+ * @old : the element to be replaced
+ * @new : the new element to insert
+ *
+ * The @old entry will be replaced with the @new entry atomically.
+ * Note: @old should not be empty.
+ */
+static inline void list_replace_rcu(struct list_head *old,
+                                struct list_head *new)
+{
+        new->next = old->next;
+        new->prev = old->prev;
+        rcu_assign_pointer(new->prev->next, new);
+        new->next->prev = new;
+        old->prev = LIST_POISON2;
+}
+/**
+ * list_splice_init_rcu - splice an RCU-protected list into an existing list.
+ * @list:       the RCU-protected list to splice
+ * @head:       the place in the list to splice the first list into
+ * @sync:       function to sync: synchronize_rcu(), synchronize_sched(), ...
+ *
+ * @head can be RCU-read traversed concurrently with this function.
+ *
+ * Note that this function blocks.
+ *
+ * Important note: the caller must take whatever action is necessary to
+ *      prevent any other updates to @head.  In principle, it is possible
+ *      to modify the list as soon as sync() begins execution.
+ *      If this sort of thing becomes necessary, an alternative version
+ *      based on call_rcu() could be created.  But only if -really-
+ *      needed -- there is no shortage of RCU API members.
+ */
+static inline void list_splice_init_rcu(struct list_head *list,
+                                        struct list_head *head,
+                                        void (*sync)(void))
+{
+        struct list_head *first = list->next;
+        struct list_head *last = list->prev;
+        struct list_head *at = head->next;
+        if (list_empty(head))
+                return;
+        /* "first" and "last" tracking list, so initialize it. */
+        INIT_LIST_HEAD(list);
+        /*
+         * At this point, the list body still points to the source list.
+         * Wait for any readers to finish using the list before splicing
+         * the list body into the new list.  Any new readers will see
+         * an empty list.
+         */
+        sync();
+        /*
+         * Readers are finished with the source list, so perform splice.
+         * The order is important if the new list is global and accessible
+         * to concurrent RCU readers.  Note that RCU readers are not
+         * permitted to traverse the prev pointers without excluding
+         * this function.
+         */
+        last->next = at;
+        rcu_assign_pointer(head->next, first);
+        first->prev = head;
+        at->prev = last;
+}
+/**
+ * list_for_each_rcu    -       iterate over an rcu-protected list
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @head:       the head for your list.
+ *
+ * This list-traversal primitive may safely run concurrently with
+ * the _rcu list-mutation primitives such as list_add_rcu()
+ * as long as the traversal is guarded by rcu_read_lock().
+ */
+#define list_for_each_rcu(pos, head) \
+        for (pos = rcu_dereference((head)->next); \
+                prefetch(pos->next), pos != (head); \
+                pos = rcu_dereference(pos->next))
+#define __list_for_each_rcu(pos, head) \
+        for (pos = rcu_dereference((head)->next); \
+                pos != (head); \
+                pos = rcu_dereference(pos->next))
+/**
+ * list_for_each_entry_rcu      -       iterate over rcu list of given type
+ * @pos:        the type * to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ *
+ * This list-traversal primitive may safely run concurrently with
+ * the _rcu list-mutation primitives such as list_add_rcu()
+ * as long as the traversal is guarded by rcu_read_lock().
+ */
+#define list_for_each_entry_rcu(pos, head, member) \
+        for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
+                prefetch(pos->member.next), &pos->member != (head); \
+                pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
+/**
+ * list_for_each_continue_rcu
+ * @pos:        the &struct list_head to use as a loop cursor.
+ * @head:       the head for your list.
+ *
+ * Iterate over an rcu-protected list, continuing after current point.
+ *
+ * This list-traversal primitive may safely run concurrently with
+ * the _rcu list-mutation primitives such as list_add_rcu()
+ * as long as the traversal is guarded by rcu_read_lock().
+ */
+#define list_for_each_continue_rcu(pos, head) \
+        for ((pos) = rcu_dereference((pos)->next); \
+                prefetch((pos)->next), (pos) != (head); \
+                (pos) = rcu_dereference((pos)->next))
+/**
+ * hlist_del_rcu - deletes entry from hash list without re-initialization
+ * @n: the element to delete from the hash list.
+ *
+ * Note: list_unhashed() on entry does not return true after this,
+ * the entry is in an undefined state. It is useful for RCU based
+ * lockfree traversal.
+ *
+ * In particular, it means that we can not poison the forward
+ * pointers that may still be used for walking the hash list.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as hlist_add_head_rcu()
+ * or hlist_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * hlist_for_each_entry().
+ */
+static inline void hlist_del_rcu(struct hlist_node *n)
+{
+        __hlist_del(n);
+        n->pprev = LIST_POISON2;
+}
+/**
+ * hlist_replace_rcu - replace old entry by new one
+ * @old : the element to be replaced
+ * @new : the new element to insert
+ *
+ * The @old entry will be replaced with the @new entry atomically.
+ */
+static inline void hlist_replace_rcu(struct hlist_node *old,
+                                        struct hlist_node *new)
+{
+        struct hlist_node *next = old->next;
+        new->next = next;
+        new->pprev = old->pprev;
+        rcu_assign_pointer(*new->pprev, new);
+        if (next)
+                new->next->pprev = &new->next;
+        old->pprev = LIST_POISON2;
+}
+/**
+ * hlist_add_head_rcu
+ * @n: the element to add to the hash list.
+ * @h: the list to add to.
+ *
+ * Description:
+ * Adds the specified element to the specified hlist,
+ * while permitting racing traversals.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as hlist_add_head_rcu()
+ * or hlist_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * hlist_for_each_entry_rcu(), used to prevent memory-consistency
+ * problems on Alpha CPUs.  Regardless of the type of CPU, the
+ * list-traversal primitive must be guarded by rcu_read_lock().
+ */
+static inline void hlist_add_head_rcu(struct hlist_node *n,
+                                        struct hlist_head *h)
+{
+        struct hlist_node *first = h->first;
+        n->next = first;
+        n->pprev = &h->first;
+        rcu_assign_pointer(h->first, n);
+        if (first)
+                first->pprev = &n->next;
+}
+/**
+ * hlist_add_before_rcu
+ * @n: the new element to add to the hash list.
+ * @next: the existing element to add the new element before.
+ *
+ * Description:
+ * Adds the specified element to the specified hlist
+ * before the specified node while permitting racing traversals.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as hlist_add_head_rcu()
+ * or hlist_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * hlist_for_each_entry_rcu(), used to prevent memory-consistency
+ * problems on Alpha CPUs.
+ */
+static inline void hlist_add_before_rcu(struct hlist_node *n,
+                                        struct hlist_node *next)
+{
+        n->pprev = next->pprev;
+        n->next = next;
+        rcu_assign_pointer(*(n->pprev), n);
+        next->pprev = &n->next;
+}
+/**
+ * hlist_add_after_rcu
+ * @prev: the existing element to add the new element after.
+ * @n: the new element to add to the hash list.
+ *
+ * Description:
+ * Adds the specified element to the specified hlist
+ * after the specified node while permitting racing traversals.
+ *
+ * The caller must take whatever precautions are necessary
+ * (such as holding appropriate locks) to avoid racing
+ * with another list-mutation primitive, such as hlist_add_head_rcu()
+ * or hlist_del_rcu(), running on this same list.
+ * However, it is perfectly legal to run concurrently with
+ * the _rcu list-traversal primitives, such as
+ * hlist_for_each_entry_rcu(), used to prevent memory-consistency
+ * problems on Alpha CPUs.
+ */
+static inline void hlist_add_after_rcu(struct hlist_node *prev,
+                                       struct hlist_node *n)
+{
+        n->next = prev->next;
+        n->pprev = &prev->next;
+        rcu_assign_pointer(prev->next, n);
+        if (n->next)
+                n->next->pprev = &n->next;
+}
+/**
+ * hlist_for_each_entry_rcu - iterate over rcu list of given type
+ * @tpos:       the type * to use as a loop cursor.
+ * @pos:        the &struct hlist_node to use as a loop cursor.
+ * @head:       the head for your list.
+ * @member:     the name of the hlist_node within the struct.
+ *
+ * This list-traversal primitive may safely run concurrently with
+ * the _rcu list-mutation primitives such as hlist_add_head_rcu()
+ * as long as the traversal is guarded by rcu_read_lock().
+ */
+#define hlist_for_each_entry_rcu(tpos, pos, head, member)                \
+        for (pos = rcu_dereference((head)->first);                       \
+                pos && ({ prefetch(pos->next); 1; }) &&                  \
+                ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
+                pos = rcu_dereference(pos->next))
-#endif  /* _LINUX_RCULIST_H */
+#endif  /* __KERNEL__ */
+#endif
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index d42dbec06083..e8b4039cfb2f 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -40,6 +40,7 @@
 #include <linux/cpumask.h>
 #include <linux/seqlock.h>
 #include <linux/lockdep.h>
+#include <linux/completion.h>
 /**
 * struct rcu_head - callback structure for use with RCU
@@ -168,6 +169,27 @@ struct rcu_head {
                (p) = (v); \
        })
+/* Infrastructure to implement the synchronize_() primitives. */
+struct rcu_synchronize {
+        struct rcu_head head;
+        struct completion completion;
+};
+extern void wakeme_after_rcu(struct rcu_head  *head);
+#define synchronize_rcu_xxx(name, func) \
+void name(void) \
+{ \
+        struct rcu_synchronize rcu; \
+        \
+        init_completion(&rcu.completion); \
+        /* Will wake me after RCU finished. */ \
+        func(&rcu.head, wakeme_after_rcu); \
+        /* Wait for it. */ \
+        wait_for_completion(&rcu.completion); \
+}
 /**
 * synchronize_sched - block until all CPUs have exited any non-preemptive
 * kernel code sequences.
@@ -224,8 +246,8 @@ extern void call_rcu_bh(struct rcu_head *head,
 /* Exported common interfaces */
 extern void synchronize_rcu(void);
 extern void rcu_barrier(void);
-extern long rcu_batches_completed(void);
+extern void rcu_barrier_bh(void);
-extern long rcu_batches_completed_bh(void);
+extern void rcu_barrier_sched(void);
 /* Internal to kernel */
 extern void rcu_init(void);
diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h
index 8a05c7e20bc4..f04b64eca636 100644
--- a/include/linux/rcupreempt.h
+++ b/include/linux/rcupreempt.h
@@ -40,10 +40,39 @@
 #include <linux/cpumask.h>
 #include <linux/seqlock.h>
-#define rcu_qsctr_inc(cpu)
+struct rcu_dyntick_sched {
+        int dynticks;
+        int dynticks_snap;
+        int sched_qs;
+        int sched_qs_snap;
+        int sched_dynticks_snap;
+};
+DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
+static inline void rcu_qsctr_inc(int cpu)
+{
+        struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
+        rdssp->sched_qs++;
+}
 #define rcu_bh_qsctr_inc(cpu)
 #define call_rcu_bh(head, rcu) call_rcu(head, rcu)
+/**
+ * call_rcu_sched - Queue RCU callback for invocation after sched grace period.
+ * @head: structure to be used for queueing the RCU updates.
+ * @func: actual update function to be invoked after the grace period
+ *
+ * The update function will be invoked some time after a full
+ * synchronize_sched()-style grace period elapses, in other words after
+ * all currently executing preempt-disabled sections of code (including
+ * hardirq handlers, NMI handlers, and local_irq_save() blocks) have
+ * completed.
+ */
+extern void call_rcu_sched(struct rcu_head *head,
+                           void (*func)(struct rcu_head *head));
 extern void __rcu_read_lock(void)       __acquires(RCU);
 extern void __rcu_read_unlock(void)     __releases(RCU);
 extern int rcu_pending(int cpu);
@@ -55,6 +84,7 @@ extern int rcu_needs_cpu(int cpu);
 extern void __synchronize_sched(void);
 extern void __rcu_init(void);
+extern void rcu_init_sched(void);
 extern void rcu_check_callbacks(int cpu, int user);
 extern void rcu_restart_cpu(int cpu);
 extern long rcu_batches_completed(void);
@@ -81,20 +111,20 @@ extern struct rcupreempt_trace *rcupreempt_trace_cpu(int cpu);
 struct softirq_action;
 #ifdef CONFIG_NO_HZ
-DECLARE_PER_CPU(long, dynticks_progress_counter);
+DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
 static inline void rcu_enter_nohz(void)
 {
        smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */
-        __get_cpu_var(dynticks_progress_counter)++;
+        __get_cpu_var(rcu_dyntick_sched).dynticks++;
-        WARN_ON(__get_cpu_var(dynticks_progress_counter) & 0x1);
+        WARN_ON(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1);
 }
 static inline void rcu_exit_nohz(void)
 {
-        __get_cpu_var(dynticks_progress_counter)++;
        smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */
-        WARN_ON(!(__get_cpu_var(dynticks_progress_counter) & 0x1));
+        __get_cpu_var(rcu_dyntick_sched).dynticks++;
+        WARN_ON(!(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1));
 }
 #else /* CONFIG_NO_HZ */
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 55232ccf9cfd..48262f86c969 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -7,9 +7,18 @@
 */
 #include <linux/errno.h>
+#include <linux/list.h>
+#include <linux/cpumask.h>
 extern void cpu_idle(void);
+struct call_single_data {
+        struct list_head list;
+        void (*func) (void *info);
+        void *info;
+        unsigned int flags;
+};
 #ifdef CONFIG_SMP
 #include <linux/preempt.h>
@@ -52,15 +61,34 @@ extern void smp_cpus_done(unsigned int max_cpus);
 /*
 * Call a function on all other processors
 */
-int smp_call_function(void(*func)(void *info), void *info, int retry, int wait);
+int smp_call_function(void(*func)(void *info), void *info, int wait);
+int smp_call_function_mask(cpumask_t mask, void(*func)(void *info), void *info,
+                                int wait);
 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
-                                int retry, int wait);
+                                int wait);
+void __smp_call_function_single(int cpuid, struct call_single_data *data);
+/*
+ * Generic and arch helpers
+ */
+#ifdef CONFIG_USE_GENERIC_SMP_HELPERS
+void generic_smp_call_function_single_interrupt(void);
+void generic_smp_call_function_interrupt(void);
+void init_call_single_data(void);
+void ipi_call_lock(void);
+void ipi_call_unlock(void);
+void ipi_call_lock_irq(void);
+void ipi_call_unlock_irq(void);
+#else
+static inline void init_call_single_data(void)
+{
+}
+#endif
 /*
 * Call a function on all processors
 */
-int on_each_cpu(void (*func) (void *info), void *info, int retry, int wait);
+int on_each_cpu(void (*func) (void *info), void *info, int wait);
 #define MSG_ALL_BUT_SELF        0x8000  /* Assume <32768 CPU's */
 #define MSG_ALL                 0x8001
@@ -90,9 +118,9 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
 {
        return 0;
 }
-#define smp_call_function(func, info, retry, wait) \
+#define smp_call_function(func, info, wait) \
                        (up_smp_call_function(func, info))
-#define on_each_cpu(func,info,retry,wait)       \
+#define on_each_cpu(func,info,wait)             \
        ({                                      \
                local_irq_disable();            \
                func(info);                     \
@@ -102,7 +130,7 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
 static inline void smp_send_reschedule(int cpu) { }
 #define num_booting_cpus()                      1
 #define smp_prepare_boot_cpu()                  do {} while (0)
-#define smp_call_function_single(cpuid, func, info, retry, wait) \
+#define smp_call_function_single(cpuid, func, info, wait) \
 ({ \
        WARN_ON(cpuid != 0);    \
        local_irq_disable();    \
@@ -112,7 +140,9 @@ static inline void smp_send_reschedule(int cpu) { }
 })
 #define smp_call_function_mask(mask, func, info, wait) \
                        (up_smp_call_function(func, info))
+static inline void init_call_single_data(void)
+{
+}
 #endif /* !SMP */
 /*
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 24f3d2282e11..2158fc0d5a56 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -179,4 +179,17 @@ void arch_update_cpu_topology(void);
 #endif
 #endif /* CONFIG_NUMA */
+#ifndef topology_physical_package_id
+#define topology_physical_package_id(cpu)       ((void)(cpu), -1)
+#endif
+#ifndef topology_core_id
+#define topology_core_id(cpu)                   ((void)(cpu), 0)
+#endif
+#ifndef topology_thread_siblings
+#define topology_thread_siblings(cpu)           cpumask_of_cpu(cpu)
+#endif
+#ifndef topology_core_siblings
+#define topology_core_siblings(cpu)             cpumask_of_cpu(cpu)
+#endif
 #endif /* _LINUX_TOPOLOGY_H */
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index bd91987c065f..12b15c561a1f 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -63,6 +63,7 @@ struct writeback_control {
        unsigned for_writepages:1;      /* This is a writepages() call */
        unsigned range_cyclic:1;        /* range_start is cyclic */
        unsigned more_io:1;             /* more io to be dispatched */
+        unsigned range_cont:1;
 };
 /*
diff --git a/include/rdma/ib_addr.h b/include/rdma/ib_addr.h
index c36750ff6ae8..483057b2f4b4 100644
--- a/include/rdma/ib_addr.h
+++ b/include/rdma/ib_addr.h
@@ -2,29 +2,33 @@
 * Copyright (c) 2005 Voltaire Inc.  All rights reserved.
 * Copyright (c) 2005 Intel Corporation.  All rights reserved.
 *
- * This Software is licensed under one of the following licenses:
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
 *
- * 1) under the terms of the "Common Public License 1.0" a copy of which is
+ *     Redistribution and use in source and binary forms, with or
- *    available from the Open Source Initiative, see
+ *     without modification, are permitted provided that the following
- *    http://www.opensource.org/licenses/cpl.php.
+ *     conditions are met:
 *
- * 2) under the terms of the "The BSD License" a copy of which is
+ *      - Redistributions of source code must retain the above
- *    available from the Open Source Initiative, see
+ *        copyright notice, this list of conditions and the following
- *    http://www.opensource.org/licenses/bsd-license.php.
+ *        disclaimer.
 *
- * 3) under the terms of the "GNU General Public License (GPL) Version 2" a
+ *      - Redistributions in binary form must reproduce the above
- *    copy of which is available from the Open Source Initiative, see
+ *        copyright notice, this list of conditions and the following
- *    http://www.opensource.org/licenses/gpl-license.php.
+ *        disclaimer in the documentation and/or other materials
- *
+ *        provided with the distribution.
- * Licensee has the right to choose one of the above licenses.
- *
- * Redistributions of source code must retain the above copyright
- * notice and one of the license notices.
- *
- * Redistributions in binary form must reproduce both the above copyright
- * notice, one of the license notices in the documentation
- * and/or other materials provided with the distribution.
 *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
 */
 #if !defined(IB_ADDR_H)
@@ -57,6 +61,7 @@ struct rdma_dev_addr {
        unsigned char dst_dev_addr[MAX_ADDR_LEN];
        unsigned char broadcast[MAX_ADDR_LEN];
        enum rdma_node_type dev_type;
+        struct net_device *src_dev;
 };
 /**
diff --git a/include/rdma/ib_cache.h b/include/rdma/ib_cache.h
index f179d233ffc3..00a2b8ec327f 100644
--- a/include/rdma/ib_cache.h
+++ b/include/rdma/ib_cache.h
@@ -30,8 +30,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_cache.h 1349 2004-12-16 21:09:43Z roland $
 */
 #ifndef _IB_CACHE_H
diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h
index a627c8682d2f..ec7c6d99ed3f 100644
--- a/include/rdma/ib_cm.h
+++ b/include/rdma/ib_cm.h
@@ -31,8 +31,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_cm.h 4311 2005-12-05 18:42:01Z sean.hefty $
 */
 #if !defined(IB_CM_H)
 #define IB_CM_H
diff --git a/include/rdma/ib_fmr_pool.h b/include/rdma/ib_fmr_pool.h
index 00dadbf94e1d..f62b842e6596 100644
--- a/include/rdma/ib_fmr_pool.h
+++ b/include/rdma/ib_fmr_pool.h
@@ -29,8 +29,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_fmr_pool.h 2730 2005-06-28 16:43:03Z sean.hefty $
 */
 #if !defined(IB_FMR_POOL_H)
@@ -61,7 +59,7 @@ struct ib_fmr_pool_param {
        int                     pool_size;
        int                     dirty_watermark;
        void                  (*flush_function)(struct ib_fmr_pool *pool,
-                                                void *              arg);
+                                                void               *arg);
        void                   *flush_arg;
        unsigned                cache:1;
 };
diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h
index 7228c056b9e9..5f6c40fffcf4 100644
--- a/include/rdma/ib_mad.h
+++ b/include/rdma/ib_mad.h
@@ -32,11 +32,9 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_mad.h 5596 2006-03-03 01:00:07Z sean.hefty $
 */
-#if !defined( IB_MAD_H )
+#if !defined(IB_MAD_H)
 #define IB_MAD_H
 #include <linux/list.h>
@@ -194,8 +192,7 @@ struct ib_vendor_mad {
        u8                      data[IB_MGMT_VENDOR_DATA];
 };
-struct ib_class_port_info
+struct ib_class_port_info {
-{
        u8                      base_version;
        u8                      class_version;
        __be16                  capability_mask;
@@ -614,11 +611,11 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
 * any class specific header, and MAD data area.
 * If @rmpp_active is set, the RMPP header will be initialized for sending.
 */
-struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
+struct ib_mad_send_buf *ib_create_send_mad(struct ib_mad_agent *mad_agent,
-                                            u32 remote_qpn, u16 pkey_index,
+                                           u32 remote_qpn, u16 pkey_index,
-                                            int rmpp_active,
+                                           int rmpp_active,
-                                            int hdr_len, int data_len,
+                                           int hdr_len, int data_len,
-                                            gfp_t gfp_mask);
+                                           gfp_t gfp_mask);
 /**
 * ib_is_mad_class_rmpp - returns whether given management class
diff --git a/include/rdma/ib_pack.h b/include/rdma/ib_pack.h
index f926020d6331..d7fc45c4eba9 100644
--- a/include/rdma/ib_pack.h
+++ b/include/rdma/ib_pack.h
@@ -28,8 +28,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_pack.h 1349 2004-12-16 21:09:43Z roland $
 */
 #ifndef IB_PACK_H
diff --git a/include/rdma/ib_sa.h b/include/rdma/ib_sa.h
index 942692b0b92e..3841c1aff692 100644
--- a/include/rdma/ib_sa.h
+++ b/include/rdma/ib_sa.h
@@ -30,8 +30,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_sa.h 2811 2005-07-06 18:11:43Z halr $
 */
 #ifndef IB_SA_H
diff --git a/include/rdma/ib_smi.h b/include/rdma/ib_smi.h
index f29af135ba83..aaca0878668f 100644
--- a/include/rdma/ib_smi.h
+++ b/include/rdma/ib_smi.h
@@ -32,11 +32,9 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_smi.h 1389 2004-12-27 22:56:47Z roland $
 */
-#if !defined( IB_SMI_H )
+#if !defined(IB_SMI_H)
 #define IB_SMI_H
 #include <rdma/ib_mad.h>
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index 37650afb982c..bd3d380781e0 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -29,8 +29,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_user_cm.h 4019 2005-11-11 00:33:09Z sean.hefty $
 */
 #ifndef IB_USER_CM_H
diff --git a/include/rdma/ib_user_mad.h b/include/rdma/ib_user_mad.h
index 29d2c7205a90..d6fce1cbdb90 100644
--- a/include/rdma/ib_user_mad.h
+++ b/include/rdma/ib_user_mad.h
@@ -29,8 +29,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_user_mad.h 2814 2005-07-06 19:14:09Z halr $
 */
 #ifndef IB_USER_MAD_H
diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h
index 8d65bf0a625b..a17f77106149 100644
--- a/include/rdma/ib_user_verbs.h
+++ b/include/rdma/ib_user_verbs.h
@@ -31,8 +31,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_user_verbs.h 4019 2005-11-11 00:33:09Z sean.hefty $
 */
 #ifndef IB_USER_VERBS_H
@@ -291,7 +289,10 @@ struct ib_uverbs_wc {
        __u32 opcode;
        __u32 vendor_err;
        __u32 byte_len;
-        __u32 imm_data;
+        union {
+                __u32 imm_data;
+                __u32 invalidate_rkey;
+        } ex;
        __u32 qp_num;
        __u32 src_qp;
        __u32 wc_flags;
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 31d30b1852e8..90b529f7a154 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -34,8 +34,6 @@
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
- *
- * $Id: ib_verbs.h 1349 2004-12-16 21:09:43Z roland $
 */
 #if !defined(IB_VERBS_H)
@@ -93,7 +91,7 @@ enum ib_device_cap_flags {
        IB_DEVICE_RC_RNR_NAK_GEN        = (1<<12),
        IB_DEVICE_SRQ_RESIZE            = (1<<13),
        IB_DEVICE_N_NOTIFY_CQ           = (1<<14),
-        IB_DEVICE_ZERO_STAG             = (1<<15),
+        IB_DEVICE_LOCAL_DMA_LKEY        = (1<<15),
        IB_DEVICE_RESERVED              = (1<<16), /* old SEND_W_INV */
        IB_DEVICE_MEM_WINDOW            = (1<<17),
        /*
@@ -105,6 +103,8 @@ enum ib_device_cap_flags {
         */
        IB_DEVICE_UD_IP_CSUM            = (1<<18),
        IB_DEVICE_UD_TSO                = (1<<19),
+        IB_DEVICE_MEM_MGT_EXTENSIONS    = (1<<21),
+        IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22),
 };
 enum ib_atomic_cap {
@@ -150,6 +150,7 @@ struct ib_device_attr {
        int                     max_srq;
        int                     max_srq_wr;
        int                     max_srq_sge;
+        unsigned int            max_fast_reg_page_list_len;
        u16                     max_pkeys;
        u8                      local_ca_ack_delay;
 };
@@ -226,6 +227,57 @@ static inline int ib_width_enum_to_int(enum ib_port_width width)
        }
 }
+struct ib_protocol_stats {
+        /* TBD... */
+};
+struct iw_protocol_stats {
+        u64     ipInReceives;
+        u64     ipInHdrErrors;
+        u64     ipInTooBigErrors;
+        u64     ipInNoRoutes;
+        u64     ipInAddrErrors;
+        u64     ipInUnknownProtos;
+        u64     ipInTruncatedPkts;
+        u64     ipInDiscards;
+        u64     ipInDelivers;
+        u64     ipOutForwDatagrams;
+        u64     ipOutRequests;
+        u64     ipOutDiscards;
+        u64     ipOutNoRoutes;
+        u64     ipReasmTimeout;
+        u64     ipReasmReqds;
+        u64     ipReasmOKs;
+        u64     ipReasmFails;
+        u64     ipFragOKs;
+        u64     ipFragFails;
+        u64     ipFragCreates;
+        u64     ipInMcastPkts;
+        u64     ipOutMcastPkts;
+        u64     ipInBcastPkts;
+        u64     ipOutBcastPkts;
+        u64     tcpRtoAlgorithm;
+        u64     tcpRtoMin;
+        u64     tcpRtoMax;
+        u64     tcpMaxConn;
+        u64     tcpActiveOpens;
+        u64     tcpPassiveOpens;
+        u64     tcpAttemptFails;
+        u64     tcpEstabResets;
+        u64     tcpCurrEstab;
+        u64     tcpInSegs;
+        u64     tcpOutSegs;
+        u64     tcpRetransSegs;
+        u64     tcpInErrs;
+        u64     tcpOutRsts;
+};
+union rdma_protocol_stats {
+        struct ib_protocol_stats        ib;
+        struct iw_protocol_stats        iw;
+};
 struct ib_port_attr {
        enum ib_port_state      state;
        enum ib_mtu             max_mtu;
@@ -413,6 +465,8 @@ enum ib_wc_opcode {
        IB_WC_FETCH_ADD,
        IB_WC_BIND_MW,
        IB_WC_LSO,
+        IB_WC_LOCAL_INV,
+        IB_WC_FAST_REG_MR,
 /*
 * Set value of IB_WC_RECV so consumers can test if a completion is a
 * receive by testing (opcode & IB_WC_RECV).
@@ -423,7 +477,8 @@ enum ib_wc_opcode {
 enum ib_wc_flags {
        IB_WC_GRH               = 1,
-        IB_WC_WITH_IMM          = (1<<1)
+        IB_WC_WITH_IMM          = (1<<1),
+        IB_WC_WITH_INVALIDATE   = (1<<2),
 };
 struct ib_wc {
@@ -433,7 +488,10 @@ struct ib_wc {
        u32                     vendor_err;
        u32                     byte_len;
        struct ib_qp           *qp;
-        __be32                  imm_data;
+        union {
+                __be32          imm_data;
+                u32             invalidate_rkey;
+        } ex;
        u32                     src_qp;
        int                     wc_flags;
        u16                     pkey_index;
@@ -498,7 +556,8 @@ enum ib_qp_type {
 };
 enum ib_qp_create_flags {
-        IB_QP_CREATE_IPOIB_UD_LSO       = 1 << 0,
+        IB_QP_CREATE_IPOIB_UD_LSO               = 1 << 0,
+        IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK   = 1 << 1,
 };
 struct ib_qp_init_attr {
@@ -627,6 +686,9 @@ enum ib_wr_opcode {
        IB_WR_ATOMIC_FETCH_AND_ADD,
        IB_WR_LSO,
        IB_WR_SEND_WITH_INV,
+        IB_WR_RDMA_READ_WITH_INV,
+        IB_WR_LOCAL_INV,
+        IB_WR_FAST_REG_MR,
 };
 enum ib_send_flags {
@@ -643,6 +705,12 @@ struct ib_sge {
        u32     lkey;
 };
+struct ib_fast_reg_page_list {
+        struct ib_device       *device;
+        u64                    *page_list;
+        unsigned int            max_page_list_len;
+};
 struct ib_send_wr {
        struct ib_send_wr      *next;
        u64                     wr_id;
@@ -675,6 +743,15 @@ struct ib_send_wr {
                        u16     pkey_index; /* valid for GSI only */
                        u8      port_num;   /* valid for DR SMPs on switch only */
                } ud;
+                struct {
+                        u64                             iova_start;
+                        struct ib_fast_reg_page_list   *page_list;
+                        unsigned int                    page_shift;
+                        unsigned int                    page_list_len;
+                        u32                             length;
+                        int                             access_flags;
+                        u32                             rkey;
+                } fast_reg;
        } wr;
 };
@@ -777,7 +854,7 @@ struct ib_cq {
        struct ib_uobject      *uobject;
        ib_comp_handler         comp_handler;
        void                  (*event_handler)(struct ib_event *, void *);
-        void *                  cq_context;
+        void                   *cq_context;
        int                     cqe;
        atomic_t                usecnt; /* count number of work queues */
 };
@@ -883,7 +960,7 @@ struct ib_dma_mapping_ops {
        void            (*sync_single_for_cpu)(struct ib_device *dev,
                                               u64 dma_handle,
                                               size_t size,
-                                               enum dma_data_direction dir);
+                                               enum dma_data_direction dir);
        void            (*sync_single_for_device)(struct ib_device *dev,
                                                  u64 dma_handle,
                                                  size_t size,
@@ -919,6 +996,8 @@ struct ib_device {
        struct iw_cm_verbs           *iwcm;
+        int                        (*get_protocol_stats)(struct ib_device *device,
+                                                         union rdma_protocol_stats *stats);
        int                        (*query_device)(struct ib_device *device,
                                                   struct ib_device_attr *device_attr);
        int                        (*query_port)(struct ib_device *device,
@@ -1013,6 +1092,11 @@ struct ib_device {
        int                        (*query_mr)(struct ib_mr *mr,
                                               struct ib_mr_attr *mr_attr);
        int                        (*dereg_mr)(struct ib_mr *mr);
+        struct ib_mr *             (*alloc_fast_reg_mr)(struct ib_pd *pd,
+                                               int max_page_list_len);
+        struct ib_fast_reg_page_list * (*alloc_fast_reg_page_list)(struct ib_device *device,
+                                                                   int page_list_len);
+        void                       (*free_fast_reg_page_list)(struct ib_fast_reg_page_list *page_list);
        int                        (*rereg_phys_mr)(struct ib_mr *mr,
                                                    int mr_rereg_mask,
                                                    struct ib_pd *pd,
@@ -1065,6 +1149,7 @@ struct ib_device {
        char                         node_desc[64];
        __be64                       node_guid;
+        u32                          local_dma_lkey;
        u8                           node_type;
        u8                           phys_port_cnt;
 };
@@ -1807,6 +1892,54 @@ int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
 int ib_dereg_mr(struct ib_mr *mr);
 /**
+ * ib_alloc_fast_reg_mr - Allocates memory region usable with the
+ *   IB_WR_FAST_REG_MR send work request.
+ * @pd: The protection domain associated with the region.
+ * @max_page_list_len: requested max physical buffer list length to be
+ *   used with fast register work requests for this MR.
+ */
+struct ib_mr *ib_alloc_fast_reg_mr(struct ib_pd *pd, int max_page_list_len);
+/**
+ * ib_alloc_fast_reg_page_list - Allocates a page list array
+ * @device - ib device pointer.
+ * @page_list_len - size of the page list array to be allocated.
+ *
+ * This allocates and returns a struct ib_fast_reg_page_list * and a
+ * page_list array that is at least page_list_len in size.  The actual
+ * size is returned in max_page_list_len.  The caller is responsible
+ * for initializing the contents of the page_list array before posting
+ * a send work request with the IB_WC_FAST_REG_MR opcode.
+ *
+ * The page_list array entries must be translated using one of the
+ * ib_dma_*() functions just like the addresses passed to
+ * ib_map_phys_fmr().  Once the ib_post_send() is issued, the struct
+ * ib_fast_reg_page_list must not be modified by the caller until the
+ * IB_WC_FAST_REG_MR work request completes.
+ */
+struct ib_fast_reg_page_list *ib_alloc_fast_reg_page_list(
+                                struct ib_device *device, int page_list_len);
+/**
+ * ib_free_fast_reg_page_list - Deallocates a previously allocated
+ *   page list array.
+ * @page_list - struct ib_fast_reg_page_list pointer to be deallocated.
+ */
+void ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
+/**
+ * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
+ *   R_Key and L_Key.
+ * @mr - struct ib_mr pointer to be updated.
+ * @newkey - new key to be used.
+ */
+static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
+{
+        mr->lkey = (mr->lkey & 0xffffff00) | newkey;
+        mr->rkey = (mr->rkey & 0xffffff00) | newkey;
+}
+/**
 * ib_alloc_mw - Allocates a memory window.
 * @pd: The protection domain associated with the memory window.
 */
diff --git a/include/rdma/iw_cm.h b/include/rdma/iw_cm.h
index aeefa9b740dc..cbb822e8d791 100644
--- a/include/rdma/iw_cm.h
+++ b/include/rdma/iw_cm.h
@@ -62,7 +62,7 @@ struct iw_cm_event {
        struct sockaddr_in remote_addr;
        void *private_data;
        u8 private_data_len;
-        void* provider_data;
+        void *provider_data;
 };
 /**
diff --git a/include/rdma/rdma_cm.h b/include/rdma/rdma_cm.h
index 010f876f41d8..22bb2e7bab1a 100644
--- a/include/rdma/rdma_cm.h
+++ b/include/rdma/rdma_cm.h
@@ -2,29 +2,33 @@
 * Copyright (c) 2005 Voltaire Inc.  All rights reserved.
 * Copyright (c) 2005 Intel Corporation.  All rights reserved.
 *
- * This Software is licensed under one of the following licenses:
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
 *
- * 1) under the terms of the "Common Public License 1.0" a copy of which is
+ *     Redistribution and use in source and binary forms, with or
- *    available from the Open Source Initiative, see
+ *     without modification, are permitted provided that the following
- *    http://www.opensource.org/licenses/cpl.php.
+ *     conditions are met:
 *
- * 2) under the terms of the "The BSD License" a copy of which is
+ *      - Redistributions of source code must retain the above
- *    available from the Open Source Initiative, see
+ *        copyright notice, this list of conditions and the following
- *    http://www.opensource.org/licenses/bsd-license.php.
+ *        disclaimer.
 *
- * 3) under the terms of the "GNU General Public License (GPL) Version 2" a
+ *      - Redistributions in binary form must reproduce the above
- *    copy of which is available from the Open Source Initiative, see
+ *        copyright notice, this list of conditions and the following
- *    http://www.opensource.org/licenses/gpl-license.php.
+ *        disclaimer in the documentation and/or other materials
- *
+ *        provided with the distribution.
- * Licensee has the right to choose one of the above licenses.
- *
- * Redistributions of source code must retain the above copyright
- * notice and one of the license notices.
- *
- * Redistributions in binary form must reproduce both the above copyright
- * notice, one of the license notices in the documentation
- * and/or other materials provided with the distribution.
 *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
 */
 #if !defined(RDMA_CM_H)
@@ -57,11 +61,11 @@ enum rdma_cm_event_type {
 };
 enum rdma_port_space {
-        RDMA_PS_SDP  = 0x0001,
+        RDMA_PS_SDP   = 0x0001,
-        RDMA_PS_IPOIB= 0x0002,
+        RDMA_PS_IPOIB = 0x0002,
-        RDMA_PS_TCP  = 0x0106,
+        RDMA_PS_TCP   = 0x0106,
-        RDMA_PS_UDP  = 0x0111,
+        RDMA_PS_UDP   = 0x0111,
-        RDMA_PS_SCTP = 0x0183
+        RDMA_PS_SCTP  = 0x0183
 };
 struct rdma_addr {
diff --git a/include/rdma/rdma_cm_ib.h b/include/rdma/rdma_cm_ib.h
index 950424b38f16..2389c3b45404 100644
--- a/include/rdma/rdma_cm_ib.h
+++ b/include/rdma/rdma_cm_ib.h
@@ -1,29 +1,33 @@
 /*
 * Copyright (c) 2006 Intel Corporation.  All rights reserved.
 *
- * This Software is licensed under one of the following licenses:
+ * This software is available to you under a choice of one of two
- *
+ * licenses.  You may choose to be licensed under the terms of the GNU
- * 1) under the terms of the "Common Public License 1.0" a copy of which is
+ * General Public License (GPL) Version 2, available from the file
- *    available from the Open Source Initiative, see
+ * COPYING in the main directory of this source tree, or the
- *    http://www.opensource.org/licenses/cpl.php.
+ * OpenIB.org BSD license below:
- *
+ *
- * 2) under the terms of the "The BSD License" a copy of which is
+ *     Redistribution and use in source and binary forms, with or
- *    available from the Open Source Initiative, see
+ *     without modification, are permitted provided that the following
- *    http://www.opensource.org/licenses/bsd-license.php.
+ *     conditions are met:
- *
+ *
- * 3) under the terms of the "GNU General Public License (GPL) Version 2" a
+ *      - Redistributions of source code must retain the above
- *    copy of which is available from the Open Source Initiative, see
+ *        copyright notice, this list of conditions and the following
- *    http://www.opensource.org/licenses/gpl-license.php.
+ *        disclaimer.
- *
+ *
- * Licensee has the right to choose one of the above licenses.
+ *      - Redistributions in binary form must reproduce the above
- *
+ *        copyright notice, this list of conditions and the following
- * Redistributions of source code must retain the above copyright
+ *        disclaimer in the documentation and/or other materials
- * notice and one of the license notices.
+ *        provided with the distribution.
- *
+ *
- * Redistributions in binary form must reproduce both the above copyright
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * notice, one of the license notices in the documentation
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * and/or other materials provided with the distribution.
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
 */
 #if !defined(RDMA_CM_IB_H)
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index f6a9fe0ef09c..00b78763a1bf 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -134,6 +134,7 @@ struct scsi_device {
        unsigned no_start_on_add:1;     /* do not issue start on add */
        unsigned allow_restart:1; /* issue START_UNIT in error handler */
        unsigned manage_start_stop:1;   /* Let HLD (sd) manage start/stop */
+        unsigned start_stop_pwr_cond:1; /* Set power cond. in START_STOP_UNIT */
        unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
        unsigned select_no_atn:1;
        unsigned fix_capacity:1;        /* READ_CAPACITY is too high by 1 */