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-rw-r--r--include/asm-x86/apic.h4
-rw-r--r--include/asm-x86/asm.h7
-rw-r--r--include/asm-x86/elf.h5
-rw-r--r--include/asm-x86/mmu.h5
-rw-r--r--include/asm-x86/resume-trace.h2
5 files changed, 11 insertions, 12 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 133c998161ca..e9e09b2ee7cd 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -76,9 +76,7 @@ extern int get_physical_broadcast(void);
76static inline void ack_APIC_irq(void) 76static inline void ack_APIC_irq(void)
77{ 77{
78 /* 78 /*
79 * ack_APIC_irq() actually gets compiled as a single instruction: 79 * ack_APIC_irq() actually gets compiled as a single instruction
80 * - a single rmw on Pentium/82489DX
81 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
82 * ... yummie. 80 * ... yummie.
83 */ 81 */
84 82
diff --git a/include/asm-x86/asm.h b/include/asm-x86/asm.h
index 97220321f39d..56be78f582f0 100644
--- a/include/asm-x86/asm.h
+++ b/include/asm-x86/asm.h
@@ -20,17 +20,22 @@
20 20
21#define _ASM_PTR __ASM_SEL(.long, .quad) 21#define _ASM_PTR __ASM_SEL(.long, .quad)
22#define _ASM_ALIGN __ASM_SEL(.balign 4, .balign 8) 22#define _ASM_ALIGN __ASM_SEL(.balign 4, .balign 8)
23#define _ASM_MOV_UL __ASM_SIZE(mov)
24 23
24#define _ASM_MOV __ASM_SIZE(mov)
25#define _ASM_INC __ASM_SIZE(inc) 25#define _ASM_INC __ASM_SIZE(inc)
26#define _ASM_DEC __ASM_SIZE(dec) 26#define _ASM_DEC __ASM_SIZE(dec)
27#define _ASM_ADD __ASM_SIZE(add) 27#define _ASM_ADD __ASM_SIZE(add)
28#define _ASM_SUB __ASM_SIZE(sub) 28#define _ASM_SUB __ASM_SIZE(sub)
29#define _ASM_XADD __ASM_SIZE(xadd) 29#define _ASM_XADD __ASM_SIZE(xadd)
30
30#define _ASM_AX __ASM_REG(ax) 31#define _ASM_AX __ASM_REG(ax)
31#define _ASM_BX __ASM_REG(bx) 32#define _ASM_BX __ASM_REG(bx)
32#define _ASM_CX __ASM_REG(cx) 33#define _ASM_CX __ASM_REG(cx)
33#define _ASM_DX __ASM_REG(dx) 34#define _ASM_DX __ASM_REG(dx)
35#define _ASM_SP __ASM_REG(sp)
36#define _ASM_BP __ASM_REG(bp)
37#define _ASM_SI __ASM_REG(si)
38#define _ASM_DI __ASM_REG(di)
34 39
35/* Exception table entry */ 40/* Exception table entry */
36# define _ASM_EXTABLE(from,to) \ 41# define _ASM_EXTABLE(from,to) \
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
index 7be4733c793e..acbf3451b964 100644
--- a/include/asm-x86/elf.h
+++ b/include/asm-x86/elf.h
@@ -148,8 +148,9 @@ do { \
148 148
149static inline void start_ia32_thread(struct pt_regs *regs, u32 ip, u32 sp) 149static inline void start_ia32_thread(struct pt_regs *regs, u32 ip, u32 sp)
150{ 150{
151 asm volatile("movl %0,%%fs" :: "r" (0)); 151 loadsegment(fs, 0);
152 asm volatile("movl %0,%%es; movl %0,%%ds" : : "r" (__USER32_DS)); 152 loadsegment(ds, __USER32_DS);
153 loadsegment(es, __USER32_DS);
153 load_gs_index(0); 154 load_gs_index(0);
154 regs->ip = ip; 155 regs->ip = ip;
155 regs->sp = sp; 156 regs->sp = sp;
diff --git a/include/asm-x86/mmu.h b/include/asm-x86/mmu.h
index 00e88679e11f..80a1dee5bea5 100644
--- a/include/asm-x86/mmu.h
+++ b/include/asm-x86/mmu.h
@@ -7,14 +7,9 @@
7/* 7/*
8 * The x86 doesn't have a mmu context, but 8 * The x86 doesn't have a mmu context, but
9 * we put the segment information here. 9 * we put the segment information here.
10 *
11 * cpu_vm_mask is used to optimize ldt flushing.
12 */ 10 */
13typedef struct { 11typedef struct {
14 void *ldt; 12 void *ldt;
15#ifdef CONFIG_X86_64
16 rwlock_t ldtlock;
17#endif
18 int size; 13 int size;
19 struct mutex lock; 14 struct mutex lock;
20 void *vdso; 15 void *vdso;
diff --git a/include/asm-x86/resume-trace.h b/include/asm-x86/resume-trace.h
index 8d9f0b41ee86..e219b4c91193 100644
--- a/include/asm-x86/resume-trace.h
+++ b/include/asm-x86/resume-trace.h
@@ -7,7 +7,7 @@
7do { \ 7do { \
8 if (pm_trace_enabled) { \ 8 if (pm_trace_enabled) { \
9 const void *tracedata; \ 9 const void *tracedata; \
10 asm volatile(_ASM_MOV_UL " $1f,%0\n" \ 10 asm volatile(_ASM_MOV " $1f,%0\n" \
11 ".section .tracedata,\"a\"\n" \ 11 ".section .tracedata,\"a\"\n" \
12 "1:\t.word %c1\n\t" \ 12 "1:\t.word %c1\n\t" \
13 _ASM_PTR " %c2\n" \ 13 _ASM_PTR " %c2\n" \