diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/i2c-omap.h | 27 | ||||
| -rw-r--r-- | include/linux/i2c/twl.h | 25 | ||||
| -rw-r--r-- | include/linux/mfd/twl4030-audio.h (renamed from include/linux/mfd/twl4030-codec.h) | 16 | ||||
| -rw-r--r-- | include/linux/mfd/twl6040.h | 228 |
4 files changed, 282 insertions, 14 deletions
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 7472449cbb74..0aa0cbd676f7 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h | |||
| @@ -3,6 +3,33 @@ | |||
| 3 | 3 | ||
| 4 | #include <linux/platform_device.h> | 4 | #include <linux/platform_device.h> |
| 5 | 5 | ||
| 6 | /* | ||
| 7 | * Version 2 of the I2C peripheral unit has a different register | ||
| 8 | * layout and extra registers. The ID register in the V2 peripheral | ||
| 9 | * unit on the OMAP4430 reports the same ID as the V1 peripheral | ||
| 10 | * unit on the OMAP3530, so we must inform the driver which IP | ||
| 11 | * version we know it is running on from platform / cpu-specific | ||
| 12 | * code using these constants in the hwmod class definition. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #define OMAP_I2C_IP_VERSION_1 1 | ||
| 16 | #define OMAP_I2C_IP_VERSION_2 2 | ||
| 17 | |||
| 18 | /* struct omap_i2c_bus_platform_data .flags meanings */ | ||
| 19 | |||
| 20 | #define OMAP_I2C_FLAG_NO_FIFO BIT(0) | ||
| 21 | #define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) | ||
| 22 | #define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) | ||
| 23 | #define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) | ||
| 24 | #define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) | ||
| 25 | #define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) | ||
| 26 | #define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) | ||
| 27 | /* how the CPU address bus must be translated for I2C unit access */ | ||
| 28 | #define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 | ||
| 29 | #define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) | ||
| 30 | #define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) | ||
| 31 | #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 | ||
| 32 | |||
| 6 | struct omap_i2c_bus_platform_data { | 33 | struct omap_i2c_bus_platform_data { |
| 7 | u32 clkrate; | 34 | u32 clkrate; |
| 8 | void (*set_mpu_wkup_lat)(struct device *dev, long set); | 35 | void (*set_mpu_wkup_lat)(struct device *dev, long set); |
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index ba4f88624fcd..114c0f6fc63d 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h | |||
| @@ -657,28 +657,41 @@ struct twl4030_power_data { | |||
| 657 | extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); | 657 | extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); |
| 658 | extern int twl4030_remove_script(u8 flags); | 658 | extern int twl4030_remove_script(u8 flags); |
| 659 | 659 | ||
| 660 | struct twl4030_codec_audio_data { | 660 | struct twl4030_codec_data { |
| 661 | unsigned int digimic_delay; /* in ms */ | 661 | unsigned int digimic_delay; /* in ms */ |
| 662 | unsigned int ramp_delay_value; | 662 | unsigned int ramp_delay_value; |
| 663 | unsigned int offset_cncl_path; | 663 | unsigned int offset_cncl_path; |
| 664 | unsigned int check_defaults:1; | 664 | unsigned int check_defaults:1; |
| 665 | unsigned int reset_registers:1; | 665 | unsigned int reset_registers:1; |
| 666 | unsigned int hs_extmute:1; | 666 | unsigned int hs_extmute:1; |
| 667 | u16 hs_left_step; | ||
| 668 | u16 hs_right_step; | ||
| 669 | u16 hf_left_step; | ||
| 670 | u16 hf_right_step; | ||
| 667 | void (*set_hs_extmute)(int mute); | 671 | void (*set_hs_extmute)(int mute); |
| 668 | }; | 672 | }; |
| 669 | 673 | ||
| 670 | struct twl4030_codec_vibra_data { | 674 | struct twl4030_vibra_data { |
| 671 | unsigned int coexist; | 675 | unsigned int coexist; |
| 676 | |||
| 677 | /* twl6040 */ | ||
| 678 | unsigned int vibldrv_res; /* left driver resistance */ | ||
| 679 | unsigned int vibrdrv_res; /* right driver resistance */ | ||
| 680 | unsigned int viblmotor_res; /* left motor resistance */ | ||
| 681 | unsigned int vibrmotor_res; /* right motor resistance */ | ||
| 682 | int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */ | ||
| 683 | int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */ | ||
| 672 | }; | 684 | }; |
| 673 | 685 | ||
| 674 | struct twl4030_codec_data { | 686 | struct twl4030_audio_data { |
| 675 | unsigned int audio_mclk; | 687 | unsigned int audio_mclk; |
| 676 | struct twl4030_codec_audio_data *audio; | 688 | struct twl4030_codec_data *codec; |
| 677 | struct twl4030_codec_vibra_data *vibra; | 689 | struct twl4030_vibra_data *vibra; |
| 678 | 690 | ||
| 679 | /* twl6040 */ | 691 | /* twl6040 */ |
| 680 | int audpwron_gpio; /* audio power-on gpio */ | 692 | int audpwron_gpio; /* audio power-on gpio */ |
| 681 | int naudint_irq; /* audio interrupt */ | 693 | int naudint_irq; /* audio interrupt */ |
| 694 | unsigned int irq_base; | ||
| 682 | }; | 695 | }; |
| 683 | 696 | ||
| 684 | struct twl4030_platform_data { | 697 | struct twl4030_platform_data { |
| @@ -690,7 +703,7 @@ struct twl4030_platform_data { | |||
| 690 | struct twl4030_keypad_data *keypad; | 703 | struct twl4030_keypad_data *keypad; |
| 691 | struct twl4030_usb_data *usb; | 704 | struct twl4030_usb_data *usb; |
| 692 | struct twl4030_power_data *power; | 705 | struct twl4030_power_data *power; |
| 693 | struct twl4030_codec_data *codec; | 706 | struct twl4030_audio_data *audio; |
| 694 | 707 | ||
| 695 | /* Common LDO regulators for TWL4030/TWL6030 */ | 708 | /* Common LDO regulators for TWL4030/TWL6030 */ |
| 696 | struct regulator_init_data *vdac; | 709 | struct regulator_init_data *vdac; |
diff --git a/include/linux/mfd/twl4030-codec.h b/include/linux/mfd/twl4030-audio.h index 5cc16bbd1da1..3d22b72df076 100644 --- a/include/linux/mfd/twl4030-codec.h +++ b/include/linux/mfd/twl4030-audio.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * MFD driver for twl4030 codec submodule | 2 | * MFD driver for twl4030 audio submodule |
| 3 | * | 3 | * |
| 4 | * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> | 4 | * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> |
| 5 | * | 5 | * |
| @@ -259,14 +259,14 @@ | |||
| 259 | #define TWL4030_VIBRA_DIR_SEL 0x20 | 259 | #define TWL4030_VIBRA_DIR_SEL 0x20 |
| 260 | 260 | ||
| 261 | /* TWL4030 codec resource IDs */ | 261 | /* TWL4030 codec resource IDs */ |
| 262 | enum twl4030_codec_res { | 262 | enum twl4030_audio_res { |
| 263 | TWL4030_CODEC_RES_POWER = 0, | 263 | TWL4030_AUDIO_RES_POWER = 0, |
| 264 | TWL4030_CODEC_RES_APLL, | 264 | TWL4030_AUDIO_RES_APLL, |
| 265 | TWL4030_CODEC_RES_MAX, | 265 | TWL4030_AUDIO_RES_MAX, |
| 266 | }; | 266 | }; |
| 267 | 267 | ||
| 268 | int twl4030_codec_disable_resource(enum twl4030_codec_res id); | 268 | int twl4030_audio_disable_resource(enum twl4030_audio_res id); |
| 269 | int twl4030_codec_enable_resource(enum twl4030_codec_res id); | 269 | int twl4030_audio_enable_resource(enum twl4030_audio_res id); |
| 270 | unsigned int twl4030_codec_get_mclk(void); | 270 | unsigned int twl4030_audio_get_mclk(void); |
| 271 | 271 | ||
| 272 | #endif /* End of __TWL4030_CODEC_H__ */ | 272 | #endif /* End of __TWL4030_CODEC_H__ */ |
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h new file mode 100644 index 000000000000..4c806f6d663e --- /dev/null +++ b/include/linux/mfd/twl6040.h | |||
| @@ -0,0 +1,228 @@ | |||
| 1 | /* | ||
| 2 | * MFD driver for twl6040 | ||
| 3 | * | ||
| 4 | * Authors: Jorge Eduardo Candelaria <jorge.candelaria@ti.com> | ||
| 5 | * Misael Lopez Cruz <misael.lopez@ti.com> | ||
| 6 | * | ||
| 7 | * Copyright: (C) 2011 Texas Instruments, Inc. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, but | ||
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 16 | * General Public License for more details. | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License | ||
| 19 | * along with this program; if not, write to the Free Software | ||
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 21 | * 02110-1301 USA | ||
| 22 | * | ||
| 23 | */ | ||
| 24 | |||
| 25 | #ifndef __TWL6040_CODEC_H__ | ||
| 26 | #define __TWL6040_CODEC_H__ | ||
| 27 | |||
| 28 | #include <linux/interrupt.h> | ||
| 29 | #include <linux/mfd/core.h> | ||
| 30 | |||
| 31 | #define TWL6040_REG_ASICID 0x01 | ||
| 32 | #define TWL6040_REG_ASICREV 0x02 | ||
| 33 | #define TWL6040_REG_INTID 0x03 | ||
| 34 | #define TWL6040_REG_INTMR 0x04 | ||
| 35 | #define TWL6040_REG_NCPCTL 0x05 | ||
| 36 | #define TWL6040_REG_LDOCTL 0x06 | ||
| 37 | #define TWL6040_REG_HPPLLCTL 0x07 | ||
| 38 | #define TWL6040_REG_LPPLLCTL 0x08 | ||
| 39 | #define TWL6040_REG_LPPLLDIV 0x09 | ||
| 40 | #define TWL6040_REG_AMICBCTL 0x0A | ||
| 41 | #define TWL6040_REG_DMICBCTL 0x0B | ||
| 42 | #define TWL6040_REG_MICLCTL 0x0C | ||
| 43 | #define TWL6040_REG_MICRCTL 0x0D | ||
| 44 | #define TWL6040_REG_MICGAIN 0x0E | ||
| 45 | #define TWL6040_REG_LINEGAIN 0x0F | ||
| 46 | #define TWL6040_REG_HSLCTL 0x10 | ||
| 47 | #define TWL6040_REG_HSRCTL 0x11 | ||
| 48 | #define TWL6040_REG_HSGAIN 0x12 | ||
| 49 | #define TWL6040_REG_EARCTL 0x13 | ||
| 50 | #define TWL6040_REG_HFLCTL 0x14 | ||
| 51 | #define TWL6040_REG_HFLGAIN 0x15 | ||
| 52 | #define TWL6040_REG_HFRCTL 0x16 | ||
| 53 | #define TWL6040_REG_HFRGAIN 0x17 | ||
| 54 | #define TWL6040_REG_VIBCTLL 0x18 | ||
| 55 | #define TWL6040_REG_VIBDATL 0x19 | ||
| 56 | #define TWL6040_REG_VIBCTLR 0x1A | ||
| 57 | #define TWL6040_REG_VIBDATR 0x1B | ||
| 58 | #define TWL6040_REG_HKCTL1 0x1C | ||
| 59 | #define TWL6040_REG_HKCTL2 0x1D | ||
| 60 | #define TWL6040_REG_GPOCTL 0x1E | ||
| 61 | #define TWL6040_REG_ALB 0x1F | ||
| 62 | #define TWL6040_REG_DLB 0x20 | ||
| 63 | #define TWL6040_REG_TRIM1 0x28 | ||
| 64 | #define TWL6040_REG_TRIM2 0x29 | ||
| 65 | #define TWL6040_REG_TRIM3 0x2A | ||
| 66 | #define TWL6040_REG_HSOTRIM 0x2B | ||
| 67 | #define TWL6040_REG_HFOTRIM 0x2C | ||
| 68 | #define TWL6040_REG_ACCCTL 0x2D | ||
| 69 | #define TWL6040_REG_STATUS 0x2E | ||
| 70 | |||
| 71 | #define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1) | ||
| 72 | |||
| 73 | #define TWL6040_VIOREGNUM 18 | ||
| 74 | #define TWL6040_VDDREGNUM 21 | ||
| 75 | |||
| 76 | /* INTID (0x03) fields */ | ||
| 77 | |||
| 78 | #define TWL6040_THINT 0x01 | ||
| 79 | #define TWL6040_PLUGINT 0x02 | ||
| 80 | #define TWL6040_UNPLUGINT 0x04 | ||
| 81 | #define TWL6040_HOOKINT 0x08 | ||
| 82 | #define TWL6040_HFINT 0x10 | ||
| 83 | #define TWL6040_VIBINT 0x20 | ||
| 84 | #define TWL6040_READYINT 0x40 | ||
| 85 | |||
| 86 | /* INTMR (0x04) fields */ | ||
| 87 | |||
| 88 | #define TWL6040_THMSK 0x01 | ||
| 89 | #define TWL6040_PLUGMSK 0x02 | ||
| 90 | #define TWL6040_HOOKMSK 0x08 | ||
| 91 | #define TWL6040_HFMSK 0x10 | ||
| 92 | #define TWL6040_VIBMSK 0x20 | ||
| 93 | #define TWL6040_READYMSK 0x40 | ||
| 94 | #define TWL6040_ALLINT_MSK 0x7B | ||
| 95 | |||
| 96 | /* NCPCTL (0x05) fields */ | ||
| 97 | |||
| 98 | #define TWL6040_NCPENA 0x01 | ||
| 99 | #define TWL6040_NCPOPEN 0x40 | ||
| 100 | |||
| 101 | /* LDOCTL (0x06) fields */ | ||
| 102 | |||
| 103 | #define TWL6040_LSLDOENA 0x01 | ||
| 104 | #define TWL6040_HSLDOENA 0x04 | ||
| 105 | #define TWL6040_REFENA 0x40 | ||
| 106 | #define TWL6040_OSCENA 0x80 | ||
| 107 | |||
| 108 | /* HPPLLCTL (0x07) fields */ | ||
| 109 | |||
| 110 | #define TWL6040_HPLLENA 0x01 | ||
| 111 | #define TWL6040_HPLLRST 0x02 | ||
| 112 | #define TWL6040_HPLLBP 0x04 | ||
| 113 | #define TWL6040_HPLLSQRENA 0x08 | ||
| 114 | #define TWL6040_MCLK_12000KHZ (0 << 5) | ||
| 115 | #define TWL6040_MCLK_19200KHZ (1 << 5) | ||
| 116 | #define TWL6040_MCLK_26000KHZ (2 << 5) | ||
| 117 | #define TWL6040_MCLK_38400KHZ (3 << 5) | ||
| 118 | #define TWL6040_MCLK_MSK 0x60 | ||
| 119 | |||
| 120 | /* LPPLLCTL (0x08) fields */ | ||
| 121 | |||
| 122 | #define TWL6040_LPLLENA 0x01 | ||
| 123 | #define TWL6040_LPLLRST 0x02 | ||
| 124 | #define TWL6040_LPLLSEL 0x04 | ||
| 125 | #define TWL6040_LPLLFIN 0x08 | ||
| 126 | #define TWL6040_HPLLSEL 0x10 | ||
| 127 | |||
| 128 | /* HSLCTL (0x10) fields */ | ||
| 129 | |||
| 130 | #define TWL6040_HSDACMODEL 0x02 | ||
| 131 | #define TWL6040_HSDRVMODEL 0x08 | ||
| 132 | |||
| 133 | /* HSRCTL (0x11) fields */ | ||
| 134 | |||
| 135 | #define TWL6040_HSDACMODER 0x02 | ||
| 136 | #define TWL6040_HSDRVMODER 0x08 | ||
| 137 | |||
| 138 | /* VIBCTLL (0x18) fields */ | ||
| 139 | |||
| 140 | #define TWL6040_VIBENAL 0x01 | ||
| 141 | #define TWL6040_VIBCTRLL 0x04 | ||
| 142 | #define TWL6040_VIBCTRLLP 0x08 | ||
| 143 | #define TWL6040_VIBCTRLLN 0x10 | ||
| 144 | |||
| 145 | /* VIBDATL (0x19) fields */ | ||
| 146 | |||
| 147 | #define TWL6040_VIBDAT_MAX 0x64 | ||
| 148 | |||
| 149 | /* VIBCTLR (0x1A) fields */ | ||
| 150 | |||
| 151 | #define TWL6040_VIBENAR 0x01 | ||
| 152 | #define TWL6040_VIBCTRLR 0x04 | ||
| 153 | #define TWL6040_VIBCTRLRP 0x08 | ||
| 154 | #define TWL6040_VIBCTRLRN 0x10 | ||
| 155 | |||
| 156 | /* GPOCTL (0x1E) fields */ | ||
| 157 | |||
| 158 | #define TWL6040_GPO1 0x01 | ||
| 159 | #define TWL6040_GPO2 0x02 | ||
| 160 | #define TWL6040_GPO3 0x03 | ||
| 161 | |||
| 162 | /* ACCCTL (0x2D) fields */ | ||
| 163 | |||
| 164 | #define TWL6040_I2CSEL 0x01 | ||
| 165 | #define TWL6040_RESETSPLIT 0x04 | ||
| 166 | #define TWL6040_INTCLRMODE 0x08 | ||
| 167 | |||
| 168 | /* STATUS (0x2E) fields */ | ||
| 169 | |||
| 170 | #define TWL6040_PLUGCOMP 0x02 | ||
| 171 | #define TWL6040_VIBLOCDET 0x10 | ||
| 172 | #define TWL6040_VIBROCDET 0x20 | ||
| 173 | #define TWL6040_TSHUTDET 0x40 | ||
| 174 | |||
| 175 | #define TWL6040_CELLS 2 | ||
| 176 | |||
| 177 | #define TWL6040_REV_ES1_0 0x00 | ||
| 178 | #define TWL6040_REV_ES1_1 0x01 | ||
| 179 | #define TWL6040_REV_ES1_2 0x02 | ||
| 180 | |||
| 181 | #define TWL6040_IRQ_TH 0 | ||
| 182 | #define TWL6040_IRQ_PLUG 1 | ||
| 183 | #define TWL6040_IRQ_HOOK 2 | ||
| 184 | #define TWL6040_IRQ_HF 3 | ||
| 185 | #define TWL6040_IRQ_VIB 4 | ||
| 186 | #define TWL6040_IRQ_READY 5 | ||
| 187 | |||
| 188 | /* PLL selection */ | ||
| 189 | #define TWL6040_SYSCLK_SEL_LPPLL 0 | ||
| 190 | #define TWL6040_SYSCLK_SEL_HPPLL 1 | ||
| 191 | |||
| 192 | struct twl6040 { | ||
| 193 | struct device *dev; | ||
| 194 | struct mutex mutex; | ||
| 195 | struct mutex io_mutex; | ||
| 196 | struct mutex irq_mutex; | ||
| 197 | struct mfd_cell cells[TWL6040_CELLS]; | ||
| 198 | struct completion ready; | ||
| 199 | |||
| 200 | int audpwron; | ||
| 201 | int power_count; | ||
| 202 | int rev; | ||
| 203 | |||
| 204 | int pll; | ||
| 205 | unsigned int sysclk; | ||
| 206 | |||
| 207 | unsigned int irq; | ||
| 208 | unsigned int irq_base; | ||
| 209 | u8 irq_masks_cur; | ||
| 210 | u8 irq_masks_cache; | ||
| 211 | }; | ||
| 212 | |||
| 213 | int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg); | ||
| 214 | int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, | ||
| 215 | u8 val); | ||
| 216 | int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, | ||
| 217 | u8 mask); | ||
| 218 | int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, | ||
| 219 | u8 mask); | ||
| 220 | int twl6040_power(struct twl6040 *twl6040, int on); | ||
| 221 | int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, | ||
| 222 | unsigned int freq_in, unsigned int freq_out); | ||
| 223 | int twl6040_get_pll(struct twl6040 *twl6040); | ||
| 224 | unsigned int twl6040_get_sysclk(struct twl6040 *twl6040); | ||
| 225 | int twl6040_irq_init(struct twl6040 *twl6040); | ||
| 226 | void twl6040_irq_exit(struct twl6040 *twl6040); | ||
| 227 | |||
| 228 | #endif /* End of __TWL6040_CODEC_H__ */ | ||
