252 files changed, 6936 insertions, 3050 deletions

diff --git a/include/asm-generic/ioctl.h b/include/asm-generic/ioctl.h
index d17295b290fa..297fb0d7cd6c 100644
--- a/include/asm-generic/ioctl.h
+++ b/include/asm-generic/ioctl.h
@@ -3,10 +3,15 @@
 
 #include <uapi/asm-generic/ioctl.h>
 
+#ifdef __CHECKER__
+#define _IOC_TYPECHECK(t) (sizeof(t))
+#else
 /* provoke compile error for invalid uses of size argument */
 extern unsigned int __invalid_size_argument_for_IOC;
 #define _IOC_TYPECHECK(t) \
         ((sizeof(t) == sizeof(t[1]) && \
           sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
           sizeof(t) : __invalid_size_argument_for_IOC)
+#endif
+
 #endif /* _ASM_GENERIC_IOCTL_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index a8015a7a55bb..53b2acc38213 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -233,6 +233,10 @@ static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
 # define pte_accessible(mm, pte)        ((void)(pte), 1)
 #endif
 
+#ifndef pte_present_nonuma
+#define pte_present_nonuma(pte) pte_present(pte)
+#endif
+
 #ifndef flush_tlb_fix_spurious_fault
 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
 #endif
@@ -670,7 +674,7 @@ static inline int pmd_trans_unstable(pmd_t *pmd)
 static inline int pte_numa(pte_t pte)
 {
         return (pte_flags(pte) &
-                (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
+                (_PAGE_NUMA|_PAGE_PROTNONE|_PAGE_PRESENT)) == _PAGE_NUMA;
 }
 #endif
 
@@ -678,7 +682,7 @@ static inline int pte_numa(pte_t pte)
 static inline int pmd_numa(pmd_t pmd)
 {
         return (pmd_flags(pmd) &
-                (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
+                (_PAGE_NUMA|_PAGE_PROTNONE|_PAGE_PRESENT)) == _PAGE_NUMA;
 }
 #endif
 
diff --git a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h
index 03cf5936bad6..1ac097279db1 100644
--- a/include/asm-generic/unaligned.h
+++ b/include/asm-generic/unaligned.h
@@ -4,22 +4,27 @@
 /*
  * This is the most generic implementation of unaligned accesses
  * and should work almost anywhere.
- *
- * If an architecture can handle unaligned accesses in hardware,
- * it may want to use the linux/unaligned/access_ok.h implementation
- * instead.
  */
 #include <asm/byteorder.h>
 
+/* Set by the arch if it can handle unaligned accesses in hardware. */
+#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+# include <linux/unaligned/access_ok.h>
+#endif
+
 #if defined(__LITTLE_ENDIAN)
-# include <linux/unaligned/le_struct.h>
-# include <linux/unaligned/be_byteshift.h>
+# ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#  include <linux/unaligned/le_struct.h>
+#  include <linux/unaligned/be_byteshift.h>
+# endif
 # include <linux/unaligned/generic.h>
 # define get_unaligned  __get_unaligned_le
 # define put_unaligned  __put_unaligned_le
 #elif defined(__BIG_ENDIAN)
-# include <linux/unaligned/be_struct.h>
-# include <linux/unaligned/le_byteshift.h>
+# ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#  include <linux/unaligned/be_struct.h>
+#  include <linux/unaligned/le_byteshift.h>
+# endif
 # include <linux/unaligned/generic.h>
 # define get_unaligned  __get_unaligned_be
 # define put_unaligned  __put_unaligned_be
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 146e4fffd710..d647637cd699 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -139,52 +139,23 @@
 #define TRACE_SYSCALLS()
 #endif
 
-#ifdef CONFIG_CLKSRC_OF
-#define CLKSRC_OF_TABLES() . = ALIGN(8);                                \
-                           VMLINUX_SYMBOL(__clksrc_of_table) = .;       \
-                           *(__clksrc_of_table)                         \
-                           *(__clksrc_of_table_end)
-#else
-#define CLKSRC_OF_TABLES()
-#endif
 
-#ifdef CONFIG_IRQCHIP
-#define IRQCHIP_OF_MATCH_TABLE()                                        \
+#define ___OF_TABLE(cfg, name)  _OF_TABLE_##cfg(name)
+#define __OF_TABLE(cfg, name)   ___OF_TABLE(cfg, name)
+#define OF_TABLE(cfg, name)     __OF_TABLE(config_enabled(cfg), name)
+#define _OF_TABLE_0(name)
+#define _OF_TABLE_1(name)                                               \
         . = ALIGN(8);                                                   \
-        VMLINUX_SYMBOL(__irqchip_begin) = .;                            \
-        *(__irqchip_of_table)                                           \
-        *(__irqchip_of_end)
-#else
-#define IRQCHIP_OF_MATCH_TABLE()
-#endif
-
-#ifdef CONFIG_COMMON_CLK
-#define CLK_OF_TABLES() . = ALIGN(8);                           \
-                        VMLINUX_SYMBOL(__clk_of_table) = .;     \
-                        *(__clk_of_table)                       \
-                        *(__clk_of_table_end)
-#else
-#define CLK_OF_TABLES()
-#endif
-
-#ifdef CONFIG_OF_RESERVED_MEM
-#define RESERVEDMEM_OF_TABLES()                         \
-        . = ALIGN(8);                                   \
-        VMLINUX_SYMBOL(__reservedmem_of_table) = .;     \
-        *(__reservedmem_of_table)                       \
-        *(__reservedmem_of_table_end)
-#else
-#define RESERVEDMEM_OF_TABLES()
-#endif
+        VMLINUX_SYMBOL(__##name##_of_table) = .;                        \
+        *(__##name##_of_table)                                          \
+        *(__##name##_of_table_end)
 
-#ifdef CONFIG_SMP
-#define CPU_METHOD_OF_TABLES() . = ALIGN(8);                                \
-                           VMLINUX_SYMBOL(__cpu_method_of_table_begin) = .; \
-                           *(__cpu_method_of_table)                         \
-                           VMLINUX_SYMBOL(__cpu_method_of_table_end) = .;
-#else
-#define CPU_METHOD_OF_TABLES()
-#endif
+#define CLKSRC_OF_TABLES()      OF_TABLE(CONFIG_CLKSRC_OF, clksrc)
+#define IRQCHIP_OF_MATCH_TABLE() OF_TABLE(CONFIG_IRQCHIP, irqchip)
+#define CLK_OF_TABLES()         OF_TABLE(CONFIG_COMMON_CLK, clk)
+#define RESERVEDMEM_OF_TABLES() OF_TABLE(CONFIG_OF_RESERVED_MEM, reservedmem)
+#define CPU_METHOD_OF_TABLES()  OF_TABLE(CONFIG_SMP, cpu_method)
+#define EARLYCON_OF_TABLES()    OF_TABLE(CONFIG_SERIAL_EARLYCON, earlycon)
 
 #define KERNEL_DTB()                                                    \
         STRUCT_ALIGN();                                                 \
@@ -513,7 +484,8 @@
         CLKSRC_OF_TABLES()                                              \
         CPU_METHOD_OF_TABLES()                                          \
         KERNEL_DTB()                                                    \
-        IRQCHIP_OF_MATCH_TABLE()
+        IRQCHIP_OF_MATCH_TABLE()                                        \
+        EARLYCON_OF_TABLES()
 
 #define INIT_TEXT                                                       \
         *(.init.text)                                                   \
diff --git a/include/crypto/internal/hash.h b/include/crypto/internal/hash.h
index 821eae8cbd8c..9b6f32a6cad1 100644
--- a/include/crypto/internal/hash.h
+++ b/include/crypto/internal/hash.h
@@ -55,15 +55,28 @@ extern const struct crypto_type crypto_ahash_type;
 int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err);
 int crypto_hash_walk_first(struct ahash_request *req,
                            struct crypto_hash_walk *walk);
+int crypto_ahash_walk_first(struct ahash_request *req,
+                           struct crypto_hash_walk *walk);
 int crypto_hash_walk_first_compat(struct hash_desc *hdesc,
                                   struct crypto_hash_walk *walk,
                                   struct scatterlist *sg, unsigned int len);
 
+static inline int crypto_ahash_walk_done(struct crypto_hash_walk *walk,
+                                         int err)
+{
+        return crypto_hash_walk_done(walk, err);
+}
+
 static inline int crypto_hash_walk_last(struct crypto_hash_walk *walk)
 {
         return !(walk->entrylen | walk->total);
 }
 
+static inline int crypto_ahash_walk_last(struct crypto_hash_walk *walk)
+{
+        return crypto_hash_walk_last(walk);
+}
+
 int crypto_register_ahash(struct ahash_alg *alg);
 int crypto_unregister_ahash(struct ahash_alg *alg);
 int ahash_register_instance(struct crypto_template *tmpl,
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index a7c2a862b4f4..8af71a8e2c00 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -143,11 +143,6 @@ int drm_err(const char *func, const char *format, ...);
 #define DRIVER_PRIME       0x4000
 #define DRIVER_RENDER      0x8000
 
-#define DRIVER_BUS_PCI 0x1
-#define DRIVER_BUS_PLATFORM 0x2
-#define DRIVER_BUS_USB 0x3
-#define DRIVER_BUS_HOST1X 0x4
-
 /***********************************************************************/
 /** \name Begin the DRM... */
 /*@{*/
@@ -239,8 +234,6 @@ int drm_err(const char *func, const char *format, ...);
 /** \name Internal types and structures */
 /*@{*/
 
-#define DRM_ARRAY_SIZE(x) ARRAY_SIZE(x)
-
 #define DRM_IF_VERSION(maj, min) (maj << 16 | min)
 
 /**
@@ -731,13 +724,7 @@ struct drm_master {
 #define DRM_SCANOUTPOS_ACCURATE     (1 << 2)
 
 struct drm_bus {
-        int bus_type;
-        int (*get_irq)(struct drm_device *dev);
-        const char *(*get_name)(struct drm_device *dev);
         int (*set_busid)(struct drm_device *dev, struct drm_master *master);
-        int (*set_unique)(struct drm_device *dev, struct drm_master *master,
-                          struct drm_unique *unique);
-        int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p);
 };
 
 /**
@@ -974,11 +961,6 @@ struct drm_driver {
         const struct drm_ioctl_desc *ioctls;
         int num_ioctls;
         const struct file_operations *fops;
-        union {
-                struct pci_driver *pci;
-                struct platform_device *platform_device;
-                struct usb_driver *usb;
-        } kdriver;
         struct drm_bus *bus;
 
         /* List of devices hanging off this driver with stealth attach. */
@@ -1040,14 +1022,17 @@ struct drm_pending_vblank_event {
 };
 
 struct drm_vblank_crtc {
+        struct drm_device *dev;         /* pointer to the drm_device */
         wait_queue_head_t queue;        /**< VBLANK wait queue */
         struct timeval time[DRM_VBLANKTIME_RBSIZE];     /**< timestamp of current count */
+        struct timer_list disable_timer;                /* delayed disable timer */
         atomic_t count;                 /**< number of VBLANK interrupts */
         atomic_t refcount;              /* number of users of vblank interruptsper crtc */
         u32 last;                       /* protected by dev->vbl_lock, used */
                                         /* for wraparound handling */
         u32 last_wait;                  /* Last vblank seqno waited per CRTC */
         unsigned int inmodeset;         /* Display driver is setting mode */
+        int crtc;                       /* crtc index */
         bool enabled;                   /* so we don't call enable more than
                                            once per disable */
 };
@@ -1058,7 +1043,6 @@ struct drm_vblank_crtc {
  */
 struct drm_device {
         struct list_head legacy_dev_list;/**< list of devices per driver for stealth attach cleanup */
-        char *devname;                  /**< For /proc/interrupts */
         int if_version;                 /**< Highest interface version set */
 
         /** \name Lifetime Management */
@@ -1072,18 +1056,19 @@ struct drm_device {
         struct drm_minor *render;               /**< Render node */
         atomic_t unplugged;                     /**< Flag whether dev is dead */
         struct inode *anon_inode;               /**< inode for private address-space */
+        char *unique;                           /**< unique name of the device */
         /*@} */
 
         /** \name Locks */
         /*@{ */
-        spinlock_t count_lock;          /**< For inuse, drm_device::open_count, drm_device::buf_use */
         struct mutex struct_mutex;      /**< For others */
         struct mutex master_mutex;      /**< For drm_minor::master and drm_file::is_master */
         /*@} */
 
         /** \name Usage Counters */
         /*@{ */
-        int open_count;                 /**< Outstanding files open */
+        int open_count;                 /**< Outstanding files open, protected by drm_global_mutex. */
+        spinlock_t buf_lock;            /**< For drm_device::buf_use and a few other things. */
         int buf_use;                    /**< Buffers in use -- cannot alloc */
         atomic_t buf_alloc;             /**< Buffer allocation in progress */
         /*@} */
@@ -1114,6 +1099,8 @@ struct drm_device {
         /** \name Context support */
         /*@{ */
         bool irq_enabled;               /**< True if irq handler is enabled */
+        int irq;
+
         __volatile__ long context_flag; /**< Context swapping flag */
         int last_context;               /**< Last current context */
         /*@} */
@@ -1134,7 +1121,6 @@ struct drm_device {
 
         spinlock_t vblank_time_lock;    /**< Protects vblank count and time updates during vblank enable/disable */
         spinlock_t vbl_lock;
-        struct timer_list vblank_disable_timer;
 
         u32 max_vblank_count;           /**< size of vblank counter register */
 
@@ -1186,11 +1172,6 @@ static __inline__ int drm_core_check_feature(struct drm_device *dev,
         return ((dev->driver->driver_features & feature) ? 1 : 0);
 }
 
-static inline int drm_dev_to_irq(struct drm_device *dev)
-{
-        return dev->driver->bus->get_irq(dev);
-}
-
 static inline void drm_device_set_unplugged(struct drm_device *dev)
 {
         smp_wmb();
@@ -1204,11 +1185,6 @@ static inline int drm_device_is_unplugged(struct drm_device *dev)
         return ret;
 }
 
-static inline bool drm_modeset_is_locked(struct drm_device *dev)
-{
-        return mutex_is_locked(&dev->mode_config.mutex);
-}
-
 static inline bool drm_is_render_client(const struct drm_file *file_priv)
 {
         return file_priv->minor->type == DRM_MINOR_RENDER;
@@ -1310,7 +1286,7 @@ extern int drm_remove_magic(struct drm_master *master, drm_magic_t magic);
 /* Cache management (drm_cache.c) */
 void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
 void drm_clflush_sg(struct sg_table *st);
-void drm_clflush_virt_range(char *addr, unsigned long length);
+void drm_clflush_virt_range(void *addr, unsigned long length);
 
                                 /* Locking IOCTL support (drm_lock.h) */
 extern int drm_lock(struct drm_device *dev, void *data,
@@ -1363,7 +1339,7 @@ extern void drm_core_reclaim_buffers(struct drm_device *dev,
                                 /* IRQ support (drm_irq.h) */
 extern int drm_control(struct drm_device *dev, void *data,
                        struct drm_file *file_priv);
-extern int drm_irq_install(struct drm_device *dev);
+extern int drm_irq_install(struct drm_device *dev, int irq);
 extern int drm_irq_uninstall(struct drm_device *dev);
 
 extern int drm_vblank_init(struct drm_device *dev, int num_crtcs);
@@ -1377,8 +1353,14 @@ extern void drm_send_vblank_event(struct drm_device *dev, int crtc,
 extern bool drm_handle_vblank(struct drm_device *dev, int crtc);
 extern int drm_vblank_get(struct drm_device *dev, int crtc);
 extern void drm_vblank_put(struct drm_device *dev, int crtc);
+extern int drm_crtc_vblank_get(struct drm_crtc *crtc);
+extern void drm_crtc_vblank_put(struct drm_crtc *crtc);
 extern void drm_vblank_off(struct drm_device *dev, int crtc);
+extern void drm_vblank_on(struct drm_device *dev, int crtc);
+extern void drm_crtc_vblank_off(struct drm_crtc *crtc);
+extern void drm_crtc_vblank_on(struct drm_crtc *crtc);
 extern void drm_vblank_cleanup(struct drm_device *dev);
+
 extern u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc,
                                      struct timeval *tvblank, unsigned flags);
 extern int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev,
@@ -1522,6 +1504,9 @@ extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
                                        size_t align);
 extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
 extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
+extern int drm_pci_set_unique(struct drm_device *dev,
+                              struct drm_master *master,
+                              struct drm_unique *u);
 
                                /* sysfs support (drm_sysfs.c) */
 struct drm_sysfs_class;
@@ -1631,6 +1616,7 @@ void drm_dev_ref(struct drm_device *dev);
 void drm_dev_unref(struct drm_device *dev);
 int drm_dev_register(struct drm_device *dev, unsigned long flags);
 void drm_dev_unregister(struct drm_device *dev);
+int drm_dev_set_unique(struct drm_device *dev, const char *fmt, ...);
 
 struct drm_minor *drm_minor_acquire(unsigned int minor_id);
 void drm_minor_release(struct drm_minor *minor);
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index e55fccbe7c42..251b75e6bf7a 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -33,6 +33,7 @@
 #include <linux/hdmi.h>
 #include <drm/drm_mode.h>
 #include <drm/drm_fourcc.h>
+#include <drm/drm_modeset_lock.h>
 
 struct drm_device;
 struct drm_mode_set;
@@ -50,6 +51,7 @@ struct drm_clip_rect;
 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
 #define DRM_MODE_OBJECT_BRIDGE 0xbdbdbdbd
+#define DRM_MODE_OBJECT_ANY 0
 
 struct drm_mode_object {
         uint32_t id;
@@ -64,6 +66,15 @@ struct drm_object_properties {
         uint64_t values[DRM_OBJECT_MAX_PROPERTY];
 };
 
+static inline int64_t U642I64(uint64_t val)
+{
+        return (int64_t)*((int64_t *)&val);
+}
+static inline uint64_t I642U64(int64_t val)
+{
+        return (uint64_t)*((uint64_t *)&val);
+}
+
 enum drm_connector_force {
         DRM_FORCE_UNSPECIFIED,
         DRM_FORCE_OFF,
@@ -110,6 +121,9 @@ struct drm_display_info {
         enum subpixel_order subpixel_order;
         u32 color_formats;
 
+        /* Mask of supported hdmi deep color modes */
+        u8 edid_hdmi_dc_modes;
+
         u8 cea_rev;
 };
 
@@ -190,10 +204,15 @@ struct drm_property {
         char name[DRM_PROP_NAME_LEN];
         uint32_t num_values;
         uint64_t *values;
+        struct drm_device *dev;
 
         struct list_head enum_blob_list;
 };
 
+void drm_modeset_lock_all(struct drm_device *dev);
+void drm_modeset_unlock_all(struct drm_device *dev);
+void drm_warn_on_modeset_not_all_locked(struct drm_device *dev);
+
 struct drm_crtc;
 struct drm_connector;
 struct drm_encoder;
@@ -269,6 +288,7 @@ struct drm_crtc_funcs {
  * drm_crtc - central CRTC control structure
  * @dev: parent DRM device
  * @head: list management
+ * @mutex: per-CRTC locking
  * @base: base KMS object for ID tracking etc.
  * @primary: primary plane for this CRTC
  * @cursor: cursor plane for this CRTC
@@ -303,7 +323,7 @@ struct drm_crtc {
          * state, ...) and a write lock for everything which can be update
          * without a full modeset (fb, cursor data, ...)
          */
-        struct mutex mutex;
+        struct drm_modeset_lock mutex;
 
         struct drm_mode_object base;
 
@@ -400,6 +420,7 @@ struct drm_encoder_funcs {
  * @dev: parent DRM device
  * @head: list management
  * @base: base KMS object
+ * @name: encoder name
  * @encoder_type: one of the %DRM_MODE_ENCODER_<foo> types in drm_mode.h
  * @possible_crtcs: bitmask of potential CRTC bindings
  * @possible_clones: bitmask of potential sibling encoders for cloning
@@ -416,6 +437,7 @@ struct drm_encoder {
         struct list_head head;
 
         struct drm_mode_object base;
+        char *name;
         int encoder_type;
         uint32_t possible_crtcs;
         uint32_t possible_clones;
@@ -444,6 +466,7 @@ struct drm_encoder {
  * @attr: sysfs attributes
  * @head: list management
  * @base: base KMS object
+ * @name: connector name
  * @connector_type: one of the %DRM_MODE_CONNECTOR_<foo> types from drm_mode.h
  * @connector_type_id: index into connector type enum
  * @interlace_allowed: can this connector handle interlaced modes?
@@ -482,6 +505,7 @@ struct drm_connector {
 
         struct drm_mode_object base;
 
+        char *name;
         int connector_type;
         int connector_type_id;
         bool interlace_allowed;
@@ -723,6 +747,8 @@ struct drm_mode_group {
  */
 struct drm_mode_config {
         struct mutex mutex; /* protects configuration (mode lists etc.) */
+        struct drm_modeset_lock connection_mutex; /* protects connector->encoder and encoder->crtc links */
+        struct drm_modeset_acquire_ctx *acquire_ctx; /* for legacy _lock_all() / _unlock_all() */
         struct mutex idr_mutex; /* for IDR management */
         struct idr crtc_idr; /* use this idr for all IDs, fb, crtc, connector, modes - just makes life easier */
         /* this is limited to one for now */
@@ -823,10 +849,6 @@ struct drm_prop_enum_list {
         char *name;
 };
 
-extern void drm_modeset_lock_all(struct drm_device *dev);
-extern void drm_modeset_unlock_all(struct drm_device *dev);
-extern void drm_warn_on_modeset_not_all_locked(struct drm_device *dev);
-
 extern int drm_crtc_init_with_planes(struct drm_device *dev,
                                      struct drm_crtc *crtc,
                                      struct drm_plane *primary,
@@ -905,7 +927,6 @@ extern int drm_crtc_check_viewport(const struct drm_crtc *crtc,
 
 extern void drm_encoder_cleanup(struct drm_encoder *encoder);
 
-extern const char *drm_get_connector_name(const struct drm_connector *connector);
 extern const char *drm_get_connector_status_name(enum drm_connector_status status);
 extern const char *drm_get_subpixel_order_name(enum subpixel_order order);
 extern const char *drm_get_dpms_name(int val);
@@ -915,6 +936,7 @@ extern const char *drm_get_tv_subconnector_name(int val);
 extern const char *drm_get_tv_select_name(int val);
 extern void drm_fb_release(struct drm_file *file_priv);
 extern int drm_mode_group_init_legacy_group(struct drm_device *dev, struct drm_mode_group *group);
+extern void drm_mode_group_destroy(struct drm_mode_group *group);
 extern bool drm_probe_ddc(struct i2c_adapter *adapter);
 extern struct edid *drm_get_edid(struct drm_connector *connector,
                                  struct i2c_adapter *adapter);
@@ -926,6 +948,23 @@ extern void drm_mode_config_cleanup(struct drm_device *dev);
 
 extern int drm_mode_connector_update_edid_property(struct drm_connector *connector,
                                                 struct edid *edid);
+
+static inline bool drm_property_type_is(struct drm_property *property,
+                uint32_t type)
+{
+        /* instanceof for props.. handles extended type vs original types: */
+        if (property->flags & DRM_MODE_PROP_EXTENDED_TYPE)
+                return (property->flags & DRM_MODE_PROP_EXTENDED_TYPE) == type;
+        return property->flags & type;
+}
+
+static inline bool drm_property_type_valid(struct drm_property *property)
+{
+        if (property->flags & DRM_MODE_PROP_EXTENDED_TYPE)
+                return !(property->flags & DRM_MODE_PROP_LEGACY_TYPE);
+        return !!(property->flags & DRM_MODE_PROP_LEGACY_TYPE);
+}
+
 extern int drm_object_property_set_value(struct drm_mode_object *obj,
                                          struct drm_property *property,
                                          uint64_t val);
@@ -959,6 +998,11 @@ struct drm_property *drm_property_create_bitmask(struct drm_device *dev,
 struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,
                                          const char *name,
                                          uint64_t min, uint64_t max);
+struct drm_property *drm_property_create_signed_range(struct drm_device *dev,
+                                         int flags, const char *name,
+                                         int64_t min, int64_t max);
+struct drm_property *drm_property_create_object(struct drm_device *dev,
+                                         int flags, const char *name, uint32_t type);
 extern void drm_property_destroy(struct drm_device *dev, struct drm_property *property);
 extern int drm_property_add_enum(struct drm_property *property, int index,
                                  uint64_t value, const char *name);
@@ -967,7 +1011,6 @@ extern int drm_mode_create_tv_properties(struct drm_device *dev, int num_formats
                                      char *formats[]);
 extern int drm_mode_create_scaling_mode_property(struct drm_device *dev);
 extern int drm_mode_create_dirty_info_property(struct drm_device *dev);
-extern const char *drm_get_encoder_name(const struct drm_encoder *encoder);
 
 extern int drm_mode_connector_attach_encoder(struct drm_connector *connector,
                                              struct drm_encoder *encoder);
@@ -975,6 +1018,7 @@ extern int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
                                          int gamma_size);
 extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
                 uint32_t id, uint32_t type);
+
 /* IOCTLs */
 extern int drm_mode_getresources(struct drm_device *dev,
                                  void *data, struct drm_file *file_priv);
@@ -1020,6 +1064,7 @@ extern int drm_mode_gamma_get_ioctl(struct drm_device *dev,
 extern int drm_mode_gamma_set_ioctl(struct drm_device *dev,
                                     void *data, struct drm_file *file_priv);
 extern u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
+extern enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code);
 extern bool drm_detect_hdmi_monitor(struct edid *edid);
 extern bool drm_detect_monitor_audio(struct edid *edid);
 extern bool drm_rgb_quant_range_selectable(struct edid *edid);
@@ -1057,6 +1102,15 @@ extern int drm_format_vert_chroma_subsampling(uint32_t format);
 extern const char *drm_get_format_name(uint32_t format);
 
 /* Helpers */
+
+static inline struct drm_plane *drm_plane_find(struct drm_device *dev,
+                uint32_t id)
+{
+        struct drm_mode_object *mo;
+        mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_PLANE);
+        return mo ? obj_to_plane(mo) : NULL;
+}
+
 static inline struct drm_crtc *drm_crtc_find(struct drm_device *dev,
         uint32_t id)
 {
@@ -1073,6 +1127,30 @@ static inline struct drm_encoder *drm_encoder_find(struct drm_device *dev,
         return mo ? obj_to_encoder(mo) : NULL;
 }
 
+static inline struct drm_connector *drm_connector_find(struct drm_device *dev,
+                uint32_t id)
+{
+        struct drm_mode_object *mo;
+        mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_CONNECTOR);
+        return mo ? obj_to_connector(mo) : NULL;
+}
+
+static inline struct drm_property *drm_property_find(struct drm_device *dev,
+                uint32_t id)
+{
+        struct drm_mode_object *mo;
+        mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_PROPERTY);
+        return mo ? obj_to_property(mo) : NULL;
+}
+
+static inline struct drm_property_blob *
+drm_property_blob_find(struct drm_device *dev, uint32_t id)
+{
+        struct drm_mode_object *mo;
+        mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_BLOB);
+        return mo ? obj_to_blob(mo) : NULL;
+}
+
 /* Plane list iterator for legacy (overlay only) planes. */
 #define drm_for_each_legacy_plane(plane, planelist) \
         list_for_each_entry(plane, planelist, head) \
diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h
index 36a5febac2a6..a3d75fefd010 100644
--- a/include/drm/drm_crtc_helper.h
+++ b/include/drm/drm_crtc_helper.h
@@ -114,7 +114,7 @@ struct drm_encoder_helper_funcs {
 /**
  * drm_connector_helper_funcs - helper operations for connectors
  * @get_modes: get mode list for this connector
- * @mode_valid: is this mode valid on the given connector?
+ * @mode_valid (optional): is this mode valid on the given connector?
  *
  * The helper operations are called by the mid-layer CRTC helper.
  */
@@ -165,6 +165,10 @@ extern void drm_helper_resume_force_mode(struct drm_device *dev);
 extern int drm_helper_probe_single_connector_modes(struct drm_connector
                                                    *connector, uint32_t maxX,
                                                    uint32_t maxY);
+extern int drm_helper_probe_single_connector_modes_nomerge(struct drm_connector
+                                                           *connector,
+                                                           uint32_t maxX,
+                                                           uint32_t maxY);
 extern void drm_kms_helper_poll_init(struct drm_device *dev);
 extern void drm_kms_helper_poll_fini(struct drm_device *dev);
 extern bool drm_helper_hpd_irq_event(struct drm_device *dev);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index cfcacec5b89d..a21568bf1514 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -37,6 +37,7 @@
  * eDP: Embedded DisplayPort version 1
  * DPI: DisplayPort Interoperability Guideline v1.1a
  * 1.2: DisplayPort 1.2
+ * MST: Multistream Transport - part of DP 1.2a
  *
  * 1.2 formally includes both eDP and DPI definitions.
  */
@@ -103,9 +104,14 @@
 #define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
 
 /* Multiple stream transport */
+#define DP_FAUX_CAP                         0x020   /* 1.2 */
+# define DP_FAUX_CAP_1                      (1 << 0)
+
 #define DP_MSTM_CAP                         0x021   /* 1.2 */
 # define DP_MST_CAP                         (1 << 0)
 
+#define DP_GUID                             0x030   /* 1.2 */
+
 #define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
 # define DP_PSR_IS_SUPPORTED                1
 #define DP_PSR_CAPS                         0x071   /* XXX 1.2? */
@@ -221,6 +227,16 @@
 # define DP_PSR_CRC_VERIFICATION            (1 << 2)
 # define DP_PSR_FRAME_CAPTURE               (1 << 3)
 
+#define DP_ADAPTER_CTRL                     0x1a0
+# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
+
+#define DP_BRANCH_DEVICE_CTRL               0x1a1
+# define DP_BRANCH_DEVICE_IRQ_HPD           (1 << 0)
+
+#define DP_PAYLOAD_ALLOCATE_SET             0x1c0
+#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
+#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
+
 #define DP_SINK_COUNT                       0x200
 /* prior to 1.2 bit 7 was reserved mbz */
 # define DP_GET_SINK_COUNT(x)               ((((x) & 0x80) >> 1) | ((x) & 0x3f))
@@ -230,6 +246,9 @@
 # define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
 # define DP_AUTOMATED_TEST_REQUEST          (1 << 1)
 # define DP_CP_IRQ                          (1 << 2)
+# define DP_MCCS_IRQ                        (1 << 3)
+# define DP_DOWN_REP_MSG_RDY                (1 << 4) /* 1.2 MST */
+# define DP_UP_REQ_MSG_RDY                  (1 << 5) /* 1.2 MST */
 # define DP_SINK_SPECIFIC_IRQ               (1 << 6)
 
 #define DP_LANE0_1_STATUS                   0x202
@@ -291,9 +310,18 @@
 # define DP_TEST_NAK                        (1 << 1)
 # define DP_TEST_EDID_CHECKSUM_WRITE        (1 << 2)
 
+#define DP_TEST_EDID_CHECKSUM               0x261
+
 #define DP_TEST_SINK                        0x270
 #define DP_TEST_SINK_START          (1 << 0)
 
+#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
+# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
+# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)
+
+#define DP_VC_PAYLOAD_ID_SLOT_1             0x2c1   /* 1.2 MST */
+/* up to ID_SLOT_63 at 0x2ff */
+
 #define DP_SOURCE_OUI                       0x300
 #define DP_SINK_OUI                         0x400
 #define DP_BRANCH_OUI                       0x500
@@ -303,6 +331,21 @@
 # define DP_SET_POWER_D3                    0x2
 # define DP_SET_POWER_MASK                  0x3
 
+#define DP_SIDEBAND_MSG_DOWN_REQ_BASE       0x1000   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REP_BASE         0x1200   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_DOWN_REP_BASE       0x1400   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REQ_BASE         0x1600   /* 1.2 MST */
+
+#define DP_SINK_COUNT_ESI                   0x2002   /* 1.2 */
+/* 0-5 sink count */
+# define DP_SINK_COUNT_CP_READY             (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0   0x2003   /* 1.2 */
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1   0x2004   /* 1.2 */
+
+#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0     0x2005   /* 1.2 */
+
 #define DP_PSR_ERROR_STATUS                 0x2006  /* XXX 1.2? */
 # define DP_PSR_LINK_CRC_ERROR              (1 << 0)
 # define DP_PSR_RFB_STORAGE_ERROR           (1 << 1)
@@ -319,6 +362,43 @@
 # define DP_PSR_SINK_INTERNAL_ERROR         7
 # define DP_PSR_SINK_STATE_MASK             0x07
 
+/* DP 1.2 Sideband message defines */
+/* peer device type - DP 1.2a Table 2-92 */
+#define DP_PEER_DEVICE_NONE             0x0
+#define DP_PEER_DEVICE_SOURCE_OR_SST    0x1
+#define DP_PEER_DEVICE_MST_BRANCHING    0x2
+#define DP_PEER_DEVICE_SST_SINK         0x3
+#define DP_PEER_DEVICE_DP_LEGACY_CONV   0x4
+
+/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
+#define DP_LINK_ADDRESS                 0x01
+#define DP_CONNECTION_STATUS_NOTIFY     0x02
+#define DP_ENUM_PATH_RESOURCES          0x10
+#define DP_ALLOCATE_PAYLOAD             0x11
+#define DP_QUERY_PAYLOAD                0x12
+#define DP_RESOURCE_STATUS_NOTIFY       0x13
+#define DP_CLEAR_PAYLOAD_ID_TABLE       0x14
+#define DP_REMOTE_DPCD_READ             0x20
+#define DP_REMOTE_DPCD_WRITE            0x21
+#define DP_REMOTE_I2C_READ              0x22
+#define DP_REMOTE_I2C_WRITE             0x23
+#define DP_POWER_UP_PHY                 0x24
+#define DP_POWER_DOWN_PHY               0x25
+#define DP_SINK_EVENT_NOTIFY            0x30
+#define DP_QUERY_STREAM_ENC_STATUS      0x38
+
+/* DP 1.2 MST sideband nak reasons - table 2.84 */
+#define DP_NAK_WRITE_FAILURE            0x01
+#define DP_NAK_INVALID_READ             0x02
+#define DP_NAK_CRC_FAILURE              0x03
+#define DP_NAK_BAD_PARAM                0x04
+#define DP_NAK_DEFER                    0x05
+#define DP_NAK_LINK_FAILURE             0x06
+#define DP_NAK_NO_RESOURCES             0x07
+#define DP_NAK_DPCD_FAIL                0x08
+#define DP_NAK_I2C_NAK                  0x09
+#define DP_NAK_ALLOCATE_FAIL            0x0a
+
 #define MODE_I2C_START  1
 #define MODE_I2C_WRITE  2
 #define MODE_I2C_READ   4
@@ -431,8 +511,10 @@ struct drm_dp_aux_msg {
 
 /**
  * struct drm_dp_aux - DisplayPort AUX channel
+ * @name: user-visible name of this AUX channel and the I2C-over-AUX adapter
  * @ddc: I2C adapter that can be used for I2C-over-AUX communication
  * @dev: pointer to struct device that is the parent for this AUX channel
+ * @hw_mutex: internal mutex used for locking transfers
  * @transfer: transfers a message representing a single AUX transaction
  *
  * The .dev field should be set to a pointer to the device that implements
@@ -465,7 +547,7 @@ struct drm_dp_aux {
         const char *name;
         struct i2c_adapter ddc;
         struct device *dev;
-
+        struct mutex hw_mutex;
         ssize_t (*transfer)(struct drm_dp_aux *aux,
                             struct drm_dp_aux_msg *msg);
 };
@@ -524,7 +606,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
 
-int drm_dp_aux_register_i2c_bus(struct drm_dp_aux *aux);
-void drm_dp_aux_unregister_i2c_bus(struct drm_dp_aux *aux);
+int drm_dp_aux_register(struct drm_dp_aux *aux);
+void drm_dp_aux_unregister(struct drm_dp_aux *aux);
 
 #endif /* _DRM_DP_HELPER_H_ */
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index a1441c5ac63d..b96031d947a0 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -202,6 +202,11 @@ struct detailed_timing {
 #define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
 #define DRM_EDID_FEATURE_PM_STANDBY       (1 << 7)
 
+#define DRM_EDID_HDMI_DC_48               (1 << 6)
+#define DRM_EDID_HDMI_DC_36               (1 << 5)
+#define DRM_EDID_HDMI_DC_30               (1 << 4)
+#define DRM_EDID_HDMI_DC_Y444             (1 << 3)
+
 struct edid {
         u8 header[8];
         /* Vendor & product info */
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index 6e622f7d481d..7997246d4039 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -108,7 +108,7 @@ int drm_fb_helper_set_par(struct fb_info *info);
 int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
                             struct fb_info *info);
 
-bool drm_fb_helper_restore_fbdev_mode(struct drm_fb_helper *fb_helper);
+bool drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper);
 void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helper,
                             uint32_t fb_width, uint32_t fb_height);
 void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch,
diff --git a/include/drm/drm_flip_work.h b/include/drm/drm_flip_work.h
index 35c776ae7d3b..9eed34dcd6af 100644
--- a/include/drm/drm_flip_work.h
+++ b/include/drm/drm_flip_work.h
@@ -57,6 +57,7 @@ typedef void (*drm_flip_func_t)(struct drm_flip_work *work, void *val);
  * @count: number of committed items
  * @func: callback fxn called for each committed item
  * @worker: worker which calls @func
+ * @fifo: queue of committed items
  */
 struct drm_flip_work {
         const char *name;
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 7209df15a3cd..944f33f8ba38 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -135,11 +135,13 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, unsigned int channel,
  * @driver: device driver model driver
  * @probe: callback for device binding
  * @remove: callback for device unbinding
+ * @shutdown: called at shutdown time to quiesce the device
  */
 struct mipi_dsi_driver {
         struct device_driver driver;
         int(*probe)(struct mipi_dsi_device *dsi);
         int(*remove)(struct mipi_dsi_device *dsi);
+        void (*shutdown)(struct mipi_dsi_device *dsi);
 };
 
 #define to_mipi_dsi_driver(d) container_of(d, struct mipi_dsi_driver, driver)
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index 2dbbf9976669..91d0582f924e 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -223,7 +223,7 @@ void drm_mode_validate_size(struct drm_device *dev,
 void drm_mode_prune_invalid(struct drm_device *dev,
                             struct list_head *mode_list, bool verbose);
 void drm_mode_sort(struct list_head *mode_list);
-void drm_mode_connector_list_update(struct drm_connector *connector);
+void drm_mode_connector_list_update(struct drm_connector *connector, bool merge_type_bits);
 
 /* parsing cmdline modes */
 bool
diff --git a/include/drm/drm_modeset_lock.h b/include/drm/drm_modeset_lock.h
new file mode 100644
index 000000000000..402aa7a6a058
--- /dev/null
+++ b/include/drm/drm_modeset_lock.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2014 Red Hat
+ * Author: Rob Clark <robdclark@gmail.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef DRM_MODESET_LOCK_H_
+#define DRM_MODESET_LOCK_H_
+
+#include <linux/ww_mutex.h>
+
+struct drm_modeset_lock;
+
+/**
+ * drm_modeset_acquire_ctx - locking context (see ww_acquire_ctx)
+ * @ww_ctx: base acquire ctx
+ * @contended: used internally for -EDEADLK handling
+ * @locked: list of held locks
+ *
+ * Each thread competing for a set of locks must use one acquire
+ * ctx.  And if any lock fxn returns -EDEADLK, it must backoff and
+ * retry.
+ */
+struct drm_modeset_acquire_ctx {
+
+        struct ww_acquire_ctx ww_ctx;
+
+        /**
+         * Contended lock: if a lock is contended you should only call
+         * drm_modeset_backoff() which drops locks and slow-locks the
+         * contended lock.
+         */
+        struct drm_modeset_lock *contended;
+
+        /**
+         * list of held locks (drm_modeset_lock)
+         */
+        struct list_head locked;
+};
+
+/**
+ * drm_modeset_lock - used for locking modeset resources.
+ * @mutex: resource locking
+ * @head: used to hold it's place on state->locked list when
+ *    part of an atomic update
+ *
+ * Used for locking CRTCs and other modeset resources.
+ */
+struct drm_modeset_lock {
+        /**
+         * modeset lock
+         */
+        struct ww_mutex mutex;
+
+        /**
+         * Resources that are locked as part of an atomic update are added
+         * to a list (so we know what to unlock at the end).
+         */
+        struct list_head head;
+};
+
+extern struct ww_class crtc_ww_class;
+
+void drm_modeset_acquire_init(struct drm_modeset_acquire_ctx *ctx,
+                uint32_t flags);
+void drm_modeset_acquire_fini(struct drm_modeset_acquire_ctx *ctx);
+void drm_modeset_drop_locks(struct drm_modeset_acquire_ctx *ctx);
+void drm_modeset_backoff(struct drm_modeset_acquire_ctx *ctx);
+int drm_modeset_backoff_interruptible(struct drm_modeset_acquire_ctx *ctx);
+
+/**
+ * drm_modeset_lock_init - initialize lock
+ * @lock: lock to init
+ */
+static inline void drm_modeset_lock_init(struct drm_modeset_lock *lock)
+{
+        ww_mutex_init(&lock->mutex, &crtc_ww_class);
+        INIT_LIST_HEAD(&lock->head);
+}
+
+/**
+ * drm_modeset_lock_fini - cleanup lock
+ * @lock: lock to cleanup
+ */
+static inline void drm_modeset_lock_fini(struct drm_modeset_lock *lock)
+{
+        WARN_ON(!list_empty(&lock->head));
+}
+
+/**
+ * drm_modeset_is_locked - equivalent to mutex_is_locked()
+ * @lock: lock to check
+ */
+static inline bool drm_modeset_is_locked(struct drm_modeset_lock *lock)
+{
+        return ww_mutex_is_locked(&lock->mutex);
+}
+
+int drm_modeset_lock(struct drm_modeset_lock *lock,
+                struct drm_modeset_acquire_ctx *ctx);
+int drm_modeset_lock_interruptible(struct drm_modeset_lock *lock,
+                struct drm_modeset_acquire_ctx *ctx);
+void drm_modeset_unlock(struct drm_modeset_lock *lock);
+
+struct drm_device;
+int drm_modeset_lock_all_crtcs(struct drm_device *dev,
+                struct drm_modeset_acquire_ctx *ctx);
+
+#endif /* DRM_MODESET_LOCK_H_ */
diff --git a/include/drm/drm_plane_helper.h b/include/drm/drm_plane_helper.h
index 09824becee3e..52e6870534b2 100644
--- a/include/drm/drm_plane_helper.h
+++ b/include/drm/drm_plane_helper.h
@@ -24,6 +24,17 @@
 #ifndef DRM_PLANE_HELPER_H
 #define DRM_PLANE_HELPER_H
 
+#include <drm/drm_rect.h>
+
+/*
+ * Drivers that don't allow primary plane scaling may pass this macro in place
+ * of the min/max scale parameters of the update checker function.
+ *
+ * Due to src being in 16.16 fixed point and dest being in integer pixels,
+ * 1<<16 represents no scaling.
+ */
+#define DRM_PLANE_HELPER_NO_SCALING (1<<16)
+
 /**
  * DOC: plane helpers
  *
@@ -31,6 +42,17 @@
  * planes.
  */
 
+extern int drm_plane_helper_check_update(struct drm_plane *plane,
+                                         struct drm_crtc *crtc,
+                                         struct drm_framebuffer *fb,
+                                         struct drm_rect *src,
+                                         struct drm_rect *dest,
+                                         const struct drm_rect *clip,
+                                         int min_scale,
+                                         int max_scale,
+                                         bool can_position,
+                                         bool can_update_disabled,
+                                         bool *visible);
 extern int drm_primary_helper_update(struct drm_plane *plane,
                                      struct drm_crtc *crtc,
                                      struct drm_framebuffer *fb,
@@ -42,7 +64,7 @@ extern int drm_primary_helper_disable(struct drm_plane *plane);
 extern void drm_primary_helper_destroy(struct drm_plane *plane);
 extern const struct drm_plane_funcs drm_primary_helper_funcs;
 extern struct drm_plane *drm_primary_helper_create_plane(struct drm_device *dev,
-                                                         uint32_t *formats,
+                                                         const uint32_t *formats,
                                                          int num_formats);
 
 
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 012d58fa8ff0..0572035673f3 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -223,14 +223,32 @@
         _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
         _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
 
-#define INTEL_BDW_M_IDS(info) \
+#define INTEL_BDW_GT12M_IDS(info) \
         _INTEL_BDW_M_IDS(1, info), \
-        _INTEL_BDW_M_IDS(2, info), \
-        _INTEL_BDW_M_IDS(3, info)
+        _INTEL_BDW_M_IDS(2, info)
 
-#define INTEL_BDW_D_IDS(info) \
+#define INTEL_BDW_GT12D_IDS(info) \
         _INTEL_BDW_D_IDS(1, info), \
-        _INTEL_BDW_D_IDS(2, info), \
+        _INTEL_BDW_D_IDS(2, info)
+
+#define INTEL_BDW_GT3M_IDS(info) \
+        _INTEL_BDW_M_IDS(3, info)
+
+#define INTEL_BDW_GT3D_IDS(info) \
         _INTEL_BDW_D_IDS(3, info)
 
+#define INTEL_BDW_M_IDS(info) \
+        INTEL_BDW_GT12M_IDS(info), \
+        INTEL_BDW_GT3M_IDS(info)
+
+#define INTEL_BDW_D_IDS(info) \
+        INTEL_BDW_GT12D_IDS(info), \
+        INTEL_BDW_GT3D_IDS(info)
+
+#define INTEL_CHV_IDS(info) \
+        INTEL_VGA_DEVICE(0x22b0, info), \
+        INTEL_VGA_DEVICE(0x22b1, info), \
+        INTEL_VGA_DEVICE(0x22b2, info), \
+        INTEL_VGA_DEVICE(0x22b3, info)
+
 #endif /* _I915_PCIIDS_H */
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index ee127ec33c60..7526c5bf5610 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -485,13 +485,12 @@ extern int ttm_bo_init(struct ttm_bo_device *bdev,
                         void (*destroy) (struct ttm_buffer_object *));
 
 /**
- * ttm_bo_synccpu_object_init
+ * ttm_bo_create
  *
  * @bdev: Pointer to a ttm_bo_device struct.
- * @bo: Pointer to a ttm_buffer_object to be initialized.
  * @size: Requested size of buffer object.
  * @type: Requested type of buffer object.
- * @flags: Initial placement flags.
+ * @placement: Initial placement.
  * @page_alignment: Data alignment in pages.
  * @interruptible: If needing to sleep while waiting for GPU resources,
  * sleep interruptible.
diff --git a/include/dt-bindings/clock/bcm21664.h b/include/dt-bindings/clock/bcm21664.h
new file mode 100644
index 000000000000..5a7f0e4750a8
--- /dev/null
+++ b/include/dt-bindings/clock/bcm21664.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ * Copyright 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CLOCK_BCM21664_H
+#define _CLOCK_BCM21664_H
+
+/*
+ * This file defines the values used to specify clocks provided by
+ * the clock control units (CCUs) on Broadcom BCM21664 family SoCs.
+ */
+
+/* bcm21664 CCU device tree "compatible" strings */
+#define BCM21664_DT_ROOT_CCU_COMPAT     "brcm,bcm21664-root-ccu"
+#define BCM21664_DT_AON_CCU_COMPAT      "brcm,bcm21664-aon-ccu"
+#define BCM21664_DT_MASTER_CCU_COMPAT   "brcm,bcm21664-master-ccu"
+#define BCM21664_DT_SLAVE_CCU_COMPAT    "brcm,bcm21664-slave-ccu"
+
+/* root CCU clock ids */
+
+#define BCM21664_ROOT_CCU_FRAC_1M               0
+#define BCM21664_ROOT_CCU_CLOCK_COUNT           1
+
+/* aon CCU clock ids */
+
+#define BCM21664_AON_CCU_HUB_TIMER              0
+#define BCM21664_AON_CCU_CLOCK_COUNT            1
+
+/* master CCU clock ids */
+
+#define BCM21664_MASTER_CCU_SDIO1               0
+#define BCM21664_MASTER_CCU_SDIO2               1
+#define BCM21664_MASTER_CCU_SDIO3               2
+#define BCM21664_MASTER_CCU_SDIO4               3
+#define BCM21664_MASTER_CCU_SDIO1_SLEEP         4
+#define BCM21664_MASTER_CCU_SDIO2_SLEEP         5
+#define BCM21664_MASTER_CCU_SDIO3_SLEEP         6
+#define BCM21664_MASTER_CCU_SDIO4_SLEEP         7
+#define BCM21664_MASTER_CCU_CLOCK_COUNT         8
+
+/* slave CCU clock ids */
+
+#define BCM21664_SLAVE_CCU_UARTB                0
+#define BCM21664_SLAVE_CCU_UARTB2               1
+#define BCM21664_SLAVE_CCU_UARTB3               2
+#define BCM21664_SLAVE_CCU_BSC1                 3
+#define BCM21664_SLAVE_CCU_BSC2                 4
+#define BCM21664_SLAVE_CCU_BSC3                 5
+#define BCM21664_SLAVE_CCU_BSC4                 6
+#define BCM21664_SLAVE_CCU_CLOCK_COUNT          7
+
+#endif /* _CLOCK_BCM21664_H */
diff --git a/include/dt-bindings/clock/bcm281xx.h b/include/dt-bindings/clock/bcm281xx.h
index e0096940886d..a763460cf1af 100644
--- a/include/dt-bindings/clock/bcm281xx.h
+++ b/include/dt-bindings/clock/bcm281xx.h
@@ -20,6 +20,18 @@
  * the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
  */
 
+/*
+ * These are the bcm281xx CCU device tree "compatible" strings.
+ * We're stuck with using "bcm11351" in the string because wild
+ * cards aren't allowed, and that name was the first one defined
+ * in this family of devices.
+ */
+#define BCM281XX_DT_ROOT_CCU_COMPAT     "brcm,bcm11351-root-ccu"
+#define BCM281XX_DT_AON_CCU_COMPAT      "brcm,bcm11351-aon-ccu"
+#define BCM281XX_DT_HUB_CCU_COMPAT      "brcm,bcm11351-hub-ccu"
+#define BCM281XX_DT_MASTER_CCU_COMPAT   "brcm,bcm11351-master-ccu"
+#define BCM281XX_DT_SLAVE_CCU_COMPAT    "brcm,bcm11351-slave-ccu"
+
 /* root CCU clock ids */
 
 #define BCM281XX_ROOT_CCU_FRAC_1M               0
diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h
new file mode 100644
index 000000000000..aad579a75802
--- /dev/null
+++ b/include/dt-bindings/clock/hix5hd2-clock.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2014 Linaro Ltd.
+ * Copyright (c) 2014 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef __DTS_HIX5HD2_CLOCK_H
+#define __DTS_HIX5HD2_CLOCK_H
+
+/* fixed rate */
+#define HIX5HD2_FIXED_1200M             1
+#define HIX5HD2_FIXED_400M              2
+#define HIX5HD2_FIXED_48M               3
+#define HIX5HD2_FIXED_24M               4
+#define HIX5HD2_FIXED_600M              5
+#define HIX5HD2_FIXED_300M              6
+#define HIX5HD2_FIXED_75M               7
+#define HIX5HD2_FIXED_200M              8
+#define HIX5HD2_FIXED_100M              9
+#define HIX5HD2_FIXED_40M               10
+#define HIX5HD2_FIXED_150M              11
+#define HIX5HD2_FIXED_1728M             12
+#define HIX5HD2_FIXED_28P8M             13
+#define HIX5HD2_FIXED_432M              14
+#define HIX5HD2_FIXED_345P6M            15
+#define HIX5HD2_FIXED_288M              16
+#define HIX5HD2_FIXED_60M               17
+#define HIX5HD2_FIXED_750M              18
+#define HIX5HD2_FIXED_500M              19
+#define HIX5HD2_FIXED_54M               20
+#define HIX5HD2_FIXED_27M               21
+#define HIX5HD2_FIXED_1500M             22
+#define HIX5HD2_FIXED_375M              23
+#define HIX5HD2_FIXED_187M              24
+#define HIX5HD2_FIXED_250M              25
+#define HIX5HD2_FIXED_125M              26
+#define HIX5HD2_FIXED_2P02M             27
+#define HIX5HD2_FIXED_50M               28
+#define HIX5HD2_FIXED_25M               29
+#define HIX5HD2_FIXED_83M               30
+
+/* mux clocks */
+#define HIX5HD2_SFC_MUX                 64
+#define HIX5HD2_MMC_MUX                 65
+#define HIX5HD2_FEPHY_MUX               66
+
+/* gate clocks */
+#define HIX5HD2_SFC_RST                 128
+#define HIX5HD2_SFC_CLK                 129
+#define HIX5HD2_MMC_CIU_CLK             130
+#define HIX5HD2_MMC_BIU_CLK             131
+#define HIX5HD2_MMC_CIU_RST             132
+
+#define HIX5HD2_NR_CLKS                 256
+#endif  /* __DTS_HIX5HD2_CLOCK_H */
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h b/include/dt-bindings/clock/qcom,gcc-msm8960.h
index 03bbf49d43b7..f9f547146a15 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
@@ -51,7 +51,7 @@
 #define QDSS_TSCTR_CLK                          34
 #define SFAB_ADM0_M0_A_CLK                      35
 #define SFAB_ADM0_M1_A_CLK                      36
-#define SFAB_ADM0_M2_A_CLK                      37
+#define SFAB_ADM0_M2_H_CLK                      37
 #define ADM0_CLK                                38
 #define ADM0_PBUS_CLK                           39
 #define MSS_XPU_CLK                             40
@@ -99,7 +99,7 @@
 #define CFPB2_H_CLK                             82
 #define SFAB_CFPB_M_H_CLK                       83
 #define CFPB_MASTER_H_CLK                       84
-#define SFAB_CFPB_S_HCLK                        85
+#define SFAB_CFPB_S_H_CLK                       85
 #define CFPB_SPLITTER_H_CLK                     86
 #define TSIF_H_CLK                              87
 #define TSIF_INACTIVITY_TIMERS_CLK              88
@@ -110,7 +110,6 @@
 #define CE1_SLEEP_CLK                           93
 #define CE2_H_CLK                               94
 #define CE2_CORE_CLK                            95
-#define CE2_SLEEP_CLK                           96
 #define SFPB_H_CLK_SRC                          97
 #define SFPB_H_CLK                              98
 #define SFAB_SFPB_M_H_CLK                       99
@@ -252,7 +251,7 @@
 #define MSS_S_H_CLK                             235
 #define MSS_CXO_SRC_CLK                         236
 #define SATA_H_CLK                              237
-#define SATA_SRC_CLK                            238
+#define SATA_CLK_SRC                            238
 #define SATA_RXOOB_CLK                          239
 #define SATA_PMALIVE_CLK                        240
 #define SATA_PHY_REF_CLK                        241
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8974.h b/include/dt-bindings/clock/qcom,gcc-msm8974.h
index 223ca174d9d3..51e51c860fe6 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8974.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8974.h
@@ -316,5 +316,9 @@
 #define GCC_CE2_CLK_SLEEP_ENA                                   299
 #define GCC_CE2_AXI_CLK_SLEEP_ENA                               300
 #define GCC_CE2_AHB_CLK_SLEEP_ENA                               301
+#define GPLL4                                                   302
+#define GPLL4_VOTE                                              303
+#define GCC_SDCC1_CDCCAL_SLEEP_CLK                              304
+#define GCC_SDCC1_CDCCAL_FF_CLK                                 305
 
 #endif
diff --git a/include/dt-bindings/clock/r8a7779-clock.h b/include/dt-bindings/clock/r8a7779-clock.h
new file mode 100644
index 000000000000..381a6114237a
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7779-clock.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2013  Horms Solutions Ltd.
+ *
+ * Contact: Simon Horman <horms@verge.net.au>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__
+#define __DT_BINDINGS_CLOCK_R8A7779_H__
+
+/* CPG */
+#define R8A7779_CLK_PLLA        0
+#define R8A7779_CLK_Z           1
+#define R8A7779_CLK_ZS          2
+#define R8A7779_CLK_S           3
+#define R8A7779_CLK_S1          4
+#define R8A7779_CLK_P           5
+#define R8A7779_CLK_B           6
+#define R8A7779_CLK_OUT         7
+
+/* MSTP 0 */
+#define R8A7779_CLK_HSPI        7
+#define R8A7779_CLK_TMU2        14
+#define R8A7779_CLK_TMU1        15
+#define R8A7779_CLK_TMU0        16
+#define R8A7779_CLK_HSCIF1      18
+#define R8A7779_CLK_HSCIF0      19
+#define R8A7779_CLK_SCIF5       21
+#define R8A7779_CLK_SCIF4       22
+#define R8A7779_CLK_SCIF3       23
+#define R8A7779_CLK_SCIF2       24
+#define R8A7779_CLK_SCIF1       25
+#define R8A7779_CLK_SCIF0       26
+#define R8A7779_CLK_I2C3        27
+#define R8A7779_CLK_I2C2        28
+#define R8A7779_CLK_I2C1        29
+#define R8A7779_CLK_I2C0        30
+
+/* MSTP 1 */
+#define R8A7779_CLK_USB01       0
+#define R8A7779_CLK_USB2        1
+#define R8A7779_CLK_DU          3
+#define R8A7779_CLK_VIN2        8
+#define R8A7779_CLK_VIN1        9
+#define R8A7779_CLK_VIN0        10
+#define R8A7779_CLK_ETHER       14
+#define R8A7779_CLK_SATA        15
+#define R8A7779_CLK_PCIE        16
+#define R8A7779_CLK_VIN3        20
+
+/* MSTP 3 */
+#define R8A7779_CLK_SDHI3       20
+#define R8A7779_CLK_SDHI2       21
+#define R8A7779_CLK_SDHI1       22
+#define R8A7779_CLK_SDHI0       23
+#define R8A7779_CLK_MMC1        30
+#define R8A7779_CLK_MMC0        31
+
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h
index 6d0d8d8ef31e..fc12621fb432 100644
--- a/include/dt-bindings/clock/tegra114-car.h
+++ b/include/dt-bindings/clock/tegra114-car.h
@@ -337,6 +337,7 @@
 #define TEGRA114_CLK_CLK_OUT_3_MUX 308
 #define TEGRA114_CLK_DSIA_MUX 309
 #define TEGRA114_CLK_DSIB_MUX 310
-#define TEGRA114_CLK_CLK_MAX 311
+#define TEGRA114_CLK_XUSB_SS_DIV2 311
+#define TEGRA114_CLK_CLK_MAX 312
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 433528ab5161..8a4c5892890f 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -336,6 +336,7 @@
 #define TEGRA124_CLK_DSIA_MUX 309
 #define TEGRA124_CLK_DSIB_MUX 310
 #define TEGRA124_CLK_SOR0_LVDS 311
-#define TEGRA124_CLK_CLK_MAX 312
+#define TEGRA124_CLK_XUSB_SS_DIV2 312
+#define TEGRA124_CLK_CLK_MAX 313
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
diff --git a/include/dt-bindings/reset/qcom,gcc-msm8960.h b/include/dt-bindings/reset/qcom,gcc-msm8960.h
index a840e680323c..07edd0e65eed 100644
--- a/include/dt-bindings/reset/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/reset/qcom,gcc-msm8960.h
@@ -58,7 +58,7 @@
 #define PPSS_PROC_RESET                                 41
 #define PPSS_RESET                                      42
 #define DMA_BAM_RESET                                   43
-#define SIC_TIC_RESET                                   44
+#define SPS_TIC_H_RESET                                 44
 #define SLIMBUS_H_RESET                                 45
 #define SFAB_CFPB_M_RESET                               46
 #define SFAB_CFPB_S_RESET                               47
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 1f16d502600c..6dfd51a04d77 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -44,6 +44,7 @@ struct ahci_host_priv *ahci_platform_get_resources(
 int ahci_platform_init_host(struct platform_device *pdev,
                             struct ahci_host_priv *hpriv,
                             const struct ata_port_info *pi_template,
+                            unsigned long host_flags,
                             unsigned int force_port_map,
                             unsigned int mask_port_map);
 
diff --git a/include/linux/amba/xilinx_dma.h b/include/linux/amba/xilinx_dma.h
new file mode 100644
index 000000000000..34b98f276ed0
--- /dev/null
+++ b/include/linux/amba/xilinx_dma.h
@@ -0,0 +1,47 @@
+/*
+ * Xilinx DMA Engine drivers support header file
+ *
+ * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DMA_XILINX_DMA_H
+#define __DMA_XILINX_DMA_H
+
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+
+/**
+ * struct xilinx_vdma_config - VDMA Configuration structure
+ * @frm_dly: Frame delay
+ * @gen_lock: Whether in gen-lock mode
+ * @master: Master that it syncs to
+ * @frm_cnt_en: Enable frame count enable
+ * @park: Whether wants to park
+ * @park_frm: Frame to park on
+ * @coalesc: Interrupt coalescing threshold
+ * @delay: Delay counter
+ * @reset: Reset Channel
+ * @ext_fsync: External Frame Sync source
+ */
+struct xilinx_vdma_config {
+        int frm_dly;
+        int gen_lock;
+        int master;
+        int frm_cnt_en;
+        int park;
+        int park_frm;
+        int coalesc;
+        int delay;
+        int reset;
+        int ext_fsync;
+};
+
+int xilinx_vdma_channel_set_config(struct dma_chan *dchan,
+                                        struct xilinx_vdma_config *cfg);
+
+#endif
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index c15128833100..a002cf191427 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -135,7 +135,7 @@ enum {
         BLK_MQ_S_STOPPED        = 0,
         BLK_MQ_S_TAG_ACTIVE     = 1,
 
-        BLK_MQ_MAX_DEPTH        = 2048,
+        BLK_MQ_MAX_DEPTH        = 10240,
 
         BLK_MQ_CPU_WORK_BATCH   = 8,
 };
@@ -155,7 +155,7 @@ void blk_mq_free_request(struct request *rq);
 bool blk_mq_can_queue(struct blk_mq_hw_ctx *);
 struct request *blk_mq_alloc_request(struct request_queue *q, int rw,
                 gfp_t gfp, bool reserved);
-struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx, unsigned int tag);
+struct request *blk_mq_tag_to_rq(struct blk_mq_tags *tags, unsigned int tag);
 
 struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index);
 struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int);
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index d8e4cea23a25..66c2167f04a9 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -5,8 +5,6 @@
 #ifndef __LINUX_BLK_TYPES_H
 #define __LINUX_BLK_TYPES_H
 
-#ifdef CONFIG_BLOCK
-
 #include <linux/types.h>
 
 struct bio_set;
@@ -28,6 +26,8 @@ struct bio_vec {
         unsigned int    bv_offset;
 };
 
+#ifdef CONFIG_BLOCK
+
 struct bvec_iter {
         sector_t                bi_sector;      /* device address in 512 byte
                                                    sectors */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 8aba35f46f87..31e11051f1ba 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -280,6 +280,7 @@ struct queue_limits {
         unsigned long           seg_boundary_mask;
 
         unsigned int            max_hw_sectors;
+        unsigned int            chunk_sectors;
         unsigned int            max_sectors;
         unsigned int            max_segment_size;
         unsigned int            physical_block_size;
@@ -335,7 +336,7 @@ struct request_queue {
         unsigned int            *mq_map;
 
         /* sw queues */
-        struct blk_mq_ctx       *queue_ctx;
+        struct blk_mq_ctx __percpu      *queue_ctx;
         unsigned int            nr_queues;
 
         /* hw dispatch queues */
@@ -795,6 +796,7 @@ extern void __blk_put_request(struct request_queue *, struct request *);
 extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
 extern struct request *blk_make_request(struct request_queue *, struct bio *,
                                         gfp_t);
+extern void blk_rq_set_block_pc(struct request *);
 extern void blk_requeue_request(struct request_queue *, struct request *);
 extern void blk_add_request_payload(struct request *rq, struct page *page,
                 unsigned int len);
@@ -910,6 +912,20 @@ static inline unsigned int blk_queue_get_max_sectors(struct request_queue *q,
         return q->limits.max_sectors;
 }
 
+/*
+ * Return maximum size of a request at given offset. Only valid for
+ * file system requests.
+ */
+static inline unsigned int blk_max_size_offset(struct request_queue *q,
+                                               sector_t offset)
+{
+        if (!q->limits.chunk_sectors)
+                return q->limits.max_hw_sectors;
+
+        return q->limits.chunk_sectors -
+                        (offset & (q->limits.chunk_sectors - 1));
+}
+
 static inline unsigned int blk_rq_get_max_sectors(struct request *rq)
 {
         struct request_queue *q = rq->q;
@@ -917,7 +933,11 @@ static inline unsigned int blk_rq_get_max_sectors(struct request *rq)
         if (unlikely(rq->cmd_type == REQ_TYPE_BLOCK_PC))
                 return q->limits.max_hw_sectors;
 
-        return blk_queue_get_max_sectors(q, rq->cmd_flags);
+        if (!q->limits.chunk_sectors)
+                return blk_queue_get_max_sectors(q, rq->cmd_flags);
+
+        return min(blk_max_size_offset(q, blk_rq_pos(rq)),
+                        blk_queue_get_max_sectors(q, rq->cmd_flags));
 }
 
 static inline unsigned int blk_rq_count_bios(struct request *rq)
@@ -983,6 +1003,7 @@ extern void blk_queue_make_request(struct request_queue *, make_request_fn *);
 extern void blk_queue_bounce_limit(struct request_queue *, u64);
 extern void blk_limits_max_hw_sectors(struct queue_limits *, unsigned int);
 extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int);
+extern void blk_queue_chunk_sectors(struct request_queue *, unsigned int);
 extern void blk_queue_max_segments(struct request_queue *, unsigned short);
 extern void blk_queue_max_segment_size(struct request_queue *, unsigned int);
 extern void blk_queue_max_discard_sectors(struct request_queue *q,
@@ -1588,6 +1609,7 @@ static inline bool blk_integrity_is_initialized(struct gendisk *g)
 struct block_device_operations {
         int (*open) (struct block_device *, fmode_t);
         void (*release) (struct gendisk *, fmode_t);
+        int (*rw_page)(struct block_device *, sector_t, struct page *, int rw);
         int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
         int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
         int (*direct_access) (struct block_device *, sector_t,
@@ -1606,7 +1628,13 @@ struct block_device_operations {
 
 extern int __blkdev_driver_ioctl(struct block_device *, fmode_t, unsigned int,
                                  unsigned long);
+extern int bdev_read_page(struct block_device *, sector_t, struct page *);
+extern int bdev_write_page(struct block_device *, sector_t, struct page *,
+                                                struct writeback_control *);
 #else /* CONFIG_BLOCK */
+
+struct block_device;
+
 /*
  * stubs for when the block layer is configured out
  */
@@ -1642,6 +1670,12 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
         return false;
 }
 
+static inline int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
+                                     sector_t *error_sector)
+{
+        return 0;
+}
+
 #endif /* CONFIG_BLOCK */
 
 #endif
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index db51fe4fe317..4e2bd4c95b66 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -58,9 +58,9 @@ extern void free_bootmem_late(unsigned long physaddr, unsigned long size);
  * Flags for reserve_bootmem (also if CONFIG_HAVE_ARCH_BOOTMEM_NODE,
  * the architecture-specific code should honor this).
  *
- * If flags is 0, then the return value is always 0 (success). If
- * flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the
- * memory already was reserved.
+ * If flags is BOOTMEM_DEFAULT, then the return value is always 0 (success).
+ * If flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the memory
+ * already was reserved.
  */
 #define BOOTMEM_DEFAULT         0
 #define BOOTMEM_EXCLUSIVE       (1<<0)
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index 7cbf837a279c..324329ceea1e 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -207,8 +207,6 @@ void block_invalidatepage(struct page *page, unsigned int offset,
                           unsigned int length);
 int block_write_full_page(struct page *page, get_block_t *get_block,
                                 struct writeback_control *wbc);
-int block_write_full_page_endio(struct page *page, get_block_t *get_block,
-                        struct writeback_control *wbc, bh_end_io_t *handler);
 int block_read_full_page(struct page*, get_block_t*);
 int block_is_partially_uptodate(struct page *page, unsigned long from,
                                 unsigned long count);
diff --git a/include/linux/capability.h b/include/linux/capability.h
index a6ee1f9a5018..84b13ad67c1c 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -210,7 +210,7 @@ extern bool has_ns_capability_noaudit(struct task_struct *t,
                                       struct user_namespace *ns, int cap);
 extern bool capable(int cap);
 extern bool ns_capable(struct user_namespace *ns, int cap);
-extern bool inode_capable(const struct inode *inode, int cap);
+extern bool capable_wrt_inode_uidgid(const struct inode *inode, int cap);
 extern bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap);
 
 /* audit system wants to get cap info from files as well */
diff --git a/include/linux/ceph/libceph.h b/include/linux/ceph/libceph.h
index 2f49aa4c4f7f..279b0afac1c1 100644
--- a/include/linux/ceph/libceph.h
+++ b/include/linux/ceph/libceph.h
@@ -222,8 +222,6 @@ extern void ceph_copy_to_page_vector(struct page **pages,
 extern void ceph_copy_from_page_vector(struct page **pages,
                                     void *data,
                                     loff_t off, size_t len);
-extern int ceph_copy_page_vector_to_user(struct page **pages, void __user *data,
-                                    loff_t off, size_t len);
 extern void ceph_zero_page_vector_range(int off, int len, struct page **pages);
 
 
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index d60904b9e505..8a111dd42d7a 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -21,6 +21,7 @@
 #include <linux/percpu-refcount.h>
 #include <linux/seq_file.h>
 #include <linux/kernfs.h>
+#include <linux/wait.h>
 
 #ifdef CONFIG_CGROUPS
 
@@ -47,21 +48,45 @@ enum cgroup_subsys_id {
 };
 #undef SUBSYS
 
-/* Per-subsystem/per-cgroup state maintained by the system. */
+/*
+ * Per-subsystem/per-cgroup state maintained by the system.  This is the
+ * fundamental structural building block that controllers deal with.
+ *
+ * Fields marked with "PI:" are public and immutable and may be accessed
+ * directly without synchronization.
+ */
 struct cgroup_subsys_state {
-        /* the cgroup that this css is attached to */
+        /* PI: the cgroup that this css is attached to */
         struct cgroup *cgroup;
 
-        /* the cgroup subsystem that this css is attached to */
+        /* PI: the cgroup subsystem that this css is attached to */
         struct cgroup_subsys *ss;
 
         /* reference count - access via css_[try]get() and css_put() */
         struct percpu_ref refcnt;
 
-        /* the parent css */
+        /* PI: the parent css */
         struct cgroup_subsys_state *parent;
 
-        unsigned long flags;
+        /* siblings list anchored at the parent's ->children */
+        struct list_head sibling;
+        struct list_head children;
+
+        /*
+         * PI: Subsys-unique ID.  0 is unused and root is always 1.  The
+         * matching css can be looked up using css_from_id().
+         */
+        int id;
+
+        unsigned int flags;
+
+        /*
+         * Monotonically increasing unique serial number which defines a
+         * uniform order among all csses.  It's guaranteed that all
+         * ->children lists are in the ascending order of ->serial_nr and
+         * used to allow interrupting and resuming iterations.
+         */
+        u64 serial_nr;
 
         /* percpu_ref killing and RCU release */
         struct rcu_head rcu_head;
@@ -70,8 +95,9 @@ struct cgroup_subsys_state {
 
 /* bits in struct cgroup_subsys_state flags field */
 enum {
-        CSS_ROOT        = (1 << 0), /* this CSS is the root of the subsystem */
+        CSS_NO_REF      = (1 << 0), /* no reference counting for this css */
         CSS_ONLINE      = (1 << 1), /* between ->css_online() and ->css_offline() */
+        CSS_RELEASED    = (1 << 2), /* refcnt reached zero, released */
 };
 
 /**
@@ -82,8 +108,7 @@ enum {
  */
 static inline void css_get(struct cgroup_subsys_state *css)
 {
-        /* We don't need to reference count the root state */
-        if (!(css->flags & CSS_ROOT))
+        if (!(css->flags & CSS_NO_REF))
                 percpu_ref_get(&css->refcnt);
 }
 
@@ -91,35 +116,51 @@ static inline void css_get(struct cgroup_subsys_state *css)
  * css_tryget - try to obtain a reference on the specified css
  * @css: target css
  *
- * Obtain a reference on @css if it's alive.  The caller naturally needs to
- * ensure that @css is accessible but doesn't have to be holding a
+ * Obtain a reference on @css unless it already has reached zero and is
+ * being released.  This function doesn't care whether @css is on or
+ * offline.  The caller naturally needs to ensure that @css is accessible
+ * but doesn't have to be holding a reference on it - IOW, RCU protected
+ * access is good enough for this function.  Returns %true if a reference
+ * count was successfully obtained; %false otherwise.
+ */
+static inline bool css_tryget(struct cgroup_subsys_state *css)
+{
+        if (!(css->flags & CSS_NO_REF))
+                return percpu_ref_tryget(&css->refcnt);
+        return true;
+}
+
+/**
+ * css_tryget_online - try to obtain a reference on the specified css if online
+ * @css: target css
+ *
+ * Obtain a reference on @css if it's online.  The caller naturally needs
+ * to ensure that @css is accessible but doesn't have to be holding a
  * reference on it - IOW, RCU protected access is good enough for this
  * function.  Returns %true if a reference count was successfully obtained;
  * %false otherwise.
  */
-static inline bool css_tryget(struct cgroup_subsys_state *css)
+static inline bool css_tryget_online(struct cgroup_subsys_state *css)
 {
-        if (css->flags & CSS_ROOT)
-                return true;
-        return percpu_ref_tryget(&css->refcnt);
+        if (!(css->flags & CSS_NO_REF))
+                return percpu_ref_tryget_live(&css->refcnt);
+        return true;
 }
 
 /**
  * css_put - put a css reference
  * @css: target css
  *
- * Put a reference obtained via css_get() and css_tryget().
+ * Put a reference obtained via css_get() and css_tryget_online().
  */
 static inline void css_put(struct cgroup_subsys_state *css)
 {
-        if (!(css->flags & CSS_ROOT))
+        if (!(css->flags & CSS_NO_REF))
                 percpu_ref_put(&css->refcnt);
 }
 
 /* bits in struct cgroup flags field */
 enum {
-        /* Control Group is dead */
-        CGRP_DEAD,
         /*
          * Control Group has previously had a child cgroup or a task,
          * but no longer (only if CGRP_NOTIFY_ON_RELEASE is set)
@@ -133,48 +174,37 @@ enum {
          * specified at mount time and thus is implemented here.
          */
         CGRP_CPUSET_CLONE_CHILDREN,
-        /* see the comment above CGRP_ROOT_SANE_BEHAVIOR for details */
-        CGRP_SANE_BEHAVIOR,
 };
 
 struct cgroup {
+        /* self css with NULL ->ss, points back to this cgroup */
+        struct cgroup_subsys_state self;
+
         unsigned long flags;            /* "unsigned long" so bitops work */
 
         /*
          * idr allocated in-hierarchy ID.
          *
-         * The ID of the root cgroup is always 0, and a new cgroup
-         * will be assigned with a smallest available ID.
+         * ID 0 is not used, the ID of the root cgroup is always 1, and a
+         * new cgroup will be assigned with a smallest available ID.
          *
          * Allocating/Removing ID must be protected by cgroup_mutex.
          */
         int id;
 
-        /* the number of attached css's */
-        int nr_css;
-
-        atomic_t refcnt;
-
         /*
-         * We link our 'sibling' struct into our parent's 'children'.
-         * Our children link their 'sibling' into our 'children'.
+         * If this cgroup contains any tasks, it contributes one to
+         * populated_cnt.  All children with non-zero popuplated_cnt of
+         * their own contribute one.  The count is zero iff there's no task
+         * in this cgroup or its subtree.
          */
-        struct list_head sibling;       /* my parent's children */
-        struct list_head children;      /* my children */
+        int populated_cnt;
 
-        struct cgroup *parent;          /* my parent */
         struct kernfs_node *kn;         /* cgroup kernfs entry */
+        struct kernfs_node *populated_kn; /* kn for "cgroup.subtree_populated" */
 
-        /*
-         * Monotonically increasing unique serial number which defines a
-         * uniform order among all cgroups.  It's guaranteed that all
-         * ->children lists are in the ascending order of ->serial_nr.
-         * It's used to allow interrupting and resuming iterations.
-         */
-        u64 serial_nr;
-
-        /* The bitmask of subsystems attached to this cgroup */
-        unsigned long subsys_mask;
+        /* the bitmask of subsystems enabled on the child cgroups */
+        unsigned int child_subsys_mask;
 
         /* Private pointers for each registered subsystem */
         struct cgroup_subsys_state __rcu *subsys[CGROUP_SUBSYS_COUNT];
@@ -188,6 +218,15 @@ struct cgroup {
         struct list_head cset_links;
 
         /*
+         * On the default hierarchy, a css_set for a cgroup with some
+         * susbsys disabled will point to css's which are associated with
+         * the closest ancestor which has the subsys enabled.  The
+         * following lists all css_sets which point to this cgroup's css
+         * for the given subsystem.
+         */
+        struct list_head e_csets[CGROUP_SUBSYS_COUNT];
+
+        /*
          * Linked list running through all cgroups that can
          * potentially be reaped by the release agent. Protected by
          * release_list_lock
@@ -201,12 +240,8 @@ struct cgroup {
         struct list_head pidlists;
         struct mutex pidlist_mutex;
 
-        /* dummy css with NULL ->ss, points back to this cgroup */
-        struct cgroup_subsys_state dummy_css;
-
-        /* For css percpu_ref killing and RCU-protected deletion */
-        struct rcu_head rcu_head;
-        struct work_struct destroy_work;
+        /* used to wait for offlining of csses */
+        wait_queue_head_t offline_waitq;
 };
 
 #define MAX_CGROUP_ROOT_NAMELEN 64
@@ -250,6 +285,12 @@ enum {
          *
          * - "cgroup.clone_children" is removed.
          *
+         * - "cgroup.subtree_populated" is available.  Its value is 0 if
+         *   the cgroup and its descendants contain no task; otherwise, 1.
+         *   The file also generates kernfs notification which can be
+         *   monitored through poll and [di]notify when the value of the
+         *   file changes.
+         *
          * - If mount is requested with sane_behavior but without any
          *   subsystem, the default unified hierarchy is mounted.
          *
@@ -264,6 +305,8 @@ enum {
          *   the flag is not created.
          *
          * - blkcg: blk-throttle becomes properly hierarchical.
+         *
+         * - debug: disallowed on the default hierarchy.
          */
         CGRP_ROOT_SANE_BEHAVIOR = (1 << 0),
 
@@ -282,6 +325,9 @@ enum {
 struct cgroup_root {
         struct kernfs_root *kf_root;
 
+        /* The bitmask of subsystems attached to this hierarchy */
+        unsigned int subsys_mask;
+
         /* Unique id for this hierarchy. */
         int hierarchy_id;
 
@@ -295,7 +341,7 @@ struct cgroup_root {
         struct list_head root_list;
 
         /* Hierarchy-specific flags */
-        unsigned long flags;
+        unsigned int flags;
 
         /* IDs for cgroups in this hierarchy */
         struct idr cgroup_idr;
@@ -342,6 +388,9 @@ struct css_set {
          */
         struct list_head cgrp_links;
 
+        /* the default cgroup associated with this css_set */
+        struct cgroup *dfl_cgrp;
+
         /*
          * Set of subsystem states, one for each subsystem. This array is
          * immutable after creation apart from the init_css_set during
@@ -366,6 +415,15 @@ struct css_set {
         struct cgroup *mg_src_cgrp;
         struct css_set *mg_dst_cset;
 
+        /*
+         * On the default hierarhcy, ->subsys[ssid] may point to a css
+         * attached to an ancestor instead of the cgroup this css_set is
+         * associated with.  The following node is anchored at
+         * ->subsys[ssid]->cgroup->e_csets[ssid] and provides a way to
+         * iterate through all css's attached to a given cgroup.
+         */
+        struct list_head e_cset_node[CGROUP_SUBSYS_COUNT];
+
         /* For RCU-protected deletion */
         struct rcu_head rcu_head;
 };
@@ -405,8 +463,7 @@ struct cftype {
 
         /*
          * The maximum length of string, excluding trailing nul, that can
-         * be passed to write_string.  If < PAGE_SIZE-1, PAGE_SIZE-1 is
-         * assumed.
+         * be passed to write.  If < PAGE_SIZE-1, PAGE_SIZE-1 is assumed.
          */
         size_t max_write_len;
 
@@ -453,19 +510,13 @@ struct cftype {
                          s64 val);
 
         /*
-         * write_string() is passed a nul-terminated kernelspace
-         * buffer of maximum length determined by max_write_len.
-         * Returns 0 or -ve error code.
-         */
-        int (*write_string)(struct cgroup_subsys_state *css, struct cftype *cft,
-                            char *buffer);
-        /*
-         * trigger() callback can be used to get some kick from the
-         * userspace, when the actual string written is not important
-         * at all. The private field can be used to determine the
-         * kick type for multiplexing.
+         * write() is the generic write callback which maps directly to
+         * kernfs write operation and overrides all other operations.
+         * Maximum write size is determined by ->max_write_len.  Use
+         * of_css/cft() to access the associated css and cft.
          */
-        int (*trigger)(struct cgroup_subsys_state *css, unsigned int event);
+        ssize_t (*write)(struct kernfs_open_file *of,
+                         char *buf, size_t nbytes, loff_t off);
 
 #ifdef CONFIG_DEBUG_LOCK_ALLOC
         struct lock_class_key   lockdep_key;
@@ -504,14 +555,24 @@ static inline ino_t cgroup_ino(struct cgroup *cgrp)
                 return 0;
 }
 
-static inline struct cftype *seq_cft(struct seq_file *seq)
+/* cft/css accessors for cftype->write() operation */
+static inline struct cftype *of_cft(struct kernfs_open_file *of)
 {
-        struct kernfs_open_file *of = seq->private;
-
         return of->kn->priv;
 }
 
-struct cgroup_subsys_state *seq_css(struct seq_file *seq);
+struct cgroup_subsys_state *of_css(struct kernfs_open_file *of);
+
+/* cft/css accessors for cftype->seq_*() operations */
+static inline struct cftype *seq_cft(struct seq_file *seq)
+{
+        return of_cft(seq->private);
+}
+
+static inline struct cgroup_subsys_state *seq_css(struct seq_file *seq)
+{
+        return of_css(seq->private);
+}
 
 /*
  * Name / path handling functions.  All are thin wrappers around the kernfs
@@ -612,6 +673,9 @@ struct cgroup_subsys {
         /* link to parent, protected by cgroup_lock() */
         struct cgroup_root *root;
 
+        /* idr for css->id */
+        struct idr css_idr;
+
         /*
          * List of cftypes.  Each entry is the first entry of an array
          * terminated by zero length name.
@@ -627,19 +691,6 @@ struct cgroup_subsys {
 #undef SUBSYS
 
 /**
- * css_parent - find the parent css
- * @css: the target cgroup_subsys_state
- *
- * Return the parent css of @css.  This function is guaranteed to return
- * non-NULL parent as long as @css isn't the root.
- */
-static inline
-struct cgroup_subsys_state *css_parent(struct cgroup_subsys_state *css)
-{
-        return css->parent;
-}
-
-/**
  * task_css_set_check - obtain a task's css_set with extra access conditions
  * @task: the task to obtain css_set for
  * @__c: extra condition expression to be passed to rcu_dereference_check()
@@ -731,14 +782,14 @@ struct cgroup_subsys_state *css_from_id(int id, struct cgroup_subsys *ss);
  * @pos: the css * to use as the loop cursor
  * @parent: css whose children to walk
  *
- * Walk @parent's children.  Must be called under rcu_read_lock().  A child
- * css which hasn't finished ->css_online() or already has finished
- * ->css_offline() may show up during traversal and it's each subsystem's
- * responsibility to verify that each @pos is alive.
+ * Walk @parent's children.  Must be called under rcu_read_lock().
  *
- * If a subsystem synchronizes against the parent in its ->css_online() and
- * before starting iterating, a css which finished ->css_online() is
- * guaranteed to be visible in the future iterations.
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal.  It's each subsystem's
+ * responsibility to synchronize against on/offlining.
  *
  * It is allowed to temporarily drop RCU read lock during iteration.  The
  * caller is responsible for ensuring that @pos remains accessible until
@@ -761,17 +812,16 @@ css_rightmost_descendant(struct cgroup_subsys_state *pos);
  * @root: css whose descendants to walk
  *
  * Walk @root's descendants.  @root is included in the iteration and the
- * first node to be visited.  Must be called under rcu_read_lock().  A
- * descendant css which hasn't finished ->css_online() or already has
- * finished ->css_offline() may show up during traversal and it's each
- * subsystem's responsibility to verify that each @pos is alive.
+ * first node to be visited.  Must be called under rcu_read_lock().
  *
- * If a subsystem synchronizes against the parent in its ->css_online() and
- * before starting iterating, and synchronizes against @pos on each
- * iteration, any descendant css which finished ->css_online() is
- * guaranteed to be visible in the future iterations.
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal.  It's each subsystem's
+ * responsibility to synchronize against on/offlining.
  *
- * In other words, the following guarantees that a descendant can't escape
+ * For example, the following guarantees that a descendant can't escape
  * state updates of its ancestors.
  *
  * my_online(@css)
@@ -827,18 +877,34 @@ css_next_descendant_post(struct cgroup_subsys_state *pos,
  *
  * Similar to css_for_each_descendant_pre() but performs post-order
  * traversal instead.  @root is included in the iteration and the last
- * node to be visited.  Note that the walk visibility guarantee described
- * in pre-order walk doesn't apply the same to post-order walks.
+ * node to be visited.
+ *
+ * If a subsystem synchronizes ->css_online() and the start of iteration, a
+ * css which finished ->css_online() is guaranteed to be visible in the
+ * future iterations and will stay visible until the last reference is put.
+ * A css which hasn't finished ->css_online() or already finished
+ * ->css_offline() may show up during traversal.  It's each subsystem's
+ * responsibility to synchronize against on/offlining.
+ *
+ * Note that the walk visibility guarantee example described in pre-order
+ * walk doesn't apply the same to post-order walks.
  */
 #define css_for_each_descendant_post(pos, css)                          \
         for ((pos) = css_next_descendant_post(NULL, (css)); (pos);      \
              (pos) = css_next_descendant_post((pos), (css)))
 
+bool css_has_online_children(struct cgroup_subsys_state *css);
+
 /* A css_task_iter should be treated as an opaque object */
 struct css_task_iter {
-        struct cgroup_subsys_state      *origin_css;
-        struct list_head                *cset_link;
-        struct list_head                *task;
+        struct cgroup_subsys            *ss;
+
+        struct list_head                *cset_pos;
+        struct list_head                *cset_head;
+
+        struct list_head                *task_pos;
+        struct list_head                *tasks_head;
+        struct list_head                *mg_tasks_head;
 };
 
 void css_task_iter_start(struct cgroup_subsys_state *css,
@@ -849,8 +915,8 @@ void css_task_iter_end(struct css_task_iter *it);
 int cgroup_attach_task_all(struct task_struct *from, struct task_struct *);
 int cgroup_transfer_tasks(struct cgroup *to, struct cgroup *from);
 
-struct cgroup_subsys_state *css_tryget_from_dir(struct dentry *dentry,
-                                                struct cgroup_subsys *ss);
+struct cgroup_subsys_state *css_tryget_online_from_dir(struct dentry *dentry,
+                                                       struct cgroup_subsys *ss);
 
 #else /* !CONFIG_CGROUPS */
 
diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h
index 768fe44e19f0..98c4f9b12b03 100644
--- a/include/linux/cgroup_subsys.h
+++ b/include/linux/cgroup_subsys.h
@@ -7,10 +7,6 @@
 SUBSYS(cpuset)
 #endif
 
-#if IS_ENABLED(CONFIG_CGROUP_DEBUG)
-SUBSYS(debug)
-#endif
-
 #if IS_ENABLED(CONFIG_CGROUP_SCHED)
 SUBSYS(cpu)
 #endif
@@ -50,6 +46,13 @@ SUBSYS(net_prio)
 #if IS_ENABLED(CONFIG_CGROUP_HUGETLB)
 SUBSYS(hugetlb)
 #endif
+
+/*
+ * The following subsystems are not supported on the default hierarchy.
+ */
+#if IS_ENABLED(CONFIG_CGROUP_DEBUG)
+SUBSYS(debug)
+#endif
 /*
  * DO NOT ADD ANY SUBSYSTEM WITHOUT EXPLICIT ACKS FROM CGROUP MAINTAINERS.
  */
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index fb4eca6907cd..0c287dbbb144 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -40,14 +40,14 @@ struct dentry;
  * through the clk_* api.
  *
  * @prepare:    Prepare the clock for enabling. This must not return until
- *              the clock is fully prepared, and it's safe to call clk_enable.
- *              This callback is intended to allow clock implementations to
- *              do any initialisation that may sleep. Called with
- *              prepare_lock held.
+ *              the clock is fully prepared, and it's safe to call clk_enable.
+ *              This callback is intended to allow clock implementations to
+ *              do any initialisation that may sleep. Called with
+ *              prepare_lock held.
  *
  * @unprepare:  Release the clock from its prepared state. This will typically
- *              undo any work done in the @prepare callback. Called with
- *              prepare_lock held.
+ *              undo any work done in the @prepare callback. Called with
+ *              prepare_lock held.
  *
  * @is_prepared: Queries the hardware to determine if the clock is prepared.
  *              This function is allowed to sleep. Optional, if this op is not
@@ -58,16 +58,16 @@ struct dentry;
  *              Called with prepare mutex held. This function may sleep.
  *
  * @enable:     Enable the clock atomically. This must not return until the
- *              clock is generating a valid clock signal, usable by consumer
- *              devices. Called with enable_lock held. This function must not
- *              sleep.
+ *              clock is generating a valid clock signal, usable by consumer
+ *              devices. Called with enable_lock held. This function must not
+ *              sleep.
  *
  * @disable:    Disable the clock atomically. Called with enable_lock held.
- *              This function must not sleep.
+ *              This function must not sleep.
  *
  * @is_enabled: Queries the hardware to determine if the clock is enabled.
- *              This function must not sleep. Optional, if this op is not
- *              set then the enable count will be used.
+ *              This function must not sleep. Optional, if this op is not
+ *              set then the enable count will be used.
  *
  * @disable_unused: Disable the clock atomically.  Only called from
  *              clk_disable_unused for gate clocks with special needs.
@@ -75,34 +75,35 @@ struct dentry;
  *              sleep.
  *
  * @recalc_rate Recalculate the rate of this clock, by querying hardware. The
- *              parent rate is an input parameter.  It is up to the caller to
- *              ensure that the prepare_mutex is held across this call.
- *              Returns the calculated rate.  Optional, but recommended - if
- *              this op is not set then clock rate will be initialized to 0.
+ *              parent rate is an input parameter.  It is up to the caller to
+ *              ensure that the prepare_mutex is held across this call.
+ *              Returns the calculated rate.  Optional, but recommended - if
+ *              this op is not set then clock rate will be initialized to 0.
  *
  * @round_rate: Given a target rate as input, returns the closest rate actually
- *              supported by the clock.
+ *              supported by the clock. The parent rate is an input/output
+ *              parameter.
  *
  * @determine_rate: Given a target rate as input, returns the closest rate
  *              actually supported by the clock, and optionally the parent clock
  *              that should be used to provide the clock rate.
  *
- * @get_parent: Queries the hardware to determine the parent of a clock.  The
- *              return value is a u8 which specifies the index corresponding to
- *              the parent clock.  This index can be applied to either the
- *              .parent_names or .parents arrays.  In short, this function
- *              translates the parent value read from hardware into an array
- *              index.  Currently only called when the clock is initialized by
- *              __clk_init.  This callback is mandatory for clocks with
- *              multiple parents.  It is optional (and unnecessary) for clocks
- *              with 0 or 1 parents.
- *
  * @set_parent: Change the input source of this clock; for clocks with multiple
- *              possible parents specify a new parent by passing in the index
- *              as a u8 corresponding to the parent in either the .parent_names
- *              or .parents arrays.  This function in affect translates an
- *              array index into the value programmed into the hardware.
- *              Returns 0 on success, -EERROR otherwise.
+ *              possible parents specify a new parent by passing in the index
+ *              as a u8 corresponding to the parent in either the .parent_names
+ *              or .parents arrays.  This function in affect translates an
+ *              array index into the value programmed into the hardware.
+ *              Returns 0 on success, -EERROR otherwise.
+ *
+ * @get_parent: Queries the hardware to determine the parent of a clock.  The
+ *              return value is a u8 which specifies the index corresponding to
+ *              the parent clock.  This index can be applied to either the
+ *              .parent_names or .parents arrays.  In short, this function
+ *              translates the parent value read from hardware into an array
+ *              index.  Currently only called when the clock is initialized by
+ *              __clk_init.  This callback is mandatory for clocks with
+ *              multiple parents.  It is optional (and unnecessary) for clocks
+ *              with 0 or 1 parents.
  *
  * @set_rate:   Change the rate of this clock. The requested rate is specified
  *              by the second argument, which should typically be the return
@@ -110,13 +111,6 @@ struct dentry;
  *              which is likely helpful for most .set_rate implementation.
  *              Returns 0 on success, -EERROR otherwise.
  *
- * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
- *              is expressed in ppb (parts per billion). The parent accuracy is
- *              an input parameter.
- *              Returns the calculated accuracy.  Optional - if this op is not
- *              set then clock accuracy will be initialized to parent accuracy
- *              or 0 (perfect clock) if clock has no parent.
- *
  * @set_rate_and_parent: Change the rate and the parent of this clock. The
  *              requested rate is specified by the second argument, which
  *              should typically be the return of .round_rate call.  The
@@ -128,6 +122,18 @@ struct dentry;
  *              separately via calls to .set_parent and .set_rate.
  *              Returns 0 on success, -EERROR otherwise.
  *
+ * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
+ *              is expressed in ppb (parts per billion). The parent accuracy is
+ *              an input parameter.
+ *              Returns the calculated accuracy.  Optional - if this op is not
+ *              set then clock accuracy will be initialized to parent accuracy
+ *              or 0 (perfect clock) if clock has no parent.
+ *
+ * @init:       Perform platform-specific initialization magic.
+ *              This is not not used by any of the basic clock types.
+ *              Please consider other ways of solving initialization problems
+ *              before using this callback, as its use is discouraged.
+ *
  * @debug_init: Set up type-specific debugfs entries for this clock.  This
  *              is called once, after the debugfs directory entry for this
  *              clock has been created.  The dentry pointer representing that
@@ -157,15 +163,15 @@ struct clk_ops {
         void            (*disable_unused)(struct clk_hw *hw);
         unsigned long   (*recalc_rate)(struct clk_hw *hw,
                                         unsigned long parent_rate);
-        long            (*round_rate)(struct clk_hw *hw, unsigned long,
-                                        unsigned long *);
+        long            (*round_rate)(struct clk_hw *hw, unsigned long rate,
+                                        unsigned long *parent_rate);
         long            (*determine_rate)(struct clk_hw *hw, unsigned long rate,
                                         unsigned long *best_parent_rate,
                                         struct clk **best_parent_clk);
         int             (*set_parent)(struct clk_hw *hw, u8 index);
         u8              (*get_parent)(struct clk_hw *hw);
-        int             (*set_rate)(struct clk_hw *hw, unsigned long,
-                                    unsigned long);
+        int             (*set_rate)(struct clk_hw *hw, unsigned long rate,
+                                    unsigned long parent_rate);
         int             (*set_rate_and_parent)(struct clk_hw *hw,
                                     unsigned long rate,
                                     unsigned long parent_rate, u8 index);
@@ -254,12 +260,12 @@ void of_fixed_clk_setup(struct device_node *np);
  *
  * Flags:
  * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
- *      enable the clock.  Setting this flag does the opposite: setting the bit
- *      disable the clock and clearing it enables the clock
+ *      enable the clock.  Setting this flag does the opposite: setting the bit
+ *      disable the clock and clearing it enables the clock
  * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit
- *   of this register, and mask of gate bits are in higher 16-bit of this
- *   register.  While setting the gate bits, higher 16-bit should also be
- *   updated to indicate changing gate bits.
+ *      of this register, and mask of gate bits are in higher 16-bit of this
+ *      register.  While setting the gate bits, higher 16-bit should also be
+ *      updated to indicate changing gate bits.
  */
 struct clk_gate {
         struct clk_hw hw;
@@ -298,20 +304,24 @@ struct clk_div_table {
  *
  * Flags:
  * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
- *      register plus one.  If CLK_DIVIDER_ONE_BASED is set then the divider is
- *      the raw value read from the register, with the value of zero considered
+ *      register plus one.  If CLK_DIVIDER_ONE_BASED is set then the divider is
+ *      the raw value read from the register, with the value of zero considered
  *      invalid, unless CLK_DIVIDER_ALLOW_ZERO is set.
  * CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from
- *      the hardware register
+ *      the hardware register
  * CLK_DIVIDER_ALLOW_ZERO - Allow zero divisors.  For dividers which have
  *      CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor.
  *      Some hardware implementations gracefully handle this case and allow a
  *      zero divisor by not modifying their input clock
  *      (divide by one / bypass).
  * CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit
- *   of this register, and mask of divider bits are in higher 16-bit of this
- *   register.  While setting the divider bits, higher 16-bit should also be
- *   updated to indicate changing divider bits.
+ *      of this register, and mask of divider bits are in higher 16-bit of this
+ *      register.  While setting the divider bits, higher 16-bit should also be
+ *      updated to indicate changing divider bits.
+ * CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded
+ *      to the closest integer instead of the up one.
+ * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
+ *      not be changed by the clock framework.
  */
 struct clk_divider {
         struct clk_hw   hw;
@@ -327,8 +337,11 @@ struct clk_divider {
 #define CLK_DIVIDER_POWER_OF_TWO        BIT(1)
 #define CLK_DIVIDER_ALLOW_ZERO          BIT(2)
 #define CLK_DIVIDER_HIWORD_MASK         BIT(3)
+#define CLK_DIVIDER_ROUND_CLOSEST       BIT(4)
+#define CLK_DIVIDER_READ_ONLY           BIT(5)
 
 extern const struct clk_ops clk_divider_ops;
+extern const struct clk_ops clk_divider_ro_ops;
 struct clk *clk_register_divider(struct device *dev, const char *name,
                 const char *parent_name, unsigned long flags,
                 void __iomem *reg, u8 shift, u8 width,
@@ -356,9 +369,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
  * CLK_MUX_INDEX_ONE - register index starts at 1, not 0
  * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
  * CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this
- *   register, and mask of mux bits are in higher 16-bit of this register.
- *   While setting the mux bits, higher 16-bit should also be updated to
- *   indicate changing mux bits.
+ *      register, and mask of mux bits are in higher 16-bit of this register.
+ *      While setting the mux bits, higher 16-bit should also be updated to
+ *      indicate changing mux bits.
  */
 struct clk_mux {
         struct clk_hw   hw;
@@ -529,10 +542,7 @@ struct clk_onecell_data {
 
 extern struct of_device_id __clk_of_table;
 
-#define CLK_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clk_of_table_##name  \
-                __used __section(__clk_of_table)                \
-                = { .compatible = compat, .data = fn };
+#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
 
 #ifdef CONFIG_OF
 int of_clk_add_provider(struct device_node *np,
diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
index f9bf080a1123..9f8a14041dd5 100644
--- a/include/linux/clk/shmobile.h
+++ b/include/linux/clk/shmobile.h
@@ -1,7 +1,9 @@
 /*
  * Copyright 2013 Ideas On Board SPRL
+ * Copyright 2013, 2014 Horms Solutions Ltd.
  *
  * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ * Contact: Simon Horman <horms@verge.net.au>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -14,6 +16,7 @@
 
 #include <linux/types.h>
 
+void r8a7779_clocks_init(u32 mode);
 void rcar_gen2_clocks_init(u32 mode);
 
 #endif
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
new file mode 100644
index 000000000000..aed28c4451d9
--- /dev/null
+++ b/include/linux/clk/sunxi.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+#include <linux/clk.h>
+
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
+
+#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 67301a405712..a16b497d5159 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -339,23 +339,13 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
 
 extern int clocksource_i8253_init(void);
 
-struct device_node;
-typedef void(*clocksource_of_init_fn)(struct device_node *);
+#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
+        OF_DECLARE_1(clksrc, name, compat, fn)
+
 #ifdef CONFIG_CLKSRC_OF
 extern void clocksource_of_init(void);
-
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clksrc_of_table_##name       \
-                __used __section(__clksrc_of_table)                     \
-                 = { .compatible = compat,                              \
-                     .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
 #else
 static inline void clocksource_of_init(void) {}
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clksrc_of_table_##name       \
-                __attribute__((unused))                                 \
-                 = { .compatible = compat,                              \
-                     .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
 #endif
 
 #endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/compaction.h b/include/linux/compaction.h
index 7e1c76e3cd68..01e3132820da 100644
--- a/include/linux/compaction.h
+++ b/include/linux/compaction.h
@@ -22,7 +22,7 @@ extern int sysctl_extfrag_handler(struct ctl_table *table, int write,
 extern int fragmentation_index(struct zone *zone, unsigned int order);
 extern unsigned long try_to_compact_pages(struct zonelist *zonelist,
                         int order, gfp_t gfp_mask, nodemask_t *mask,
-                        bool sync, bool *contended);
+                        enum migrate_mode mode, bool *contended);
 extern void compact_pgdat(pg_data_t *pgdat, int order);
 extern void reset_isolation_suitable(pg_data_t *pgdat);
 extern unsigned long compaction_suitable(struct zone *zone, int order);
@@ -91,7 +91,7 @@ static inline bool compaction_restarting(struct zone *zone, int order)
 #else
 static inline unsigned long try_to_compact_pages(struct zonelist *zonelist,
                         int order, gfp_t gfp_mask, nodemask_t *nodemask,
-                        bool sync, bool *contended)
+                        enum migrate_mode mode, bool *contended)
 {
         return COMPACT_CONTINUE;
 }
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index ee7239ea1583..64fdfe1cfcf0 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -323,9 +323,18 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
 #endif
 #ifndef __compiletime_error
 # define __compiletime_error(message)
-# define __compiletime_error_fallback(condition) \
+/*
+ * Sparse complains of variable sized arrays due to the temporary variable in
+ * __compiletime_assert. Unfortunately we can't just expand it out to make
+ * sparse see a constant array size without breaking compiletime_assert on old
+ * versions of GCC (e.g. 4.2.4), so hide the array from sparse altogether.
+ */
+# ifndef __CHECKER__
+#  define __compiletime_error_fallback(condition) \
         do { ((void)sizeof(char[1 - 2 * condition])); } while (0)
-#else
+# endif
+#endif
+#ifndef __compiletime_error_fallback
 # define __compiletime_error_fallback(condition) do { } while (0)
 #endif
 
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 81887120395c..95978ad7fcdd 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -256,7 +256,6 @@ enum cpuhp_state {
 };
 
 void cpu_startup_entry(enum cpuhp_state state);
-void cpu_idle(void);
 
 void cpu_idle_poll_ctrl(bool enable);
 
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index c51a436135c4..25e0df6155a4 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -84,6 +84,7 @@ struct cpuidle_device {
 };
 
 DECLARE_PER_CPU(struct cpuidle_device *, cpuidle_devices);
+DECLARE_PER_CPU(struct cpuidle_device, cpuidle_dev);
 
 /**
  * cpuidle_get_last_residency - retrieves the last state's residency time
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index d08e4d2a9b92..3557ea7b2049 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -600,7 +600,7 @@ static inline int cpulist_scnprintf(char *buf, int len,
 static inline int cpumask_parse(const char *buf, struct cpumask *dstp)
 {
         char *nl = strchr(buf, '\n');
-        int len = nl ? nl - buf : strlen(buf);
+        unsigned int len = nl ? (unsigned int)(nl - buf) : strlen(buf);
 
         return bitmap_parse(buf, len, cpumask_bits(dstp), nr_cpumask_bits);
 }
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index b19d3dc2e651..ade2390ffe92 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -12,10 +12,31 @@
 #include <linux/cpumask.h>
 #include <linux/nodemask.h>
 #include <linux/mm.h>
+#include <linux/jump_label.h>
 
 #ifdef CONFIG_CPUSETS
 
-extern int number_of_cpusets;   /* How many cpusets are defined in system? */
+extern struct static_key cpusets_enabled_key;
+static inline bool cpusets_enabled(void)
+{
+        return static_key_false(&cpusets_enabled_key);
+}
+
+static inline int nr_cpusets(void)
+{
+        /* jump label reference count + the top-level cpuset */
+        return static_key_count(&cpusets_enabled_key) + 1;
+}
+
+static inline void cpuset_inc(void)
+{
+        static_key_slow_inc(&cpusets_enabled_key);
+}
+
+static inline void cpuset_dec(void)
+{
+        static_key_slow_dec(&cpusets_enabled_key);
+}
 
 extern int cpuset_init(void);
 extern void cpuset_init_smp(void);
@@ -32,13 +53,13 @@ extern int __cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask);
 
 static inline int cpuset_node_allowed_softwall(int node, gfp_t gfp_mask)
 {
-        return number_of_cpusets <= 1 ||
+        return nr_cpusets() <= 1 ||
                 __cpuset_node_allowed_softwall(node, gfp_mask);
 }
 
 static inline int cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask)
 {
-        return number_of_cpusets <= 1 ||
+        return nr_cpusets() <= 1 ||
                 __cpuset_node_allowed_hardwall(node, gfp_mask);
 }
 
@@ -124,6 +145,8 @@ static inline void set_mems_allowed(nodemask_t nodemask)
 
 #else /* !CONFIG_CPUSETS */
 
+static inline bool cpusets_enabled(void) { return false; }
+
 static inline int cpuset_init(void) { return 0; }
 static inline void cpuset_init_smp(void) {}
 
diff --git a/include/linux/dell-led.h b/include/linux/dell-led.h
new file mode 100644
index 000000000000..7009b8bec77b
--- /dev/null
+++ b/include/linux/dell-led.h
@@ -0,0 +1,10 @@
+#ifndef __DELL_LED_H__
+#define __DELL_LED_H__
+
+enum {
+        DELL_LED_MICMUTE,
+};
+
+int dell_app_wmi_led_set(int whichled, int on);
+
+#endif
diff --git a/include/linux/device.h b/include/linux/device.h
index 580e3eed4b78..af424acd393d 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -692,6 +692,7 @@ struct acpi_dev_node {
  * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
  *              hardware supports 64-bit addresses for consistent allocations
  *              such descriptors.
+ * @dma_pfn_offset: offset of DMA memory range relatively of RAM
  * @dma_parms:  A low level driver may set these to teach IOMMU code about
  *              segment limitations.
  * @dma_pools:  Dma pools (if dma'ble device).
@@ -759,6 +760,7 @@ struct device {
                                              not all hardware supports
                                              64 bit addresses for consistent
                                              allocations such descriptors. */
+        unsigned long   dma_pfn_offset;
 
         struct device_dma_parameters *dma_parms;
 
diff --git a/include/linux/dma-contiguous.h b/include/linux/dma-contiguous.h
index 3b28f937d959..772eab5d524a 100644
--- a/include/linux/dma-contiguous.h
+++ b/include/linux/dma-contiguous.h
@@ -88,7 +88,8 @@ static inline void dma_contiguous_set_default(struct cma *cma)
 void dma_contiguous_reserve(phys_addr_t addr_limit);
 
 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
-                                       phys_addr_t limit, struct cma **res_cma);
+                                       phys_addr_t limit, struct cma **res_cma,
+                                       bool fixed);
 
 /**
  * dma_declare_contiguous() - reserve area for contiguous memory handling
@@ -108,7 +109,7 @@ static inline int dma_declare_contiguous(struct device *dev, phys_addr_t size,
 {
         struct cma *cma;
         int ret;
-        ret = dma_contiguous_reserve_area(size, base, limit, &cma);
+        ret = dma_contiguous_reserve_area(size, base, limit, &cma, true);
         if (ret == 0)
                 dev_set_cma_area(dev, cma);
 
@@ -136,7 +137,9 @@ static inline void dma_contiguous_set_default(struct cma *cma) { }
 static inline void dma_contiguous_reserve(phys_addr_t limit) { }
 
 static inline int dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
-                                       phys_addr_t limit, struct cma **res_cma) {
+                                       phys_addr_t limit, struct cma **res_cma,
+                                       bool fixed)
+{
         return -ENOSYS;
 }
 
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 0c3eab1e39ac..931b70986272 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -129,6 +129,13 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
 
 extern u64 dma_get_required_mask(struct device *dev);
 
+#ifndef set_arch_dma_coherent_ops
+static inline int set_arch_dma_coherent_ops(struct device *dev)
+{
+        return 0;
+}
+#endif
+
 static inline unsigned int dma_get_max_seg_size(struct device *dev)
 {
         return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 72cb0ddb9678..d2c5cc7c583c 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -292,7 +292,7 @@ struct dma_chan_dev {
 };
 
 /**
- * enum dma_slave_buswidth - defines bus with of the DMA slave
+ * enum dma_slave_buswidth - defines bus width of the DMA slave
  * device, source or target buses
  */
 enum dma_slave_buswidth {
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 6c100ff0cae4..41bbf8ba4ba8 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -575,6 +575,9 @@ typedef efi_status_t efi_query_variable_store_t(u32 attributes, unsigned long si
 #define EFI_FILE_SYSTEM_GUID \
     EFI_GUID(  0x964e5b22, 0x6459, 0x11d2, 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b )
 
+#define DEVICE_TREE_GUID \
+    EFI_GUID(  0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0 )
+
 typedef struct {
         efi_guid_t guid;
         u64 table;
@@ -664,6 +667,14 @@ struct efi_memory_map {
         unsigned long desc_size;
 };
 
+struct efi_fdt_params {
+        u64 system_table;
+        u64 mmap;
+        u32 mmap_size;
+        u32 desc_size;
+        u32 desc_ver;
+};
+
 typedef struct {
         u32 revision;
         u32 parent_handle;
@@ -861,8 +872,15 @@ extern void efi_initialize_iomem_resources(struct resource *code_resource,
 extern void efi_get_time(struct timespec *now);
 extern int efi_set_rtc_mmss(const struct timespec *now);
 extern void efi_reserve_boot_services(void);
+extern int efi_get_fdt_params(struct efi_fdt_params *params, int verbose);
 extern struct efi_memory_map memmap;
 
+/* Iterate through an efi_memory_map */
+#define for_each_efi_memory_desc(m, md)                                    \
+        for ((md) = (m)->map;                                              \
+             (md) <= (efi_memory_desc_t *)((m)->map_end - (m)->desc_size); \
+             (md) = (void *)(md) + (m)->desc_size)
+
 /**
  * efi_range_is_wc - check the WC bit on an address range
  * @start: starting kvirt address
@@ -1033,8 +1051,10 @@ struct efivars {
  * and we use a page for reading/writing.
  */
 
+#define EFI_VAR_NAME_LEN        1024
+
 struct efi_variable {
-        efi_char16_t  VariableName[1024/sizeof(efi_char16_t)];
+        efi_char16_t  VariableName[EFI_VAR_NAME_LEN/sizeof(efi_char16_t)];
         efi_guid_t    VendorGuid;
         unsigned long DataSize;
         __u8          Data[1024];
@@ -1116,7 +1136,7 @@ int efivar_entry_iter(int (*func)(struct efivar_entry *, void *),
 struct efivar_entry *efivar_entry_find(efi_char16_t *name, efi_guid_t guid,
                                        struct list_head *head, bool remove);
 
-bool efivar_validate(struct efi_variable *var, u8 *data, unsigned long len);
+bool efivar_validate(efi_char16_t *var_name, u8 *data, unsigned long len);
 
 extern struct work_struct efivar_work;
 void efivar_run_worker(void);
diff --git a/include/linux/elevator.h b/include/linux/elevator.h
index df63bd3a8cf1..4ff262e2bf37 100644
--- a/include/linux/elevator.h
+++ b/include/linux/elevator.h
@@ -144,7 +144,7 @@ extern void elv_drain_elevator(struct request_queue *);
  * io scheduler registration
  */
 extern void __init load_default_elevator_module(void);
-extern int elv_register(struct elevator_type *);
+extern int __init elv_register(struct elevator_type *);
 extern void elv_unregister(struct elevator_type *);
 
 /*
diff --git a/include/linux/f2fs_fs.h b/include/linux/f2fs_fs.h
index df53e1753a76..6ff0b0b42d47 100644
--- a/include/linux/f2fs_fs.h
+++ b/include/linux/f2fs_fs.h
@@ -19,6 +19,7 @@
 #define F2FS_LOG_SECTORS_PER_BLOCK      3       /* 4KB: F2FS_BLKSIZE */
 #define F2FS_BLKSIZE                    4096    /* support only 4KB block */
 #define F2FS_MAX_EXTENSION              64      /* # of extension entries */
+#define F2FS_BLK_ALIGN(x)       (((x) + F2FS_BLKSIZE - 1) / F2FS_BLKSIZE)
 
 #define NULL_ADDR               ((block_t)0)    /* used as block_t addresses */
 #define NEW_ADDR                ((block_t)-1)   /* used as block_t addresses */
@@ -75,6 +76,7 @@ struct f2fs_super_block {
         __le16 volume_name[512];        /* volume name */
         __le32 extension_count;         /* # of extensions below */
         __u8 extension_list[F2FS_MAX_EXTENSION][8];     /* extension array */
+        __le32 cp_payload;
 } __packed;
 
 /*
@@ -146,6 +148,9 @@ struct f2fs_extent {
 #define ADDRS_PER_BLOCK         1018    /* Address Pointers in a Direct Block */
 #define NIDS_PER_BLOCK          1018    /* Node IDs in an Indirect Block */
 
+#define ADDRS_PER_PAGE(page, fi)        \
+        (IS_INODE(page) ? ADDRS_PER_INODE(fi) : ADDRS_PER_BLOCK)
+
 #define NODE_DIR1_BLOCK         (DEF_ADDRS_PER_INODE + 1)
 #define NODE_DIR2_BLOCK         (DEF_ADDRS_PER_INODE + 2)
 #define NODE_IND1_BLOCK         (DEF_ADDRS_PER_INODE + 3)
@@ -391,6 +396,9 @@ typedef __le32	f2fs_hash_t;
 /* MAX level for dir lookup */
 #define MAX_DIR_HASH_DEPTH      63
 
+/* MAX buckets in one level of dir */
+#define MAX_DIR_BUCKETS         (1 << ((MAX_DIR_HASH_DEPTH / 2) - 1))
+
 #define SIZE_OF_DIR_ENTRY       11      /* by byte */
 #define SIZE_OF_DENTRY_BITMAP   ((NR_DENTRY_IN_BLOCK + BITS_PER_BYTE - 1) / \
                                         BITS_PER_BYTE)
diff --git a/include/linux/fb.h b/include/linux/fb.h
index fe6ac956550e..b6bfda99add3 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -47,6 +47,7 @@ struct device_node;
 
 #define FB_MISC_PRIM_COLOR      1
 #define FB_MISC_1ST_DETAIL      2       /* First Detailed Timing is preferred */
+#define FB_MISC_HDMI            4
 struct fb_chroma {
         __u32 redx;     /* in fraction of 1024 */
         __u32 greenx;
@@ -641,7 +642,7 @@ static inline void unlock_fb_info(struct fb_info *info)
 static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch,
                                            u8 *src, u32 s_pitch, u32 height)
 {
-        int i, j;
+        u32 i, j;
 
         d_pitch -= s_pitch;
 
diff --git a/include/linux/firewire.h b/include/linux/firewire.h
index c3683bdf28fe..d4b7683c722d 100644
--- a/include/linux/firewire.h
+++ b/include/linux/firewire.h
@@ -367,6 +367,9 @@ static inline int fw_stream_packet_destination_id(int tag, int channel, int sy)
         return tag << 14 | channel << 8 | sy;
 }
 
+void fw_schedule_bus_reset(struct fw_card *card, bool delayed,
+                           bool short_reset);
+
 struct fw_descriptor {
         struct list_head link;
         size_t length;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 878031227c57..338e6f758c6d 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -128,6 +128,10 @@ typedef void (dio_iodone_t)(struct kiocb *iocb, loff_t offset,
 #define FMODE_ATOMIC_POS        ((__force fmode_t)0x8000)
 /* Write access to underlying fs */
 #define FMODE_WRITER            ((__force fmode_t)0x10000)
+/* Has read method(s) */
+#define FMODE_CAN_READ          ((__force fmode_t)0x20000)
+/* Has write method(s) */
+#define FMODE_CAN_WRITE         ((__force fmode_t)0x40000)
 
 /* File was opened by fanotify and shouldn't generate fanotify events */
 #define FMODE_NONOTIFY          ((__force fmode_t)0x1000000)
@@ -343,8 +347,7 @@ struct address_space_operations {
         void (*invalidatepage) (struct page *, unsigned int, unsigned int);
         int (*releasepage) (struct page *, gfp_t);
         void (*freepage)(struct page *);
-        ssize_t (*direct_IO)(int, struct kiocb *, const struct iovec *iov,
-                        loff_t offset, unsigned long nr_segs);
+        ssize_t (*direct_IO)(int, struct kiocb *, struct iov_iter *iter, loff_t offset);
         int (*get_xip_mem)(struct address_space *, pgoff_t, int,
                                                 void **, unsigned long *);
         /*
@@ -1448,6 +1451,8 @@ struct block_device_operations;
 #define HAVE_COMPAT_IOCTL 1
 #define HAVE_UNLOCKED_IOCTL 1
 
+struct iov_iter;
+
 struct file_operations {
         struct module *owner;
         loff_t (*llseek) (struct file *, loff_t, int);
@@ -1455,6 +1460,8 @@ struct file_operations {
         ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
         ssize_t (*aio_read) (struct kiocb *, const struct iovec *, unsigned long, loff_t);
         ssize_t (*aio_write) (struct kiocb *, const struct iovec *, unsigned long, loff_t);
+        ssize_t (*read_iter) (struct kiocb *, struct iov_iter *);
+        ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
         int (*iterate) (struct file *, struct dir_context *);
         unsigned int (*poll) (struct file *, struct poll_table_struct *);
         long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
@@ -2404,20 +2411,18 @@ extern int generic_file_readonly_mmap(struct file *, struct vm_area_struct *);
 extern int generic_file_remap_pages(struct vm_area_struct *, unsigned long addr,
                 unsigned long size, pgoff_t pgoff);
 int generic_write_checks(struct file *file, loff_t *pos, size_t *count, int isblk);
-extern ssize_t generic_file_aio_read(struct kiocb *, const struct iovec *, unsigned long, loff_t);
-extern ssize_t __generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long);
-extern ssize_t generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long, loff_t);
-extern ssize_t generic_file_direct_write(struct kiocb *, const struct iovec *,
-                unsigned long *, loff_t, size_t, size_t);
+extern ssize_t generic_file_read_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t __generic_file_write_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t generic_file_write_iter(struct kiocb *, struct iov_iter *);
+extern ssize_t generic_file_direct_write(struct kiocb *, struct iov_iter *, loff_t);
 extern ssize_t generic_perform_write(struct file *, struct iov_iter *, loff_t);
 extern ssize_t do_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos);
 extern ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos);
-extern int generic_segment_checks(const struct iovec *iov,
-                unsigned long *nr_segs, size_t *count, int access_flags);
+extern ssize_t new_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos);
+extern ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos);
 
 /* fs/block_dev.c */
-extern ssize_t blkdev_aio_write(struct kiocb *iocb, const struct iovec *iov,
-                                unsigned long nr_segs, loff_t pos);
+extern ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from);
 extern int blkdev_fsync(struct file *filp, loff_t start, loff_t end,
                         int datasync);
 extern void block_sync_page(struct page *page);
@@ -2427,7 +2432,7 @@ extern ssize_t generic_file_splice_read(struct file *, loff_t *,
                 struct pipe_inode_info *, size_t, unsigned int);
 extern ssize_t default_file_splice_read(struct file *, loff_t *,
                 struct pipe_inode_info *, size_t, unsigned int);
-extern ssize_t generic_file_splice_write(struct pipe_inode_info *,
+extern ssize_t iter_file_splice_write(struct pipe_inode_info *,
                 struct file *, loff_t *, size_t, unsigned int);
 extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe,
                 struct file *out, loff_t *, size_t len, unsigned int flags);
@@ -2477,16 +2482,16 @@ enum {
 void dio_end_io(struct bio *bio, int error);
 
 ssize_t __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
-        struct block_device *bdev, const struct iovec *iov, loff_t offset,
-        unsigned long nr_segs, get_block_t get_block, dio_iodone_t end_io,
+        struct block_device *bdev, struct iov_iter *iter, loff_t offset,
+        get_block_t get_block, dio_iodone_t end_io,
         dio_submit_t submit_io, int flags);
 
 static inline ssize_t blockdev_direct_IO(int rw, struct kiocb *iocb,
-                struct inode *inode, const struct iovec *iov, loff_t offset,
-                unsigned long nr_segs, get_block_t get_block)
+                struct inode *inode, struct iov_iter *iter, loff_t offset,
+                get_block_t get_block)
 {
-        return __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov,
-                                    offset, nr_segs, get_block, NULL, NULL,
+        return __blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iter,
+                                    offset, get_block, NULL, NULL,
                                     DIO_LOCKING | DIO_SKIP_HOLES);
 }
 #endif
@@ -2590,6 +2595,7 @@ extern ssize_t simple_read_from_buffer(void __user *to, size_t count,
 extern ssize_t simple_write_to_buffer(void *to, size_t available, loff_t *ppos,
                 const void __user *from, size_t count);
 
+extern int __generic_file_fsync(struct file *, loff_t, loff_t, int);
 extern int generic_file_fsync(struct file *, loff_t, loff_t, int);
 
 extern int generic_check_addressable(unsigned, u64);
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index ae9504b4b67d..404a686a3644 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -62,9 +62,6 @@ typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip,
  * set in the flags member.
  *
  * ENABLED - set/unset when ftrace_ops is registered/unregistered
- * GLOBAL  - set manualy by ftrace_ops user to denote the ftrace_ops
- *           is part of the global tracers sharing the same filter
- *           via set_ftrace_* debugfs files.
  * DYNAMIC - set when ftrace_ops is registered to denote dynamically
  *           allocated ftrace_ops which need special care
  * CONTROL - set manualy by ftrace_ops user to denote the ftrace_ops
@@ -96,15 +93,14 @@ typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip,
  */
 enum {
         FTRACE_OPS_FL_ENABLED                   = 1 << 0,
-        FTRACE_OPS_FL_GLOBAL                    = 1 << 1,
-        FTRACE_OPS_FL_DYNAMIC                   = 1 << 2,
-        FTRACE_OPS_FL_CONTROL                   = 1 << 3,
-        FTRACE_OPS_FL_SAVE_REGS                 = 1 << 4,
-        FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED    = 1 << 5,
-        FTRACE_OPS_FL_RECURSION_SAFE            = 1 << 6,
-        FTRACE_OPS_FL_STUB                      = 1 << 7,
-        FTRACE_OPS_FL_INITIALIZED               = 1 << 8,
-        FTRACE_OPS_FL_DELETED                   = 1 << 9,
+        FTRACE_OPS_FL_DYNAMIC                   = 1 << 1,
+        FTRACE_OPS_FL_CONTROL                   = 1 << 2,
+        FTRACE_OPS_FL_SAVE_REGS                 = 1 << 3,
+        FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED    = 1 << 4,
+        FTRACE_OPS_FL_RECURSION_SAFE            = 1 << 5,
+        FTRACE_OPS_FL_STUB                      = 1 << 6,
+        FTRACE_OPS_FL_INITIALIZED               = 1 << 7,
+        FTRACE_OPS_FL_DELETED                   = 1 << 8,
 };
 
 /*
@@ -366,14 +362,12 @@ enum {
  *  IGNORE           - The function is already what we want it to be
  *  MAKE_CALL        - Start tracing the function
  *  MODIFY_CALL      - Stop saving regs for the function
- *  MODIFY_CALL_REGS - Start saving regs for the function
  *  MAKE_NOP         - Stop tracing the function
  */
 enum {
         FTRACE_UPDATE_IGNORE,
         FTRACE_UPDATE_MAKE_CALL,
         FTRACE_UPDATE_MODIFY_CALL,
-        FTRACE_UPDATE_MODIFY_CALL_REGS,
         FTRACE_UPDATE_MAKE_NOP,
 };
 
@@ -404,6 +398,8 @@ int ftrace_update_record(struct dyn_ftrace *rec, int enable);
 int ftrace_test_record(struct dyn_ftrace *rec, int enable);
 void ftrace_run_stop_machine(int command);
 unsigned long ftrace_location(unsigned long ip);
+unsigned long ftrace_get_addr_new(struct dyn_ftrace *rec);
+unsigned long ftrace_get_addr_curr(struct dyn_ftrace *rec);
 
 extern ftrace_func_t ftrace_trace_function;
 
@@ -616,25 +612,27 @@ static inline void __ftrace_enabled_restore(int enabled)
 #endif
 }
 
-#ifndef HAVE_ARCH_CALLER_ADDR
+/* All archs should have this, but we define it for consistency */
+#ifndef ftrace_return_address0
+# define ftrace_return_address0 __builtin_return_address(0)
+#endif
+
+/* Archs may use other ways for ADDR1 and beyond */
+#ifndef ftrace_return_address
 # ifdef CONFIG_FRAME_POINTER
-#  define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-#  define CALLER_ADDR1 ((unsigned long)__builtin_return_address(1))
-#  define CALLER_ADDR2 ((unsigned long)__builtin_return_address(2))
-#  define CALLER_ADDR3 ((unsigned long)__builtin_return_address(3))
-#  define CALLER_ADDR4 ((unsigned long)__builtin_return_address(4))
-#  define CALLER_ADDR5 ((unsigned long)__builtin_return_address(5))
-#  define CALLER_ADDR6 ((unsigned long)__builtin_return_address(6))
+#  define ftrace_return_address(n) __builtin_return_address(n)
 # else
-#  define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-#  define CALLER_ADDR1 0UL
-#  define CALLER_ADDR2 0UL
-#  define CALLER_ADDR3 0UL
-#  define CALLER_ADDR4 0UL
-#  define CALLER_ADDR5 0UL
-#  define CALLER_ADDR6 0UL
+#  define ftrace_return_address(n) 0UL
 # endif
-#endif /* ifndef HAVE_ARCH_CALLER_ADDR */
+#endif
+
+#define CALLER_ADDR0 ((unsigned long)ftrace_return_address0)
+#define CALLER_ADDR1 ((unsigned long)ftrace_return_address(1))
+#define CALLER_ADDR2 ((unsigned long)ftrace_return_address(2))
+#define CALLER_ADDR3 ((unsigned long)ftrace_return_address(3))
+#define CALLER_ADDR4 ((unsigned long)ftrace_return_address(4))
+#define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5))
+#define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6))
 
 #ifdef CONFIG_IRQSOFF_TRACER
   extern void time_hardirqs_on(unsigned long a0, unsigned long a1);
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index d16da3e53bc7..cff3106ffe2c 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -38,6 +38,9 @@ const char *ftrace_print_symbols_seq_u64(struct trace_seq *p,
                                                                  *symbol_array);
 #endif
 
+const char *ftrace_print_bitmask_seq(struct trace_seq *p, void *bitmask_ptr,
+                                     unsigned int bitmask_size);
+
 const char *ftrace_print_hex_seq(struct trace_seq *p,
                                  const unsigned char *buf, int len);
 
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 39b81dc7d01a..6eb1fb37de9a 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -6,7 +6,6 @@
 #include <linux/stddef.h>
 #include <linux/linkage.h>
 #include <linux/topology.h>
-#include <linux/mmdebug.h>
 
 struct vm_area_struct;
 
@@ -31,7 +30,6 @@ struct vm_area_struct;
 #define ___GFP_HARDWALL         0x20000u
 #define ___GFP_THISNODE         0x40000u
 #define ___GFP_RECLAIMABLE      0x80000u
-#define ___GFP_KMEMCG           0x100000u
 #define ___GFP_NOTRACK          0x200000u
 #define ___GFP_NO_KSWAPD        0x400000u
 #define ___GFP_OTHER_NODE       0x800000u
@@ -91,7 +89,6 @@ struct vm_area_struct;
 
 #define __GFP_NO_KSWAPD ((__force gfp_t)___GFP_NO_KSWAPD)
 #define __GFP_OTHER_NODE ((__force gfp_t)___GFP_OTHER_NODE) /* On behalf of other node */
-#define __GFP_KMEMCG    ((__force gfp_t)___GFP_KMEMCG) /* Allocation comes from a memcg-accounted resource */
 #define __GFP_WRITE     ((__force gfp_t)___GFP_WRITE)   /* Allocator intends to dirty page */
 
 /*
@@ -353,6 +350,10 @@ extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order,
 #define alloc_page_vma_node(gfp_mask, vma, addr, node)          \
         alloc_pages_vma(gfp_mask, 0, vma, addr, node)
 
+extern struct page *alloc_kmem_pages(gfp_t gfp_mask, unsigned int order);
+extern struct page *alloc_kmem_pages_node(int nid, gfp_t gfp_mask,
+                                          unsigned int order);
+
 extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order);
 extern unsigned long get_zeroed_page(gfp_t gfp_mask);
 
@@ -369,11 +370,11 @@ void *alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask);
 
 extern void __free_pages(struct page *page, unsigned int order);
 extern void free_pages(unsigned long addr, unsigned int order);
-extern void free_hot_cold_page(struct page *page, int cold);
-extern void free_hot_cold_page_list(struct list_head *list, int cold);
+extern void free_hot_cold_page(struct page *page, bool cold);
+extern void free_hot_cold_page_list(struct list_head *list, bool cold);
 
-extern void __free_memcg_kmem_pages(struct page *page, unsigned int order);
-extern void free_memcg_kmem_pages(unsigned long addr, unsigned int order);
+extern void __free_kmem_pages(struct page *page, unsigned int order);
+extern void free_kmem_pages(unsigned long addr, unsigned int order);
 
 #define __free_page(page) __free_pages((page), 0)
 #define free_page(addr) free_pages((addr), 0)
diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
index a7e977ff4abf..8b622468952c 100644
--- a/include/linux/gpio_keys.h
+++ b/include/linux/gpio_keys.h
@@ -3,29 +3,53 @@
 
 struct device;
 
+/**
+ * struct gpio_keys_button - configuration parameters
+ * @code:               input event code (KEY_*, SW_*)
+ * @gpio:               %-1 if this key does not support gpio
+ * @active_low:         %true indicates that button is considered
+ *                      depressed when gpio is low
+ * @desc:               label that will be attached to button's gpio
+ * @type:               input event type (%EV_KEY, %EV_SW, %EV_ABS)
+ * @wakeup:             configure the button as a wake-up source
+ * @debounce_interval:  debounce ticks interval in msecs
+ * @can_disable:        %true indicates that userspace is allowed to
+ *                      disable button via sysfs
+ * @value:              axis value for %EV_ABS
+ * @irq:                Irq number in case of interrupt keys
+ */
 struct gpio_keys_button {
-        /* Configuration parameters */
-        unsigned int code;      /* input event code (KEY_*, SW_*) */
-        int gpio;               /* -1 if this key does not support gpio */
+        unsigned int code;
+        int gpio;
         int active_low;
         const char *desc;
-        unsigned int type;      /* input event type (EV_KEY, EV_SW, EV_ABS) */
-        int wakeup;             /* configure the button as a wake-up source */
-        int debounce_interval;  /* debounce ticks interval in msecs */
+        unsigned int type;
+        int wakeup;
+        int debounce_interval;
         bool can_disable;
-        int value;              /* axis value for EV_ABS */
-        unsigned int irq;       /* Irq number in case of interrupt keys */
+        int value;
+        unsigned int irq;
 };
 
+/**
+ * struct gpio_keys_platform_data - platform data for gpio_keys driver
+ * @buttons:            pointer to array of &gpio_keys_button structures
+ *                      describing buttons attached to the device
+ * @nbuttons:           number of elements in @buttons array
+ * @poll_interval:      polling interval in msecs - for polling driver only
+ * @rep:                enable input subsystem auto repeat
+ * @enable:             platform hook for enabling the device
+ * @disable:            platform hook for disabling the device
+ * @name:               input device name
+ */
 struct gpio_keys_platform_data {
         struct gpio_keys_button *buttons;
         int nbuttons;
-        unsigned int poll_interval;     /* polling interval in msecs -
-                                           for polling driver only */
-        unsigned int rep:1;             /* enable input subsystem auto repeat */
+        unsigned int poll_interval;
+        unsigned int rep:1;
         int (*enable)(struct device *dev);
         void (*disable)(struct device *dev);
-        const char *name;               /* input device name */
+        const char *name;
 };
 
 #endif
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index b65166de1d9d..255cd5cc0754 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -343,6 +343,11 @@ static inline unsigned huge_page_shift(struct hstate *h)
         return h->order + PAGE_SHIFT;
 }
 
+static inline bool hstate_is_gigantic(struct hstate *h)
+{
+        return huge_page_order(h) >= MAX_ORDER;
+}
+
 static inline unsigned int pages_per_huge_page(struct hstate *h)
 {
         return 1 << h->order;
@@ -392,15 +397,13 @@ static inline pgoff_t basepage_index(struct page *page)
 
 extern void dissolve_free_huge_pages(unsigned long start_pfn,
                                      unsigned long end_pfn);
-int pmd_huge_support(void);
-/*
- * Currently hugepage migration is enabled only for pmd-based hugepage.
- * This function will be updated when hugepage migration is more widely
- * supported.
- */
-static inline int hugepage_migration_support(struct hstate *h)
+static inline int hugepage_migration_supported(struct hstate *h)
 {
-        return pmd_huge_support() && (huge_page_shift(h) == PMD_SHIFT);
+#ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+        return huge_page_shift(h) == PMD_SHIFT;
+#else
+        return 0;
+#endif
 }
 
 static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
@@ -450,8 +453,7 @@ static inline pgoff_t basepage_index(struct page *page)
         return page->index;
 }
 #define dissolve_free_huge_pages(s, e)  do {} while (0)
-#define pmd_huge_support()      0
-#define hugepage_migration_support(h)   0
+#define hugepage_migration_supported(h) 0
 
 static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
                                            struct mm_struct *mm, pte_t *pte)
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 99e379b74398..3891dc1de21c 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -15,35 +15,14 @@
 
 #include <linux/types.h>
 
-/* For key_map array */
-#define MXT_NUM_GPIO            4
-
-/* Orient */
-#define MXT_NORMAL              0x0
-#define MXT_DIAGONAL            0x1
-#define MXT_HORIZONTAL_FLIP     0x2
-#define MXT_ROTATED_90_COUNTER  0x3
-#define MXT_VERTICAL_FLIP       0x4
-#define MXT_ROTATED_90          0x5
-#define MXT_ROTATED_180         0x6
-#define MXT_DIAGONAL_COUNTER    0x7
-
 /* The platform data for the Atmel maXTouch touchscreen driver */
 struct mxt_platform_data {
         const u8 *config;
         size_t config_length;
-
-        unsigned int x_line;
-        unsigned int y_line;
-        unsigned int x_size;
-        unsigned int y_size;
-        unsigned int blen;
-        unsigned int threshold;
-        unsigned int voltage;
-        unsigned char orient;
+        u32 config_crc;
         unsigned long irqflags;
-        bool is_tp;
-        const unsigned int key_map[MXT_NUM_GPIO];
+        u8 t19_num_keys;
+        const unsigned int *t19_keymap;
 };
 
 #endif /* __LINUX_ATMEL_MXT_TS_H */
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index d2b16704624c..8cfb50f38529 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -498,7 +498,10 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot)
 #define RES_GRP_ALL             0x7     /* All resource groups */
 
 #define RES_TYPE2_R0            0x0
+#define RES_TYPE2_R1            0x1
+#define RES_TYPE2_R2            0x2
 
+#define RES_TYPE_R0             0x0
 #define RES_TYPE_ALL            0x7
 
 /* Resource states */
@@ -671,6 +674,7 @@ struct twl4030_power_data {
         struct twl4030_script **scripts;
         unsigned num;
         struct twl4030_resconfig *resource_config;
+        struct twl4030_resconfig *board_config;
 #define TWL4030_RESCONFIG_UNDEF ((u8)-1)
         bool use_poweroff;      /* Board is wired for TWL poweroff */
 };
diff --git a/include/linux/idr.h b/include/linux/idr.h
index 6af3400b9b2f..013fd9bc4cb6 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -29,21 +29,24 @@
 
 struct idr_layer {
         int                     prefix; /* the ID prefix of this idr_layer */
-        DECLARE_BITMAP(bitmap, IDR_SIZE); /* A zero bit means "space here" */
+        int                     layer;  /* distance from leaf */
         struct idr_layer __rcu  *ary[1<<IDR_BITS];
         int                     count;  /* When zero, we can release it */
-        int                     layer;  /* distance from leaf */
-        struct rcu_head         rcu_head;
+        union {
+                /* A zero bit means "space here" */
+                DECLARE_BITMAP(bitmap, IDR_SIZE);
+                struct rcu_head         rcu_head;
+        };
 };
 
 struct idr {
         struct idr_layer __rcu  *hint;  /* the last layer allocated from */
         struct idr_layer __rcu  *top;
-        struct idr_layer        *id_free;
         int                     layers; /* only valid w/o concurrent changes */
-        int                     id_free_cnt;
         int                     cur;    /* current pos for cyclic allocation */
         spinlock_t              lock;
+        int                     id_free_cnt;
+        struct idr_layer        *id_free;
 };
 
 #define IDR_INIT(name)                                                  \
diff --git a/include/linux/if_team.h b/include/linux/if_team.h
index a899dc24be15..a6aa970758a2 100644
--- a/include/linux/if_team.h
+++ b/include/linux/if_team.h
@@ -194,6 +194,7 @@ struct team {
         bool user_carrier_enabled;
         bool queue_override_enabled;
         struct list_head *qom_lists; /* array of queue override mapping lists */
+        bool port_mtu_change_allowed;
         struct {
                 unsigned int count;
                 unsigned int interval; /* in ms */
diff --git a/include/linux/input-polldev.h b/include/linux/input-polldev.h
index ce0b72464eb8..2465182670db 100644
--- a/include/linux/input-polldev.h
+++ b/include/linux/input-polldev.h
@@ -48,9 +48,12 @@ struct input_polled_dev {
 
 /* private: */
         struct delayed_work work;
+
+        bool devres_managed;
 };
 
 struct input_polled_dev *input_allocate_polled_device(void);
+struct input_polled_dev *devm_input_allocate_polled_device(struct device *dev);
 void input_free_polled_device(struct input_polled_dev *dev);
 int input_register_polled_device(struct input_polled_dev *dev);
 void input_unregister_polled_device(struct input_polled_dev *dev);
diff --git a/include/linux/input/pixcir_ts.h b/include/linux/input/pixcir_ts.h
index 7163d91c0373..160cf353aa39 100644
--- a/include/linux/input/pixcir_ts.h
+++ b/include/linux/input/pixcir_ts.h
@@ -1,10 +1,52 @@
 #ifndef _PIXCIR_I2C_TS_H
 #define _PIXCIR_I2C_TS_H
 
+/*
+ * Register map
+ */
+#define PIXCIR_REG_POWER_MODE   51
+#define PIXCIR_REG_INT_MODE     52
+
+/*
+ * Power modes:
+ * active: max scan speed
+ * idle: lower scan speed with automatic transition to active on touch
+ * halt: datasheet says sleep but this is more like halt as the chip
+ *       clocks are cut and it can only be brought out of this mode
+ *       using the RESET pin.
+ */
+enum pixcir_power_mode {
+        PIXCIR_POWER_ACTIVE,
+        PIXCIR_POWER_IDLE,
+        PIXCIR_POWER_HALT,
+};
+
+#define PIXCIR_POWER_MODE_MASK  0x03
+#define PIXCIR_POWER_ALLOW_IDLE (1UL << 2)
+
+/*
+ * Interrupt modes:
+ * periodical: interrupt is asserted periodicaly
+ * diff coordinates: interrupt is asserted when coordinates change
+ * level on touch: interrupt level asserted during touch
+ * pulse on touch: interrupt pulse asserted druing touch
+ *
+ */
+enum pixcir_int_mode {
+        PIXCIR_INT_PERIODICAL,
+        PIXCIR_INT_DIFF_COORD,
+        PIXCIR_INT_LEVEL_TOUCH,
+        PIXCIR_INT_PULSE_TOUCH,
+};
+
+#define PIXCIR_INT_MODE_MASK    0x03
+#define PIXCIR_INT_ENABLE       (1UL << 3)
+#define PIXCIR_INT_POL_HIGH     (1UL << 2)
+
 struct pixcir_ts_platform_data {
-        int (*attb_read_val)(void);
         int x_max;
         int y_max;
+        int gpio_attb;          /* GPIO connected to ATTB line */
 };
 
 #endif
diff --git a/include/linux/input/touchscreen.h b/include/linux/input/touchscreen.h
new file mode 100644
index 000000000000..08a5ef6e8f25
--- /dev/null
+++ b/include/linux/input/touchscreen.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2014 Sebastian Reichel <sre@kernel.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#ifndef _TOUCHSCREEN_H
+#define _TOUCHSCREEN_H
+
+#include <linux/input.h>
+
+#ifdef CONFIG_OF
+void touchscreen_parse_of_params(struct input_dev *dev);
+#else
+static inline void touchscreen_parse_of_params(struct input_dev *dev)
+{
+}
+#endif
+
+#endif
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index cb19f09d7e3e..698ad053d064 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -199,6 +199,26 @@ extern int check_wakeup_irqs(void);
 static inline int check_wakeup_irqs(void) { return 0; }
 #endif
 
+/**
+ * struct irq_affinity_notify - context for notification of IRQ affinity changes
+ * @irq:                Interrupt to which notification applies
+ * @kref:               Reference count, for internal use
+ * @work:               Work item, for internal use
+ * @notify:             Function to be called on change.  This will be
+ *                      called in process context.
+ * @release:            Function to be called on release.  This will be
+ *                      called in process context.  Once registered, the
+ *                      structure must only be freed when this function is
+ *                      called or later.
+ */
+struct irq_affinity_notify {
+        unsigned int irq;
+        struct kref kref;
+        struct work_struct work;
+        void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
+        void (*release)(struct kref *ref);
+};
+
 #if defined(CONFIG_SMP)
 
 extern cpumask_var_t irq_default_affinity;
@@ -242,26 +262,6 @@ extern int irq_select_affinity(unsigned int irq);
 
 extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m);
 
-/**
- * struct irq_affinity_notify - context for notification of IRQ affinity changes
- * @irq:                Interrupt to which notification applies
- * @kref:               Reference count, for internal use
- * @work:               Work item, for internal use
- * @notify:             Function to be called on change.  This will be
- *                      called in process context.
- * @release:            Function to be called on release.  This will be
- *                      called in process context.  Once registered, the
- *                      structure must only be freed when this function is
- *                      called or later.
- */
-struct irq_affinity_notify {
-        unsigned int irq;
-        struct kref kref;
-        struct work_struct work;
-        void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
-        void (*release)(struct kref *ref);
-};
-
 extern int
 irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify);
 
@@ -289,6 +289,12 @@ static inline int irq_set_affinity_hint(unsigned int irq,
 {
         return -EINVAL;
 }
+
+static inline int
+irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
+{
+        return 0;
+}
 #endif /* CONFIG_SMP */
 
 /*
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 5c57efb863d0..0d998d8b01d8 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -525,24 +525,6 @@ static inline void irq_set_percpu_devid_flags(unsigned int irq)
                              IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
 }
 
-/* Handle dynamic irq creation and destruction */
-extern unsigned int create_irq_nr(unsigned int irq_want, int node);
-extern unsigned int __create_irqs(unsigned int from, unsigned int count,
-                                  int node);
-extern int create_irq(void);
-extern void destroy_irq(unsigned int irq);
-extern void destroy_irqs(unsigned int irq, unsigned int count);
-
-/*
- * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
- * irq_free_desc instead.
- */
-extern void dynamic_irq_cleanup(unsigned int irq);
-static inline void dynamic_irq_init(unsigned int irq)
-{
-        dynamic_irq_cleanup(irq);
-}
-
 /* Set/get chip/data for an IRQ: */
 extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
 extern int irq_set_handler_data(unsigned int irq, void *data);
@@ -625,17 +607,29 @@ int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
         irq_alloc_descs(-1, from, cnt, node)
 
 void irq_free_descs(unsigned int irq, unsigned int cnt);
-int irq_reserve_irqs(unsigned int from, unsigned int cnt);
-
 static inline void irq_free_desc(unsigned int irq)
 {
         irq_free_descs(irq, 1);
 }
 
-static inline int irq_reserve_irq(unsigned int irq)
+#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
+unsigned int irq_alloc_hwirqs(int cnt, int node);
+static inline unsigned int irq_alloc_hwirq(int node)
+{
+        return irq_alloc_hwirqs(1, node);
+}
+void irq_free_hwirqs(unsigned int from, int cnt);
+static inline void irq_free_hwirq(unsigned int irq)
 {
-        return irq_reserve_irqs(irq, 1);
+        return irq_free_hwirqs(irq, 1);
 }
+int arch_setup_hwirq(unsigned int irq, int node);
+void arch_teardown_hwirq(unsigned int irq);
+#endif
+
+#ifdef CONFIG_GENERIC_IRQ_LEGACY
+void irq_init_desc(unsigned int irq);
+#endif
 
 #ifndef irq_reg_writel
 # define irq_reg_writel(val, addr)      writel(val, addr)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 7ed92d0560d5..45e2d8c15bd2 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -21,6 +21,8 @@
 #define GIC_CPU_ACTIVEPRIO              0xd0
 #define GIC_CPU_IDENT                   0xfc
 
+#define GICC_IAR_INT_ID_MASK            0x3ff
+
 #define GIC_DIST_CTRL                   0x000
 #define GIC_DIST_CTR                    0x004
 #define GIC_DIST_IGROUP                 0x080
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 26e2661d3935..472c021a2d4f 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -27,6 +27,8 @@ struct irq_desc;
  * @irq_count:          stats field to detect stalled irqs
  * @last_unhandled:     aging timer for unhandled count
  * @irqs_unhandled:     stats field for spurious unhandled interrupts
+ * @threads_handled:    stats field for deferred spurious detection of threaded handlers
+ * @threads_handled_last: comparator field for deferred spurious detection of theraded handlers
  * @lock:               locking for SMP
  * @affinity_hint:      hint to user space for preferred irq affinity
  * @affinity_notify:    context for notification of affinity changes
@@ -52,6 +54,8 @@ struct irq_desc {
         unsigned int            irq_count;      /* For detecting broken IRQs */
         unsigned long           last_unhandled; /* Aging timer for unhandled count */
         unsigned int            irqs_unhandled;
+        atomic_t                threads_handled;
+        int                     threads_handled_last;
         raw_spinlock_t          lock;
         struct cpumask          *percpu_enabled;
 #ifdef CONFIG_SMP
diff --git a/include/linux/jump_label.h b/include/linux/jump_label.h
index 5c1dfb2a9e73..784304b222b3 100644
--- a/include/linux/jump_label.h
+++ b/include/linux/jump_label.h
@@ -69,6 +69,10 @@ struct static_key {
 
 # include <asm/jump_label.h>
 # define HAVE_JUMP_LABEL
+#else
+struct static_key {
+        atomic_t enabled;
+};
 #endif  /* CC_HAVE_ASM_GOTO && CONFIG_JUMP_LABEL */
 
 enum jump_label_type {
@@ -79,6 +83,12 @@ enum jump_label_type {
 struct module;
 
 #include <linux/atomic.h>
+
+static inline int static_key_count(struct static_key *key)
+{
+        return atomic_read(&key->enabled);
+}
+
 #ifdef HAVE_JUMP_LABEL
 
 #define JUMP_LABEL_TYPE_FALSE_BRANCH    0UL
@@ -134,10 +144,6 @@ extern void jump_label_apply_nops(struct module *mod);
 
 #else  /* !HAVE_JUMP_LABEL */
 
-struct static_key {
-        atomic_t enabled;
-};
-
 static __always_inline void jump_label_init(void)
 {
         static_key_initialized = true;
@@ -145,14 +151,14 @@ static __always_inline void jump_label_init(void)
 
 static __always_inline bool static_key_false(struct static_key *key)
 {
-        if (unlikely(atomic_read(&key->enabled) > 0))
+        if (unlikely(static_key_count(key) > 0))
                 return true;
         return false;
 }
 
 static __always_inline bool static_key_true(struct static_key *key)
 {
-        if (likely(atomic_read(&key->enabled) > 0))
+        if (likely(static_key_count(key) > 0))
                 return true;
         return false;
 }
@@ -194,7 +200,7 @@ static inline int jump_label_apply_nops(struct module *mod)
 
 static inline bool static_key_enabled(struct static_key *key)
 {
-        return (atomic_read(&key->enabled) > 0);
+        return static_key_count(key) > 0;
 }
 
 #endif  /* _LINUX_JUMP_LABEL_H */
diff --git a/include/linux/key.h b/include/linux/key.h
index 80d677483e31..017b0826642f 100644
--- a/include/linux/key.h
+++ b/include/linux/key.h
@@ -309,6 +309,17 @@ static inline key_serial_t key_serial(const struct key *key)
 
 extern void key_set_timeout(struct key *, unsigned);
 
+/*
+ * The permissions required on a key that we're looking up.
+ */
+#define KEY_NEED_VIEW   0x01    /* Require permission to view attributes */
+#define KEY_NEED_READ   0x02    /* Require permission to read content */
+#define KEY_NEED_WRITE  0x04    /* Require permission to update / modify */
+#define KEY_NEED_SEARCH 0x08    /* Require permission to search (keyring) or find (key) */
+#define KEY_NEED_LINK   0x10    /* Require permission to link */
+#define KEY_NEED_SETATTR 0x20   /* Require permission to change attributes */
+#define KEY_NEED_ALL    0x3f    /* All the above permissions */
+
 /**
  * key_is_instantiated - Determine if a key has been positively instantiated
  * @key: The key to check.
@@ -332,7 +343,7 @@ do {									\
 } while (0)
 
 #ifdef CONFIG_SYSCTL
-extern ctl_table key_sysctls[];
+extern struct ctl_table key_sysctls[];
 #endif
 /*
  * the userspace interface
diff --git a/include/linux/kmemleak.h b/include/linux/kmemleak.h
index 5bb424659c04..057e95971014 100644
--- a/include/linux/kmemleak.h
+++ b/include/linux/kmemleak.h
@@ -30,6 +30,7 @@ extern void kmemleak_alloc_percpu(const void __percpu *ptr, size_t size) __ref;
 extern void kmemleak_free(const void *ptr) __ref;
 extern void kmemleak_free_part(const void *ptr, size_t size) __ref;
 extern void kmemleak_free_percpu(const void __percpu *ptr) __ref;
+extern void kmemleak_update_trace(const void *ptr) __ref;
 extern void kmemleak_not_leak(const void *ptr) __ref;
 extern void kmemleak_ignore(const void *ptr) __ref;
 extern void kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) __ref;
@@ -83,6 +84,9 @@ static inline void kmemleak_free_recursive(const void *ptr, unsigned long flags)
 static inline void kmemleak_free_percpu(const void __percpu *ptr)
 {
 }
+static inline void kmemleak_update_trace(const void *ptr)
+{
+}
 static inline void kmemleak_not_leak(const void *ptr)
 {
 }
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 925eaf28fca9..7bd2ad01e39c 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -355,7 +355,7 @@ static inline void reset_current_kprobe(void)
 
 static inline struct kprobe_ctlblk *get_kprobe_ctlblk(void)
 {
-        return (&__get_cpu_var(kprobe_ctlblk));
+        return this_cpu_ptr(&kprobe_ctlblk);
 }
 
 int register_kprobe(struct kprobe *p);
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index dcaad79f54ed..219d79627c05 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -17,13 +17,13 @@
 #include <linux/fs.h>
 #include <linux/kref.h>
 #include <linux/utsname.h>
-#include <linux/nfsd/nfsfh.h>
 #include <linux/lockd/bind.h>
 #include <linux/lockd/xdr.h>
 #ifdef CONFIG_LOCKD_V4
 #include <linux/lockd/xdr4.h>
 #endif
 #include <linux/lockd/debug.h>
+#include <linux/sunrpc/svc.h>
 
 /*
  * Version string
diff --git a/include/linux/mc146818rtc.h b/include/linux/mc146818rtc.h
index 2f4e957af656..433e0c74d643 100644
--- a/include/linux/mc146818rtc.h
+++ b/include/linux/mc146818rtc.h
@@ -31,6 +31,10 @@ struct cmos_rtc_board_info {
         void    (*wake_on)(struct device *dev);
         void    (*wake_off)(struct device *dev);
 
+        u32     flags;
+#define CMOS_RTC_FLAGS_NOFREQ   (1 << 0)
+        int     address_space;
+
         u8      rtc_day_alarm;          /* zero, or register index */
         u8      rtc_mon_alarm;          /* zero, or register index */
         u8      rtc_century;            /* zero, or register index */
diff --git a/include/linux/memblock.h b/include/linux/memblock.h
index 73dc382e72d8..b660e05b63d4 100644
--- a/include/linux/memblock.h
+++ b/include/linux/memblock.h
@@ -272,6 +272,8 @@ static inline bool memblock_bottom_up(void) { return false; }
 #define MEMBLOCK_ALLOC_ANYWHERE (~(phys_addr_t)0)
 #define MEMBLOCK_ALLOC_ACCESSIBLE       0
 
+phys_addr_t __init memblock_alloc_range(phys_addr_t size, phys_addr_t align,
+                                        phys_addr_t start, phys_addr_t end);
 phys_addr_t memblock_alloc_base(phys_addr_t size, phys_addr_t align,
                                 phys_addr_t max_addr);
 phys_addr_t __memblock_alloc_base(phys_addr_t size, phys_addr_t align,
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index b569b8be5c5a..eb65d29516ca 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -492,13 +492,9 @@ void __memcg_kmem_uncharge_pages(struct page *page, int order);
 
 int memcg_cache_id(struct mem_cgroup *memcg);
 
-char *memcg_create_cache_name(struct mem_cgroup *memcg,
-                              struct kmem_cache *root_cache);
 int memcg_alloc_cache_params(struct mem_cgroup *memcg, struct kmem_cache *s,
                              struct kmem_cache *root_cache);
 void memcg_free_cache_params(struct kmem_cache *s);
-void memcg_register_cache(struct kmem_cache *s);
-void memcg_unregister_cache(struct kmem_cache *s);
 
 int memcg_update_cache_size(struct kmem_cache *s, int num_groups);
 void memcg_update_array_size(int num_groups);
@@ -506,8 +502,10 @@ void memcg_update_array_size(int num_groups);
 struct kmem_cache *
 __memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp);
 
-void mem_cgroup_destroy_cache(struct kmem_cache *cachep);
-int __kmem_cache_destroy_memcg_children(struct kmem_cache *s);
+int __memcg_charge_slab(struct kmem_cache *cachep, gfp_t gfp, int order);
+void __memcg_uncharge_slab(struct kmem_cache *cachep, int order);
+
+int __memcg_cleanup_cache_params(struct kmem_cache *s);
 
 /**
  * memcg_kmem_newpage_charge: verify if a new kmem allocation is allowed.
@@ -534,7 +532,7 @@ memcg_kmem_newpage_charge(gfp_t gfp, struct mem_cgroup **memcg, int order)
          * res_counter_charge_nofail, but we hope those allocations are rare,
          * and won't be worth the trouble.
          */
-        if (!(gfp & __GFP_KMEMCG) || (gfp & __GFP_NOFAIL))
+        if (gfp & __GFP_NOFAIL)
                 return true;
         if (in_interrupt() || (!current->mm) || (current->flags & PF_KTHREAD))
                 return true;
@@ -583,17 +581,7 @@ memcg_kmem_commit_charge(struct page *page, struct mem_cgroup *memcg, int order)
  * @cachep: the original global kmem cache
  * @gfp: allocation flags.
  *
- * This function assumes that the task allocating, which determines the memcg
- * in the page allocator, belongs to the same cgroup throughout the whole
- * process.  Misacounting can happen if the task calls memcg_kmem_get_cache()
- * while belonging to a cgroup, and later on changes. This is considered
- * acceptable, and should only happen upon task migration.
- *
- * Before the cache is created by the memcg core, there is also a possible
- * imbalance: the task belongs to a memcg, but the cache being allocated from
- * is the global cache, since the child cache is not yet guaranteed to be
- * ready. This case is also fine, since in this case the GFP_KMEMCG will not be
- * passed and the page allocator will not attempt any cgroup accounting.
+ * All memory allocated from a per-memcg cache is charged to the owner memcg.
  */
 static __always_inline struct kmem_cache *
 memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
@@ -648,14 +636,6 @@ static inline void memcg_free_cache_params(struct kmem_cache *s)
 {
 }
 
-static inline void memcg_register_cache(struct kmem_cache *s)
-{
-}
-
-static inline void memcg_unregister_cache(struct kmem_cache *s)
-{
-}
-
 static inline struct kmem_cache *
 memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
 {
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 4ca3d951fe91..010d125bffbf 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -187,14 +187,8 @@ extern void put_page_bootmem(struct page *page);
 extern void get_page_bootmem(unsigned long ingo, struct page *page,
                              unsigned long type);
 
-/*
- * Lock for memory hotplug guarantees 1) all callbacks for memory hotplug
- * notifier will be called under this. 2) offline/online/add/remove memory
- * will not run simultaneously.
- */
-
-void lock_memory_hotplug(void);
-void unlock_memory_hotplug(void);
+void get_online_mems(void);
+void put_online_mems(void);
 
 #else /* ! CONFIG_MEMORY_HOTPLUG */
 /*
@@ -232,8 +226,8 @@ static inline int try_online_node(int nid)
         return 0;
 }
 
-static inline void lock_memory_hotplug(void) {}
-static inline void unlock_memory_hotplug(void) {}
+static inline void get_online_mems(void) {}
+static inline void put_online_mems(void) {}
 
 #endif /* ! CONFIG_MEMORY_HOTPLUG */
 
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 3c1b968da0ca..f230a978e6ba 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -175,6 +175,12 @@ static inline int vma_migratable(struct vm_area_struct *vma)
 {
         if (vma->vm_flags & (VM_IO | VM_PFNMAP))
                 return 0;
+
+#ifndef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+        if (vma->vm_flags & VM_HUGETLB)
+                return 0;
+#endif
+
         /*
          * Migration allocates pages in the highest zone. If we cannot
          * do so then migration (at least from node to node) is not
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h
index 3301b2031c8d..552cc1d61cc7 100644
--- a/include/linux/mfd/abx500.h
+++ b/include/linux/mfd/abx500.h
@@ -330,7 +330,6 @@ int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank,
 int abx500_get_chip_id(struct device *dev);
 int abx500_event_registers_startup_state_get(struct device *dev, u8 *event);
 int abx500_startup_irq_enabled(struct device *dev, unsigned int irq);
-void abx500_dump_all_banks(void);
 
 struct abx500_ops {
         int (*get_chip_id) (struct device *);
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 7b35c21170d5..7204d8138b24 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -42,12 +42,14 @@
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2    0x62
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3    0x63
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4    0x64
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D
 #define ARIZONA_COMFORT_NOISE_GENERATOR          0x70
 #define ARIZONA_HAPTICS_CONTROL_1                0x90
 #define ARIZONA_HAPTICS_CONTROL_2                0x91
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
new file mode 100644
index 000000000000..d0e31a2287ac
--- /dev/null
+++ b/include/linux/mfd/axp20x.h
@@ -0,0 +1,180 @@
+/*
+ * Functions and registers to access AXP20X power management chip.
+ *
+ * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MFD_AXP20X_H
+#define __LINUX_MFD_AXP20X_H
+
+enum {
+        AXP202_ID = 0,
+        AXP209_ID,
+};
+
+#define AXP20X_DATACACHE(m)             (0x04 + (m))
+
+/* Power supply */
+#define AXP20X_PWR_INPUT_STATUS         0x00
+#define AXP20X_PWR_OP_MODE              0x01
+#define AXP20X_USB_OTG_STATUS           0x02
+#define AXP20X_PWR_OUT_CTRL             0x12
+#define AXP20X_DCDC2_V_OUT              0x23
+#define AXP20X_DCDC2_LDO3_V_SCAL        0x25
+#define AXP20X_DCDC3_V_OUT              0x27
+#define AXP20X_LDO24_V_OUT              0x28
+#define AXP20X_LDO3_V_OUT               0x29
+#define AXP20X_VBUS_IPSOUT_MGMT         0x30
+#define AXP20X_V_OFF                    0x31
+#define AXP20X_OFF_CTRL                 0x32
+#define AXP20X_CHRG_CTRL1               0x33
+#define AXP20X_CHRG_CTRL2               0x34
+#define AXP20X_CHRG_BAK_CTRL            0x35
+#define AXP20X_PEK_KEY                  0x36
+#define AXP20X_DCDC_FREQ                0x37
+#define AXP20X_V_LTF_CHRG               0x38
+#define AXP20X_V_HTF_CHRG               0x39
+#define AXP20X_APS_WARN_L1              0x3a
+#define AXP20X_APS_WARN_L2              0x3b
+#define AXP20X_V_LTF_DISCHRG            0x3c
+#define AXP20X_V_HTF_DISCHRG            0x3d
+
+/* Interrupt */
+#define AXP20X_IRQ1_EN                  0x40
+#define AXP20X_IRQ2_EN                  0x41
+#define AXP20X_IRQ3_EN                  0x42
+#define AXP20X_IRQ4_EN                  0x43
+#define AXP20X_IRQ5_EN                  0x44
+#define AXP20X_IRQ1_STATE               0x48
+#define AXP20X_IRQ2_STATE               0x49
+#define AXP20X_IRQ3_STATE               0x4a
+#define AXP20X_IRQ4_STATE               0x4b
+#define AXP20X_IRQ5_STATE               0x4c
+
+/* ADC */
+#define AXP20X_ACIN_V_ADC_H             0x56
+#define AXP20X_ACIN_V_ADC_L             0x57
+#define AXP20X_ACIN_I_ADC_H             0x58
+#define AXP20X_ACIN_I_ADC_L             0x59
+#define AXP20X_VBUS_V_ADC_H             0x5a
+#define AXP20X_VBUS_V_ADC_L             0x5b
+#define AXP20X_VBUS_I_ADC_H             0x5c
+#define AXP20X_VBUS_I_ADC_L             0x5d
+#define AXP20X_TEMP_ADC_H               0x5e
+#define AXP20X_TEMP_ADC_L               0x5f
+#define AXP20X_TS_IN_H                  0x62
+#define AXP20X_TS_IN_L                  0x63
+#define AXP20X_GPIO0_V_ADC_H            0x64
+#define AXP20X_GPIO0_V_ADC_L            0x65
+#define AXP20X_GPIO1_V_ADC_H            0x66
+#define AXP20X_GPIO1_V_ADC_L            0x67
+#define AXP20X_PWR_BATT_H               0x70
+#define AXP20X_PWR_BATT_M               0x71
+#define AXP20X_PWR_BATT_L               0x72
+#define AXP20X_BATT_V_H                 0x78
+#define AXP20X_BATT_V_L                 0x79
+#define AXP20X_BATT_CHRG_I_H            0x7a
+#define AXP20X_BATT_CHRG_I_L            0x7b
+#define AXP20X_BATT_DISCHRG_I_H         0x7c
+#define AXP20X_BATT_DISCHRG_I_L         0x7d
+#define AXP20X_IPSOUT_V_HIGH_H          0x7e
+#define AXP20X_IPSOUT_V_HIGH_L          0x7f
+
+/* Power supply */
+#define AXP20X_DCDC_MODE                0x80
+#define AXP20X_ADC_EN1                  0x82
+#define AXP20X_ADC_EN2                  0x83
+#define AXP20X_ADC_RATE                 0x84
+#define AXP20X_GPIO10_IN_RANGE          0x85
+#define AXP20X_GPIO1_ADC_IRQ_RIS        0x86
+#define AXP20X_GPIO1_ADC_IRQ_FAL        0x87
+#define AXP20X_TIMER_CTRL               0x8a
+#define AXP20X_VBUS_MON                 0x8b
+#define AXP20X_OVER_TMP                 0x8f
+
+/* GPIO */
+#define AXP20X_GPIO0_CTRL               0x90
+#define AXP20X_LDO5_V_OUT               0x91
+#define AXP20X_GPIO1_CTRL               0x92
+#define AXP20X_GPIO2_CTRL               0x93
+#define AXP20X_GPIO20_SS                0x94
+#define AXP20X_GPIO3_CTRL               0x95
+
+/* Battery */
+#define AXP20X_CHRG_CC_31_24            0xb0
+#define AXP20X_CHRG_CC_23_16            0xb1
+#define AXP20X_CHRG_CC_15_8             0xb2
+#define AXP20X_CHRG_CC_7_0              0xb3
+#define AXP20X_DISCHRG_CC_31_24         0xb4
+#define AXP20X_DISCHRG_CC_23_16         0xb5
+#define AXP20X_DISCHRG_CC_15_8          0xb6
+#define AXP20X_DISCHRG_CC_7_0           0xb7
+#define AXP20X_CC_CTRL                  0xb8
+#define AXP20X_FG_RES                   0xb9
+
+/* Regulators IDs */
+enum {
+        AXP20X_LDO1 = 0,
+        AXP20X_LDO2,
+        AXP20X_LDO3,
+        AXP20X_LDO4,
+        AXP20X_LDO5,
+        AXP20X_DCDC2,
+        AXP20X_DCDC3,
+        AXP20X_REG_ID_MAX,
+};
+
+/* IRQs */
+enum {
+        AXP20X_IRQ_ACIN_OVER_V = 1,
+        AXP20X_IRQ_ACIN_PLUGIN,
+        AXP20X_IRQ_ACIN_REMOVAL,
+        AXP20X_IRQ_VBUS_OVER_V,
+        AXP20X_IRQ_VBUS_PLUGIN,
+        AXP20X_IRQ_VBUS_REMOVAL,
+        AXP20X_IRQ_VBUS_V_LOW,
+        AXP20X_IRQ_BATT_PLUGIN,
+        AXP20X_IRQ_BATT_REMOVAL,
+        AXP20X_IRQ_BATT_ENT_ACT_MODE,
+        AXP20X_IRQ_BATT_EXIT_ACT_MODE,
+        AXP20X_IRQ_CHARG,
+        AXP20X_IRQ_CHARG_DONE,
+        AXP20X_IRQ_BATT_TEMP_HIGH,
+        AXP20X_IRQ_BATT_TEMP_LOW,
+        AXP20X_IRQ_DIE_TEMP_HIGH,
+        AXP20X_IRQ_CHARG_I_LOW,
+        AXP20X_IRQ_DCDC1_V_LONG,
+        AXP20X_IRQ_DCDC2_V_LONG,
+        AXP20X_IRQ_DCDC3_V_LONG,
+        AXP20X_IRQ_PEK_SHORT = 22,
+        AXP20X_IRQ_PEK_LONG,
+        AXP20X_IRQ_N_OE_PWR_ON,
+        AXP20X_IRQ_N_OE_PWR_OFF,
+        AXP20X_IRQ_VBUS_VALID,
+        AXP20X_IRQ_VBUS_NOT_VALID,
+        AXP20X_IRQ_VBUS_SESS_VALID,
+        AXP20X_IRQ_VBUS_SESS_END,
+        AXP20X_IRQ_LOW_PWR_LVL1,
+        AXP20X_IRQ_LOW_PWR_LVL2,
+        AXP20X_IRQ_TIMER,
+        AXP20X_IRQ_PEK_RIS_EDGE,
+        AXP20X_IRQ_PEK_FAL_EDGE,
+        AXP20X_IRQ_GPIO3_INPUT,
+        AXP20X_IRQ_GPIO2_INPUT,
+        AXP20X_IRQ_GPIO1_INPUT,
+        AXP20X_IRQ_GPIO0_INPUT,
+};
+
+struct axp20x_dev {
+        struct device                   *dev;
+        struct i2c_client               *i2c_client;
+        struct regmap                   *regmap;
+        struct regmap_irq_chip_data     *regmap_irqc;
+        long                            variant;
+};
+
+#endif /* __LINUX_MFD_AXP20X_H */
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 032af7fc5b2e..887ef4f7bef7 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -29,8 +29,8 @@ enum {
         EC_MSG_RX_PROTO_BYTES   = 3,
 
         /* Max length of messages */
-        EC_MSG_BYTES            = EC_HOST_PARAM_SIZE + EC_MSG_TX_PROTO_BYTES,
-
+        EC_MSG_BYTES            = EC_PROTO2_MAX_PARAM_SIZE +
+                                        EC_MSG_TX_PROTO_BYTES,
 };
 
 /**
diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h
index 86fd06953bcd..7853a6410d14 100644
--- a/include/linux/mfd/cros_ec_commands.h
+++ b/include/linux/mfd/cros_ec_commands.h
@@ -24,25 +24,12 @@
 #define __CROS_EC_COMMANDS_H
 
 /*
- * Protocol overview
+ * Current version of this protocol
  *
- * request:  CMD [ P0 P1 P2 ... Pn S ]
- * response: ERR [ P0 P1 P2 ... Pn S ]
- *
- * where the bytes are defined as follow :
- *      - CMD is the command code. (defined by EC_CMD_ constants)
- *      - ERR is the error code. (defined by EC_RES_ constants)
- *      - Px is the optional payload.
- *        it is not sent if the error code is not success.
- *        (defined by ec_params_ and ec_response_ structures)
- *      - S is the checksum which is the sum of all payload bytes.
- *
- * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
- * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
- * On I2C, all bytes are sent serially in the same message.
+ * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
+ * determined in other ways.  Remove this once the kernel code no longer
+ * depends on it.
  */
-
-/* Current version of this protocol */
 #define EC_PROTO_VERSION          0x00000002
 
 /* Command version mask */
@@ -57,13 +44,19 @@
 #define EC_LPC_ADDR_HOST_CMD   0x204
 
 /* I/O addresses for host command args and params */
-#define EC_LPC_ADDR_HOST_ARGS  0x800
-#define EC_LPC_ADDR_HOST_PARAM 0x804
-#define EC_HOST_PARAM_SIZE     0x0fc  /* Size of param area in bytes */
-
-/* I/O addresses for host command params, old interface */
-#define EC_LPC_ADDR_OLD_PARAM  0x880
-#define EC_OLD_PARAM_SIZE      0x080  /* Size of param area in bytes */
+/* Protocol version 2 */
+#define EC_LPC_ADDR_HOST_ARGS    0x800  /* And 0x801, 0x802, 0x803 */
+#define EC_LPC_ADDR_HOST_PARAM   0x804  /* For version 2 params; size is
+                                         * EC_PROTO2_MAX_PARAM_SIZE */
+/* Protocol version 3 */
+#define EC_LPC_ADDR_HOST_PACKET  0x800  /* Offset of version 3 packet */
+#define EC_LPC_HOST_PACKET_SIZE  0x100  /* Max size of version 3 packet */
+
+/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
+ * and they tell the kernel that so we have to think of it as two parts. */
+#define EC_HOST_CMD_REGION0    0x800
+#define EC_HOST_CMD_REGION1    0x880
+#define EC_HOST_CMD_REGION_SIZE 0x80
 
 /* EC command register bit functions */
 #define EC_LPC_CMDR_DATA        (1 << 0)  /* Data ready for host to read */
@@ -79,18 +72,22 @@
 #define EC_MEMMAP_TEXT_MAX     8   /* Size of a string in the memory map */
 
 /* The offset address of each type of data in mapped memory. */
-#define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors */
-#define EC_MEMMAP_FAN              0x10 /* Fan speeds */
-#define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* Temp sensors (second set) */
-#define EC_MEMMAP_ID               0x20 /* 'E' 'C' */
+#define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors 0x00 - 0x0f */
+#define EC_MEMMAP_FAN              0x10 /* Fan speeds 0x10 - 0x17 */
+#define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* More temp sensors 0x18 - 0x1f */
+#define EC_MEMMAP_ID               0x20 /* 0x20 == 'E', 0x21 == 'C' */
 #define EC_MEMMAP_ID_VERSION       0x22 /* Version of data in 0x20 - 0x2f */
 #define EC_MEMMAP_THERMAL_VERSION  0x23 /* Version of data in 0x00 - 0x1f */
 #define EC_MEMMAP_BATTERY_VERSION  0x24 /* Version of data in 0x40 - 0x7f */
 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
 #define EC_MEMMAP_EVENTS_VERSION   0x26 /* Version of data in 0x34 - 0x3f */
-#define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host command interface flags */
-#define EC_MEMMAP_SWITCHES         0x30
-#define EC_MEMMAP_HOST_EVENTS      0x34
+#define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host cmd interface flags (8 bits) */
+/* Unused 0x28 - 0x2f */
+#define EC_MEMMAP_SWITCHES         0x30 /* 8 bits */
+/* Unused 0x31 - 0x33 */
+#define EC_MEMMAP_HOST_EVENTS      0x34 /* 32 bits */
+/* Reserve 0x38 - 0x3f for additional host event-related stuff */
+/* Battery values are all 32 bits */
 #define EC_MEMMAP_BATT_VOLT        0x40 /* Battery Present Voltage */
 #define EC_MEMMAP_BATT_RATE        0x44 /* Battery Present Rate */
 #define EC_MEMMAP_BATT_CAP         0x48 /* Battery Remaining Capacity */
@@ -99,10 +96,24 @@
 #define EC_MEMMAP_BATT_DVLT        0x54 /* Battery Design Voltage */
 #define EC_MEMMAP_BATT_LFCC        0x58 /* Battery Last Full Charge Capacity */
 #define EC_MEMMAP_BATT_CCNT        0x5c /* Battery Cycle Count */
+/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
 #define EC_MEMMAP_BATT_MFGR        0x60 /* Battery Manufacturer String */
 #define EC_MEMMAP_BATT_MODEL       0x68 /* Battery Model Number String */
 #define EC_MEMMAP_BATT_SERIAL      0x70 /* Battery Serial Number String */
 #define EC_MEMMAP_BATT_TYPE        0x78 /* Battery Type String */
+#define EC_MEMMAP_ALS              0x80 /* ALS readings in lux (2 X 16 bits) */
+/* Unused 0x84 - 0x8f */
+#define EC_MEMMAP_ACC_STATUS       0x90 /* Accelerometer status (8 bits )*/
+/* Unused 0x91 */
+#define EC_MEMMAP_ACC_DATA         0x92 /* Accelerometer data 0x92 - 0x9f */
+#define EC_MEMMAP_GYRO_DATA        0xa0 /* Gyroscope data 0xa0 - 0xa5 */
+/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
+
+
+/* Define the format of the accelerometer mapped memory status byte. */
+#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK  0x0f
+#define EC_MEMMAP_ACC_STATUS_BUSY_BIT        (1 << 4)
+#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT    (1 << 7)
 
 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
 #define EC_TEMP_SENSOR_ENTRIES     16
@@ -112,6 +123,8 @@
  * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
  */
 #define EC_TEMP_SENSOR_B_ENTRIES      8
+
+/* Special values for mapped temperature sensors */
 #define EC_TEMP_SENSOR_NOT_PRESENT    0xff
 #define EC_TEMP_SENSOR_ERROR          0xfe
 #define EC_TEMP_SENSOR_NOT_POWERED    0xfd
@@ -122,6 +135,18 @@
  */
 #define EC_TEMP_SENSOR_OFFSET      200
 
+/*
+ * Number of ALS readings at EC_MEMMAP_ALS
+ */
+#define EC_ALS_ENTRIES             2
+
+/*
+ * The default value a temperature sensor will return when it is present but
+ * has not been read this boot.  This is a reasonable number to avoid
+ * triggering alarms on the host.
+ */
+#define EC_TEMP_SENSOR_DEFAULT     (296 - EC_TEMP_SENSOR_OFFSET)
+
 #define EC_FAN_SPEED_ENTRIES       4       /* Number of fans at EC_MEMMAP_FAN */
 #define EC_FAN_SPEED_NOT_PRESENT   0xffff  /* Entry not present */
 #define EC_FAN_SPEED_STALLED       0xfffe  /* Fan stalled */
@@ -137,8 +162,8 @@
 #define EC_SWITCH_LID_OPEN               0x01
 #define EC_SWITCH_POWER_BUTTON_PRESSED   0x02
 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
-/* Recovery requested via keyboard */
-#define EC_SWITCH_KEYBOARD_RECOVERY      0x08
+/* Was recovery requested via keyboard; now unused. */
+#define EC_SWITCH_IGNORE1                0x08
 /* Recovery requested via dedicated signal (from servo board) */
 #define EC_SWITCH_DEDICATED_RECOVERY     0x10
 /* Was fake developer mode switch; now unused.  Remove in next refactor. */
@@ -147,10 +172,15 @@
 /* Host command interface flags */
 /* Host command interface supports LPC args (LPC interface only) */
 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED  0x01
+/* Host command interface supports version 3 protocol */
+#define EC_HOST_CMD_FLAG_VERSION_3   0x02
 
 /* Wireless switch flags */
-#define EC_WIRELESS_SWITCH_WLAN      0x01
-#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
+#define EC_WIRELESS_SWITCH_ALL       ~0x00  /* All flags */
+#define EC_WIRELESS_SWITCH_WLAN       0x01  /* WLAN radio */
+#define EC_WIRELESS_SWITCH_BLUETOOTH  0x02  /* Bluetooth radio */
+#define EC_WIRELESS_SWITCH_WWAN       0x04  /* WWAN power */
+#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08  /* WLAN power */
 
 /*
  * This header file is used in coreboot both in C and ACPI code.  The ACPI code
@@ -159,6 +189,14 @@
  */
 #ifndef __ACPI__
 
+/*
+ * Define __packed if someone hasn't beat us to it.  Linux kernel style
+ * checking prefers __packed over __attribute__((packed)).
+ */
+#ifndef __packed
+#define __packed __attribute__((packed))
+#endif
+
 /* LPC command status byte masks */
 /* EC has written a byte in the data register and host hasn't read it yet */
 #define EC_LPC_STATUS_TO_HOST     0x01
@@ -198,6 +236,9 @@ enum ec_status {
         EC_RES_UNAVAILABLE = 9,         /* No response available */
         EC_RES_TIMEOUT = 10,            /* We got a timeout */
         EC_RES_OVERFLOW = 11,           /* Table / data overflow */
+        EC_RES_INVALID_HEADER = 12,     /* Header contains invalid data */
+        EC_RES_REQUEST_TRUNCATED = 13,  /* Didn't get the entire request */
+        EC_RES_RESPONSE_TOO_BIG = 14    /* Response was too big to handle */
 };
 
 /*
@@ -235,6 +276,16 @@ enum host_event_code {
         /* Shutdown due to battery level too low */
         EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
 
+        /* Suggest that the AP throttle itself */
+        EC_HOST_EVENT_THROTTLE_START = 18,
+        /* Suggest that the AP resume normal speed */
+        EC_HOST_EVENT_THROTTLE_STOP = 19,
+
+        /* Hang detect logic detected a hang and host event timeout expired */
+        EC_HOST_EVENT_HANG_DETECT = 20,
+        /* Hang detect logic detected a hang and warm rebooted the AP */
+        EC_HOST_EVENT_HANG_REBOOT = 21,
+
         /*
          * The high bit of the event mask is not used as a host event code.  If
          * it reads back as set, then the entire event mask should be
@@ -279,6 +330,188 @@ struct ec_lpc_host_args {
  */
 #define EC_HOST_ARGS_FLAG_TO_HOST   0x02
 
+/*****************************************************************************/
+/*
+ * Byte codes returned by EC over SPI interface.
+ *
+ * These can be used by the AP to debug the EC interface, and to determine
+ * when the EC is not in a state where it will ever get around to responding
+ * to the AP.
+ *
+ * Example of sequence of bytes read from EC for a current good transfer:
+ *   1. -                  - AP asserts chip select (CS#)
+ *   2. EC_SPI_OLD_READY   - AP sends first byte(s) of request
+ *   3. -                  - EC starts handling CS# interrupt
+ *   4. EC_SPI_RECEIVING   - AP sends remaining byte(s) of request
+ *   5. EC_SPI_PROCESSING  - EC starts processing request; AP is clocking in
+ *                           bytes looking for EC_SPI_FRAME_START
+ *   6. -                  - EC finishes processing and sets up response
+ *   7. EC_SPI_FRAME_START - AP reads frame byte
+ *   8. (response packet)  - AP reads response packet
+ *   9. EC_SPI_PAST_END    - Any additional bytes read by AP
+ *   10 -                  - AP deasserts chip select
+ *   11 -                  - EC processes CS# interrupt and sets up DMA for
+ *                           next request
+ *
+ * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
+ * the following byte values:
+ *   EC_SPI_OLD_READY
+ *   EC_SPI_RX_READY
+ *   EC_SPI_RECEIVING
+ *   EC_SPI_PROCESSING
+ *
+ * Then the EC found an error in the request, or was not ready for the request
+ * and lost data.  The AP should give up waiting for EC_SPI_FRAME_START,
+ * because the EC is unable to tell when the AP is done sending its request.
+ */
+
+/*
+ * Framing byte which precedes a response packet from the EC.  After sending a
+ * request, the AP will clock in bytes until it sees the framing byte, then
+ * clock in the response packet.
+ */
+#define EC_SPI_FRAME_START    0xec
+
+/*
+ * Padding bytes which are clocked out after the end of a response packet.
+ */
+#define EC_SPI_PAST_END       0xed
+
+/*
+ * EC is ready to receive, and has ignored the byte sent by the AP.  EC expects
+ * that the AP will send a valid packet header (starting with
+ * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
+ */
+#define EC_SPI_RX_READY       0xf8
+
+/*
+ * EC has started receiving the request from the AP, but hasn't started
+ * processing it yet.
+ */
+#define EC_SPI_RECEIVING      0xf9
+
+/* EC has received the entire request from the AP and is processing it. */
+#define EC_SPI_PROCESSING     0xfa
+
+/*
+ * EC received bad data from the AP, such as a packet header with an invalid
+ * length.  EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_RX_BAD_DATA    0xfb
+
+/*
+ * EC received data from the AP before it was ready.  That is, the AP asserted
+ * chip select and started clocking data before the EC was ready to receive it.
+ * EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_NOT_READY      0xfc
+
+/*
+ * EC was ready to receive a request from the AP.  EC has treated the byte sent
+ * by the AP as part of a request packet, or (for old-style ECs) is processing
+ * a fully received packet but is not ready to respond yet.
+ */
+#define EC_SPI_OLD_READY      0xfd
+
+/*****************************************************************************/
+
+/*
+ * Protocol version 2 for I2C and SPI send a request this way:
+ *
+ *      0       EC_CMD_VERSION0 + (command version)
+ *      1       Command number
+ *      2       Length of params = N
+ *      3..N+2  Params, if any
+ *      N+3     8-bit checksum of bytes 0..N+2
+ *
+ * The corresponding response is:
+ *
+ *      0       Result code (EC_RES_*)
+ *      1       Length of params = M
+ *      2..M+1  Params, if any
+ *      M+2     8-bit checksum of bytes 0..M+1
+ */
+#define EC_PROTO2_REQUEST_HEADER_BYTES 3
+#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
+#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +    \
+                                    EC_PROTO2_REQUEST_TRAILER_BYTES)
+
+#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
+#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
+#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +  \
+                                     EC_PROTO2_RESPONSE_TRAILER_BYTES)
+
+/* Parameter length was limited by the LPC interface */
+#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
+
+/* Maximum request and response packet sizes for protocol version 2 */
+#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +        \
+                                    EC_PROTO2_MAX_PARAM_SIZE)
+#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +      \
+                                     EC_PROTO2_MAX_PARAM_SIZE)
+
+/*****************************************************************************/
+
+/*
+ * Value written to legacy command port / prefix byte to indicate protocol
+ * 3+ structs are being used.  Usage is bus-dependent.
+ */
+#define EC_COMMAND_PROTOCOL_3 0xda
+
+#define EC_HOST_REQUEST_VERSION 3
+
+/* Version 3 request from host */
+struct ec_host_request {
+        /* Struct version (=3)
+         *
+         * EC will return EC_RES_INVALID_HEADER if it receives a header with a
+         * version it doesn't know how to parse.
+         */
+        uint8_t struct_version;
+
+        /*
+         * Checksum of request and data; sum of all bytes including checksum
+         * should total to 0.
+         */
+        uint8_t checksum;
+
+        /* Command code */
+        uint16_t command;
+
+        /* Command version */
+        uint8_t command_version;
+
+        /* Unused byte in current protocol version; set to 0 */
+        uint8_t reserved;
+
+        /* Length of data which follows this header */
+        uint16_t data_len;
+} __packed;
+
+#define EC_HOST_RESPONSE_VERSION 3
+
+/* Version 3 response from EC */
+struct ec_host_response {
+        /* Struct version (=3) */
+        uint8_t struct_version;
+
+        /*
+         * Checksum of response and data; sum of all bytes including checksum
+         * should total to 0.
+         */
+        uint8_t checksum;
+
+        /* Result code (EC_RES_*) */
+        uint16_t result;
+
+        /* Length of data which follows this header */
+        uint16_t data_len;
+
+        /* Unused bytes in current protocol version; set to 0 */
+        uint16_t reserved;
+} __packed;
+
+/*****************************************************************************/
 /*
  * Notes on commands:
  *
@@ -418,6 +651,68 @@ struct ec_response_get_comms_status {
         uint32_t flags;         /* Mask of enum ec_comms_status */
 } __packed;
 
+/* Fake a variety of responses, purely for testing purposes. */
+#define EC_CMD_TEST_PROTOCOL            0x0a
+
+/* Tell the EC what to send back to us. */
+struct ec_params_test_protocol {
+        uint32_t ec_result;
+        uint32_t ret_len;
+        uint8_t buf[32];
+} __packed;
+
+/* Here it comes... */
+struct ec_response_test_protocol {
+        uint8_t buf[32];
+} __packed;
+
+/* Get prococol information */
+#define EC_CMD_GET_PROTOCOL_INFO        0x0b
+
+/* Flags for ec_response_get_protocol_info.flags */
+/* EC_RES_IN_PROGRESS may be returned if a command is slow */
+#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
+
+struct ec_response_get_protocol_info {
+        /* Fields which exist if at least protocol version 3 supported */
+
+        /* Bitmask of protocol versions supported (1 << n means version n)*/
+        uint32_t protocol_versions;
+
+        /* Maximum request packet size, in bytes */
+        uint16_t max_request_packet_size;
+
+        /* Maximum response packet size, in bytes */
+        uint16_t max_response_packet_size;
+
+        /* Flags; see EC_PROTOCOL_INFO_* */
+        uint32_t flags;
+} __packed;
+
+
+/*****************************************************************************/
+/* Get/Set miscellaneous values */
+
+/* The upper byte of .flags tells what to do (nothing means "get") */
+#define EC_GSV_SET        0x80000000
+
+/* The lower three bytes of .flags identifies the parameter, if that has
+   meaning for an individual command. */
+#define EC_GSV_PARAM_MASK 0x00ffffff
+
+struct ec_params_get_set_value {
+        uint32_t flags;
+        uint32_t value;
+} __packed;
+
+struct ec_response_get_set_value {
+        uint32_t flags;
+        uint32_t value;
+} __packed;
+
+/* More than one command can use these structs to get/set paramters. */
+#define EC_CMD_GSV_PAUSE_IN_S5  0x0c
+
 
 /*****************************************************************************/
 /* Flash commands */
@@ -425,6 +720,7 @@ struct ec_response_get_comms_status {
 /* Get flash info */
 #define EC_CMD_FLASH_INFO 0x10
 
+/* Version 0 returns these fields */
 struct ec_response_flash_info {
         /* Usable flash size, in bytes */
         uint32_t flash_size;
@@ -445,6 +741,37 @@ struct ec_response_flash_info {
         uint32_t protect_block_size;
 } __packed;
 
+/* Flags for version 1+ flash info command */
+/* EC flash erases bits to 0 instead of 1 */
+#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
+
+/*
+ * Version 1 returns the same initial fields as version 0, with additional
+ * fields following.
+ *
+ * gcc anonymous structs don't seem to get along with the __packed directive;
+ * if they did we'd define the version 0 struct as a sub-struct of this one.
+ */
+struct ec_response_flash_info_1 {
+        /* Version 0 fields; see above for description */
+        uint32_t flash_size;
+        uint32_t write_block_size;
+        uint32_t erase_block_size;
+        uint32_t protect_block_size;
+
+        /* Version 1 adds these fields: */
+        /*
+         * Ideal write size in bytes.  Writes will be fastest if size is
+         * exactly this and offset is a multiple of this.  For example, an EC
+         * may have a write buffer which can do half-page operations if data is
+         * aligned, and a slower word-at-a-time write mode.
+         */
+        uint32_t write_ideal_size;
+
+        /* Flags; see EC_FLASH_INFO_* */
+        uint32_t flags;
+} __packed;
+
 /*
  * Read flash
  *
@@ -459,15 +786,15 @@ struct ec_params_flash_read {
 
 /* Write flash */
 #define EC_CMD_FLASH_WRITE 0x12
+#define EC_VER_FLASH_WRITE 1
+
+/* Version 0 of the flash command supported only 64 bytes of data */
+#define EC_FLASH_WRITE_VER0_SIZE 64
 
 struct ec_params_flash_write {
         uint32_t offset;   /* Byte offset to write */
         uint32_t size;     /* Size to write in bytes */
-        /*
-         * Data to write.  Could really use EC_PARAM_SIZE - 8, but tidiest to
-         * use a power of 2 so writes stay aligned.
-         */
-        uint8_t data[64];
+        /* Followed by data to write */
 } __packed;
 
 /* Erase flash */
@@ -543,7 +870,7 @@ struct ec_response_flash_protect {
 
 enum ec_flash_region {
         /* Region which holds read-only EC image */
-        EC_FLASH_REGION_RO,
+        EC_FLASH_REGION_RO = 0,
         /* Region which holds rewritable EC image */
         EC_FLASH_REGION_RW,
         /*
@@ -551,6 +878,8 @@ enum ec_flash_region {
          * EC_FLASH_REGION_RO)
          */
         EC_FLASH_REGION_WP_RO,
+        /* Number of regions */
+        EC_FLASH_REGION_COUNT,
 };
 
 struct ec_params_flash_region_info {
@@ -639,15 +968,15 @@ struct rgb_s {
  */
 struct lightbar_params {
         /* Timing */
-        int google_ramp_up;
-        int google_ramp_down;
-        int s3s0_ramp_up;
-        int s0_tick_delay[2];                   /* AC=0/1 */
-        int s0a_tick_delay[2];                  /* AC=0/1 */
-        int s0s3_ramp_down;
-        int s3_sleep_for;
-        int s3_ramp_up;
-        int s3_ramp_down;
+        int32_t google_ramp_up;
+        int32_t google_ramp_down;
+        int32_t s3s0_ramp_up;
+        int32_t s0_tick_delay[2];               /* AC=0/1 */
+        int32_t s0a_tick_delay[2];              /* AC=0/1 */
+        int32_t s0s3_ramp_down;
+        int32_t s3_sleep_for;
+        int32_t s3_ramp_up;
+        int32_t s3_ramp_down;
 
         /* Oscillation */
         uint8_t new_s0;
@@ -676,7 +1005,7 @@ struct ec_params_lightbar {
         union {
                 struct {
                         /* no args */
-                } dump, off, on, init, get_seq, get_params;
+                } dump, off, on, init, get_seq, get_params, version;
 
                 struct num {
                         uint8_t num;
@@ -710,6 +1039,11 @@ struct ec_response_lightbar {
 
                 struct lightbar_params get_params;
 
+                struct version {
+                        uint32_t num;
+                        uint32_t flags;
+                } version;
+
                 struct {
                         /* no return params */
                 } off, on, init, brightness, seq, reg, rgb, demo, set_params;
@@ -730,10 +1064,62 @@ enum lightbar_command {
         LIGHTBAR_CMD_DEMO = 9,
         LIGHTBAR_CMD_GET_PARAMS = 10,
         LIGHTBAR_CMD_SET_PARAMS = 11,
+        LIGHTBAR_CMD_VERSION = 12,
         LIGHTBAR_NUM_CMDS
 };
 
 /*****************************************************************************/
+/* LED control commands */
+
+#define EC_CMD_LED_CONTROL 0x29
+
+enum ec_led_id {
+        /* LED to indicate battery state of charge */
+        EC_LED_ID_BATTERY_LED = 0,
+        /*
+         * LED to indicate system power state (on or in suspend).
+         * May be on power button or on C-panel.
+         */
+        EC_LED_ID_POWER_LED,
+        /* LED on power adapter or its plug */
+        EC_LED_ID_ADAPTER_LED,
+
+        EC_LED_ID_COUNT
+};
+
+/* LED control flags */
+#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
+#define EC_LED_FLAGS_AUTO  (1 << 1) /* Switch LED back to automatic control */
+
+enum ec_led_colors {
+        EC_LED_COLOR_RED = 0,
+        EC_LED_COLOR_GREEN,
+        EC_LED_COLOR_BLUE,
+        EC_LED_COLOR_YELLOW,
+        EC_LED_COLOR_WHITE,
+
+        EC_LED_COLOR_COUNT
+};
+
+struct ec_params_led_control {
+        uint8_t led_id;     /* Which LED to control */
+        uint8_t flags;      /* Control flags */
+
+        uint8_t brightness[EC_LED_COLOR_COUNT];
+} __packed;
+
+struct ec_response_led_control {
+        /*
+         * Available brightness value range.
+         *
+         * Range 0 means color channel not present.
+         * Range 1 means on/off control.
+         * Other values means the LED is control by PWM.
+         */
+        uint8_t brightness_range[EC_LED_COLOR_COUNT];
+} __packed;
+
+/*****************************************************************************/
 /* Verified boot commands */
 
 /*
@@ -790,6 +1176,181 @@ enum ec_vboot_hash_status {
 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
 
 /*****************************************************************************/
+/*
+ * Motion sense commands. We'll make separate structs for sub-commands with
+ * different input args, so that we know how much to expect.
+ */
+#define EC_CMD_MOTION_SENSE_CMD 0x2B
+
+/* Motion sense commands */
+enum motionsense_command {
+        /*
+         * Dump command returns all motion sensor data including motion sense
+         * module flags and individual sensor flags.
+         */
+        MOTIONSENSE_CMD_DUMP = 0,
+
+        /*
+         * Info command returns data describing the details of a given sensor,
+         * including enum motionsensor_type, enum motionsensor_location, and
+         * enum motionsensor_chip.
+         */
+        MOTIONSENSE_CMD_INFO = 1,
+
+        /*
+         * EC Rate command is a setter/getter command for the EC sampling rate
+         * of all motion sensors in milliseconds.
+         */
+        MOTIONSENSE_CMD_EC_RATE = 2,
+
+        /*
+         * Sensor ODR command is a setter/getter command for the output data
+         * rate of a specific motion sensor in millihertz.
+         */
+        MOTIONSENSE_CMD_SENSOR_ODR = 3,
+
+        /*
+         * Sensor range command is a setter/getter command for the range of
+         * a specified motion sensor in +/-G's or +/- deg/s.
+         */
+        MOTIONSENSE_CMD_SENSOR_RANGE = 4,
+
+        /*
+         * Setter/getter command for the keyboard wake angle. When the lid
+         * angle is greater than this value, keyboard wake is disabled in S3,
+         * and when the lid angle goes less than this value, keyboard wake is
+         * enabled. Note, the lid angle measurement is an approximate,
+         * un-calibrated value, hence the wake angle isn't exact.
+         */
+        MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
+
+        /* Number of motionsense sub-commands. */
+        MOTIONSENSE_NUM_CMDS
+};
+
+enum motionsensor_id {
+        EC_MOTION_SENSOR_ACCEL_BASE = 0,
+        EC_MOTION_SENSOR_ACCEL_LID = 1,
+        EC_MOTION_SENSOR_GYRO = 2,
+
+        /*
+         * Note, if more sensors are added and this count changes, the padding
+         * in ec_response_motion_sense dump command must be modified.
+         */
+        EC_MOTION_SENSOR_COUNT = 3
+};
+
+/* List of motion sensor types. */
+enum motionsensor_type {
+        MOTIONSENSE_TYPE_ACCEL = 0,
+        MOTIONSENSE_TYPE_GYRO = 1,
+};
+
+/* List of motion sensor locations. */
+enum motionsensor_location {
+        MOTIONSENSE_LOC_BASE = 0,
+        MOTIONSENSE_LOC_LID = 1,
+};
+
+/* List of motion sensor chips. */
+enum motionsensor_chip {
+        MOTIONSENSE_CHIP_KXCJ9 = 0,
+};
+
+/* Module flag masks used for the dump sub-command. */
+#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
+
+/* Sensor flag masks used for the dump sub-command. */
+#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
+
+/*
+ * Send this value for the data element to only perform a read. If you
+ * send any other value, the EC will interpret it as data to set and will
+ * return the actual value set.
+ */
+#define EC_MOTION_SENSE_NO_VALUE -1
+
+struct ec_params_motion_sense {
+        uint8_t cmd;
+        union {
+                /* Used for MOTIONSENSE_CMD_DUMP. */
+                struct {
+                        /* no args */
+                } dump;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_EC_RATE and
+                 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+                 */
+                struct {
+                        /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+                        int16_t data;
+                } ec_rate, kb_wake_angle;
+
+                /* Used for MOTIONSENSE_CMD_INFO. */
+                struct {
+                        /* Should be element of enum motionsensor_id. */
+                        uint8_t sensor_num;
+                } info;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_SENSOR_ODR and
+                 * MOTIONSENSE_CMD_SENSOR_RANGE.
+                 */
+                struct {
+                        /* Should be element of enum motionsensor_id. */
+                        uint8_t sensor_num;
+
+                        /* Rounding flag, true for round-up, false for down. */
+                        uint8_t roundup;
+
+                        uint16_t reserved;
+
+                        /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+                        int32_t data;
+                } sensor_odr, sensor_range;
+        };
+} __packed;
+
+struct ec_response_motion_sense {
+        union {
+                /* Used for MOTIONSENSE_CMD_DUMP. */
+                struct {
+                        /* Flags representing the motion sensor module. */
+                        uint8_t module_flags;
+
+                        /* Flags for each sensor in enum motionsensor_id. */
+                        uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
+
+                        /* Array of all sensor data. Each sensor is 3-axis. */
+                        int16_t data[3*EC_MOTION_SENSOR_COUNT];
+                } dump;
+
+                /* Used for MOTIONSENSE_CMD_INFO. */
+                struct {
+                        /* Should be element of enum motionsensor_type. */
+                        uint8_t type;
+
+                        /* Should be element of enum motionsensor_location. */
+                        uint8_t location;
+
+                        /* Should be element of enum motionsensor_chip. */
+                        uint8_t chip;
+                } info;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
+                 * MOTIONSENSE_CMD_SENSOR_RANGE, and
+                 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+                 */
+                struct {
+                        /* Current value of the parameter queried. */
+                        int32_t ret;
+                } ec_rate, sensor_odr, sensor_range, kb_wake_angle;
+        };
+} __packed;
+
+/*****************************************************************************/
 /* USB charging control commands */
 
 /* Set USB port charging mode */
@@ -868,20 +1429,27 @@ struct ec_response_port80_last_boot {
 } __packed;
 
 /*****************************************************************************/
-/* Thermal engine commands */
+/* Thermal engine commands. Note that there are two implementations. We'll
+ * reuse the command number, but the data and behavior is incompatible.
+ * Version 0 is what originally shipped on Link.
+ * Version 1 separates the CPU thermal limits from the fan control.
+ */
 
-/* Set thershold value */
 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50
+#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
+
+/* The version 0 structs are opaque. You have to know what they are for
+ * the get/set commands to make any sense.
+ */
 
+/* Version 0 - set */
 struct ec_params_thermal_set_threshold {
         uint8_t sensor_type;
         uint8_t threshold_id;
         uint16_t value;
 } __packed;
 
-/* Get threshold value */
-#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
-
+/* Version 0 - get */
 struct ec_params_thermal_get_threshold {
         uint8_t sensor_type;
         uint8_t threshold_id;
@@ -891,6 +1459,41 @@ struct ec_response_thermal_get_threshold {
         uint16_t value;
 } __packed;
 
+
+/* The version 1 structs are visible. */
+enum ec_temp_thresholds {
+        EC_TEMP_THRESH_WARN = 0,
+        EC_TEMP_THRESH_HIGH,
+        EC_TEMP_THRESH_HALT,
+
+        EC_TEMP_THRESH_COUNT
+};
+
+/* Thermal configuration for one temperature sensor. Temps are in degrees K.
+ * Zero values will be silently ignored by the thermal task.
+ */
+struct ec_thermal_config {
+        uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
+        uint32_t temp_fan_off;          /* no active cooling needed */
+        uint32_t temp_fan_max;          /* max active cooling needed */
+} __packed;
+
+/* Version 1 - get config for one sensor. */
+struct ec_params_thermal_get_threshold_v1 {
+        uint32_t sensor_num;
+} __packed;
+/* This returns a struct ec_thermal_config */
+
+/* Version 1 - set config for one sensor.
+ * Use read-modify-write for best results! */
+struct ec_params_thermal_set_threshold_v1 {
+        uint32_t sensor_num;
+        struct ec_thermal_config cfg;
+} __packed;
+/* This returns no data */
+
+/****************************************************************************/
+
 /* Toggle automatic fan control */
 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
 
@@ -920,6 +1523,18 @@ struct ec_params_tmp006_set_calibration {
         float b2;
 } __packed;
 
+/* Read raw TMP006 data */
+#define EC_CMD_TMP006_GET_RAW 0x55
+
+struct ec_params_tmp006_get_raw {
+        uint8_t index;
+} __packed;
+
+struct ec_response_tmp006_get_raw {
+        int32_t t;  /* In 1/100 K */
+        int32_t v;  /* In nV */
+};
+
 /*****************************************************************************/
 /* MKBP - Matrix KeyBoard Protocol */
 
@@ -1118,11 +1733,41 @@ struct ec_params_switch_enable_backlight {
 
 /* Enable/disable WLAN/Bluetooth */
 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
+#define EC_VER_SWITCH_ENABLE_WIRELESS 1
 
-struct ec_params_switch_enable_wireless {
+/* Version 0 params; no response */
+struct ec_params_switch_enable_wireless_v0 {
         uint8_t enabled;
 } __packed;
 
+/* Version 1 params */
+struct ec_params_switch_enable_wireless_v1 {
+        /* Flags to enable now */
+        uint8_t now_flags;
+
+        /* Which flags to copy from now_flags */
+        uint8_t now_mask;
+
+        /*
+         * Flags to leave enabled in S3, if they're on at the S0->S3
+         * transition.  (Other flags will be disabled by the S0->S3
+         * transition.)
+         */
+        uint8_t suspend_flags;
+
+        /* Which flags to copy from suspend_flags */
+        uint8_t suspend_mask;
+} __packed;
+
+/* Version 1 response */
+struct ec_response_switch_enable_wireless_v1 {
+        /* Flags to enable now */
+        uint8_t now_flags;
+
+        /* Flags to leave enabled in S3 */
+        uint8_t suspend_flags;
+} __packed;
+
 /*****************************************************************************/
 /* GPIO commands. Only available on EC if write protect has been disabled. */
 
@@ -1147,11 +1792,16 @@ struct ec_response_gpio_get {
 /*****************************************************************************/
 /* I2C commands. Only available when flash write protect is unlocked. */
 
+/*
+ * TODO(crosbug.com/p/23570): These commands are deprecated, and will be
+ * removed soon.  Use EC_CMD_I2C_XFER instead.
+ */
+
 /* Read I2C bus */
 #define EC_CMD_I2C_READ 0x94
 
 struct ec_params_i2c_read {
-        uint16_t addr;
+        uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
         uint8_t read_size; /* Either 8 or 16. */
         uint8_t port;
         uint8_t offset;
@@ -1165,7 +1815,7 @@ struct ec_response_i2c_read {
 
 struct ec_params_i2c_write {
         uint16_t data;
-        uint16_t addr;
+        uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
         uint8_t write_size; /* Either 8 or 16. */
         uint8_t port;
         uint8_t offset;
@@ -1174,11 +1824,20 @@ struct ec_params_i2c_write {
 /*****************************************************************************/
 /* Charge state commands. Only available when flash write protect unlocked. */
 
-/* Force charge state machine to stop in idle mode */
-#define EC_CMD_CHARGE_FORCE_IDLE 0x96
+/* Force charge state machine to stop charging the battery or force it to
+ * discharge the battery.
+ */
+#define EC_CMD_CHARGE_CONTROL 0x96
+#define EC_VER_CHARGE_CONTROL 1
 
-struct ec_params_force_idle {
-        uint8_t enabled;
+enum ec_charge_control_mode {
+        CHARGE_CONTROL_NORMAL = 0,
+        CHARGE_CONTROL_IDLE,
+        CHARGE_CONTROL_DISCHARGE,
+};
+
+struct ec_params_charge_control {
+        uint32_t mode;  /* enum charge_control_mode */
 } __packed;
 
 /*****************************************************************************/
@@ -1206,14 +1865,231 @@ struct ec_params_force_idle {
 #define EC_CMD_BATTERY_CUT_OFF 0x99
 
 /*****************************************************************************/
-/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */
+/* USB port mux control. */
 
 /*
- * Dump charge state machine context.
- *
- * Response is a binary dump of charge state machine context.
+ * Switch USB mux or return to automatic switching.
+ */
+#define EC_CMD_USB_MUX 0x9a
+
+struct ec_params_usb_mux {
+        uint8_t mux;
+} __packed;
+
+/*****************************************************************************/
+/* LDOs / FETs control. */
+
+enum ec_ldo_state {
+        EC_LDO_STATE_OFF = 0,   /* the LDO / FET is shut down */
+        EC_LDO_STATE_ON = 1,    /* the LDO / FET is ON / providing power */
+};
+
+/*
+ * Switch on/off a LDO.
+ */
+#define EC_CMD_LDO_SET 0x9b
+
+struct ec_params_ldo_set {
+        uint8_t index;
+        uint8_t state;
+} __packed;
+
+/*
+ * Get LDO state.
+ */
+#define EC_CMD_LDO_GET 0x9c
+
+struct ec_params_ldo_get {
+        uint8_t index;
+} __packed;
+
+struct ec_response_ldo_get {
+        uint8_t state;
+} __packed;
+
+/*****************************************************************************/
+/* Power info. */
+
+/*
+ * Get power info.
+ */
+#define EC_CMD_POWER_INFO 0x9d
+
+struct ec_response_power_info {
+        uint32_t usb_dev_type;
+        uint16_t voltage_ac;
+        uint16_t voltage_system;
+        uint16_t current_system;
+        uint16_t usb_current_limit;
+} __packed;
+
+/*****************************************************************************/
+/* I2C passthru command */
+
+#define EC_CMD_I2C_PASSTHRU 0x9e
+
+/* Slave address is 10 (not 7) bit */
+#define EC_I2C_FLAG_10BIT       (1 << 16)
+
+/* Read data; if not present, message is a write */
+#define EC_I2C_FLAG_READ        (1 << 15)
+
+/* Mask for address */
+#define EC_I2C_ADDR_MASK        0x3ff
+
+#define EC_I2C_STATUS_NAK       (1 << 0) /* Transfer was not acknowledged */
+#define EC_I2C_STATUS_TIMEOUT   (1 << 1) /* Timeout during transfer */
+
+/* Any error */
+#define EC_I2C_STATUS_ERROR     (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
+
+struct ec_params_i2c_passthru_msg {
+        uint16_t addr_flags;    /* I2C slave address (7 or 10 bits) and flags */
+        uint16_t len;           /* Number of bytes to read or write */
+} __packed;
+
+struct ec_params_i2c_passthru {
+        uint8_t port;           /* I2C port number */
+        uint8_t num_msgs;       /* Number of messages */
+        struct ec_params_i2c_passthru_msg msg[];
+        /* Data to write for all messages is concatenated here */
+} __packed;
+
+struct ec_response_i2c_passthru {
+        uint8_t i2c_status;     /* Status flags (EC_I2C_STATUS_...) */
+        uint8_t num_msgs;       /* Number of messages processed */
+        uint8_t data[];         /* Data read by messages concatenated here */
+} __packed;
+
+/*****************************************************************************/
+/* Power button hang detect */
+
+#define EC_CMD_HANG_DETECT 0x9f
+
+/* Reasons to start hang detection timer */
+/* Power button pressed */
+#define EC_HANG_START_ON_POWER_PRESS  (1 << 0)
+
+/* Lid closed */
+#define EC_HANG_START_ON_LID_CLOSE    (1 << 1)
+
+ /* Lid opened */
+#define EC_HANG_START_ON_LID_OPEN     (1 << 2)
+
+/* Start of AP S3->S0 transition (booting or resuming from suspend) */
+#define EC_HANG_START_ON_RESUME       (1 << 3)
+
+/* Reasons to cancel hang detection */
+
+/* Power button released */
+#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
+
+/* Any host command from AP received */
+#define EC_HANG_STOP_ON_HOST_COMMAND  (1 << 9)
+
+/* Stop on end of AP S0->S3 transition (suspending or shutting down) */
+#define EC_HANG_STOP_ON_SUSPEND       (1 << 10)
+
+/*
+ * If this flag is set, all the other fields are ignored, and the hang detect
+ * timer is started.  This provides the AP a way to start the hang timer
+ * without reconfiguring any of the other hang detect settings.  Note that
+ * you must previously have configured the timeouts.
+ */
+#define EC_HANG_START_NOW             (1 << 30)
+
+/*
+ * If this flag is set, all the other fields are ignored (including
+ * EC_HANG_START_NOW).  This provides the AP a way to stop the hang timer
+ * without reconfiguring any of the other hang detect settings.
  */
-#define EC_CMD_CHARGE_DUMP 0xa0
+#define EC_HANG_STOP_NOW              (1 << 31)
+
+struct ec_params_hang_detect {
+        /* Flags; see EC_HANG_* */
+        uint32_t flags;
+
+        /* Timeout in msec before generating host event, if enabled */
+        uint16_t host_event_timeout_msec;
+
+        /* Timeout in msec before generating warm reboot, if enabled */
+        uint16_t warm_reboot_timeout_msec;
+} __packed;
+
+/*****************************************************************************/
+/* Commands for battery charging */
+
+/*
+ * This is the single catch-all host command to exchange data regarding the
+ * charge state machine (v2 and up).
+ */
+#define EC_CMD_CHARGE_STATE 0xa0
+
+/* Subcommands for this host command */
+enum charge_state_command {
+        CHARGE_STATE_CMD_GET_STATE,
+        CHARGE_STATE_CMD_GET_PARAM,
+        CHARGE_STATE_CMD_SET_PARAM,
+        CHARGE_STATE_NUM_CMDS
+};
+
+/*
+ * Known param numbers are defined here. Ranges are reserved for board-specific
+ * params, which are handled by the particular implementations.
+ */
+enum charge_state_params {
+        CS_PARAM_CHG_VOLTAGE,         /* charger voltage limit */
+        CS_PARAM_CHG_CURRENT,         /* charger current limit */
+        CS_PARAM_CHG_INPUT_CURRENT,   /* charger input current limit */
+        CS_PARAM_CHG_STATUS,          /* charger-specific status */
+        CS_PARAM_CHG_OPTION,          /* charger-specific options */
+        /* How many so far? */
+        CS_NUM_BASE_PARAMS,
+
+        /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
+        CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
+        CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
+
+        /* Other custom param ranges go here... */
+};
+
+struct ec_params_charge_state {
+        uint8_t cmd;                            /* enum charge_state_command */
+        union {
+                struct {
+                        /* no args */
+                } get_state;
+
+                struct {
+                        uint32_t param;         /* enum charge_state_param */
+                } get_param;
+
+                struct {
+                        uint32_t param;         /* param to set */
+                        uint32_t value;         /* value to set */
+                } set_param;
+        };
+} __packed;
+
+struct ec_response_charge_state {
+        union {
+                struct {
+                        int ac;
+                        int chg_voltage;
+                        int chg_current;
+                        int chg_input_current;
+                        int batt_state_of_charge;
+                } get_state;
+
+                struct {
+                        uint32_t value;
+                } get_param;
+                struct {
+                        /* no return values */
+                } set_param;
+        };
+} __packed;
+
 
 /*
  * Set maximum battery charging current.
@@ -1221,15 +2097,59 @@ struct ec_params_force_idle {
 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
 
 struct ec_params_current_limit {
-        uint32_t limit;
+        uint32_t limit; /* in mA */
+} __packed;
+
+/*
+ * Set maximum external power current.
+ */
+#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2
+
+struct ec_params_ext_power_current_limit {
+        uint32_t limit; /* in mA */
+} __packed;
+
+/*****************************************************************************/
+/* Smart battery pass-through */
+
+/* Get / Set 16-bit smart battery registers */
+#define EC_CMD_SB_READ_WORD   0xb0
+#define EC_CMD_SB_WRITE_WORD  0xb1
+
+/* Get / Set string smart battery parameters
+ * formatted as SMBUS "block".
+ */
+#define EC_CMD_SB_READ_BLOCK  0xb2
+#define EC_CMD_SB_WRITE_BLOCK 0xb3
+
+struct ec_params_sb_rd {
+        uint8_t reg;
+} __packed;
+
+struct ec_response_sb_rd_word {
+        uint16_t value;
+} __packed;
+
+struct ec_params_sb_wr_word {
+        uint8_t reg;
+        uint16_t value;
+} __packed;
+
+struct ec_response_sb_rd_block {
+        uint8_t data[32];
+} __packed;
+
+struct ec_params_sb_wr_block {
+        uint8_t reg;
+        uint16_t data[32];
 } __packed;
 
 /*****************************************************************************/
 /* System commands */
 
 /*
- * TODO: this is a confusing name, since it doesn't necessarily reboot the EC.
- * Rename to "set image" or something similar.
+ * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
+ * necessarily reboot the EC.  Rename to "image" or something similar?
  */
 #define EC_CMD_REBOOT_EC 0xd2
 
@@ -1308,6 +2228,7 @@ struct ec_params_reboot_ec {
 #define EC_CMD_ACPI_QUERY_EVENT 0x84
 
 /* Valid addresses in ACPI memory space, for read/write commands */
+
 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
 #define EC_ACPI_MEM_VERSION            0x00
 /*
@@ -1317,8 +2238,60 @@ struct ec_params_reboot_ec {
 #define EC_ACPI_MEM_TEST               0x01
 /* Test compliment; writes here are ignored. */
 #define EC_ACPI_MEM_TEST_COMPLIMENT    0x02
+
 /* Keyboard backlight brightness percent (0 - 100) */
 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
+/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
+#define EC_ACPI_MEM_FAN_DUTY           0x04
+
+/*
+ * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
+ * independent thresholds attached to them. The current value of the ID
+ * register determines which sensor is affected by the THRESHOLD and COMMIT
+ * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
+ * as the memory-mapped sensors. The COMMIT register applies those settings.
+ *
+ * The spec does not mandate any way to read back the threshold settings
+ * themselves, but when a threshold is crossed the AP needs a way to determine
+ * which sensor(s) are responsible. Each reading of the ID register clears and
+ * returns one sensor ID that has crossed one of its threshold (in either
+ * direction) since the last read. A value of 0xFF means "no new thresholds
+ * have tripped". Setting or enabling the thresholds for a sensor will clear
+ * the unread event count for that sensor.
+ */
+#define EC_ACPI_MEM_TEMP_ID            0x05
+#define EC_ACPI_MEM_TEMP_THRESHOLD     0x06
+#define EC_ACPI_MEM_TEMP_COMMIT        0x07
+/*
+ * Here are the bits for the COMMIT register:
+ *   bit 0 selects the threshold index for the chosen sensor (0/1)
+ *   bit 1 enables/disables the selected threshold (0 = off, 1 = on)
+ * Each write to the commit register affects one threshold.
+ */
+#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
+#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
+/*
+ * Example:
+ *
+ * Set the thresholds for sensor 2 to 50 C and 60 C:
+ *   write 2 to [0x05]      --  select temp sensor 2
+ *   write 0x7b to [0x06]   --  C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
+ *   write 0x2 to [0x07]    --  enable threshold 0 with this value
+ *   write 0x85 to [0x06]   --  C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
+ *   write 0x3 to [0x07]    --  enable threshold 1 with this value
+ *
+ * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
+ *   write 2 to [0x05]      --  select temp sensor 2
+ *   write 0x1 to [0x07]    --  disable threshold 1
+ */
+
+/* DPTF battery charging current limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT     0x08
+
+/* Charging limit is specified in 64 mA steps */
+#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA   64
+/* Value to disable DPTF battery charging limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED  0xff
 
 /* Current version of ACPI memory address space */
 #define EC_ACPI_MEM_VERSION_CURRENT 1
@@ -1360,10 +2333,21 @@ struct ec_params_reboot_ec {
  * Header bytes greater than this indicate a later version. For example,
  * EC_CMD_VERSION0 + 1 means we are using version 1.
  *
- * The old EC interface must not use commands 0dc or higher.
+ * The old EC interface must not use commands 0xdc or higher.
  */
 #define EC_CMD_VERSION0 0xdc
 
 #endif  /* !__ACPI__ */
 
+/*****************************************************************************/
+/*
+ * Deprecated constants. These constants have been renamed for clarity. The
+ * meaning and size has not changed. Programs that use the old names should
+ * switch to the new names soon, as the old names may not be carried forward
+ * forever.
+ */
+#define EC_HOST_PARAM_SIZE      EC_PROTO2_MAX_PARAM_SIZE
+#define EC_LPC_ADDR_OLD_PARAM   EC_HOST_CMD_REGION1
+#define EC_OLD_PARAM_SIZE       EC_HOST_CMD_REGION_SIZE
+
 #endif  /* __CROS_EC_COMMANDS_H */
diff --git a/include/linux/mfd/ipaq-micro.h b/include/linux/mfd/ipaq-micro.h
new file mode 100644
index 000000000000..5c4d29f6674f
--- /dev/null
+++ b/include/linux/mfd/ipaq-micro.h
@@ -0,0 +1,148 @@
+/*
+ * Header file for the compaq Micro MFD
+ */
+
+#ifndef _MFD_IPAQ_MICRO_H_
+#define _MFD_IPAQ_MICRO_H_
+
+#include <linux/spinlock.h>
+#include <linux/completion.h>
+#include <linux/list.h>
+
+#define TX_BUF_SIZE     32
+#define RX_BUF_SIZE     16
+#define CHAR_SOF        0x02
+
+/*
+ * These are the different messages that can be sent to the microcontroller
+ * to control various aspects.
+ */
+#define MSG_VERSION             0x0
+#define MSG_KEYBOARD            0x2
+#define MSG_TOUCHSCREEN         0x3
+#define MSG_EEPROM_READ         0x4
+#define MSG_EEPROM_WRITE        0x5
+#define MSG_THERMAL_SENSOR      0x6
+#define MSG_NOTIFY_LED          0x8
+#define MSG_BATTERY             0x9
+#define MSG_SPI_READ            0xb
+#define MSG_SPI_WRITE           0xc
+#define MSG_BACKLIGHT           0xd /* H3600 only */
+#define MSG_CODEC_CTRL          0xe /* H3100 only */
+#define MSG_DISPLAY_CTRL        0xf /* H3100 only */
+
+/* state of receiver parser */
+enum rx_state {
+        STATE_SOF = 0,     /* Next byte should be start of frame */
+        STATE_ID,          /* Next byte is ID & message length   */
+        STATE_DATA,        /* Next byte is a data byte           */
+        STATE_CHKSUM       /* Next byte should be checksum       */
+};
+
+/**
+ * struct ipaq_micro_txdev - TX state
+ * @len: length of message in TX buffer
+ * @index: current index into TX buffer
+ * @buf: TX buffer
+ */
+struct ipaq_micro_txdev {
+        u8 len;
+        u8 index;
+        u8 buf[TX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_rxdev - RX state
+ * @state: context of RX state machine
+ * @chksum: calculated checksum
+ * @id: message ID from packet
+ * @len: RX buffer length
+ * @index: RX buffer index
+ * @buf: RX buffer
+ */
+struct ipaq_micro_rxdev {
+        enum rx_state state;
+        unsigned char chksum;
+        u8            id;
+        unsigned int  len;
+        unsigned int  index;
+        u8            buf[RX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_msg - message to the iPAQ microcontroller
+ * @id: 4-bit ID of the message
+ * @tx_len: length of TX data
+ * @tx_data: TX data to send
+ * @rx_len: length of receieved RX data
+ * @rx_data: RX data to recieve
+ * @ack: a completion that will be completed when RX is complete
+ * @node: list node if message gets queued
+ */
+struct ipaq_micro_msg {
+        u8 id;
+        u8 tx_len;
+        u8 tx_data[TX_BUF_SIZE];
+        u8 rx_len;
+        u8 rx_data[RX_BUF_SIZE];
+        struct completion ack;
+        struct list_head node;
+};
+
+/**
+ * struct ipaq_micro - iPAQ microcontroller state
+ * @dev: corresponding platform device
+ * @base: virtual memory base for underlying serial device
+ * @sdlc: virtual memory base for Synchronous Data Link Controller
+ * @version: version string
+ * @tx: TX state
+ * @rx: RX state
+ * @lock: lock for this state container
+ * @msg: current message
+ * @queue: message queue
+ * @key: callback for asynchronous key events
+ * @key_data: data to pass along with key events
+ * @ts: callback for asynchronous touchscreen events
+ * @ts_data: data to pass along with key events
+ */
+struct ipaq_micro {
+        struct device *dev;
+        void __iomem *base;
+        void __iomem *sdlc;
+        char version[5];
+        struct ipaq_micro_txdev tx;     /* transmit ISR state */
+        struct ipaq_micro_rxdev rx;     /* receive ISR state */
+        spinlock_t lock;
+        struct ipaq_micro_msg *msg;
+        struct list_head queue;
+        void (*key) (void *data, int len, unsigned char *rxdata);
+        void *key_data;
+        void (*ts) (void *data, int len, unsigned char *rxdata);
+        void *ts_data;
+};
+
+extern int
+ipaq_micro_tx_msg(struct ipaq_micro *micro, struct ipaq_micro_msg *msg);
+
+static inline int
+ipaq_micro_tx_msg_sync(struct ipaq_micro *micro,
+                       struct ipaq_micro_msg *msg)
+{
+        int ret;
+
+        init_completion(&msg->ack);
+        ret = ipaq_micro_tx_msg(micro, msg);
+        wait_for_completion(&msg->ack);
+
+        return ret;
+}
+
+static inline int
+ipaq_micro_tx_msg_async(struct ipaq_micro *micro,
+                        struct ipaq_micro_msg *msg)
+{
+        init_completion(&msg->ack);
+        return ipaq_micro_tx_msg(micro, msg);
+}
+
+#endif /* _MFD_IPAQ_MICRO_H_ */
diff --git a/include/linux/mfd/kempld.h b/include/linux/mfd/kempld.h
index b911ef3add03..26e0b469e567 100644
--- a/include/linux/mfd/kempld.h
+++ b/include/linux/mfd/kempld.h
@@ -51,6 +51,8 @@
 #define KEMPLD_TYPE_DEBUG               0x1
 #define KEMPLD_TYPE_CUSTOM              0x2
 
+#define KEMPLD_VERSION_LEN              10
+
 /**
  * struct kempld_info - PLD device information structure
  * @major:      PLD major revision
@@ -60,6 +62,7 @@
  * @type:       PLD type
  * @spec_major: PLD FW specification major revision
  * @spec_minor: PLD FW specification minor revision
+ * @version:    PLD version string
  */
 struct kempld_info {
         unsigned int major;
@@ -69,6 +72,7 @@ struct kempld_info {
         unsigned int type;
         unsigned int spec_major;
         unsigned int spec_minor;
+        char version[KEMPLD_VERSION_LEN];
 };
 
 /**
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h
index a326c850f046..d63b1d309106 100644
--- a/include/linux/mfd/mc13xxx.h
+++ b/include/linux/mfd/mc13xxx.h
@@ -117,10 +117,6 @@ struct mc13xxx_led_platform_data {
 
 #define MAX_LED_CONTROL_REGS    6
 
-struct mc13xxx_leds_platform_data {
-        struct mc13xxx_led_platform_data *led;
-        int num_leds;
-
 /* MC13783 LED Control 0 */
 #define MC13783_LED_C0_ENABLE           (1 << 0)
 #define MC13783_LED_C0_TRIODE_MD        (1 << 7)
@@ -169,10 +165,13 @@ struct mc13xxx_leds_platform_data {
 /* MC34708 LED Control 0 */
 #define MC34708_LED_C0_CURRENT_R(x)     (((x) & 0x3) << 9)
 #define MC34708_LED_C0_CURRENT_G(x)     (((x) & 0x3) << 21)
+
+struct mc13xxx_leds_platform_data {
+        struct mc13xxx_led_platform_data *led;
+        int num_leds;
         u32 led_control[MAX_LED_CONTROL_REGS];
 };
 
-struct mc13xxx_buttons_platform_data {
 #define MC13783_BUTTON_DBNC_0MS         0
 #define MC13783_BUTTON_DBNC_30MS        1
 #define MC13783_BUTTON_DBNC_150MS       2
@@ -180,6 +179,8 @@ struct mc13xxx_buttons_platform_data {
 #define MC13783_BUTTON_ENABLE           (1 << 2)
 #define MC13783_BUTTON_POL_INVERT       (1 << 3)
 #define MC13783_BUTTON_RESET_EN         (1 << 4)
+
+struct mc13xxx_buttons_platform_data {
         int b1on_flags;
         unsigned short b1on_key;
         int b2on_flags;
@@ -188,14 +189,14 @@ struct mc13xxx_buttons_platform_data {
         unsigned short b3on_key;
 };
 
+#define MC13783_TS_ATO_FIRST    false
+#define MC13783_TS_ATO_EACH     true
+
 struct mc13xxx_ts_platform_data {
         /* Delay between Touchscreen polarization and ADC Conversion.
          * Given in clock ticks of a 32 kHz clock which gives a granularity of
          * about 30.5ms */
         u8 ato;
-
-#define MC13783_TS_ATO_FIRST false
-#define MC13783_TS_ATO_EACH  true
         /* Use the ATO delay only for the first conversion or for each one */
         bool atox;
 };
@@ -210,11 +211,12 @@ struct mc13xxx_codec_platform_data {
         enum mc13783_ssi_port dac_ssi_port;
 };
 
-struct mc13xxx_platform_data {
-#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
+#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
 #define MC13XXX_USE_CODEC       (1 << 1)
 #define MC13XXX_USE_ADC         (1 << 2)
 #define MC13XXX_USE_RTC         (1 << 3)
+
+struct mc13xxx_platform_data {
         unsigned int flags;
 
         struct mc13xxx_regulator_platform_data regulators;
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index b8f87b704409..3420e09e2e20 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -482,10 +482,10 @@ enum usb_irq_events {
 
 /* helper macro to get correct slave number */
 #define PALMAS_BASE_TO_SLAVE(x)         ((x >> 8) - 1)
-#define PALMAS_BASE_TO_REG(x, y)        ((x & 0xff) + y)
+#define PALMAS_BASE_TO_REG(x, y)        ((x & 0xFF) + y)
 
 /* Base addresses of IP blocks in Palmas */
-#define PALMAS_SMPS_DVS_BASE                                    0x20
+#define PALMAS_SMPS_DVS_BASE                                    0x020
 #define PALMAS_RTC_BASE                                         0x100
 #define PALMAS_VALIDITY_BASE                                    0x118
 #define PALMAS_SMPS_BASE                                        0x120
@@ -504,19 +504,19 @@ enum usb_irq_events {
 #define PALMAS_TRIM_GPADC_BASE                                  0x3CD
 
 /* Registers for function RTC */
-#define PALMAS_SECONDS_REG                                      0x0
-#define PALMAS_MINUTES_REG                                      0x1
-#define PALMAS_HOURS_REG                                        0x2
-#define PALMAS_DAYS_REG                                         0x3
-#define PALMAS_MONTHS_REG                                       0x4
-#define PALMAS_YEARS_REG                                        0x5
-#define PALMAS_WEEKS_REG                                        0x6
-#define PALMAS_ALARM_SECONDS_REG                                0x8
-#define PALMAS_ALARM_MINUTES_REG                                0x9
-#define PALMAS_ALARM_HOURS_REG                                  0xA
-#define PALMAS_ALARM_DAYS_REG                                   0xB
-#define PALMAS_ALARM_MONTHS_REG                                 0xC
-#define PALMAS_ALARM_YEARS_REG                                  0xD
+#define PALMAS_SECONDS_REG                                      0x00
+#define PALMAS_MINUTES_REG                                      0x01
+#define PALMAS_HOURS_REG                                        0x02
+#define PALMAS_DAYS_REG                                         0x03
+#define PALMAS_MONTHS_REG                                       0x04
+#define PALMAS_YEARS_REG                                        0x05
+#define PALMAS_WEEKS_REG                                        0x06
+#define PALMAS_ALARM_SECONDS_REG                                0x08
+#define PALMAS_ALARM_MINUTES_REG                                0x09
+#define PALMAS_ALARM_HOURS_REG                                  0x0A
+#define PALMAS_ALARM_DAYS_REG                                   0x0B
+#define PALMAS_ALARM_MONTHS_REG                                 0x0C
+#define PALMAS_ALARM_YEARS_REG                                  0x0D
 #define PALMAS_RTC_CTRL_REG                                     0x10
 #define PALMAS_RTC_STATUS_REG                                   0x11
 #define PALMAS_RTC_INTERRUPTS_REG                               0x12
@@ -527,201 +527,201 @@ enum usb_irq_events {
 
 /* Bit definitions for SECONDS_REG */
 #define PALMAS_SECONDS_REG_SEC1_MASK                            0x70
-#define PALMAS_SECONDS_REG_SEC1_SHIFT                           4
-#define PALMAS_SECONDS_REG_SEC0_MASK                            0x0f
-#define PALMAS_SECONDS_REG_SEC0_SHIFT                           0
+#define PALMAS_SECONDS_REG_SEC1_SHIFT                           0x04
+#define PALMAS_SECONDS_REG_SEC0_MASK                            0x0F
+#define PALMAS_SECONDS_REG_SEC0_SHIFT                           0x00
 
 /* Bit definitions for MINUTES_REG */
 #define PALMAS_MINUTES_REG_MIN1_MASK                            0x70
-#define PALMAS_MINUTES_REG_MIN1_SHIFT                           4
-#define PALMAS_MINUTES_REG_MIN0_MASK                            0x0f
-#define PALMAS_MINUTES_REG_MIN0_SHIFT                           0
+#define PALMAS_MINUTES_REG_MIN1_SHIFT                           0x04
+#define PALMAS_MINUTES_REG_MIN0_MASK                            0x0F
+#define PALMAS_MINUTES_REG_MIN0_SHIFT                           0x00
 
 /* Bit definitions for HOURS_REG */
 #define PALMAS_HOURS_REG_PM_NAM                                 0x80
-#define PALMAS_HOURS_REG_PM_NAM_SHIFT                           7
+#define PALMAS_HOURS_REG_PM_NAM_SHIFT                           0x07
 #define PALMAS_HOURS_REG_HOUR1_MASK                             0x30
-#define PALMAS_HOURS_REG_HOUR1_SHIFT                            4
-#define PALMAS_HOURS_REG_HOUR0_MASK                             0x0f
-#define PALMAS_HOURS_REG_HOUR0_SHIFT                            0
+#define PALMAS_HOURS_REG_HOUR1_SHIFT                            0x04
+#define PALMAS_HOURS_REG_HOUR0_MASK                             0x0F
+#define PALMAS_HOURS_REG_HOUR0_SHIFT                            0x00
 
 /* Bit definitions for DAYS_REG */
 #define PALMAS_DAYS_REG_DAY1_MASK                               0x30
-#define PALMAS_DAYS_REG_DAY1_SHIFT                              4
-#define PALMAS_DAYS_REG_DAY0_MASK                               0x0f
-#define PALMAS_DAYS_REG_DAY0_SHIFT                              0
+#define PALMAS_DAYS_REG_DAY1_SHIFT                              0x04
+#define PALMAS_DAYS_REG_DAY0_MASK                               0x0F
+#define PALMAS_DAYS_REG_DAY0_SHIFT                              0x00
 
 /* Bit definitions for MONTHS_REG */
 #define PALMAS_MONTHS_REG_MONTH1                                0x10
-#define PALMAS_MONTHS_REG_MONTH1_SHIFT                          4
-#define PALMAS_MONTHS_REG_MONTH0_MASK                           0x0f
-#define PALMAS_MONTHS_REG_MONTH0_SHIFT                          0
+#define PALMAS_MONTHS_REG_MONTH1_SHIFT                          0x04
+#define PALMAS_MONTHS_REG_MONTH0_MASK                           0x0F
+#define PALMAS_MONTHS_REG_MONTH0_SHIFT                          0x00
 
 /* Bit definitions for YEARS_REG */
 #define PALMAS_YEARS_REG_YEAR1_MASK                             0xf0
-#define PALMAS_YEARS_REG_YEAR1_SHIFT                            4
-#define PALMAS_YEARS_REG_YEAR0_MASK                             0x0f
-#define PALMAS_YEARS_REG_YEAR0_SHIFT                            0
+#define PALMAS_YEARS_REG_YEAR1_SHIFT                            0x04
+#define PALMAS_YEARS_REG_YEAR0_MASK                             0x0F
+#define PALMAS_YEARS_REG_YEAR0_SHIFT                            0x00
 
 /* Bit definitions for WEEKS_REG */
 #define PALMAS_WEEKS_REG_WEEK_MASK                              0x07
-#define PALMAS_WEEKS_REG_WEEK_SHIFT                             0
+#define PALMAS_WEEKS_REG_WEEK_SHIFT                             0x00
 
 /* Bit definitions for ALARM_SECONDS_REG */
 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_MASK                0x70
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT               4
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK                0x0f
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT               0
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT               0x04
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK                0x0F
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT               0x00
 
 /* Bit definitions for ALARM_MINUTES_REG */
 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_MASK                0x70
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT               4
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK                0x0f
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT               0
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT               0x04
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK                0x0F
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT               0x00
 
 /* Bit definitions for ALARM_HOURS_REG */
 #define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM                     0x80
-#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT               7
+#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT               0x07
 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_MASK                 0x30
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT                4
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK                 0x0f
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT                0
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT                0x04
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK                 0x0F
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT                0x00
 
 /* Bit definitions for ALARM_DAYS_REG */
 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_MASK                   0x30
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT                  4
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK                   0x0f
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT                  0
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT                  0x04
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK                   0x0F
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT                  0x00
 
 /* Bit definitions for ALARM_MONTHS_REG */
 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1                    0x10
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT              4
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK               0x0f
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT              0
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT              0x04
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK               0x0F
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT              0x00
 
 /* Bit definitions for ALARM_YEARS_REG */
 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_MASK                 0xf0
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT                4
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK                 0x0f
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT                0
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT                0x04
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK                 0x0F
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT                0x00
 
 /* Bit definitions for RTC_CTRL_REG */
 #define PALMAS_RTC_CTRL_REG_RTC_V_OPT                           0x80
-#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT                     7
+#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT                     0x07
 #define PALMAS_RTC_CTRL_REG_GET_TIME                            0x40
-#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT                      6
+#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT                      0x06
 #define PALMAS_RTC_CTRL_REG_SET_32_COUNTER                      0x20
-#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT                5
+#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT                0x05
 #define PALMAS_RTC_CTRL_REG_TEST_MODE                           0x10
-#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT                     4
+#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT                     0x04
 #define PALMAS_RTC_CTRL_REG_MODE_12_24                          0x08
-#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT                    3
+#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT                    0x03
 #define PALMAS_RTC_CTRL_REG_AUTO_COMP                           0x04
-#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT                     2
+#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT                     0x02
 #define PALMAS_RTC_CTRL_REG_ROUND_30S                           0x02
-#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT                     1
+#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT                     0x01
 #define PALMAS_RTC_CTRL_REG_STOP_RTC                            0x01
-#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT                      0
+#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT                      0x00
 
 /* Bit definitions for RTC_STATUS_REG */
 #define PALMAS_RTC_STATUS_REG_POWER_UP                          0x80
-#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT                    7
+#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT                    0x07
 #define PALMAS_RTC_STATUS_REG_ALARM                             0x40
-#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT                       6
+#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT                       0x06
 #define PALMAS_RTC_STATUS_REG_EVENT_1D                          0x20
-#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT                    5
+#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT                    0x05
 #define PALMAS_RTC_STATUS_REG_EVENT_1H                          0x10
-#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT                    4
+#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT                    0x04
 #define PALMAS_RTC_STATUS_REG_EVENT_1M                          0x08
-#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT                    3
+#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT                    0x03
 #define PALMAS_RTC_STATUS_REG_EVENT_1S                          0x04
-#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT                    2
+#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT                    0x02
 #define PALMAS_RTC_STATUS_REG_RUN                               0x02
-#define PALMAS_RTC_STATUS_REG_RUN_SHIFT                         1
+#define PALMAS_RTC_STATUS_REG_RUN_SHIFT                         0x01
 
 /* Bit definitions for RTC_INTERRUPTS_REG */
 #define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN              0x10
-#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT        4
+#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT        0x04
 #define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM                      0x08
-#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT                3
+#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT                0x03
 #define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER                      0x04
-#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT                2
+#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT                0x02
 #define PALMAS_RTC_INTERRUPTS_REG_EVERY_MASK                    0x03
-#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT                   0
+#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT                   0x00
 
 /* Bit definitions for RTC_COMP_LSB_REG */
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK               0xff
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT              0
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK               0xFF
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT              0x00
 
 /* Bit definitions for RTC_COMP_MSB_REG */
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK               0xff
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT              0
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK               0xFF
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT              0x00
 
 /* Bit definitions for RTC_RES_PROG_REG */
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK                0x3f
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT               0
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK                0x3F
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT               0x00
 
 /* Bit definitions for RTC_RESET_STATUS_REG */
 #define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS                0x01
-#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT          0
+#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT          0x00
 
 /* Registers for function BACKUP */
-#define PALMAS_BACKUP0                                          0x0
-#define PALMAS_BACKUP1                                          0x1
-#define PALMAS_BACKUP2                                          0x2
-#define PALMAS_BACKUP3                                          0x3
-#define PALMAS_BACKUP4                                          0x4
-#define PALMAS_BACKUP5                                          0x5
-#define PALMAS_BACKUP6                                          0x6
-#define PALMAS_BACKUP7                                          0x7
+#define PALMAS_BACKUP0                                          0x00
+#define PALMAS_BACKUP1                                          0x01
+#define PALMAS_BACKUP2                                          0x02
+#define PALMAS_BACKUP3                                          0x03
+#define PALMAS_BACKUP4                                          0x04
+#define PALMAS_BACKUP5                                          0x05
+#define PALMAS_BACKUP6                                          0x06
+#define PALMAS_BACKUP7                                          0x07
 
 /* Bit definitions for BACKUP0 */
-#define PALMAS_BACKUP0_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP0_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP0_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP0_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP1 */
-#define PALMAS_BACKUP1_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP1_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP1_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP1_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP2 */
-#define PALMAS_BACKUP2_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP2_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP2_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP2_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP3 */
-#define PALMAS_BACKUP3_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP3_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP3_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP3_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP4 */
-#define PALMAS_BACKUP4_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP4_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP4_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP4_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP5 */
-#define PALMAS_BACKUP5_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP5_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP5_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP5_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP6 */
-#define PALMAS_BACKUP6_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP6_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP6_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP6_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP7 */
-#define PALMAS_BACKUP7_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP7_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP7_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP7_BACKUP_SHIFT                             0x00
 
 /* Registers for function SMPS */
-#define PALMAS_SMPS12_CTRL                                      0x0
-#define PALMAS_SMPS12_TSTEP                                     0x1
-#define PALMAS_SMPS12_FORCE                                     0x2
-#define PALMAS_SMPS12_VOLTAGE                                   0x3
-#define PALMAS_SMPS3_CTRL                                       0x4
-#define PALMAS_SMPS3_VOLTAGE                                    0x7
-#define PALMAS_SMPS45_CTRL                                      0x8
-#define PALMAS_SMPS45_TSTEP                                     0x9
-#define PALMAS_SMPS45_FORCE                                     0xA
-#define PALMAS_SMPS45_VOLTAGE                                   0xB
-#define PALMAS_SMPS6_CTRL                                       0xC
-#define PALMAS_SMPS6_TSTEP                                      0xD
-#define PALMAS_SMPS6_FORCE                                      0xE
-#define PALMAS_SMPS6_VOLTAGE                                    0xF
+#define PALMAS_SMPS12_CTRL                                      0x00
+#define PALMAS_SMPS12_TSTEP                                     0x01
+#define PALMAS_SMPS12_FORCE                                     0x02
+#define PALMAS_SMPS12_VOLTAGE                                   0x03
+#define PALMAS_SMPS3_CTRL                                       0x04
+#define PALMAS_SMPS3_VOLTAGE                                    0x07
+#define PALMAS_SMPS45_CTRL                                      0x08
+#define PALMAS_SMPS45_TSTEP                                     0x09
+#define PALMAS_SMPS45_FORCE                                     0x0A
+#define PALMAS_SMPS45_VOLTAGE                                   0x0B
+#define PALMAS_SMPS6_CTRL                                       0x0C
+#define PALMAS_SMPS6_TSTEP                                      0x0D
+#define PALMAS_SMPS6_FORCE                                      0x0E
+#define PALMAS_SMPS6_VOLTAGE                                    0x0F
 #define PALMAS_SMPS7_CTRL                                       0x10
 #define PALMAS_SMPS7_VOLTAGE                                    0x13
 #define PALMAS_SMPS8_CTRL                                       0x14
@@ -744,303 +744,303 @@ enum usb_irq_events {
 
 /* Bit definitions for SMPS12_CTRL */
 #define PALMAS_SMPS12_CTRL_WR_S                                 0x80
-#define PALMAS_SMPS12_CTRL_WR_S_SHIFT                           7
+#define PALMAS_SMPS12_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN                        0x40
-#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT                  6
+#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT                  0x06
 #define PALMAS_SMPS12_CTRL_STATUS_MASK                          0x30
-#define PALMAS_SMPS12_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SMPS12_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK                      0x0c
-#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK                     0x03
-#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS12_TSTEP */
 #define PALMAS_SMPS12_TSTEP_TSTEP_MASK                          0x03
-#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT                         0
+#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT                         0x00
 
 /* Bit definitions for SMPS12_FORCE */
 #define PALMAS_SMPS12_FORCE_CMD                                 0x80
-#define PALMAS_SMPS12_FORCE_CMD_SHIFT                           7
-#define PALMAS_SMPS12_FORCE_VSEL_MASK                           0x7f
-#define PALMAS_SMPS12_FORCE_VSEL_SHIFT                          0
+#define PALMAS_SMPS12_FORCE_CMD_SHIFT                           0x07
+#define PALMAS_SMPS12_FORCE_VSEL_MASK                           0x7F
+#define PALMAS_SMPS12_FORCE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for SMPS12_VOLTAGE */
 #define PALMAS_SMPS12_VOLTAGE_RANGE                             0x80
-#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT                       7
-#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK                         0x7f
-#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT                       0x07
+#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK                         0x7F
+#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for SMPS3_CTRL */
 #define PALMAS_SMPS3_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS3_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS3_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS3_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS3_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS3_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS3_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS3_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS3_VOLTAGE */
 #define PALMAS_SMPS3_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS45_CTRL */
 #define PALMAS_SMPS45_CTRL_WR_S                                 0x80
-#define PALMAS_SMPS45_CTRL_WR_S_SHIFT                           7
+#define PALMAS_SMPS45_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN                        0x40
-#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT                  6
+#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT                  0x06
 #define PALMAS_SMPS45_CTRL_STATUS_MASK                          0x30
-#define PALMAS_SMPS45_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SMPS45_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SMPS45_CTRL_MODE_SLEEP_MASK                      0x0c
-#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SMPS45_CTRL_MODE_ACTIVE_MASK                     0x03
-#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS45_TSTEP */
 #define PALMAS_SMPS45_TSTEP_TSTEP_MASK                          0x03
-#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT                         0
+#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT                         0x00
 
 /* Bit definitions for SMPS45_FORCE */
 #define PALMAS_SMPS45_FORCE_CMD                                 0x80
-#define PALMAS_SMPS45_FORCE_CMD_SHIFT                           7
-#define PALMAS_SMPS45_FORCE_VSEL_MASK                           0x7f
-#define PALMAS_SMPS45_FORCE_VSEL_SHIFT                          0
+#define PALMAS_SMPS45_FORCE_CMD_SHIFT                           0x07
+#define PALMAS_SMPS45_FORCE_VSEL_MASK                           0x7F
+#define PALMAS_SMPS45_FORCE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for SMPS45_VOLTAGE */
 #define PALMAS_SMPS45_VOLTAGE_RANGE                             0x80
-#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT                       7
-#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK                         0x7f
-#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT                       0x07
+#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK                         0x7F
+#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for SMPS6_CTRL */
 #define PALMAS_SMPS6_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS6_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS6_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN                         0x40
-#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT                   6
+#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT                   0x06
 #define PALMAS_SMPS6_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS6_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS6_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS6_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS6_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS6_TSTEP */
 #define PALMAS_SMPS6_TSTEP_TSTEP_MASK                           0x03
-#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT                          0
+#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT                          0x00
 
 /* Bit definitions for SMPS6_FORCE */
 #define PALMAS_SMPS6_FORCE_CMD                                  0x80
-#define PALMAS_SMPS6_FORCE_CMD_SHIFT                            7
-#define PALMAS_SMPS6_FORCE_VSEL_MASK                            0x7f
-#define PALMAS_SMPS6_FORCE_VSEL_SHIFT                           0
+#define PALMAS_SMPS6_FORCE_CMD_SHIFT                            0x07
+#define PALMAS_SMPS6_FORCE_VSEL_MASK                            0x7F
+#define PALMAS_SMPS6_FORCE_VSEL_SHIFT                           0x00
 
 /* Bit definitions for SMPS6_VOLTAGE */
 #define PALMAS_SMPS6_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS7_CTRL */
 #define PALMAS_SMPS7_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS7_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS7_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS7_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS7_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS7_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS7_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS7_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS7_VOLTAGE */
 #define PALMAS_SMPS7_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS8_CTRL */
 #define PALMAS_SMPS8_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS8_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS8_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN                         0x40
-#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT                   6
+#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT                   0x06
 #define PALMAS_SMPS8_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS8_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS8_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS8_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS8_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS8_TSTEP */
 #define PALMAS_SMPS8_TSTEP_TSTEP_MASK                           0x03
-#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT                          0
+#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT                          0x00
 
 /* Bit definitions for SMPS8_FORCE */
 #define PALMAS_SMPS8_FORCE_CMD                                  0x80
-#define PALMAS_SMPS8_FORCE_CMD_SHIFT                            7
-#define PALMAS_SMPS8_FORCE_VSEL_MASK                            0x7f
-#define PALMAS_SMPS8_FORCE_VSEL_SHIFT                           0
+#define PALMAS_SMPS8_FORCE_CMD_SHIFT                            0x07
+#define PALMAS_SMPS8_FORCE_VSEL_MASK                            0x7F
+#define PALMAS_SMPS8_FORCE_VSEL_SHIFT                           0x00
 
 /* Bit definitions for SMPS8_VOLTAGE */
 #define PALMAS_SMPS8_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS9_CTRL */
 #define PALMAS_SMPS9_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS9_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS9_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS9_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS9_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS9_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS9_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS9_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS9_VOLTAGE */
 #define PALMAS_SMPS9_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS10_CTRL */
 #define PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK                      0xf0
-#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT                     4
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK                     0x0f
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT                     0x04
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK                     0x0F
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS10_STATUS */
-#define PALMAS_SMPS10_STATUS_STATUS_MASK                        0x0f
-#define PALMAS_SMPS10_STATUS_STATUS_SHIFT                       0
+#define PALMAS_SMPS10_STATUS_STATUS_MASK                        0x0F
+#define PALMAS_SMPS10_STATUS_STATUS_SHIFT                       0x00
 
 /* Bit definitions for SMPS_CTRL */
 #define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN                      0x20
-#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT                5
+#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT                0x05
 #define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN                      0x10
-#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT                4
+#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT                0x04
 #define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK                 0x0c
-#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT                2
+#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT                0x02
 #define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_MASK                0x03
-#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT               0
+#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT               0x00
 
 /* Bit definitions for SMPS_PD_CTRL */
 #define PALMAS_SMPS_PD_CTRL_SMPS9                               0x40
-#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT                         6
+#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT                         0x06
 #define PALMAS_SMPS_PD_CTRL_SMPS8                               0x20
-#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT                         5
+#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT                         0x05
 #define PALMAS_SMPS_PD_CTRL_SMPS7                               0x10
-#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT                         4
+#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT                         0x04
 #define PALMAS_SMPS_PD_CTRL_SMPS6                               0x08
-#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT                         3
+#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT                         0x03
 #define PALMAS_SMPS_PD_CTRL_SMPS45                              0x04
-#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT                        2
+#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT                        0x02
 #define PALMAS_SMPS_PD_CTRL_SMPS3                               0x02
-#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT                         1
+#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT                         0x01
 #define PALMAS_SMPS_PD_CTRL_SMPS12                              0x01
-#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT                        0
+#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT                        0x00
 
 /* Bit definitions for SMPS_THERMAL_EN */
 #define PALMAS_SMPS_THERMAL_EN_SMPS9                            0x40
-#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT                      6
+#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT                      0x06
 #define PALMAS_SMPS_THERMAL_EN_SMPS8                            0x20
-#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT                      5
+#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT                      0x05
 #define PALMAS_SMPS_THERMAL_EN_SMPS6                            0x08
-#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT                      3
+#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT                      0x03
 #define PALMAS_SMPS_THERMAL_EN_SMPS457                          0x04
-#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT                    2
+#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT                    0x02
 #define PALMAS_SMPS_THERMAL_EN_SMPS123                          0x01
-#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT                    0
+#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT                    0x00
 
 /* Bit definitions for SMPS_THERMAL_STATUS */
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS9                        0x40
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT                  6
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT                  0x06
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS8                        0x20
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT                  5
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT                  0x05
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS6                        0x08
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT                  3
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT                  0x03
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS457                      0x04
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT                2
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT                0x02
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS123                      0x01
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT                0
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT                0x00
 
 /* Bit definitions for SMPS_SHORT_STATUS */
 #define PALMAS_SMPS_SHORT_STATUS_SMPS10                         0x80
-#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT                   7
+#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT                   0x07
 #define PALMAS_SMPS_SHORT_STATUS_SMPS9                          0x40
-#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT                    6
+#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT                    0x06
 #define PALMAS_SMPS_SHORT_STATUS_SMPS8                          0x20
-#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT                    5
+#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT                    0x05
 #define PALMAS_SMPS_SHORT_STATUS_SMPS7                          0x10
-#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT                    4
+#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT                    0x04
 #define PALMAS_SMPS_SHORT_STATUS_SMPS6                          0x08
-#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT                    3
+#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT                    0x03
 #define PALMAS_SMPS_SHORT_STATUS_SMPS45                         0x04
-#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT                   2
+#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT                   0x02
 #define PALMAS_SMPS_SHORT_STATUS_SMPS3                          0x02
-#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT                    1
+#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT                    0x01
 #define PALMAS_SMPS_SHORT_STATUS_SMPS12                         0x01
-#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT                   0
+#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT                   0x00
 
 /* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9             0x40
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT       6
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT       0x06
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8             0x20
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT       5
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT       0x05
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7             0x10
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT       4
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT       0x04
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6             0x08
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT       3
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT       0x03
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45            0x04
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT      2
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT      0x02
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3             0x02
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT       1
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT       0x01
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12            0x01
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT      0
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT      0x00
 
 /* Bit definitions for SMPS_POWERGOOD_MASK1 */
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10                      0x80
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT                7
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT                0x07
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9                       0x40
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT                 6
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT                 0x06
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8                       0x20
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT                 5
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT                 0x05
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7                       0x10
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT                 4
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT                 0x04
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6                       0x08
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT                 3
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT                 0x03
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45                      0x04
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT                2
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT                0x02
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3                       0x02
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT                 1
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT                 0x01
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12                      0x01
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT                0
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT                0x00
 
 /* Bit definitions for SMPS_POWERGOOD_MASK2 */
 #define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT       0x80
-#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 7
+#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
 #define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7                      0x04
-#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT                2
+#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT                0x02
 #define PALMAS_SMPS_POWERGOOD_MASK2_VBUS                        0x02
-#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT                  1
+#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT                  0x01
 #define PALMAS_SMPS_POWERGOOD_MASK2_ACOK                        0x01
-#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT                  0
+#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT                  0x00
 
 /* Registers for function LDO */
-#define PALMAS_LDO1_CTRL                                        0x0
-#define PALMAS_LDO1_VOLTAGE                                     0x1
-#define PALMAS_LDO2_CTRL                                        0x2
-#define PALMAS_LDO2_VOLTAGE                                     0x3
-#define PALMAS_LDO3_CTRL                                        0x4
-#define PALMAS_LDO3_VOLTAGE                                     0x5
-#define PALMAS_LDO4_CTRL                                        0x6
-#define PALMAS_LDO4_VOLTAGE                                     0x7
-#define PALMAS_LDO5_CTRL                                        0x8
-#define PALMAS_LDO5_VOLTAGE                                     0x9
-#define PALMAS_LDO6_CTRL                                        0xA
-#define PALMAS_LDO6_VOLTAGE                                     0xB
-#define PALMAS_LDO7_CTRL                                        0xC
-#define PALMAS_LDO7_VOLTAGE                                     0xD
-#define PALMAS_LDO8_CTRL                                        0xE
-#define PALMAS_LDO8_VOLTAGE                                     0xF
+#define PALMAS_LDO1_CTRL                                        0x00
+#define PALMAS_LDO1_VOLTAGE                                     0x01
+#define PALMAS_LDO2_CTRL                                        0x02
+#define PALMAS_LDO2_VOLTAGE                                     0x03
+#define PALMAS_LDO3_CTRL                                        0x04
+#define PALMAS_LDO3_VOLTAGE                                     0x05
+#define PALMAS_LDO4_CTRL                                        0x06
+#define PALMAS_LDO4_VOLTAGE                                     0x07
+#define PALMAS_LDO5_CTRL                                        0x08
+#define PALMAS_LDO5_VOLTAGE                                     0x09
+#define PALMAS_LDO6_CTRL                                        0x0A
+#define PALMAS_LDO6_VOLTAGE                                     0x0B
+#define PALMAS_LDO7_CTRL                                        0x0C
+#define PALMAS_LDO7_VOLTAGE                                     0x0D
+#define PALMAS_LDO8_CTRL                                        0x0E
+#define PALMAS_LDO8_VOLTAGE                                     0x0F
 #define PALMAS_LDO9_CTRL                                        0x10
 #define PALMAS_LDO9_VOLTAGE                                     0x11
 #define PALMAS_LDOLN_CTRL                                       0x12
@@ -1055,236 +1055,236 @@ enum usb_irq_events {
 
 /* Bit definitions for LDO1_CTRL */
 #define PALMAS_LDO1_CTRL_WR_S                                   0x80
-#define PALMAS_LDO1_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO1_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO1_CTRL_STATUS                                 0x10
-#define PALMAS_LDO1_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO1_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO1_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO1_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO1_VOLTAGE */
-#define PALMAS_LDO1_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO1_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO2_CTRL */
 #define PALMAS_LDO2_CTRL_WR_S                                   0x80
-#define PALMAS_LDO2_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO2_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO2_CTRL_STATUS                                 0x10
-#define PALMAS_LDO2_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO2_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO2_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO2_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO2_VOLTAGE */
-#define PALMAS_LDO2_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO2_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO3_CTRL */
 #define PALMAS_LDO3_CTRL_WR_S                                   0x80
-#define PALMAS_LDO3_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO3_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO3_CTRL_STATUS                                 0x10
-#define PALMAS_LDO3_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO3_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO3_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO3_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO3_VOLTAGE */
-#define PALMAS_LDO3_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO3_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO4_CTRL */
 #define PALMAS_LDO4_CTRL_WR_S                                   0x80
-#define PALMAS_LDO4_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO4_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO4_CTRL_STATUS                                 0x10
-#define PALMAS_LDO4_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO4_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO4_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO4_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO4_VOLTAGE */
-#define PALMAS_LDO4_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO4_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO5_CTRL */
 #define PALMAS_LDO5_CTRL_WR_S                                   0x80
-#define PALMAS_LDO5_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO5_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO5_CTRL_STATUS                                 0x10
-#define PALMAS_LDO5_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO5_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO5_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO5_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO5_VOLTAGE */
-#define PALMAS_LDO5_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO5_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO6_CTRL */
 #define PALMAS_LDO6_CTRL_WR_S                                   0x80
-#define PALMAS_LDO6_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO6_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO6_CTRL_LDO_VIB_EN                             0x40
-#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT                       6
+#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT                       0x06
 #define PALMAS_LDO6_CTRL_STATUS                                 0x10
-#define PALMAS_LDO6_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO6_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO6_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO6_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO6_VOLTAGE */
-#define PALMAS_LDO6_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO6_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO7_CTRL */
 #define PALMAS_LDO7_CTRL_WR_S                                   0x80
-#define PALMAS_LDO7_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO7_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO7_CTRL_STATUS                                 0x10
-#define PALMAS_LDO7_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO7_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO7_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO7_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO7_VOLTAGE */
-#define PALMAS_LDO7_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO7_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO8_CTRL */
 #define PALMAS_LDO8_CTRL_WR_S                                   0x80
-#define PALMAS_LDO8_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO8_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO8_CTRL_LDO_TRACKING_EN                        0x40
-#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT                  6
+#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT                  0x06
 #define PALMAS_LDO8_CTRL_STATUS                                 0x10
-#define PALMAS_LDO8_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO8_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO8_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO8_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO8_VOLTAGE */
-#define PALMAS_LDO8_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO8_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO9_CTRL */
 #define PALMAS_LDO9_CTRL_WR_S                                   0x80
-#define PALMAS_LDO9_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO9_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO9_CTRL_LDO_BYPASS_EN                          0x40
-#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT                    6
+#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT                    0x06
 #define PALMAS_LDO9_CTRL_STATUS                                 0x10
-#define PALMAS_LDO9_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO9_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO9_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO9_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO9_VOLTAGE */
-#define PALMAS_LDO9_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO9_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDOLN_CTRL */
 #define PALMAS_LDOLN_CTRL_WR_S                                  0x80
-#define PALMAS_LDOLN_CTRL_WR_S_SHIFT                            7
+#define PALMAS_LDOLN_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_LDOLN_CTRL_STATUS                                0x10
-#define PALMAS_LDOLN_CTRL_STATUS_SHIFT                          4
+#define PALMAS_LDOLN_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_LDOLN_CTRL_MODE_SLEEP                            0x04
-#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_LDOLN_CTRL_MODE_ACTIVE                           0x01
-#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for LDOLN_VOLTAGE */
-#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK                          0x3f
-#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK                          0x3F
+#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for LDOUSB_CTRL */
 #define PALMAS_LDOUSB_CTRL_WR_S                                 0x80
-#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT                           7
+#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_LDOUSB_CTRL_STATUS                               0x10
-#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT                         4
+#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_LDOUSB_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_LDOUSB_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for LDOUSB_VOLTAGE */
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK                         0x3f
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK                         0x3F
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for LDO_CTRL */
 #define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS                     0x01
-#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT               0
+#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT               0x00
 
 /* Bit definitions for LDO_PD_CTRL1 */
 #define PALMAS_LDO_PD_CTRL1_LDO8                                0x80
-#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT                          7
+#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT                          0x07
 #define PALMAS_LDO_PD_CTRL1_LDO7                                0x40
-#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT                          6
+#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT                          0x06
 #define PALMAS_LDO_PD_CTRL1_LDO6                                0x20
-#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT                          5
+#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT                          0x05
 #define PALMAS_LDO_PD_CTRL1_LDO5                                0x10
-#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT                          4
+#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT                          0x04
 #define PALMAS_LDO_PD_CTRL1_LDO4                                0x08
-#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT                          3
+#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT                          0x03
 #define PALMAS_LDO_PD_CTRL1_LDO3                                0x04
-#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT                          2
+#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT                          0x02
 #define PALMAS_LDO_PD_CTRL1_LDO2                                0x02
-#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT                          1
+#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT                          0x01
 #define PALMAS_LDO_PD_CTRL1_LDO1                                0x01
-#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT                          0
+#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT                          0x00
 
 /* Bit definitions for LDO_PD_CTRL2 */
 #define PALMAS_LDO_PD_CTRL2_LDOUSB                              0x04
-#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT                        2
+#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT                        0x02
 #define PALMAS_LDO_PD_CTRL2_LDOLN                               0x02
-#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT                         1
+#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT                         0x01
 #define PALMAS_LDO_PD_CTRL2_LDO9                                0x01
-#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT                          0
+#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT                          0x00
 
 /* Bit definitions for LDO_SHORT_STATUS1 */
 #define PALMAS_LDO_SHORT_STATUS1_LDO8                           0x80
-#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT                     7
+#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT                     0x07
 #define PALMAS_LDO_SHORT_STATUS1_LDO7                           0x40
-#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT                     6
+#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT                     0x06
 #define PALMAS_LDO_SHORT_STATUS1_LDO6                           0x20
-#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT                     5
+#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT                     0x05
 #define PALMAS_LDO_SHORT_STATUS1_LDO5                           0x10
-#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT                     4
+#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT                     0x04
 #define PALMAS_LDO_SHORT_STATUS1_LDO4                           0x08
-#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT                     3
+#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT                     0x03
 #define PALMAS_LDO_SHORT_STATUS1_LDO3                           0x04
-#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT                     2
+#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT                     0x02
 #define PALMAS_LDO_SHORT_STATUS1_LDO2                           0x02
-#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT                     1
+#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT                     0x01
 #define PALMAS_LDO_SHORT_STATUS1_LDO1                           0x01
-#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT                     0
+#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT                     0x00
 
 /* Bit definitions for LDO_SHORT_STATUS2 */
 #define PALMAS_LDO_SHORT_STATUS2_LDOVANA                        0x08
-#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT                  3
+#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT                  0x03
 #define PALMAS_LDO_SHORT_STATUS2_LDOUSB                         0x04
-#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT                   2
+#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT                   0x02
 #define PALMAS_LDO_SHORT_STATUS2_LDOLN                          0x02
-#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT                    1
+#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT                    0x01
 #define PALMAS_LDO_SHORT_STATUS2_LDO9                           0x01
-#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT                     0
+#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT                     0x00
 
 /* Registers for function PMU_CONTROL */
-#define PALMAS_DEV_CTRL                                         0x0
-#define PALMAS_POWER_CTRL                                       0x1
-#define PALMAS_VSYS_LO                                          0x2
-#define PALMAS_VSYS_MON                                         0x3
-#define PALMAS_VBAT_MON                                         0x4
-#define PALMAS_WATCHDOG                                         0x5
-#define PALMAS_BOOT_STATUS                                      0x6
-#define PALMAS_BATTERY_BOUNCE                                   0x7
-#define PALMAS_BACKUP_BATTERY_CTRL                              0x8
-#define PALMAS_LONG_PRESS_KEY                                   0x9
-#define PALMAS_OSC_THERM_CTRL                                   0xA
-#define PALMAS_BATDEBOUNCING                                    0xB
-#define PALMAS_SWOFF_HWRST                                      0xF
+#define PALMAS_DEV_CTRL                                         0x00
+#define PALMAS_POWER_CTRL                                       0x01
+#define PALMAS_VSYS_LO                                          0x02
+#define PALMAS_VSYS_MON                                         0x03
+#define PALMAS_VBAT_MON                                         0x04
+#define PALMAS_WATCHDOG                                         0x05
+#define PALMAS_BOOT_STATUS                                      0x06
+#define PALMAS_BATTERY_BOUNCE                                   0x07
+#define PALMAS_BACKUP_BATTERY_CTRL                              0x08
+#define PALMAS_LONG_PRESS_KEY                                   0x09
+#define PALMAS_OSC_THERM_CTRL                                   0x0A
+#define PALMAS_BATDEBOUNCING                                    0x0B
+#define PALMAS_SWOFF_HWRST                                      0x0F
 #define PALMAS_SWOFF_COLDRST                                    0x10
 #define PALMAS_SWOFF_STATUS                                     0x11
 #define PALMAS_PMU_CONFIG                                       0x12
@@ -1296,668 +1296,668 @@ enum usb_irq_events {
 
 /* Bit definitions for DEV_CTRL */
 #define PALMAS_DEV_CTRL_DEV_STATUS_MASK                         0x0c
-#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT                        2
+#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT                        0x02
 #define PALMAS_DEV_CTRL_SW_RST                                  0x02
-#define PALMAS_DEV_CTRL_SW_RST_SHIFT                            1
+#define PALMAS_DEV_CTRL_SW_RST_SHIFT                            0x01
 #define PALMAS_DEV_CTRL_DEV_ON                                  0x01
-#define PALMAS_DEV_CTRL_DEV_ON_SHIFT                            0
+#define PALMAS_DEV_CTRL_DEV_ON_SHIFT                            0x00
 
 /* Bit definitions for POWER_CTRL */
 #define PALMAS_POWER_CTRL_ENABLE2_MASK                          0x04
-#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT                    2
+#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT                    0x02
 #define PALMAS_POWER_CTRL_ENABLE1_MASK                          0x02
-#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT                    1
+#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT                    0x01
 #define PALMAS_POWER_CTRL_NSLEEP_MASK                           0x01
-#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT                     0
+#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT                     0x00
 
 /* Bit definitions for VSYS_LO */
-#define PALMAS_VSYS_LO_THRESHOLD_MASK                           0x1f
-#define PALMAS_VSYS_LO_THRESHOLD_SHIFT                          0
+#define PALMAS_VSYS_LO_THRESHOLD_MASK                           0x1F
+#define PALMAS_VSYS_LO_THRESHOLD_SHIFT                          0x00
 
 /* Bit definitions for VSYS_MON */
 #define PALMAS_VSYS_MON_ENABLE                                  0x80
-#define PALMAS_VSYS_MON_ENABLE_SHIFT                            7
-#define PALMAS_VSYS_MON_THRESHOLD_MASK                          0x3f
-#define PALMAS_VSYS_MON_THRESHOLD_SHIFT                         0
+#define PALMAS_VSYS_MON_ENABLE_SHIFT                            0x07
+#define PALMAS_VSYS_MON_THRESHOLD_MASK                          0x3F
+#define PALMAS_VSYS_MON_THRESHOLD_SHIFT                         0x00
 
 /* Bit definitions for VBAT_MON */
 #define PALMAS_VBAT_MON_ENABLE                                  0x80
-#define PALMAS_VBAT_MON_ENABLE_SHIFT                            7
-#define PALMAS_VBAT_MON_THRESHOLD_MASK                          0x3f
-#define PALMAS_VBAT_MON_THRESHOLD_SHIFT                         0
+#define PALMAS_VBAT_MON_ENABLE_SHIFT                            0x07
+#define PALMAS_VBAT_MON_THRESHOLD_MASK                          0x3F
+#define PALMAS_VBAT_MON_THRESHOLD_SHIFT                         0x00
 
 /* Bit definitions for WATCHDOG */
 #define PALMAS_WATCHDOG_LOCK                                    0x20
-#define PALMAS_WATCHDOG_LOCK_SHIFT                              5
+#define PALMAS_WATCHDOG_LOCK_SHIFT                              0x05
 #define PALMAS_WATCHDOG_ENABLE                                  0x10
-#define PALMAS_WATCHDOG_ENABLE_SHIFT                            4
+#define PALMAS_WATCHDOG_ENABLE_SHIFT                            0x04
 #define PALMAS_WATCHDOG_MODE                                    0x08
-#define PALMAS_WATCHDOG_MODE_SHIFT                              3
+#define PALMAS_WATCHDOG_MODE_SHIFT                              0x03
 #define PALMAS_WATCHDOG_TIMER_MASK                              0x07
-#define PALMAS_WATCHDOG_TIMER_SHIFT                             0
+#define PALMAS_WATCHDOG_TIMER_SHIFT                             0x00
 
 /* Bit definitions for BOOT_STATUS */
 #define PALMAS_BOOT_STATUS_BOOT1                                0x02
-#define PALMAS_BOOT_STATUS_BOOT1_SHIFT                          1
+#define PALMAS_BOOT_STATUS_BOOT1_SHIFT                          0x01
 #define PALMAS_BOOT_STATUS_BOOT0                                0x01
-#define PALMAS_BOOT_STATUS_BOOT0_SHIFT                          0
+#define PALMAS_BOOT_STATUS_BOOT0_SHIFT                          0x00
 
 /* Bit definitions for BATTERY_BOUNCE */
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK                     0x3f
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT                    0
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK                     0x3F
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT                    0x00
 
 /* Bit definitions for BACKUP_BATTERY_CTRL */
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15                   0x80
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT             7
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT             0x07
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP                  0x40
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT            6
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT            0x06
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF                  0x20
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT            5
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT            0x05
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN                    0x10
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT              4
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT              0x04
 #define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG            0x08
-#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT      3
+#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT      0x03
 #define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_MASK                  0x06
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT                 1
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT                 0x01
 #define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN                    0x01
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT              0
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT              0x00
 
 /* Bit definitions for LONG_PRESS_KEY */
 #define PALMAS_LONG_PRESS_KEY_LPK_LOCK                          0x80
-#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT                    7
+#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT                    0x07
 #define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR                       0x10
-#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT                 4
+#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT                 0x04
 #define PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK                     0x0c
-#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT                    2
+#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT                    0x02
 #define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_MASK               0x03
-#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT              0
+#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT              0x00
 
 /* Bit definitions for OSC_THERM_CTRL */
 #define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP                  0x80
-#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT            7
+#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT            0x07
 #define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP                 0x40
-#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT           6
+#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT           0x06
 #define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP               0x20
-#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT         5
+#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT         0x05
 #define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP                0x10
-#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT          4
+#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT          0x04
 #define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_MASK                 0x0c
-#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT                2
+#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT                0x02
 #define PALMAS_OSC_THERM_CTRL_OSC_BYPASS                        0x02
-#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT                  1
+#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT                  0x01
 #define PALMAS_OSC_THERM_CTRL_OSC_HPMODE                        0x01
-#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT                  0
+#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT                  0x00
 
 /* Bit definitions for BATDEBOUNCING */
 #define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS                     0x80
-#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT               7
+#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT               0x07
 #define PALMAS_BATDEBOUNCING_BINS_DEB_MASK                      0x78
-#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT                     3
+#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT                     0x03
 #define PALMAS_BATDEBOUNCING_BEXT_DEB_MASK                      0x07
-#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT                     0
+#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT                     0x00
 
 /* Bit definitions for SWOFF_HWRST */
 #define PALMAS_SWOFF_HWRST_PWRON_LPK                            0x80
-#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT                      7
+#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT                      0x07
 #define PALMAS_SWOFF_HWRST_PWRDOWN                              0x40
-#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT                        6
+#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT                        0x06
 #define PALMAS_SWOFF_HWRST_WTD                                  0x20
-#define PALMAS_SWOFF_HWRST_WTD_SHIFT                            5
+#define PALMAS_SWOFF_HWRST_WTD_SHIFT                            0x05
 #define PALMAS_SWOFF_HWRST_TSHUT                                0x10
-#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT                          4
+#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT                          0x04
 #define PALMAS_SWOFF_HWRST_RESET_IN                             0x08
-#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT                       3
+#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT                       0x03
 #define PALMAS_SWOFF_HWRST_SW_RST                               0x04
-#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT                         2
+#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT                         0x02
 #define PALMAS_SWOFF_HWRST_VSYS_LO                              0x02
-#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT                        1
+#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT                        0x01
 #define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN                       0x01
-#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT                 0
+#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT                 0x00
 
 /* Bit definitions for SWOFF_COLDRST */
 #define PALMAS_SWOFF_COLDRST_PWRON_LPK                          0x80
-#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT                    7
+#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT                    0x07
 #define PALMAS_SWOFF_COLDRST_PWRDOWN                            0x40
-#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT                      6
+#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT                      0x06
 #define PALMAS_SWOFF_COLDRST_WTD                                0x20
-#define PALMAS_SWOFF_COLDRST_WTD_SHIFT                          5
+#define PALMAS_SWOFF_COLDRST_WTD_SHIFT                          0x05
 #define PALMAS_SWOFF_COLDRST_TSHUT                              0x10
-#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT                        4
+#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT                        0x04
 #define PALMAS_SWOFF_COLDRST_RESET_IN                           0x08
-#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT                     3
+#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT                     0x03
 #define PALMAS_SWOFF_COLDRST_SW_RST                             0x04
-#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT                       2
+#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT                       0x02
 #define PALMAS_SWOFF_COLDRST_VSYS_LO                            0x02
-#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT                      1
+#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT                      0x01
 #define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN                     0x01
-#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT               0
+#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT               0x00
 
 /* Bit definitions for SWOFF_STATUS */
 #define PALMAS_SWOFF_STATUS_PWRON_LPK                           0x80
-#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT                     7
+#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT                     0x07
 #define PALMAS_SWOFF_STATUS_PWRDOWN                             0x40
-#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT                       6
+#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT                       0x06
 #define PALMAS_SWOFF_STATUS_WTD                                 0x20
-#define PALMAS_SWOFF_STATUS_WTD_SHIFT                           5
+#define PALMAS_SWOFF_STATUS_WTD_SHIFT                           0x05
 #define PALMAS_SWOFF_STATUS_TSHUT                               0x10
-#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT                         4
+#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT                         0x04
 #define PALMAS_SWOFF_STATUS_RESET_IN                            0x08
-#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT                      3
+#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT                      0x03
 #define PALMAS_SWOFF_STATUS_SW_RST                              0x04
-#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT                        2
+#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT                        0x02
 #define PALMAS_SWOFF_STATUS_VSYS_LO                             0x02
-#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT                       1
+#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT                       0x01
 #define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN                      0x01
-#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT                0
+#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT                0x00
 
 /* Bit definitions for PMU_CONFIG */
 #define PALMAS_PMU_CONFIG_MULTI_CELL_EN                         0x40
-#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT                   6
+#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT                   0x06
 #define PALMAS_PMU_CONFIG_SPARE_MASK                            0x30
-#define PALMAS_PMU_CONFIG_SPARE_SHIFT                           4
+#define PALMAS_PMU_CONFIG_SPARE_SHIFT                           0x04
 #define PALMAS_PMU_CONFIG_SWOFF_DLY_MASK                        0x0c
-#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT                       2
+#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT                       0x02
 #define PALMAS_PMU_CONFIG_GATE_RESET_OUT                        0x02
-#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT                  1
+#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT                  0x01
 #define PALMAS_PMU_CONFIG_AUTODEVON                             0x01
-#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT                       0
+#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT                       0x00
 
 /* Bit definitions for SPARE */
 #define PALMAS_SPARE_SPARE_MASK                                 0xf8
-#define PALMAS_SPARE_SPARE_SHIFT                                3
+#define PALMAS_SPARE_SPARE_SHIFT                                0x03
 #define PALMAS_SPARE_REGEN3_OD                                  0x04
-#define PALMAS_SPARE_REGEN3_OD_SHIFT                            2
+#define PALMAS_SPARE_REGEN3_OD_SHIFT                            0x02
 #define PALMAS_SPARE_REGEN2_OD                                  0x02
-#define PALMAS_SPARE_REGEN2_OD_SHIFT                            1
+#define PALMAS_SPARE_REGEN2_OD_SHIFT                            0x01
 #define PALMAS_SPARE_REGEN1_OD                                  0x01
-#define PALMAS_SPARE_REGEN1_OD_SHIFT                            0
+#define PALMAS_SPARE_REGEN1_OD_SHIFT                            0x00
 
 /* Bit definitions for PMU_SECONDARY_INT */
 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC               0x80
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT         7
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT         0x07
 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC            0x40
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT      6
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT      0x06
 #define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC                     0x20
-#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT               5
+#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT               0x05
 #define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC                    0x10
-#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT              4
+#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT              0x04
 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK                  0x08
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT            3
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT            0x03
 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK               0x04
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT         2
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT         0x02
 #define PALMAS_PMU_SECONDARY_INT_BB_MASK                        0x02
-#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT                  1
+#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT                  0x01
 #define PALMAS_PMU_SECONDARY_INT_FBI_MASK                       0x01
-#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT                 0
+#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT                 0x00
 
 /* Bit definitions for SW_REVISION */
-#define PALMAS_SW_REVISION_SW_REVISION_MASK                     0xff
-#define PALMAS_SW_REVISION_SW_REVISION_SHIFT                    0
+#define PALMAS_SW_REVISION_SW_REVISION_MASK                     0xFF
+#define PALMAS_SW_REVISION_SW_REVISION_SHIFT                    0x00
 
 /* Bit definitions for EXT_CHRG_CTRL */
 #define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS                    0x80
-#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT              7
+#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT              0x07
 #define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS                 0x40
-#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT           6
+#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT           0x06
 #define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY                0x08
-#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT          3
+#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT          0x03
 #define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N                         0x04
-#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT                   2
+#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT                   0x02
 #define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN                        0x02
-#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT                  1
+#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT                  0x01
 #define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN                     0x01
-#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT               0
+#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT               0x00
 
 /* Bit definitions for PMU_SECONDARY_INT2 */
 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC                 0x20
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT           5
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT           0x05
 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC                 0x10
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT           4
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT           0x04
 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK                    0x02
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT              1
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT              0x01
 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK                    0x01
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT              0
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT              0x00
 
 /* Registers for function RESOURCE */
-#define PALMAS_CLK32KG_CTRL                                     0x0
-#define PALMAS_CLK32KGAUDIO_CTRL                                0x1
-#define PALMAS_REGEN1_CTRL                                      0x2
-#define PALMAS_REGEN2_CTRL                                      0x3
-#define PALMAS_SYSEN1_CTRL                                      0x4
-#define PALMAS_SYSEN2_CTRL                                      0x5
-#define PALMAS_NSLEEP_RES_ASSIGN                                0x6
-#define PALMAS_NSLEEP_SMPS_ASSIGN                               0x7
-#define PALMAS_NSLEEP_LDO_ASSIGN1                               0x8
-#define PALMAS_NSLEEP_LDO_ASSIGN2                               0x9
-#define PALMAS_ENABLE1_RES_ASSIGN                               0xA
-#define PALMAS_ENABLE1_SMPS_ASSIGN                              0xB
-#define PALMAS_ENABLE1_LDO_ASSIGN1                              0xC
-#define PALMAS_ENABLE1_LDO_ASSIGN2                              0xD
-#define PALMAS_ENABLE2_RES_ASSIGN                               0xE
-#define PALMAS_ENABLE2_SMPS_ASSIGN                              0xF
+#define PALMAS_CLK32KG_CTRL                                     0x00
+#define PALMAS_CLK32KGAUDIO_CTRL                                0x01
+#define PALMAS_REGEN1_CTRL                                      0x02
+#define PALMAS_REGEN2_CTRL                                      0x03
+#define PALMAS_SYSEN1_CTRL                                      0x04
+#define PALMAS_SYSEN2_CTRL                                      0x05
+#define PALMAS_NSLEEP_RES_ASSIGN                                0x06
+#define PALMAS_NSLEEP_SMPS_ASSIGN                               0x07
+#define PALMAS_NSLEEP_LDO_ASSIGN1                               0x08
+#define PALMAS_NSLEEP_LDO_ASSIGN2                               0x09
+#define PALMAS_ENABLE1_RES_ASSIGN                               0x0A
+#define PALMAS_ENABLE1_SMPS_ASSIGN                              0x0B
+#define PALMAS_ENABLE1_LDO_ASSIGN1                              0x0C
+#define PALMAS_ENABLE1_LDO_ASSIGN2                              0x0D
+#define PALMAS_ENABLE2_RES_ASSIGN                               0x0E
+#define PALMAS_ENABLE2_SMPS_ASSIGN                              0x0F
 #define PALMAS_ENABLE2_LDO_ASSIGN1                              0x10
 #define PALMAS_ENABLE2_LDO_ASSIGN2                              0x11
 #define PALMAS_REGEN3_CTRL                                      0x12
 
 /* Bit definitions for CLK32KG_CTRL */
 #define PALMAS_CLK32KG_CTRL_STATUS                              0x10
-#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT                        4
+#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT                        0x04
 #define PALMAS_CLK32KG_CTRL_MODE_SLEEP                          0x04
-#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT                    2
+#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT                    0x02
 #define PALMAS_CLK32KG_CTRL_MODE_ACTIVE                         0x01
-#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT                   0
+#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT                   0x00
 
 /* Bit definitions for CLK32KGAUDIO_CTRL */
 #define PALMAS_CLK32KGAUDIO_CTRL_STATUS                         0x10
-#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT                   4
+#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT                   0x04
 #define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3                      0x08
-#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT                3
+#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT                0x03
 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP                     0x04
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT               2
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT               0x02
 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE                    0x01
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT              0
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT              0x00
 
 /* Bit definitions for REGEN1_CTRL */
 #define PALMAS_REGEN1_CTRL_STATUS                               0x10
-#define PALMAS_REGEN1_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN1_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN1_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN1_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for REGEN2_CTRL */
 #define PALMAS_REGEN2_CTRL_STATUS                               0x10
-#define PALMAS_REGEN2_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN2_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN2_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN2_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SYSEN1_CTRL */
 #define PALMAS_SYSEN1_CTRL_STATUS                               0x10
-#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SYSEN1_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SYSEN1_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SYSEN2_CTRL */
 #define PALMAS_SYSEN2_CTRL_STATUS                               0x10
-#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SYSEN2_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SYSEN2_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for NSLEEP_RES_ASSIGN */
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN3                         0x40
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT                   6
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT                   0x06
 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO                   0x20
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT             5
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT             0x05
 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG                        0x10
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT                  4
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT                  0x04
 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2                         0x08
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT                   3
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT                   0x03
 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1                         0x04
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT                   2
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT                   0x02
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN2                         0x02
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT                   1
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT                   0x01
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN1                         0x01
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT                   0
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT                   0x00
 
 /* Bit definitions for NSLEEP_SMPS_ASSIGN */
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10                        0x80
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT                  7
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT                  0x07
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9                         0x40
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT                   6
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT                   0x06
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8                         0x20
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT                   5
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT                   0x05
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7                         0x10
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT                   4
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT                   0x04
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6                         0x08
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT                   3
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT                   0x03
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45                        0x04
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT                  2
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT                  0x02
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3                         0x02
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT                   1
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT                   0x01
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12                        0x01
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT                  0
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT                  0x00
 
 /* Bit definitions for NSLEEP_LDO_ASSIGN1 */
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8                          0x80
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT                    7
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT                    0x07
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7                          0x40
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT                    6
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT                    0x06
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6                          0x20
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT                    5
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT                    0x05
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5                          0x10
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT                    4
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT                    0x04
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4                          0x08
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT                    3
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT                    0x03
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3                          0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT                    2
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT                    0x02
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2                          0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT                    1
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT                    0x01
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1                          0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT                    0
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT                    0x00
 
 /* Bit definitions for NSLEEP_LDO_ASSIGN2 */
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB                        0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT                  2
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT                  0x02
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN                         0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT                   1
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT                   0x01
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9                          0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT                    0
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT                    0x00
 
 /* Bit definitions for ENABLE1_RES_ASSIGN */
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN3                        0x40
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT                  6
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT                  0x06
 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO                  0x20
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT            5
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT            0x05
 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG                       0x10
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT                 4
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT                 0x04
 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2                        0x08
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT                  3
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT                  0x03
 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1                        0x04
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT                  2
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT                  0x02
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN2                        0x02
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT                  1
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT                  0x01
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN1                        0x01
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT                  0
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT                  0x00
 
 /* Bit definitions for ENABLE1_SMPS_ASSIGN */
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10                       0x80
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT                 7
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT                 0x07
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9                        0x40
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT                  6
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT                  0x06
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8                        0x20
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT                  5
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT                  0x05
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7                        0x10
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT                  4
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT                  0x04
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6                        0x08
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT                  3
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT                  0x03
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45                       0x04
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT                 2
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT                 0x02
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3                        0x02
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT                  1
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT                  0x01
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12                       0x01
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT                 0
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT                 0x00
 
 /* Bit definitions for ENABLE1_LDO_ASSIGN1 */
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8                         0x80
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT                   7
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT                   0x07
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7                         0x40
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT                   6
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT                   0x06
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6                         0x20
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT                   5
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT                   0x05
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5                         0x10
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT                   4
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT                   0x04
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4                         0x08
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT                   3
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT                   0x03
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3                         0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT                   2
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT                   0x02
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2                         0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT                   1
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT                   0x01
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1                         0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT                   0
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT                   0x00
 
 /* Bit definitions for ENABLE1_LDO_ASSIGN2 */
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB                       0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT                 2
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT                 0x02
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN                        0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT                  1
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT                  0x01
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9                         0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT                   0
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT                   0x00
 
 /* Bit definitions for ENABLE2_RES_ASSIGN */
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN3                        0x40
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT                  6
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT                  0x06
 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO                  0x20
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT            5
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT            0x05
 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG                       0x10
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT                 4
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT                 0x04
 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2                        0x08
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT                  3
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT                  0x03
 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1                        0x04
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT                  2
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT                  0x02
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN2                        0x02
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT                  1
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT                  0x01
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN1                        0x01
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT                  0
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT                  0x00
 
 /* Bit definitions for ENABLE2_SMPS_ASSIGN */
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10                       0x80
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT                 7
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT                 0x07
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9                        0x40
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT                  6
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT                  0x06
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8                        0x20
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT                  5
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT                  0x05
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7                        0x10
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT                  4
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT                  0x04
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6                        0x08
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT                  3
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT                  0x03
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45                       0x04
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT                 2
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT                 0x02
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3                        0x02
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT                  1
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT                  0x01
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12                       0x01
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT                 0
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT                 0x00
 
 /* Bit definitions for ENABLE2_LDO_ASSIGN1 */
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8                         0x80
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT                   7
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT                   0x07
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7                         0x40
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT                   6
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT                   0x06
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6                         0x20
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT                   5
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT                   0x05
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5                         0x10
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT                   4
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT                   0x04
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4                         0x08
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT                   3
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT                   0x03
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3                         0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT                   2
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT                   0x02
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2                         0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT                   1
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT                   0x01
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1                         0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT                   0
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT                   0x00
 
 /* Bit definitions for ENABLE2_LDO_ASSIGN2 */
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB                       0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT                 2
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT                 0x02
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN                        0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT                  1
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT                  0x01
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9                         0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT                   0
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT                   0x00
 
 /* Bit definitions for REGEN3_CTRL */
 #define PALMAS_REGEN3_CTRL_STATUS                               0x10
-#define PALMAS_REGEN3_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN3_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN3_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Registers for function PAD_CONTROL */
-#define PALMAS_OD_OUTPUT_CTRL2                                  0x2
-#define PALMAS_POLARITY_CTRL2                                   0x3
-#define PALMAS_PU_PD_INPUT_CTRL1                                0x4
-#define PALMAS_PU_PD_INPUT_CTRL2                                0x5
-#define PALMAS_PU_PD_INPUT_CTRL3                                0x6
-#define PALMAS_PU_PD_INPUT_CTRL5                                0x7
-#define PALMAS_OD_OUTPUT_CTRL                                   0x8
-#define PALMAS_POLARITY_CTRL                                    0x9
-#define PALMAS_PRIMARY_SECONDARY_PAD1                           0xA
-#define PALMAS_PRIMARY_SECONDARY_PAD2                           0xB
-#define PALMAS_I2C_SPI                                          0xC
-#define PALMAS_PU_PD_INPUT_CTRL4                                0xD
-#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xE
-#define PALMAS_PRIMARY_SECONDARY_PAD4                           0xF
+#define PALMAS_OD_OUTPUT_CTRL2                                  0x02
+#define PALMAS_POLARITY_CTRL2                                   0x03
+#define PALMAS_PU_PD_INPUT_CTRL1                                0x04
+#define PALMAS_PU_PD_INPUT_CTRL2                                0x05
+#define PALMAS_PU_PD_INPUT_CTRL3                                0x06
+#define PALMAS_PU_PD_INPUT_CTRL5                                0x07
+#define PALMAS_OD_OUTPUT_CTRL                                   0x08
+#define PALMAS_POLARITY_CTRL                                    0x09
+#define PALMAS_PRIMARY_SECONDARY_PAD1                           0x0A
+#define PALMAS_PRIMARY_SECONDARY_PAD2                           0x0B
+#define PALMAS_I2C_SPI                                          0x0C
+#define PALMAS_PU_PD_INPUT_CTRL4                                0x0D
+#define PALMAS_PRIMARY_SECONDARY_PAD3                           0x0E
+#define PALMAS_PRIMARY_SECONDARY_PAD4                           0x0F
 
 /* Bit definitions for PU_PD_INPUT_CTRL1 */
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD                    0x40
-#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT              6
+#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT              0x06
 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU                 0x20
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT           5
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT           0x05
 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD                 0x10
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT           4
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT           0x04
 #define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD                     0x04
-#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT               2
+#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT               0x02
 #define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU                    0x02
-#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT              1
+#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT              0x01
 
 /* Bit definitions for PU_PD_INPUT_CTRL2 */
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU                     0x20
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT               5
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT               0x05
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD                     0x10
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT               4
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT               0x04
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU                     0x08
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT               3
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT               0x03
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD                     0x04
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT               2
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT               0x02
 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU                      0x02
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT                1
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT                0x01
 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD                      0x01
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT                0
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT                0x00
 
 /* Bit definitions for PU_PD_INPUT_CTRL3 */
 #define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD                        0x40
-#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT                  6
+#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT                  0x06
 #define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD                  0x10
-#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT            4
+#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT            0x04
 #define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD                   0x04
-#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT             2
+#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT             0x02
 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD                     0x01
-#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT               0
+#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT               0x00
 
 /* Bit definitions for OD_OUTPUT_CTRL */
 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD                          0x80
-#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT                    7
+#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT                    0x07
 #define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD                        0x40
-#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT                  6
+#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT                  0x06
 #define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD                          0x20
-#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT                    5
+#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT                    0x05
 #define PALMAS_OD_OUTPUT_CTRL_INT_OD                            0x08
-#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT                      3
+#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT                      0x03
 
 /* Bit definitions for POLARITY_CTRL */
 #define PALMAS_POLARITY_CTRL_INT_POLARITY                       0x80
-#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT                 7
+#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT                 0x07
 #define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY                   0x40
-#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT             6
+#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT             0x06
 #define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY                   0x20
-#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT             5
+#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT             0x05
 #define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY                    0x10
-#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT              4
+#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT              0x04
 #define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY                  0x08
-#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT            3
+#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT            0x03
 #define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY         0x04
-#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT   2
+#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT   0x02
 #define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY        0x02
-#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT  1
+#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT  0x01
 #define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY                   0x01
-#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT             0
+#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT             0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD1 */
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3                    0x80
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT              7
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT              0x07
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK               0x60
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT              5
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT              0x05
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK               0x18
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT              3
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT              0x03
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0                    0x04
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT              2
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT              0x02
 #define PALMAS_PRIMARY_SECONDARY_PAD1_VAC                       0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT                 1
+#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT                 0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD                 0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT           0
+#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT           0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD2 */
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK               0x30
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT              4
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT              0x04
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6                    0x08
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT              3
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT              0x03
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK               0x06
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT              1
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT              0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4                    0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT              0
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT              0x00
 
 /* Bit definitions for I2C_SPI */
 #define PALMAS_I2C_SPI_I2C2OTP_EN                               0x80
-#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT                         7
+#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT                         0x07
 #define PALMAS_I2C_SPI_I2C2OTP_PAGESEL                          0x40
-#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT                    6
+#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT                    0x06
 #define PALMAS_I2C_SPI_ID_I2C2                                  0x20
-#define PALMAS_I2C_SPI_ID_I2C2_SHIFT                            5
+#define PALMAS_I2C_SPI_ID_I2C2_SHIFT                            0x05
 #define PALMAS_I2C_SPI_I2C_SPI                                  0x10
-#define PALMAS_I2C_SPI_I2C_SPI_SHIFT                            4
-#define PALMAS_I2C_SPI_ID_I2C1_MASK                             0x0f
-#define PALMAS_I2C_SPI_ID_I2C1_SHIFT                            0
+#define PALMAS_I2C_SPI_I2C_SPI_SHIFT                            0x04
+#define PALMAS_I2C_SPI_ID_I2C1_MASK                             0x0F
+#define PALMAS_I2C_SPI_ID_I2C1_SHIFT                            0x00
 
 /* Bit definitions for PU_PD_INPUT_CTRL4 */
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD                   0x40
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT             6
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT             0x06
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD                   0x10
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT             4
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT             0x04
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD                   0x04
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT             2
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT             0x02
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD                   0x01
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT             0
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT             0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD3 */
 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2                     0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT               1
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT               0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1                     0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT               0
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT               0x00
 
 /* Registers for function LED_PWM */
-#define PALMAS_LED_PERIOD_CTRL                                  0x0
-#define PALMAS_LED_CTRL                                         0x1
-#define PALMAS_PWM_CTRL1                                        0x2
-#define PALMAS_PWM_CTRL2                                        0x3
+#define PALMAS_LED_PERIOD_CTRL                                  0x00
+#define PALMAS_LED_CTRL                                         0x01
+#define PALMAS_PWM_CTRL1                                        0x02
+#define PALMAS_PWM_CTRL2                                        0x03
 
 /* Bit definitions for LED_PERIOD_CTRL */
 #define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_MASK                0x38
-#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT               3
+#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT               0x03
 #define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_MASK                0x07
-#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT               0
+#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT               0x00
 
 /* Bit definitions for LED_CTRL */
 #define PALMAS_LED_CTRL_LED_2_SEQ                               0x20
-#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT                         5
+#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT                         0x05
 #define PALMAS_LED_CTRL_LED_1_SEQ                               0x10
-#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT                         4
+#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT                         0x04
 #define PALMAS_LED_CTRL_LED_2_ON_TIME_MASK                      0x0c
-#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT                     2
+#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT                     0x02
 #define PALMAS_LED_CTRL_LED_1_ON_TIME_MASK                      0x03
-#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT                     0
+#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT                     0x00
 
 /* Bit definitions for PWM_CTRL1 */
 #define PALMAS_PWM_CTRL1_PWM_FREQ_EN                            0x02
-#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT                      1
+#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT                      0x01
 #define PALMAS_PWM_CTRL1_PWM_FREQ_SEL                           0x01
-#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT                     0
+#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT                     0x00
 
 /* Bit definitions for PWM_CTRL2 */
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK                      0xff
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT                     0
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK                      0xFF
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT                     0x00
 
 /* Registers for function INTERRUPT */
-#define PALMAS_INT1_STATUS                                      0x0
-#define PALMAS_INT1_MASK                                        0x1
-#define PALMAS_INT1_LINE_STATE                                  0x2
-#define PALMAS_INT1_EDGE_DETECT1_RESERVED                       0x3
-#define PALMAS_INT1_EDGE_DETECT2_RESERVED                       0x4
-#define PALMAS_INT2_STATUS                                      0x5
-#define PALMAS_INT2_MASK                                        0x6
-#define PALMAS_INT2_LINE_STATE                                  0x7
-#define PALMAS_INT2_EDGE_DETECT1_RESERVED                       0x8
-#define PALMAS_INT2_EDGE_DETECT2_RESERVED                       0x9
-#define PALMAS_INT3_STATUS                                      0xA
-#define PALMAS_INT3_MASK                                        0xB
-#define PALMAS_INT3_LINE_STATE                                  0xC
-#define PALMAS_INT3_EDGE_DETECT1_RESERVED                       0xD
-#define PALMAS_INT3_EDGE_DETECT2_RESERVED                       0xE
-#define PALMAS_INT4_STATUS                                      0xF
+#define PALMAS_INT1_STATUS                                      0x00
+#define PALMAS_INT1_MASK                                        0x01
+#define PALMAS_INT1_LINE_STATE                                  0x02
+#define PALMAS_INT1_EDGE_DETECT1_RESERVED                       0x03
+#define PALMAS_INT1_EDGE_DETECT2_RESERVED                       0x04
+#define PALMAS_INT2_STATUS                                      0x05
+#define PALMAS_INT2_MASK                                        0x06
+#define PALMAS_INT2_LINE_STATE                                  0x07
+#define PALMAS_INT2_EDGE_DETECT1_RESERVED                       0x08
+#define PALMAS_INT2_EDGE_DETECT2_RESERVED                       0x09
+#define PALMAS_INT3_STATUS                                      0x0A
+#define PALMAS_INT3_MASK                                        0x0B
+#define PALMAS_INT3_LINE_STATE                                  0x0C
+#define PALMAS_INT3_EDGE_DETECT1_RESERVED                       0x0D
+#define PALMAS_INT3_EDGE_DETECT2_RESERVED                       0x0E
+#define PALMAS_INT4_STATUS                                      0x0F
 #define PALMAS_INT4_MASK                                        0x10
 #define PALMAS_INT4_LINE_STATE                                  0x11
 #define PALMAS_INT4_EDGE_DETECT1                                0x12
@@ -1966,276 +1966,276 @@ enum usb_irq_events {
 
 /* Bit definitions for INT1_STATUS */
 #define PALMAS_INT1_STATUS_VBAT_MON                             0x80
-#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT                       7
+#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT                       0x07
 #define PALMAS_INT1_STATUS_VSYS_MON                             0x40
-#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT                       6
+#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT                       0x06
 #define PALMAS_INT1_STATUS_HOTDIE                               0x20
-#define PALMAS_INT1_STATUS_HOTDIE_SHIFT                         5
+#define PALMAS_INT1_STATUS_HOTDIE_SHIFT                         0x05
 #define PALMAS_INT1_STATUS_PWRDOWN                              0x10
-#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT                        4
+#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT                        0x04
 #define PALMAS_INT1_STATUS_RPWRON                               0x08
-#define PALMAS_INT1_STATUS_RPWRON_SHIFT                         3
+#define PALMAS_INT1_STATUS_RPWRON_SHIFT                         0x03
 #define PALMAS_INT1_STATUS_LONG_PRESS_KEY                       0x04
-#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT                 2
+#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT                 0x02
 #define PALMAS_INT1_STATUS_PWRON                                0x02
-#define PALMAS_INT1_STATUS_PWRON_SHIFT                          1
+#define PALMAS_INT1_STATUS_PWRON_SHIFT                          0x01
 #define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV                 0x01
-#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT           0
+#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT           0x00
 
 /* Bit definitions for INT1_MASK */
 #define PALMAS_INT1_MASK_VBAT_MON                               0x80
-#define PALMAS_INT1_MASK_VBAT_MON_SHIFT                         7
+#define PALMAS_INT1_MASK_VBAT_MON_SHIFT                         0x07
 #define PALMAS_INT1_MASK_VSYS_MON                               0x40
-#define PALMAS_INT1_MASK_VSYS_MON_SHIFT                         6
+#define PALMAS_INT1_MASK_VSYS_MON_SHIFT                         0x06
 #define PALMAS_INT1_MASK_HOTDIE                                 0x20
-#define PALMAS_INT1_MASK_HOTDIE_SHIFT                           5
+#define PALMAS_INT1_MASK_HOTDIE_SHIFT                           0x05
 #define PALMAS_INT1_MASK_PWRDOWN                                0x10
-#define PALMAS_INT1_MASK_PWRDOWN_SHIFT                          4
+#define PALMAS_INT1_MASK_PWRDOWN_SHIFT                          0x04
 #define PALMAS_INT1_MASK_RPWRON                                 0x08
-#define PALMAS_INT1_MASK_RPWRON_SHIFT                           3
+#define PALMAS_INT1_MASK_RPWRON_SHIFT                           0x03
 #define PALMAS_INT1_MASK_LONG_PRESS_KEY                         0x04
-#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT                   2
+#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT                   0x02
 #define PALMAS_INT1_MASK_PWRON                                  0x02
-#define PALMAS_INT1_MASK_PWRON_SHIFT                            1
+#define PALMAS_INT1_MASK_PWRON_SHIFT                            0x01
 #define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV                   0x01
-#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT             0
+#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT             0x00
 
 /* Bit definitions for INT1_LINE_STATE */
 #define PALMAS_INT1_LINE_STATE_VBAT_MON                         0x80
-#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT                   7
+#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT                   0x07
 #define PALMAS_INT1_LINE_STATE_VSYS_MON                         0x40
-#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT                   6
+#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT                   0x06
 #define PALMAS_INT1_LINE_STATE_HOTDIE                           0x20
-#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT                     5
+#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT                     0x05
 #define PALMAS_INT1_LINE_STATE_PWRDOWN                          0x10
-#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT                    4
+#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT                    0x04
 #define PALMAS_INT1_LINE_STATE_RPWRON                           0x08
-#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT                     3
+#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT                     0x03
 #define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY                   0x04
-#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT             2
+#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT             0x02
 #define PALMAS_INT1_LINE_STATE_PWRON                            0x02
-#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT                      1
+#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT                      0x01
 #define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV             0x01
-#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT       0
+#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT       0x00
 
 /* Bit definitions for INT2_STATUS */
 #define PALMAS_INT2_STATUS_VAC_ACOK                             0x80
-#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT                       7
+#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT                       0x07
 #define PALMAS_INT2_STATUS_SHORT                                0x40
-#define PALMAS_INT2_STATUS_SHORT_SHIFT                          6
+#define PALMAS_INT2_STATUS_SHORT_SHIFT                          0x06
 #define PALMAS_INT2_STATUS_FBI_BB                               0x20
-#define PALMAS_INT2_STATUS_FBI_BB_SHIFT                         5
+#define PALMAS_INT2_STATUS_FBI_BB_SHIFT                         0x05
 #define PALMAS_INT2_STATUS_RESET_IN                             0x10
-#define PALMAS_INT2_STATUS_RESET_IN_SHIFT                       4
+#define PALMAS_INT2_STATUS_RESET_IN_SHIFT                       0x04
 #define PALMAS_INT2_STATUS_BATREMOVAL                           0x08
-#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT                     3
+#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT                     0x03
 #define PALMAS_INT2_STATUS_WDT                                  0x04
-#define PALMAS_INT2_STATUS_WDT_SHIFT                            2
+#define PALMAS_INT2_STATUS_WDT_SHIFT                            0x02
 #define PALMAS_INT2_STATUS_RTC_TIMER                            0x02
-#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT                      1
+#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT                      0x01
 #define PALMAS_INT2_STATUS_RTC_ALARM                            0x01
-#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT                      0
+#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT                      0x00
 
 /* Bit definitions for INT2_MASK */
 #define PALMAS_INT2_MASK_VAC_ACOK                               0x80
-#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT                         7
+#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT                         0x07
 #define PALMAS_INT2_MASK_SHORT                                  0x40
-#define PALMAS_INT2_MASK_SHORT_SHIFT                            6
+#define PALMAS_INT2_MASK_SHORT_SHIFT                            0x06
 #define PALMAS_INT2_MASK_FBI_BB                                 0x20
-#define PALMAS_INT2_MASK_FBI_BB_SHIFT                           5
+#define PALMAS_INT2_MASK_FBI_BB_SHIFT                           0x05
 #define PALMAS_INT2_MASK_RESET_IN                               0x10
-#define PALMAS_INT2_MASK_RESET_IN_SHIFT                         4
+#define PALMAS_INT2_MASK_RESET_IN_SHIFT                         0x04
 #define PALMAS_INT2_MASK_BATREMOVAL                             0x08
-#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT                       3
+#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT                       0x03
 #define PALMAS_INT2_MASK_WDT                                    0x04
-#define PALMAS_INT2_MASK_WDT_SHIFT                              2
+#define PALMAS_INT2_MASK_WDT_SHIFT                              0x02
 #define PALMAS_INT2_MASK_RTC_TIMER                              0x02
-#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT                        1
+#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT                        0x01
 #define PALMAS_INT2_MASK_RTC_ALARM                              0x01
-#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT                        0
+#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT                        0x00
 
 /* Bit definitions for INT2_LINE_STATE */
 #define PALMAS_INT2_LINE_STATE_VAC_ACOK                         0x80
-#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT                   7
+#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT                   0x07
 #define PALMAS_INT2_LINE_STATE_SHORT                            0x40
-#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT                      6
+#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT                      0x06
 #define PALMAS_INT2_LINE_STATE_FBI_BB                           0x20
-#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT                     5
+#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT                     0x05
 #define PALMAS_INT2_LINE_STATE_RESET_IN                         0x10
-#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT                   4
+#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT                   0x04
 #define PALMAS_INT2_LINE_STATE_BATREMOVAL                       0x08
-#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT                 3
+#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT                 0x03
 #define PALMAS_INT2_LINE_STATE_WDT                              0x04
-#define PALMAS_INT2_LINE_STATE_WDT_SHIFT                        2
+#define PALMAS_INT2_LINE_STATE_WDT_SHIFT                        0x02
 #define PALMAS_INT2_LINE_STATE_RTC_TIMER                        0x02
-#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT                  1
+#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT                  0x01
 #define PALMAS_INT2_LINE_STATE_RTC_ALARM                        0x01
-#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT                  0
+#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT                  0x00
 
 /* Bit definitions for INT3_STATUS */
 #define PALMAS_INT3_STATUS_VBUS                                 0x80
-#define PALMAS_INT3_STATUS_VBUS_SHIFT                           7
+#define PALMAS_INT3_STATUS_VBUS_SHIFT                           0x07
 #define PALMAS_INT3_STATUS_VBUS_OTG                             0x40
-#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT                       6
+#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT                       0x06
 #define PALMAS_INT3_STATUS_ID                                   0x20
-#define PALMAS_INT3_STATUS_ID_SHIFT                             5
+#define PALMAS_INT3_STATUS_ID_SHIFT                             0x05
 #define PALMAS_INT3_STATUS_ID_OTG                               0x10
-#define PALMAS_INT3_STATUS_ID_OTG_SHIFT                         4
+#define PALMAS_INT3_STATUS_ID_OTG_SHIFT                         0x04
 #define PALMAS_INT3_STATUS_GPADC_EOC_RT                         0x08
-#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT                   3
+#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT                   0x03
 #define PALMAS_INT3_STATUS_GPADC_EOC_SW                         0x04
-#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT                   2
+#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT                   0x02
 #define PALMAS_INT3_STATUS_GPADC_AUTO_1                         0x02
-#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT                   1
+#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT                   0x01
 #define PALMAS_INT3_STATUS_GPADC_AUTO_0                         0x01
-#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT                   0
+#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT                   0x00
 
 /* Bit definitions for INT3_MASK */
 #define PALMAS_INT3_MASK_VBUS                                   0x80
-#define PALMAS_INT3_MASK_VBUS_SHIFT                             7
+#define PALMAS_INT3_MASK_VBUS_SHIFT                             0x07
 #define PALMAS_INT3_MASK_VBUS_OTG                               0x40
-#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT                         6
+#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT                         0x06
 #define PALMAS_INT3_MASK_ID                                     0x20
-#define PALMAS_INT3_MASK_ID_SHIFT                               5
+#define PALMAS_INT3_MASK_ID_SHIFT                               0x05
 #define PALMAS_INT3_MASK_ID_OTG                                 0x10
-#define PALMAS_INT3_MASK_ID_OTG_SHIFT                           4
+#define PALMAS_INT3_MASK_ID_OTG_SHIFT                           0x04
 #define PALMAS_INT3_MASK_GPADC_EOC_RT                           0x08
-#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT                     3
+#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT                     0x03
 #define PALMAS_INT3_MASK_GPADC_EOC_SW                           0x04
-#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT                     2
+#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT                     0x02
 #define PALMAS_INT3_MASK_GPADC_AUTO_1                           0x02
-#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT                     1
+#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT                     0x01
 #define PALMAS_INT3_MASK_GPADC_AUTO_0                           0x01
-#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT                     0
+#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT                     0x00
 
 /* Bit definitions for INT3_LINE_STATE */
 #define PALMAS_INT3_LINE_STATE_VBUS                             0x80
-#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT                       7
+#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT                       0x07
 #define PALMAS_INT3_LINE_STATE_VBUS_OTG                         0x40
-#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT                   6
+#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT                   0x06
 #define PALMAS_INT3_LINE_STATE_ID                               0x20
-#define PALMAS_INT3_LINE_STATE_ID_SHIFT                         5
+#define PALMAS_INT3_LINE_STATE_ID_SHIFT                         0x05
 #define PALMAS_INT3_LINE_STATE_ID_OTG                           0x10
-#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT                     4
+#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT                     0x04
 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT                     0x08
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT               3
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT               0x03
 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW                     0x04
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT               2
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT               0x02
 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1                     0x02
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT               1
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT               0x01
 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0                     0x01
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT               0
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT               0x00
 
 /* Bit definitions for INT4_STATUS */
 #define PALMAS_INT4_STATUS_GPIO_7                               0x80
-#define PALMAS_INT4_STATUS_GPIO_7_SHIFT                         7
+#define PALMAS_INT4_STATUS_GPIO_7_SHIFT                         0x07
 #define PALMAS_INT4_STATUS_GPIO_6                               0x40
-#define PALMAS_INT4_STATUS_GPIO_6_SHIFT                         6
+#define PALMAS_INT4_STATUS_GPIO_6_SHIFT                         0x06
 #define PALMAS_INT4_STATUS_GPIO_5                               0x20
-#define PALMAS_INT4_STATUS_GPIO_5_SHIFT                         5
+#define PALMAS_INT4_STATUS_GPIO_5_SHIFT                         0x05
 #define PALMAS_INT4_STATUS_GPIO_4                               0x10
-#define PALMAS_INT4_STATUS_GPIO_4_SHIFT                         4
+#define PALMAS_INT4_STATUS_GPIO_4_SHIFT                         0x04
 #define PALMAS_INT4_STATUS_GPIO_3                               0x08
-#define PALMAS_INT4_STATUS_GPIO_3_SHIFT                         3
+#define PALMAS_INT4_STATUS_GPIO_3_SHIFT                         0x03
 #define PALMAS_INT4_STATUS_GPIO_2                               0x04
-#define PALMAS_INT4_STATUS_GPIO_2_SHIFT                         2
+#define PALMAS_INT4_STATUS_GPIO_2_SHIFT                         0x02
 #define PALMAS_INT4_STATUS_GPIO_1                               0x02
-#define PALMAS_INT4_STATUS_GPIO_1_SHIFT                         1
+#define PALMAS_INT4_STATUS_GPIO_1_SHIFT                         0x01
 #define PALMAS_INT4_STATUS_GPIO_0                               0x01
-#define PALMAS_INT4_STATUS_GPIO_0_SHIFT                         0
+#define PALMAS_INT4_STATUS_GPIO_0_SHIFT                         0x00
 
 /* Bit definitions for INT4_MASK */
 #define PALMAS_INT4_MASK_GPIO_7                                 0x80
-#define PALMAS_INT4_MASK_GPIO_7_SHIFT                           7
+#define PALMAS_INT4_MASK_GPIO_7_SHIFT                           0x07
 #define PALMAS_INT4_MASK_GPIO_6                                 0x40
-#define PALMAS_INT4_MASK_GPIO_6_SHIFT                           6
+#define PALMAS_INT4_MASK_GPIO_6_SHIFT                           0x06
 #define PALMAS_INT4_MASK_GPIO_5                                 0x20
-#define PALMAS_INT4_MASK_GPIO_5_SHIFT                           5
+#define PALMAS_INT4_MASK_GPIO_5_SHIFT                           0x05
 #define PALMAS_INT4_MASK_GPIO_4                                 0x10
-#define PALMAS_INT4_MASK_GPIO_4_SHIFT                           4
+#define PALMAS_INT4_MASK_GPIO_4_SHIFT                           0x04
 #define PALMAS_INT4_MASK_GPIO_3                                 0x08
-#define PALMAS_INT4_MASK_GPIO_3_SHIFT                           3
+#define PALMAS_INT4_MASK_GPIO_3_SHIFT                           0x03
 #define PALMAS_INT4_MASK_GPIO_2                                 0x04
-#define PALMAS_INT4_MASK_GPIO_2_SHIFT                           2
+#define PALMAS_INT4_MASK_GPIO_2_SHIFT                           0x02
 #define PALMAS_INT4_MASK_GPIO_1                                 0x02
-#define PALMAS_INT4_MASK_GPIO_1_SHIFT                           1
+#define PALMAS_INT4_MASK_GPIO_1_SHIFT                           0x01
 #define PALMAS_INT4_MASK_GPIO_0                                 0x01
-#define PALMAS_INT4_MASK_GPIO_0_SHIFT                           0
+#define PALMAS_INT4_MASK_GPIO_0_SHIFT                           0x00
 
 /* Bit definitions for INT4_LINE_STATE */
 #define PALMAS_INT4_LINE_STATE_GPIO_7                           0x80
-#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT                     7
+#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT                     0x07
 #define PALMAS_INT4_LINE_STATE_GPIO_6                           0x40
-#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT                     6
+#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT                     0x06
 #define PALMAS_INT4_LINE_STATE_GPIO_5                           0x20
-#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT                     5
+#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT                     0x05
 #define PALMAS_INT4_LINE_STATE_GPIO_4                           0x10
-#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT                     4
+#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT                     0x04
 #define PALMAS_INT4_LINE_STATE_GPIO_3                           0x08
-#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT                     3
+#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT                     0x03
 #define PALMAS_INT4_LINE_STATE_GPIO_2                           0x04
-#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT                     2
+#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT                     0x02
 #define PALMAS_INT4_LINE_STATE_GPIO_1                           0x02
-#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT                     1
+#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT                     0x01
 #define PALMAS_INT4_LINE_STATE_GPIO_0                           0x01
-#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT                     0
+#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT                     0x00
 
 /* Bit definitions for INT4_EDGE_DETECT1 */
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING                  0x80
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT            7
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT            0x07
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING                 0x40
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT           6
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT           0x06
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING                  0x20
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT            5
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT            0x05
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING                 0x10
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT           4
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT           0x04
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING                  0x08
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT            3
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT            0x03
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING                 0x04
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT           2
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT           0x02
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING                  0x02
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT            1
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT            0x01
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING                 0x01
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT           0
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT           0x00
 
 /* Bit definitions for INT4_EDGE_DETECT2 */
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING                  0x80
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT            7
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT            0x07
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING                 0x40
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT           6
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT           0x06
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING                  0x20
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT            5
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT            0x05
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING                 0x10
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT           4
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT           0x04
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING                  0x08
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT            3
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT            0x03
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING                 0x04
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT           2
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT           0x02
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING                  0x02
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT            1
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT            0x01
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING                 0x01
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT           0
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT           0x00
 
 /* Bit definitions for INT_CTRL */
 #define PALMAS_INT_CTRL_INT_PENDING                             0x04
-#define PALMAS_INT_CTRL_INT_PENDING_SHIFT                       2
+#define PALMAS_INT_CTRL_INT_PENDING_SHIFT                       0x02
 #define PALMAS_INT_CTRL_INT_CLEAR                               0x01
-#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT                         0
+#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT                         0x00
 
 /* Registers for function USB_OTG */
-#define PALMAS_USB_WAKEUP                                       0x3
-#define PALMAS_USB_VBUS_CTRL_SET                                0x4
-#define PALMAS_USB_VBUS_CTRL_CLR                                0x5
-#define PALMAS_USB_ID_CTRL_SET                                  0x6
-#define PALMAS_USB_ID_CTRL_CLEAR                                0x7
-#define PALMAS_USB_VBUS_INT_SRC                                 0x8
-#define PALMAS_USB_VBUS_INT_LATCH_SET                           0x9
-#define PALMAS_USB_VBUS_INT_LATCH_CLR                           0xA
-#define PALMAS_USB_VBUS_INT_EN_LO_SET                           0xB
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR                           0xC
-#define PALMAS_USB_VBUS_INT_EN_HI_SET                           0xD
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR                           0xE
-#define PALMAS_USB_ID_INT_SRC                                   0xF
+#define PALMAS_USB_WAKEUP                                       0x03
+#define PALMAS_USB_VBUS_CTRL_SET                                0x04
+#define PALMAS_USB_VBUS_CTRL_CLR                                0x05
+#define PALMAS_USB_ID_CTRL_SET                                  0x06
+#define PALMAS_USB_ID_CTRL_CLEAR                                0x07
+#define PALMAS_USB_VBUS_INT_SRC                                 0x08
+#define PALMAS_USB_VBUS_INT_LATCH_SET                           0x09
+#define PALMAS_USB_VBUS_INT_LATCH_CLR                           0x0A
+#define PALMAS_USB_VBUS_INT_EN_LO_SET                           0x0B
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR                           0x0C
+#define PALMAS_USB_VBUS_INT_EN_HI_SET                           0x0D
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR                           0x0E
+#define PALMAS_USB_ID_INT_SRC                                   0x0F
 #define PALMAS_USB_ID_INT_LATCH_SET                             0x10
 #define PALMAS_USB_ID_INT_LATCH_CLR                             0x11
 #define PALMAS_USB_ID_INT_EN_LO_SET                             0x12
@@ -2250,306 +2250,306 @@ enum usb_irq_events {
 
 /* Bit definitions for USB_WAKEUP */
 #define PALMAS_USB_WAKEUP_ID_WK_UP_COMP                         0x01
-#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT                   0
+#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT                   0x00
 
 /* Bit definitions for USB_VBUS_CTRL_SET */
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS                 0x80
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT           7
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT           0x07
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG                   0x20
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT             5
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT             0x05
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC                  0x10
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT            4
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT            0x04
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK                 0x08
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT           3
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT           0x03
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP                  0x04
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT            2
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT            0x02
 
 /* Bit definitions for USB_VBUS_CTRL_CLR */
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS                 0x80
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT           7
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT           0x07
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG                   0x20
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT             5
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT             0x05
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC                  0x10
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT            4
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT            0x04
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK                 0x08
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT           3
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT           0x03
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP                  0x04
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT            2
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT            0x02
 
 /* Bit definitions for USB_ID_CTRL_SET */
 #define PALMAS_USB_ID_CTRL_SET_ID_PU_220K                       0x80
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT                 7
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT                 0x07
 #define PALMAS_USB_ID_CTRL_SET_ID_PU_100K                       0x40
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT                 6
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT                 0x06
 #define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV                       0x20
-#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT                 5
+#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT                 0x05
 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U                       0x10
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT                 4
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT                 0x04
 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U                        0x08
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT                  3
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT                  0x03
 #define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP                      0x04
-#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT                2
+#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT                0x02
 
 /* Bit definitions for USB_ID_CTRL_CLEAR */
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K                     0x80
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT               7
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT               0x07
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K                     0x40
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT               6
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT               0x06
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV                     0x20
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT               5
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT               0x05
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U                     0x10
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT               4
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT               0x04
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U                      0x08
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT                3
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT                0x03
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP                    0x04
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT              2
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT              0x02
 
 /* Bit definitions for USB_VBUS_INT_SRC */
 #define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD                   0x80
-#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT             7
+#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT             0x07
 #define PALMAS_USB_VBUS_INT_SRC_VADP_PRB                        0x40
-#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT                  6
+#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT                  0x06
 #define PALMAS_USB_VBUS_INT_SRC_VADP_SNS                        0x20
-#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT                  5
+#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT                  0x05
 #define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD                     0x08
-#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT               3
+#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT               0x03
 #define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD                     0x04
-#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT               2
+#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT               0x02
 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD                     0x02
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT               1
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT               0x01
 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END                     0x01
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT               0
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT               0x00
 
 /* Bit definitions for USB_VBUS_INT_LATCH_SET */
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_LATCH_SET_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_LATCH_CLR */
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_LO_SET */
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_LO_CLR */
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_HI_SET */
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_HI_CLR */
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_ID_INT_SRC */
 #define PALMAS_USB_ID_INT_SRC_ID_FLOAT                          0x10
-#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT                    4
+#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT                    0x04
 #define PALMAS_USB_ID_INT_SRC_ID_A                              0x08
-#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT                        3
+#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT                        0x03
 #define PALMAS_USB_ID_INT_SRC_ID_B                              0x04
-#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT                        2
+#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT                        0x02
 #define PALMAS_USB_ID_INT_SRC_ID_C                              0x02
-#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT                        1
+#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT                        0x01
 #define PALMAS_USB_ID_INT_SRC_ID_GND                            0x01
-#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT                      0
+#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT                      0x00
 
 /* Bit definitions for USB_ID_INT_LATCH_SET */
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_LATCH_CLR */
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_LO_SET */
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_LO_CLR */
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_HI_SET */
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_HI_CLR */
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_ADP_CTRL */
 #define PALMAS_USB_OTG_ADP_CTRL_ADP_EN                          0x04
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT                    2
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT                    0x02
 #define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_MASK                   0x03
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT                  0
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT                  0x00
 
 /* Bit definitions for USB_OTG_ADP_HIGH */
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK                 0xff
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT                0
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK                 0xFF
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_ADP_LOW */
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK                   0xff
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT                  0
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK                   0xFF
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT                  0x00
 
 /* Bit definitions for USB_OTG_ADP_RISE */
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK                 0xff
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT                0
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK                 0xFF
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_REVISION */
 #define PALMAS_USB_OTG_REVISION_OTG_REV                         0x01
-#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT                   0
+#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT                   0x00
 
 /* Registers for function VIBRATOR */
-#define PALMAS_VIBRA_CTRL                                       0x0
+#define PALMAS_VIBRA_CTRL                                       0x00
 
 /* Bit definitions for VIBRA_CTRL */
 #define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_MASK                     0x06
-#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT                    1
+#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT                    0x01
 #define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL                          0x01
-#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT                    0
+#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT                    0x00
 
 /* Registers for function GPIO */
-#define PALMAS_GPIO_DATA_IN                                     0x0
-#define PALMAS_GPIO_DATA_DIR                                    0x1
-#define PALMAS_GPIO_DATA_OUT                                    0x2
-#define PALMAS_GPIO_DEBOUNCE_EN                                 0x3
-#define PALMAS_GPIO_CLEAR_DATA_OUT                              0x4
-#define PALMAS_GPIO_SET_DATA_OUT                                0x5
-#define PALMAS_PU_PD_GPIO_CTRL1                                 0x6
-#define PALMAS_PU_PD_GPIO_CTRL2                                 0x7
-#define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x8
-#define PALMAS_GPIO_DATA_IN2                                    0x9
+#define PALMAS_GPIO_DATA_IN                                     0x00
+#define PALMAS_GPIO_DATA_DIR                                    0x01
+#define PALMAS_GPIO_DATA_OUT                                    0x02
+#define PALMAS_GPIO_DEBOUNCE_EN                                 0x03
+#define PALMAS_GPIO_CLEAR_DATA_OUT                              0x04
+#define PALMAS_GPIO_SET_DATA_OUT                                0x05
+#define PALMAS_PU_PD_GPIO_CTRL1                                 0x06
+#define PALMAS_PU_PD_GPIO_CTRL2                                 0x07
+#define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x08
+#define PALMAS_GPIO_DATA_IN2                                    0x09
 #define PALMAS_GPIO_DATA_DIR2                                   0x0A
 #define PALMAS_GPIO_DATA_OUT2                                   0x0B
 #define PALMAS_GPIO_DEBOUNCE_EN2                                0x0C
@@ -2561,167 +2561,167 @@ enum usb_irq_events {
 
 /* Bit definitions for GPIO_DATA_IN */
 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN                           0x80
-#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT                     7
+#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT                     0x07
 #define PALMAS_GPIO_DATA_IN_GPIO_6_IN                           0x40
-#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT                     6
+#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT                     0x06
 #define PALMAS_GPIO_DATA_IN_GPIO_5_IN                           0x20
-#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT                     5
+#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT                     0x05
 #define PALMAS_GPIO_DATA_IN_GPIO_4_IN                           0x10
-#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT                     4
+#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT                     0x04
 #define PALMAS_GPIO_DATA_IN_GPIO_3_IN                           0x08
-#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT                     3
+#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT                     0x03
 #define PALMAS_GPIO_DATA_IN_GPIO_2_IN                           0x04
-#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT                     2
+#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT                     0x02
 #define PALMAS_GPIO_DATA_IN_GPIO_1_IN                           0x02
-#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT                     1
+#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT                     0x01
 #define PALMAS_GPIO_DATA_IN_GPIO_0_IN                           0x01
-#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT                     0
+#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT                     0x00
 
 /* Bit definitions for GPIO_DATA_DIR */
 #define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR                         0x80
-#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT                   7
+#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT                   0x07
 #define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR                         0x40
-#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT                   6
+#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT                   0x06
 #define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR                         0x20
-#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT                   5
+#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT                   0x05
 #define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR                         0x10
-#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT                   4
+#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT                   0x04
 #define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR                         0x08
-#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT                   3
+#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT                   0x03
 #define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR                         0x04
-#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT                   2
+#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT                   0x02
 #define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR                         0x02
-#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT                   1
+#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT                   0x01
 #define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR                         0x01
-#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT                   0
+#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT                   0x00
 
 /* Bit definitions for GPIO_DATA_OUT */
 #define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT                         0x80
-#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT                   7
+#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT                   0x07
 #define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT                         0x40
-#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT                   6
+#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT                   0x06
 #define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT                         0x20
-#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT                   5
+#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT                   0x05
 #define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT                         0x10
-#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT                   4
+#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT                   0x04
 #define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT                         0x08
-#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT                   3
+#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT                   0x03
 #define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT                         0x04
-#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT                   2
+#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT                   0x02
 #define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT                         0x02
-#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT                   1
+#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT                   0x01
 #define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT                         0x01
-#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT                   0
+#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT                   0x00
 
 /* Bit definitions for GPIO_DEBOUNCE_EN */
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN              0x80
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT        7
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT        0x07
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN              0x40
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT        6
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT        0x06
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN              0x20
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT        5
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT        0x05
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN              0x10
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT        4
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT        0x04
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN              0x08
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT        3
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT        0x03
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN              0x04
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT        2
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT        0x02
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN              0x02
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT        1
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT        0x01
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN              0x01
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT        0
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT        0x00
 
 /* Bit definitions for GPIO_CLEAR_DATA_OUT */
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT        0x80
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT  7
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT  0x07
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT        0x40
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT  6
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT  0x06
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT        0x20
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT  5
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT  0x05
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT        0x10
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT  4
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT  0x04
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT        0x08
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT  3
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT  0x03
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT        0x04
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT  2
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT  0x02
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT        0x02
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT  1
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT  0x01
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT        0x01
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT  0
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT  0x00
 
 /* Bit definitions for GPIO_SET_DATA_OUT */
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT            0x80
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT      7
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT      0x07
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT            0x40
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT      6
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT      0x06
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT            0x20
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT      5
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT      0x05
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT            0x10
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT      4
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT      0x04
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT            0x08
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT      3
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT      0x03
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT            0x04
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT      2
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT      0x02
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT            0x02
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT      1
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT      0x01
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT            0x01
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT      0
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT      0x00
 
 /* Bit definitions for PU_PD_GPIO_CTRL1 */
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD                       0x40
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT                 6
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT                 0x06
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU                       0x20
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT                 5
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT                 0x05
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD                       0x10
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT                 4
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT                 0x04
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU                       0x08
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT                 3
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT                 0x03
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD                       0x04
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT                 2
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT                 0x02
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD                       0x01
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT                 0
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT                 0x00
 
 /* Bit definitions for PU_PD_GPIO_CTRL2 */
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD                       0x40
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT                 6
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT                 0x06
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU                       0x20
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT                 5
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT                 0x05
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD                       0x10
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT                 4
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT                 0x04
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU                       0x08
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT                 3
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT                 0x03
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD                       0x04
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT                 2
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT                 0x02
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU                       0x02
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT                 1
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT                 0x01
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD                       0x01
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT                 0
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT                 0x00
 
 /* Bit definitions for OD_OUTPUT_GPIO_CTRL */
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD                    0x20
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT              5
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT              0x05
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD                    0x04
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT              2
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT              0x02
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD                    0x02
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT              1
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT              0x01
 
 /* Registers for function GPADC */
-#define PALMAS_GPADC_CTRL1                                      0x0
-#define PALMAS_GPADC_CTRL2                                      0x1
-#define PALMAS_GPADC_RT_CTRL                                    0x2
-#define PALMAS_GPADC_AUTO_CTRL                                  0x3
-#define PALMAS_GPADC_STATUS                                     0x4
-#define PALMAS_GPADC_RT_SELECT                                  0x5
-#define PALMAS_GPADC_RT_CONV0_LSB                               0x6
-#define PALMAS_GPADC_RT_CONV0_MSB                               0x7
-#define PALMAS_GPADC_AUTO_SELECT                                0x8
-#define PALMAS_GPADC_AUTO_CONV0_LSB                             0x9
-#define PALMAS_GPADC_AUTO_CONV0_MSB                             0xA
-#define PALMAS_GPADC_AUTO_CONV1_LSB                             0xB
-#define PALMAS_GPADC_AUTO_CONV1_MSB                             0xC
-#define PALMAS_GPADC_SW_SELECT                                  0xD
-#define PALMAS_GPADC_SW_CONV0_LSB                               0xE
-#define PALMAS_GPADC_SW_CONV0_MSB                               0xF
+#define PALMAS_GPADC_CTRL1                                      0x00
+#define PALMAS_GPADC_CTRL2                                      0x01
+#define PALMAS_GPADC_RT_CTRL                                    0x02
+#define PALMAS_GPADC_AUTO_CTRL                                  0x03
+#define PALMAS_GPADC_STATUS                                     0x04
+#define PALMAS_GPADC_RT_SELECT                                  0x05
+#define PALMAS_GPADC_RT_CONV0_LSB                               0x06
+#define PALMAS_GPADC_RT_CONV0_MSB                               0x07
+#define PALMAS_GPADC_AUTO_SELECT                                0x08
+#define PALMAS_GPADC_AUTO_CONV0_LSB                             0x09
+#define PALMAS_GPADC_AUTO_CONV0_MSB                             0x0A
+#define PALMAS_GPADC_AUTO_CONV1_LSB                             0x0B
+#define PALMAS_GPADC_AUTO_CONV1_MSB                             0x0C
+#define PALMAS_GPADC_SW_SELECT                                  0x0D
+#define PALMAS_GPADC_SW_CONV0_LSB                               0x0E
+#define PALMAS_GPADC_SW_CONV0_MSB                               0x0F
 #define PALMAS_GPADC_THRES_CONV0_LSB                            0x10
 #define PALMAS_GPADC_THRES_CONV0_MSB                            0x11
 #define PALMAS_GPADC_THRES_CONV1_LSB                            0x12
@@ -2731,150 +2731,150 @@ enum usb_irq_events {
 
 /* Bit definitions for GPADC_CTRL1 */
 #define PALMAS_GPADC_CTRL1_RESERVED_MASK                        0xc0
-#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT                       6
+#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT                       0x06
 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_MASK                 0x30
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT                4
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT                0x04
 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_MASK                 0x0c
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT                2
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT                0x02
 #define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET                      0x02
-#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT                1
+#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT                0x01
 #define PALMAS_GPADC_CTRL1_GPADC_FORCE                          0x01
-#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT                    0
+#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT                    0x00
 
 /* Bit definitions for GPADC_CTRL2 */
 #define PALMAS_GPADC_CTRL2_RESERVED_MASK                        0x06
-#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT                       1
+#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT                       0x01
 
 /* Bit definitions for GPADC_RT_CTRL */
 #define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY                       0x02
-#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT                 1
+#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT                 0x01
 #define PALMAS_GPADC_RT_CTRL_START_POLARITY                     0x01
-#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT               0
+#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT               0x00
 
 /* Bit definitions for GPADC_AUTO_CTRL */
 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1                   0x80
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT             7
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT             0x07
 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0                   0x40
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT             6
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT             0x06
 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN                    0x20
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT              5
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT              0x05
 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN                    0x10
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT              4
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK                0x0f
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT               0
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT              0x04
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK                0x0F
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT               0x00
 
 /* Bit definitions for GPADC_STATUS */
 #define PALMAS_GPADC_STATUS_GPADC_AVAILABLE                     0x10
-#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT               4
+#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT               0x04
 
 /* Bit definitions for GPADC_RT_SELECT */
 #define PALMAS_GPADC_RT_SELECT_RT_CONV_EN                       0x80
-#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT                 7
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK                0x0f
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT               0
+#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT                 0x07
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK                0x0F
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT               0x00
 
 /* Bit definitions for GPADC_RT_CONV0_LSB */
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK             0xff
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT            0
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK             0xFF
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_RT_CONV0_MSB */
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK             0x0f
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT            0
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK             0x0F
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_AUTO_SELECT */
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK            0xf0
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT           4
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK            0x0f
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT           0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK            0xF0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT           0x04
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK            0x0F
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT           0x00
 
 /* Bit definitions for GPADC_AUTO_CONV0_LSB */
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK         0xff
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK         0xFF
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV0_MSB */
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK         0x0f
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK         0x0F
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV1_LSB */
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK         0xff
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK         0xFF
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV1_MSB */
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK         0x0f
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK         0x0F
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_SW_SELECT */
 #define PALMAS_GPADC_SW_SELECT_SW_CONV_EN                       0x80
-#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT                 7
+#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT                 0x07
 #define PALMAS_GPADC_SW_SELECT_SW_START_CONV0                   0x10
-#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT             4
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK                0x0f
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT               0
+#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT             0x04
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK                0x0F
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT               0x00
 
 /* Bit definitions for GPADC_SW_CONV0_LSB */
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK             0xff
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT            0
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK             0xFF
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_SW_CONV0_MSB */
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK             0x0f
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT            0
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK             0x0F
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_THRES_CONV0_LSB */
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK       0xff
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK       0xFF
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV0_MSB */
 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL            0x80
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT      7
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK       0x0f
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT      0x07
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK       0x0F
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV1_LSB */
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK       0xff
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK       0xFF
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV1_MSB */
 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL            0x80
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT      7
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK       0x0f
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT      0x07
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK       0x0F
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_SMPS_ILMONITOR_EN */
 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN            0x20
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT      5
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT      0x05
 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT          0x10
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT    4
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK      0x0f
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT     0
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT    0x04
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK      0x0F
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT     0x00
 
 /* Bit definitions for GPADC_SMPS_VSEL_MONITORING */
 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE          0x80
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT    7
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK     0x7f
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT    0
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT    0x07
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK     0x7F
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT    0x00
 
 /* Registers for function GPADC */
-#define PALMAS_GPADC_TRIM1                                      0x0
-#define PALMAS_GPADC_TRIM2                                      0x1
-#define PALMAS_GPADC_TRIM3                                      0x2
-#define PALMAS_GPADC_TRIM4                                      0x3
-#define PALMAS_GPADC_TRIM5                                      0x4
-#define PALMAS_GPADC_TRIM6                                      0x5
-#define PALMAS_GPADC_TRIM7                                      0x6
-#define PALMAS_GPADC_TRIM8                                      0x7
-#define PALMAS_GPADC_TRIM9                                      0x8
-#define PALMAS_GPADC_TRIM10                                     0x9
-#define PALMAS_GPADC_TRIM11                                     0xA
-#define PALMAS_GPADC_TRIM12                                     0xB
-#define PALMAS_GPADC_TRIM13                                     0xC
-#define PALMAS_GPADC_TRIM14                                     0xD
-#define PALMAS_GPADC_TRIM15                                     0xE
-#define PALMAS_GPADC_TRIM16                                     0xF
+#define PALMAS_GPADC_TRIM1                                      0x00
+#define PALMAS_GPADC_TRIM2                                      0x01
+#define PALMAS_GPADC_TRIM3                                      0x02
+#define PALMAS_GPADC_TRIM4                                      0x03
+#define PALMAS_GPADC_TRIM5                                      0x04
+#define PALMAS_GPADC_TRIM6                                      0x05
+#define PALMAS_GPADC_TRIM7                                      0x06
+#define PALMAS_GPADC_TRIM8                                      0x07
+#define PALMAS_GPADC_TRIM9                                      0x08
+#define PALMAS_GPADC_TRIM10                                     0x09
+#define PALMAS_GPADC_TRIM11                                     0x0A
+#define PALMAS_GPADC_TRIM12                                     0x0B
+#define PALMAS_GPADC_TRIM13                                     0x0C
+#define PALMAS_GPADC_TRIM14                                     0x0D
+#define PALMAS_GPADC_TRIM15                                     0x0E
+#define PALMAS_GPADC_TRIM16                                     0x0F
 
 static inline int palmas_read(struct palmas *palmas, unsigned int base,
                 unsigned int reg, unsigned int *val)
 {
-        unsigned int addr =  PALMAS_BASE_TO_REG(base, reg);
+        unsigned int addr = PALMAS_BASE_TO_REG(base, reg);
         int slave_id = PALMAS_BASE_TO_SLAVE(base);
 
         return regmap_read(palmas->regmap[slave_id], addr, val);
diff --git a/include/linux/mfd/pm8xxx/core.h b/include/linux/mfd/pm8xxx/core.h
deleted file mode 100644
index bd2f4f64e931..000000000000
--- a/include/linux/mfd/pm8xxx/core.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-/*
- * Qualcomm PMIC 8xxx driver header file
- *
- */
-
-#ifndef __MFD_PM8XXX_CORE_H
-#define __MFD_PM8XXX_CORE_H
-
-#include <linux/mfd/core.h>
-
-struct pm8xxx_drvdata {
-        int     (*pmic_readb) (const struct device *dev, u16 addr, u8 *val);
-        int     (*pmic_writeb) (const struct device *dev, u16 addr, u8 val);
-        int     (*pmic_read_buf) (const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n);
-        int     (*pmic_write_buf) (const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n);
-        int     (*pmic_read_irq_stat) (const struct device *dev, int irq);
-        void    *pm_chip_data;
-};
-
-static inline int pm8xxx_readb(const struct device *dev, u16 addr, u8 *val)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_readb(dev, addr, val);
-}
-
-static inline int pm8xxx_writeb(const struct device *dev, u16 addr, u8 val)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_writeb(dev, addr, val);
-}
-
-static inline int pm8xxx_read_buf(const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_read_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_write_buf(const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_write_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_read_irq_stat(const struct device *dev, int irq)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_read_irq_stat(dev, irq);
-}
-
-#endif
diff --git a/include/linux/mfd/rdc321x.h b/include/linux/mfd/rdc321x.h
index 4bdf19c8eedf..442743a8f915 100644
--- a/include/linux/mfd/rdc321x.h
+++ b/include/linux/mfd/rdc321x.h
@@ -12,7 +12,7 @@
 #define RDC321X_GPIO_CTRL_REG2  0x84
 #define RDC321X_GPIO_DATA_REG2  0x88
 
-#define RDC321X_MAX_GPIO        58
+#define RDC321X_NUM_GPIO        59
 
 struct rdc321x_gpio_pdata {
         struct pci_dev *sb_pdev;
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 157e32b6ca28..47d84242940b 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -24,35 +24,36 @@ enum sec_device_type {
 };
 
 /**
- * struct sec_pmic_dev - s5m87xx master device for sub-drivers
- * @dev: master device of the chip (can be used to access platform data)
- * @pdata: pointer to private data used to pass platform data to child
- * @i2c: i2c client private data for regulator
- * @rtc: i2c client private data for rtc
- * @iolock: mutex for serializing io access
- * @irqlock: mutex for buslock
- * @irq_base: base IRQ number for sec-pmic, required for IRQs
- * @irq: generic IRQ number for s5m87xx
- * @ono: power onoff IRQ number for s5m87xx
- * @irq_masks_cur: currently active value
- * @irq_masks_cache: cached hardware value
- * @type: indicate which s5m87xx "variant" is used
+ * struct sec_pmic_dev - s2m/s5m master device for sub-drivers
+ * @dev:                Master device of the chip
+ * @pdata:              Platform data populated with data from DTS
+ *                      or board files
+ * @regmap_pmic:        Regmap associated with PMIC's I2C address
+ * @i2c:                I2C client of the main driver
+ * @device_type:        Type of device, matches enum sec_device_type
+ * @irq_base:           Base IRQ number for device, required for IRQs
+ * @irq:                Generic IRQ number for device
+ * @irq_data:           Runtime data structure for IRQ controller
+ * @ono:                Power onoff IRQ number for s5m87xx
+ * @wakeup:             Whether or not this is a wakeup device
+ * @wtsr_smpl:          Whether or not to enable in RTC driver the Watchdog
+ *                      Timer Software Reset (registers set to default value
+ *                      after PWRHOLD falling) and Sudden Momentary Power Loss
+ *                      (PMIC will enter power on sequence after short drop in
+ *                      VBATT voltage).
  */
 struct sec_pmic_dev {
         struct device *dev;
         struct sec_platform_data *pdata;
         struct regmap *regmap_pmic;
-        struct regmap *regmap_rtc;
         struct i2c_client *i2c;
-        struct i2c_client *rtc;
 
-        int device_type;
+        unsigned long device_type;
         int irq_base;
         int irq;
         struct regmap_irq_chip_data *irq_data;
 
         int ono;
-        unsigned long type;
         bool wakeup;
         bool wtsr_smpl;
 };
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h
index 3e02b768d537..b6401e7661c7 100644
--- a/include/linux/mfd/samsung/rtc.h
+++ b/include/linux/mfd/samsung/rtc.h
@@ -18,38 +18,38 @@
 #ifndef __LINUX_MFD_SEC_RTC_H
 #define __LINUX_MFD_SEC_RTC_H
 
-enum sec_rtc_reg {
-        SEC_RTC_SEC,
-        SEC_RTC_MIN,
-        SEC_RTC_HOUR,
-        SEC_RTC_WEEKDAY,
-        SEC_RTC_DATE,
-        SEC_RTC_MONTH,
-        SEC_RTC_YEAR1,
-        SEC_RTC_YEAR2,
-        SEC_ALARM0_SEC,
-        SEC_ALARM0_MIN,
-        SEC_ALARM0_HOUR,
-        SEC_ALARM0_WEEKDAY,
-        SEC_ALARM0_DATE,
-        SEC_ALARM0_MONTH,
-        SEC_ALARM0_YEAR1,
-        SEC_ALARM0_YEAR2,
-        SEC_ALARM1_SEC,
-        SEC_ALARM1_MIN,
-        SEC_ALARM1_HOUR,
-        SEC_ALARM1_WEEKDAY,
-        SEC_ALARM1_DATE,
-        SEC_ALARM1_MONTH,
-        SEC_ALARM1_YEAR1,
-        SEC_ALARM1_YEAR2,
-        SEC_ALARM0_CONF,
-        SEC_ALARM1_CONF,
-        SEC_RTC_STATUS,
-        SEC_WTSR_SMPL_CNTL,
-        SEC_RTC_UDR_CON,
+enum s5m_rtc_reg {
+        S5M_RTC_SEC,
+        S5M_RTC_MIN,
+        S5M_RTC_HOUR,
+        S5M_RTC_WEEKDAY,
+        S5M_RTC_DATE,
+        S5M_RTC_MONTH,
+        S5M_RTC_YEAR1,
+        S5M_RTC_YEAR2,
+        S5M_ALARM0_SEC,
+        S5M_ALARM0_MIN,
+        S5M_ALARM0_HOUR,
+        S5M_ALARM0_WEEKDAY,
+        S5M_ALARM0_DATE,
+        S5M_ALARM0_MONTH,
+        S5M_ALARM0_YEAR1,
+        S5M_ALARM0_YEAR2,
+        S5M_ALARM1_SEC,
+        S5M_ALARM1_MIN,
+        S5M_ALARM1_HOUR,
+        S5M_ALARM1_WEEKDAY,
+        S5M_ALARM1_DATE,
+        S5M_ALARM1_MONTH,
+        S5M_ALARM1_YEAR1,
+        S5M_ALARM1_YEAR2,
+        S5M_ALARM0_CONF,
+        S5M_ALARM1_CONF,
+        S5M_RTC_STATUS,
+        S5M_WTSR_SMPL_CNTL,
+        S5M_RTC_UDR_CON,
 
-        SEC_RTC_REG_MAX,
+        S5M_RTC_REG_MAX,
 };
 
 enum s2mps_rtc_reg {
@@ -88,9 +88,9 @@ enum s2mps_rtc_reg {
 #define HOUR_12                 (1 << 7)
 #define HOUR_AMPM               (1 << 6)
 #define HOUR_PM                 (1 << 5)
-#define ALARM0_STATUS           (1 << 1)
-#define ALARM1_STATUS           (1 << 2)
-#define UPDATE_AD               (1 << 0)
+#define S5M_ALARM0_STATUS       (1 << 1)
+#define S5M_ALARM1_STATUS       (1 << 2)
+#define S5M_UPDATE_AD           (1 << 0)
 
 #define S2MPS_ALARM0_STATUS     (1 << 2)
 #define S2MPS_ALARM1_STATUS     (1 << 1)
@@ -101,16 +101,26 @@ enum s2mps_rtc_reg {
 #define MODEL24_SHIFT           1
 #define MODEL24_MASK            (1 << MODEL24_SHIFT)
 /* RTC Update Register1 */
-#define RTC_UDR_SHIFT           0
-#define RTC_UDR_MASK            (1 << RTC_UDR_SHIFT)
+#define S5M_RTC_UDR_SHIFT       0
+#define S5M_RTC_UDR_MASK        (1 << S5M_RTC_UDR_SHIFT)
 #define S2MPS_RTC_WUDR_SHIFT    4
 #define S2MPS_RTC_WUDR_MASK     (1 << S2MPS_RTC_WUDR_SHIFT)
 #define S2MPS_RTC_RUDR_SHIFT    0
 #define S2MPS_RTC_RUDR_MASK     (1 << S2MPS_RTC_RUDR_SHIFT)
 #define RTC_TCON_SHIFT          1
 #define RTC_TCON_MASK           (1 << RTC_TCON_SHIFT)
-#define RTC_TIME_EN_SHIFT       3
-#define RTC_TIME_EN_MASK        (1 << RTC_TIME_EN_SHIFT)
+#define S5M_RTC_TIME_EN_SHIFT   3
+#define S5M_RTC_TIME_EN_MASK    (1 << S5M_RTC_TIME_EN_SHIFT)
+/*
+ * UDR_T field in S5M_RTC_UDR_CON register determines the time needed
+ * for updating alarm and time registers. Default is 7.32 ms.
+ */
+#define S5M_RTC_UDR_T_SHIFT     6
+#define S5M_RTC_UDR_T_MASK      (0x3 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_7320_US   (0x0 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_1830_US   (0x1 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_3660_US   (0x2 << S5M_RTC_UDR_T_SHIFT)
+#define S5M_RTC_UDR_T_450_US    (0x3 << S5M_RTC_UDR_T_SHIFT)
 
 /* RTC Hour register */
 #define HOUR_PM_SHIFT           6
diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h
index 48395a69a7e9..575a86c7fcbd 100644
--- a/include/linux/mfd/stmpe.h
+++ b/include/linux/mfd/stmpe.h
@@ -11,6 +11,7 @@
 #include <linux/mutex.h>
 
 struct device;
+struct regulator;
 
 enum stmpe_block {
         STMPE_BLOCK_GPIO        = 1 << 0,
@@ -62,6 +63,8 @@ struct stmpe_client_info;
 
 /**
  * struct stmpe - STMPE MFD structure
+ * @vcc: optional VCC regulator
+ * @vio: optional VIO regulator
  * @lock: lock protecting I/O operations
  * @irq_lock: IRQ bus lock
  * @dev: device, mostly for dev_dbg()
@@ -73,13 +76,14 @@ struct stmpe_client_info;
  * @regs: list of addresses of registers which are at different addresses on
  *        different variants.  Indexed by one of STMPE_IDX_*.
  * @irq: irq number for stmpe
- * @irq_base: starting IRQ number for internal IRQs
  * @num_gpios: number of gpios, differs for variants
  * @ier: cache of IER registers for bus_lock
  * @oldier: cache of IER registers for bus_lock
  * @pdata: platform data
  */
 struct stmpe {
+        struct regulator *vcc;
+        struct regulator *vio;
         struct mutex lock;
         struct mutex irq_lock;
         struct device *dev;
@@ -91,7 +95,6 @@ struct stmpe {
         const u8 *regs;
 
         int irq;
-        int irq_base;
         int num_gpios;
         u8 ier[2];
         u8 oldier[2];
@@ -132,8 +135,6 @@ struct stmpe_keypad_platform_data {
 
 /**
  * struct stmpe_gpio_platform_data - STMPE GPIO platform data
- * @gpio_base: first gpio number assigned.  A maximum of
- *             %STMPE_NR_GPIOS GPIOs will be allocated.
  * @norequest_mask: bitmask specifying which GPIOs should _not_ be
  *                  requestable due to different usage (e.g. touch, keypad)
  *                  STMPE_GPIO_NOREQ_* macros can be used here.
@@ -141,7 +142,6 @@ struct stmpe_keypad_platform_data {
  * @remove: board specific remove callback
  */
 struct stmpe_gpio_platform_data {
-        int gpio_base;
         unsigned norequest_mask;
         void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
         void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
@@ -195,8 +195,6 @@ struct stmpe_ts_platform_data {
  * @irq_trigger: IRQ trigger to use for the interrupt to the host
  * @autosleep: bool to enable/disable stmpe autosleep
  * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
- * @irq_base: base IRQ number.  %STMPE_NR_IRQS irqs will be used, or
- *            %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
  * @irq_over_gpio: true if gpio is used to get irq
  * @irq_gpio: gpio number over which irq will be requested (significant only if
  *            irq_over_gpio is true)
@@ -207,7 +205,6 @@ struct stmpe_ts_platform_data {
 struct stmpe_platform_data {
         int id;
         unsigned int blocks;
-        int irq_base;
         unsigned int irq_trigger;
         bool autosleep;
         bool irq_over_gpio;
@@ -219,10 +216,4 @@ struct stmpe_platform_data {
         struct stmpe_ts_platform_data *ts;
 };
 
-#define STMPE_NR_INTERNAL_IRQS  9
-#define STMPE_INT_GPIO(x)       (STMPE_NR_INTERNAL_IRQS + (x))
-
-#define STMPE_NR_GPIOS          24
-#define STMPE_NR_IRQS           STMPE_INT_GPIO(STMPE_NR_GPIOS)
-
 #endif
diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h
index 8789fa3c7fd9..75e543b78f53 100644
--- a/include/linux/mfd/syscon.h
+++ b/include/linux/mfd/syscon.h
@@ -15,6 +15,8 @@
 #ifndef __LINUX_MFD_SYSCON_H__
 #define __LINUX_MFD_SYSCON_H__
 
+#include <linux/err.h>
+
 struct device_node;
 
 #ifdef CONFIG_MFD_SYSCON
diff --git a/include/linux/mfd/tps65218.h b/include/linux/mfd/tps65218.h
index d2e357df5a0e..2f9b593246ee 100644
--- a/include/linux/mfd/tps65218.h
+++ b/include/linux/mfd/tps65218.h
@@ -267,7 +267,6 @@ struct tps65218 {
         u32 irq_mask;
         struct regmap_irq_chip_data *irq_data;
         struct regulator_desc desc[TPS65218_NUM_REGULATOR];
-        struct regulator_dev *rdev[TPS65218_NUM_REGULATOR];
         struct tps_info *info[TPS65218_NUM_REGULATOR];
         struct regmap *regmap;
 };
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h
index 81f639bc1ae6..8f9fc3d26e6d 100644
--- a/include/linux/mfd/twl6040.h
+++ b/include/linux/mfd/twl6040.h
@@ -28,6 +28,7 @@
 #include <linux/interrupt.h>
 #include <linux/mfd/core.h>
 #include <linux/regulator/consumer.h>
+#include <linux/clk.h>
 
 #define TWL6040_REG_ASICID              0x01
 #define TWL6040_REG_ASICREV             0x02
@@ -157,6 +158,7 @@
 #define TWL6040_I2CSEL                  0x01
 #define TWL6040_RESETSPLIT              0x04
 #define TWL6040_INTCLRMODE              0x08
+#define TWL6040_I2CMODE(x)              ((x & 0x3) << 4)
 
 /* STATUS (0x2E) fields */
 
@@ -222,6 +224,7 @@ struct twl6040 {
         struct regmap *regmap;
         struct regmap_irq_chip_data *irq_data;
         struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
+        struct clk *clk32k;
         struct mutex mutex;
         struct mutex irq_mutex;
         struct mfd_cell cells[TWL6040_CELLS];
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 84a31ad0b791..a2901c414664 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -5,7 +5,9 @@
 #include <linux/mempolicy.h>
 #include <linux/migrate_mode.h>
 
-typedef struct page *new_page_t(struct page *, unsigned long private, int **);
+typedef struct page *new_page_t(struct page *page, unsigned long private,
+                                int **reason);
+typedef void free_page_t(struct page *page, unsigned long private);
 
 /*
  * Return values from addresss_space_operations.migratepage():
@@ -38,7 +40,7 @@ enum migrate_reason {
 extern void putback_movable_pages(struct list_head *l);
 extern int migrate_page(struct address_space *,
                         struct page *, struct page *, enum migrate_mode);
-extern int migrate_pages(struct list_head *l, new_page_t x,
+extern int migrate_pages(struct list_head *l, new_page_t new, free_page_t free,
                 unsigned long private, enum migrate_mode mode, int reason);
 
 extern int migrate_prep(void);
@@ -56,8 +58,9 @@ extern int migrate_page_move_mapping(struct address_space *mapping,
 #else
 
 static inline void putback_movable_pages(struct list_head *l) {}
-static inline int migrate_pages(struct list_head *l, new_page_t x,
-                unsigned long private, enum migrate_mode mode, int reason)
+static inline int migrate_pages(struct list_head *l, new_page_t new,
+                free_page_t free, unsigned long private, enum migrate_mode mode,
+                int reason)
         { return -ENOSYS; }
 
 static inline int migrate_prep(void) { return -ENOSYS; }
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index ba87bd21295a..3447bead9620 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -401,6 +401,7 @@ struct mlx4_caps {
         int                     max_rq_desc_sz;
         int                     max_qp_init_rdma;
         int                     max_qp_dest_rdma;
+        u32                     *qp0_qkey;
         u32                     *qp0_proxy;
         u32                     *qp1_proxy;
         u32                     *qp0_tunnel;
@@ -837,7 +838,7 @@ static inline int mlx4_is_slave(struct mlx4_dev *dev)
 }
 
 int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
-                   struct mlx4_buf *buf);
+                   struct mlx4_buf *buf, gfp_t gfp);
 void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
 static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset)
 {
@@ -874,9 +875,10 @@ int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw);
 int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
                    int start_index, int npages, u64 *page_list);
 int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
-                       struct mlx4_buf *buf);
+                       struct mlx4_buf *buf, gfp_t gfp);
 
-int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order);
+int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order,
+                  gfp_t gfp);
 void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db);
 
 int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres,
@@ -892,7 +894,8 @@ void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
 int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
 void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
 
-int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
+int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp,
+                  gfp_t gfp);
 void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
 
 int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn,
@@ -1234,4 +1237,8 @@ int mlx4_phys_to_slave_port(struct mlx4_dev *dev, int slave, int port);
 int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port);
 
 int mlx4_config_vxlan_port(struct mlx4_dev *dev, __be16 udp_port);
+int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port);
+int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port);
+int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port,
+                                 int enable);
 #endif /* MLX4_DEVICE_H */
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 93cef6313e72..2bce4aad2570 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -427,7 +427,6 @@ struct mlx5_core_mr {
         u64                     size;
         u32                     key;
         u32                     pd;
-        u32                     access;
 };
 
 struct mlx5_core_srq {
diff --git a/include/linux/mm.h b/include/linux/mm.h
index d6777060449f..e03dd29145a0 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -239,6 +239,12 @@ struct vm_operations_struct {
          */
         int (*access)(struct vm_area_struct *vma, unsigned long addr,
                       void *buf, int len, int write);
+
+        /* Called by the /proc/PID/maps code to ask the vma whether it
+         * has a special name.  Returning non-NULL will also cause this
+         * vma to be dumped unconditionally. */
+        const char *(*name)(struct vm_area_struct *vma);
+
 #ifdef CONFIG_NUMA
         /*
          * set_policy() op must add a reference to any non-NULL @new mempolicy
@@ -407,20 +413,25 @@ static inline void compound_unlock_irqrestore(struct page *page,
 #endif
 }
 
+static inline struct page *compound_head_by_tail(struct page *tail)
+{
+        struct page *head = tail->first_page;
+
+        /*
+         * page->first_page may be a dangling pointer to an old
+         * compound page, so recheck that it is still a tail
+         * page before returning.
+         */
+        smp_rmb();
+        if (likely(PageTail(tail)))
+                return head;
+        return tail;
+}
+
 static inline struct page *compound_head(struct page *page)
 {
-        if (unlikely(PageTail(page))) {
-                struct page *head = page->first_page;
-
-                /*
-                 * page->first_page may be a dangling pointer to an old
-                 * compound page, so recheck that it is still a tail
-                 * page before returning.
-                 */
-                smp_rmb();
-                if (likely(PageTail(page)))
-                        return head;
-        }
+        if (unlikely(PageTail(page)))
+                return compound_head_by_tail(page);
         return page;
 }
 
@@ -1778,7 +1789,9 @@ extern struct file *get_mm_exe_file(struct mm_struct *mm);
 extern int may_expand_vm(struct mm_struct *mm, unsigned long npages);
 extern struct vm_area_struct *_install_special_mapping(struct mm_struct *mm,
                                    unsigned long addr, unsigned long len,
-                                   unsigned long flags, struct page **pages);
+                                   unsigned long flags,
+                                   const struct vm_special_mapping *spec);
+/* This is an obsolete alternative to _install_special_mapping. */
 extern int install_special_mapping(struct mm_struct *mm,
                                    unsigned long addr, unsigned long len,
                                    unsigned long flags, struct page **pages);
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 8967e20cbe57..96c5750e3110 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -406,7 +406,7 @@ struct mm_struct {
         spinlock_t                      ioctx_lock;
         struct kioctx_table __rcu       *ioctx_table;
 #endif
-#ifdef CONFIG_MM_OWNER
+#ifdef CONFIG_MEMCG
         /*
          * "owner" points to a task that is regarded as the canonical
          * user/owner of this mm. All of the following must be true in
@@ -510,4 +510,10 @@ static inline void clear_tlb_flush_pending(struct mm_struct *mm)
 }
 #endif
 
+struct vm_special_mapping
+{
+        const char *name;
+        struct page **pages;
+};
+
 #endif /* _LINUX_MM_TYPES_H */
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index b73027298b3a..d424b9de3aff 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -63,12 +63,12 @@ struct mmc_ext_csd {
         unsigned int            power_off_longtime;     /* Units: ms */
         u8                      power_off_notification; /* state */
         unsigned int            hs_max_dtr;
+        unsigned int            hs200_max_dtr;
 #define MMC_HIGH_26_MAX_DTR     26000000
 #define MMC_HIGH_52_MAX_DTR     52000000
 #define MMC_HIGH_DDR_MAX_DTR    52000000
 #define MMC_HS200_MAX_DTR       200000000
         unsigned int            sectors;
-        unsigned int            card_type;
         unsigned int            hc_erase_size;          /* In sectors */
         unsigned int            hc_erase_timeout;       /* In milliseconds */
         unsigned int            sec_trim_mult;  /* Secure trim multiplier  */
@@ -110,6 +110,7 @@ struct mmc_ext_csd {
         u8                      raw_pwr_cl_200_360;     /* 237 */
         u8                      raw_pwr_cl_ddr_52_195;  /* 238 */
         u8                      raw_pwr_cl_ddr_52_360;  /* 239 */
+        u8                      raw_pwr_cl_ddr_200_360; /* 253 */
         u8                      raw_bkops_status;       /* 246 */
         u8                      raw_sectors[4];         /* 212 - 4 bytes */
 
@@ -194,6 +195,7 @@ struct sdio_cis {
 };
 
 struct mmc_host;
+struct mmc_ios;
 struct sdio_func;
 struct sdio_func_tuple;
 
@@ -250,15 +252,11 @@ struct mmc_card {
         unsigned int            state;          /* (our) card state */
 #define MMC_STATE_PRESENT       (1<<0)          /* present in sysfs */
 #define MMC_STATE_READONLY      (1<<1)          /* card is read-only */
-#define MMC_STATE_HIGHSPEED     (1<<2)          /* card is in high speed mode */
-#define MMC_STATE_BLOCKADDR     (1<<3)          /* card uses block-addressing */
-#define MMC_STATE_HIGHSPEED_DDR (1<<4)          /* card is in high speed mode */
-#define MMC_STATE_ULTRAHIGHSPEED (1<<5)         /* card is in ultra high speed mode */
-#define MMC_CARD_SDXC           (1<<6)          /* card is SDXC */
-#define MMC_CARD_REMOVED        (1<<7)          /* card has been removed */
-#define MMC_STATE_HIGHSPEED_200 (1<<8)          /* card is in HS200 mode */
-#define MMC_STATE_DOING_BKOPS   (1<<10)         /* card is doing BKOPS */
-#define MMC_STATE_SUSPENDED     (1<<11)         /* card is suspended */
+#define MMC_STATE_BLOCKADDR     (1<<2)          /* card uses block-addressing */
+#define MMC_CARD_SDXC           (1<<3)          /* card is SDXC */
+#define MMC_CARD_REMOVED        (1<<4)          /* card has been removed */
+#define MMC_STATE_DOING_BKOPS   (1<<5)          /* card is doing BKOPS */
+#define MMC_STATE_SUSPENDED     (1<<6)          /* card is suspended */
         unsigned int            quirks;         /* card quirks */
 #define MMC_QUIRK_LENIENT_FN0   (1<<0)          /* allow SDIO FN0 writes outside of the VS CCCR range */
 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)    /* use func->cur_blksize */
@@ -301,6 +299,7 @@ struct mmc_card {
         struct sdio_func_tuple  *tuples;        /* unknown common tuples */
 
         unsigned int            sd_bus_speed;   /* Bus Speed Mode set for the card */
+        unsigned int            mmc_avail_type; /* supported device type by both host and card */
 
         struct dentry           *debugfs_root;
         struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
@@ -353,7 +352,7 @@ struct mmc_fixup {
 #define CID_OEMID_ANY ((unsigned short) -1)
 #define CID_NAME_ANY (NULL)
 
-#define END_FIXUP { 0 }
+#define END_FIXUP { NULL }
 
 #define _FIXUP_EXT(_name, _manfid, _oemid, _rev_start, _rev_end,        \
                    _cis_vendor, _cis_device,                            \
@@ -418,11 +417,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
 
 #define mmc_card_present(c)     ((c)->state & MMC_STATE_PRESENT)
 #define mmc_card_readonly(c)    ((c)->state & MMC_STATE_READONLY)
-#define mmc_card_highspeed(c)   ((c)->state & MMC_STATE_HIGHSPEED)
-#define mmc_card_hs200(c)       ((c)->state & MMC_STATE_HIGHSPEED_200)
 #define mmc_card_blockaddr(c)   ((c)->state & MMC_STATE_BLOCKADDR)
-#define mmc_card_ddr_mode(c)    ((c)->state & MMC_STATE_HIGHSPEED_DDR)
-#define mmc_card_uhs(c)         ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
 #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
 #define mmc_card_removed(c)     ((c) && ((c)->state & MMC_CARD_REMOVED))
 #define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS)
@@ -430,11 +425,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
 
 #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
 #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
-#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
-#define mmc_card_set_hs200(c)   ((c)->state |= MMC_STATE_HIGHSPEED_200)
 #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
-#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
-#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
 #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
 #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
 #define mmc_card_set_doing_bkops(c)     ((c)->state |= MMC_STATE_DOING_BKOPS)
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 6ce7d2cd3c7a..babaea93bca6 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -248,20 +248,6 @@ struct dw_mci_board {
         /* delay in mS before detecting cards after interrupt */
         u32 detect_delay_ms;
 
-        int (*init)(u32 slot_id, irq_handler_t , void *);
-        int (*get_ro)(u32 slot_id);
-        int (*get_cd)(u32 slot_id);
-        int (*get_ocr)(u32 slot_id);
-        int (*get_bus_wd)(u32 slot_id);
-        /*
-         * Enable power to selected slot and set voltage to desired level.
-         * Voltage levels are specified using MMC_VDD_xxx defines defined
-         * in linux/mmc/host.h file.
-         */
-        void (*setpower)(u32 slot_id, u32 volt);
-        void (*exit)(u32 slot_id);
-        void (*select_slot)(u32 slot_id);
-
         struct dw_mci_dma_ops *dma_ops;
         struct dma_pdata *data;
         struct block_settings *blk_settings;
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index cb61ea4d6945..7960424d0bc0 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -17,6 +17,7 @@
 #include <linux/fault-inject.h>
 
 #include <linux/mmc/core.h>
+#include <linux/mmc/card.h>
 #include <linux/mmc/pm.h>
 
 struct mmc_ios {
@@ -58,13 +59,9 @@ struct mmc_ios {
 #define MMC_TIMING_UHS_SDR50    5
 #define MMC_TIMING_UHS_SDR104   6
 #define MMC_TIMING_UHS_DDR50    7
-#define MMC_TIMING_MMC_HS200    8
-
-#define MMC_SDR_MODE            0
-#define MMC_1_2V_DDR_MODE       1
-#define MMC_1_8V_DDR_MODE       2
-#define MMC_1_2V_SDR_MODE       3
-#define MMC_1_8V_SDR_MODE       4
+#define MMC_TIMING_MMC_DDR52    8
+#define MMC_TIMING_MMC_HS200    9
+#define MMC_TIMING_MMC_HS400    10
 
         unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
 
@@ -136,6 +133,9 @@ struct mmc_host_ops {
 
         /* The tuning command opcode value is different for SD and eMMC cards */
         int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
+
+        /* Prepare HS400 target operating frequency depending host driver */
+        int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
         int     (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
         void    (*hw_reset)(struct mmc_host *host);
         void    (*card_event)(struct mmc_host *host);
@@ -278,6 +278,11 @@ struct mmc_host {
 #define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
                                  MMC_CAP2_PACKED_WR)
 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
+#define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
+#define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
+#define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
+                                 MMC_CAP2_HS400_1_2V)
+#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 
         mmc_pm_flag_t           pm_caps;        /* supported pm features */
 
@@ -318,6 +323,8 @@ struct mmc_host {
         int                     rescan_disable; /* disable card detection */
         int                     rescan_entered; /* used with nonremovable devices */
 
+        bool                    trigger_card_event; /* card_event necessary */
+
         struct mmc_card         *card;          /* device attached to this host */
 
         wait_queue_head_t       wq;
@@ -391,12 +398,13 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
         wake_up_process(host->sdio_irq_thread);
 }
 
+void sdio_run_irqs(struct mmc_host *host);
+
 #ifdef CONFIG_REGULATOR
 int mmc_regulator_get_ocrmask(struct regulator *supply);
 int mmc_regulator_set_ocr(struct mmc_host *mmc,
                         struct regulator *supply,
                         unsigned short vdd_bit);
-int mmc_regulator_get_supply(struct mmc_host *mmc);
 #else
 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
 {
@@ -409,13 +417,10 @@ static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 {
         return 0;
 }
-
-static inline int mmc_regulator_get_supply(struct mmc_host *mmc)
-{
-        return 0;
-}
 #endif
 
+int mmc_regulator_get_supply(struct mmc_host *mmc);
+
 int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
 
 static inline int mmc_card_is_removable(struct mmc_host *host)
@@ -475,4 +480,32 @@ static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
         return host->ios.clock;
 }
 #endif
+
+static inline int mmc_card_hs(struct mmc_card *card)
+{
+        return card->host->ios.timing == MMC_TIMING_SD_HS ||
+                card->host->ios.timing == MMC_TIMING_MMC_HS;
+}
+
+static inline int mmc_card_uhs(struct mmc_card *card)
+{
+        return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
+                card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
+}
+
+static inline bool mmc_card_hs200(struct mmc_card *card)
+{
+        return card->host->ios.timing == MMC_TIMING_MMC_HS200;
+}
+
+static inline bool mmc_card_ddr52(struct mmc_card *card)
+{
+        return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
+}
+
+static inline bool mmc_card_hs400(struct mmc_card *card)
+{
+        return card->host->ios.timing == MMC_TIMING_MMC_HS400;
+}
+
 #endif /* LINUX_MMC_HOST_H */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 50bcde3677ca..64ec963ed347 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -325,6 +325,7 @@ struct _mmc_csd {
 #define EXT_CSD_POWER_OFF_LONG_TIME     247     /* RO */
 #define EXT_CSD_GENERIC_CMD6_TIME       248     /* RO */
 #define EXT_CSD_CACHE_SIZE              249     /* RO, 4 bytes */
+#define EXT_CSD_PWR_CL_DDR_200_360      253     /* RO */
 #define EXT_CSD_TAG_UNIT_SIZE           498     /* RO */
 #define EXT_CSD_DATA_TAG_SUPPORT        499     /* RO */
 #define EXT_CSD_MAX_PACKED_WRITES       500     /* RO */
@@ -354,18 +355,25 @@ struct _mmc_csd {
 #define EXT_CSD_CMD_SET_SECURE          (1<<1)
 #define EXT_CSD_CMD_SET_CPSECURE        (1<<2)
 
-#define EXT_CSD_CARD_TYPE_26    (1<<0)  /* Card can run at 26MHz */
-#define EXT_CSD_CARD_TYPE_52    (1<<1)  /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_MASK  0x3F    /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_HS_26 (1<<0)  /* Card can run at 26MHz */
+#define EXT_CSD_CARD_TYPE_HS_52 (1<<1)  /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_HS    (EXT_CSD_CARD_TYPE_HS_26 | \
+                                 EXT_CSD_CARD_TYPE_HS_52)
 #define EXT_CSD_CARD_TYPE_DDR_1_8V  (1<<2)   /* Card can run at 52MHz */
                                              /* DDR mode @1.8V or 3V I/O */
 #define EXT_CSD_CARD_TYPE_DDR_1_2V  (1<<3)   /* Card can run at 52MHz */
                                              /* DDR mode @1.2V I/O */
 #define EXT_CSD_CARD_TYPE_DDR_52       (EXT_CSD_CARD_TYPE_DDR_1_8V  \
                                         | EXT_CSD_CARD_TYPE_DDR_1_2V)
-#define EXT_CSD_CARD_TYPE_SDR_1_8V      (1<<4)  /* Card can run at 200MHz */
-#define EXT_CSD_CARD_TYPE_SDR_1_2V      (1<<5)  /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_8V    (1<<4)  /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_2V    (1<<5)  /* Card can run at 200MHz */
                                                 /* SDR mode @1.2V I/O */
+#define EXT_CSD_CARD_TYPE_HS200         (EXT_CSD_CARD_TYPE_HS200_1_8V | \
+                                         EXT_CSD_CARD_TYPE_HS200_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400_1_8V    (1<<6)  /* Card can run at 200MHz DDR, 1.8V */
+#define EXT_CSD_CARD_TYPE_HS400_1_2V    (1<<7)  /* Card can run at 200MHz DDR, 1.2V */
+#define EXT_CSD_CARD_TYPE_HS400         (EXT_CSD_CARD_TYPE_HS400_1_8V | \
+                                         EXT_CSD_CARD_TYPE_HS400_1_2V)
 
 #define EXT_CSD_BUS_WIDTH_1     0       /* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4     1       /* Card is in 4 bit mode */
@@ -373,6 +381,11 @@ struct _mmc_csd {
 #define EXT_CSD_DDR_BUS_WIDTH_4 5       /* Card is in 4 bit DDR mode */
 #define EXT_CSD_DDR_BUS_WIDTH_8 6       /* Card is in 8 bit DDR mode */
 
+#define EXT_CSD_TIMING_BC       0       /* Backwards compatility */
+#define EXT_CSD_TIMING_HS       1       /* High speed */
+#define EXT_CSD_TIMING_HS200    2       /* HS200 */
+#define EXT_CSD_TIMING_HS400    3       /* HS400 */
+
 #define EXT_CSD_SEC_ER_EN       BIT(0)
 #define EXT_CSD_SEC_BD_BLK_EN   BIT(2)
 #define EXT_CSD_SEC_GB_CL_EN    BIT(4)
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 7be12b883485..08abe9941884 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -57,12 +57,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_BROKEN_CARD_DETECTION               (1<<15)
 /* Controller reports inverted write-protect state */
 #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT              (1<<16)
-/* Controller has nonstandard clock management */
-#define SDHCI_QUIRK_NONSTANDARD_CLOCK                   (1<<17)
 /* Controller does not like fast PIO transfers */
 #define SDHCI_QUIRK_PIO_NEEDS_DELAY                     (1<<18)
-/* Controller losing signal/interrupt enable states after reset */
-#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET            (1<<19)
 /* Controller has to be forced to use block size of 2048 bytes */
 #define SDHCI_QUIRK_FORCE_BLK_SZ_2048                   (1<<20)
 /* Controller cannot do multi-block transfers */
@@ -147,6 +143,7 @@ struct sdhci_host {
 
         bool runtime_suspended; /* Host is runtime suspended */
         bool bus_on;            /* Bus power prevents runtime suspend */
+        bool preset_enabled;    /* Preset is enabled */
 
         struct mmc_request *mrq;        /* Current request */
         struct mmc_command *cmd;        /* Current command */
@@ -164,8 +161,7 @@ struct sdhci_host {
         dma_addr_t adma_addr;   /* Mapped ADMA descr. table */
         dma_addr_t align_addr;  /* Mapped bounce buffer */
 
-        struct tasklet_struct card_tasklet;     /* Tasklet structures */
-        struct tasklet_struct finish_tasklet;
+        struct tasklet_struct finish_tasklet;   /* Tasklet structures */
 
         struct timer_list timer;        /* Timer for timeouts */
 
@@ -177,6 +173,13 @@ struct sdhci_host {
         unsigned int            ocr_avail_mmc;
         u32 ocr_mask;           /* available voltages */
 
+        unsigned                timing;         /* Current timing */
+
+        u32                     thread_isr;
+
+        /* cached registers */
+        u32                     ier;
+
         wait_queue_head_t       buf_ready_int;  /* Waitqueue for Buffer Read Ready interrupt */
         unsigned int            tuning_done;    /* Condition flag set when CMD19 succeeds */
 
diff --git a/include/linux/mmdebug.h b/include/linux/mmdebug.h
index 2d57efa64cc1..edd82a105220 100644
--- a/include/linux/mmdebug.h
+++ b/include/linux/mmdebug.h
@@ -1,6 +1,8 @@
 #ifndef LINUX_MM_DEBUG_H
 #define LINUX_MM_DEBUG_H 1
 
+#include <linux/stringify.h>
+
 struct page;
 
 extern void dump_page(struct page *page, const char *reason);
@@ -9,11 +11,20 @@ extern void dump_page_badflags(struct page *page, const char *reason,
 
 #ifdef CONFIG_DEBUG_VM
 #define VM_BUG_ON(cond) BUG_ON(cond)
-#define VM_BUG_ON_PAGE(cond, page) \
-        do { if (unlikely(cond)) { dump_page(page, NULL); BUG(); } } while (0)
+#define VM_BUG_ON_PAGE(cond, page)                                      \
+        do {                                                            \
+                if (unlikely(cond)) {                                   \
+                        dump_page(page, "VM_BUG_ON_PAGE(" __stringify(cond)")");\
+                        BUG();                                          \
+                }                                                       \
+        } while (0)
+#define VM_WARN_ON(cond) WARN_ON(cond)
+#define VM_WARN_ON_ONCE(cond) WARN_ON_ONCE(cond)
 #else
 #define VM_BUG_ON(cond) BUILD_BUG_ON_INVALID(cond)
 #define VM_BUG_ON_PAGE(cond, page) VM_BUG_ON(cond)
+#define VM_WARN_ON(cond) BUILD_BUG_ON_INVALID(cond)
+#define VM_WARN_ON_ONCE(cond) BUILD_BUG_ON_INVALID(cond)
 #endif
 
 #ifdef CONFIG_DEBUG_VIRTUAL
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index fac5509c18f0..6cbd1b6c3d20 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -75,9 +75,18 @@ enum {
 
 extern int page_group_by_mobility_disabled;
 
-static inline int get_pageblock_migratetype(struct page *page)
+#define NR_MIGRATETYPE_BITS (PB_migrate_end - PB_migrate + 1)
+#define MIGRATETYPE_MASK ((1UL << NR_MIGRATETYPE_BITS) - 1)
+
+#define get_pageblock_migratetype(page)                                 \
+        get_pfnblock_flags_mask(page, page_to_pfn(page),                \
+                        PB_migrate_end, MIGRATETYPE_MASK)
+
+static inline int get_pfnblock_migratetype(struct page *page, unsigned long pfn)
 {
-        return get_pageblock_flags_group(page, PB_migrate, PB_migrate_end);
+        BUILD_BUG_ON(PB_migrate_end - PB_migrate != 2);
+        return get_pfnblock_flags_mask(page, pfn, PB_migrate_end,
+                                        MIGRATETYPE_MASK);
 }
 
 struct free_area {
@@ -360,9 +369,10 @@ struct zone {
         /* Set to true when the PG_migrate_skip bits should be cleared */
         bool                    compact_blockskip_flush;
 
-        /* pfns where compaction scanners should start */
+        /* pfn where compaction free scanner should start */
         unsigned long           compact_cached_free_pfn;
-        unsigned long           compact_cached_migrate_pfn;
+        /* pfn where async and sync compaction migration scanner should start */
+        unsigned long           compact_cached_migrate_pfn[2];
 #endif
 #ifdef CONFIG_MEMORY_HOTPLUG
         /* see spanned/present_pages for more description */
@@ -481,9 +491,8 @@ struct zone {
          * give them a chance of being in the same cacheline.
          *
          * Write access to present_pages at runtime should be protected by
-         * lock_memory_hotplug()/unlock_memory_hotplug().  Any reader who can't
-         * tolerant drift of present_pages should hold memory hotplug lock to
-         * get a stable value.
+         * mem_hotplug_begin/end(). Any reader who can't tolerant drift of
+         * present_pages should get_online_mems() to get a stable value.
          *
          * Read access to managed_pages should be safe because it's unsigned
          * long. Write access to zone->managed_pages and totalram_pages are
@@ -763,10 +772,10 @@ typedef struct pglist_data {
         unsigned long node_spanned_pages; /* total size of physical page
                                              range, including holes */
         int node_id;
-        nodemask_t reclaim_nodes;       /* Nodes allowed to reclaim from */
         wait_queue_head_t kswapd_wait;
         wait_queue_head_t pfmemalloc_wait;
-        struct task_struct *kswapd;     /* Protected by lock_memory_hotplug() */
+        struct task_struct *kswapd;     /* Protected by
+                                           mem_hotplug_begin/end() */
         int kswapd_max_order;
         enum zone_type classzone_idx;
 #ifdef CONFIG_NUMA_BALANCING
@@ -808,10 +817,10 @@ static inline bool pgdat_is_empty(pg_data_t *pgdat)
 extern struct mutex zonelists_mutex;
 void build_all_zonelists(pg_data_t *pgdat, struct zone *zone);
 void wakeup_kswapd(struct zone *zone, int order, enum zone_type classzone_idx);
-bool zone_watermark_ok(struct zone *z, int order, unsigned long mark,
-                int classzone_idx, int alloc_flags);
-bool zone_watermark_ok_safe(struct zone *z, int order, unsigned long mark,
-                int classzone_idx, int alloc_flags);
+bool zone_watermark_ok(struct zone *z, unsigned int order,
+                unsigned long mark, int classzone_idx, int alloc_flags);
+bool zone_watermark_ok_safe(struct zone *z, unsigned int order,
+                unsigned long mark, int classzone_idx, int alloc_flags);
 enum memmap_context {
         MEMMAP_EARLY,
         MEMMAP_HOTPLUG,
diff --git a/include/linux/moduleparam.h b/include/linux/moduleparam.h
index 204a67743804..b1990c5524e1 100644
--- a/include/linux/moduleparam.h
+++ b/include/linux/moduleparam.h
@@ -321,7 +321,7 @@ extern bool parameq(const char *name1, const char *name2);
 extern bool parameqn(const char *name1, const char *name2, size_t n);
 
 /* Called on module insert or kernel boot */
-extern int parse_args(const char *name,
+extern char *parse_args(const char *name,
                       char *args,
                       const struct kernel_param *params,
                       unsigned num,
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 450d61ec7f06..2f0af2891f0f 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -176,6 +176,11 @@ typedef enum {
 /* Chip may not exist, so silence any errors in scan */
 #define NAND_SCAN_SILENT_NODEV  0x00040000
 /*
+ * This option could be defined by controller drivers to protect against
+ * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
+ */
+#define NAND_USE_BOUNCE_BUFFER  0x00080000
+/*
  * Autodetect nand buswidth with readid/onfi.
  * This suppose the driver will configure the hardware in 8 bits mode
  * when calling nand_scan_ident, and update its configuration
@@ -552,8 +557,7 @@ struct nand_buffers {
  * @ecc:                [BOARDSPECIFIC] ECC control structure
  * @buffers:            buffer structure for read/write
  * @hwcontrol:          platform-specific hardware control structure
- * @erase_cmd:          [INTERN] erase command write function, selectable due
- *                      to AND support.
+ * @erase:              [REPLACEABLE] erase function
  * @scan_bbt:           [REPLACEABLE] function to scan bad block table
  * @chip_delay:         [BOARDSPECIFIC] chip dependent delay for transferring
  *                      data from array to read regs (tR).
@@ -637,7 +641,7 @@ struct nand_chip {
         void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
                         int page_addr);
         int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
-        void (*erase_cmd)(struct mtd_info *mtd, int page);
+        int (*erase)(struct mtd_info *mtd, int page);
         int (*scan_bbt)(struct mtd_info *mtd);
         int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
                         int status, int page);
diff --git a/include/linux/mtd/pfow.h b/include/linux/mtd/pfow.h
index b730d4f84655..42ff7ff09bf5 100644
--- a/include/linux/mtd/pfow.h
+++ b/include/linux/mtd/pfow.h
@@ -101,9 +101,6 @@ static inline void send_pfow_command(struct map_info *map,
                                 unsigned long len, map_word *datum)
 {
         int bits_per_chip = map_bankwidth(map) * 8;
-        int chipnum;
-        struct lpddr_private *lpddr = map->fldrv_priv;
-        chipnum = adr >> lpddr->chipshift;
 
         map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE);
         map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)),
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
new file mode 100644
index 000000000000..53241842a7ab
--- /dev/null
+++ b/include/linux/mtd/spi-nor.h
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_MTD_SPI_NOR_H
+#define __LINUX_MTD_SPI_NOR_H
+
+/*
+ * Note on opcode nomenclature: some opcodes have a format like
+ * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
+ * of I/O lines used for the opcode, address, and data (respectively). The
+ * FUNCTION has an optional suffix of '4', to represent an opcode which
+ * requires a 4-byte (32-bit) address.
+ */
+
+/* Flash opcodes. */
+#define SPINOR_OP_WREN          0x06    /* Write enable */
+#define SPINOR_OP_RDSR          0x05    /* Read status register */
+#define SPINOR_OP_WRSR          0x01    /* Write status register 1 byte */
+#define SPINOR_OP_READ          0x03    /* Read data bytes (low frequency) */
+#define SPINOR_OP_READ_FAST     0x0b    /* Read data bytes (high frequency) */
+#define SPINOR_OP_READ_1_1_2    0x3b    /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_READ_1_1_4    0x6b    /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP            0x02    /* Page program (up to 256 bytes) */
+#define SPINOR_OP_BE_4K         0x20    /* Erase 4KiB block */
+#define SPINOR_OP_BE_4K_PMC     0xd7    /* Erase 4KiB block on PMC chips */
+#define SPINOR_OP_BE_32K        0x52    /* Erase 32KiB block */
+#define SPINOR_OP_CHIP_ERASE    0xc7    /* Erase whole flash chip */
+#define SPINOR_OP_SE            0xd8    /* Sector erase (usually 64KiB) */
+#define SPINOR_OP_RDID          0x9f    /* Read JEDEC ID */
+#define SPINOR_OP_RDCR          0x35    /* Read configuration register */
+
+/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
+#define SPINOR_OP_READ4         0x13    /* Read data bytes (low frequency) */
+#define SPINOR_OP_READ4_FAST    0x0c    /* Read data bytes (high frequency) */
+#define SPINOR_OP_READ4_1_1_2   0x3c    /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_READ4_1_1_4   0x6c    /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP_4B         0x12    /* Page program (up to 256 bytes) */
+#define SPINOR_OP_SE_4B         0xdc    /* Sector erase (usually 64KiB) */
+
+/* Used for SST flashes only. */
+#define SPINOR_OP_BP            0x02    /* Byte program */
+#define SPINOR_OP_WRDI          0x04    /* Write disable */
+#define SPINOR_OP_AAI_WP        0xad    /* Auto address increment word program */
+
+/* Used for Macronix and Winbond flashes. */
+#define SPINOR_OP_EN4B          0xb7    /* Enter 4-byte mode */
+#define SPINOR_OP_EX4B          0xe9    /* Exit 4-byte mode */
+
+/* Used for Spansion flashes only. */
+#define SPINOR_OP_BRWR          0x17    /* Bank register write */
+
+/* Status Register bits. */
+#define SR_WIP                  1       /* Write in progress */
+#define SR_WEL                  2       /* Write enable latch */
+/* meaning of other SR_* bits may differ between vendors */
+#define SR_BP0                  4       /* Block protect 0 */
+#define SR_BP1                  8       /* Block protect 1 */
+#define SR_BP2                  0x10    /* Block protect 2 */
+#define SR_SRWD                 0x80    /* SR write protect */
+
+#define SR_QUAD_EN_MX           0x40    /* Macronix Quad I/O */
+
+/* Configuration Register bits. */
+#define CR_QUAD_EN_SPAN         0x2     /* Spansion Quad I/O */
+
+enum read_mode {
+        SPI_NOR_NORMAL = 0,
+        SPI_NOR_FAST,
+        SPI_NOR_DUAL,
+        SPI_NOR_QUAD,
+};
+
+/**
+ * struct spi_nor_xfer_cfg - Structure for defining a Serial Flash transfer
+ * @wren:               command for "Write Enable", or 0x00 for not required
+ * @cmd:                command for operation
+ * @cmd_pins:           number of pins to send @cmd (1, 2, 4)
+ * @addr:               address for operation
+ * @addr_pins:          number of pins to send @addr (1, 2, 4)
+ * @addr_width:         number of address bytes
+ *                      (3,4, or 0 for address not required)
+ * @mode:               mode data
+ * @mode_pins:          number of pins to send @mode (1, 2, 4)
+ * @mode_cycles:        number of mode cycles (0 for mode not required)
+ * @dummy_cycles:       number of dummy cycles (0 for dummy not required)
+ */
+struct spi_nor_xfer_cfg {
+        u8              wren;
+        u8              cmd;
+        u8              cmd_pins;
+        u32             addr;
+        u8              addr_pins;
+        u8              addr_width;
+        u8              mode;
+        u8              mode_pins;
+        u8              mode_cycles;
+        u8              dummy_cycles;
+};
+
+#define SPI_NOR_MAX_CMD_SIZE    8
+enum spi_nor_ops {
+        SPI_NOR_OPS_READ = 0,
+        SPI_NOR_OPS_WRITE,
+        SPI_NOR_OPS_ERASE,
+        SPI_NOR_OPS_LOCK,
+        SPI_NOR_OPS_UNLOCK,
+};
+
+/**
+ * struct spi_nor - Structure for defining a the SPI NOR layer
+ * @mtd:                point to a mtd_info structure
+ * @lock:               the lock for the read/write/erase/lock/unlock operations
+ * @dev:                point to a spi device, or a spi nor controller device.
+ * @page_size:          the page size of the SPI NOR
+ * @addr_width:         number of address bytes
+ * @erase_opcode:       the opcode for erasing a sector
+ * @read_opcode:        the read opcode
+ * @read_dummy:         the dummy needed by the read operation
+ * @program_opcode:     the program opcode
+ * @flash_read:         the mode of the read
+ * @sst_write_second:   used by the SST write operation
+ * @cfg:                used by the read_xfer/write_xfer
+ * @cmd_buf:            used by the write_reg
+ * @prepare:            [OPTIONAL] do some preparations for the
+ *                      read/write/erase/lock/unlock operations
+ * @unprepare:          [OPTIONAL] do some post work after the
+ *                      read/write/erase/lock/unlock operations
+ * @read_xfer:          [OPTIONAL] the read fundamental primitive
+ * @write_xfer:         [OPTIONAL] the writefundamental primitive
+ * @read_reg:           [DRIVER-SPECIFIC] read out the register
+ * @write_reg:          [DRIVER-SPECIFIC] write data to the register
+ * @read_id:            [REPLACEABLE] read out the ID data, and find
+ *                      the proper spi_device_id
+ * @wait_till_ready:    [REPLACEABLE] wait till the NOR becomes ready
+ * @read:               [DRIVER-SPECIFIC] read data from the SPI NOR
+ * @write:              [DRIVER-SPECIFIC] write data to the SPI NOR
+ * @erase:              [DRIVER-SPECIFIC] erase a sector of the SPI NOR
+ *                      at the offset @offs
+ * @priv:               the private data
+ */
+struct spi_nor {
+        struct mtd_info         *mtd;
+        struct mutex            lock;
+        struct device           *dev;
+        u32                     page_size;
+        u8                      addr_width;
+        u8                      erase_opcode;
+        u8                      read_opcode;
+        u8                      read_dummy;
+        u8                      program_opcode;
+        enum read_mode          flash_read;
+        bool                    sst_write_second;
+        struct spi_nor_xfer_cfg cfg;
+        u8                      cmd_buf[SPI_NOR_MAX_CMD_SIZE];
+
+        int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+        void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+        int (*read_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+                         u8 *buf, size_t len);
+        int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
+                          u8 *buf, size_t len);
+        int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
+        int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
+                        int write_enable);
+        const struct spi_device_id *(*read_id)(struct spi_nor *nor);
+        int (*wait_till_ready)(struct spi_nor *nor);
+
+        int (*read)(struct spi_nor *nor, loff_t from,
+                        size_t len, size_t *retlen, u_char *read_buf);
+        void (*write)(struct spi_nor *nor, loff_t to,
+                        size_t len, size_t *retlen, const u_char *write_buf);
+        int (*erase)(struct spi_nor *nor, loff_t offs);
+
+        void *priv;
+};
+
+/**
+ * spi_nor_scan() - scan the SPI NOR
+ * @nor:        the spi_nor structure
+ * @id:         the spi_device_id provided by the driver
+ * @mode:       the read mode supported by the driver
+ *
+ * The drivers can use this fuction to scan the SPI NOR.
+ * In the scanning, it will try to get all the necessary information to
+ * fill the mtd_info{} and the spi_nor{}.
+ *
+ * The board may assigns a spi_device_id with @id which be used to compared with
+ * the spi_device_id detected by the scanning.
+ *
+ * Return: 0 for success, others for failure.
+ */
+int spi_nor_scan(struct spi_nor *nor, const struct spi_device_id *id,
+                        enum read_mode mode);
+extern const struct spi_device_id spi_nor_ids[];
+
+/**
+ * spi_nor_match_id() - find the spi_device_id by the name
+ * @name:       the name of the spi_device_id
+ *
+ * The drivers use this function to find the spi_device_id
+ * specified by the @name.
+ *
+ * Return: returns the right spi_device_id pointer on success,
+ *         and returns NULL on failure.
+ */
+const struct spi_device_id *spi_nor_match_id(char *name);
+
+#endif
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index f64b01787ddc..034cda789a15 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -16,9 +16,10 @@ static inline struct nlmsghdr *nlmsg_hdr(const struct sk_buff *skb)
 }
 
 enum netlink_skb_flags {
-        NETLINK_SKB_MMAPED      = 0x1,          /* Packet data is mmaped */
-        NETLINK_SKB_TX          = 0x2,          /* Packet was sent by userspace */
-        NETLINK_SKB_DELIVERED   = 0x4,          /* Packet was delivered */
+        NETLINK_SKB_MMAPED      = 0x1,  /* Packet data is mmaped */
+        NETLINK_SKB_TX          = 0x2,  /* Packet was sent by userspace */
+        NETLINK_SKB_DELIVERED   = 0x4,  /* Packet was delivered */
+        NETLINK_SKB_DST         = 0x8,  /* Dst set in sendto or sendmsg */
 };
 
 struct netlink_skb_parms {
diff --git a/include/linux/nfs.h b/include/linux/nfs.h
index 3e794c12e90a..610af5155ef2 100644
--- a/include/linux/nfs.h
+++ b/include/linux/nfs.h
@@ -46,6 +46,9 @@ static inline void nfs_copy_fh(struct nfs_fh *target, const struct nfs_fh *sourc
 enum nfs3_stable_how {
         NFS_UNSTABLE = 0,
         NFS_DATA_SYNC = 1,
-        NFS_FILE_SYNC = 2
+        NFS_FILE_SYNC = 2,
+
+        /* used by direct.c to mark verf as invalid */
+        NFS_INVALID_STABLE_HOW = -1
 };
 #endif /* _LINUX_NFS_H */
diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h
index 12c2cb947df5..a1e3064a8d99 100644
--- a/include/linux/nfs4.h
+++ b/include/linux/nfs4.h
@@ -399,8 +399,6 @@ enum lock_type4 {
 #define FATTR4_WORD2_LAYOUT_BLKSIZE     (1UL << 1)
 #define FATTR4_WORD2_MDSTHRESHOLD       (1UL << 4)
 #define FATTR4_WORD2_SECURITY_LABEL     (1UL << 16)
-#define FATTR4_WORD2_CHANGE_SECURITY_LABEL \
-                                        (1UL << 17)
 
 /* MDS threshold bitmap bits */
 #define THRESHOLD_RD                    (1UL << 0)
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index fa6918b0f829..e30f6059ecd6 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -459,13 +459,12 @@ extern int nfs3_removexattr (struct dentry *, const char *name);
 /*
  * linux/fs/nfs/direct.c
  */
-extern ssize_t nfs_direct_IO(int, struct kiocb *, const struct iovec *, loff_t,
-                        unsigned long);
+extern ssize_t nfs_direct_IO(int, struct kiocb *, struct iov_iter *, loff_t);
 extern ssize_t nfs_file_direct_read(struct kiocb *iocb,
-                        const struct iovec *iov, unsigned long nr_segs,
+                        struct iov_iter *iter,
                         loff_t pos, bool uio);
 extern ssize_t nfs_file_direct_write(struct kiocb *iocb,
-                        const struct iovec *iov, unsigned long nr_segs,
+                        struct iov_iter *iter,
                         loff_t pos, bool uio);
 
 /*
@@ -520,7 +519,6 @@ extern int  nfs_writepage(struct page *page, struct writeback_control *wbc);
 extern int  nfs_writepages(struct address_space *, struct writeback_control *);
 extern int  nfs_flush_incompatible(struct file *file, struct page *page);
 extern int  nfs_updatepage(struct file *, struct page *, unsigned int, unsigned int);
-extern void nfs_writeback_done(struct rpc_task *, struct nfs_write_data *);
 
 /*
  * Try to write back everything synchronously (but check the
@@ -553,7 +551,6 @@ nfs_have_writebacks(struct inode *inode)
 extern int  nfs_readpage(struct file *, struct page *);
 extern int  nfs_readpages(struct file *, struct address_space *,
                 struct list_head *, unsigned);
-extern int  nfs_readpage_result(struct rpc_task *, struct nfs_read_data *);
 extern int  nfs_readpage_async(struct nfs_open_context *, struct inode *,
                                struct page *);
 
diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h
index 92ce5783b707..7d9096d95d4a 100644
--- a/include/linux/nfs_page.h
+++ b/include/linux/nfs_page.h
@@ -22,12 +22,17 @@
  * Valid flags for a dirty buffer
  */
 enum {
-        PG_BUSY = 0,
-        PG_MAPPED,
-        PG_CLEAN,
-        PG_NEED_COMMIT,
-        PG_NEED_RESCHED,
-        PG_COMMIT_TO_DS,
+        PG_BUSY = 0,            /* nfs_{un}lock_request */
+        PG_MAPPED,              /* page private set for buffered io */
+        PG_CLEAN,               /* write succeeded */
+        PG_COMMIT_TO_DS,        /* used by pnfs layouts */
+        PG_INODE_REF,           /* extra ref held by inode (head req only) */
+        PG_HEADLOCK,            /* page group lock of wb_head */
+        PG_TEARDOWN,            /* page group sync for destroy */
+        PG_UNLOCKPAGE,          /* page group sync bit in read path */
+        PG_UPTODATE,            /* page group sync bit in read path */
+        PG_WB_END,              /* page group sync bit in write path */
+        PG_REMOVE,              /* page group sync bit in write path */
 };
 
 struct nfs_inode;
@@ -43,15 +48,29 @@ struct nfs_page {
         struct kref             wb_kref;        /* reference count */
         unsigned long           wb_flags;
         struct nfs_write_verifier       wb_verf;        /* Commit cookie */
+        struct nfs_page         *wb_this_page;  /* list of reqs for this page */
+        struct nfs_page         *wb_head;       /* head pointer for req list */
 };
 
 struct nfs_pageio_descriptor;
 struct nfs_pageio_ops {
         void    (*pg_init)(struct nfs_pageio_descriptor *, struct nfs_page *);
-        bool    (*pg_test)(struct nfs_pageio_descriptor *, struct nfs_page *, struct nfs_page *);
+        size_t  (*pg_test)(struct nfs_pageio_descriptor *, struct nfs_page *,
+                           struct nfs_page *);
         int     (*pg_doio)(struct nfs_pageio_descriptor *);
 };
 
+struct nfs_rw_ops {
+        const fmode_t rw_mode;
+        struct nfs_rw_header *(*rw_alloc_header)(void);
+        void (*rw_free_header)(struct nfs_rw_header *);
+        void (*rw_release)(struct nfs_pgio_data *);
+        int  (*rw_done)(struct rpc_task *, struct nfs_pgio_data *, struct inode *);
+        void (*rw_result)(struct rpc_task *, struct nfs_pgio_data *);
+        void (*rw_initiate)(struct nfs_pgio_data *, struct rpc_message *,
+                            struct rpc_task_setup *, int);
+};
+
 struct nfs_pageio_descriptor {
         struct list_head        pg_list;
         unsigned long           pg_bytes_written;
@@ -63,6 +82,7 @@ struct nfs_pageio_descriptor {
 
         struct inode            *pg_inode;
         const struct nfs_pageio_ops *pg_ops;
+        const struct nfs_rw_ops *pg_rw_ops;
         int                     pg_ioflags;
         int                     pg_error;
         const struct rpc_call_ops *pg_rpc_callops;
@@ -75,29 +95,33 @@ struct nfs_pageio_descriptor {
 #define NFS_WBACK_BUSY(req)     (test_bit(PG_BUSY,&(req)->wb_flags))
 
 extern  struct nfs_page *nfs_create_request(struct nfs_open_context *ctx,
-                                            struct inode *inode,
                                             struct page *page,
+                                            struct nfs_page *last,
                                             unsigned int offset,
                                             unsigned int count);
-extern  void nfs_release_request(struct nfs_page *req);
+extern  void nfs_release_request(struct nfs_page *);
 
 
 extern  void nfs_pageio_init(struct nfs_pageio_descriptor *desc,
                              struct inode *inode,
                              const struct nfs_pageio_ops *pg_ops,
                              const struct nfs_pgio_completion_ops *compl_ops,
+                             const struct nfs_rw_ops *rw_ops,
                              size_t bsize,
                              int how);
 extern  int nfs_pageio_add_request(struct nfs_pageio_descriptor *,
                                    struct nfs_page *);
 extern  void nfs_pageio_complete(struct nfs_pageio_descriptor *desc);
 extern  void nfs_pageio_cond_complete(struct nfs_pageio_descriptor *, pgoff_t);
-extern bool nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
+extern size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
                                 struct nfs_page *prev,
                                 struct nfs_page *req);
 extern  int nfs_wait_on_request(struct nfs_page *);
 extern  void nfs_unlock_request(struct nfs_page *req);
-extern  void nfs_unlock_and_release_request(struct nfs_page *req);
+extern  void nfs_unlock_and_release_request(struct nfs_page *);
+extern void nfs_page_group_lock(struct nfs_page *);
+extern void nfs_page_group_unlock(struct nfs_page *);
+extern bool nfs_page_group_sync_on_bit(struct nfs_page *, unsigned int);
 
 /*
  * Lock the page of an asynchronous request
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index 6fb5b2335b59..9a1396e70310 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -489,31 +489,21 @@ struct nfs4_delegreturnres {
 };
 
 /*
- * Arguments to the read call.
+ * Arguments to the write call.
  */
-struct nfs_readargs {
-        struct nfs4_sequence_args       seq_args;
-        struct nfs_fh *         fh;
-        struct nfs_open_context *context;
-        struct nfs_lock_context *lock_context;
-        nfs4_stateid            stateid;
-        __u64                   offset;
-        __u32                   count;
-        unsigned int            pgbase;
-        struct page **          pages;
+struct nfs_write_verifier {
+        char                    data[8];
 };
 
-struct nfs_readres {
-        struct nfs4_sequence_res        seq_res;
-        struct nfs_fattr *      fattr;
-        __u32                   count;
-        int                     eof;
+struct nfs_writeverf {
+        struct nfs_write_verifier verifier;
+        enum nfs3_stable_how    committed;
 };
 
 /*
- * Arguments to the write call.
+ * Arguments shared by the read and write call.
  */
-struct nfs_writeargs {
+struct nfs_pgio_args {
         struct nfs4_sequence_args       seq_args;
         struct nfs_fh *         fh;
         struct nfs_open_context *context;
@@ -521,27 +511,20 @@ struct nfs_writeargs {
         nfs4_stateid            stateid;
         __u64                   offset;
         __u32                   count;
-        enum nfs3_stable_how    stable;
         unsigned int            pgbase;
         struct page **          pages;
-        const u32 *             bitmask;
-};
-
-struct nfs_write_verifier {
-        char                    data[8];
+        const u32 *             bitmask;        /* used by write */
+        enum nfs3_stable_how    stable;         /* used by write */
 };
 
-struct nfs_writeverf {
-        struct nfs_write_verifier verifier;
-        enum nfs3_stable_how    committed;
-};
-
-struct nfs_writeres {
+struct nfs_pgio_res {
         struct nfs4_sequence_res        seq_res;
         struct nfs_fattr *      fattr;
-        struct nfs_writeverf *  verf;
         __u32                   count;
-        const struct nfs_server *server;
+        int                     eof;            /* used by read */
+        struct nfs_writeverf *  verf;           /* used by write */
+        const struct nfs_server *server;        /* used by write */
+
 };
 
 /*
@@ -1129,6 +1112,7 @@ struct pnfs_commit_bucket {
         struct list_head committing;
         struct pnfs_layout_segment *wlseg;
         struct pnfs_layout_segment *clseg;
+        struct nfs_writeverf direct_verf;
 };
 
 struct pnfs_ds_commit_info {
@@ -1264,20 +1248,6 @@ struct nfs_page_array {
         struct page             *page_array[NFS_PAGEVEC_SIZE];
 };
 
-struct nfs_read_data {
-        struct nfs_pgio_header  *header;
-        struct list_head        list;
-        struct rpc_task         task;
-        struct nfs_fattr        fattr;  /* fattr storage */
-        struct nfs_readargs args;
-        struct nfs_readres  res;
-        unsigned long           timestamp;      /* For lease renewal */
-        int (*read_done_cb) (struct rpc_task *task, struct nfs_read_data *data);
-        __u64                   mds_offset;
-        struct nfs_page_array   pages;
-        struct nfs_client       *ds_clp;        /* pNFS data server */
-};
-
 /* used as flag bits in nfs_pgio_header */
 enum {
         NFS_IOHDR_ERROR = 0,
@@ -1287,19 +1257,22 @@ enum {
         NFS_IOHDR_NEED_RESCHED,
 };
 
+struct nfs_pgio_data;
+
 struct nfs_pgio_header {
         struct inode            *inode;
         struct rpc_cred         *cred;
         struct list_head        pages;
-        struct list_head        rpc_list;
+        struct nfs_pgio_data    *data;
         atomic_t                refcnt;
         struct nfs_page         *req;
-        struct nfs_writeverf    *verf;
+        struct nfs_writeverf    verf;           /* Used for writes */
         struct pnfs_layout_segment *lseg;
         loff_t                  io_start;
         const struct rpc_call_ops *mds_ops;
         void (*release) (struct nfs_pgio_header *hdr);
         const struct nfs_pgio_completion_ops *completion_ops;
+        const struct nfs_rw_ops *rw_ops;
         struct nfs_direct_req   *dreq;
         void                    *layout_private;
         spinlock_t              lock;
@@ -1310,30 +1283,24 @@ struct nfs_pgio_header {
         unsigned long           flags;
 };
 
-struct nfs_read_header {
-        struct nfs_pgio_header  header;
-        struct nfs_read_data    rpc_data;
-};
-
-struct nfs_write_data {
+struct nfs_pgio_data {
         struct nfs_pgio_header  *header;
-        struct list_head        list;
         struct rpc_task         task;
         struct nfs_fattr        fattr;
-        struct nfs_writeverf    verf;
-        struct nfs_writeargs    args;           /* argument struct */
-        struct nfs_writeres     res;            /* result struct */
+        struct nfs_writeverf    verf;           /* Used for writes */
+        struct nfs_pgio_args    args;           /* argument struct */
+        struct nfs_pgio_res     res;            /* result struct */
         unsigned long           timestamp;      /* For lease renewal */
-        int (*write_done_cb) (struct rpc_task *task, struct nfs_write_data *data);
+        int (*pgio_done_cb) (struct rpc_task *task, struct nfs_pgio_data *data);
         __u64                   mds_offset;     /* Filelayout dense stripe */
         struct nfs_page_array   pages;
         struct nfs_client       *ds_clp;        /* pNFS data server */
+        int                     ds_idx;         /* ds index if ds_clp is set */
 };
 
-struct nfs_write_header {
+struct nfs_rw_header {
         struct nfs_pgio_header  header;
-        struct nfs_write_data   rpc_data;
-        struct nfs_writeverf    verf;
+        struct nfs_pgio_data    rpc_data;
 };
 
 struct nfs_mds_commit_info {
@@ -1465,16 +1432,11 @@ struct nfs_rpc_ops {
                              struct nfs_pathconf *);
         int     (*set_capabilities)(struct nfs_server *, struct nfs_fh *);
         int     (*decode_dirent)(struct xdr_stream *, struct nfs_entry *, int);
-        void    (*read_setup)   (struct nfs_read_data *, struct rpc_message *);
-        void    (*read_pageio_init)(struct nfs_pageio_descriptor *, struct inode *,
-                                    const struct nfs_pgio_completion_ops *);
-        int     (*read_rpc_prepare)(struct rpc_task *, struct nfs_read_data *);
-        int     (*read_done)  (struct rpc_task *, struct nfs_read_data *);
-        void    (*write_setup)  (struct nfs_write_data *, struct rpc_message *);
-        void    (*write_pageio_init)(struct nfs_pageio_descriptor *, struct inode *, int,
-                                     const struct nfs_pgio_completion_ops *);
-        int     (*write_rpc_prepare)(struct rpc_task *, struct nfs_write_data *);
-        int     (*write_done)  (struct rpc_task *, struct nfs_write_data *);
+        int     (*pgio_rpc_prepare)(struct rpc_task *, struct nfs_pgio_data *);
+        void    (*read_setup)   (struct nfs_pgio_data *, struct rpc_message *);
+        int     (*read_done)  (struct rpc_task *, struct nfs_pgio_data *);
+        void    (*write_setup)  (struct nfs_pgio_data *, struct rpc_message *);
+        int     (*write_done)  (struct rpc_task *, struct nfs_pgio_data *);
         void    (*commit_setup) (struct nfs_commit_data *, struct rpc_message *);
         void    (*commit_rpc_prepare)(struct rpc_task *, struct nfs_commit_data *);
         int     (*commit_done) (struct rpc_task *, struct nfs_commit_data *);
diff --git a/include/linux/nfsd/debug.h b/include/linux/nfsd/debug.h
deleted file mode 100644
index 19ef8375b577..000000000000
--- a/include/linux/nfsd/debug.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * linux/include/linux/nfsd/debug.h
- *
- * Debugging-related stuff for nfsd
- *
- * Copyright (C) 1995 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef LINUX_NFSD_DEBUG_H
-#define LINUX_NFSD_DEBUG_H
-
-#include <uapi/linux/nfsd/debug.h>
-
-# undef ifdebug
-# ifdef NFSD_DEBUG
-#  define ifdebug(flag)         if (nfsd_debug & NFSDDBG_##flag)
-# else
-#  define ifdebug(flag)         if (0)
-# endif
-#endif /* LINUX_NFSD_DEBUG_H */
diff --git a/include/linux/nfsd/export.h b/include/linux/nfsd/export.h
deleted file mode 100644
index 7898c997dfea..000000000000
--- a/include/linux/nfsd/export.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * include/linux/nfsd/export.h
- * 
- * Public declarations for NFS exports. The definitions for the
- * syscall interface are in nfsctl.h
- *
- * Copyright (C) 1995-1997 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef NFSD_EXPORT_H
-#define NFSD_EXPORT_H
-
-# include <linux/nfsd/nfsfh.h>
-#include <uapi/linux/nfsd/export.h>
-
-/*
- * FS Locations
- */
-
-#define MAX_FS_LOCATIONS        128
-
-struct nfsd4_fs_location {
-        char *hosts; /* colon separated list of hosts */
-        char *path;  /* slash separated list of path components */
-};
-
-struct nfsd4_fs_locations {
-        uint32_t locations_count;
-        struct nfsd4_fs_location *locations;
-/* If we're not actually serving this data ourselves (only providing a
- * list of replicas that do serve it) then we set "migrated": */
-        int migrated;
-};
-
-/*
- * We keep an array of pseudoflavors with the export, in order from most
- * to least preferred.  For the foreseeable future, we don't expect more
- * than the eight pseudoflavors null, unix, krb5, krb5i, krb5p, skpm3,
- * spkm3i, and spkm3p (and using all 8 at once should be rare).
- */
-#define MAX_SECINFO_LIST        8
-
-struct exp_flavor_info {
-        u32     pseudoflavor;
-        u32     flags;
-};
-
-struct svc_export {
-        struct cache_head       h;
-        struct auth_domain *    ex_client;
-        int                     ex_flags;
-        struct path             ex_path;
-        kuid_t                  ex_anon_uid;
-        kgid_t                  ex_anon_gid;
-        int                     ex_fsid;
-        unsigned char *         ex_uuid; /* 16 byte fsid */
-        struct nfsd4_fs_locations ex_fslocs;
-        int                     ex_nflavors;
-        struct exp_flavor_info  ex_flavors[MAX_SECINFO_LIST];
-        struct cache_detail     *cd;
-};
-
-/* an "export key" (expkey) maps a filehandlefragement to an
- * svc_export for a given client.  There can be several per export,
- * for the different fsid types.
- */
-struct svc_expkey {
-        struct cache_head       h;
-
-        struct auth_domain *    ek_client;
-        int                     ek_fsidtype;
-        u32                     ek_fsid[6];
-
-        struct path             ek_path;
-};
-
-#define EX_ISSYNC(exp)          (!((exp)->ex_flags & NFSEXP_ASYNC))
-#define EX_NOHIDE(exp)          ((exp)->ex_flags & NFSEXP_NOHIDE)
-#define EX_WGATHER(exp)         ((exp)->ex_flags & NFSEXP_GATHERED_WRITES)
-
-int nfsexp_flags(struct svc_rqst *rqstp, struct svc_export *exp);
-__be32 check_nfsd_access(struct svc_export *exp, struct svc_rqst *rqstp);
-
-/*
- * Function declarations
- */
-int                     nfsd_export_init(struct net *);
-void                    nfsd_export_shutdown(struct net *);
-void                    nfsd_export_flush(struct net *);
-struct svc_export *     rqst_exp_get_by_name(struct svc_rqst *,
-                                             struct path *);
-struct svc_export *     rqst_exp_parent(struct svc_rqst *,
-                                        struct path *);
-struct svc_export *     rqst_find_fsidzero_export(struct svc_rqst *);
-int                     exp_rootfh(struct net *, struct auth_domain *,
-                                        char *path, struct knfsd_fh *, int maxsize);
-__be32                  exp_pseudoroot(struct svc_rqst *, struct svc_fh *);
-__be32                  nfserrno(int errno);
-
-static inline void exp_put(struct svc_export *exp)
-{
-        cache_put(&exp->h, exp->cd);
-}
-
-static inline void exp_get(struct svc_export *exp)
-{
-        cache_get(&exp->h);
-}
-struct svc_export * rqst_exp_find(struct svc_rqst *, int, u32 *);
-
-#endif /* NFSD_EXPORT_H */
diff --git a/include/linux/nfsd/nfsfh.h b/include/linux/nfsd/nfsfh.h
deleted file mode 100644
index a93593f1fa4e..000000000000
--- a/include/linux/nfsd/nfsfh.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * include/linux/nfsd/nfsfh.h
- *
- * This file describes the layout of the file handles as passed
- * over the wire.
- *
- * Earlier versions of knfsd used to sign file handles using keyed MD5
- * or SHA. I've removed this code, because it doesn't give you more
- * security than blocking external access to port 2049 on your firewall.
- *
- * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef _LINUX_NFSD_FH_H
-#define _LINUX_NFSD_FH_H
-
-# include <linux/sunrpc/svc.h>
-#include <uapi/linux/nfsd/nfsfh.h>
-
-static inline __u32 ino_t_to_u32(ino_t ino)
-{
-        return (__u32) ino;
-}
-
-static inline ino_t u32_to_ino_t(__u32 uino)
-{
-        return (ino_t) uino;
-}
-
-/*
- * This is the internal representation of an NFS handle used in knfsd.
- * pre_mtime/post_version will be used to support wcc_attr's in NFSv3.
- */
-typedef struct svc_fh {
-        struct knfsd_fh         fh_handle;      /* FH data */
-        struct dentry *         fh_dentry;      /* validated dentry */
-        struct svc_export *     fh_export;      /* export pointer */
-        int                     fh_maxsize;     /* max size for fh_handle */
-
-        unsigned char           fh_locked;      /* inode locked by us */
-        unsigned char           fh_want_write;  /* remount protection taken */
-
-#ifdef CONFIG_NFSD_V3
-        unsigned char           fh_post_saved;  /* post-op attrs saved */
-        unsigned char           fh_pre_saved;   /* pre-op attrs saved */
-
-        /* Pre-op attributes saved during fh_lock */
-        __u64                   fh_pre_size;    /* size before operation */
-        struct timespec         fh_pre_mtime;   /* mtime before oper */
-        struct timespec         fh_pre_ctime;   /* ctime before oper */
-        /*
-         * pre-op nfsv4 change attr: note must check IS_I_VERSION(inode)
-         *  to find out if it is valid.
-         */
-        u64                     fh_pre_change;
-
-        /* Post-op attributes saved in fh_unlock */
-        struct kstat            fh_post_attr;   /* full attrs after operation */
-        u64                     fh_post_change; /* nfsv4 change; see above */
-#endif /* CONFIG_NFSD_V3 */
-
-} svc_fh;
-
-#endif /* _LINUX_NFSD_FH_H */
diff --git a/include/linux/nfsd/stats.h b/include/linux/nfsd/stats.h
deleted file mode 100644
index e75b2544ff12..000000000000
--- a/include/linux/nfsd/stats.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * linux/include/linux/nfsd/stats.h
- *
- * Statistics for NFS server.
- *
- * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
- */
-#ifndef LINUX_NFSD_STATS_H
-#define LINUX_NFSD_STATS_H
-
-#include <uapi/linux/nfsd/stats.h>
-
-
-struct nfsd_stats {
-        unsigned int    rchits;         /* repcache hits */
-        unsigned int    rcmisses;       /* repcache hits */
-        unsigned int    rcnocache;      /* uncached reqs */
-        unsigned int    fh_stale;       /* FH stale error */
-        unsigned int    fh_lookup;      /* dentry cached */
-        unsigned int    fh_anon;        /* anon file dentry returned */
-        unsigned int    fh_nocache_dir; /* filehandle not found in dcache */
-        unsigned int    fh_nocache_nondir;      /* filehandle not found in dcache */
-        unsigned int    io_read;        /* bytes returned to read requests */
-        unsigned int    io_write;       /* bytes passed in write requests */
-        unsigned int    th_cnt;         /* number of available threads */
-        unsigned int    th_usage[10];   /* number of ticks during which n perdeciles
-                                         * of available threads were in use */
-        unsigned int    th_fullcnt;     /* number of times last free thread was used */
-        unsigned int    ra_size;        /* size of ra cache */
-        unsigned int    ra_depth[11];   /* number of times ra entry was found that deep
-                                         * in the cache (10percentiles). [10] = not found */
-#ifdef CONFIG_NFSD_V4
-        unsigned int    nfs4_opcount[LAST_NFS4_OP + 1]; /* count of individual nfsv4 operations */
-#endif
-
-};
-
-
-extern struct nfsd_stats        nfsdstats;
-extern struct svc_stat          nfsd_svcstats;
-
-void    nfsd_stat_init(void);
-void    nfsd_stat_shutdown(void);
-
-#endif /* LINUX_NFSD_STATS_H */
diff --git a/include/linux/of.h b/include/linux/of.h
index fa362867b453..196b34c1ef4e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -764,4 +764,26 @@ static inline int of_get_available_child_count(const struct device_node *np)
         return num;
 }
 
+#ifdef CONFIG_OF
+#define _OF_DECLARE(table, name, compat, fn, fn_type)                   \
+        static const struct of_device_id __of_table_##name              \
+                __used __section(__##table##_of_table)                  \
+                 = { .compatible = compat,                              \
+                     .data = (fn == (fn_type)NULL) ? fn : fn  }
+#else
+#define _OF_DECLARE(table, name, compat, fn, fn_type)                                   \
+        static const struct of_device_id __of_table_##name              \
+                __attribute__((unused))                                 \
+                 = { .compatible = compat,                              \
+                     .data = (fn == (fn_type)NULL) ? fn : fn }
+#endif
+
+typedef int (*of_init_fn_2)(struct device_node *, struct device_node *);
+typedef void (*of_init_fn_1)(struct device_node *);
+
+#define OF_DECLARE_1(table, name, compat, fn) \
+                _OF_DECLARE(table, name, compat, fn, of_init_fn_1)
+#define OF_DECLARE_2(table, name, compat, fn) \
+                _OF_DECLARE(table, name, compat, fn, of_init_fn_2)
+
 #endif /* _LINUX_OF_H */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 5f6ed6b182b8..c13b8782a4eb 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -40,7 +40,6 @@ extern u64 of_translate_dma_address(struct device_node *dev,
 
 #ifdef CONFIG_OF_ADDRESS
 extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
-extern bool of_can_translate_address(struct device_node *dev);
 extern int of_address_to_resource(struct device_node *dev, int index,
                                   struct resource *r);
 extern struct device_node *of_find_matching_node_by_address(
@@ -63,6 +62,9 @@ extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
 extern struct of_pci_range *of_pci_range_parser_one(
                                         struct of_pci_range_parser *parser,
                                         struct of_pci_range *range);
+extern int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+                                u64 *paddr, u64 *size);
+extern bool of_dma_is_coherent(struct device_node *np);
 #else /* CONFIG_OF_ADDRESS */
 static inline struct device_node *of_find_matching_node_by_address(
                                         struct device_node *from,
@@ -90,6 +92,17 @@ static inline struct of_pci_range *of_pci_range_parser_one(
 {
         return NULL;
 }
+
+static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+                                u64 *paddr, u64 *size)
+{
+        return -ENODEV;
+}
+
+static inline bool of_dma_is_coherent(struct device_node *np)
+{
+        return false;
+}
 #endif /* CONFIG_OF_ADDRESS */
 
 #ifdef CONFIG_OF
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index ddd7219af8ac..05117899fcb4 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -17,60 +17,23 @@
 
 /* Definitions used by the flattened device tree */
 #define OF_DT_HEADER            0xd00dfeed      /* marker */
-#define OF_DT_BEGIN_NODE        0x1             /* Start of node, full name */
-#define OF_DT_END_NODE          0x2             /* End node */
-#define OF_DT_PROP              0x3             /* Property: name off, size,
-                                                 * content */
-#define OF_DT_NOP               0x4             /* nop */
-#define OF_DT_END               0x9
-
-#define OF_DT_VERSION           0x10
 
 #ifndef __ASSEMBLY__
-/*
- * This is what gets passed to the kernel by prom_init or kexec
- *
- * The dt struct contains the device tree structure, full pathes and
- * property contents. The dt strings contain a separate block with just
- * the strings for the property names, and is fully page aligned and
- * self contained in a page, so that it can be kept around by the kernel,
- * each property name appears only once in this page (cheap compression)
- *
- * the mem_rsvmap contains a map of reserved ranges of physical memory,
- * passing it here instead of in the device-tree itself greatly simplifies
- * the job of everybody. It's just a list of u64 pairs (base/size) that
- * ends when size is 0
- */
-struct boot_param_header {
-        __be32  magic;                  /* magic word OF_DT_HEADER */
-        __be32  totalsize;              /* total size of DT block */
-        __be32  off_dt_struct;          /* offset to structure */
-        __be32  off_dt_strings;         /* offset to strings */
-        __be32  off_mem_rsvmap;         /* offset to memory reserve map */
-        __be32  version;                /* format version */
-        __be32  last_comp_version;      /* last compatible version */
-        /* version 2 fields below */
-        __be32  boot_cpuid_phys;        /* Physical CPU id we're booting on */
-        /* version 3 fields below */
-        __be32  dt_strings_size;        /* size of the DT strings block */
-        /* version 17 fields below */
-        __be32  dt_struct_size;         /* size of the DT structure block */
-};
 
 #if defined(CONFIG_OF_FLATTREE)
 
 struct device_node;
 
 /* For scanning an arbitrary device-tree at any time */
-extern char *of_fdt_get_string(struct boot_param_header *blob, u32 offset);
-extern void *of_fdt_get_property(struct boot_param_header *blob,
+extern char *of_fdt_get_string(const void *blob, u32 offset);
+extern void *of_fdt_get_property(const void *blob,
                                  unsigned long node,
                                  const char *name,
-                                 unsigned long *size);
-extern int of_fdt_is_compatible(struct boot_param_header *blob,
+                                 int *size);
+extern int of_fdt_is_compatible(const void *blob,
                                 unsigned long node,
                                 const char *compat);
-extern int of_fdt_match(struct boot_param_header *blob, unsigned long node,
+extern int of_fdt_match(const void *blob, unsigned long node,
                         const char *const *compat);
 extern void of_fdt_unflatten_tree(unsigned long *blob,
                                struct device_node **mynodes);
@@ -78,21 +41,21 @@ extern void of_fdt_unflatten_tree(unsigned long *blob,
 /* TBD: Temporary export of fdt globals - remove when code fully merged */
 extern int __initdata dt_root_addr_cells;
 extern int __initdata dt_root_size_cells;
-extern struct boot_param_header *initial_boot_params;
+extern void *initial_boot_params;
+
+extern char __dtb_start[];
+extern char __dtb_end[];
 
 /* For scanning the flat device-tree at boot time */
-extern char *find_flat_dt_string(u32 offset);
 extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
                                      int depth, void *data),
                            void *data);
-extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
-                                 unsigned long *size);
+extern const void *of_get_flat_dt_prop(unsigned long node, const char *name,
+                                       int *size);
 extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
 extern int of_flat_dt_match(unsigned long node, const char *const *matches);
 extern unsigned long of_get_flat_dt_root(void);
-extern int of_scan_flat_dt_by_path(const char *path,
-        int (*it)(unsigned long node, const char *name, int depth, void *data),
-        void *data);
+extern int of_get_flat_dt_size(void);
 
 extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
                                      int depth, void *data);
@@ -103,7 +66,7 @@ extern void early_init_dt_add_memory_arch(u64 base, u64 size);
 extern int early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
                                              bool no_map);
 extern void * early_init_dt_alloc_memory_arch(u64 size, u64 align);
-extern u64 dt_mem_next_cell(int s, __be32 **cellp);
+extern u64 dt_mem_next_cell(int s, const __be32 **cellp);
 
 /* Early flat tree scan hooks */
 extern int early_init_dt_scan_root(unsigned long node, const char *uname,
@@ -120,6 +83,7 @@ extern void unflatten_device_tree(void);
 extern void unflatten_and_copy_device_tree(void);
 extern void early_init_devtree(void *);
 extern void early_get_first_memblock_info(void *, phys_addr_t *);
+extern u64 fdt_translate_address(const void *blob, int node_offset);
 #else /* CONFIG_OF_FLATTREE */
 static inline void early_init_fdt_scan_reserved_mem(void) {}
 static inline const char *of_flat_dt_get_machine_name(void) { return NULL; }
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 6404253d810d..bfec136a6d1e 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -45,6 +45,7 @@ extern void of_irq_init(const struct of_device_id *matches);
 #ifdef CONFIG_OF_IRQ
 extern int of_irq_count(struct device_node *dev);
 extern int of_irq_get(struct device_node *dev, int index);
+extern int of_irq_get_byname(struct device_node *dev, const char *name);
 #else
 static inline int of_irq_count(struct device_node *dev)
 {
@@ -54,6 +55,10 @@ static inline int of_irq_get(struct device_node *dev, int index)
 {
         return 0;
 }
+static inline int of_irq_get_byname(struct device_node *dev, const char *name)
+{
+        return 0;
+}
 #endif
 
 #if defined(CONFIG_OF)
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index 1a1f5ffd5288..dde3a4a0fa5d 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -6,14 +6,44 @@
 
 struct pci_dev;
 struct of_phandle_args;
-int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
-int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
-
 struct device_node;
+
+#ifdef CONFIG_OF
+int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
 struct device_node *of_pci_find_child_device(struct device_node *parent,
                                              unsigned int devfn);
 int of_pci_get_devfn(struct device_node *np);
+int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
 int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
+#else
+static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
+{
+        return 0;
+}
+
+static inline struct device_node *of_pci_find_child_device(struct device_node *parent,
+                                             unsigned int devfn)
+{
+        return NULL;
+}
+
+static inline int of_pci_get_devfn(struct device_node *np)
+{
+        return -EINVAL;
+}
+
+static inline int
+of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return 0;
+}
+
+static inline int
+of_pci_parse_bus_range(struct device_node *node, struct resource *res)
+{
+        return -EINVAL;
+}
+#endif
 
 #if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
 int of_pci_msi_chip_add(struct msi_chip *chip);
diff --git a/include/linux/of_reserved_mem.h b/include/linux/of_reserved_mem.h
index 9b1fbb7f29fc..4669ddfdd5af 100644
--- a/include/linux/of_reserved_mem.h
+++ b/include/linux/of_reserved_mem.h
@@ -21,33 +21,19 @@ struct reserved_mem_ops {
                                   struct device *dev);
 };
 
-typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem,
-                                      unsigned long node, const char *uname);
+typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem);
+
+#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
+        _OF_DECLARE(reservedmem, name, compat, init, reservedmem_of_init_fn)
 
 #ifdef CONFIG_OF_RESERVED_MEM
 void fdt_init_reserved_mem(void);
 void fdt_reserved_mem_save_node(unsigned long node, const char *uname,
                                phys_addr_t base, phys_addr_t size);
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
-        static const struct of_device_id __reservedmem_of_table_##name  \
-                __used __section(__reservedmem_of_table)                \
-                 = { .compatible = compat,                              \
-                     .data = (init == (reservedmem_of_init_fn)NULL) ?   \
-                                init : init }
-
 #else
 static inline void fdt_init_reserved_mem(void) { }
 static inline void fdt_reserved_mem_save_node(unsigned long node,
                 const char *uname, phys_addr_t base, phys_addr_t size) { }
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
-        static const struct of_device_id __reservedmem_of_table_##name  \
-                __attribute__((unused))                                 \
-                 = { .compatible = compat,                              \
-                     .data = (init == (reservedmem_of_init_fn)NULL) ?   \
-                                init : init }
-
 #endif
 
 #endif /* __OF_RESERVED_MEM_H */
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 7944cdc27bed..88e6ea4a5d36 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -1,23 +1,6 @@
-/*
- * OMAP DMA Engine support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
 #ifndef __LINUX_OMAP_DMA_H
 #define __LINUX_OMAP_DMA_H
-
-struct dma_chan;
-
-#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
-bool omap_dma_filter_fn(struct dma_chan *, void *);
-#else
-static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
-{
-        return false;
-}
-#endif
+#include <linux/omap-dmaengine.h>
 
 /*
  *  Legacy OMAP DMA handling defines and functions
@@ -393,7 +376,7 @@ extern int omap_modify_dma_chain_params(int chain_id,
 extern int omap_dma_chain_status(int chain_id);
 #endif
 
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
+#if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP)
 #include <mach/lcd_dma.h>
 #else
 static inline int omap_lcd_dma_running(void)
diff --git a/include/linux/omap-dmaengine.h b/include/linux/omap-dmaengine.h
new file mode 100644
index 000000000000..8e6906c72e90
--- /dev/null
+++ b/include/linux/omap-dmaengine.h
@@ -0,0 +1,21 @@
+/*
+ * OMAP DMA Engine support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_OMAP_DMAENGINE_H
+#define __LINUX_OMAP_DMAENGINE_H
+
+struct dma_chan;
+
+#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
+bool omap_dma_filter_fn(struct dma_chan *, void *);
+#else
+static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
+{
+        return false;
+}
+#endif
+#endif /* __LINUX_OMAP_DMAENGINE_H */
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index d1fe1a761047..3c545b48aeab 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -198,6 +198,7 @@ struct page;	/* forward declaration */
 TESTPAGEFLAG(Locked, locked)
 PAGEFLAG(Error, error) TESTCLEARFLAG(Error, error)
 PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced)
+        __SETPAGEFLAG(Referenced, referenced)
 PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty)
 PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru)
 PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active)
@@ -208,6 +209,7 @@ PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned)	/* Xen */
 PAGEFLAG(SavePinned, savepinned);                       /* Xen */
 PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved)
 PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
+        __SETPAGEFLAG(SwapBacked, swapbacked)
 
 __PAGEFLAG(SlobFree, slob_free)
 
@@ -317,13 +319,23 @@ CLEARPAGEFLAG(Uptodate, uptodate)
 extern void cancel_dirty_page(struct page *page, unsigned int account_size);
 
 int test_clear_page_writeback(struct page *page);
-int test_set_page_writeback(struct page *page);
+int __test_set_page_writeback(struct page *page, bool keep_write);
+
+#define test_set_page_writeback(page)                   \
+        __test_set_page_writeback(page, false)
+#define test_set_page_writeback_keepwrite(page) \
+        __test_set_page_writeback(page, true)
 
 static inline void set_page_writeback(struct page *page)
 {
         test_set_page_writeback(page);
 }
 
+static inline void set_page_writeback_keepwrite(struct page *page)
+{
+        test_set_page_writeback_keepwrite(page);
+}
+
 #ifdef CONFIG_PAGEFLAGS_EXTENDED
 /*
  * System with lots of page flags available. This allows separate
diff --git a/include/linux/pageblock-flags.h b/include/linux/pageblock-flags.h
index 2ee8cd2466b5..2baeee12f48e 100644
--- a/include/linux/pageblock-flags.h
+++ b/include/linux/pageblock-flags.h
@@ -30,9 +30,12 @@ enum pageblock_bits {
         PB_migrate,
         PB_migrate_end = PB_migrate + 3 - 1,
                         /* 3 bits required for migrate types */
-#ifdef CONFIG_COMPACTION
         PB_migrate_skip,/* If set the block is skipped by compaction */
-#endif /* CONFIG_COMPACTION */
+
+        /*
+         * Assume the bits will always align on a word. If this assumption
+         * changes then get/set pageblock needs updating.
+         */
         NR_PAGEBLOCK_BITS
 };
 
@@ -62,11 +65,26 @@ extern int pageblock_order;
 /* Forward declaration */
 struct page;
 
+unsigned long get_pfnblock_flags_mask(struct page *page,
+                                unsigned long pfn,
+                                unsigned long end_bitidx,
+                                unsigned long mask);
+
+void set_pfnblock_flags_mask(struct page *page,
+                                unsigned long flags,
+                                unsigned long pfn,
+                                unsigned long end_bitidx,
+                                unsigned long mask);
+
 /* Declarations for getting and setting flags. See mm/page_alloc.c */
-unsigned long get_pageblock_flags_group(struct page *page,
-                                        int start_bitidx, int end_bitidx);
-void set_pageblock_flags_group(struct page *page, unsigned long flags,
-                                        int start_bitidx, int end_bitidx);
+#define get_pageblock_flags_group(page, start_bitidx, end_bitidx) \
+        get_pfnblock_flags_mask(page, page_to_pfn(page),                \
+                        end_bitidx,                                     \
+                        (1 << (end_bitidx - start_bitidx + 1)) - 1)
+#define set_pageblock_flags_group(page, flags, start_bitidx, end_bitidx) \
+        set_pfnblock_flags_mask(page, flags, page_to_pfn(page),         \
+                        end_bitidx,                                     \
+                        (1 << (end_bitidx - start_bitidx + 1)) - 1)
 
 #ifdef CONFIG_COMPACTION
 #define get_pageblock_skip(page) \
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 45598f1e9aa3..0a97b583ee8d 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -110,7 +110,7 @@ static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask)
 
 #define page_cache_get(page)            get_page(page)
 #define page_cache_release(page)        put_page(page)
-void release_pages(struct page **pages, int nr, int cold);
+void release_pages(struct page **pages, int nr, bool cold);
 
 /*
  * speculatively take a reference to a page.
@@ -259,12 +259,109 @@ pgoff_t page_cache_next_hole(struct address_space *mapping,
 pgoff_t page_cache_prev_hole(struct address_space *mapping,
                              pgoff_t index, unsigned long max_scan);
 
+#define FGP_ACCESSED            0x00000001
+#define FGP_LOCK                0x00000002
+#define FGP_CREAT               0x00000004
+#define FGP_WRITE               0x00000008
+#define FGP_NOFS                0x00000010
+#define FGP_NOWAIT              0x00000020
+
+struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset,
+                int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask);
+
+/**
+ * find_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned with an increased refcount.
+ *
+ * Otherwise, %NULL is returned.
+ */
+static inline struct page *find_get_page(struct address_space *mapping,
+                                        pgoff_t offset)
+{
+        return pagecache_get_page(mapping, offset, 0, 0, 0);
+}
+
+static inline struct page *find_get_page_flags(struct address_space *mapping,
+                                        pgoff_t offset, int fgp_flags)
+{
+        return pagecache_get_page(mapping, offset, fgp_flags, 0, 0);
+}
+
+/**
+ * find_lock_page - locate, pin and lock a pagecache page
+ * pagecache_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * Otherwise, %NULL is returned.
+ *
+ * find_lock_page() may sleep.
+ */
+static inline struct page *find_lock_page(struct address_space *mapping,
+                                        pgoff_t offset)
+{
+        return pagecache_get_page(mapping, offset, FGP_LOCK, 0, 0);
+}
+
+/**
+ * find_or_create_page - locate or add a pagecache page
+ * @mapping: the page's address_space
+ * @index: the page's index into the mapping
+ * @gfp_mask: page allocation mode
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * If the page is not present, a new page is allocated using @gfp_mask
+ * and added to the page cache and the VM's LRU list.  The page is
+ * returned locked and with an increased refcount.
+ *
+ * On memory exhaustion, %NULL is returned.
+ *
+ * find_or_create_page() may sleep, even if @gfp_flags specifies an
+ * atomic allocation!
+ */
+static inline struct page *find_or_create_page(struct address_space *mapping,
+                                        pgoff_t offset, gfp_t gfp_mask)
+{
+        return pagecache_get_page(mapping, offset,
+                                        FGP_LOCK|FGP_ACCESSED|FGP_CREAT,
+                                        gfp_mask, gfp_mask & GFP_RECLAIM_MASK);
+}
+
+/**
+ * grab_cache_page_nowait - returns locked page at given index in given cache
+ * @mapping: target address_space
+ * @index: the page index
+ *
+ * Same as grab_cache_page(), but do not wait if the page is unavailable.
+ * This is intended for speculative data generators, where the data can
+ * be regenerated if the page couldn't be grabbed.  This routine should
+ * be safe to call while holding the lock for another page.
+ *
+ * Clear __GFP_FS when allocating the page to avoid recursion into the fs
+ * and deadlock against the caller's locked page.
+ */
+static inline struct page *grab_cache_page_nowait(struct address_space *mapping,
+                                pgoff_t index)
+{
+        return pagecache_get_page(mapping, index,
+                        FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT,
+                        mapping_gfp_mask(mapping),
+                        GFP_NOFS);
+}
+
 struct page *find_get_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_get_page(struct address_space *mapping, pgoff_t offset);
 struct page *find_lock_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_lock_page(struct address_space *mapping, pgoff_t offset);
-struct page *find_or_create_page(struct address_space *mapping, pgoff_t index,
-                                 gfp_t gfp_mask);
 unsigned find_get_entries(struct address_space *mapping, pgoff_t start,
                           unsigned int nr_entries, struct page **entries,
                           pgoff_t *indices);
@@ -287,8 +384,6 @@ static inline struct page *grab_cache_page(struct address_space *mapping,
         return find_or_create_page(mapping, index, mapping_gfp_mask(mapping));
 }
 
-extern struct page * grab_cache_page_nowait(struct address_space *mapping,
-                                pgoff_t index);
 extern struct page * read_cache_page(struct address_space *mapping,
                                 pgoff_t index, filler_t *filler, void *data);
 extern struct page * read_cache_page_gfp(struct address_space *mapping,
@@ -425,6 +520,8 @@ static inline void wait_on_page_writeback(struct page *page)
 extern void end_page_writeback(struct page *page);
 void wait_for_stable_page(struct page *page);
 
+void page_endio(struct page *page, int rw, int err);
+
 /*
  * Add an arbitrary waiter to a page's wait queue
  */
diff --git a/include/linux/percpu-refcount.h b/include/linux/percpu-refcount.h
index 95961f0bf62d..5d8920e23073 100644
--- a/include/linux/percpu-refcount.h
+++ b/include/linux/percpu-refcount.h
@@ -110,7 +110,7 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
         pcpu_count = ACCESS_ONCE(ref->pcpu_count);
 
         if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR))
-                __this_cpu_inc(*pcpu_count);
+                this_cpu_inc(*pcpu_count);
         else
                 atomic_inc(&ref->count);
 
@@ -121,6 +121,36 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
  * percpu_ref_tryget - try to increment a percpu refcount
  * @ref: percpu_ref to try-get
  *
+ * Increment a percpu refcount unless its count already reached zero.
+ * Returns %true on success; %false on failure.
+ *
+ * The caller is responsible for ensuring that @ref stays accessible.
+ */
+static inline bool percpu_ref_tryget(struct percpu_ref *ref)
+{
+        unsigned __percpu *pcpu_count;
+        int ret = false;
+
+        rcu_read_lock_sched();
+
+        pcpu_count = ACCESS_ONCE(ref->pcpu_count);
+
+        if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR)) {
+                this_cpu_inc(*pcpu_count);
+                ret = true;
+        } else {
+                ret = atomic_inc_not_zero(&ref->count);
+        }
+
+        rcu_read_unlock_sched();
+
+        return ret;
+}
+
+/**
+ * percpu_ref_tryget_live - try to increment a live percpu refcount
+ * @ref: percpu_ref to try-get
+ *
  * Increment a percpu refcount unless it has already been killed.  Returns
  * %true on success; %false on failure.
  *
@@ -128,8 +158,10 @@ static inline void percpu_ref_get(struct percpu_ref *ref)
  * will fail.  For such guarantee, percpu_ref_kill_and_confirm() should be
  * used.  After the confirm_kill callback is invoked, it's guaranteed that
  * no new reference will be given out by percpu_ref_tryget().
+ *
+ * The caller is responsible for ensuring that @ref stays accessible.
  */
-static inline bool percpu_ref_tryget(struct percpu_ref *ref)
+static inline bool percpu_ref_tryget_live(struct percpu_ref *ref)
 {
         unsigned __percpu *pcpu_count;
         int ret = false;
@@ -139,7 +171,7 @@ static inline bool percpu_ref_tryget(struct percpu_ref *ref)
         pcpu_count = ACCESS_ONCE(ref->pcpu_count);
 
         if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR)) {
-                __this_cpu_inc(*pcpu_count);
+                this_cpu_inc(*pcpu_count);
                 ret = true;
         }
 
@@ -164,7 +196,7 @@ static inline void percpu_ref_put(struct percpu_ref *ref)
         pcpu_count = ACCESS_ONCE(ref->pcpu_count);
 
         if (likely(REF_STATUS(pcpu_count) == PCPU_REF_PTR))
-                __this_cpu_dec(*pcpu_count);
+                this_cpu_dec(*pcpu_count);
         else if (unlikely(atomic_dec_and_test(&ref->count)))
                 ref->release(ref);
 
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 495c6543a8f2..8419053d0f2e 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -29,7 +29,7 @@
  */
 #define get_cpu_var(var) (*({                           \
         preempt_disable();                              \
-        &__get_cpu_var(var); }))
+        this_cpu_ptr(&var); }))
 
 /*
  * The weird & is necessary because sparse considers (void)(var) to be
diff --git a/include/linux/platform_data/adau17x1.h b/include/linux/platform_data/adau17x1.h
new file mode 100644
index 000000000000..a81766cae230
--- /dev/null
+++ b/include/linux/platform_data/adau17x1.h
@@ -0,0 +1,109 @@
+/*
+ * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961/ADAU1781/ADAU1781 codecs
+ *
+ * Copyright 2011-2014 Analog Devices Inc.
+ * Author: Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __LINUX_PLATFORM_DATA_ADAU17X1_H__
+#define __LINUX_PLATFORM_DATA_ADAU17X1_H__
+
+/**
+ * enum adau17x1_micbias_voltage - Microphone bias voltage
+ * @ADAU17X1_MICBIAS_0_90_AVDD: 0.9 * AVDD
+ * @ADAU17X1_MICBIAS_0_65_AVDD: 0.65 * AVDD
+ */
+enum adau17x1_micbias_voltage {
+        ADAU17X1_MICBIAS_0_90_AVDD = 0,
+        ADAU17X1_MICBIAS_0_65_AVDD = 1,
+};
+
+/**
+ * enum adau1761_digmic_jackdet_pin_mode - Configuration of the JACKDET/MICIN pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: Disable the pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: Configure the pin for usage as
+ *   digital microphone input.
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: Configure the pin for jack
+ *  insertion detection.
+ */
+enum adau1761_digmic_jackdet_pin_mode {
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE,
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC,
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT,
+};
+
+/**
+ * adau1761_jackdetect_debounce_time - Jack insertion detection debounce time
+ * @ADAU1761_JACKDETECT_DEBOUNCE_5MS: 5 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_10MS: 10 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_20MS: 20 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_40MS: 40 milliseconds
+ */
+enum adau1761_jackdetect_debounce_time {
+        ADAU1761_JACKDETECT_DEBOUNCE_5MS = 0,
+        ADAU1761_JACKDETECT_DEBOUNCE_10MS = 1,
+        ADAU1761_JACKDETECT_DEBOUNCE_20MS = 2,
+        ADAU1761_JACKDETECT_DEBOUNCE_40MS = 3,
+};
+
+/**
+ * enum adau1761_output_mode - Output mode configuration
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE: Headphone output
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: Capless headphone output
+ * @ADAU1761_OUTPUT_MODE_LINE: Line output
+ */
+enum adau1761_output_mode {
+        ADAU1761_OUTPUT_MODE_HEADPHONE,
+        ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
+        ADAU1761_OUTPUT_MODE_LINE,
+};
+
+/**
+ * struct adau1761_platform_data - ADAU1761 Codec driver platform data
+ * @input_differential: If true the input pins will be configured in
+ *  differential mode.
+ * @lineout_mode: Output mode for the LOUT/ROUT pins
+ * @headphone_mode: Output mode for the LHP/RHP pins
+ * @digmic_jackdetect_pin_mode: JACKDET/MICIN pin configuration
+ * @jackdetect_debounce_time: Jack insertion detection debounce time.
+ *  Note: This value will only be used, if the JACKDET/MICIN pin is configured
+ *  for jack insertion detection.
+ * @jackdetect_active_low: If true the jack insertion detection is active low.
+ *  Othwise it will be active high.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1761_platform_data {
+        bool input_differential;
+        enum adau1761_output_mode lineout_mode;
+        enum adau1761_output_mode headphone_mode;
+
+        enum adau1761_digmic_jackdet_pin_mode digmic_jackdetect_pin_mode;
+
+        enum adau1761_jackdetect_debounce_time jackdetect_debounce_time;
+        bool jackdetect_active_low;
+
+        enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+/**
+ * struct adau1781_platform_data - ADAU1781 Codec driver platform data
+ * @left_input_differential: If true configure the left input as
+ * differential input.
+ * @right_input_differential: If true configure the right input as differntial
+ *  input.
+ * @use_dmic: If true configure the MIC pins as digital microphone pins instead
+ *  of analog microphone pins.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1781_platform_data {
+        bool left_input_differential;
+        bool right_input_differential;
+
+        bool use_dmic;
+
+        enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+#endif
diff --git a/include/linux/platform_data/elm.h b/include/linux/platform_data/elm.h
index 4edb40676b3f..780d1e97f620 100644
--- a/include/linux/platform_data/elm.h
+++ b/include/linux/platform_data/elm.h
@@ -21,6 +21,7 @@
 enum bch_ecc {
         BCH4_ECC = 0,
         BCH8_ECC,
+        BCH16_ECC,
 };
 
 /* ELM support 8 error syndrome process */
@@ -38,7 +39,7 @@ struct elm_errorvec {
         bool error_reported;
         bool error_uncorrectable;
         int error_count;
-        int error_loc[ERROR_VECTOR_MAX];
+        int error_loc[16];
 };
 
 void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
diff --git a/include/linux/platform_data/intel-mid_wdt.h b/include/linux/platform_data/intel-mid_wdt.h
new file mode 100644
index 000000000000..b98253466ace
--- /dev/null
+++ b/include/linux/platform_data/intel-mid_wdt.h
@@ -0,0 +1,22 @@
+/*
+ *      intel-mid_wdt: generic Intel MID SCU watchdog driver
+ *
+ *      Copyright (C) 2014 Intel Corporation. All rights reserved.
+ *      Contact: David Cohen <david.a.cohen@linux.intel.com>
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of version 2 of the GNU General
+ *      Public License as published by the Free Software Foundation.
+ */
+
+#ifndef __INTEL_MID_WDT_H__
+#define __INTEL_MID_WDT_H__
+
+#include <linux/platform_device.h>
+
+struct intel_mid_wdt_pdata {
+        int irq;
+        int (*probe)(struct platform_device *pdev);
+};
+
+#endif /*__INTEL_MID_WDT_H__*/
diff --git a/include/linux/platform_data/ipmmu-vmsa.h b/include/linux/platform_data/ipmmu-vmsa.h
new file mode 100644
index 000000000000..5275b3ac6d37
--- /dev/null
+++ b/include/linux/platform_data/ipmmu-vmsa.h
@@ -0,0 +1,24 @@
+/*
+ * IPMMU VMSA Platform Data
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __IPMMU_VMSA_H__
+#define __IPMMU_VMSA_H__
+
+struct ipmmu_vmsa_master {
+        const char *name;
+        unsigned int utlb;
+};
+
+struct ipmmu_vmsa_platform_data {
+        const struct ipmmu_vmsa_master *masters;
+        unsigned int num_masters;
+};
+
+#endif /* __IPMMU_VMSA_H__ */
diff --git a/include/linux/platform_data/leds-pca9685.h b/include/linux/platform_data/leds-pca9685.h
deleted file mode 100644
index 778e9e4249cc..000000000000
--- a/include/linux/platform_data/leds-pca9685.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright 2013 Maximilian Güntner <maximilian.guentner@gmail.com>
- *
- * This file is subject to the terms and conditions of version 2 of
- * the GNU General Public License.  See the file COPYING in the main
- * directory of this archive for more details.
- *
- * Based on leds-pca963x.h by Peter Meerwald <p.meerwald@bct-electronic.com>
- *
- * LED driver for the NXP PCA9685 PWM chip
- *
- */
-
-#ifndef __LINUX_PCA9685_H
-#define __LINUX_PCA9685_H
-
-#include <linux/leds.h>
-
-enum pca9685_outdrv {
-        PCA9685_OPEN_DRAIN,
-        PCA9685_TOTEM_POLE,
-};
-
-enum pca9685_inverted {
-        PCA9685_NOT_INVERTED,
-        PCA9685_INVERTED,
-};
-
-struct pca9685_platform_data {
-        struct led_platform_data leds;
-        enum pca9685_outdrv outdrv;
-        enum pca9685_inverted inverted;
-};
-
-#endif /* __LINUX_PCA9685_H */
diff --git a/include/linux/platform_data/mipi-csis.h b/include/linux/platform_data/mipi-csis.h
deleted file mode 100644
index c2fd9024717c..000000000000
--- a/include/linux/platform_data/mipi-csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
- *
- * Samsung S5P/Exynos SoC series MIPI CSIS device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_
-#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
- * @clk_rate:    bus clock frequency
- * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM
- * @lanes:       number of data lanes used
- * @hs_settle:   HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
-        unsigned long clk_rate;
-        u8 wclk_source;
-        u8 lanes;
-        u8 hs_settle;
-};
-
-#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 3e9dd6676b97..660c029d694f 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -31,6 +31,8 @@ enum omap_ecc {
         OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
         /* 8-bit  ECC calculation by GPMC, Error detection by ELM */
         OMAP_ECC_BCH8_CODE_HW,
+        /* 16-bit ECC calculation by GPMC, Error detection by ELM */
+        OMAP_ECC_BCH16_CODE_HW,
 };
 
 struct gpmc_nand_regs {
@@ -50,6 +52,9 @@ struct gpmc_nand_regs {
         void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
         void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
         void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
 };
 
 struct omap_nand_platform_data {
diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h
index a94147124929..ac4ea2e641c7 100644
--- a/include/linux/platform_data/mtd-nand-pxa3xx.h
+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
@@ -58,6 +58,9 @@ struct pxa3xx_nand_platform_data {
         /* use an flash-based bad block table */
         bool    flash_bbt;
 
+        /* requested ECC strength and ECC step size */
+        int ecc_strength, ecc_step_size;
+
         const struct mtd_partition              *parts[NUM_CHIP_SELECT];
         unsigned int                            nr_parts[NUM_CHIP_SELECT];
 
diff --git a/include/linux/platform_data/omap4-keypad.h b/include/linux/platform_data/omap4-keypad.h
deleted file mode 100644
index 4eef5fb05a17..000000000000
--- a/include/linux/platform_data/omap4-keypad.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __LINUX_INPUT_OMAP4_KEYPAD_H
-#define __LINUX_INPUT_OMAP4_KEYPAD_H
-
-#include <linux/input/matrix_keypad.h>
-
-struct omap4_keypad_platform_data {
-        const struct matrix_keymap_data *keymap_data;
-
-        u8 rows;
-        u8 cols;
-};
-
-#endif /* __LINUX_INPUT_OMAP4_KEYPAD_H */
diff --git a/include/linux/platform_data/pwm-renesas-tpu.h b/include/linux/platform_data/pwm-renesas-tpu.h
deleted file mode 100644
index a7220b10ddab..000000000000
--- a/include/linux/platform_data/pwm-renesas-tpu.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef __PWM_RENESAS_TPU_H__
-#define __PWM_RENESAS_TPU_H__
-
-#include <linux/pwm.h>
-
-#define TPU_CHANNEL_MAX         4
-
-struct tpu_pwm_channel_data {
-        enum pwm_polarity polarity;
-};
-
-struct tpu_pwm_platform_data {
-        struct tpu_pwm_channel_data channels[TPU_CHANNEL_MAX];
-};
-
-#endif /* __PWM_RENESAS_TPU_H__ */
diff --git a/include/linux/plist.h b/include/linux/plist.h
index aa0fb390bd29..8b6c970cff6c 100644
--- a/include/linux/plist.h
+++ b/include/linux/plist.h
@@ -98,6 +98,13 @@ struct plist_node {
 }
 
 /**
+ * PLIST_HEAD - declare and init plist_head
+ * @head:       name for struct plist_head variable
+ */
+#define PLIST_HEAD(head) \
+        struct plist_head head = PLIST_HEAD_INIT(head)
+
+/**
  * PLIST_NODE_INIT - static struct plist_node initializer
  * @node:       struct plist_node variable name
  * @__prio:     initial node priority
@@ -134,6 +141,8 @@ static inline void plist_node_init(struct plist_node *node, int prio)
 extern void plist_add(struct plist_node *node, struct plist_head *head);
 extern void plist_del(struct plist_node *node, struct plist_head *head);
 
+extern void plist_requeue(struct plist_node *node, struct plist_head *head);
+
 /**
  * plist_for_each - iterate over the plist
  * @pos:        the type * to use as a loop counter
@@ -143,6 +152,16 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
          list_for_each_entry(pos, &(head)->node_list, node_list)
 
 /**
+ * plist_for_each_continue - continue iteration over the plist
+ * @pos:        the type * to use as a loop cursor
+ * @head:       the head for your list
+ *
+ * Continue to iterate over plist, continuing after the current position.
+ */
+#define plist_for_each_continue(pos, head)      \
+         list_for_each_entry_continue(pos, &(head)->node_list, node_list)
+
+/**
  * plist_for_each_safe - iterate safely over a plist of given type
  * @pos:        the type * to use as a loop counter
  * @n:  another type * to use as temporary storage
@@ -163,6 +182,18 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
          list_for_each_entry(pos, &(head)->node_list, mem.node_list)
 
 /**
+ * plist_for_each_entry_continue - continue iteration over list of given type
+ * @pos:        the type * to use as a loop cursor
+ * @head:       the head for your list
+ * @m:          the name of the list_struct within the struct
+ *
+ * Continue to iterate over list of given type, continuing after
+ * the current position.
+ */
+#define plist_for_each_entry_continue(pos, head, m)     \
+        list_for_each_entry_continue(pos, &(head)->node_list, m.node_list)
+
+/**
  * plist_for_each_entry_safe - iterate safely over list of given type
  * @pos:        the type * to use as a loop counter
  * @n:          another type * to use as temporary storage
@@ -229,6 +260,20 @@ static inline int plist_node_empty(const struct plist_node *node)
 #endif
 
 /**
+ * plist_next - get the next entry in list
+ * @pos:        the type * to cursor
+ */
+#define plist_next(pos) \
+        list_next_entry(pos, node_list)
+
+/**
+ * plist_prev - get the prev entry in list
+ * @pos:        the type * to cursor
+ */
+#define plist_prev(pos) \
+        list_prev_entry(pos, node_list)
+
+/**
  * plist_first - return the first node (and thus, highest priority)
  * @head:       the &struct plist_head pointer
  *
diff --git a/include/linux/printk.h b/include/linux/printk.h
index 8752f7595b27..319ff7e53efb 100644
--- a/include/linux/printk.h
+++ b/include/linux/printk.h
@@ -30,6 +30,17 @@ static inline const char *printk_skip_level(const char *buffer)
         return buffer;
 }
 
+/* printk's without a loglevel use this.. */
+#define DEFAULT_MESSAGE_LOGLEVEL CONFIG_DEFAULT_MESSAGE_LOGLEVEL
+
+/* We show everything that is MORE important than this.. */
+#define CONSOLE_LOGLEVEL_SILENT  0 /* Mum's the word */
+#define CONSOLE_LOGLEVEL_MIN     1 /* Minimum loglevel we let people use */
+#define CONSOLE_LOGLEVEL_QUIET   4 /* Shhh ..., when booted with "quiet" */
+#define CONSOLE_LOGLEVEL_DEFAULT 7 /* anything MORE serious than KERN_DEBUG */
+#define CONSOLE_LOGLEVEL_DEBUG  10 /* issue debug messages */
+#define CONSOLE_LOGLEVEL_MOTORMOUTH 15  /* You can't shut this one up */
+
 extern int console_printk[];
 
 #define console_loglevel (console_printk[0])
@@ -39,13 +50,13 @@ extern int console_printk[];
 
 static inline void console_silent(void)
 {
-        console_loglevel = 0;
+        console_loglevel = CONSOLE_LOGLEVEL_SILENT;
 }
 
 static inline void console_verbose(void)
 {
         if (console_loglevel)
-                console_loglevel = 15;
+                console_loglevel = CONSOLE_LOGLEVEL_MOTORMOUTH;
 }
 
 struct va_format {
@@ -128,9 +139,9 @@ asmlinkage __printf(1, 2) __cold
 int printk(const char *fmt, ...);
 
 /*
- * Special printk facility for scheduler use only, _DO_NOT_USE_ !
+ * Special printk facility for scheduler/timekeeping use only, _DO_NOT_USE_ !
  */
-__printf(1, 2) __cold int printk_sched(const char *fmt, ...);
+__printf(1, 2) __cold int printk_deferred(const char *fmt, ...);
 
 /*
  * Please don't use printk_ratelimit(), because it shares ratelimiting state
@@ -165,7 +176,7 @@ int printk(const char *s, ...)
         return 0;
 }
 static inline __printf(1, 2) __cold
-int printk_sched(const char *s, ...)
+int printk_deferred(const char *s, ...)
 {
         return 0;
 }
@@ -210,6 +221,12 @@ extern asmlinkage void dump_stack(void) __cold;
 #define pr_fmt(fmt) fmt
 #endif
 
+/*
+ * These can be used to print at the various log levels.
+ * All of these will print unconditionally, although note that pr_debug()
+ * and other debug macros are compiled out unless either DEBUG is defined
+ * or CONFIG_DYNAMIC_DEBUG is set.
+ */
 #define pr_emerg(fmt, ...) \
         printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__)
 #define pr_alert(fmt, ...) \
@@ -266,9 +283,20 @@ extern asmlinkage void dump_stack(void) __cold;
                 printk(fmt, ##__VA_ARGS__);                     \
         }                                                       \
 })
+#define printk_deferred_once(fmt, ...)                          \
+({                                                              \
+        static bool __print_once __read_mostly;                 \
+                                                                \
+        if (!__print_once) {                                    \
+                __print_once = true;                            \
+                printk_deferred(fmt, ##__VA_ARGS__);            \
+        }                                                       \
+})
 #else
 #define printk_once(fmt, ...)                                   \
         no_printk(fmt, ##__VA_ARGS__)
+#define printk_deferred_once(fmt, ...)                          \
+        no_printk(fmt, ##__VA_ARGS__)
 #endif
 
 #define pr_emerg_once(fmt, ...)                                 \
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 608e60a74c3c..9d117f61d976 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -44,6 +44,10 @@ extern int remove_proc_subtree(const char *, struct proc_dir_entry *);
 
 #else /* CONFIG_PROC_FS */
 
+static inline void proc_root_init(void)
+{
+}
+
 static inline void proc_flush_task(struct task_struct *task)
 {
 }
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index 07d0df6bf768..077904c8b70d 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -5,6 +5,7 @@
 #include <linux/sched.h>                /* For struct task_struct.  */
 #include <linux/err.h>                  /* for IS_ERR_VALUE */
 #include <linux/bug.h>                  /* For BUG_ON.  */
+#include <linux/pid_namespace.h>        /* For task_active_pid_ns.  */
 #include <uapi/linux/ptrace.h>
 
 /*
@@ -129,6 +130,37 @@ static inline void ptrace_event(int event, unsigned long message)
 }
 
 /**
+ * ptrace_event_pid - possibly stop for a ptrace event notification
+ * @event:      %PTRACE_EVENT_* value to report
+ * @pid:        process identifier for %PTRACE_GETEVENTMSG to return
+ *
+ * Check whether @event is enabled and, if so, report @event and @pid
+ * to the ptrace parent.  @pid is reported as the pid_t seen from the
+ * the ptrace parent's pid namespace.
+ *
+ * Called without locks.
+ */
+static inline void ptrace_event_pid(int event, struct pid *pid)
+{
+        /*
+         * FIXME: There's a potential race if a ptracer in a different pid
+         * namespace than parent attaches between computing message below and
+         * when we acquire tasklist_lock in ptrace_stop().  If this happens,
+         * the ptracer will get a bogus pid from PTRACE_GETEVENTMSG.
+         */
+        unsigned long message = 0;
+        struct pid_namespace *ns;
+
+        rcu_read_lock();
+        ns = task_active_pid_ns(rcu_dereference(current->parent));
+        if (ns)
+                message = pid_nr_ns(pid, ns);
+        rcu_read_unlock();
+
+        ptrace_event(event, message);
+}
+
+/**
  * ptrace_init_task - initialize ptrace state for a new child
  * @child:              new child task
  * @ptrace:             true if child should be ptrace'd by parent's tracer
diff --git a/include/linux/pwm.h b/include/linux/pwm.h
index 4717f54051cb..e90628cac8fa 100644
--- a/include/linux/pwm.h
+++ b/include/linux/pwm.h
@@ -274,14 +274,18 @@ struct pwm_lookup {
         unsigned int index;
         const char *dev_id;
         const char *con_id;
+        unsigned int period;
+        enum pwm_polarity polarity;
 };
 
-#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id) \
+#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id, _period, _polarity) \
         {                                               \
                 .provider = _provider,                  \
                 .index = _index,                        \
                 .dev_id = _dev_id,                      \
                 .con_id = _con_id,                      \
+                .period = _period,                      \
+                .polarity = _polarity                   \
         }
 
 #if IS_ENABLED(CONFIG_PWM)
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
index 2de2e275b2cb..efdd9227a49c 100644
--- a/include/linux/pwm_backlight.h
+++ b/include/linux/pwm_backlight.h
@@ -6,9 +6,6 @@
 
 #include <linux/backlight.h>
 
-/* TODO: convert to gpiod_*() API once it has been merged */
-#define PWM_BACKLIGHT_GPIO_ACTIVE_LOW   (1 << 0)
-
 struct platform_pwm_backlight_data {
         int pwm_id;
         unsigned int max_brightness;
@@ -16,8 +13,8 @@ struct platform_pwm_backlight_data {
         unsigned int lth_brightness;
         unsigned int pwm_period_ns;
         unsigned int *levels;
+        /* TODO remove once all users are switched to gpiod_* API */
         int enable_gpio;
-        unsigned long enable_gpio_flags;
         int (*init)(struct device *dev);
         int (*notify)(struct device *dev, int brightness);
         void (*notify_after)(struct device *dev, int brightness);
diff --git a/include/linux/quota.h b/include/linux/quota.h
index cc7494a35429..0f3c5d38da1f 100644
--- a/include/linux/quota.h
+++ b/include/linux/quota.h
@@ -329,6 +329,7 @@ struct quotactl_ops {
         int (*get_xstate)(struct super_block *, struct fs_quota_stat *);
         int (*set_xstate)(struct super_block *, unsigned int, int);
         int (*get_xstatev)(struct super_block *, struct fs_quota_statv *);
+        int (*rm_xquota)(struct super_block *, unsigned int);
 };
 
 struct quota_format_type {
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index b66c2110cb1f..be574506e6a9 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -72,10 +72,9 @@ struct anon_vma_chain {
 };
 
 enum ttu_flags {
-        TTU_UNMAP = 0,                  /* unmap mode */
-        TTU_MIGRATION = 1,              /* migration mode */
-        TTU_MUNLOCK = 2,                /* munlock mode */
-        TTU_ACTION_MASK = 0xff,
+        TTU_UNMAP = 1,                  /* unmap mode */
+        TTU_MIGRATION = 2,              /* migration mode */
+        TTU_MUNLOCK = 4,                /* munlock mode */
 
         TTU_IGNORE_MLOCK = (1 << 8),    /* ignore mlock */
         TTU_IGNORE_ACCESS = (1 << 9),   /* don't age */
@@ -183,14 +182,10 @@ static inline void page_dup_rmap(struct page *page)
  */
 int page_referenced(struct page *, int is_locked,
                         struct mem_cgroup *memcg, unsigned long *vm_flags);
-int page_referenced_one(struct page *, struct vm_area_struct *,
-        unsigned long address, void *arg);
 
 #define TTU_ACTION(x) ((x) & TTU_ACTION_MASK)
 
 int try_to_unmap(struct page *, enum ttu_flags flags);
-int try_to_unmap_one(struct page *, struct vm_area_struct *,
-                        unsigned long address, void *arg);
 
 /*
  * Called from mm/filemap_xip.c to unmap empty zero page
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 70f67e4e6156..ea74596014a2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -137,12 +137,6 @@ struct filename;
 #define VMACACHE_MASK (VMACACHE_SIZE - 1)
 
 /*
- * List of flags we want to share for kernel threads,
- * if only because they are not used by them anyway.
- */
-#define CLONE_KERNEL    (CLONE_FS | CLONE_FILES | CLONE_SIGHAND)
-
-/*
  * These are the constant used to fake the fixed-point load-average
  * counting. Some notes:
  *  - 11 bit fractions expand to 22 bits by the multiplies: this gives
@@ -745,7 +739,6 @@ static inline int signal_group_exit(const struct signal_struct *sig)
 struct user_struct {
         atomic_t __count;       /* reference count */
         atomic_t processes;     /* How many processes does this user have? */
-        atomic_t files;         /* How many open files does this user have? */
         atomic_t sigpending;    /* How many pending signals does this user have? */
 #ifdef CONFIG_INOTIFY_USER
         atomic_t inotify_watches; /* How many inotify watches does this user have? */
@@ -2421,9 +2414,6 @@ extern void flush_itimer_signals(void);
 
 extern void do_group_exit(int);
 
-extern int allow_signal(int);
-extern int disallow_signal(int);
-
 extern int do_execve(struct filename *,
                      const char __user * const __user *,
                      const char __user * const __user *);
@@ -2967,7 +2957,7 @@ static inline void inc_syscw(struct task_struct *tsk)
 #define TASK_SIZE_OF(tsk)       TASK_SIZE
 #endif
 
-#ifdef CONFIG_MM_OWNER
+#ifdef CONFIG_MEMCG
 extern void mm_update_next_owner(struct mm_struct *mm);
 extern void mm_init_owner(struct mm_struct *mm, struct task_struct *p);
 #else
@@ -2978,7 +2968,7 @@ static inline void mm_update_next_owner(struct mm_struct *mm)
 static inline void mm_init_owner(struct mm_struct *mm, struct task_struct *p)
 {
 }
-#endif /* CONFIG_MM_OWNER */
+#endif /* CONFIG_MEMCG */
 
 static inline unsigned long task_rlimit(const struct task_struct *tsk,
                 unsigned int limit)
diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h
index 8045a554cafb..596a0e007c62 100644
--- a/include/linux/sched/sysctl.h
+++ b/include/linux/sched/sysctl.h
@@ -25,6 +25,10 @@ enum { sysctl_hung_task_timeout_secs = 0 };
  * Because the kernel adds some informative sections to a image of program at
  * generating coredump, we need some margin. The number of extra sections is
  * 1-3 now and depends on arch. We use "5" as safe margin, here.
+ *
+ * ELF extended numbering allows more than 65535 sections, so 16-bit bound is
+ * not a hard limit any more. Although some userspace tools can be surprised by
+ * that.
  */
 #define MAPCOUNT_ELF_CORE_MARGIN        (5)
 #define DEFAULT_MAX_MAP_COUNT   (USHRT_MAX - MAPCOUNT_ELF_CORE_MARGIN)
diff --git a/include/linux/sched_clock.h b/include/linux/sched_clock.h
index cddf0c2940b6..efa931c5cef1 100644
--- a/include/linux/sched_clock.h
+++ b/include/linux/sched_clock.h
@@ -14,7 +14,6 @@ extern void sched_clock_postinit(void);
 static inline void sched_clock_postinit(void) { }
 #endif
 
-extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
 extern void sched_clock_register(u64 (*read)(void), int bits,
                                  unsigned long rate);
 
diff --git a/include/linux/security.h b/include/linux/security.h
index 6478ce3252c7..9c6b9722ff48 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -1708,7 +1708,7 @@ struct security_operations {
         void (*key_free) (struct key *key);
         int (*key_permission) (key_ref_t key_ref,
                                const struct cred *cred,
-                               key_perm_t perm);
+                               unsigned perm);
         int (*key_getsecurity)(struct key *key, char **_buffer);
 #endif  /* CONFIG_KEYS */
 
@@ -3034,7 +3034,7 @@ static inline int security_path_chroot(struct path *path)
 int security_key_alloc(struct key *key, const struct cred *cred, unsigned long flags);
 void security_key_free(struct key *key);
 int security_key_permission(key_ref_t key_ref,
-                            const struct cred *cred, key_perm_t perm);
+                            const struct cred *cred, unsigned perm);
 int security_key_getsecurity(struct key *key, char **_buffer);
 
 #else
@@ -3052,7 +3052,7 @@ static inline void security_key_free(struct key *key)
 
 static inline int security_key_permission(key_ref_t key_ref,
                                           const struct cred *cred,
-                                          key_perm_t perm)
+                                          unsigned perm)
 {
         return 0;
 }
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 7a15b5b24c0b..5bbb809ee197 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -294,6 +294,9 @@ struct earlycon_device {
 int setup_earlycon(char *buf, const char *match,
                    int (*setup)(struct earlycon_device *, const char *));
 
+extern int of_setup_earlycon(unsigned long addr,
+                             int (*setup)(struct earlycon_device *, const char *));
+
 #define EARLYCON_DECLARE(name, func) \
 static int __init name ## _setup_earlycon(char *buf) \
 { \
@@ -301,6 +304,9 @@ static int __init name ## _setup_earlycon(char *buf) \
 } \
 early_param("earlycon", name ## _setup_earlycon);
 
+#define OF_EARLYCON_DECLARE(name, compat, fn)                           \
+        _OF_DECLARE(earlycon, name, compat, fn, void *)
+
 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
                                    struct console *c);
 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
index f92c0a43c54c..abdf1f229dc3 100644
--- a/include/linux/shdma-base.h
+++ b/include/linux/shdma-base.h
@@ -54,6 +54,7 @@ struct shdma_desc {
         dma_cookie_t cookie;
         int chunks;
         int mark;
+        bool cyclic;                    /* used as cyclic transfer */
 };
 
 struct shdma_chan {
diff --git a/include/linux/shm.h b/include/linux/shm.h
index 1e2cd2e6b540..57d77709fbe2 100644
--- a/include/linux/shm.h
+++ b/include/linux/shm.h
@@ -3,9 +3,8 @@
 
 #include <asm/page.h>
 #include <uapi/linux/shm.h>
-
-#define SHMALL (SHMMAX/PAGE_SIZE*(SHMMNI/16)) /* max shm system wide (pages) */
 #include <asm/shmparam.h>
+
 struct shmid_kernel /* private to the kernel */
 {       
         struct kern_ipc_perm    shm_perm;
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 2ac423bdb676..c9e65360c49a 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -63,11 +63,6 @@ static inline int sigismember(sigset_t *set, int _sig)
                 return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
 }
 
-static inline int sigfindinword(unsigned long word)
-{
-        return ffz(~word);
-}
-
 #endif /* __HAVE_ARCH_SIG_BITOPS */
 
 static inline int sigisemptyset(sigset_t *set)
@@ -289,6 +284,22 @@ extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka,
 extern void signal_setup_done(int failed, struct ksignal *ksig, int stepping);
 extern void signal_delivered(int sig, siginfo_t *info, struct k_sigaction *ka, struct pt_regs *regs, int stepping);
 extern void exit_signals(struct task_struct *tsk);
+extern void kernel_sigaction(int, __sighandler_t);
+
+static inline void allow_signal(int sig)
+{
+        /*
+         * Kernel threads handle their own signals. Let the signal code
+         * know it'll be handled, so that they don't get converted to
+         * SIGKILL or just silently dropped.
+         */
+        kernel_sigaction(sig, (__force __sighandler_t)2);
+}
+
+static inline void disallow_signal(int sig)
+{
+        kernel_sigaction(sig, SIG_IGN);
+}
 
 /*
  * Eventually that'll replace get_signal_to_deliver(); macro for now,
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 307bfbe62387..1d9abb7d22a0 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -116,7 +116,9 @@ struct kmem_cache *kmem_cache_create(const char *, size_t, size_t,
                         unsigned long,
                         void (*)(void *));
 #ifdef CONFIG_MEMCG_KMEM
-void kmem_cache_create_memcg(struct mem_cgroup *, struct kmem_cache *);
+struct kmem_cache *memcg_create_kmem_cache(struct mem_cgroup *,
+                                           struct kmem_cache *,
+                                           const char *);
 #endif
 void kmem_cache_destroy(struct kmem_cache *);
 int kmem_cache_shrink(struct kmem_cache *);
@@ -369,16 +371,7 @@ kmem_cache_alloc_node_trace(struct kmem_cache *s,
 #include <linux/slub_def.h>
 #endif
 
-static __always_inline void *
-kmalloc_order(size_t size, gfp_t flags, unsigned int order)
-{
-        void *ret;
-
-        flags |= (__GFP_COMP | __GFP_KMEMCG);
-        ret = (void *) __get_free_pages(flags, order);
-        kmemleak_alloc(ret, size, 1, flags);
-        return ret;
-}
+extern void *kmalloc_order(size_t size, gfp_t flags, unsigned int order);
 
 #ifdef CONFIG_TRACING
 extern void *kmalloc_order_trace(size_t size, gfp_t flags, unsigned int order);
@@ -533,10 +526,7 @@ static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node)
  * @memcg: pointer to the memcg this cache belongs to
  * @list: list_head for the list of all caches in this memcg
  * @root_cache: pointer to the global, root cache, this cache was derived from
- * @dead: set to true after the memcg dies; the cache may still be around.
  * @nr_pages: number of pages that belongs to this cache.
- * @destroy: worker to be called whenever we are ready, or believe we may be
- *           ready, to destroy this cache.
  */
 struct memcg_cache_params {
         bool is_root_cache;
@@ -549,9 +539,7 @@ struct memcg_cache_params {
                         struct mem_cgroup *memcg;
                         struct list_head list;
                         struct kmem_cache *root_cache;
-                        bool dead;
                         atomic_t nr_pages;
-                        struct work_struct destroy;
                 };
         };
 };
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 633f5edd7470..34347f26be9b 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -13,8 +13,6 @@
 #include <linux/init.h>
 #include <linux/llist.h>
 
-extern void cpu_idle(void);
-
 typedef void (*smp_call_func_t)(void *info);
 struct call_single_data {
         struct llist_node llist;
diff --git a/include/linux/splice.h b/include/linux/splice.h
index 0e43906d2fda..da2751d3b93d 100644
--- a/include/linux/splice.h
+++ b/include/linux/splice.h
@@ -70,16 +70,6 @@ extern ssize_t splice_from_pipe(struct pipe_inode_info *, struct file *,
                                 splice_actor *);
 extern ssize_t __splice_from_pipe(struct pipe_inode_info *,
                                   struct splice_desc *, splice_actor *);
-extern int splice_from_pipe_feed(struct pipe_inode_info *, struct splice_desc *,
-                                 splice_actor *);
-extern int splice_from_pipe_next(struct pipe_inode_info *,
-                                 struct splice_desc *);
-extern void splice_from_pipe_begin(struct splice_desc *);
-extern void splice_from_pipe_end(struct pipe_inode_info *,
-                                 struct splice_desc *);
-extern int pipe_to_file(struct pipe_inode_info *, struct pipe_buffer *,
-                        struct splice_desc *);
-
 extern ssize_t splice_to_pipe(struct pipe_inode_info *,
                               struct splice_pipe_desc *);
 extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *,
diff --git a/include/linux/string.h b/include/linux/string.h
index ac889c5ea11b..d36977e029af 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -52,6 +52,9 @@ extern int strncasecmp(const char *s1, const char *s2, size_t n);
 #ifndef __HAVE_ARCH_STRCHR
 extern char * strchr(const char *,int);
 #endif
+#ifndef __HAVE_ARCH_STRCHRNUL
+extern char * strchrnul(const char *,int);
+#endif
 #ifndef __HAVE_ARCH_STRNCHR
 extern char * strnchr(const char *, size_t, int);
 #endif
diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
index 04e763221246..1bc7cd05b22e 100644
--- a/include/linux/sunrpc/svc.h
+++ b/include/linux/sunrpc/svc.h
@@ -244,6 +244,7 @@ struct svc_rqst {
         struct page *           rq_pages[RPCSVC_MAXPAGES];
         struct page *           *rq_respages;   /* points into rq_pages */
         struct page *           *rq_next_page; /* next reply page to use */
+        struct page *           *rq_page_end;  /* one past the last page */
 
         struct kvec             rq_vec[RPCSVC_MAXPAGES]; /* generally useful.. */
 
@@ -254,11 +255,15 @@ struct svc_rqst {
         u32                     rq_prot;        /* IP protocol */
         unsigned short
                                 rq_secure  : 1; /* secure port */
+        unsigned short          rq_local   : 1; /* local request */
 
         void *                  rq_argp;        /* decoded arguments */
         void *                  rq_resp;        /* xdr'd results */
         void *                  rq_auth_data;   /* flavor-specific data */
-
+        int                     rq_auth_slack;  /* extra space xdr code
+                                                 * should leave in head
+                                                 * for krb5i, krb5p.
+                                                 */
         int                     rq_reserved;    /* space on socket outq
                                                  * reserved for this request
                                                  */
@@ -454,11 +459,7 @@ char *		   svc_print_addr(struct svc_rqst *, char *, size_t);
  */
 static inline void svc_reserve_auth(struct svc_rqst *rqstp, int space)
 {
-        int added_space = 0;
-
-        if (rqstp->rq_authop->flavour)
-                added_space = RPC_MAX_AUTH_SIZE;
-        svc_reserve(rqstp, space + added_space);
+        svc_reserve(rqstp, space + rqstp->rq_auth_slack);
 }
 
 #endif /* SUNRPC_SVC_H */
diff --git a/include/linux/sunrpc/svc_rdma.h b/include/linux/sunrpc/svc_rdma.h
index 0b8e3e6bdacf..5cf99a016368 100644
--- a/include/linux/sunrpc/svc_rdma.h
+++ b/include/linux/sunrpc/svc_rdma.h
@@ -115,14 +115,13 @@ struct svc_rdma_fastreg_mr {
         struct list_head frmr_list;
 };
 struct svc_rdma_req_map {
-        struct svc_rdma_fastreg_mr *frmr;
         unsigned long count;
         union {
                 struct kvec sge[RPCSVC_MAXPAGES];
                 struct svc_rdma_chunk_sge ch[RPCSVC_MAXPAGES];
+                unsigned long lkey[RPCSVC_MAXPAGES];
         };
 };
-#define RDMACTXT_F_FAST_UNREG   1
 #define RDMACTXT_F_LAST_CTXT    2
 
 #define SVCRDMA_DEVCAP_FAST_REG         1       /* fast mr registration */
diff --git a/include/linux/sunrpc/svc_xprt.h b/include/linux/sunrpc/svc_xprt.h
index b05963f09ebf..7235040a19b2 100644
--- a/include/linux/sunrpc/svc_xprt.h
+++ b/include/linux/sunrpc/svc_xprt.h
@@ -24,6 +24,7 @@ struct svc_xprt_ops {
         void            (*xpo_release_rqst)(struct svc_rqst *);
         void            (*xpo_detach)(struct svc_xprt *);
         void            (*xpo_free)(struct svc_xprt *);
+        int             (*xpo_secure_port)(struct svc_rqst *);
 };
 
 struct svc_xprt_class {
@@ -63,6 +64,7 @@ struct svc_xprt {
 #define XPT_DETACHED    10              /* detached from tempsocks list */
 #define XPT_LISTENER    11              /* listening endpoint */
 #define XPT_CACHE_AUTH  12              /* cache auth info */
+#define XPT_LOCAL       13              /* connection from loopback interface */
 
         struct svc_serv         *xpt_server;    /* service for transport */
         atomic_t                xpt_reserved;   /* space on outq that is rsvd */
diff --git a/include/linux/sunrpc/xdr.h b/include/linux/sunrpc/xdr.h
index 15f9204ee70b..70c6b92e15a7 100644
--- a/include/linux/sunrpc/xdr.h
+++ b/include/linux/sunrpc/xdr.h
@@ -215,6 +215,9 @@ typedef int	(*kxdrdproc_t)(void *rqstp, struct xdr_stream *xdr, void *obj);
 
 extern void xdr_init_encode(struct xdr_stream *xdr, struct xdr_buf *buf, __be32 *p);
 extern __be32 *xdr_reserve_space(struct xdr_stream *xdr, size_t nbytes);
+extern void xdr_commit_encode(struct xdr_stream *xdr);
+extern void xdr_truncate_encode(struct xdr_stream *xdr, size_t len);
+extern int xdr_restrict_buflen(struct xdr_stream *xdr, int newbuflen);
 extern void xdr_write_pages(struct xdr_stream *xdr, struct page **pages,
                 unsigned int base, unsigned int len);
 extern unsigned int xdr_stream_pos(const struct xdr_stream *xdr);
diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h
index 3876f0f1dfd3..fcbfe8783243 100644
--- a/include/linux/sunrpc/xprt.h
+++ b/include/linux/sunrpc/xprt.h
@@ -24,6 +24,12 @@
 #define RPC_MAX_SLOT_TABLE_LIMIT        (65536U)
 #define RPC_MAX_SLOT_TABLE      RPC_MAX_SLOT_TABLE_LIMIT
 
+#define RPC_CWNDSHIFT           (8U)
+#define RPC_CWNDSCALE           (1U << RPC_CWNDSHIFT)
+#define RPC_INITCWND            RPC_CWNDSCALE
+#define RPC_MAXCWND(xprt)       ((xprt)->max_reqs << RPC_CWNDSHIFT)
+#define RPCXPRT_CONGESTED(xprt) ((xprt)->cong >= (xprt)->cwnd)
+
 /*
  * This describes a timeout strategy
  */
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index 91d66fd8dce1..f76994b9396c 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -327,6 +327,8 @@ extern unsigned long get_safe_page(gfp_t gfp_mask);
 extern void hibernation_set_ops(const struct platform_hibernation_ops *ops);
 extern int hibernate(void);
 extern bool system_entering_hibernation(void);
+asmlinkage int swsusp_save(void);
+extern struct pbe *restore_pblist;
 #else /* CONFIG_HIBERNATION */
 static inline void register_nosave_region(unsigned long b, unsigned long e) {}
 static inline void register_nosave_region_late(unsigned long b, unsigned long e) {}
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 350711560753..4bdbee80eede 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -166,10 +166,10 @@ enum {
 #define COMPACT_CLUSTER_MAX SWAP_CLUSTER_MAX
 
 /*
- * Ratio between the present memory in the zone and the "gap" that
- * we're allowing kswapd to shrink in addition to the per-zone high
- * wmark, even for zones that already have the high wmark satisfied,
- * in order to provide better per-zone lru behavior. We are ok to
+ * Ratio between zone->managed_pages and the "gap" that above the per-zone
+ * "high_wmark". While balancing nodes, We allow kswapd to shrink zones that
+ * do not meet the (high_wmark + gap) watermark, even which already met the
+ * high_wmark, in order to provide better per-zone lru behavior. We are ok to
  * spend not more than 1% of the memory for this zone balancing "gap".
  */
 #define KSWAPD_ZONE_BALANCE_GAP_RATIO 100
@@ -214,8 +214,9 @@ struct percpu_cluster {
 struct swap_info_struct {
         unsigned long   flags;          /* SWP_USED etc: see above */
         signed short    prio;           /* swap priority of this type */
+        struct plist_node list;         /* entry in swap_active_head */
+        struct plist_node avail_list;   /* entry in swap_avail_head */
         signed char     type;           /* strange name for an index */
-        signed char     next;           /* next type on the swap list */
         unsigned int    max;            /* extent of the swap_map */
         unsigned char *swap_map;        /* vmalloc'ed array of usage counts */
         struct swap_cluster_info *cluster_info; /* cluster info. Only for SSD */
@@ -255,11 +256,6 @@ struct swap_info_struct {
         struct swap_cluster_info discard_cluster_tail; /* list tail of discard clusters */
 };
 
-struct swap_list_t {
-        int head;       /* head of priority-ordered swapfile list */
-        int next;       /* swapfile to be used next */
-};
-
 /* linux/mm/workingset.c */
 void *workingset_eviction(struct address_space *mapping, struct page *page);
 bool workingset_refault(void *shadow);
@@ -308,12 +304,14 @@ extern unsigned long nr_free_pagecache_pages(void);
 
 
 /* linux/mm/swap.c */
-extern void __lru_cache_add(struct page *);
 extern void lru_cache_add(struct page *);
+extern void lru_cache_add_anon(struct page *page);
+extern void lru_cache_add_file(struct page *page);
 extern void lru_add_page_tail(struct page *page, struct page *page_tail,
                          struct lruvec *lruvec, struct list_head *head);
 extern void activate_page(struct page *);
 extern void mark_page_accessed(struct page *);
+extern void init_page_accessed(struct page *page);
 extern void lru_add_drain(void);
 extern void lru_add_drain_cpu(int cpu);
 extern void lru_add_drain_all(void);
@@ -323,22 +321,6 @@ extern void swap_setup(void);
 
 extern void add_page_to_unevictable_list(struct page *page);
 
-/**
- * lru_cache_add: add a page to the page lists
- * @page: the page to add
- */
-static inline void lru_cache_add_anon(struct page *page)
-{
-        ClearPageActive(page);
-        __lru_cache_add(page);
-}
-
-static inline void lru_cache_add_file(struct page *page)
-{
-        ClearPageActive(page);
-        __lru_cache_add(page);
-}
-
 /* linux/mm/vmscan.c */
 extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
                                         gfp_t gfp_mask, nodemask_t *mask);
@@ -496,7 +478,7 @@ mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout)
 #define free_page_and_swap_cache(page) \
         page_cache_release(page)
 #define free_pages_and_swap_cache(pages, nr) \
-        release_pages((pages), (nr), 0);
+        release_pages((pages), (nr), false);
 
 static inline void show_swap_cache_info(void)
 {
diff --git a/include/linux/swapfile.h b/include/linux/swapfile.h
index e282624e8c10..388293a91e8c 100644
--- a/include/linux/swapfile.h
+++ b/include/linux/swapfile.h
@@ -6,7 +6,7 @@
  * want to expose them to the dozens of source files that include swap.h
  */
 extern spinlock_t swap_lock;
-extern struct swap_list_t swap_list;
+extern struct plist_head swap_active_head;
 extern struct swap_info_struct *swap_info[];
 extern int try_to_unuse(unsigned int, bool, unsigned long);
 
diff --git a/include/linux/swapops.h b/include/linux/swapops.h
index c0f75261a728..6adfb7bfbf44 100644
--- a/include/linux/swapops.h
+++ b/include/linux/swapops.h
@@ -54,7 +54,7 @@ static inline pgoff_t swp_offset(swp_entry_t entry)
 /* check whether a pte points to a swap entry */
 static inline int is_swap_pte(pte_t pte)
 {
-        return !pte_none(pte) && !pte_present(pte) && !pte_file(pte);
+        return !pte_none(pte) && !pte_present_nonuma(pte) && !pte_file(pte);
 }
 #endif
 
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
index a5ffd32642fd..e7a018eaf3a2 100644
--- a/include/linux/swiotlb.h
+++ b/include/linux/swiotlb.h
@@ -116,4 +116,6 @@ static inline void swiotlb_free(void) { }
 #endif
 
 extern void swiotlb_print_info(void);
+extern int is_swiotlb_buffer(phys_addr_t paddr);
+
 #endif /* __LINUX_SWIOTLB_H */
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index a4a0588c5397..b0881a0ed322 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -711,7 +711,7 @@ asmlinkage long sys_keyctl(int cmd, unsigned long arg2, unsigned long arg3,
 
 asmlinkage long sys_ioprio_set(int which, int who, int ioprio);
 asmlinkage long sys_ioprio_get(int which, int who);
-asmlinkage long sys_set_mempolicy(int mode, unsigned long __user *nmask,
+asmlinkage long sys_set_mempolicy(int mode, const unsigned long __user *nmask,
                                 unsigned long maxnode);
 asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode,
                                 const unsigned long __user *from,
@@ -723,7 +723,7 @@ asmlinkage long sys_move_pages(pid_t pid, unsigned long nr_pages,
                                 int flags);
 asmlinkage long sys_mbind(unsigned long start, unsigned long len,
                                 unsigned long mode,
-                                unsigned long __user *nmask,
+                                const unsigned long __user *nmask,
                                 unsigned long maxnode,
                                 unsigned flags);
 asmlinkage long sys_get_mempolicy(int __user *policy,
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index cb0cec94fda3..ff307b548ed3 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -61,8 +61,6 @@ extern long do_no_restart_syscall(struct restart_block *parm);
 # define THREADINFO_GFP         (GFP_KERNEL | __GFP_NOTRACK)
 #endif
 
-#define THREADINFO_GFP_ACCOUNTED (THREADINFO_GFP | __GFP_KMEMCG)
-
 /*
  * flag set/clear/test wrappers
  * - pass TIF_xxxx constants to these functions
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 973671ff9e7d..dda6ee521e74 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -58,7 +58,8 @@ int arch_update_cpu_topology(void);
 /*
  * If the distance between nodes in a system is larger than RECLAIM_DISTANCE
  * (in whatever arch specific measurement units returned by node_distance())
- * then switch on zone reclaim on boot.
+ * and zone_reclaim_mode is enabled then the VM will only call zone_reclaim()
+ * on nodes within this distance.
  */
 #define RECLAIM_DISTANCE 30
 #endif
diff --git a/include/linux/trace_seq.h b/include/linux/trace_seq.h
index a32d86ec8bf2..136116924d8d 100644
--- a/include/linux/trace_seq.h
+++ b/include/linux/trace_seq.h
@@ -46,6 +46,9 @@ extern int trace_seq_putmem_hex(struct trace_seq *s, const void *mem,
 extern void *trace_seq_reserve(struct trace_seq *s, size_t len);
 extern int trace_seq_path(struct trace_seq *s, const struct path *path);
 
+extern int trace_seq_bitmask(struct trace_seq *s, const unsigned long *maskp,
+                             int nmaskbits);
+
 #else /* CONFIG_TRACING */
 static inline int trace_seq_printf(struct trace_seq *s, const char *fmt, ...)
 {
@@ -57,6 +60,13 @@ trace_seq_bprintf(struct trace_seq *s, const char *fmt, const u32 *binary)
         return 0;
 }
 
+static inline int
+trace_seq_bitmask(struct trace_seq *s, const unsigned long *maskp,
+                  int nmaskbits)
+{
+        return 0;
+}
+
 static inline int trace_print_seq(struct seq_file *m, struct trace_seq *s)
 {
         return 0;
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
index 9d30ee469c2a..2e2a5f7717e5 100644
--- a/include/linux/tracepoint.h
+++ b/include/linux/tracepoint.h
@@ -185,6 +185,11 @@ extern void syscall_unregfunc(void);
         static inline void                                              \
         check_trace_callback_type_##name(void (*cb)(data_proto))        \
         {                                                               \
+        }                                                               \
+        static inline bool                                              \
+        trace_##name##_enabled(void)                                    \
+        {                                                               \
+                return static_key_false(&__tracepoint_##name.key);      \
         }
 
 /*
@@ -230,6 +235,11 @@ extern void syscall_unregfunc(void);
         }                                                               \
         static inline void check_trace_callback_type_##name(void (*cb)(data_proto)) \
         {                                                               \
+        }                                                               \
+        static inline bool                                              \
+        trace_##name##_enabled(void)                                    \
+        {                                                               \
+                return false;                                           \
         }
 
 #define DEFINE_TRACE_FN(name, reg, unreg)
diff --git a/include/linux/uio.h b/include/linux/uio.h
index 199bcc34241b..e2231e47cec1 100644
--- a/include/linux/uio.h
+++ b/include/linux/uio.h
@@ -19,11 +19,21 @@ struct kvec {
         size_t iov_len;
 };
 
+enum {
+        ITER_IOVEC = 0,
+        ITER_KVEC = 2,
+        ITER_BVEC = 4,
+};
+
 struct iov_iter {
-        const struct iovec *iov;
-        unsigned long nr_segs;
+        int type;
         size_t iov_offset;
         size_t count;
+        union {
+                const struct iovec *iov;
+                const struct bio_vec *bvec;
+        };
+        unsigned long nr_segs;
 };
 
 /*
@@ -53,6 +63,7 @@ static inline struct iovec iov_iter_iovec(const struct iov_iter *iter)
 }
 
 #define iov_for_each(iov, iter, start)                          \
+        if (!((start).type & ITER_BVEC))                        \
         for (iter = (start);                                    \
              (iter).count &&                                    \
              ((iov = iov_iter_iovec(&(iter))), 1);              \
@@ -62,32 +73,44 @@ unsigned long iov_shorten(struct iovec *iov, unsigned long nr_segs, size_t to);
 
 size_t iov_iter_copy_from_user_atomic(struct page *page,
                 struct iov_iter *i, unsigned long offset, size_t bytes);
-size_t iov_iter_copy_from_user(struct page *page,
-                struct iov_iter *i, unsigned long offset, size_t bytes);
 void iov_iter_advance(struct iov_iter *i, size_t bytes);
 int iov_iter_fault_in_readable(struct iov_iter *i, size_t bytes);
 size_t iov_iter_single_seg_count(const struct iov_iter *i);
 size_t copy_page_to_iter(struct page *page, size_t offset, size_t bytes,
                          struct iov_iter *i);
+size_t copy_page_from_iter(struct page *page, size_t offset, size_t bytes,
+                         struct iov_iter *i);
+unsigned long iov_iter_alignment(const struct iov_iter *i);
+void iov_iter_init(struct iov_iter *i, int direction, const struct iovec *iov,
+                        unsigned long nr_segs, size_t count);
+ssize_t iov_iter_get_pages(struct iov_iter *i, struct page **pages,
+                        size_t maxsize, size_t *start);
+ssize_t iov_iter_get_pages_alloc(struct iov_iter *i, struct page ***pages,
+                        size_t maxsize, size_t *start);
+int iov_iter_npages(const struct iov_iter *i, int maxpages);
 
-static inline void iov_iter_init(struct iov_iter *i,
-                        const struct iovec *iov, unsigned long nr_segs,
-                        size_t count, size_t written)
+static inline size_t iov_iter_count(struct iov_iter *i)
 {
-        i->iov = iov;
-        i->nr_segs = nr_segs;
-        i->iov_offset = 0;
-        i->count = count + written;
+        return i->count;
+}
 
-        iov_iter_advance(i, written);
+static inline void iov_iter_truncate(struct iov_iter *i, size_t count)
+{
+        if (i->count > count)
+                i->count = count;
 }
 
-static inline size_t iov_iter_count(struct iov_iter *i)
+/*
+ * reexpand a previously truncated iterator; count must be no more than how much
+ * we had shrunk it.
+ */
+static inline void iov_iter_reexpand(struct iov_iter *i, size_t count)
 {
-        return i->count;
+        i->count = count;
 }
 
 int memcpy_fromiovec(unsigned char *kdata, struct iovec *iov, int len);
 int memcpy_toiovec(struct iovec *iov, unsigned char *kdata, int len);
 
+
 #endif
diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h
index edff2b97b864..c52f827ba6ce 100644
--- a/include/linux/uprobes.h
+++ b/include/linux/uprobes.h
@@ -32,6 +32,7 @@ struct vm_area_struct;
 struct mm_struct;
 struct inode;
 struct notifier_block;
+struct page;
 
 #define UPROBE_HANDLER_REMOVE           1
 #define UPROBE_HANDLER_MASK             1
@@ -127,6 +128,8 @@ extern int  arch_uprobe_exception_notify(struct notifier_block *self, unsigned l
 extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
 extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
 extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs);
+extern void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
+                                         void *src, unsigned long len);
 #else /* !CONFIG_UPROBES */
 struct uprobes_state {
 };
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 81022a52bc34..8ec980b5e3af 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -86,9 +86,8 @@ extern void vfio_unregister_iommu_driver(
  * from user space.  This allows us to easily determine if the provided
  * structure is sized to include various fields.
  */
-#define offsetofend(TYPE, MEMBER) ({                            \
-        TYPE tmp;                                               \
-        offsetof(TYPE, MEMBER) + sizeof(tmp.MEMBER); })         \
+#define offsetofend(TYPE, MEMBER) \
+        (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
 
 /*
  * External user API
diff --git a/include/linux/virtio.h b/include/linux/virtio.h
index e4abb84199be..b46671e28de2 100644
--- a/include/linux/virtio.h
+++ b/include/linux/virtio.h
@@ -106,6 +106,8 @@ static inline struct virtio_device *dev_to_virtio(struct device *_dev)
 int register_virtio_device(struct virtio_device *dev);
 void unregister_virtio_device(struct virtio_device *dev);
 
+void virtio_break_device(struct virtio_device *dev);
+
 /**
  * virtio_driver - operations for a virtio I/O driver
  * @driver: underlying device driver (populate name and owner).
diff --git a/include/linux/vm_event_item.h b/include/linux/vm_event_item.h
index 486c3972c0be..ced92345c963 100644
--- a/include/linux/vm_event_item.h
+++ b/include/linux/vm_event_item.h
@@ -80,6 +80,10 @@ enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT,
                 NR_TLB_LOCAL_FLUSH_ALL,
                 NR_TLB_LOCAL_FLUSH_ONE,
 #endif /* CONFIG_DEBUG_TLBFLUSH */
+#ifdef CONFIG_DEBUG_VM_VMACACHE
+                VMACACHE_FIND_CALLS,
+                VMACACHE_FIND_HITS,
+#endif
                 NR_VM_EVENT_ITEMS
 };
 
diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h
index 45c9cd1daf7a..82e7db7f7100 100644
--- a/include/linux/vmstat.h
+++ b/include/linux/vmstat.h
@@ -95,6 +95,12 @@ static inline void vm_events_fold_cpu(int cpu)
 #define count_vm_tlb_events(x, y) do { (void)(y); } while (0)
 #endif
 
+#ifdef CONFIG_DEBUG_VM_VMACACHE
+#define count_vm_vmacache_event(x) count_vm_event(x)
+#else
+#define count_vm_vmacache_event(x) do {} while (0)
+#endif
+
 #define __count_zone_vm_events(item, zone, delta) \
                 __count_vm_events(item##_NORMAL - ZONE_NORMAL + \
                 zone_idx(zone), delta)
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h
index 1b22c42e9c2d..a0cc2e95ed1b 100644
--- a/include/linux/workqueue.h
+++ b/include/linux/workqueue.h
@@ -56,9 +56,8 @@ enum {
         WORK_NR_COLORS          = (1 << WORK_STRUCT_COLOR_BITS) - 1,
         WORK_NO_COLOR           = WORK_NR_COLORS,
 
-        /* special cpu IDs */
+        /* not bound to any CPU, prefer the local CPU */
         WORK_CPU_UNBOUND        = NR_CPUS,
-        WORK_CPU_END            = NR_CPUS + 1,
 
         /*
          * Reserve 7 bits off of pwq pointer w/ debugobjects turned off.
@@ -274,13 +273,6 @@ static inline unsigned int work_static(struct work_struct *work) { return 0; }
 #define delayed_work_pending(w) \
         work_pending(&(w)->work)
 
-/**
- * work_clear_pending - for internal use only, mark a work item as not pending
- * @work: The work item in question
- */
-#define work_clear_pending(work) \
-        clear_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))
-
 /*
  * Workqueue flags and constants.  For details, please refer to
  * Documentation/workqueue.txt.
@@ -340,6 +332,9 @@ enum {
  * short queue flush time.  Don't queue works which can run for too
  * long.
  *
+ * system_highpri_wq is similar to system_wq but for work items which
+ * require WQ_HIGHPRI.
+ *
  * system_long_wq is similar to system_wq but may host long running
  * works.  Queue flushing might take relatively long.
  *
@@ -358,26 +353,13 @@ enum {
  * 'wq_power_efficient' is disabled.  See WQ_POWER_EFFICIENT for more info.
  */
 extern struct workqueue_struct *system_wq;
+extern struct workqueue_struct *system_highpri_wq;
 extern struct workqueue_struct *system_long_wq;
 extern struct workqueue_struct *system_unbound_wq;
 extern struct workqueue_struct *system_freezable_wq;
 extern struct workqueue_struct *system_power_efficient_wq;
 extern struct workqueue_struct *system_freezable_power_efficient_wq;
 
-static inline struct workqueue_struct * __deprecated __system_nrt_wq(void)
-{
-        return system_wq;
-}
-
-static inline struct workqueue_struct * __deprecated __system_nrt_freezable_wq(void)
-{
-        return system_freezable_wq;
-}
-
-/* equivlalent to system_wq and system_freezable_wq, deprecated */
-#define system_nrt_wq                   __system_nrt_wq()
-#define system_nrt_freezable_wq         __system_nrt_freezable_wq()
-
 extern struct workqueue_struct *
 __alloc_workqueue_key(const char *fmt, unsigned int flags, int max_active,
         struct lock_class_key *key, const char *lock_name, ...) __printf(1, 6);
@@ -587,18 +569,6 @@ static inline bool keventd_up(void)
         return system_wq != NULL;
 }
 
-/* used to be different but now identical to flush_work(), deprecated */
-static inline bool __deprecated flush_work_sync(struct work_struct *work)
-{
-        return flush_work(work);
-}
-
-/* used to be different but now identical to flush_delayed_work(), deprecated */
-static inline bool __deprecated flush_delayed_work_sync(struct delayed_work *dwork)
-{
-        return flush_delayed_work(dwork);
-}
-
 #ifndef CONFIG_SMP
 static inline long work_on_cpu(int cpu, long (*fn)(void *), void *arg)
 {
diff --git a/include/linux/zbud.h b/include/linux/zbud.h
index 2571a5cfa5fc..13af0d450bf6 100644
--- a/include/linux/zbud.h
+++ b/include/linux/zbud.h
@@ -11,7 +11,7 @@ struct zbud_ops {
 
 struct zbud_pool *zbud_create_pool(gfp_t gfp, struct zbud_ops *ops);
 void zbud_destroy_pool(struct zbud_pool *pool);
-int zbud_alloc(struct zbud_pool *pool, int size, gfp_t gfp,
+int zbud_alloc(struct zbud_pool *pool, unsigned int size, gfp_t gfp,
         unsigned long *handle);
 void zbud_free(struct zbud_pool *pool, unsigned long handle);
 int zbud_reclaim_page(struct zbud_pool *pool, unsigned int retries);
diff --git a/include/media/adv7604.h b/include/media/adv7604.h
index d262a3a922bd..aa1c4477722d 100644
--- a/include/media/adv7604.h
+++ b/include/media/adv7604.h
@@ -21,6 +21,8 @@
 #ifndef _ADV7604_
 #define _ADV7604_
 
+#include <linux/types.h>
+
 /* Analog input muxing modes (AFE register 0x02, [2:0]) */
 enum adv7604_ain_sel {
         ADV7604_AIN1_2_3_NC_SYNC_1_2 = 0,
@@ -30,14 +32,18 @@ enum adv7604_ain_sel {
         ADV7604_AIN9_4_5_6_SYNC_2_1 = 4,
 };
 
-/* Bus rotation and reordering (IO register 0x04, [7:5]) */
-enum adv7604_op_ch_sel {
-        ADV7604_OP_CH_SEL_GBR = 0,
-        ADV7604_OP_CH_SEL_GRB = 1,
-        ADV7604_OP_CH_SEL_BGR = 2,
-        ADV7604_OP_CH_SEL_RGB = 3,
-        ADV7604_OP_CH_SEL_BRG = 4,
-        ADV7604_OP_CH_SEL_RBG = 5,
+/*
+ * Bus rotation and reordering. This is used to specify component reordering on
+ * the board and describes the components order on the bus when the ADV7604
+ * outputs RGB.
+ */
+enum adv7604_bus_order {
+        ADV7604_BUS_ORDER_RGB,          /* No operation */
+        ADV7604_BUS_ORDER_GRB,          /* Swap 1-2     */
+        ADV7604_BUS_ORDER_RBG,          /* Swap 2-3     */
+        ADV7604_BUS_ORDER_BGR,          /* Swap 1-3     */
+        ADV7604_BUS_ORDER_BRG,          /* Rotate right */
+        ADV7604_BUS_ORDER_GBR,          /* Rotate left  */
 };
 
 /* Input Color Space (IO register 0x02, [7:4]) */
@@ -53,29 +59,11 @@ enum adv7604_inp_color_space {
         ADV7604_INP_COLOR_SPACE_AUTO = 0xf,
 };
 
-/* Select output format (IO register 0x03, [7:0]) */
-enum adv7604_op_format_sel {
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_8 = 0x00,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_10 = 0x01,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE0 = 0x02,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE1 = 0x06,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE2 = 0x0a,
-        ADV7604_OP_FORMAT_SEL_DDR_422_8 = 0x20,
-        ADV7604_OP_FORMAT_SEL_DDR_422_10 = 0x21,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE0 = 0x22,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE1 = 0x23,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE2 = 0x24,
-        ADV7604_OP_FORMAT_SEL_SDR_444_24 = 0x40,
-        ADV7604_OP_FORMAT_SEL_SDR_444_30 = 0x41,
-        ADV7604_OP_FORMAT_SEL_SDR_444_36_MODE0 = 0x42,
-        ADV7604_OP_FORMAT_SEL_DDR_444_24 = 0x60,
-        ADV7604_OP_FORMAT_SEL_DDR_444_30 = 0x61,
-        ADV7604_OP_FORMAT_SEL_DDR_444_36 = 0x62,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_16 = 0x80,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_20 = 0x81,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE0 = 0x82,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE1 = 0x86,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE2 = 0x8a,
+/* Select output format (IO register 0x03, [4:2]) */
+enum adv7604_op_format_mode_sel {
+        ADV7604_OP_FORMAT_MODE0 = 0x00,
+        ADV7604_OP_FORMAT_MODE1 = 0x04,
+        ADV7604_OP_FORMAT_MODE2 = 0x08,
 };
 
 enum adv7604_drive_strength {
@@ -84,6 +72,30 @@ enum adv7604_drive_strength {
         ADV7604_DR_STR_HIGH = 3,
 };
 
+enum adv7604_int1_config {
+        ADV7604_INT1_CONFIG_OPEN_DRAIN,
+        ADV7604_INT1_CONFIG_ACTIVE_LOW,
+        ADV7604_INT1_CONFIG_ACTIVE_HIGH,
+        ADV7604_INT1_CONFIG_DISABLED,
+};
+
+enum adv7604_page {
+        ADV7604_PAGE_IO,
+        ADV7604_PAGE_AVLINK,
+        ADV7604_PAGE_CEC,
+        ADV7604_PAGE_INFOFRAME,
+        ADV7604_PAGE_ESDP,
+        ADV7604_PAGE_DPP,
+        ADV7604_PAGE_AFE,
+        ADV7604_PAGE_REP,
+        ADV7604_PAGE_EDID,
+        ADV7604_PAGE_HDMI,
+        ADV7604_PAGE_TEST,
+        ADV7604_PAGE_CP,
+        ADV7604_PAGE_VDP,
+        ADV7604_PAGE_MAX,
+};
+
 /* Platform dependent definition */
 struct adv7604_platform_data {
         /* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
@@ -92,30 +104,34 @@ struct adv7604_platform_data {
         /* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */
         unsigned disable_cable_det_rst:1;
 
+        int default_input;
+
         /* Analog input muxing mode */
         enum adv7604_ain_sel ain_sel;
 
         /* Bus rotation and reordering */
-        enum adv7604_op_ch_sel op_ch_sel;
+        enum adv7604_bus_order bus_order;
 
-        /* Select output format */
-        enum adv7604_op_format_sel op_format_sel;
+        /* Select output format mode */
+        enum adv7604_op_format_mode_sel op_format_mode_sel;
+
+        /* Configuration of the INT1 pin */
+        enum adv7604_int1_config int1_config;
 
         /* IO register 0x02 */
         unsigned alt_gamma:1;
         unsigned op_656_range:1;
-        unsigned rgb_out:1;
         unsigned alt_data_sat:1;
 
         /* IO register 0x05 */
         unsigned blank_data:1;
         unsigned insert_av_codes:1;
         unsigned replicate_av_codes:1;
-        unsigned invert_cbcr:1;
 
         /* IO register 0x06 */
         unsigned inv_vs_pol:1;
         unsigned inv_hs_pol:1;
+        unsigned inv_llc_pol:1;
 
         /* IO register 0x14 */
         enum adv7604_drive_strength dr_str_data;
@@ -129,34 +145,22 @@ struct adv7604_platform_data {
         unsigned hdmi_free_run_mode;
 
         /* i2c addresses: 0 == use default */
-        u8 i2c_avlink;
-        u8 i2c_cec;
-        u8 i2c_infoframe;
-        u8 i2c_esdp;
-        u8 i2c_dpp;
-        u8 i2c_afe;
-        u8 i2c_repeater;
-        u8 i2c_edid;
-        u8 i2c_hdmi;
-        u8 i2c_test;
-        u8 i2c_cp;
-        u8 i2c_vdp;
+        u8 i2c_addresses[ADV7604_PAGE_MAX];
 };
 
-enum adv7604_input_port {
-        ADV7604_INPUT_HDMI_PORT_A,
-        ADV7604_INPUT_HDMI_PORT_B,
-        ADV7604_INPUT_HDMI_PORT_C,
-        ADV7604_INPUT_HDMI_PORT_D,
-        ADV7604_INPUT_VGA_RGB,
-        ADV7604_INPUT_VGA_COMP,
+enum adv7604_pad {
+        ADV7604_PAD_HDMI_PORT_A = 0,
+        ADV7604_PAD_HDMI_PORT_B = 1,
+        ADV7604_PAD_HDMI_PORT_C = 2,
+        ADV7604_PAD_HDMI_PORT_D = 3,
+        ADV7604_PAD_VGA_RGB = 4,
+        ADV7604_PAD_VGA_COMP = 5,
+        /* The source pad is either 1 (ADV7611) or 6 (ADV7604) */
+        ADV7604_PAD_SOURCE = 6,
+        ADV7611_PAD_SOURCE = 1,
+        ADV7604_PAD_MAX = 7,
 };
 
-#define ADV7604_EDID_PORT_A 0
-#define ADV7604_EDID_PORT_B 1
-#define ADV7604_EDID_PORT_C 2
-#define ADV7604_EDID_PORT_D 3
-
 #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE   (V4L2_CID_DV_CLASS_BASE + 0x1000)
 #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL   (V4L2_CID_DV_CLASS_BASE + 0x1001)
 #define V4L2_CID_ADV_RX_FREE_RUN_COLOR          (V4L2_CID_DV_CLASS_BASE + 0x1002)
diff --git a/include/media/davinci/vpbe_display.h b/include/media/davinci/vpbe_display.h
index 8dffffedbb59..637749a91432 100644
--- a/include/media/davinci/vpbe_display.h
+++ b/include/media/davinci/vpbe_display.h
@@ -16,6 +16,7 @@
 /* Header files */
 #include <linux/videodev2.h>
 #include <media/v4l2-common.h>
+#include <media/v4l2-fh.h>
 #include <media/videobuf2-dma-contig.h>
 #include <media/davinci/vpbe_types.h>
 #include <media/davinci/vpbe_osd.h>
@@ -94,8 +95,6 @@ struct vpbe_layer {
          * has selected
          */
         enum v4l2_memory memory;
-        /* Used to keep track of state of the priority */
-        struct v4l2_prio_state prio;
         /* Used to store pixel format */
         struct v4l2_pix_format pix_fmt;
         enum v4l2_field buf_field;
@@ -134,14 +133,13 @@ struct vpbe_display {
 
 /* File handle structure */
 struct vpbe_fh {
+        struct v4l2_fh fh;
         /* vpbe device structure */
         struct vpbe_display *disp_dev;
         /* pointer to layer object for opened device */
         struct vpbe_layer *layer;
         /* Indicates whether this file handle is doing IO */
         unsigned char io_allowed;
-        /* Used to keep track priority of this instance */
-        enum v4l2_priority prio;
 };
 
 struct buf_config_params {
diff --git a/include/media/davinci/vpfe_capture.h b/include/media/davinci/vpfe_capture.h
index cc973ed845a7..288772e6900a 100644
--- a/include/media/davinci/vpfe_capture.h
+++ b/include/media/davinci/vpfe_capture.h
@@ -26,6 +26,7 @@
 #include <linux/videodev2.h>
 #include <linux/clk.h>
 #include <linux/i2c.h>
+#include <media/v4l2-fh.h>
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-device.h>
 #include <media/videobuf-dma-contig.h>
@@ -110,8 +111,6 @@ struct vpfe_device {
         struct v4l2_device v4l2_dev;
         /* parent device */
         struct device *pdev;
-        /* Used to keep track of state of the priority */
-        struct v4l2_prio_state prio;
         /* number of open instances of the channel */
         u32 usrs;
         /* Indicates id of the field which is being displayed */
@@ -174,11 +173,10 @@ struct vpfe_device {
 
 /* File handle structure */
 struct vpfe_fh {
+        struct v4l2_fh fh;
         struct vpfe_device *vpfe_dev;
         /* Indicates whether this file handle is doing IO */
         u8 io_allowed;
-        /* Used to keep track priority of this instance */
-        enum v4l2_priority prio;
 };
 
 struct vpfe_config_params {
diff --git a/include/media/s5p_fimc.h b/include/media/exynos-fimc.h
index b975c285c8a9..aa44660e2041 100644
--- a/include/media/s5p_fimc.h
+++ b/include/media/exynos-fimc.h
@@ -61,41 +61,20 @@ enum fimc_bus_type {
 #define GRP_ID_FLITE            (1 << 13)
 #define GRP_ID_FIMC_IS          (1 << 14)
 
-struct i2c_board_info;
-
 /**
  * struct fimc_source_info - video source description required for the host
  *                           interface configuration
  *
- * @board_info: pointer to I2C subdevice's board info
- * @clk_frequency: frequency of the clock the host interface provides to sensor
  * @fimc_bus_type: FIMC camera input type
  * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
- * @i2c_bus_num: i2c control bus id the sensor is attached to
  * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
- * @clk_id: index of the SoC peripheral clock for sensors
  */
 struct fimc_source_info {
-        struct i2c_board_info *board_info;
-        unsigned long clk_frequency;
         enum fimc_bus_type fimc_bus_type;
         enum fimc_bus_type sensor_bus_type;
         u16 flags;
-        u16 i2c_bus_num;
         u16 mux_id;
-        u8 clk_id;
-};
-
-/**
- * struct s5p_platform_fimc - camera host interface platform data
- *
- * @source_info: properties of an image source for the host interface setup
- * @num_clients: the number of attached image sources
- */
-struct s5p_platform_fimc {
-        struct fimc_source_info *source_info;
-        int num_clients;
 };
 
 /*
diff --git a/include/media/media-device.h b/include/media/media-device.h
index 12155a9596c4..6e6db78f1ee2 100644
--- a/include/media/media-device.h
+++ b/include/media/media-device.h
@@ -87,7 +87,9 @@ struct media_device {
 /* media_devnode to media_device */
 #define to_media_device(node) container_of(node, struct media_device, devnode)
 
-int __must_check media_device_register(struct media_device *mdev);
+int __must_check __media_device_register(struct media_device *mdev,
+                                         struct module *owner);
+#define media_device_register(mdev) __media_device_register(mdev, THIS_MODULE)
 void media_device_unregister(struct media_device *mdev);
 
 int __must_check media_device_register_entity(struct media_device *mdev,
diff --git a/include/media/media-devnode.h b/include/media/media-devnode.h
index 3446af279fca..0dc7060f9625 100644
--- a/include/media/media-devnode.h
+++ b/include/media/media-devnode.h
@@ -82,7 +82,8 @@ struct media_devnode {
 /* dev to media_devnode */
 #define to_media_devnode(cd) container_of(cd, struct media_devnode, dev)
 
-int __must_check media_devnode_register(struct media_devnode *mdev);
+int __must_check media_devnode_register(struct media_devnode *mdev,
+                                        struct module *owner);
 void media_devnode_unregister(struct media_devnode *mdev);
 
 static inline struct media_devnode *media_devnode_data(struct file *filp)
diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h
index c9b1593923f6..ffb69da3ce9e 100644
--- a/include/media/v4l2-device.h
+++ b/include/media/v4l2-device.h
@@ -120,6 +120,14 @@ void v4l2_device_unregister_subdev(struct v4l2_subdev *sd);
 int __must_check
 v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev);
 
+/* Send a notification to v4l2_device. */
+static inline void v4l2_subdev_notify(struct v4l2_subdev *sd,
+                                      unsigned int notification, void *arg)
+{
+        if (sd && sd->v4l2_dev && sd->v4l2_dev->notify)
+                sd->v4l2_dev->notify(sd, notification, arg);
+}
+
 /* Iterate over all subdevs. */
 #define v4l2_device_for_each_subdev(sd, v4l2_dev)                       \
         list_for_each_entry(sd, &(v4l2_dev)->subdevs, list)
diff --git a/include/media/v4l2-event.h b/include/media/v4l2-event.h
index be05d019de25..1ab9045e52e3 100644
--- a/include/media/v4l2-event.h
+++ b/include/media/v4l2-event.h
@@ -132,4 +132,8 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh,
 void v4l2_event_unsubscribe_all(struct v4l2_fh *fh);
 int v4l2_event_subdev_unsubscribe(struct v4l2_subdev *sd, struct v4l2_fh *fh,
                                   struct v4l2_event_subscription *sub);
+int v4l2_src_change_event_subscribe(struct v4l2_fh *fh,
+                                const struct v4l2_event_subscription *sub);
+int v4l2_src_change_event_subdev_subscribe(struct v4l2_subdev *sd,
+                struct v4l2_fh *fh, struct v4l2_event_subscription *sub);
 #endif /* V4L2_EVENT_H */
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index 28f4d8c3cf7d..d7465725773d 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -159,8 +159,6 @@ struct v4l2_subdev_core_ops {
         int (*s_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
         int (*try_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
         int (*querymenu)(struct v4l2_subdev *sd, struct v4l2_querymenu *qm);
-        int (*g_std)(struct v4l2_subdev *sd, v4l2_std_id *norm);
-        int (*s_std)(struct v4l2_subdev *sd, v4l2_std_id norm);
         long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg);
 #ifdef CONFIG_COMPAT
         long (*compat_ioctl32)(struct v4l2_subdev *sd, unsigned int cmd,
@@ -234,15 +232,18 @@ struct v4l2_subdev_audio_ops {
 
 /* Indicates the @length field specifies maximum data length. */
 #define V4L2_MBUS_FRAME_DESC_FL_LEN_MAX         (1U << 0)
-/* Indicates user defined data format, i.e. non standard frame format. */
+/*
+ * Indicates that the format does not have line offsets, i.e. the
+ * receiver should use 1D DMA.
+ */
 #define V4L2_MBUS_FRAME_DESC_FL_BLOB            (1U << 1)
 
 /**
  * struct v4l2_mbus_frame_desc_entry - media bus frame description structure
  * @flags: V4L2_MBUS_FRAME_DESC_FL_* flags
  * @pixelcode: media bus pixel code, valid if FRAME_DESC_FL_BLOB is not set
- * @length: number of octets per frame, valid for compressed or unspecified
- *          formats
+ * @length: number of octets per frame, valid if V4L2_MBUS_FRAME_DESC_FL_BLOB
+ *          is set
  */
 struct v4l2_mbus_frame_desc_entry {
         u16 flags;
@@ -269,8 +270,11 @@ struct v4l2_mbus_frame_desc {
    g_std_output: get current standard for video OUTPUT devices. This is ignored
         by video input devices.
 
-   g_tvnorms_output: get v4l2_std_id with all standards supported by video
-        OUTPUT device. This is ignored by video input devices.
+   g_tvnorms: get v4l2_std_id with all standards supported by the video
+        CAPTURE device. This is ignored by video output devices.
+
+   g_tvnorms_output: get v4l2_std_id with all standards supported by the video
+        OUTPUT device. This is ignored by video capture devices.
 
    s_crystal_freq: sets the frequency of the crystal used to generate the
         clocks in Hz. An extra flags field allows device specific configuration
@@ -310,9 +314,12 @@ struct v4l2_mbus_frame_desc {
 struct v4l2_subdev_video_ops {
         int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
         int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags);
+        int (*g_std)(struct v4l2_subdev *sd, v4l2_std_id *norm);
+        int (*s_std)(struct v4l2_subdev *sd, v4l2_std_id norm);
         int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std);
         int (*g_std_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std);
+        int (*g_tvnorms)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*g_tvnorms_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*g_input_status)(struct v4l2_subdev *sd, u32 *status);
         int (*s_stream)(struct v4l2_subdev *sd, int enable);
@@ -331,12 +338,8 @@ struct v4l2_subdev_video_ops {
                         struct v4l2_dv_timings *timings);
         int (*g_dv_timings)(struct v4l2_subdev *sd,
                         struct v4l2_dv_timings *timings);
-        int (*enum_dv_timings)(struct v4l2_subdev *sd,
-                        struct v4l2_enum_dv_timings *timings);
         int (*query_dv_timings)(struct v4l2_subdev *sd,
                         struct v4l2_dv_timings *timings);
-        int (*dv_timings_cap)(struct v4l2_subdev *sd,
-                        struct v4l2_dv_timings_cap *cap);
         int (*enum_mbus_fmt)(struct v4l2_subdev *sd, unsigned int index,
                              enum v4l2_mbus_pixelcode *code);
         int (*enum_mbus_fsizes)(struct v4l2_subdev *sd,
@@ -510,6 +513,10 @@ struct v4l2_subdev_pad_ops {
                              struct v4l2_subdev_selection *sel);
         int (*get_edid)(struct v4l2_subdev *sd, struct v4l2_edid *edid);
         int (*set_edid)(struct v4l2_subdev *sd, struct v4l2_edid *edid);
+        int (*dv_timings_cap)(struct v4l2_subdev *sd,
+                              struct v4l2_dv_timings_cap *cap);
+        int (*enum_dv_timings)(struct v4l2_subdev *sd,
+                               struct v4l2_enum_dv_timings *timings);
 #ifdef CONFIG_MEDIA_CONTROLLER
         int (*link_validate)(struct v4l2_subdev *sd, struct media_link *link,
                              struct v4l2_subdev_format *source_fmt,
@@ -584,6 +591,7 @@ struct v4l2_subdev {
 #endif
         struct list_head list;
         struct module *owner;
+        bool owner_v4l2_dev;
         u32 flags;
         struct v4l2_device *v4l2_dev;
         const struct v4l2_subdev_ops *ops;
@@ -685,17 +693,12 @@ void v4l2_subdev_init(struct v4l2_subdev *sd,
 /* Call an ops of a v4l2_subdev, doing the right checks against
    NULL pointers.
 
-   Example: err = v4l2_subdev_call(sd, core, s_std, norm);
+   Example: err = v4l2_subdev_call(sd, video, s_std, norm);
  */
 #define v4l2_subdev_call(sd, o, f, args...)                             \
         (!(sd) ? -ENODEV : (((sd)->ops->o && (sd)->ops->o->f) ? \
                 (sd)->ops->o->f((sd) , ##args) : -ENOIOCTLCMD))
 
-/* Send a notification to v4l2_device. */
-#define v4l2_subdev_notify(sd, notification, arg)                          \
-        ((!(sd) || !(sd)->v4l2_dev || !(sd)->v4l2_dev->notify) ? -ENODEV : \
-         (sd)->v4l2_dev->notify((sd), (notification), (arg)))
-
 #define v4l2_subdev_has_op(sd, o, f) \
         ((sd)->ops->o && (sd)->ops->o->f)
 
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
index af4621109726..bca25dc53f9d 100644
--- a/include/media/videobuf2-core.h
+++ b/include/media/videobuf2-core.h
@@ -20,6 +20,7 @@
 
 struct vb2_alloc_ctx;
 struct vb2_fileio_data;
+struct vb2_threadio_data;
 
 /**
  * struct vb2_mem_ops - memory handling/memory allocator operations
@@ -323,7 +324,7 @@ struct vb2_ops {
         void (*buf_cleanup)(struct vb2_buffer *vb);
 
         int (*start_streaming)(struct vb2_queue *q, unsigned int count);
-        int (*stop_streaming)(struct vb2_queue *q);
+        void (*stop_streaming)(struct vb2_queue *q);
 
         void (*buf_queue)(struct vb2_buffer *vb);
 };
@@ -375,6 +376,7 @@ struct v4l2_fh;
  * @start_streaming_called: start_streaming() was called successfully and we
  *              started streaming.
  * @fileio:     file io emulator internal data, used only if emulator is active
+ * @threadio:   thread io internal data, used only if thread is active
  */
 struct vb2_queue {
         enum v4l2_buf_type              type;
@@ -411,6 +413,7 @@ struct vb2_queue {
         unsigned int                    start_streaming_called:1;
 
         struct vb2_fileio_data          *fileio;
+        struct vb2_threadio_data        *threadio;
 
 #ifdef CONFIG_VIDEO_ADV_DEBUG
         /*
@@ -461,6 +464,35 @@ size_t vb2_read(struct vb2_queue *q, char __user *data, size_t count,
                 loff_t *ppos, int nonblock);
 size_t vb2_write(struct vb2_queue *q, const char __user *data, size_t count,
                 loff_t *ppos, int nonblock);
+/**
+ * vb2_thread_fnc - callback function for use with vb2_thread
+ *
+ * This is called whenever a buffer is dequeued in the thread.
+ */
+typedef int (*vb2_thread_fnc)(struct vb2_buffer *vb, void *priv);
+
+/**
+ * vb2_thread_start() - start a thread for the given queue.
+ * @q:          videobuf queue
+ * @fnc:        callback function
+ * @priv:       priv pointer passed to the callback function
+ * @thread_name:the name of the thread. This will be prefixed with "vb2-".
+ *
+ * This starts a thread that will queue and dequeue until an error occurs
+ * or @vb2_thread_stop is called.
+ *
+ * This function should not be used for anything else but the videobuf2-dvb
+ * support. If you think you have another good use-case for this, then please
+ * contact the linux-media mailinglist first.
+ */
+int vb2_thread_start(struct vb2_queue *q, vb2_thread_fnc fnc, void *priv,
+                     const char *thread_name);
+
+/**
+ * vb2_thread_stop() - stop the thread for the given queue.
+ * @q:          videobuf queue
+ */
+int vb2_thread_stop(struct vb2_queue *q);
 
 /**
  * vb2_is_streaming() - return streaming status of the queue
@@ -472,6 +504,23 @@ static inline bool vb2_is_streaming(struct vb2_queue *q)
 }
 
 /**
+ * vb2_fileio_is_active() - return true if fileio is active.
+ * @q:          videobuf queue
+ *
+ * This returns true if read() or write() is used to stream the data
+ * as opposed to stream I/O. This is almost never an important distinction,
+ * except in rare cases. One such case is that using read() or write() to
+ * stream a format using V4L2_FIELD_ALTERNATE is not allowed since there
+ * is no way you can pass the field information of each buffer to/from
+ * userspace. A driver that supports this field format should check for
+ * this in the queue_setup op and reject it if this function returns true.
+ */
+static inline bool vb2_fileio_is_active(struct vb2_queue *q)
+{
+        return q->fileio;
+}
+
+/**
  * vb2_is_busy() - return busy status of the queue
  * @q:          videobuf queue
  *
diff --git a/include/media/videobuf2-dvb.h b/include/media/videobuf2-dvb.h
new file mode 100644
index 000000000000..8f61456f1394
--- /dev/null
+++ b/include/media/videobuf2-dvb.h
@@ -0,0 +1,58 @@
+#ifndef _VIDEOBUF2_DVB_H_
+#define _VIDEOBUF2_DVB_H_
+
+#include <dvbdev.h>
+#include <dmxdev.h>
+#include <dvb_demux.h>
+#include <dvb_net.h>
+#include <dvb_frontend.h>
+#include <media/videobuf2-core.h>
+
+struct vb2_dvb {
+        /* filling that the job of the driver */
+        char                    *name;
+        struct dvb_frontend     *frontend;
+        struct vb2_queue        dvbq;
+
+        /* video-buf-dvb state info */
+        struct mutex            lock;
+        int                     nfeeds;
+
+        /* vb2_dvb_(un)register manages this */
+        struct dvb_demux        demux;
+        struct dmxdev           dmxdev;
+        struct dmx_frontend     fe_hw;
+        struct dmx_frontend     fe_mem;
+        struct dvb_net          net;
+};
+
+struct vb2_dvb_frontend {
+        struct list_head felist;
+        int id;
+        struct vb2_dvb dvb;
+};
+
+struct vb2_dvb_frontends {
+        struct list_head felist;
+        struct mutex lock;
+        struct dvb_adapter adapter;
+        int active_fe_id; /* Indicates which frontend in the felist is in use */
+        int gate; /* Frontend with gate control 0=!MFE,1=fe0,2=fe1 etc */
+};
+
+int vb2_dvb_register_bus(struct vb2_dvb_frontends *f,
+                         struct module *module,
+                         void *adapter_priv,
+                         struct device *device,
+                         short *adapter_nr,
+                         int mfe_shared);
+
+void vb2_dvb_unregister_bus(struct vb2_dvb_frontends *f);
+
+struct vb2_dvb_frontend *vb2_dvb_alloc_frontend(struct vb2_dvb_frontends *f, int id);
+void vb2_dvb_dealloc_frontends(struct vb2_dvb_frontends *f);
+
+struct vb2_dvb_frontend *vb2_dvb_get_frontend(struct vb2_dvb_frontends *f, int id);
+int vb2_dvb_find_frontend(struct vb2_dvb_frontends *f, struct dvb_frontend *p);
+
+#endif                  /* _VIDEOBUF2_DVB_H_ */
diff --git a/include/net/inetpeer.h b/include/net/inetpeer.h
index 6efe73c79c52..058271bde27a 100644
--- a/include/net/inetpeer.h
+++ b/include/net/inetpeer.h
@@ -177,16 +177,9 @@ static inline void inet_peer_refcheck(const struct inet_peer *p)
 /* can be called with or without local BH being disabled */
 static inline int inet_getid(struct inet_peer *p, int more)
 {
-        int old, new;
         more++;
         inet_peer_refcheck(p);
-        do {
-                old = atomic_read(&p->ip_id_count);
-                new = old + more;
-                if (!new)
-                        new = 1;
-        } while (atomic_cmpxchg(&p->ip_id_count, old, new) != old);
-        return new;
+        return atomic_add_return(more, &p->ip_id_count) - more;
 }
 
 #endif /* _NET_INETPEER_H */
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index acd825182977..7ccef342f724 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -80,8 +80,8 @@ enum rdma_transport_type {
         RDMA_TRANSPORT_USNIC_UDP
 };
 
-enum rdma_transport_type
-rdma_node_get_transport(enum rdma_node_type node_type) __attribute_const__;
+__attribute_const__ enum rdma_transport_type
+rdma_node_get_transport(enum rdma_node_type node_type);
 
 enum rdma_link_layer {
         IB_LINK_LAYER_UNSPECIFIED,
@@ -466,14 +466,14 @@ enum ib_rate {
  * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
  * @rate: rate to convert.
  */
-int ib_rate_to_mult(enum ib_rate rate) __attribute_const__;
+__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
 
 /**
  * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
  * For example, IB_RATE_2_5_GBPS will be converted to 2500.
  * @rate: rate to convert.
  */
-int ib_rate_to_mbps(enum ib_rate rate) __attribute_const__;
+__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
 
 enum ib_mr_create_flags {
         IB_MR_SIGNATURE_EN = 1,
@@ -604,7 +604,7 @@ struct ib_mr_status {
  * enum.
  * @mult: multiple to convert.
  */
-enum ib_rate mult_to_ib_rate(int mult) __attribute_const__;
+__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
 
 struct ib_ah_attr {
         struct ib_global_route  grh;
@@ -783,6 +783,7 @@ enum ib_qp_create_flags {
         IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK   = 1 << 1,
         IB_QP_CREATE_NETIF_QP                   = 1 << 5,
         IB_QP_CREATE_SIGNATURE_EN               = 1 << 6,
+        IB_QP_CREATE_USE_GFP_NOIO               = 1 << 7,
         /* reserve bits 26-31 for low level drivers' internal use */
         IB_QP_CREATE_RESERVED_START             = 1 << 26,
         IB_QP_CREATE_RESERVED_END               = 1 << 31,
diff --git a/include/rdma/iw_portmap.h b/include/rdma/iw_portmap.h
new file mode 100644
index 000000000000..928b2775e992
--- /dev/null
+++ b/include/rdma/iw_portmap.h
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2014 Intel Corporation. All rights reserved.
+ * Copyright (c) 2014 Chelsio, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef _IW_PORTMAP_H
+#define _IW_PORTMAP_H
+
+#define IWPM_ULIBNAME_SIZE      32
+#define IWPM_DEVNAME_SIZE       32
+#define IWPM_IFNAME_SIZE        16
+#define IWPM_IPADDR_SIZE        16
+
+enum {
+        IWPM_INVALID_NLMSG_ERR = 10,
+        IWPM_CREATE_MAPPING_ERR,
+        IWPM_DUPLICATE_MAPPING_ERR,
+        IWPM_UNKNOWN_MAPPING_ERR,
+        IWPM_CLIENT_DEV_INFO_ERR,
+        IWPM_USER_LIB_INFO_ERR,
+        IWPM_REMOTE_QUERY_REJECT
+};
+
+struct iwpm_dev_data {
+        char dev_name[IWPM_DEVNAME_SIZE];
+        char if_name[IWPM_IFNAME_SIZE];
+};
+
+struct iwpm_sa_data {
+        struct sockaddr_storage loc_addr;
+        struct sockaddr_storage mapped_loc_addr;
+        struct sockaddr_storage rem_addr;
+        struct sockaddr_storage mapped_rem_addr;
+};
+
+/**
+ * iwpm_init - Allocate resources for the iwarp port mapper
+ *
+ * Should be called when network interface goes up.
+ */
+int iwpm_init(u8);
+
+/**
+ * iwpm_exit - Deallocate resources for the iwarp port mapper
+ *
+ * Should be called when network interface goes down.
+ */
+int iwpm_exit(u8);
+
+/**
+ * iwpm_valid_pid - Check if the userspace iwarp port mapper pid is valid
+ *
+ * Returns true if the pid is greater than zero, otherwise returns false
+ */
+int iwpm_valid_pid(void);
+
+/**
+ * iwpm_register_pid - Send a netlink query to userspace
+ *                     to get the iwarp port mapper pid
+ * @pm_msg: Contains driver info to send to the userspace port mapper
+ * @nl_client: The index of the netlink client
+ */
+int iwpm_register_pid(struct iwpm_dev_data *pm_msg, u8 nl_client);
+
+/**
+ * iwpm_add_mapping - Send a netlink add mapping request to
+ *                    the userspace port mapper
+ * @pm_msg: Contains the local ip/tcp address info to send
+ * @nl_client: The index of the netlink client
+ *
+ * If the request is successful, the pm_msg stores
+ * the port mapper response (mapped address info)
+ */
+int iwpm_add_mapping(struct iwpm_sa_data *pm_msg, u8 nl_client);
+
+/**
+ * iwpm_add_and_query_mapping - Send a netlink add and query mapping request
+ *                               to the userspace port mapper
+ * @pm_msg: Contains the local and remote ip/tcp address info to send
+ * @nl_client: The index of the netlink client
+ *
+ * If the request is successful, the pm_msg stores the
+ * port mapper response (mapped local and remote address info)
+ */
+int iwpm_add_and_query_mapping(struct iwpm_sa_data *pm_msg, u8 nl_client);
+
+/**
+ * iwpm_remove_mapping - Send a netlink remove mapping request
+ *                       to the userspace port mapper
+ *
+ * @local_addr: Local ip/tcp address to remove
+ * @nl_client: The index of the netlink client
+ */
+int iwpm_remove_mapping(struct sockaddr_storage *local_addr, u8 nl_client);
+
+/**
+ * iwpm_register_pid_cb - Process the port mapper response to
+ *                        iwpm_register_pid query
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ *
+ * If successful, the function receives the userspace port mapper pid
+ * which is used in future communication with the port mapper
+ */
+int iwpm_register_pid_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_add_mapping_cb - Process the port mapper response to
+ *                       iwpm_add_mapping request
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ */
+int iwpm_add_mapping_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_add_and_query_mapping_cb - Process the port mapper response to
+ *                                 iwpm_add_and_query_mapping request
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ */
+int iwpm_add_and_query_mapping_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_mapping_error_cb - Process port mapper notification for error
+ *
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ */
+int iwpm_mapping_error_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_mapping_info_cb - Process a notification that the userspace
+ *                        port mapper daemon is started
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ *
+ * Using the received port mapper pid, send all the local mapping
+ * info records to the userspace port mapper
+ */
+int iwpm_mapping_info_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_ack_mapping_info_cb - Process the port mapper ack for
+ *                            the provided local mapping info records
+ * @skb:
+ * @cb: Contains the received message (payload and netlink header)
+ */
+int iwpm_ack_mapping_info_cb(struct sk_buff *, struct netlink_callback *);
+
+/**
+ * iwpm_create_mapinfo - Store local and mapped IPv4/IPv6 address
+ *                       info in a hash table
+ * @local_addr: Local ip/tcp address
+ * @mapped_addr: Mapped local ip/tcp address
+ * @nl_client: The index of the netlink client
+ */
+int iwpm_create_mapinfo(struct sockaddr_storage *local_addr,
+                        struct sockaddr_storage *mapped_addr, u8 nl_client);
+
+/**
+ * iwpm_remove_mapinfo - Remove local and mapped IPv4/IPv6 address
+ *                       info from the hash table
+ * @local_addr: Local ip/tcp address
+ * @mapped_addr: Mapped local ip/tcp address
+ *
+ * Returns err code if mapping info is not found in the hash table,
+ * otherwise returns 0
+ */
+int iwpm_remove_mapinfo(struct sockaddr_storage *local_addr,
+                        struct sockaddr_storage *mapped_addr);
+
+#endif /* _IW_PORTMAP_H */
diff --git a/include/rdma/rdma_netlink.h b/include/rdma/rdma_netlink.h
index e38de79eeb48..0790882e0c9b 100644
--- a/include/rdma/rdma_netlink.h
+++ b/include/rdma/rdma_netlink.h
@@ -43,7 +43,7 @@ int ibnl_remove_client(int index);
  * Returns the allocated buffer on success and NULL on failure.
  */
 void *ibnl_put_msg(struct sk_buff *skb, struct nlmsghdr **nlh, int seq,
-                   int len, int client, int op);
+                   int len, int client, int op, int flags);
 /**
  * Put a new attribute in a supplied skb.
  * @skb: The netlink skb.
@@ -56,4 +56,25 @@ void *ibnl_put_msg(struct sk_buff *skb, struct nlmsghdr **nlh, int seq,
 int ibnl_put_attr(struct sk_buff *skb, struct nlmsghdr *nlh,
                   int len, void *data, int type);
 
+/**
+ * Send the supplied skb to a specific userspace PID.
+ * @skb: The netlink skb
+ * @nlh: Header of the netlink message to send
+ * @pid: Userspace netlink process ID
+ * Returns 0 on success or a negative error code.
+ */
+int ibnl_unicast(struct sk_buff *skb, struct nlmsghdr *nlh,
+                        __u32 pid);
+
+/**
+ * Send the supplied skb to a netlink group.
+ * @skb: The netlink skb
+ * @nlh: Header of the netlink message to send
+ * @group: Netlink group ID
+ * @flags: allocation flags
+ * Returns 0 on success or a negative error code.
+ */
+int ibnl_multicast(struct sk_buff *skb, struct nlmsghdr *nlh,
+                        unsigned int group, gfp_t flags);
+
 #endif /* _RDMA_NETLINK_H */
diff --git a/include/scsi/osd_protocol.h b/include/scsi/osd_protocol.h
index 25ac6283b9c7..a2594afe05c7 100644
--- a/include/scsi/osd_protocol.h
+++ b/include/scsi/osd_protocol.h
@@ -263,16 +263,16 @@ static inline struct osd_cdb_head *osd_cdb_head(struct osd_cdb *ocdb)
  * Ex name = FORMAT_OSD we have OSD_ACT_FORMAT_OSD && OSDv1_ACT_FORMAT_OSD
  */
 #define OSD_ACT___(Name, Num) \
-        OSD_ACT_##Name = __constant_cpu_to_be16(0x8880 + Num), \
-        OSDv1_ACT_##Name = __constant_cpu_to_be16(0x8800 + Num),
+        OSD_ACT_##Name = cpu_to_be16(0x8880 + Num), \
+        OSDv1_ACT_##Name = cpu_to_be16(0x8800 + Num),
 
 /* V2 only actions */
 #define OSD_ACT_V2(Name, Num) \
-        OSD_ACT_##Name = __constant_cpu_to_be16(0x8880 + Num),
+        OSD_ACT_##Name = cpu_to_be16(0x8880 + Num),
 
 #define OSD_ACT_V1_V2(Name, Num1, Num2) \
-        OSD_ACT_##Name = __constant_cpu_to_be16(Num2), \
-        OSDv1_ACT_##Name = __constant_cpu_to_be16(Num1),
+        OSD_ACT_##Name = cpu_to_be16(Num2), \
+        OSDv1_ACT_##Name = cpu_to_be16(Num1),
 
 enum osd_service_actions {
         OSD_ACT_V2(OBJECT_STRUCTURE_CHECK,      0x00)
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index dd7c998221b3..e016e2ac38df 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -133,6 +133,15 @@ struct scsi_cmnd {
         unsigned char tag;      /* SCSI-II queued command tag */
 };
 
+/*
+ * Return the driver private allocation behind the command.
+ * Only works if cmd_size is set in the host template.
+ */
+static inline void *scsi_cmd_priv(struct scsi_cmnd *cmd)
+{
+        return cmd + 1;
+}
+
 /* make sure not to use it with REQ_TYPE_BLOCK_PC commands */
 static inline struct scsi_driver *scsi_cmd_to_driver(struct scsi_cmnd *cmd)
 {
diff --git a/include/scsi/scsi_driver.h b/include/scsi/scsi_driver.h
index 20fdfc2526ad..36c4114ed9bc 100644
--- a/include/scsi/scsi_driver.h
+++ b/include/scsi/scsi_driver.h
@@ -4,17 +4,17 @@
 #include <linux/device.h>
 
 struct module;
+struct request;
 struct scsi_cmnd;
 struct scsi_device;
-struct request;
-struct request_queue;
-
 
 struct scsi_driver {
         struct module           *owner;
         struct device_driver    gendrv;
 
         void (*rescan)(struct device *);
+        int (*init_command)(struct scsi_cmnd *);
+        void (*uninit_command)(struct scsi_cmnd *);
         int (*done)(struct scsi_cmnd *);
         int (*eh_action)(struct scsi_cmnd *, int);
 };
@@ -31,8 +31,5 @@ extern int scsi_register_interface(struct class_interface *);
 
 int scsi_setup_blk_pc_cmnd(struct scsi_device *sdev, struct request *req);
 int scsi_setup_fs_cmnd(struct scsi_device *sdev, struct request *req);
-int scsi_prep_state_check(struct scsi_device *sdev, struct request *req);
-int scsi_prep_return(struct request_queue *q, struct request *req, int ret);
-int scsi_prep_fn(struct request_queue *, struct request *);
 
 #endif /* _SCSI_SCSI_DRIVER_H */
diff --git a/include/sound/atmel-ac97c.h b/include/sound/atmel-ac97c.h
index e6aabdb45865..00e6c289a936 100644
--- a/include/sound/atmel-ac97c.h
+++ b/include/sound/atmel-ac97c.h
@@ -23,7 +23,6 @@
  * @reset_pin: GPIO pin wired to the reset input on the external AC97 codec,
  *             optional to use, set to -ENODEV if not in use. AC97 layer will
  *             try to do a software reset of the external codec anyway.
- * @flags: Flags for which directions should be enabled.
  *
  * If the user do not want to use a DMA channel for playback or capture, i.e.
  * only one feature is required on the board. The slave for playback or capture
@@ -33,7 +32,6 @@
 struct ac97c_platform_data {
         struct dw_dma_slave     rx_dws;
         struct dw_dma_slave     tx_dws;
-        unsigned int            flags;
         int                     reset_pin;
 };
 
diff --git a/include/sound/core.h b/include/sound/core.h
index d3f5f818e0b9..eedda2cdfe57 100644
--- a/include/sound/core.h
+++ b/include/sound/core.h
@@ -282,13 +282,6 @@ int snd_card_new(struct device *parent, int idx, const char *xid,
                  struct module *module, int extra_size,
                  struct snd_card **card_ret);
 
-static inline int __deprecated
-snd_card_create(int idx, const char *id, struct module *module, int extra_size,
-                struct snd_card **ret)
-{
-        return snd_card_new(NULL, idx, id, module, extra_size, ret);
-}
-
 int snd_card_disconnect(struct snd_card *card);
 int snd_card_free(struct snd_card *card);
 int snd_card_free_when_closed(struct snd_card *card);
diff --git a/include/sound/cs42l56.h b/include/sound/cs42l56.h
new file mode 100644
index 000000000000..2467c8ff132c
--- /dev/null
+++ b/include/sound/cs42l56.h
@@ -0,0 +1,48 @@
+/*
+ * linux/sound/cs42l56.h -- Platform data for CS42L56
+ *
+ * Copyright (c) 2014 Cirrus Logic Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __CS42L56_H
+#define __CS42L56_H
+
+struct cs42l56_platform_data {
+
+        /* GPIO for Reset */
+        unsigned int gpio_nreset;
+
+        /* MICBIAS Level. Check datasheet Pg48 */
+        unsigned int micbias_lvl;
+
+        /* Analog Input 1A Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain1a_ref_cfg;
+
+        /* Analog Input 2A Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain2a_ref_cfg;
+
+        /* Analog Input 1B Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain1b_ref_cfg;
+
+        /* Analog Input 2B Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain2b_ref_cfg;
+
+        /* Charge Pump Freq. Check datasheet Pg62 */
+        unsigned int chgfreq;
+
+        /* HighPass Filter Right Channel Corner Frequency */
+        unsigned int hpfb_freq;
+
+        /* HighPass Filter Left Channel Corner Frequency */
+        unsigned int hpfa_freq;
+
+        /* Adaptive Power Control for LO/HP */
+        unsigned int adaptive_pwr;
+
+};
+
+#endif /* __CS42L56_H */
diff --git a/include/sound/omap-pcm.h b/include/sound/omap-pcm.h
new file mode 100644
index 000000000000..c1d2f31d71e9
--- /dev/null
+++ b/include/sound/omap-pcm.h
@@ -0,0 +1,30 @@
+/*
+ * omap-pcm.h - OMAP PCM driver
+ *
+ * Copyright (C) 2014 Texas Instruments, Inc.
+ *
+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef __OMAP_PCM_H__
+#define __OMAP_PCM_H__
+
+#if IS_ENABLED(CONFIG_SND_OMAP_SOC)
+int omap_pcm_platform_register(struct device *dev);
+#else
+static inline int omap_pcm_platform_register(struct device *dev)
+{
+        return 0;
+}
+#endif /* CONFIG_SND_OMAP_SOC */
+
+#endif /* __OMAP_PCM_H__ */
diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
index 34a3c02a4576..f4a706f82cb7 100644
--- a/include/sound/rcar_snd.h
+++ b/include/sound/rcar_snd.h
@@ -34,47 +34,39 @@
  * B : SSI direction
  */
 #define RSND_SSI_CLK_PIN_SHARE          (1 << 31)
-#define RSND_SSI_PLAY                   (1 << 24)
 
 #define RSND_SSI(_dma_id, _pio_irq, _flags)             \
 { .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
-#define RSND_SSI_SET(_dai_id, _dma_id, _pio_irq, _flags)        \
-{ .dai_id = _dai_id, .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
 #define RSND_SSI_UNUSED \
-{ .dai_id = -1, .dma_id = -1, .pio_irq = -1, .flags = 0 }
+{ .dma_id = -1, .pio_irq = -1, .flags = 0 }
 
 struct rsnd_ssi_platform_info {
-        int dai_id;     /* will be removed */
         int dma_id;
         int pio_irq;
         u32 flags;
 };
 
-/*
- * flags
- */
-#define RSND_SCU_USE_HPBIF              (1 << 31) /* it needs RSND_SSI_DEPENDENT */
-
 #define RSND_SRC(rate, _dma_id)                                         \
-{ .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
-#define RSND_SRC_SET(rate, _dma_id)             \
-        { .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
+{ .convert_rate = rate, .dma_id = _dma_id, }
 #define RSND_SRC_UNUSED                         \
-        { .flags = 0, .convert_rate = 0, .dma_id = 0, }
-
-#define rsnd_scu_platform_info  rsnd_src_platform_info
-#define src_info                scu_info
-#define src_info_nr             scu_info_nr
+{ .convert_rate = 0, .dma_id = -1, }
 
 struct rsnd_src_platform_info {
-        u32 flags;
         u32 convert_rate; /* sampling rate convert */
         int dma_id; /* for Gen2 SCU */
 };
 
+/*
+ * flags
+ */
+struct rsnd_dvc_platform_info {
+        u32 flags;
+};
+
 struct rsnd_dai_path_info {
         struct rsnd_ssi_platform_info *ssi;
         struct rsnd_src_platform_info *src;
+        struct rsnd_dvc_platform_info *dvc;
 };
 
 struct rsnd_dai_platform_info {
@@ -99,6 +91,8 @@ struct rcar_snd_info {
         int ssi_info_nr;
         struct rsnd_src_platform_info *src_info;
         int src_info_nr;
+        struct rsnd_dvc_platform_info *dvc_info;
+        int dvc_info_nr;
         struct rsnd_dai_platform_info *dai_info;
         int dai_info_nr;
         int (*start)(int id);
diff --git a/include/sound/rt5640.h b/include/sound/rt5640.h
index 27cc75ed67f8..59d26dd81e45 100644
--- a/include/sound/rt5640.h
+++ b/include/sound/rt5640.h
@@ -16,6 +16,10 @@ struct rt5640_platform_data {
         bool in1_diff;
         bool in2_diff;
 
+        bool dmic_en;
+        bool dmic1_data_pin; /* 0 = IN1P; 1 = GPIO3 */
+        bool dmic2_data_pin; /* 0 = IN1N; 1 = GPIO4 */
+
         int ldo1_en; /* GPIO for LDO1_EN */
 };
 
diff --git a/include/sound/rt5645.h b/include/sound/rt5645.h
new file mode 100644
index 000000000000..1de744c242f6
--- /dev/null
+++ b/include/sound/rt5645.h
@@ -0,0 +1,25 @@
+/*
+ * linux/sound/rt5645.h -- Platform data for RT5645
+ *
+ * Copyright 2013 Realtek Microelectronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5645_H
+#define __LINUX_SND_RT5645_H
+
+struct rt5645_platform_data {
+        /* IN2 can optionally be differential */
+        bool in2_diff;
+
+        bool dmic_en;
+        unsigned int dmic1_data_pin;
+        /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
+        unsigned int dmic2_data_pin;
+        /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
+};
+
+#endif
diff --git a/include/sound/rt5651.h b/include/sound/rt5651.h
new file mode 100644
index 000000000000..d35de758dfb5
--- /dev/null
+++ b/include/sound/rt5651.h
@@ -0,0 +1,21 @@
+/*
+ * linux/sound/rt286.h -- Platform data for RT286
+ *
+ * Copyright 2013 Realtek Microelectronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5651_H
+#define __LINUX_SND_RT5651_H
+
+struct rt5651_platform_data {
+        /* IN2 can optionally be differential */
+        bool in2_diff;
+
+        bool dmic_en;
+};
+
+#endif
diff --git a/include/sound/rt5677.h b/include/sound/rt5677.h
new file mode 100644
index 000000000000..3da14313bcfc
--- /dev/null
+++ b/include/sound/rt5677.h
@@ -0,0 +1,21 @@
+/*
+ * linux/sound/rt5677.h -- Platform data for RT5677
+ *
+ * Copyright 2013 Realtek Semiconductor Corp.
+ * Author: Oder Chiou <oder_chiou@realtek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5677_H
+#define __LINUX_SND_RT5677_H
+
+struct rt5677_platform_data {
+        /* IN1 IN2 can optionally be differential */
+        bool in1_diff;
+        bool in2_diff;
+};
+
+#endif
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index fad76769f153..688f2ba8009f 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -252,7 +252,6 @@ struct snd_soc_dai {
         unsigned int symmetric_rates:1;
         unsigned int symmetric_channels:1;
         unsigned int symmetric_samplebits:1;
-        struct snd_pcm_runtime *runtime;
         unsigned int active;
         unsigned char probed:1;
 
@@ -277,7 +276,6 @@ struct snd_soc_dai {
         struct snd_soc_card *card;
 
         struct list_head list;
-        struct list_head card_list;
 };
 
 static inline void *snd_soc_dai_get_dma_data(const struct snd_soc_dai *dai,
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index ef78f562f4a8..6b59471cdf44 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -107,10 +107,6 @@ struct device;
 {       .id = snd_soc_dapm_mux, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1}
-#define SND_SOC_DAPM_VIRT_MUX(wname, wreg, wshift, winvert, wcontrols) \
-        SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
-#define SND_SOC_DAPM_VALUE_MUX(wname, wreg, wshift, winvert, wcontrols) \
-        SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
 
 /* Simplified versions of above macros, assuming wncontrols = ARRAY_SIZE(wcontrols) */
 #define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\
@@ -166,10 +162,6 @@ struct device;
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1, \
         .event = wevent, .event_flags = wflags}
-#define SND_SOC_DAPM_VIRT_MUX_E(wname, wreg, wshift, winvert, wcontrols, \
-        wevent, wflags) \
-        SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, wevent, \
-                wflags)
 
 /* additional sequencing control within an event type */
 #define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \
@@ -256,9 +248,8 @@ struct device;
 /* generic widgets */
 #define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \
 {       .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \
-        .reg = -((wreg) + 1), .shift = wshift, .mask = wmask, \
-        .on_val = won_val, .off_val = woff_val, .event = dapm_reg_event, \
-        .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
+        .reg = wreg, .shift = wshift, .mask = wmask, \
+        .on_val = won_val, .off_val = woff_val, }
 #define SND_SOC_DAPM_SUPPLY(wname, wreg, wshift, winvert, wevent, wflags) \
 {       .id = snd_soc_dapm_supply, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
@@ -305,16 +296,12 @@ struct device;
         .get = snd_soc_dapm_get_enum_double, \
         .put = snd_soc_dapm_put_enum_double, \
         .private_value = (unsigned long)&xenum }
-#define SOC_DAPM_ENUM_VIRT(xname, xenum) \
-        SOC_DAPM_ENUM(xname, xenum)
 #define SOC_DAPM_ENUM_EXT(xname, xenum, xget, xput) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
         .info = snd_soc_info_enum_double, \
         .get = xget, \
         .put = xput, \
         .private_value = (unsigned long)&xenum }
-#define SOC_DAPM_VALUE_ENUM(xname, xenum) \
-        SOC_DAPM_ENUM(xname, xenum)
 #define SOC_DAPM_PIN_SWITCH(xname) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname " Switch", \
         .info = snd_soc_dapm_info_pin_switch, \
@@ -362,8 +349,6 @@ struct regulator;
 struct snd_soc_dapm_widget_list;
 struct snd_soc_dapm_update;
 
-int dapm_reg_event(struct snd_soc_dapm_widget *w,
-                   struct snd_kcontrol *kcontrol, int event);
 int dapm_regulator_event(struct snd_soc_dapm_widget *w,
                          struct snd_kcontrol *kcontrol, int event);
 int dapm_clock_event(struct snd_soc_dapm_widget *w,
@@ -606,6 +591,7 @@ struct snd_soc_dapm_context {
                              enum snd_soc_dapm_type, int);
 
         struct device *dev; /* from parent - for debug */
+        struct snd_soc_component *component; /* parent component */
         struct snd_soc_codec *codec; /* parent codec */
         struct snd_soc_platform *platform; /* parent platform */
         struct snd_soc_card *card; /* parent card */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 0b83168d8ff4..ed9e2d7e5fdc 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -196,8 +196,6 @@
         .info = snd_soc_info_enum_double, \
         .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
         .private_value = (unsigned long)&xenum }
-#define SOC_VALUE_ENUM(xname, xenum) \
-        SOC_ENUM(xname, xenum)
 #define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
          xhandler_get, xhandler_put) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
@@ -266,6 +264,13 @@
                 {.base = xbase, .num_regs = xregs,            \
                  .mask = xmask }) }
 
+#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \
+{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+        .info = snd_soc_bytes_info_ext, \
+        .get = xhandler_get, .put = xhandler_put, \
+        .private_value = (unsigned long)&(struct soc_bytes_ext) \
+                {.max = xcount} }
+
 #define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
                 xmin, xmax, xinvert) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@@ -377,6 +382,8 @@ int snd_soc_resume(struct device *dev);
 int snd_soc_poweroff(struct device *dev);
 int snd_soc_register_platform(struct device *dev,
                 const struct snd_soc_platform_driver *platform_drv);
+int devm_snd_soc_register_platform(struct device *dev,
+                const struct snd_soc_platform_driver *platform_drv);
 void snd_soc_unregister_platform(struct device *dev);
 int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
                 const struct snd_soc_platform_driver *platform_drv);
@@ -393,14 +400,6 @@ int devm_snd_soc_register_component(struct device *dev,
                          const struct snd_soc_component_driver *cmpnt_drv,
                          struct snd_soc_dai_driver *dai_drv, int num_dai);
 void snd_soc_unregister_component(struct device *dev);
-int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
-                               struct regmap *regmap);
 int snd_soc_cache_sync(struct snd_soc_codec *codec);
 int snd_soc_cache_init(struct snd_soc_codec *codec);
 int snd_soc_cache_exit(struct snd_soc_codec *codec);
@@ -453,6 +452,9 @@ int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
 #ifdef CONFIG_GPIOLIB
 int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
                         struct snd_soc_jack_gpio *gpios);
+int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
+                            struct snd_soc_jack *jack,
+                            int count, struct snd_soc_jack_gpio *gpios);
 void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
                         struct snd_soc_jack_gpio *gpios);
 #else
@@ -462,6 +464,14 @@ static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
         return 0;
 }
 
+static inline int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
+                                          struct snd_soc_jack *jack,
+                                          int count,
+                                          struct snd_soc_jack_gpio *gpios)
+{
+        return 0;
+}
+
 static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
                                            struct snd_soc_jack_gpio *gpios)
 {
@@ -469,12 +479,12 @@ static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
 #endif
 
 /* codec register bit access */
-int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
+int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg,
                                 unsigned int mask, unsigned int value);
 int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
-                               unsigned short reg, unsigned int mask,
+                               unsigned int reg, unsigned int mask,
                                unsigned int value);
-int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
+int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg,
                                 unsigned int mask, unsigned int value);
 
 int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
@@ -540,6 +550,8 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
                       struct snd_ctl_elem_value *ucontrol);
 int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
                       struct snd_ctl_elem_value *ucontrol);
+int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol,
+        struct snd_ctl_elem_info *ucontrol);
 int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
         struct snd_ctl_elem_info *uinfo);
 int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
@@ -586,8 +598,12 @@ struct snd_soc_jack_zone {
 /**
  * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
  *
- * @gpio:         gpio number
- * @name:         gpio name
+ * @gpio:         legacy gpio number
+ * @idx:          gpio descriptor index within the function of the GPIO
+ *                consumer device
+ * @gpiod_dev     GPIO consumer device
+ * @name:         gpio name. Also as connection ID for the GPIO consumer
+ *                device function name lookup
  * @report:       value to report when jack detected
  * @invert:       report presence in low state
  * @debouce_time: debouce time in ms
@@ -598,6 +614,8 @@ struct snd_soc_jack_zone {
  */
 struct snd_soc_jack_gpio {
         unsigned int gpio;
+        unsigned int idx;
+        struct device *gpiod_dev;
         const char *name;
         int report;
         int invert;
@@ -606,6 +624,7 @@ struct snd_soc_jack_gpio {
 
         struct snd_soc_jack *jack;
         struct delayed_work work;
+        struct gpio_desc *desc;
 
         void *data;
         int (*jack_status_check)(void *data);
@@ -668,6 +687,7 @@ struct snd_soc_component {
         unsigned int active;
 
         unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
+        unsigned int registered_as_component:1;
 
         struct list_head list;
 
@@ -677,6 +697,14 @@ struct snd_soc_component {
         const struct snd_soc_component_driver *driver;
 
         struct list_head dai_list;
+
+        int (*read)(struct snd_soc_component *, unsigned int, unsigned int *);
+        int (*write)(struct snd_soc_component *, unsigned int, unsigned int);
+
+        struct regmap *regmap;
+        int val_bytes;
+
+        struct mutex io_mutex;
 };
 
 /* SoC Audio Codec device */
@@ -691,10 +719,6 @@ struct snd_soc_codec {
         struct snd_soc_card *card;
         struct list_head list;
         struct list_head card_list;
-        int num_dai;
-        int (*volatile_register)(struct snd_soc_codec *, unsigned int);
-        int (*readable_register)(struct snd_soc_codec *, unsigned int);
-        int (*writable_register)(struct snd_soc_codec *, unsigned int);
 
         /* runtime */
         struct snd_ac97 *ac97;  /* for ad-hoc ac97 devices */
@@ -704,18 +728,14 @@ struct snd_soc_codec {
         unsigned int ac97_registered:1; /* Codec has been AC97 registered */
         unsigned int ac97_created:1; /* Codec has been created by SoC */
         unsigned int cache_init:1; /* codec cache has been initialized */
-        unsigned int using_regmap:1; /* using regmap access */
         u32 cache_only;  /* Suppress writes to hardware */
         u32 cache_sync; /* Cache needs to be synced to hardware */
 
         /* codec IO */
         void *control_data; /* codec control (i2c/3wire) data */
         hw_write_t hw_write;
-        unsigned int (*read)(struct snd_soc_codec *, unsigned int);
-        int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
         void *reg_cache;
         struct mutex cache_rw_mutex;
-        int val_bytes;
 
         /* component */
         struct snd_soc_component component;
@@ -754,13 +774,9 @@ struct snd_soc_codec_driver {
                 unsigned int freq_in, unsigned int freq_out);
 
         /* codec IO */
+        struct regmap *(*get_regmap)(struct device *);
         unsigned int (*read)(struct snd_soc_codec *, unsigned int);
         int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
-        int (*display_register)(struct snd_soc_codec *, char *,
-                                size_t, unsigned int);
-        int (*volatile_register)(struct snd_soc_codec *, unsigned int);
-        int (*readable_register)(struct snd_soc_codec *, unsigned int);
-        int (*writable_register)(struct snd_soc_codec *, unsigned int);
         unsigned int reg_cache_size;
         short reg_cache_step;
         short reg_word_size;
@@ -791,6 +807,7 @@ struct snd_soc_platform_driver {
         int (*remove)(struct snd_soc_platform *);
         int (*suspend)(struct snd_soc_dai *dai);
         int (*resume)(struct snd_soc_dai *dai);
+        struct snd_soc_component_driver component_driver;
 
         /* pcm creation and destruction */
         int (*pcm_new)(struct snd_soc_pcm_runtime *);
@@ -835,7 +852,6 @@ struct snd_soc_platform {
         int id;
         struct device *dev;
         const struct snd_soc_platform_driver *driver;
-        struct mutex mutex;
 
         unsigned int suspended:1; /* platform is suspended */
         unsigned int probed:1;
@@ -844,6 +860,8 @@ struct snd_soc_platform {
         struct list_head list;
         struct list_head card_list;
 
+        struct snd_soc_component component;
+
         struct snd_soc_dapm_context dapm;
 
 #ifdef CONFIG_DEBUG_FS
@@ -931,7 +949,12 @@ struct snd_soc_dai_link {
 };
 
 struct snd_soc_codec_conf {
+        /*
+         * specify device either by device name, or by
+         * DT/OF node, but not both.
+         */
         const char *dev_name;
+        const struct device_node *of_node;
 
         /*
          * optional map of kcontrol, widget and path name prefixes that are
@@ -942,7 +965,13 @@ struct snd_soc_codec_conf {
 
 struct snd_soc_aux_dev {
         const char *name;               /* Codec name */
-        const char *codec_name;         /* for multi-codec */
+
+        /*
+         * specify multi-codec either by device name, or by
+         * DT/OF node, but not both.
+         */
+        const char *codec_name;
+        const struct device_node *codec_of_node;
 
         /* codec/machine specific init - e.g. add machine controls */
         int (*init)(struct snd_soc_dapm_context *dapm);
@@ -957,7 +986,6 @@ struct snd_soc_card {
         struct snd_card *snd_card;
         struct module *owner;
 
-        struct list_head list;
         struct mutex mutex;
         struct mutex dapm_mutex;
 
@@ -1020,7 +1048,6 @@ struct snd_soc_card {
         /* lists of probed devices belonging to this card */
         struct list_head codec_dev_list;
         struct list_head platform_dev_list;
-        struct list_head dai_dev_list;
 
         struct list_head widgets;
         struct list_head paths;
@@ -1090,6 +1117,10 @@ struct soc_bytes {
         u32 mask;
 };
 
+struct soc_bytes_ext {
+        int max;
+};
+
 /* multi register control */
 struct soc_mreg_control {
         long min, max;
@@ -1120,10 +1151,66 @@ static inline struct snd_soc_codec *snd_soc_component_to_codec(
         return container_of(component, struct snd_soc_codec, component);
 }
 
+/**
+ * snd_soc_component_to_platform() - Casts a component to the platform it is embedded in
+ * @component: The component to cast to a platform
+ *
+ * This function must only be used on components that are known to be platforms.
+ * Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_component_to_platform(
+        struct snd_soc_component *component)
+{
+        return container_of(component, struct snd_soc_platform, component);
+}
+
+/**
+ * snd_soc_dapm_to_codec() - Casts a DAPM context to the CODEC it is embedded in
+ * @dapm: The DAPM context to cast to the CODEC
+ *
+ * This function must only be used on DAPM contexts that are known to be part of
+ * a CODEC (e.g. in a CODEC driver). Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_codec *snd_soc_dapm_to_codec(
+        struct snd_soc_dapm_context *dapm)
+{
+        return container_of(dapm, struct snd_soc_codec, dapm);
+}
+
+/**
+ * snd_soc_dapm_to_platform() - Casts a DAPM context to the platform it is
+ *  embedded in
+ * @dapm: The DAPM context to cast to the platform.
+ *
+ * This function must only be used on DAPM contexts that are known to be part of
+ * a platform (e.g. in a platform driver). Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_dapm_to_platform(
+        struct snd_soc_dapm_context *dapm)
+{
+        return container_of(dapm, struct snd_soc_platform, dapm);
+}
+
 /* codec IO */
 unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
-unsigned int snd_soc_write(struct snd_soc_codec *codec,
-                           unsigned int reg, unsigned int val);
+int snd_soc_write(struct snd_soc_codec *codec, unsigned int reg,
+        unsigned int val);
+
+/* component IO */
+int snd_soc_component_read(struct snd_soc_component *component,
+        unsigned int reg, unsigned int *val);
+int snd_soc_component_write(struct snd_soc_component *component,
+        unsigned int reg, unsigned int val);
+int snd_soc_component_update_bits(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int val);
+int snd_soc_component_update_bits_async(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int val);
+void snd_soc_component_async_complete(struct snd_soc_component *component);
+int snd_soc_component_test_bits(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int value);
+
+int snd_soc_component_init_io(struct snd_soc_component *component,
+        struct regmap *regmap);
 
 /* device driver data */
 
@@ -1173,7 +1260,6 @@ static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
 
 static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
 {
-        INIT_LIST_HEAD(&card->dai_dev_list);
         INIT_LIST_HEAD(&card->codec_dev_list);
         INIT_LIST_HEAD(&card->platform_dev_list);
         INIT_LIST_HEAD(&card->widgets);
@@ -1228,6 +1314,50 @@ static inline bool snd_soc_codec_is_active(struct snd_soc_codec *codec)
         return snd_soc_component_is_active(&codec->component);
 }
 
+/**
+ * snd_soc_kcontrol_component() - Returns the component that registered the
+ *  control
+ * @kcontrol: The control for which to get the component
+ *
+ * Note: This function will work correctly if the control has been registered
+ * for a component. Either with snd_soc_add_codec_controls() or
+ * snd_soc_add_platform_controls() or via  table based setup for either a
+ * CODEC, a platform or component driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_component *snd_soc_kcontrol_component(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_kcontrol_chip(kcontrol);
+}
+
+/**
+ * snd_soc_kcontrol_codec() - Returns the CODEC that registered the control
+ * @kcontrol: The control for which to get the CODEC
+ *
+ * Note: This function will only work correctly if the control has been
+ * registered with snd_soc_add_codec_controls() or via table based setup of
+ * snd_soc_codec_driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_codec *snd_soc_kcontrol_codec(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_soc_component_to_codec(snd_soc_kcontrol_component(kcontrol));
+}
+
+/**
+ * snd_soc_kcontrol_platform() - Returns the platform that registerd the control
+ * @kcontrol: The control for which to get the platform
+ *
+ * Note: This function will only work correctly if the control has been
+ * registered with snd_soc_add_platform_controls() or via table based setup of
+ * a snd_soc_platform_driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_kcontrol_platform(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_soc_component_to_platform(snd_soc_kcontrol_component(kcontrol));
+}
+
 int snd_soc_util_init(void);
 void snd_soc_util_exit(void);
 
@@ -1241,7 +1371,9 @@ int snd_soc_of_parse_tdm_slot(struct device_node *np,
 int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
                                    const char *propname);
 unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
-                                     const char *prefix);
+                                     const char *prefix,
+                                     struct device_node **bitclkmaster,
+                                     struct device_node **framemaster);
 int snd_soc_of_get_dai_name(struct device_node *of_node,
                             const char **dai_name);
 
diff --git a/include/sound/sta350.h b/include/sound/sta350.h
new file mode 100644
index 000000000000..42edceb096a0
--- /dev/null
+++ b/include/sound/sta350.h
@@ -0,0 +1,57 @@
+/*
+ * Platform data for ST STA350 ASoC codec driver.
+ *
+ * Copyright: 2014 Raumfeld GmbH
+ * Author: Sven Brandau <info@brandau.biz>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#ifndef __LINUX_SND__STA350_H
+#define __LINUX_SND__STA350_H
+
+#define STA350_OCFG_2CH         0
+#define STA350_OCFG_2_1CH       1
+#define STA350_OCFG_1CH         3
+
+#define STA350_OM_CH1           0
+#define STA350_OM_CH2           1
+#define STA350_OM_CH3           2
+
+#define STA350_THERMAL_ADJUSTMENT_ENABLE        1
+#define STA350_THERMAL_RECOVERY_ENABLE          2
+#define STA350_FAULT_DETECT_RECOVERY_BYPASS     1
+
+#define STA350_FFX_PM_DROP_COMP                 0
+#define STA350_FFX_PM_TAPERED_COMP              1
+#define STA350_FFX_PM_FULL_POWER                2
+#define STA350_FFX_PM_VARIABLE_DROP_COMP        3
+
+
+struct sta350_platform_data {
+        u8 output_conf;
+        u8 ch1_output_mapping;
+        u8 ch2_output_mapping;
+        u8 ch3_output_mapping;
+        u8 ffx_power_output_mode;
+        u8 drop_compensation_ns;
+        u8 powerdown_delay_divider;
+        unsigned int thermal_warning_recovery:1;
+        unsigned int thermal_warning_adjustment:1;
+        unsigned int fault_detect_recovery:1;
+        unsigned int oc_warning_adjustment:1;
+        unsigned int max_power_use_mpcc:1;
+        unsigned int max_power_correction:1;
+        unsigned int am_reduction_mode:1;
+        unsigned int odd_pwm_speed_mode:1;
+        unsigned int distortion_compensation:1;
+        unsigned int invalid_input_detect_mute:1;
+        unsigned int activate_mute_output:1;
+        unsigned int bridge_immediate_off:1;
+        unsigned int noise_shape_dc_cut:1;
+        unsigned int powerdown_master_vol:1;
+};
+
+#endif /* __LINUX_SND__STA350_H */
diff --git a/include/trace/events/asoc.h b/include/trace/events/asoc.h
index 03996b2bb04f..c75c795a377b 100644
--- a/include/trace/events/asoc.h
+++ b/include/trace/events/asoc.h
@@ -11,102 +11,10 @@
 
 struct snd_soc_jack;
 struct snd_soc_codec;
-struct snd_soc_platform;
 struct snd_soc_card;
 struct snd_soc_dapm_widget;
 struct snd_soc_dapm_path;
 
-/*
- * Log register events
- */
-DECLARE_EVENT_CLASS(snd_soc_reg,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val),
-
-        TP_STRUCT__entry(
-                __string(       name,           codec->name     )
-                __field(        int,            id              )
-                __field(        unsigned int,   reg             )
-                __field(        unsigned int,   val             )
-        ),
-
-        TP_fast_assign(
-                __assign_str(name, codec->name);
-                __entry->id = codec->id;
-                __entry->reg = reg;
-                __entry->val = val;
-        ),
-
-        TP_printk("codec=%s.%d reg=%x val=%x", __get_str(name),
-                  (int)__entry->id, (unsigned int)__entry->reg,
-                  (unsigned int)__entry->val)
-);
-
-DEFINE_EVENT(snd_soc_reg, snd_soc_reg_write,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val)
-
-);
-
-DEFINE_EVENT(snd_soc_reg, snd_soc_reg_read,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val)
-
-);
-
-DECLARE_EVENT_CLASS(snd_soc_preg,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val),
-
-        TP_STRUCT__entry(
-                __string(       name,           platform->name  )
-                __field(        int,            id              )
-                __field(        unsigned int,   reg             )
-                __field(        unsigned int,   val             )
-        ),
-
-        TP_fast_assign(
-                __assign_str(name, platform->name);
-                __entry->id = platform->id;
-                __entry->reg = reg;
-                __entry->val = val;
-        ),
-
-        TP_printk("platform=%s.%d reg=%x val=%x", __get_str(name),
-                  (int)__entry->id, (unsigned int)__entry->reg,
-                  (unsigned int)__entry->val)
-);
-
-DEFINE_EVENT(snd_soc_preg, snd_soc_preg_write,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val)
-
-);
-
-DEFINE_EVENT(snd_soc_preg, snd_soc_preg_read,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val)
-
-);
-
 DECLARE_EVENT_CLASS(snd_soc_card,
 
         TP_PROTO(struct snd_soc_card *card, int val),
diff --git a/include/trace/events/compaction.h b/include/trace/events/compaction.h
index 06f544ef2f6f..c6814b917bdf 100644
--- a/include/trace/events/compaction.h
+++ b/include/trace/events/compaction.h
@@ -5,6 +5,7 @@
 #define _TRACE_COMPACTION_H
 
 #include <linux/types.h>
+#include <linux/list.h>
 #include <linux/tracepoint.h>
 #include <trace/events/gfpflags.h>
 
@@ -47,10 +48,11 @@ DEFINE_EVENT(mm_compaction_isolate_template, mm_compaction_isolate_freepages,
 
 TRACE_EVENT(mm_compaction_migratepages,
 
-        TP_PROTO(unsigned long nr_migrated,
-                unsigned long nr_failed),
+        TP_PROTO(unsigned long nr_all,
+                int migrate_rc,
+                struct list_head *migratepages),
 
-        TP_ARGS(nr_migrated, nr_failed),
+        TP_ARGS(nr_all, migrate_rc, migratepages),
 
         TP_STRUCT__entry(
                 __field(unsigned long, nr_migrated)
@@ -58,7 +60,22 @@ TRACE_EVENT(mm_compaction_migratepages,
         ),
 
         TP_fast_assign(
-                __entry->nr_migrated = nr_migrated;
+                unsigned long nr_failed = 0;
+                struct list_head *page_lru;
+
+                /*
+                 * migrate_pages() returns either a non-negative number
+                 * with the number of pages that failed migration, or an
+                 * error code, in which case we need to count the remaining
+                 * pages manually
+                 */
+                if (migrate_rc >= 0)
+                        nr_failed = migrate_rc;
+                else
+                        list_for_each(page_lru, migratepages)
+                                nr_failed++;
+
+                __entry->nr_migrated = nr_all - nr_failed;
                 __entry->nr_failed = nr_failed;
         ),
 
diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h
index 6a1a0245474f..d4f70a7fe876 100644
--- a/include/trace/events/ext4.h
+++ b/include/trace/events/ext4.h
@@ -36,7 +36,7 @@ struct extent_status;
 
 #define show_map_flags(flags) __print_flags(flags, "|",                 \
         { EXT4_GET_BLOCKS_CREATE,               "CREATE" },             \
-        { EXT4_GET_BLOCKS_UNINIT_EXT,           "UNINIT" },             \
+        { EXT4_GET_BLOCKS_UNWRIT_EXT,           "UNWRIT" },             \
         { EXT4_GET_BLOCKS_DELALLOC_RESERVE,     "DELALLOC" },           \
         { EXT4_GET_BLOCKS_PRE_IO,               "PRE_IO" },             \
         { EXT4_GET_BLOCKS_CONVERT,              "CONVERT" },            \
@@ -51,7 +51,6 @@ struct extent_status;
         { EXT4_MAP_MAPPED,      "M" },                  \
         { EXT4_MAP_UNWRITTEN,   "U" },                  \
         { EXT4_MAP_BOUNDARY,    "B" },                  \
-        { EXT4_MAP_UNINIT,      "u" },                  \
         { EXT4_MAP_FROM_CLUSTER, "C" })
 
 #define show_free_flags(flags) __print_flags(flags, "|",        \
@@ -1497,7 +1496,7 @@ DEFINE_EVENT(ext4__truncate, ext4_truncate_exit,
         TP_ARGS(inode)
 );
 
-/* 'ux' is the uninitialized extent. */
+/* 'ux' is the unwritten extent. */
 TRACE_EVENT(ext4_ext_convert_to_initialized_enter,
         TP_PROTO(struct inode *inode, struct ext4_map_blocks *map,
                  struct ext4_extent *ux),
@@ -1533,7 +1532,7 @@ TRACE_EVENT(ext4_ext_convert_to_initialized_enter,
 );
 
 /*
- * 'ux' is the uninitialized extent.
+ * 'ux' is the unwritten extent.
  * 'ix' is the initialized extent to which blocks are transferred.
  */
 TRACE_EVENT(ext4_ext_convert_to_initialized_fastpath,
@@ -1811,7 +1810,7 @@ DEFINE_EVENT(ext4__trim, ext4_trim_all_free,
         TP_ARGS(sb, group, start, len)
 );
 
-TRACE_EVENT(ext4_ext_handle_uninitialized_extents,
+TRACE_EVENT(ext4_ext_handle_unwritten_extents,
         TP_PROTO(struct inode *inode, struct ext4_map_blocks *map, int flags,
                  unsigned int allocated, ext4_fsblk_t newblock),
 
diff --git a/include/trace/events/f2fs.h b/include/trace/events/f2fs.h
index 67f38faac589..b983990b4a9f 100644
--- a/include/trace/events/f2fs.h
+++ b/include/trace/events/f2fs.h
@@ -659,6 +659,66 @@ DEFINE_EVENT_CONDITION(f2fs__submit_bio, f2fs_submit_read_bio,
         TP_CONDITION(bio)
 );
 
+TRACE_EVENT(f2fs_write_begin,
+
+        TP_PROTO(struct inode *inode, loff_t pos, unsigned int len,
+                                unsigned int flags),
+
+        TP_ARGS(inode, pos, len, flags),
+
+        TP_STRUCT__entry(
+                __field(dev_t,  dev)
+                __field(ino_t,  ino)
+                __field(loff_t, pos)
+                __field(unsigned int, len)
+                __field(unsigned int, flags)
+        ),
+
+        TP_fast_assign(
+                __entry->dev    = inode->i_sb->s_dev;
+                __entry->ino    = inode->i_ino;
+                __entry->pos    = pos;
+                __entry->len    = len;
+                __entry->flags  = flags;
+        ),
+
+        TP_printk("dev = (%d,%d), ino = %lu, pos = %llu, len = %u, flags = %u",
+                show_dev_ino(__entry),
+                (unsigned long long)__entry->pos,
+                __entry->len,
+                __entry->flags)
+);
+
+TRACE_EVENT(f2fs_write_end,
+
+        TP_PROTO(struct inode *inode, loff_t pos, unsigned int len,
+                                unsigned int copied),
+
+        TP_ARGS(inode, pos, len, copied),
+
+        TP_STRUCT__entry(
+                __field(dev_t,  dev)
+                __field(ino_t,  ino)
+                __field(loff_t, pos)
+                __field(unsigned int, len)
+                __field(unsigned int, copied)
+        ),
+
+        TP_fast_assign(
+                __entry->dev    = inode->i_sb->s_dev;
+                __entry->ino    = inode->i_ino;
+                __entry->pos    = pos;
+                __entry->len    = len;
+                __entry->copied = copied;
+        ),
+
+        TP_printk("dev = (%d,%d), ino = %lu, pos = %llu, len = %u, copied = %u",
+                show_dev_ino(__entry),
+                (unsigned long long)__entry->pos,
+                __entry->len,
+                __entry->copied)
+);
+
 DECLARE_EVENT_CLASS(f2fs__page,
 
         TP_PROTO(struct page *page, int type),
@@ -672,6 +732,7 @@ DECLARE_EVENT_CLASS(f2fs__page,
                 __field(int, dir)
                 __field(pgoff_t, index)
                 __field(int, dirty)
+                __field(int, uptodate)
         ),
 
         TP_fast_assign(
@@ -681,14 +742,31 @@ DECLARE_EVENT_CLASS(f2fs__page,
                 __entry->dir    = S_ISDIR(page->mapping->host->i_mode);
                 __entry->index  = page->index;
                 __entry->dirty  = PageDirty(page);
+                __entry->uptodate = PageUptodate(page);
         ),
 
-        TP_printk("dev = (%d,%d), ino = %lu, %s, %s, index = %lu, dirty = %d",
+        TP_printk("dev = (%d,%d), ino = %lu, %s, %s, index = %lu, "
+                "dirty = %d, uptodate = %d",
                 show_dev_ino(__entry),
                 show_block_type(__entry->type),
                 show_file_type(__entry->dir),
                 (unsigned long)__entry->index,
-                __entry->dirty)
+                __entry->dirty,
+                __entry->uptodate)
+);
+
+DEFINE_EVENT(f2fs__page, f2fs_writepage,
+
+        TP_PROTO(struct page *page, int type),
+
+        TP_ARGS(page, type)
+);
+
+DEFINE_EVENT(f2fs__page, f2fs_readpage,
+
+        TP_PROTO(struct page *page, int type),
+
+        TP_ARGS(page, type)
 );
 
 DEFINE_EVENT(f2fs__page, f2fs_set_page_dirty,
@@ -705,6 +783,70 @@ DEFINE_EVENT(f2fs__page, f2fs_vm_page_mkwrite,
         TP_ARGS(page, type)
 );
 
+TRACE_EVENT(f2fs_writepages,
+
+        TP_PROTO(struct inode *inode, struct writeback_control *wbc, int type),
+
+        TP_ARGS(inode, wbc, type),
+
+        TP_STRUCT__entry(
+                __field(dev_t,  dev)
+                __field(ino_t,  ino)
+                __field(int,    type)
+                __field(int,    dir)
+                __field(long,   nr_to_write)
+                __field(long,   pages_skipped)
+                __field(loff_t, range_start)
+                __field(loff_t, range_end)
+                __field(pgoff_t, writeback_index)
+                __field(int,    sync_mode)
+                __field(char,   for_kupdate)
+                __field(char,   for_background)
+                __field(char,   tagged_writepages)
+                __field(char,   for_reclaim)
+                __field(char,   range_cyclic)
+                __field(char,   for_sync)
+        ),
+
+        TP_fast_assign(
+                __entry->dev            = inode->i_sb->s_dev;
+                __entry->ino            = inode->i_ino;
+                __entry->type           = type;
+                __entry->dir            = S_ISDIR(inode->i_mode);
+                __entry->nr_to_write    = wbc->nr_to_write;
+                __entry->pages_skipped  = wbc->pages_skipped;
+                __entry->range_start    = wbc->range_start;
+                __entry->range_end      = wbc->range_end;
+                __entry->writeback_index = inode->i_mapping->writeback_index;
+                __entry->sync_mode      = wbc->sync_mode;
+                __entry->for_kupdate    = wbc->for_kupdate;
+                __entry->for_background = wbc->for_background;
+                __entry->tagged_writepages      = wbc->tagged_writepages;
+                __entry->for_reclaim    = wbc->for_reclaim;
+                __entry->range_cyclic   = wbc->range_cyclic;
+                __entry->for_sync       = wbc->for_sync;
+        ),
+
+        TP_printk("dev = (%d,%d), ino = %lu, %s, %s, nr_to_write %ld, "
+                "skipped %ld, start %lld, end %lld, wb_idx %lu, sync_mode %d, "
+                "kupdate %u background %u tagged %u reclaim %u cyclic %u sync %u",
+                show_dev_ino(__entry),
+                show_block_type(__entry->type),
+                show_file_type(__entry->dir),
+                __entry->nr_to_write,
+                __entry->pages_skipped,
+                __entry->range_start,
+                __entry->range_end,
+                (unsigned long)__entry->writeback_index,
+                __entry->sync_mode,
+                __entry->for_kupdate,
+                __entry->for_background,
+                __entry->tagged_writepages,
+                __entry->for_reclaim,
+                __entry->range_cyclic,
+                __entry->for_sync)
+);
+
 TRACE_EVENT(f2fs_submit_page_mbio,
 
         TP_PROTO(struct page *page, int rw, int type, block_t blk_addr),
diff --git a/include/trace/events/gfpflags.h b/include/trace/events/gfpflags.h
index 1eddbf1557f2..d6fd8e5b14b7 100644
--- a/include/trace/events/gfpflags.h
+++ b/include/trace/events/gfpflags.h
@@ -34,7 +34,6 @@
         {(unsigned long)__GFP_HARDWALL,         "GFP_HARDWALL"},        \
         {(unsigned long)__GFP_THISNODE,         "GFP_THISNODE"},        \
         {(unsigned long)__GFP_RECLAIMABLE,      "GFP_RECLAIMABLE"},     \
-        {(unsigned long)__GFP_KMEMCG,           "GFP_KMEMCG"},          \
         {(unsigned long)__GFP_MOVABLE,          "GFP_MOVABLE"},         \
         {(unsigned long)__GFP_NOTRACK,          "GFP_NOTRACK"},         \
         {(unsigned long)__GFP_NO_KSWAPD,        "GFP_NO_KSWAPD"},       \
diff --git a/include/trace/events/vmscan.h b/include/trace/events/vmscan.h
index 132a985aba8b..69590b6ffc09 100644
--- a/include/trace/events/vmscan.h
+++ b/include/trace/events/vmscan.h
@@ -191,6 +191,7 @@ TRACE_EVENT(mm_shrink_slab_start,
         TP_STRUCT__entry(
                 __field(struct shrinker *, shr)
                 __field(void *, shrink)
+                __field(int, nid)
                 __field(long, nr_objects_to_shrink)
                 __field(gfp_t, gfp_flags)
                 __field(unsigned long, pgs_scanned)
@@ -203,6 +204,7 @@ TRACE_EVENT(mm_shrink_slab_start,
         TP_fast_assign(
                 __entry->shr = shr;
                 __entry->shrink = shr->scan_objects;
+                __entry->nid = sc->nid;
                 __entry->nr_objects_to_shrink = nr_objects_to_shrink;
                 __entry->gfp_flags = sc->gfp_mask;
                 __entry->pgs_scanned = pgs_scanned;
@@ -212,9 +214,10 @@ TRACE_EVENT(mm_shrink_slab_start,
                 __entry->total_scan = total_scan;
         ),
 
-        TP_printk("%pF %p: objects to shrink %ld gfp_flags %s pgs_scanned %ld lru_pgs %ld cache items %ld delta %lld total_scan %ld",
+        TP_printk("%pF %p: nid: %d objects to shrink %ld gfp_flags %s pgs_scanned %ld lru_pgs %ld cache items %ld delta %lld total_scan %ld",
                 __entry->shrink,
                 __entry->shr,
+                __entry->nid,
                 __entry->nr_objects_to_shrink,
                 show_gfp_flags(__entry->gfp_flags),
                 __entry->pgs_scanned,
@@ -225,13 +228,15 @@ TRACE_EVENT(mm_shrink_slab_start,
 );
 
 TRACE_EVENT(mm_shrink_slab_end,
-        TP_PROTO(struct shrinker *shr, int shrinker_retval,
-                long unused_scan_cnt, long new_scan_cnt),
+        TP_PROTO(struct shrinker *shr, int nid, int shrinker_retval,
+                long unused_scan_cnt, long new_scan_cnt, long total_scan),
 
-        TP_ARGS(shr, shrinker_retval, unused_scan_cnt, new_scan_cnt),
+        TP_ARGS(shr, nid, shrinker_retval, unused_scan_cnt, new_scan_cnt,
+                total_scan),
 
         TP_STRUCT__entry(
                 __field(struct shrinker *, shr)
+                __field(int, nid)
                 __field(void *, shrink)
                 __field(long, unused_scan)
                 __field(long, new_scan)
@@ -241,16 +246,18 @@ TRACE_EVENT(mm_shrink_slab_end,
 
         TP_fast_assign(
                 __entry->shr = shr;
+                __entry->nid = nid;
                 __entry->shrink = shr->scan_objects;
                 __entry->unused_scan = unused_scan_cnt;
                 __entry->new_scan = new_scan_cnt;
                 __entry->retval = shrinker_retval;
-                __entry->total_scan = new_scan_cnt - unused_scan_cnt;
+                __entry->total_scan = total_scan;
         ),
 
-        TP_printk("%pF %p: unused scan count %ld new scan count %ld total_scan %ld last shrinker return val %d",
+        TP_printk("%pF %p: nid: %d unused scan count %ld new scan count %ld total_scan %ld last shrinker return val %d",
                 __entry->shrink,
                 __entry->shr,
+                __entry->nid,
                 __entry->unused_scan,
                 __entry->new_scan,
                 __entry->total_scan,
diff --git a/include/trace/ftrace.h b/include/trace/ftrace.h
index 0a1a4f7caf09..0fd06fef9fac 100644
--- a/include/trace/ftrace.h
+++ b/include/trace/ftrace.h
@@ -53,6 +53,9 @@
 #undef __string
 #define __string(item, src) __dynamic_array(char, item, -1)
 
+#undef __bitmask
+#define __bitmask(item, nr_bits) __dynamic_array(char, item, -1)
+
 #undef TP_STRUCT__entry
 #define TP_STRUCT__entry(args...) args
 
@@ -128,6 +131,9 @@
 #undef __string
 #define __string(item, src) __dynamic_array(char, item, -1)
 
+#undef __bitmask
+#define __bitmask(item, nr_bits) __dynamic_array(unsigned long, item, -1)
+
 #undef DECLARE_EVENT_CLASS
 #define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print)  \
         struct ftrace_data_offsets_##call {                             \
@@ -197,9 +203,22 @@
 #define __get_dynamic_array(field)      \
                 ((void *)__entry + (__entry->__data_loc_##field & 0xffff))
 
+#undef __get_dynamic_array_len
+#define __get_dynamic_array_len(field)  \
+                ((__entry->__data_loc_##field >> 16) & 0xffff)
+
 #undef __get_str
 #define __get_str(field) (char *)__get_dynamic_array(field)
 
+#undef __get_bitmask
+#define __get_bitmask(field)                                            \
+        ({                                                              \
+                void *__bitmask = __get_dynamic_array(field);           \
+                unsigned int __bitmask_size;                            \
+                __bitmask_size = __get_dynamic_array_len(field);        \
+                ftrace_print_bitmask_seq(p, __bitmask, __bitmask_size); \
+        })
+
 #undef __print_flags
 #define __print_flags(flag, delim, flag_array...)                       \
         ({                                                              \
@@ -322,6 +341,9 @@ static struct trace_event_functions ftrace_event_type_funcs_##call = {	\
 #undef __string
 #define __string(item, src) __dynamic_array(char, item, -1)
 
+#undef __bitmask
+#define __bitmask(item, nr_bits) __dynamic_array(unsigned long, item, -1)
+
 #undef DECLARE_EVENT_CLASS
 #define DECLARE_EVENT_CLASS(call, proto, args, tstruct, func, print)    \
 static int notrace __init                                               \
@@ -372,6 +394,29 @@ ftrace_define_fields_##call(struct ftrace_event_call *event_call)	\
 #define __string(item, src) __dynamic_array(char, item,                 \
                     strlen((src) ? (const char *)(src) : "(null)") + 1)
 
+/*
+ * __bitmask_size_in_bytes_raw is the number of bytes needed to hold
+ * num_possible_cpus().
+ */
+#define __bitmask_size_in_bytes_raw(nr_bits)    \
+        (((nr_bits) + 7) / 8)
+
+#define __bitmask_size_in_longs(nr_bits)                        \
+        ((__bitmask_size_in_bytes_raw(nr_bits) +                \
+          ((BITS_PER_LONG / 8) - 1)) / (BITS_PER_LONG / 8))
+
+/*
+ * __bitmask_size_in_bytes is the number of bytes needed to hold
+ * num_possible_cpus() padded out to the nearest long. This is what
+ * is saved in the buffer, just to be consistent.
+ */
+#define __bitmask_size_in_bytes(nr_bits)                                \
+        (__bitmask_size_in_longs(nr_bits) * (BITS_PER_LONG / 8))
+
+#undef __bitmask
+#define __bitmask(item, nr_bits) __dynamic_array(unsigned long, item,   \
+                                         __bitmask_size_in_longs(nr_bits))
+
 #undef DECLARE_EVENT_CLASS
 #define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print)  \
 static inline notrace int ftrace_get_offsets_##call(                    \
@@ -513,12 +558,22 @@ static inline notrace int ftrace_get_offsets_##call(			\
         __entry->__data_loc_##item = __data_offsets.item;
 
 #undef __string
-#define __string(item, src) __dynamic_array(char, item, -1)             \
+#define __string(item, src) __dynamic_array(char, item, -1)
 
 #undef __assign_str
 #define __assign_str(dst, src)                                          \
         strcpy(__get_str(dst), (src) ? (const char *)(src) : "(null)");
 
+#undef __bitmask
+#define __bitmask(item, nr_bits) __dynamic_array(unsigned long, item, -1)
+
+#undef __get_bitmask
+#define __get_bitmask(field) (char *)__get_dynamic_array(field)
+
+#undef __assign_bitmask
+#define __assign_bitmask(dst, src, nr_bits)                                     \
+        memcpy(__get_bitmask(dst), (src), __bitmask_size_in_bytes(nr_bits))
+
 #undef TP_fast_assign
 #define TP_fast_assign(args...) args
 
@@ -585,7 +640,9 @@ static inline void ftrace_test_probe_##call(void)			\
 #undef __print_symbolic
 #undef __print_hex
 #undef __get_dynamic_array
+#undef __get_dynamic_array_len
 #undef __get_str
+#undef __get_bitmask
 
 #undef TP_printk
 #define TP_printk(fmt, args...) "\"" fmt "\", "  __stringify(args)
@@ -648,9 +705,16 @@ __attribute__((section("_ftrace_events"))) *__event_##call = &event_##call
 #define __get_dynamic_array(field)      \
                 ((void *)__entry + (__entry->__data_loc_##field & 0xffff))
 
+#undef __get_dynamic_array_len
+#define __get_dynamic_array_len(field)  \
+                ((__entry->__data_loc_##field >> 16) & 0xffff)
+
 #undef __get_str
 #define __get_str(field) (char *)__get_dynamic_array(field)
 
+#undef __get_bitmask
+#define __get_bitmask(field) (char *)__get_dynamic_array(field)
+
 #undef __perf_addr
 #define __perf_addr(a)  (__addr = (a))
 
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index f104c2603ebe..def54f9e07ca 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -181,6 +181,7 @@ struct drm_mode_get_plane_res {
 #define DRM_MODE_ENCODER_TVDAC  4
 #define DRM_MODE_ENCODER_VIRTUAL 5
 #define DRM_MODE_ENCODER_DSI    6
+#define DRM_MODE_ENCODER_DPMST  7
 
 struct drm_mode_get_encoder {
         __u32 encoder_id;
@@ -251,6 +252,21 @@ struct drm_mode_get_connector {
 #define DRM_MODE_PROP_BLOB      (1<<4)
 #define DRM_MODE_PROP_BITMASK   (1<<5) /* bitmask of enumerated types */
 
+/* non-extended types: legacy bitmask, one bit per type: */
+#define DRM_MODE_PROP_LEGACY_TYPE  ( \
+                DRM_MODE_PROP_RANGE | \
+                DRM_MODE_PROP_ENUM | \
+                DRM_MODE_PROP_BLOB | \
+                DRM_MODE_PROP_BITMASK)
+
+/* extended-types: rather than continue to consume a bit per type,
+ * grab a chunk of the bits to use as integer type id.
+ */
+#define DRM_MODE_PROP_EXTENDED_TYPE     0x0000ffc0
+#define DRM_MODE_PROP_TYPE(n)           ((n) << 6)
+#define DRM_MODE_PROP_OBJECT            DRM_MODE_PROP_TYPE(1)
+#define DRM_MODE_PROP_SIGNED_RANGE      DRM_MODE_PROP_TYPE(2)
+
 struct drm_mode_property_enum {
         __u64 value;
         char name[DRM_PROP_NAME_LEN];
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 126bfaa8bb6b..ff57f07c3249 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -223,6 +223,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_GEM_GET_CACHING        0x30
 #define DRM_I915_REG_READ               0x31
 #define DRM_I915_GET_RESET_STATS        0x32
+#define DRM_I915_GEM_USERPTR            0x33
 
 #define DRM_IOCTL_I915_INIT             DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH            DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -273,6 +274,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY      DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy)
 #define DRM_IOCTL_I915_REG_READ                 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read)
 #define DRM_IOCTL_I915_GET_RESET_STATS          DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats)
+#define DRM_IOCTL_I915_GEM_USERPTR                      DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_USERPTR, struct drm_i915_gem_userptr)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -337,6 +339,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_EXEC_NO_RELOC     25
 #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
 #define I915_PARAM_HAS_WT                27
+#define I915_PARAM_CMD_PARSER_VERSION    28
 
 typedef struct drm_i915_getparam {
         int param;
@@ -1049,4 +1052,18 @@ struct drm_i915_reset_stats {
         __u32 pad;
 };
 
+struct drm_i915_gem_userptr {
+        __u64 user_ptr;
+        __u64 user_size;
+        __u32 flags;
+#define I915_USERPTR_READ_ONLY 0x1
+#define I915_USERPTR_UNSYNCHRONIZED 0x80000000
+        /**
+         * Returned handle for the object.
+         *
+         * Object handles are nonzero.
+         */
+        __u32 handle;
+};
+
 #endif /* _UAPI_I915_DRM_H_ */
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index aefa2f6afa3b..1cc0b610f162 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1007,7 +1007,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_NUM_BYTES_MOVED     0x1d
 #define RADEON_INFO_VRAM_USAGE          0x1e
 #define RADEON_INFO_GTT_USAGE           0x1f
-
+#define RADEON_INFO_ACTIVE_CU_COUNT     0x20
 
 struct drm_radeon_info {
         uint32_t                request;
diff --git a/include/uapi/linux/btrfs.h b/include/uapi/linux/btrfs.h
index b4d69092fbdb..7554fd381a56 100644
--- a/include/uapi/linux/btrfs.h
+++ b/include/uapi/linux/btrfs.h
@@ -181,7 +181,11 @@ struct btrfs_ioctl_fs_info_args {
         __u64 max_id;                           /* out */
         __u64 num_devices;                      /* out */
         __u8 fsid[BTRFS_FSID_SIZE];             /* out */
-        __u64 reserved[124];                    /* pad to 1k */
+        __u32 nodesize;                         /* out */
+        __u32 sectorsize;                       /* out */
+        __u32 clone_alignment;                  /* out */
+        __u32 reserved32;
+        __u64 reserved[122];                    /* pad to 1k */
 };
 
 struct btrfs_ioctl_feature_flags {
@@ -211,7 +215,8 @@ struct btrfs_balance_args {
 
         __u64 flags;
 
-        __u64 unused[8];
+        __u64 limit;            /* limit number of processed chunks */
+        __u64 unused[7];
 } __attribute__ ((__packed__));
 
 /* report balance progress to userspace */
diff --git a/include/uapi/linux/kvm_para.h b/include/uapi/linux/kvm_para.h
index 2841f86eae0b..bf6cd7d5cac2 100644
--- a/include/uapi/linux/kvm_para.h
+++ b/include/uapi/linux/kvm_para.h
@@ -20,6 +20,9 @@
 #define KVM_HC_FEATURES                 3
 #define KVM_HC_PPC_MAP_MAGIC_PAGE       4
 #define KVM_HC_KICK_CPU                 5
+#define KVM_HC_MIPS_GET_CLOCK_FREQ      6
+#define KVM_HC_MIPS_EXIT_VM             7
+#define KVM_HC_MIPS_CONSOLE_OUTPUT      8
 
 /*
  * hypercalls use architecture specific
diff --git a/include/uapi/linux/nfsd/nfsfh.h b/include/uapi/linux/nfsd/nfsfh.h
index 616e3b396476..20391235d088 100644
--- a/include/uapi/linux/nfsd/nfsfh.h
+++ b/include/uapi/linux/nfsd/nfsfh.h
@@ -1,13 +1,7 @@
 /*
- * include/linux/nfsd/nfsfh.h
- *
  * This file describes the layout of the file handles as passed
  * over the wire.
  *
- * Earlier versions of knfsd used to sign file handles using keyed MD5
- * or SHA. I've removed this code, because it doesn't give you more
- * security than blocking external access to port 2049 on your firewall.
- *
  * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
  */
 
@@ -37,7 +31,7 @@ struct nfs_fhbase_old {
 };
 
 /*
- * This is the new flexible, extensible style NFSv2/v3 file handle.
+ * This is the new flexible, extensible style NFSv2/v3/v4 file handle.
  * by Neil Brown <neilb@cse.unsw.edu.au> - March 2000
  *
  * The file handle starts with a sequence of four-byte words.
@@ -47,14 +41,7 @@ struct nfs_fhbase_old {
  *
  * All four-byte values are in host-byte-order.
  *
- * The auth_type field specifies how the filehandle can be authenticated
- * This might allow a file to be confirmed to be in a writable part of a
- * filetree without checking the path from it up to the root.
- * Current values:
- *     0  - No authentication.  fb_auth is 0 bytes long
- * Possible future values:
- *     1  - 4 bytes taken from MD5 hash of the remainer of the file handle
- *          prefixed by a secret and with the important export flags.
+ * The auth_type field is deprecated and must be set to 0.
  *
  * The fsid_type identifies how the filesystem (or export point) is
  *    encoded.
@@ -71,14 +58,9 @@ struct nfs_fhbase_old {
  *     7  - 8 byte inode number and 16 byte uuid
  *
  * The fileid_type identified how the file within the filesystem is encoded.
- * This is (will be) passed to, and set by, the underlying filesystem if it supports
- * filehandle operations.  The filesystem must not use the value '0' or '0xff' and may
- * only use the values 1 and 2 as defined below:
- *  Current values:
- *    0   - The root, or export point, of the filesystem.  fb_fileid is 0 bytes.
- *    1   - 32bit inode number, 32 bit generation number.
- *    2   - 32bit inode number, 32 bit generation number, 32 bit parent directory inode number.
- *
+ *   The values for this field are filesystem specific, exccept that
+ *   filesystems must not use the values '0' or '0xff'. 'See enum fid_type'
+ *   in include/linux/exportfs.h for currently registered values.
  */
 struct nfs_fhbase_new {
         __u8            fb_version;     /* == 1, even => nfs_fhbase_old */
@@ -114,9 +96,9 @@ struct knfsd_fh {
 #define fh_fsid_type            fh_base.fh_new.fb_fsid_type
 #define fh_auth_type            fh_base.fh_new.fb_auth_type
 #define fh_fileid_type          fh_base.fh_new.fb_fileid_type
-#define fh_auth                 fh_base.fh_new.fb_auth
 #define fh_fsid                 fh_base.fh_new.fb_auth
 
-
+/* Do not use, provided for userspace compatiblity. */
+#define fh_auth                 fh_base.fh_new.fb_auth
 
 #endif /* _UAPI_LINUX_NFSD_FH_H */
diff --git a/include/uapi/linux/shm.h b/include/uapi/linux/shm.h
index 78b69413f582..1fbf24ea37fd 100644
--- a/include/uapi/linux/shm.h
+++ b/include/uapi/linux/shm.h
@@ -8,19 +8,20 @@
 #endif
 
 /*
- * SHMMAX, SHMMNI and SHMALL are upper limits are defaults which can
- * be increased by sysctl
+ * SHMMNI, SHMMAX and SHMALL are default upper limits which can be
+ * modified by sysctl. The SHMMAX and SHMALL values have been chosen to
+ * be as large possible without facilitating scenarios where userspace
+ * causes overflows when adjusting the limits via operations of the form
+ * "retrieve current limit; add X; update limit". It is therefore not
+ * advised to make SHMMAX and SHMALL any larger. These limits are
+ * suitable for both 32 and 64-bit systems.
  */
-
-#define SHMMAX 0x2000000                 /* max shared seg size (bytes) */
 #define SHMMIN 1                         /* min shared seg size (bytes) */
 #define SHMMNI 4096                      /* max num of segs system wide */
-#ifndef __KERNEL__
-#define SHMALL (SHMMAX/getpagesize()*(SHMMNI/16))
-#endif
+#define SHMMAX (ULONG_MAX - (1UL << 24)) /* max shared seg size (bytes) */
+#define SHMALL (ULONG_MAX - (1UL << 24)) /* max shm system wide (pages) */
 #define SHMSEG SHMMNI                    /* max shared segs per process */
 
-
 /* Obsolete, used only for backwards compatibility and libc5 compiles */
 struct shmid_ds {
         struct ipc_perm         shm_perm;       /* operation perms */
diff --git a/include/uapi/linux/usb/Kbuild b/include/uapi/linux/usb/Kbuild
index 6cb4ea826834..4cc4d6e7e523 100644
--- a/include/uapi/linux/usb/Kbuild
+++ b/include/uapi/linux/usb/Kbuild
@@ -1,6 +1,7 @@
 # UAPI Header export list
 header-y += audio.h
 header-y += cdc.h
+header-y += cdc-wdm.h
 header-y += ch11.h
 header-y += ch9.h
 header-y += functionfs.h
diff --git a/include/uapi/linux/usb/cdc-wdm.h b/include/uapi/linux/usb/cdc-wdm.h
index f03134feebd6..0dc132e75030 100644
--- a/include/uapi/linux/usb/cdc-wdm.h
+++ b/include/uapi/linux/usb/cdc-wdm.h
@@ -9,6 +9,8 @@
 #ifndef _UAPI__LINUX_USB_CDC_WDM_H
 #define _UAPI__LINUX_USB_CDC_WDM_H
 
+#include <linux/types.h>
+
 /*
  * This IOCTL is used to retrieve the wMaxCommand for the device,
  * defining the message limit for both reading and writing.
diff --git a/include/uapi/linux/v4l2-common.h b/include/uapi/linux/v4l2-common.h
index 9bf508ad0957..2f6f8cafe773 100644
--- a/include/uapi/linux/v4l2-common.h
+++ b/include/uapi/linux/v4l2-common.h
@@ -75,7 +75,7 @@ struct v4l2_edid {
         __u32 start_block;
         __u32 blocks;
         __u32 reserved[5];
-        __u8 __user *edid;
+        __u8  *edid;
 };
 
 #endif /* __V4L2_COMMON__ */
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index b6a5fe00a470..6c8f159e416e 100644
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -173,6 +173,76 @@
                 V4L2_DV_FL_CAN_REDUCE_FPS) \
 }
 
+#define V4L2_DV_BT_CEA_3840X2160P24 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P25 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P30 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P50 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P60 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P24 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P25 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P30 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P50 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P60 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
 
 /* VESA Discrete Monitor Timings as per version 1.0, revision 12 */
 
diff --git a/include/uapi/linux/v4l2-mediabus.h b/include/uapi/linux/v4l2-mediabus.h
index b5c3aab6e82c..1445e858854f 100644
--- a/include/uapi/linux/v4l2-mediabus.h
+++ b/include/uapi/linux/v4l2-mediabus.h
@@ -52,7 +52,7 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c,
         V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d,
 
-        /* YUV (including grey) - next is 0x2018 */
+        /* YUV (including grey) - next is 0x2024 */
         V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
         V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
         V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
@@ -64,6 +64,8 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008,
         V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009,
         V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
+        V4L2_MBUS_FMT_UYVY10_2X10 = 0x2018,
+        V4L2_MBUS_FMT_VYUY10_2X10 = 0x2019,
         V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
         V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
         V4L2_MBUS_FMT_Y12_1X12 = 0x2013,
@@ -72,10 +74,20 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
         V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
         V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014,
+        V4L2_MBUS_FMT_UYVY10_1X20 = 0x201a,
+        V4L2_MBUS_FMT_VYUY10_1X20 = 0x201b,
         V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
         V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
         V4L2_MBUS_FMT_YUV10_1X30 = 0x2016,
         V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017,
+        V4L2_MBUS_FMT_UYVY12_2X12 = 0x201c,
+        V4L2_MBUS_FMT_VYUY12_2X12 = 0x201d,
+        V4L2_MBUS_FMT_YUYV12_2X12 = 0x201e,
+        V4L2_MBUS_FMT_YVYU12_2X12 = 0x201f,
+        V4L2_MBUS_FMT_UYVY12_1X24 = 0x2020,
+        V4L2_MBUS_FMT_VYUY12_1X24 = 0x2021,
+        V4L2_MBUS_FMT_YUYV12_1X24 = 0x2022,
+        V4L2_MBUS_FMT_YVYU12_1X24 = 0x2023,
 
         /* Bayer - next is 0x3019 */
         V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
diff --git a/include/uapi/linux/v4l2-subdev.h b/include/uapi/linux/v4l2-subdev.h
index 87e05159f637..a619cdd300ac 100644
--- a/include/uapi/linux/v4l2-subdev.h
+++ b/include/uapi/linux/v4l2-subdev.h
@@ -151,26 +151,24 @@ struct v4l2_subdev_selection {
 /* Backwards compatibility define --- to be removed */
 #define v4l2_subdev_edid v4l2_edid
 
-#define VIDIOC_SUBDEV_G_FMT     _IOWR('V',  4, struct v4l2_subdev_format)
-#define VIDIOC_SUBDEV_S_FMT     _IOWR('V',  5, struct v4l2_subdev_format)
-#define VIDIOC_SUBDEV_G_FRAME_INTERVAL \
-                        _IOWR('V', 21, struct v4l2_subdev_frame_interval)
-#define VIDIOC_SUBDEV_S_FRAME_INTERVAL \
-                        _IOWR('V', 22, struct v4l2_subdev_frame_interval)
-#define VIDIOC_SUBDEV_ENUM_MBUS_CODE \
-                        _IOWR('V',  2, struct v4l2_subdev_mbus_code_enum)
-#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE \
-                        _IOWR('V', 74, struct v4l2_subdev_frame_size_enum)
-#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \
-                        _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum)
-#define VIDIOC_SUBDEV_G_CROP    _IOWR('V', 59, struct v4l2_subdev_crop)
-#define VIDIOC_SUBDEV_S_CROP    _IOWR('V', 60, struct v4l2_subdev_crop)
-#define VIDIOC_SUBDEV_G_SELECTION \
-        _IOWR('V', 61, struct v4l2_subdev_selection)
-#define VIDIOC_SUBDEV_S_SELECTION \
-        _IOWR('V', 62, struct v4l2_subdev_selection)
-/* These two G/S_EDID ioctls are identical to the ioctls in videodev2.h */
-#define VIDIOC_SUBDEV_G_EDID    _IOWR('V', 40, struct v4l2_edid)
-#define VIDIOC_SUBDEV_S_EDID    _IOWR('V', 41, struct v4l2_edid)
+#define VIDIOC_SUBDEV_G_FMT                     _IOWR('V',  4, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_S_FMT                     _IOWR('V',  5, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_G_FRAME_INTERVAL          _IOWR('V', 21, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_S_FRAME_INTERVAL          _IOWR('V', 22, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_ENUM_MBUS_CODE            _IOWR('V',  2, struct v4l2_subdev_mbus_code_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE           _IOWR('V', 74, struct v4l2_subdev_frame_size_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL       _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum)
+#define VIDIOC_SUBDEV_G_CROP                    _IOWR('V', 59, struct v4l2_subdev_crop)
+#define VIDIOC_SUBDEV_S_CROP                    _IOWR('V', 60, struct v4l2_subdev_crop)
+#define VIDIOC_SUBDEV_G_SELECTION               _IOWR('V', 61, struct v4l2_subdev_selection)
+#define VIDIOC_SUBDEV_S_SELECTION               _IOWR('V', 62, struct v4l2_subdev_selection)
+/* The following ioctls are identical to the ioctls in videodev2.h */
+#define VIDIOC_SUBDEV_G_EDID                    _IOWR('V', 40, struct v4l2_edid)
+#define VIDIOC_SUBDEV_S_EDID                    _IOWR('V', 41, struct v4l2_edid)
+#define VIDIOC_SUBDEV_S_DV_TIMINGS              _IOWR('V', 87, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_G_DV_TIMINGS              _IOWR('V', 88, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_ENUM_DV_TIMINGS           _IOWR('V', 98, struct v4l2_enum_dv_timings)
+#define VIDIOC_SUBDEV_QUERY_DV_TIMINGS          _IOR('V', 99, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_DV_TIMINGS_CAP            _IOWR('V', 100, struct v4l2_dv_timings_cap)
 
 #endif
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index ea468ee8fe21..168ff507bf75 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -649,7 +649,6 @@ struct v4l2_plane {
  * @length:     size in bytes of the buffer (NOT its payload) for single-plane
  *              buffers (when type != *_MPLANE); number of elements in the
  *              planes array for multi-plane buffers
- * @input:      input number from which the video data has has been captured
  *
  * Contains data exchanged by application and driver using one of the Streaming
  * I/O methods.
@@ -1107,12 +1106,15 @@ struct v4l2_dv_timings {
 
 /** struct v4l2_enum_dv_timings - DV timings enumeration
  * @index:      enumeration index
+ * @pad:        the pad number for which to enumerate timings (used with
+ *              v4l-subdev nodes only)
  * @reserved:   must be zeroed
  * @timings:    the timings for the given index
  */
 struct v4l2_enum_dv_timings {
         __u32 index;
-        __u32 reserved[3];
+        __u32 pad;
+        __u32 reserved[2];
         struct v4l2_dv_timings timings;
 };
 
@@ -1150,11 +1152,14 @@ struct v4l2_bt_timings_cap {
 
 /** struct v4l2_dv_timings_cap - DV timings capabilities
  * @type:       the type of the timings (same as in struct v4l2_dv_timings)
+ * @pad:        the pad number for which to query capabilities (used with
+ *              v4l-subdev nodes only)
  * @bt:         the BT656/1120 timings capabilities
  */
 struct v4l2_dv_timings_cap {
         __u32 type;
-        __u32 reserved[3];
+        __u32 pad;
+        __u32 reserved[2];
         union {
                 struct v4l2_bt_timings_cap bt;
                 __u32 raw_data[32];
@@ -1765,6 +1770,7 @@ struct v4l2_streamparm {
 #define V4L2_EVENT_EOS                          2
 #define V4L2_EVENT_CTRL                         3
 #define V4L2_EVENT_FRAME_SYNC                   4
+#define V4L2_EVENT_SOURCE_CHANGE                5
 #define V4L2_EVENT_PRIVATE_START                0x08000000
 
 /* Payload for V4L2_EVENT_VSYNC */
@@ -1796,12 +1802,19 @@ struct v4l2_event_frame_sync {
         __u32 frame_sequence;
 };
 
+#define V4L2_EVENT_SRC_CH_RESOLUTION            (1 << 0)
+
+struct v4l2_event_src_change {
+        __u32 changes;
+};
+
 struct v4l2_event {
         __u32                           type;
         union {
                 struct v4l2_event_vsync         vsync;
                 struct v4l2_event_ctrl          ctrl;
                 struct v4l2_event_frame_sync    frame_sync;
+                struct v4l2_event_src_change    src_change;
                 __u8                            data[64];
         } u;
         __u32                           pending;
diff --git a/include/uapi/mtd/mtd-abi.h b/include/uapi/mtd/mtd-abi.h
index e272ea060e38..763bb6950402 100644
--- a/include/uapi/mtd/mtd-abi.h
+++ b/include/uapi/mtd/mtd-abi.h
@@ -109,6 +109,7 @@ struct mtd_write_req {
 #define MTD_CAP_RAM             (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
 #define MTD_CAP_NORFLASH        (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
 #define MTD_CAP_NANDFLASH       (MTD_WRITEABLE)
+#define MTD_CAP_NVRAM           (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
 
 /* Obsolete ECC byte placement modes (used with obsolete MEMGETOOBSEL) */
 #define MTD_NANDECC_OFF         0       // Switch off ECC (Not recommended)
diff --git a/include/uapi/rdma/rdma_netlink.h b/include/uapi/rdma/rdma_netlink.h
index 8297285b6288..de69170a30ce 100644
--- a/include/uapi/rdma/rdma_netlink.h
+++ b/include/uapi/rdma/rdma_netlink.h
@@ -4,7 +4,16 @@
 #include <linux/types.h>
 
 enum {
-        RDMA_NL_RDMA_CM = 1
+        RDMA_NL_RDMA_CM = 1,
+        RDMA_NL_NES,
+        RDMA_NL_C4IW,
+        RDMA_NL_NUM_CLIENTS
+};
+
+enum {
+        RDMA_NL_GROUP_CM = 1,
+        RDMA_NL_GROUP_IWPM,
+        RDMA_NL_NUM_GROUPS
 };
 
 #define RDMA_NL_GET_CLIENT(type) ((type & (((1 << 6) - 1) << 10)) >> 10)
@@ -22,6 +31,18 @@ enum {
         RDMA_NL_RDMA_CM_NUM_ATTR,
 };
 
+/* iwarp port mapper op-codes */
+enum {
+        RDMA_NL_IWPM_REG_PID = 0,
+        RDMA_NL_IWPM_ADD_MAPPING,
+        RDMA_NL_IWPM_QUERY_MAPPING,
+        RDMA_NL_IWPM_REMOVE_MAPPING,
+        RDMA_NL_IWPM_HANDLE_ERR,
+        RDMA_NL_IWPM_MAPINFO,
+        RDMA_NL_IWPM_MAPINFO_NUM,
+        RDMA_NL_IWPM_NUM_OPS
+};
+
 struct rdma_cm_id_stats {
         __u32   qp_num;
         __u32   bound_dev_if;
@@ -33,5 +54,78 @@ struct rdma_cm_id_stats {
         __u8    qp_type;
 };
 
+enum {
+        IWPM_NLA_REG_PID_UNSPEC = 0,
+        IWPM_NLA_REG_PID_SEQ,
+        IWPM_NLA_REG_IF_NAME,
+        IWPM_NLA_REG_IBDEV_NAME,
+        IWPM_NLA_REG_ULIB_NAME,
+        IWPM_NLA_REG_PID_MAX
+};
+
+enum {
+        IWPM_NLA_RREG_PID_UNSPEC = 0,
+        IWPM_NLA_RREG_PID_SEQ,
+        IWPM_NLA_RREG_IBDEV_NAME,
+        IWPM_NLA_RREG_ULIB_NAME,
+        IWPM_NLA_RREG_ULIB_VER,
+        IWPM_NLA_RREG_PID_ERR,
+        IWPM_NLA_RREG_PID_MAX
+
+};
+
+enum {
+        IWPM_NLA_MANAGE_MAPPING_UNSPEC = 0,
+        IWPM_NLA_MANAGE_MAPPING_SEQ,
+        IWPM_NLA_MANAGE_ADDR,
+        IWPM_NLA_MANAGE_MAPPED_LOC_ADDR,
+        IWPM_NLA_RMANAGE_MAPPING_ERR,
+        IWPM_NLA_RMANAGE_MAPPING_MAX
+};
+
+#define IWPM_NLA_MANAGE_MAPPING_MAX 3
+#define IWPM_NLA_QUERY_MAPPING_MAX  4
+#define IWPM_NLA_MAPINFO_SEND_MAX   3
+
+enum {
+        IWPM_NLA_QUERY_MAPPING_UNSPEC = 0,
+        IWPM_NLA_QUERY_MAPPING_SEQ,
+        IWPM_NLA_QUERY_LOCAL_ADDR,
+        IWPM_NLA_QUERY_REMOTE_ADDR,
+        IWPM_NLA_RQUERY_MAPPED_LOC_ADDR,
+        IWPM_NLA_RQUERY_MAPPED_REM_ADDR,
+        IWPM_NLA_RQUERY_MAPPING_ERR,
+        IWPM_NLA_RQUERY_MAPPING_MAX
+};
+
+enum {
+        IWPM_NLA_MAPINFO_REQ_UNSPEC = 0,
+        IWPM_NLA_MAPINFO_ULIB_NAME,
+        IWPM_NLA_MAPINFO_ULIB_VER,
+        IWPM_NLA_MAPINFO_REQ_MAX
+};
+
+enum {
+        IWPM_NLA_MAPINFO_UNSPEC = 0,
+        IWPM_NLA_MAPINFO_LOCAL_ADDR,
+        IWPM_NLA_MAPINFO_MAPPED_ADDR,
+        IWPM_NLA_MAPINFO_MAX
+};
+
+enum {
+        IWPM_NLA_MAPINFO_NUM_UNSPEC = 0,
+        IWPM_NLA_MAPINFO_SEQ,
+        IWPM_NLA_MAPINFO_SEND_NUM,
+        IWPM_NLA_MAPINFO_ACK_NUM,
+        IWPM_NLA_MAPINFO_NUM_MAX
+};
+
+enum {
+        IWPM_NLA_ERR_UNSPEC = 0,
+        IWPM_NLA_ERR_SEQ,
+        IWPM_NLA_ERR_CODE,
+        IWPM_NLA_ERR_MAX
+};
+
 
 #endif /* _UAPI_RDMA_NETLINK_H */
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index 9fc6219d3848..224948342f14 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -94,9 +94,11 @@ enum {
         SNDRV_HWDEP_IFACE_HDA,          /* HD-audio */
         SNDRV_HWDEP_IFACE_USB_STREAM,   /* direct access to usb stream */
         SNDRV_HWDEP_IFACE_FW_DICE,      /* TC DICE FireWire device */
+        SNDRV_HWDEP_IFACE_FW_FIREWORKS, /* Echo Audio Fireworks based device */
+        SNDRV_HWDEP_IFACE_FW_BEBOB,     /* BridgeCo BeBoB based device */
 
         /* Don't forget to change the following: */
-        SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_DICE
+        SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_BEBOB
 };
 
 struct snd_hwdep_info {
diff --git a/include/uapi/sound/firewire.h b/include/uapi/sound/firewire.h
index 59f5961302bf..af4bd136c75d 100644
--- a/include/uapi/sound/firewire.h
+++ b/include/uapi/sound/firewire.h
@@ -2,11 +2,13 @@
 #define _UAPI_SOUND_FIREWIRE_H_INCLUDED
 
 #include <linux/ioctl.h>
+#include <linux/types.h>
 
 /* events can be read() from the hwdep device */
 
 #define SNDRV_FIREWIRE_EVENT_LOCK_STATUS        0x000010cc
 #define SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION  0xd1ce004e
+#define SNDRV_FIREWIRE_EVENT_EFW_RESPONSE       0x4e617475
 
 struct snd_firewire_event_common {
         unsigned int type; /* SNDRV_FIREWIRE_EVENT_xxx */
@@ -22,10 +24,27 @@ struct snd_firewire_event_dice_notification {
         unsigned int notification; /* DICE-specific bits */
 };
 
+#define SND_EFW_TRANSACTION_USER_SEQNUM_MAX     ((__u32)((__u16)~0) - 1)
+/* each field should be in big endian */
+struct snd_efw_transaction {
+        __be32 length;
+        __be32 version;
+        __be32 seqnum;
+        __be32 category;
+        __be32 command;
+        __be32 status;
+        __be32 params[0];
+};
+struct snd_firewire_event_efw_response {
+        unsigned int type;
+        __be32 response[0];     /* some responses */
+};
+
 union snd_firewire_event {
         struct snd_firewire_event_common            common;
         struct snd_firewire_event_lock_status       lock_status;
         struct snd_firewire_event_dice_notification dice_notification;
+        struct snd_firewire_event_efw_response      efw_response;
 };
 
 
@@ -34,7 +53,9 @@ union snd_firewire_event {
 #define SNDRV_FIREWIRE_IOCTL_UNLOCK    _IO('H', 0xfa)
 
 #define SNDRV_FIREWIRE_TYPE_DICE        1
-/* Fireworks, AV/C, RME, MOTU, ... */
+#define SNDRV_FIREWIRE_TYPE_FIREWORKS   2
+#define SNDRV_FIREWIRE_TYPE_BEBOB       3
+/* AV/C, RME, MOTU, ... */
 
 struct snd_firewire_get_info {
         unsigned int type; /* SNDRV_FIREWIRE_TYPE_xxx */
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
new file mode 100644
index 000000000000..3e43e22cdff9
--- /dev/null
+++ b/include/video/imx-ipu-v3.h
@@ -0,0 +1,347 @@
+/*
+ * Copyright 2005-2009 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU Lesser General
+ * Public License.  You may obtain a copy of the GNU Lesser General
+ * Public License Version 2.1 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/lgpl-license.html
+ * http://www.gnu.org/copyleft/lgpl.html
+ */
+
+#ifndef __DRM_IPU_H__
+#define __DRM_IPU_H__
+
+#include <linux/types.h>
+#include <linux/videodev2.h>
+#include <linux/bitmap.h>
+#include <linux/fb.h>
+
+struct ipu_soc;
+
+enum ipuv3_type {
+        IPUV3EX,
+        IPUV3M,
+        IPUV3H,
+};
+
+#define IPU_PIX_FMT_GBR24       v4l2_fourcc('G', 'B', 'R', '3')
+
+/*
+ * Bitfield of Display Interface signal polarities.
+ */
+struct ipu_di_signal_cfg {
+        unsigned datamask_en:1;
+        unsigned interlaced:1;
+        unsigned odd_field_first:1;
+        unsigned clksel_en:1;
+        unsigned clkidle_en:1;
+        unsigned data_pol:1;    /* true = inverted */
+        unsigned clk_pol:1;     /* true = rising edge */
+        unsigned enable_pol:1;
+        unsigned Hsync_pol:1;   /* true = active high */
+        unsigned Vsync_pol:1;
+
+        u16 width;
+        u16 height;
+        u32 pixel_fmt;
+        u16 h_start_width;
+        u16 h_sync_width;
+        u16 h_end_width;
+        u16 v_start_width;
+        u16 v_sync_width;
+        u16 v_end_width;
+        u32 v_to_h_sync;
+        unsigned long pixelclock;
+#define IPU_DI_CLKMODE_SYNC     (1 << 0)
+#define IPU_DI_CLKMODE_EXT      (1 << 1)
+        unsigned long clkflags;
+
+        u8 hsync_pin;
+        u8 vsync_pin;
+};
+
+enum ipu_color_space {
+        IPUV3_COLORSPACE_RGB,
+        IPUV3_COLORSPACE_YUV,
+        IPUV3_COLORSPACE_UNKNOWN,
+};
+
+struct ipuv3_channel;
+
+enum ipu_channel_irq {
+        IPU_IRQ_EOF = 0,
+        IPU_IRQ_NFACK = 64,
+        IPU_IRQ_NFB4EOF = 128,
+        IPU_IRQ_EOS = 192,
+};
+
+int ipu_map_irq(struct ipu_soc *ipu, int irq);
+int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
+                enum ipu_channel_irq irq);
+
+#define IPU_IRQ_DP_SF_START             (448 + 2)
+#define IPU_IRQ_DP_SF_END               (448 + 3)
+#define IPU_IRQ_BG_SF_END               IPU_IRQ_DP_SF_END,
+#define IPU_IRQ_DC_FC_0                 (448 + 8)
+#define IPU_IRQ_DC_FC_1                 (448 + 9)
+#define IPU_IRQ_DC_FC_2                 (448 + 10)
+#define IPU_IRQ_DC_FC_3                 (448 + 11)
+#define IPU_IRQ_DC_FC_4                 (448 + 12)
+#define IPU_IRQ_DC_FC_6                 (448 + 13)
+#define IPU_IRQ_VSYNC_PRE_0             (448 + 14)
+#define IPU_IRQ_VSYNC_PRE_1             (448 + 15)
+
+/*
+ * IPU Image DMA Controller (idmac) functions
+ */
+struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned channel);
+void ipu_idmac_put(struct ipuv3_channel *);
+
+int ipu_idmac_enable_channel(struct ipuv3_channel *channel);
+int ipu_idmac_disable_channel(struct ipuv3_channel *channel);
+int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int ms);
+
+void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
+                bool doublebuffer);
+int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel);
+void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num);
+
+/*
+ * IPU Display Controller (dc) functions
+ */
+struct ipu_dc;
+struct ipu_di;
+struct ipu_dc *ipu_dc_get(struct ipu_soc *ipu, int channel);
+void ipu_dc_put(struct ipu_dc *dc);
+int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced,
+                u32 pixel_fmt, u32 width);
+void ipu_dc_enable(struct ipu_soc *ipu);
+void ipu_dc_enable_channel(struct ipu_dc *dc);
+void ipu_dc_disable_channel(struct ipu_dc *dc);
+void ipu_dc_disable(struct ipu_soc *ipu);
+
+/*
+ * IPU Display Interface (di) functions
+ */
+struct ipu_di *ipu_di_get(struct ipu_soc *ipu, int disp);
+void ipu_di_put(struct ipu_di *);
+int ipu_di_disable(struct ipu_di *);
+int ipu_di_enable(struct ipu_di *);
+int ipu_di_get_num(struct ipu_di *);
+int ipu_di_init_sync_panel(struct ipu_di *, struct ipu_di_signal_cfg *sig);
+
+/*
+ * IPU Display Multi FIFO Controller (dmfc) functions
+ */
+struct dmfc_channel;
+int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc);
+void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc);
+int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc,
+                unsigned long bandwidth_mbs, int burstsize);
+void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc);
+int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width);
+struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipuv3_channel);
+void ipu_dmfc_put(struct dmfc_channel *dmfc);
+
+/*
+ * IPU Display Processor (dp) functions
+ */
+#define IPU_DP_FLOW_SYNC_BG     0
+#define IPU_DP_FLOW_SYNC_FG     1
+#define IPU_DP_FLOW_ASYNC0_BG   2
+#define IPU_DP_FLOW_ASYNC0_FG   3
+#define IPU_DP_FLOW_ASYNC1_BG   4
+#define IPU_DP_FLOW_ASYNC1_FG   5
+
+struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
+void ipu_dp_put(struct ipu_dp *);
+int ipu_dp_enable(struct ipu_soc *ipu);
+int ipu_dp_enable_channel(struct ipu_dp *dp);
+void ipu_dp_disable_channel(struct ipu_dp *dp);
+void ipu_dp_disable(struct ipu_soc *ipu);
+int ipu_dp_setup_channel(struct ipu_dp *dp,
+                enum ipu_color_space in, enum ipu_color_space out);
+int ipu_dp_set_window_pos(struct ipu_dp *, u16 x_pos, u16 y_pos);
+int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable, u8 alpha,
+                bool bg_chan);
+
+/*
+ * IPU CMOS Sensor Interface (csi) functions
+ */
+int ipu_csi_enable(struct ipu_soc *ipu, int csi);
+int ipu_csi_disable(struct ipu_soc *ipu, int csi);
+
+/*
+ * IPU Sensor Multiple FIFO Controller (SMFC) functions
+ */
+int ipu_smfc_enable(struct ipu_soc *ipu);
+int ipu_smfc_disable(struct ipu_soc *ipu);
+int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int mipi_id);
+int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize);
+
+#define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
+
+#define IPU_FIELD_UBO           IPU_CPMEM_WORD(0, 46, 22)
+#define IPU_FIELD_VBO           IPU_CPMEM_WORD(0, 68, 22)
+#define IPU_FIELD_IOX           IPU_CPMEM_WORD(0, 90, 4)
+#define IPU_FIELD_RDRW          IPU_CPMEM_WORD(0, 94, 1)
+#define IPU_FIELD_SO            IPU_CPMEM_WORD(0, 113, 1)
+#define IPU_FIELD_SLY           IPU_CPMEM_WORD(1, 102, 14)
+#define IPU_FIELD_SLUV          IPU_CPMEM_WORD(1, 128, 14)
+
+#define IPU_FIELD_XV            IPU_CPMEM_WORD(0, 0, 10)
+#define IPU_FIELD_YV            IPU_CPMEM_WORD(0, 10, 9)
+#define IPU_FIELD_XB            IPU_CPMEM_WORD(0, 19, 13)
+#define IPU_FIELD_YB            IPU_CPMEM_WORD(0, 32, 12)
+#define IPU_FIELD_NSB_B         IPU_CPMEM_WORD(0, 44, 1)
+#define IPU_FIELD_CF            IPU_CPMEM_WORD(0, 45, 1)
+#define IPU_FIELD_SX            IPU_CPMEM_WORD(0, 46, 12)
+#define IPU_FIELD_SY            IPU_CPMEM_WORD(0, 58, 11)
+#define IPU_FIELD_NS            IPU_CPMEM_WORD(0, 69, 10)
+#define IPU_FIELD_SDX           IPU_CPMEM_WORD(0, 79, 7)
+#define IPU_FIELD_SM            IPU_CPMEM_WORD(0, 86, 10)
+#define IPU_FIELD_SCC           IPU_CPMEM_WORD(0, 96, 1)
+#define IPU_FIELD_SCE           IPU_CPMEM_WORD(0, 97, 1)
+#define IPU_FIELD_SDY           IPU_CPMEM_WORD(0, 98, 7)
+#define IPU_FIELD_SDRX          IPU_CPMEM_WORD(0, 105, 1)
+#define IPU_FIELD_SDRY          IPU_CPMEM_WORD(0, 106, 1)
+#define IPU_FIELD_BPP           IPU_CPMEM_WORD(0, 107, 3)
+#define IPU_FIELD_DEC_SEL       IPU_CPMEM_WORD(0, 110, 2)
+#define IPU_FIELD_DIM           IPU_CPMEM_WORD(0, 112, 1)
+#define IPU_FIELD_BNDM          IPU_CPMEM_WORD(0, 114, 3)
+#define IPU_FIELD_BM            IPU_CPMEM_WORD(0, 117, 2)
+#define IPU_FIELD_ROT           IPU_CPMEM_WORD(0, 119, 1)
+#define IPU_FIELD_HF            IPU_CPMEM_WORD(0, 120, 1)
+#define IPU_FIELD_VF            IPU_CPMEM_WORD(0, 121, 1)
+#define IPU_FIELD_THE           IPU_CPMEM_WORD(0, 122, 1)
+#define IPU_FIELD_CAP           IPU_CPMEM_WORD(0, 123, 1)
+#define IPU_FIELD_CAE           IPU_CPMEM_WORD(0, 124, 1)
+#define IPU_FIELD_FW            IPU_CPMEM_WORD(0, 125, 13)
+#define IPU_FIELD_FH            IPU_CPMEM_WORD(0, 138, 12)
+#define IPU_FIELD_EBA0          IPU_CPMEM_WORD(1, 0, 29)
+#define IPU_FIELD_EBA1          IPU_CPMEM_WORD(1, 29, 29)
+#define IPU_FIELD_ILO           IPU_CPMEM_WORD(1, 58, 20)
+#define IPU_FIELD_NPB           IPU_CPMEM_WORD(1, 78, 7)
+#define IPU_FIELD_PFS           IPU_CPMEM_WORD(1, 85, 4)
+#define IPU_FIELD_ALU           IPU_CPMEM_WORD(1, 89, 1)
+#define IPU_FIELD_ALBM          IPU_CPMEM_WORD(1, 90, 3)
+#define IPU_FIELD_ID            IPU_CPMEM_WORD(1, 93, 2)
+#define IPU_FIELD_TH            IPU_CPMEM_WORD(1, 95, 7)
+#define IPU_FIELD_SL            IPU_CPMEM_WORD(1, 102, 14)
+#define IPU_FIELD_WID0          IPU_CPMEM_WORD(1, 116, 3)
+#define IPU_FIELD_WID1          IPU_CPMEM_WORD(1, 119, 3)
+#define IPU_FIELD_WID2          IPU_CPMEM_WORD(1, 122, 3)
+#define IPU_FIELD_WID3          IPU_CPMEM_WORD(1, 125, 3)
+#define IPU_FIELD_OFS0          IPU_CPMEM_WORD(1, 128, 5)
+#define IPU_FIELD_OFS1          IPU_CPMEM_WORD(1, 133, 5)
+#define IPU_FIELD_OFS2          IPU_CPMEM_WORD(1, 138, 5)
+#define IPU_FIELD_OFS3          IPU_CPMEM_WORD(1, 143, 5)
+#define IPU_FIELD_SXYS          IPU_CPMEM_WORD(1, 148, 1)
+#define IPU_FIELD_CRE           IPU_CPMEM_WORD(1, 149, 1)
+#define IPU_FIELD_DEC_SEL2      IPU_CPMEM_WORD(1, 150, 1)
+
+struct ipu_cpmem_word {
+        u32 data[5];
+        u32 res[3];
+};
+
+struct ipu_ch_param {
+        struct ipu_cpmem_word word[2];
+};
+
+void ipu_ch_param_write_field(struct ipu_ch_param __iomem *base, u32 wbs, u32 v);
+u32 ipu_ch_param_read_field(struct ipu_ch_param __iomem *base, u32 wbs);
+struct ipu_ch_param __iomem *ipu_get_cpmem(struct ipuv3_channel *channel);
+void ipu_ch_param_dump(struct ipu_ch_param __iomem *p);
+
+static inline void ipu_ch_param_zero(struct ipu_ch_param __iomem *p)
+{
+        int i;
+        void __iomem *base = p;
+
+        for (i = 0; i < sizeof(*p) / sizeof(u32); i++)
+                writel(0, base + i * sizeof(u32));
+}
+
+static inline void ipu_cpmem_set_buffer(struct ipu_ch_param __iomem *p,
+                int bufnum, dma_addr_t buf)
+{
+        if (bufnum)
+                ipu_ch_param_write_field(p, IPU_FIELD_EBA1, buf >> 3);
+        else
+                ipu_ch_param_write_field(p, IPU_FIELD_EBA0, buf >> 3);
+}
+
+static inline void ipu_cpmem_set_resolution(struct ipu_ch_param __iomem *p,
+                int xres, int yres)
+{
+        ipu_ch_param_write_field(p, IPU_FIELD_FW, xres - 1);
+        ipu_ch_param_write_field(p, IPU_FIELD_FH, yres - 1);
+}
+
+static inline void ipu_cpmem_set_stride(struct ipu_ch_param __iomem *p,
+                int stride)
+{
+        ipu_ch_param_write_field(p, IPU_FIELD_SLY, stride - 1);
+}
+
+void ipu_cpmem_set_high_priority(struct ipuv3_channel *channel);
+
+struct ipu_rgb {
+        struct fb_bitfield      red;
+        struct fb_bitfield      green;
+        struct fb_bitfield      blue;
+        struct fb_bitfield      transp;
+        int                     bits_per_pixel;
+};
+
+struct ipu_image {
+        struct v4l2_pix_format pix;
+        struct v4l2_rect rect;
+        dma_addr_t phys;
+};
+
+int ipu_cpmem_set_format_passthrough(struct ipu_ch_param __iomem *p,
+                int width);
+
+int ipu_cpmem_set_format_rgb(struct ipu_ch_param __iomem *,
+                const struct ipu_rgb *rgb);
+
+static inline void ipu_cpmem_interlaced_scan(struct ipu_ch_param *p,
+                int stride)
+{
+        ipu_ch_param_write_field(p, IPU_FIELD_SO, 1);
+        ipu_ch_param_write_field(p, IPU_FIELD_ILO, stride / 8);
+        ipu_ch_param_write_field(p, IPU_FIELD_SLY, (stride * 2) - 1);
+};
+
+void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format,
+                        int stride, int height);
+void ipu_cpmem_set_yuv_interleaved(struct ipu_ch_param __iomem *p,
+                                   u32 pixel_format);
+void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
+                u32 pixel_format, int stride, int u_offset, int v_offset);
+int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 pixelformat);
+int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
+                struct ipu_image *image);
+
+enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
+enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
+
+static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
+                int burstsize)
+{
+        ipu_ch_param_write_field(p, IPU_FIELD_NPB, burstsize - 1);
+};
+
+struct ipu_client_platformdata {
+        int csi;
+        int di;
+        int dc;
+        int dp;
+        int dmfc;
+        int dma[2];
+};
+
+#endif /* __DRM_IPU_H__ */
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 6adb44534606..fc06c5b5f12a 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -319,6 +319,7 @@ enum omapdss_version {
         OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
         OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
         OMAPDSS_VER_OMAP5,
+        OMAPDSS_VER_AM43xx,
 };
 
 /* Board specific data */
@@ -388,8 +389,8 @@ struct omap_dss_cpr_coefs {
 };
 
 struct omap_overlay_info {
-        u32 paddr;
-        u32 p_uv_addr;  /* for NV12 format */
+        dma_addr_t paddr;
+        dma_addr_t p_uv_addr;  /* for NV12 format */
         u16 screen_width;
         u16 width;
         u16 height;
@@ -964,9 +965,6 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
                 bool replication, const struct omap_video_timings *mgr_timings,
                 bool mem_to_mem);
 
-#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
-#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
-
 int omapdss_compat_init(void);
 void omapdss_compat_uninit(void);