1 files changed, 128 insertions, 0 deletions
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
new file mode 100644
index 000000000000..8dfe61a445f4
--- /dev/null
+++ b/include/linux/spi/spi_bitbang.h
@@ -0,0 +1,128 @@
+#ifndef __SPI_BITBANG_H
+#define __SPI_BITBANG_H
+/*
+ * Mix this utility code with some glue code to get one of several types of
+ * simple SPI master driver.  Two do polled word-at-a-time I/O:
+ *
+ *   -  GPIO/parport bitbangers.  Provide chipselect() and txrx_word[](),
+ *      expanding the per-word routines from the inline templates below.
+ *
+ *   -  Drivers for controllers resembling bare shift registers.  Provide
+ *      chipselect() and txrx_word[](), with custom setup()/cleanup() methods
+ *      that use your controller's clock and chipselect registers.
+ *
+ * Some hardware works well with requests at spi_transfer scope:
+ *
+ *   -  Drivers leveraging smarter hardware, with fifos or DMA; or for half
+ *      duplex (MicroWire) controllers.  Provide chipslect() and txrx_bufs(),
+ *      and custom setup()/cleanup() methods.
+ */
+struct spi_bitbang {
+        struct workqueue_struct *workqueue;
+        struct work_struct      work;
+        spinlock_t              lock;
+        struct list_head        queue;
+        u8                      busy;
+        u8                      shutdown;
+        u8                      use_dma;
+        struct spi_master       *master;
+        void    (*chipselect)(struct spi_device *spi, int is_on);
+        int     (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t);
+        u32     (*txrx_word[4])(struct spi_device *spi,
+                        unsigned nsecs,
+                        u32 word, u8 bits);
+};
+/* you can call these default bitbang->master methods from your custom
+ * methods, if you like.
+ */
+extern int spi_bitbang_setup(struct spi_device *spi);
+extern void spi_bitbang_cleanup(const struct spi_device *spi);
+extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
+/* start or stop queue processing */
+extern int spi_bitbang_start(struct spi_bitbang *spi);
+extern int spi_bitbang_stop(struct spi_bitbang *spi);
+#endif  /* __SPI_BITBANG_H */
+/*-------------------------------------------------------------------------*/
+#ifdef  EXPAND_BITBANG_TXRX
+/*
+ * The code that knows what GPIO pins do what should have declared four
+ * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX
+ * and including this header:
+ *
+ *  void setsck(struct spi_device *, int is_on);
+ *  void setmosi(struct spi_device *, int is_on);
+ *  int getmiso(struct spi_device *);
+ *  void spidelay(unsigned);
+ *
+ * A non-inlined routine would call bitbang_txrx_*() routines.  The
+ * main loop could easily compile down to a handful of instructions,
+ * especially if the delay is a NOP (to run at peak speed).
+ *
+ * Since this is software, the timings may not be exactly what your board's
+ * chips need ... there may be several reasons you'd need to tweak timings
+ * in these routines, not just make to make it faster or slower to match a
+ * particular CPU clock rate.
+ */
+static inline u32
+bitbang_txrx_be_cpha0(struct spi_device *spi,
+                unsigned nsecs, unsigned cpol,
+                u32 word, u8 bits)
+{
+        /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
+        /* clock starts at inactive polarity */
+        for (word <<= (32 - bits); likely(bits); bits--) {
+                /* setup MSB (to slave) on trailing edge */
+                setmosi(spi, word & (1 << 31));
+                spidelay(nsecs);        /* T(setup) */
+                setsck(spi, !cpol);
+                spidelay(nsecs);
+                /* sample MSB (from slave) on leading edge */
+                word <<= 1;
+                word |= getmiso(spi);
+                setsck(spi, cpol);
+        }
+        return word;
+}
+static inline u32
+bitbang_txrx_be_cpha1(struct spi_device *spi,
+                unsigned nsecs, unsigned cpol,
+                u32 word, u8 bits)
+{
+        /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
+        /* clock starts at inactive polarity */
+        for (word <<= (32 - bits); likely(bits); bits--) {
+                /* setup MSB (to slave) on leading edge */
+                setsck(spi, !cpol);
+                setmosi(spi, word & (1 << 31));
+                spidelay(nsecs); /* T(setup) */
+                setsck(spi, cpol);
+                spidelay(nsecs);
+                /* sample MSB (from slave) on trailing edge */
+                word <<= 1;
+                word |= getmiso(spi);
+        }
+        return word;
+}
+#endif  /* EXPAND_BITBANG_TXRX */

diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h new file mode 100644 index 000000000000..8dfe61a445f4 --- /dev/null +++ b/include/linux/spi/spi_bitbang.h
@@ -0,0 +1,128 @@
	1	#ifndef __SPI_BITBANG_H
	2	#define __SPI_BITBANG_H
	3
	4	/*
	5	* Mix this utility code with some glue code to get one of several types of
	6	* simple SPI master driver. Two do polled word-at-a-time I/O:
	7	*
	8	* - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
	9	* expanding the per-word routines from the inline templates below.
	10	*
	11	* - Drivers for controllers resembling bare shift registers. Provide
	12	* chipselect() and txrx_word[](), with custom setup()/cleanup() methods
	13	* that use your controller's clock and chipselect registers.
	14	*
	15	* Some hardware works well with requests at spi_transfer scope:
	16	*
	17	* - Drivers leveraging smarter hardware, with fifos or DMA; or for half
	18	* duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(),
	19	* and custom setup()/cleanup() methods.
	20	*/
	21	struct spi_bitbang {
	22	struct workqueue_struct *workqueue;
	23	struct work_struct work;
	24
	25	spinlock_t lock;
	26	struct list_head queue;
	27	u8 busy;
	28	u8 shutdown;
	29	u8 use_dma;
	30
	31	struct spi_master *master;
	32
	33	void (chipselect)(struct spi_device spi, int is_on);
	34
	35	int (txrx_bufs)(struct spi_device spi, struct spi_transfer *t);
	36	u32 (txrx_word[4])(struct spi_device spi,
	37	unsigned nsecs,
	38	u32 word, u8 bits);
	39	};
	40
	41	/* you can call these default bitbang->master methods from your custom
	42	* methods, if you like.
	43	*/
	44	extern int spi_bitbang_setup(struct spi_device *spi);
	45	extern void spi_bitbang_cleanup(const struct spi_device *spi);
	46	extern int spi_bitbang_transfer(struct spi_device spi, struct spi_message m);
	47
	48	/* start or stop queue processing */
	49	extern int spi_bitbang_start(struct spi_bitbang *spi);
	50	extern int spi_bitbang_stop(struct spi_bitbang *spi);
	51
	52	#endif /* __SPI_BITBANG_H */
	53
	54	/-------------------------------------------------------------------------/
	55
	56	#ifdef EXPAND_BITBANG_TXRX
	57
	58	/*
	59	* The code that knows what GPIO pins do what should have declared four
	60	* functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX
	61	* and including this header:
	62	*
	63	* void setsck(struct spi_device *, int is_on);
	64	* void setmosi(struct spi_device *, int is_on);
	65	* int getmiso(struct spi_device *);
	66	* void spidelay(unsigned);
	67	*
	68	* A non-inlined routine would call bitbang_txrx_*() routines. The
	69	* main loop could easily compile down to a handful of instructions,
	70	* especially if the delay is a NOP (to run at peak speed).
	71	*
	72	* Since this is software, the timings may not be exactly what your board's
	73	* chips need ... there may be several reasons you'd need to tweak timings
	74	* in these routines, not just make to make it faster or slower to match a
	75	* particular CPU clock rate.
	76	*/
	77
	78	static inline u32
	79	bitbang_txrx_be_cpha0(struct spi_device *spi,
	80	unsigned nsecs, unsigned cpol,
	81	u32 word, u8 bits)
	82	{
	83	/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
	84
	85	/* clock starts at inactive polarity */
	86	for (word <<= (32 - bits); likely(bits); bits--) {
	87
	88	/* setup MSB (to slave) on trailing edge */
	89	setmosi(spi, word & (1 << 31));
	90	spidelay(nsecs); /* T(setup) */
	91
	92	setsck(spi, !cpol);
	93	spidelay(nsecs);
	94
	95	/* sample MSB (from slave) on leading edge */
	96	word <<= 1;
	97	word \|= getmiso(spi);
	98	setsck(spi, cpol);
	99	}
	100	return word;
	101	}
	102
	103	static inline u32
	104	bitbang_txrx_be_cpha1(struct spi_device *spi,
	105	unsigned nsecs, unsigned cpol,
	106	u32 word, u8 bits)
	107	{
	108	/* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
	109
	110	/* clock starts at inactive polarity */
	111	for (word <<= (32 - bits); likely(bits); bits--) {
	112
	113	/* setup MSB (to slave) on leading edge */
	114	setsck(spi, !cpol);
	115	setmosi(spi, word & (1 << 31));
	116	spidelay(nsecs); /* T(setup) */
	117
	118	setsck(spi, cpol);
	119	spidelay(nsecs);
	120
	121	/* sample MSB (from slave) on trailing edge */
	122	word <<= 1;
	123	word \|= getmiso(spi);
	124	}
	125	return word;
	126	}
	127
	128	#endif /* EXPAND_BITBANG_TXRX */