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-rw-r--r--include/asm-sparc/irqflags.h39
-rw-r--r--include/asm-sparc/system.h22
-rw-r--r--include/asm-sparc64/cpudata.h21
-rw-r--r--include/asm-sparc64/irq.h13
4 files changed, 62 insertions, 33 deletions
diff --git a/include/asm-sparc/irqflags.h b/include/asm-sparc/irqflags.h
new file mode 100644
index 000000000000..db398fb32826
--- /dev/null
+++ b/include/asm-sparc/irqflags.h
@@ -0,0 +1,39 @@
1/*
2 * include/asm-sparc/irqflags.h
3 *
4 * IRQ flags handling
5 *
6 * This file gets included from lowlevel asm headers too, to provide
7 * wrapped versions of the local_irq_*() APIs, based on the
8 * raw_local_irq_*() functions from the lowlevel headers.
9 */
10#ifndef _ASM_IRQFLAGS_H
11#define _ASM_IRQFLAGS_H
12
13#ifndef __ASSEMBLY__
14
15extern void raw_local_irq_restore(unsigned long);
16extern unsigned long __raw_local_irq_save(void);
17extern void raw_local_irq_enable(void);
18
19static inline unsigned long getipl(void)
20{
21 unsigned long retval;
22
23 __asm__ __volatile__("rd %%psr, %0" : "=r" (retval));
24 return retval;
25}
26
27#define raw_local_save_flags(flags) ((flags) = getipl())
28#define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save())
29#define raw_local_irq_disable() ((void) __raw_local_irq_save())
30#define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0)
31
32static inline int raw_irqs_disabled_flags(unsigned long flags)
33{
34 return ((flags & PSR_PIL) != 0);
35}
36
37#endif /* (__ASSEMBLY__) */
38
39#endif /* !(_ASM_IRQFLAGS_H) */
diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index d1a2572e3f55..8c259de02614 100644
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -15,6 +15,8 @@
15 15
16#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
17 17
18#include <linux/irqflags.h>
19
18/* 20/*
19 * Sparc (general) CPU types 21 * Sparc (general) CPU types
20 */ 22 */
@@ -164,26 +166,6 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
164 "o0", "o1", "o2", "o3", "o7"); \ 166 "o0", "o1", "o2", "o3", "o7"); \
165 } while(0) 167 } while(0)
166 168
167/*
168 * Changing the IRQ level on the Sparc.
169 */
170extern void local_irq_restore(unsigned long);
171extern unsigned long __local_irq_save(void);
172extern void local_irq_enable(void);
173
174static inline unsigned long getipl(void)
175{
176 unsigned long retval;
177
178 __asm__ __volatile__("rd %%psr, %0" : "=r" (retval));
179 return retval;
180}
181
182#define local_save_flags(flags) ((flags) = getipl())
183#define local_irq_save(flags) ((flags) = __local_irq_save())
184#define local_irq_disable() ((void) __local_irq_save())
185#define irqs_disabled() ((getipl() & PSR_PIL) != 0)
186
187/* XXX Change this if we ever use a PSO mode kernel. */ 169/* XXX Change this if we ever use a PSO mode kernel. */
188#define mb() __asm__ __volatile__ ("" : : : "memory") 170#define mb() __asm__ __volatile__ ("" : : : "memory")
189#define rmb() mb() 171#define rmb() mb()
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 98a6e609163e..542421460a12 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -75,12 +75,11 @@ struct trap_per_cpu {
75 unsigned long tsb_huge_temp; 75 unsigned long tsb_huge_temp;
76 76
77/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ 77/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */
78 unsigned int irq_worklist; 78 unsigned long irq_worklist_pa;
79 unsigned int cpu_mondo_qmask; 79 unsigned int cpu_mondo_qmask;
80 unsigned int dev_mondo_qmask; 80 unsigned int dev_mondo_qmask;
81 unsigned int resum_qmask; 81 unsigned int resum_qmask;
82 unsigned int nonresum_qmask; 82 unsigned int nonresum_qmask;
83 unsigned int __pad2[1];
84 void *hdesc; 83 void *hdesc;
85} __attribute__((aligned(64))); 84} __attribute__((aligned(64)));
86extern struct trap_per_cpu trap_block[NR_CPUS]; 85extern struct trap_per_cpu trap_block[NR_CPUS];
@@ -128,11 +127,11 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
128#define TRAP_PER_CPU_CPU_LIST_PA 0xc8 127#define TRAP_PER_CPU_CPU_LIST_PA 0xc8
129#define TRAP_PER_CPU_TSB_HUGE 0xd0 128#define TRAP_PER_CPU_TSB_HUGE 0xd0
130#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 129#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8
131#define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 130#define TRAP_PER_CPU_IRQ_WORKLIST_PA 0xe0
132#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe4 131#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe8
133#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xe8 132#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xec
134#define TRAP_PER_CPU_RESUM_QMASK 0xec 133#define TRAP_PER_CPU_RESUM_QMASK 0xf0
135#define TRAP_PER_CPU_NONRESUM_QMASK 0xf0 134#define TRAP_PER_CPU_NONRESUM_QMASK 0xf4
136 135
137#define TRAP_BLOCK_SZ_SHIFT 8 136#define TRAP_BLOCK_SZ_SHIFT 8
138 137
@@ -184,9 +183,9 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
184 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; 183 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
185 184
186/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ 185/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
187#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ 186#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \
188 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ 187 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
189 add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST; 188 add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
190 189
191/* Clobbers TMP, loads DEST with current thread info pointer. */ 190/* Clobbers TMP, loads DEST with current thread info pointer. */
192#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ 191#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
@@ -223,9 +222,9 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
223 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; 222 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
224 223
225/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ 224/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
226#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ 225#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \
227 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ 226 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
228 add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST; 227 add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST;
229 228
230#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ 229#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
231 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ 230 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index c00ad152771b..182dba05c702 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -51,10 +51,19 @@ extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
51 unsigned int msi_devino_start, 51 unsigned int msi_devino_start,
52 unsigned int msi_devino_end); 52 unsigned int msi_devino_end);
53extern void sun4v_destroy_msi(unsigned int virt_irq); 53extern void sun4v_destroy_msi(unsigned int virt_irq);
54extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
55 unsigned int msi_devino_start,
56 unsigned int msi_devino_end,
57 unsigned long imap_base,
58 unsigned long iclr_base);
59extern void sun4u_destroy_msi(unsigned int virt_irq);
54extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 60extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
55 61
56extern void sparc64_set_msi(unsigned int virt_irq, u32 msi); 62extern unsigned char virt_irq_alloc(unsigned int dev_handle,
57extern u32 sparc64_get_msi(unsigned int virt_irq); 63 unsigned int dev_ino);
64#ifdef CONFIG_PCI_MSI
65extern void virt_irq_free(unsigned int virt_irq);
66#endif
58 67
59extern void fixup_irqs(void); 68extern void fixup_irqs(void);
60 69