diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/cputable.h | 22 | ||||
-rw-r--r-- | include/asm-powerpc/delay.h | 40 | ||||
-rw-r--r-- | include/asm-powerpc/eeh.h | 4 | ||||
-rw-r--r-- | include/asm-powerpc/topology.h | 4 |
4 files changed, 21 insertions, 49 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 04e2726002cf..d1cfa3f515ea 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -90,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
90 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) | 90 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) |
91 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) | 91 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) |
92 | #define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) | 92 | #define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) |
93 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) | ||
93 | 94 | ||
94 | #ifdef __powerpc64__ | 95 | #ifdef __powerpc64__ |
95 | /* Add the 64b processor unique features in the top half of the word */ | 96 | /* Add the 64b processor unique features in the top half of the word */ |
@@ -97,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
97 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) | 98 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) |
98 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) | 99 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) |
99 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) | 100 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) |
100 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000) | ||
101 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) | 101 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) |
102 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) | 102 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) |
103 | #define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) | 103 | #define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) |
@@ -113,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
113 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0) | 113 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0) |
114 | #define CPU_FTR_TLBIEL ASM_CONST(0x0) | 114 | #define CPU_FTR_TLBIEL ASM_CONST(0x0) |
115 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0) | 115 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0) |
116 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0) | ||
117 | #define CPU_FTR_IABR ASM_CONST(0x0) | 116 | #define CPU_FTR_IABR ASM_CONST(0x0) |
118 | #define CPU_FTR_MMCRA ASM_CONST(0x0) | 117 | #define CPU_FTR_MMCRA ASM_CONST(0x0) |
119 | #define CPU_FTR_CTRL ASM_CONST(0x0) | 118 | #define CPU_FTR_CTRL ASM_CONST(0x0) |
@@ -273,18 +272,21 @@ enum { | |||
273 | CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | | 272 | CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | |
274 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, | 273 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, |
275 | CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | | 274 | CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | |
276 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, | 275 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN, |
277 | CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | | 276 | CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | |
278 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP | | 277 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP | |
279 | CPU_FTR_MAYBE_CAN_NAP, | 278 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN, |
280 | CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, | 279 | CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, |
281 | CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, | 280 | CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | |
282 | CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, | 281 | CPU_FTR_NODSISRALIGN, |
283 | CPU_FTRS_E200 = CPU_FTR_USE_TB, | 282 | CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | |
284 | CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, | 283 | CPU_FTR_NODSISRALIGN, |
284 | CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN, | ||
285 | CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
286 | CPU_FTR_NODSISRALIGN, | ||
285 | CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 287 | CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | |
286 | CPU_FTR_BIG_PHYS, | 288 | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN, |
287 | CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON, | 289 | CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN, |
288 | #ifdef __powerpc64__ | 290 | #ifdef __powerpc64__ |
289 | CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 291 | CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | |
290 | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR, | 292 | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR, |
diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h index 1492aa9ab716..54fe1f4f8fd0 100644 --- a/include/asm-powerpc/delay.h +++ b/include/asm-powerpc/delay.h | |||
@@ -13,43 +13,7 @@ | |||
13 | * Anton Blanchard. | 13 | * Anton Blanchard. |
14 | */ | 14 | */ |
15 | 15 | ||
16 | extern unsigned long tb_ticks_per_usec; | 16 | extern void __delay(unsigned long loops); |
17 | 17 | extern void udelay(unsigned long usecs); | |
18 | #ifdef CONFIG_PPC64 | ||
19 | /* define these here to prevent circular dependencies */ | ||
20 | /* these instructions control the thread priority on multi-threaded cpus */ | ||
21 | #define __HMT_low() asm volatile("or 1,1,1") | ||
22 | #define __HMT_medium() asm volatile("or 2,2,2") | ||
23 | #else | ||
24 | #define __HMT_low() | ||
25 | #define __HMT_medium() | ||
26 | #endif | ||
27 | |||
28 | #define __barrier() asm volatile("" ::: "memory") | ||
29 | |||
30 | static inline unsigned long __get_tb(void) | ||
31 | { | ||
32 | unsigned long rval; | ||
33 | |||
34 | asm volatile("mftb %0" : "=r" (rval)); | ||
35 | return rval; | ||
36 | } | ||
37 | |||
38 | static inline void __delay(unsigned long loops) | ||
39 | { | ||
40 | unsigned long start = __get_tb(); | ||
41 | |||
42 | while((__get_tb() - start) < loops) | ||
43 | __HMT_low(); | ||
44 | __HMT_medium(); | ||
45 | __barrier(); | ||
46 | } | ||
47 | |||
48 | static inline void udelay(unsigned long usecs) | ||
49 | { | ||
50 | unsigned long loops = tb_ticks_per_usec * usecs; | ||
51 | |||
52 | __delay(loops); | ||
53 | } | ||
54 | 18 | ||
55 | #endif /* _ASM_POWERPC_DELAY_H */ | 19 | #endif /* _ASM_POWERPC_DELAY_H */ |
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h index 89f26ab31908..f8633aafe4ba 100644 --- a/include/asm-powerpc/eeh.h +++ b/include/asm-powerpc/eeh.h | |||
@@ -30,6 +30,8 @@ struct device_node; | |||
30 | 30 | ||
31 | #ifdef CONFIG_EEH | 31 | #ifdef CONFIG_EEH |
32 | 32 | ||
33 | extern int eeh_subsystem_enabled; | ||
34 | |||
33 | /* Values for eeh_mode bits in device_node */ | 35 | /* Values for eeh_mode bits in device_node */ |
34 | #define EEH_MODE_SUPPORTED (1<<0) | 36 | #define EEH_MODE_SUPPORTED (1<<0) |
35 | #define EEH_MODE_NOCHECK (1<<1) | 37 | #define EEH_MODE_NOCHECK (1<<1) |
@@ -75,7 +77,7 @@ void eeh_remove_device(struct pci_dev *); | |||
75 | * If this macro yields TRUE, the caller relays to eeh_check_failure() | 77 | * If this macro yields TRUE, the caller relays to eeh_check_failure() |
76 | * which does further tests out of line. | 78 | * which does further tests out of line. |
77 | */ | 79 | */ |
78 | #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0) | 80 | #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) |
79 | 81 | ||
80 | /* | 82 | /* |
81 | * Reads from a device which has been isolated by EEH will return | 83 | * Reads from a device which has been isolated by EEH will return |
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h index 015d28746e1b..db8095cbe09b 100644 --- a/include/asm-powerpc/topology.h +++ b/include/asm-powerpc/topology.h | |||
@@ -41,6 +41,10 @@ static inline int node_to_first_cpu(int node) | |||
41 | .cache_hot_time = (10*1000000), \ | 41 | .cache_hot_time = (10*1000000), \ |
42 | .cache_nice_tries = 1, \ | 42 | .cache_nice_tries = 1, \ |
43 | .per_cpu_gain = 100, \ | 43 | .per_cpu_gain = 100, \ |
44 | .busy_idx = 3, \ | ||
45 | .idle_idx = 1, \ | ||
46 | .newidle_idx = 2, \ | ||
47 | .wake_idx = 1, \ | ||
44 | .flags = SD_LOAD_BALANCE \ | 48 | .flags = SD_LOAD_BALANCE \ |
45 | | SD_BALANCE_EXEC \ | 49 | | SD_BALANCE_EXEC \ |
46 | | SD_BALANCE_NEWIDLE \ | 50 | | SD_BALANCE_NEWIDLE \ |