diff options
Diffstat (limited to 'include')
60 files changed, 351 insertions, 306 deletions
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 7b74b60a68a4..19c3ead2a90b 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h | |||
@@ -168,8 +168,7 @@ struct acpi_device_flags { | |||
168 | u32 power_manageable:1; | 168 | u32 power_manageable:1; |
169 | u32 performance_manageable:1; | 169 | u32 performance_manageable:1; |
170 | u32 wake_capable:1; /* Wakeup(_PRW) supported? */ | 170 | u32 wake_capable:1; /* Wakeup(_PRW) supported? */ |
171 | u32 force_power_state:1; | 171 | u32 reserved:20; |
172 | u32 reserved:19; | ||
173 | }; | 172 | }; |
174 | 173 | ||
175 | /* File System */ | 174 | /* File System */ |
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h index d96b10fd449f..c0d7075982c1 100644 --- a/include/asm-arm/arch-at91/board.h +++ b/include/asm-arm/arch-at91/board.h | |||
@@ -130,4 +130,7 @@ extern u8 at91_leds_cpu; | |||
130 | extern u8 at91_leds_timer; | 130 | extern u8 at91_leds_timer; |
131 | extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); | 131 | extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); |
132 | 132 | ||
133 | /* FIXME: this needs a better location, but gets stuff building again */ | ||
134 | extern int at91_suspend_entering_slow_clock(void); | ||
135 | |||
133 | #endif | 136 | #endif |
diff --git a/include/asm-arm/arch-davinci/gpio.h b/include/asm-arm/arch-davinci/gpio.h index ea24a0e0bfd6..ff8de30b2fb3 100644 --- a/include/asm-arm/arch-davinci/gpio.h +++ b/include/asm-arm/arch-davinci/gpio.h | |||
@@ -13,6 +13,9 @@ | |||
13 | #ifndef __DAVINCI_GPIO_H | 13 | #ifndef __DAVINCI_GPIO_H |
14 | #define __DAVINCI_GPIO_H | 14 | #define __DAVINCI_GPIO_H |
15 | 15 | ||
16 | #include <linux/io.h> | ||
17 | #include <asm/hardware.h> | ||
18 | |||
16 | /* | 19 | /* |
17 | * basic gpio routines | 20 | * basic gpio routines |
18 | * | 21 | * |
diff --git a/include/asm-arm/arch-pxa/mfp-pxa300.h b/include/asm-arm/arch-pxa/mfp-pxa300.h index 7513c7a3402d..822a27cd7864 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa300.h +++ b/include/asm-arm/arch-pxa/mfp-pxa300.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * PXA300/PXA310 specific MFP configuration definitions | 4 | * PXA300/PXA310 specific MFP configuration definitions |
5 | * | 5 | * |
6 | * Copyright (C) 2007 Marvell International Ltd. | 6 | * Copyright (C) 2007 Marvell International Ltd. |
7 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | 7 | * 2007-08-21: eric miao <eric.miao@marvell.com> |
8 | * initial version | 8 | * initial version |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
diff --git a/include/asm-arm/arch-pxa/mfp-pxa320.h b/include/asm-arm/arch-pxa/mfp-pxa320.h index ae8ba34194cf..488a5bbc49e9 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa320.h +++ b/include/asm-arm/arch-pxa/mfp-pxa320.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * PXA320 specific MFP configuration definitions | 4 | * PXA320 specific MFP configuration definitions |
5 | * | 5 | * |
6 | * Copyright (C) 2007 Marvell International Ltd. | 6 | * Copyright (C) 2007 Marvell International Ltd. |
7 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | 7 | * 2007-08-21: eric miao <eric.miao@marvell.com> |
8 | * initial version | 8 | * initial version |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h index 60291742ffdd..ac4157af5a8e 100644 --- a/include/asm-arm/arch-pxa/mfp.h +++ b/include/asm-arm/arch-pxa/mfp.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Copyright (C) 2007 Marvell International Ltd. | 6 | * Copyright (C) 2007 Marvell International Ltd. |
7 | * | 7 | * |
8 | * 2007-8-21: eric miao <eric.y.miao@gmail.com> | 8 | * 2007-8-21: eric miao <eric.miao@marvell.com> |
9 | * initial version | 9 | * initial version |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h index 16f5375e57b8..9918aa46d9e5 100644 --- a/include/asm-arm/flat.h +++ b/include/asm-arm/flat.h | |||
@@ -11,8 +11,9 @@ | |||
11 | #define flat_argvp_envp_on_stack() 1 | 11 | #define flat_argvp_envp_on_stack() 1 |
12 | #define flat_old_ram_flag(flags) (flags) | 12 | #define flat_old_ram_flag(flags) (flags) |
13 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) | 13 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) |
14 | #define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp) | 14 | #define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp) |
15 | #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) | 15 | #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) |
16 | #define flat_get_relocate_addr(rel) (rel) | 16 | #define flat_get_relocate_addr(rel) (rel) |
17 | #define flat_set_persistent(relval, p) 0 | ||
17 | 18 | ||
18 | #endif /* __ARM_FLAT_H__ */ | 19 | #endif /* __ARM_FLAT_H__ */ |
diff --git a/include/asm-arm/plat-s3c/regs-nand.h b/include/asm-arm/plat-s3c/regs-nand.h index b824d371ae0b..d742205ac172 100644 --- a/include/asm-arm/plat-s3c/regs-nand.h +++ b/include/asm-arm/plat-s3c/regs-nand.h | |||
@@ -35,7 +35,7 @@ | |||
35 | #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) | 35 | #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) |
36 | #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) | 36 | #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) |
37 | #define S3C2440_NFMECC1 S3C2410_NFREG(0x30) | 37 | #define S3C2440_NFMECC1 S3C2410_NFREG(0x30) |
38 | #define S3C2440_NFSECC S3C24E10_NFREG(0x34) | 38 | #define S3C2440_NFSECC S3C2410_NFREG(0x34) |
39 | #define S3C2440_NFSBLK S3C2410_NFREG(0x38) | 39 | #define S3C2440_NFSBLK S3C2410_NFREG(0x38) |
40 | #define S3C2440_NFEBLK S3C2410_NFREG(0x3C) | 40 | #define S3C2440_NFEBLK S3C2410_NFREG(0x3C) |
41 | 41 | ||
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h index 14cb8d35924e..0212e180b90e 100644 --- a/include/asm-blackfin/bfin-global.h +++ b/include/asm-blackfin/bfin-global.h | |||
@@ -80,6 +80,7 @@ extern int atomic_sub32(void); | |||
80 | extern int atomic_ior32(void); | 80 | extern int atomic_ior32(void); |
81 | extern int atomic_and32(void); | 81 | extern int atomic_and32(void); |
82 | extern int atomic_xor32(void); | 82 | extern int atomic_xor32(void); |
83 | extern void safe_user_instruction(void); | ||
83 | extern void sigreturn_stub(void); | 84 | extern void sigreturn_stub(void); |
84 | 85 | ||
85 | extern void *l1_data_A_sram_alloc(size_t); | 86 | extern void *l1_data_A_sram_alloc(size_t); |
diff --git a/include/asm-blackfin/fixed_code.h b/include/asm-blackfin/fixed_code.h index e6df84ee1557..37db66c7030d 100644 --- a/include/asm-blackfin/fixed_code.h +++ b/include/asm-blackfin/fixed_code.h | |||
@@ -17,4 +17,6 @@ | |||
17 | 17 | ||
18 | #define ATOMIC_SEQS_END 0x480 | 18 | #define ATOMIC_SEQS_END 0x480 |
19 | 19 | ||
20 | #define FIXED_CODE_END 0x480 | 20 | #define SAFE_USER_INSTRUCTION 0x480 |
21 | |||
22 | #define FIXED_CODE_END 0x490 | ||
diff --git a/include/asm-blackfin/gptimers.h b/include/asm-blackfin/gptimers.h index c97ab03e43a6..8265ea473d5b 100644 --- a/include/asm-blackfin/gptimers.h +++ b/include/asm-blackfin/gptimers.h | |||
@@ -197,6 +197,8 @@ uint32_t get_gptimer_period (int timer_id); | |||
197 | uint32_t get_gptimer_count (int timer_id); | 197 | uint32_t get_gptimer_count (int timer_id); |
198 | uint16_t get_gptimer_intr (int timer_id); | 198 | uint16_t get_gptimer_intr (int timer_id); |
199 | void clear_gptimer_intr (int timer_id); | 199 | void clear_gptimer_intr (int timer_id); |
200 | uint16_t get_gptimer_over (int timer_id); | ||
201 | void clear_gptimer_over (int timer_id); | ||
200 | void set_gptimer_config (int timer_id, uint16_t config); | 202 | void set_gptimer_config (int timer_id, uint16_t config); |
201 | uint16_t get_gptimer_config (int timer_id); | 203 | uint16_t get_gptimer_config (int timer_id); |
202 | void set_gptimer_pulse_hi (int timer_id); | 204 | void set_gptimer_pulse_hi (int timer_id); |
diff --git a/include/asm-blackfin/mach-bf527/defBF52x_base.h b/include/asm-blackfin/mach-bf527/defBF52x_base.h index d6c24c54699d..fc69cf93f149 100644 --- a/include/asm-blackfin/mach-bf527/defBF52x_base.h +++ b/include/asm-blackfin/mach-bf527/defBF52x_base.h | |||
@@ -1718,55 +1718,55 @@ | |||
1718 | 1718 | ||
1719 | /* Bit masks for HOST_CONTROL */ | 1719 | /* Bit masks for HOST_CONTROL */ |
1720 | 1720 | ||
1721 | #define HOST_EN 0x1 /* Host Enable */ | 1721 | #define HOST_CNTR_HOST_EN 0x1 /* Host Enable */ |
1722 | #define nHOST_EN 0x0 | 1722 | #define HOST_CNTR_nHOST_EN 0x0 |
1723 | #define HOST_END 0x2 /* Host Endianess */ | 1723 | #define HOST_CNTR_HOST_END 0x2 /* Host Endianess */ |
1724 | #define nHOST_END 0x0 | 1724 | #define HOST_CNTR_nHOST_END 0x0 |
1725 | #define DATA_SIZE 0x4 /* Data Size */ | 1725 | #define HOST_CNTR_DATA_SIZE 0x4 /* Data Size */ |
1726 | #define nDATA_SIZE 0x0 | 1726 | #define HOST_CNTR_nDATA_SIZE 0x0 |
1727 | #define HOST_RST 0x8 /* Host Reset */ | 1727 | #define HOST_CNTR_HOST_RST 0x8 /* Host Reset */ |
1728 | #define nHOST_RST 0x0 | 1728 | #define HOST_CNTR_nHOST_RST 0x0 |
1729 | #define HRDY_OVR 0x20 /* Host Ready Override */ | 1729 | #define HOST_CNTR_HRDY_OVR 0x20 /* Host Ready Override */ |
1730 | #define nHRDY_OVR 0x0 | 1730 | #define HOST_CNTR_nHRDY_OVR 0x0 |
1731 | #define INT_MODE 0x40 /* Interrupt Mode */ | 1731 | #define HOST_CNTR_INT_MODE 0x40 /* Interrupt Mode */ |
1732 | #define nINT_MODE 0x0 | 1732 | #define HOST_CNTR_nINT_MODE 0x0 |
1733 | #define BT_EN 0x80 /* Bus Timeout Enable */ | 1733 | #define HOST_CNTR_BT_EN 0x80 /* Bus Timeout Enable */ |
1734 | #define nBT_EN 0x0 | 1734 | #define HOST_CNTR_ nBT_EN 0x0 |
1735 | #define EHW 0x100 /* Enable Host Write */ | 1735 | #define HOST_CNTR_EHW 0x100 /* Enable Host Write */ |
1736 | #define nEHW 0x0 | 1736 | #define HOST_CNTR_nEHW 0x0 |
1737 | #define EHR 0x200 /* Enable Host Read */ | 1737 | #define HOST_CNTR_EHR 0x200 /* Enable Host Read */ |
1738 | #define nEHR 0x0 | 1738 | #define HOST_CNTR_nEHR 0x0 |
1739 | #define BDR 0x400 /* Burst DMA Requests */ | 1739 | #define HOST_CNTR_BDR 0x400 /* Burst DMA Requests */ |
1740 | #define nBDR 0x0 | 1740 | #define HOST_CNTR_nBDR 0x0 |
1741 | 1741 | ||
1742 | /* Bit masks for HOST_STATUS */ | 1742 | /* Bit masks for HOST_STATUS */ |
1743 | 1743 | ||
1744 | #define READY 0x1 /* DMA Ready */ | 1744 | #define HOST_STAT_READY 0x1 /* DMA Ready */ |
1745 | #define nREADY 0x0 | 1745 | #define HOST_STAT_nREADY 0x0 |
1746 | #define FIFOFULL 0x2 /* FIFO Full */ | 1746 | #define HOST_STAT_FIFOFULL 0x2 /* FIFO Full */ |
1747 | #define nFIFOFULL 0x0 | 1747 | #define HOST_STAT_nFIFOFULL 0x0 |
1748 | #define FIFOEMPTY 0x4 /* FIFO Empty */ | 1748 | #define HOST_STAT_FIFOEMPTY 0x4 /* FIFO Empty */ |
1749 | #define nFIFOEMPTY 0x0 | 1749 | #define HOST_STAT_nFIFOEMPTY 0x0 |
1750 | #define COMPLETE 0x8 /* DMA Complete */ | 1750 | #define HOST_STAT_COMPLETE 0x8 /* DMA Complete */ |
1751 | #define nCOMPLETE 0x0 | 1751 | #define HOST_STAT_nCOMPLETE 0x0 |
1752 | #define HSHK 0x10 /* Host Handshake */ | 1752 | #define HOST_STAT_HSHK 0x10 /* Host Handshake */ |
1753 | #define nHSHK 0x0 | 1753 | #define HOST_STAT_nHSHK 0x0 |
1754 | #define TIMEOUT 0x20 /* Host Timeout */ | 1754 | #define HOST_STAT_TIMEOUT 0x20 /* Host Timeout */ |
1755 | #define nTIMEOUT 0x0 | 1755 | #define HOST_STAT_nTIMEOUT 0x0 |
1756 | #define HIRQ 0x40 /* Host Interrupt Request */ | 1756 | #define HOST_STAT_HIRQ 0x40 /* Host Interrupt Request */ |
1757 | #define nHIRQ 0x0 | 1757 | #define HOST_STAT_nHIRQ 0x0 |
1758 | #define ALLOW_CNFG 0x80 /* Allow New Configuration */ | 1758 | #define HOST_STAT_ALLOW_CNFG 0x80 /* Allow New Configuration */ |
1759 | #define nALLOW_CNFG 0x0 | 1759 | #define HOST_STAT_nALLOW_CNFG 0x0 |
1760 | #define DMA_DIR 0x100 /* DMA Direction */ | 1760 | #define HOST_STAT_DMA_DIR 0x100 /* DMA Direction */ |
1761 | #define nDMA_DIR 0x0 | 1761 | #define HOST_STAT_nDMA_DIR 0x0 |
1762 | #define BTE 0x200 /* Bus Timeout Enabled */ | 1762 | #define HOST_STAT_BTE 0x200 /* Bus Timeout Enabled */ |
1763 | #define nBTE 0x0 | 1763 | #define HOST_STAT_nBTE 0x0 |
1764 | #define HOSTRD_DONE 0x8000 /* Host Read Completion Interrupt */ | 1764 | #define HOST_STAT_HOSTRD_DONE 0x8000 /* Host Read Completion Interrupt */ |
1765 | #define nHOSTRD_DONE 0x0 | 1765 | #define HOST_STAT_nHOSTRD_DONE 0x0 |
1766 | 1766 | ||
1767 | /* Bit masks for HOST_TIMEOUT */ | 1767 | /* Bit masks for HOST_TIMEOUT */ |
1768 | 1768 | ||
1769 | #define COUNT_TIMEOUT 0x7ff /* Host Timeout count */ | 1769 | #define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */ |
1770 | 1770 | ||
1771 | /* Bit masks for CNT_CONFIG */ | 1771 | /* Bit masks for CNT_CONFIG */ |
1772 | 1772 | ||
diff --git a/include/asm-blackfin/mach-bf527/dma.h b/include/asm-blackfin/mach-bf527/dma.h index a41627ae9134..2dfee12864f6 100644 --- a/include/asm-blackfin/mach-bf527/dma.h +++ b/include/asm-blackfin/mach-bf527/dma.h | |||
@@ -35,7 +35,6 @@ | |||
35 | #define MAX_BLACKFIN_DMA_CHANNEL 16 | 35 | #define MAX_BLACKFIN_DMA_CHANNEL 16 |
36 | 36 | ||
37 | #define CH_PPI 0 /* PPI receive/transmit or NFC */ | 37 | #define CH_PPI 0 /* PPI receive/transmit or NFC */ |
38 | #define CH_NFC 0 /* PPI receive/transmit or NFC */ | ||
39 | #define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */ | 38 | #define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */ |
40 | #define CH_EMAC_HOSTDP 1 /* Ethernet MAC receive or HOSTDP */ | 39 | #define CH_EMAC_HOSTDP 1 /* Ethernet MAC receive or HOSTDP */ |
41 | #define CH_EMAC_TX 2 /* Ethernet MAC transmit or NFC */ | 40 | #define CH_EMAC_TX 2 /* Ethernet MAC transmit or NFC */ |
@@ -54,6 +53,12 @@ | |||
54 | #define CH_MEM_STREAM1_DEST 14 /* TX */ | 53 | #define CH_MEM_STREAM1_DEST 14 /* TX */ |
55 | #define CH_MEM_STREAM1_SRC 15 /* RX */ | 54 | #define CH_MEM_STREAM1_SRC 15 /* RX */ |
56 | 55 | ||
56 | #if defined(CONFIG_BF527_NAND_D_PORTF) | ||
57 | #define CH_NFC CH_PPI /* PPI receive/transmit or NFC */ | ||
58 | #elif defined(CONFIG_BF527_NAND_D_PORTH) | ||
59 | #define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */ | ||
60 | #endif | ||
61 | |||
57 | extern int channel2irq(unsigned int channel); | 62 | extern int channel2irq(unsigned int channel); |
58 | extern struct dma_register *base_addr[]; | 63 | extern struct dma_register *base_addr[]; |
59 | 64 | ||
diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h index 4e46d657e50e..fcb72b41e007 100644 --- a/include/asm-blackfin/mach-bf548/defBF549.h +++ b/include/asm-blackfin/mach-bf548/defBF549.h | |||
@@ -1671,7 +1671,7 @@ | |||
1671 | /* Bit masks for MXVR_DMAx_CONFIG */ | 1671 | /* Bit masks for MXVR_DMAx_CONFIG */ |
1672 | 1672 | ||
1673 | #define MDMAEN 0x1 /* DMA Channel Enable */ | 1673 | #define MDMAEN 0x1 /* DMA Channel Enable */ |
1674 | #define DD 0x2 /* DMA Channel Direction */ | 1674 | #define DMADD 0x2 /* DMA Channel Direction */ |
1675 | #define BY4SWAPEN 0x20 /* DMA Channel Four Byte Swap Enable */ | 1675 | #define BY4SWAPEN 0x20 /* DMA Channel Four Byte Swap Enable */ |
1676 | #define LCHAN 0x3c0 /* DMA Channel Logical Channel */ | 1676 | #define LCHAN 0x3c0 /* DMA Channel Logical Channel */ |
1677 | #define BITSWAPEN 0x400 /* DMA Channel Bit Swap Enable */ | 1677 | #define BITSWAPEN 0x400 /* DMA Channel Bit Swap Enable */ |
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h index 1d365c844ffe..da979cb62f7d 100644 --- a/include/asm-blackfin/mach-bf548/defBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h | |||
@@ -2252,6 +2252,13 @@ | |||
2252 | #define PLL_OFF 0x2 /* Disable PLL */ | 2252 | #define PLL_OFF 0x2 /* Disable PLL */ |
2253 | #define DF 0x1 /* Divide Frequency */ | 2253 | #define DF 0x1 /* Divide Frequency */ |
2254 | 2254 | ||
2255 | /* SWRST Masks */ | ||
2256 | #define SYSTEM_RESET 0x0007 /* Initiates A System Software Reset */ | ||
2257 | #define DOUBLE_FAULT 0x0008 /* Core Double Fault Causes Reset */ | ||
2258 | #define RESET_DOUBLE 0x2000 /* SW Reset Generated By Core Double-Fault */ | ||
2259 | #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ | ||
2260 | #define RESET_SOFTWARE 0x8000 /* SW Reset Occurred Since Last Read Of SWRST */ | ||
2261 | |||
2255 | /* Bit masks for PLL_STAT */ | 2262 | /* Bit masks for PLL_STAT */ |
2256 | 2263 | ||
2257 | #define PLL_LOCKED 0x20 /* PLL Locked Status */ | 2264 | #define PLL_LOCKED 0x20 /* PLL Locked Status */ |
diff --git a/include/asm-blackfin/mach-bf548/portmux.h b/include/asm-blackfin/mach-bf548/portmux.h index b382deb501a7..6b485120015f 100644 --- a/include/asm-blackfin/mach-bf548/portmux.h +++ b/include/asm-blackfin/mach-bf548/portmux.h | |||
@@ -267,4 +267,18 @@ | |||
267 | #define P_AMC_BG (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0)) | 267 | #define P_AMC_BG (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0)) |
268 | #define P_AMC_BGH (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0)) | 268 | #define P_AMC_BGH (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0)) |
269 | 269 | ||
270 | |||
271 | #define P_NAND_D0 (P_DONTCARE) | ||
272 | #define P_NAND_D1 (P_DONTCARE) | ||
273 | #define P_NAND_D2 (P_DONTCARE) | ||
274 | #define P_NAND_D3 (P_DONTCARE) | ||
275 | #define P_NAND_D4 (P_DONTCARE) | ||
276 | #define P_NAND_D5 (P_DONTCARE) | ||
277 | #define P_NAND_D6 (P_DONTCARE) | ||
278 | #define P_NAND_D7 (P_DONTCARE) | ||
279 | #define P_NAND_WE (P_DONTCARE) | ||
280 | #define P_NAND_RE (P_DONTCARE) | ||
281 | #define P_NAND_CLE (P_DONTCARE) | ||
282 | #define P_NAND_ALE (P_DONTCARE) | ||
283 | |||
270 | #endif /* _MACH_PORTMUX_H_ */ | 284 | #endif /* _MACH_PORTMUX_H_ */ |
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h index bf7dc4e00065..7945e8a3a841 100644 --- a/include/asm-blackfin/mach-bf561/defBF561.h +++ b/include/asm-blackfin/mach-bf561/defBF561.h | |||
@@ -55,6 +55,9 @@ | |||
55 | /* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */ | 55 | /* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */ |
56 | #define SWRST SICA_SWRST | 56 | #define SWRST SICA_SWRST |
57 | #define SYSCR SICA_SYSCR | 57 | #define SYSCR SICA_SYSCR |
58 | #define RESET_DOUBLE (SWRST_DBL_FAULT_B|SWRST_DBL_FAULT_A) | ||
59 | #define RESET_WDOG (SWRST_WDT_B|SWRST_WDT_A) | ||
60 | #define RESET_SOFTWARE (SWRST_OCCURRED) | ||
58 | 61 | ||
59 | /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ | 62 | /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ |
60 | #define SICA_SWRST 0xFFC00100 /* Software Reset register */ | 63 | #define SICA_SWRST 0xFFC00100 /* Software Reset register */ |
diff --git a/include/asm-ia64/percpu.h b/include/asm-ia64/percpu.h index 43a7aac414e0..c4f1e328a5ba 100644 --- a/include/asm-ia64/percpu.h +++ b/include/asm-ia64/percpu.h | |||
@@ -46,7 +46,7 @@ | |||
46 | #ifdef CONFIG_SMP | 46 | #ifdef CONFIG_SMP |
47 | 47 | ||
48 | extern unsigned long __per_cpu_offset[NR_CPUS]; | 48 | extern unsigned long __per_cpu_offset[NR_CPUS]; |
49 | #define per_cpu_offset(x) (__per_cpu_offset(x)) | 49 | #define per_cpu_offset(x) (__per_cpu_offset[x]) |
50 | 50 | ||
51 | /* Equal to __per_cpu_offset[smp_processor_id()], but faster to access: */ | 51 | /* Equal to __per_cpu_offset[smp_processor_id()], but faster to access: */ |
52 | DECLARE_PER_CPU(unsigned long, local_per_cpu_offset); | 52 | DECLARE_PER_CPU(unsigned long, local_per_cpu_offset); |
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h index 471cc2ee9ac4..4fa733dd417a 100644 --- a/include/asm-ia64/smp.h +++ b/include/asm-ia64/smp.h | |||
@@ -60,7 +60,6 @@ extern cpumask_t cpu_online_map; | |||
60 | extern cpumask_t cpu_core_map[NR_CPUS]; | 60 | extern cpumask_t cpu_core_map[NR_CPUS]; |
61 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); | 61 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
62 | extern int smp_num_siblings; | 62 | extern int smp_num_siblings; |
63 | extern int smp_num_cpucores; | ||
64 | extern void __iomem *ipi_base_addr; | 63 | extern void __iomem *ipi_base_addr; |
65 | extern unsigned char smp_int_redirect; | 64 | extern unsigned char smp_int_redirect; |
66 | 65 | ||
diff --git a/include/asm-mips/i8253.h b/include/asm-mips/i8253.h index affb32ce4af9..778b2f023905 100644 --- a/include/asm-mips/i8253.h +++ b/include/asm-mips/i8253.h | |||
@@ -10,21 +10,6 @@ | |||
10 | #define PIT_CH0 0x40 | 10 | #define PIT_CH0 0x40 |
11 | #define PIT_CH2 0x42 | 11 | #define PIT_CH2 0x42 |
12 | 12 | ||
13 | /* i8259A PIC registers */ | ||
14 | #define PIC_MASTER_CMD 0x20 | ||
15 | #define PIC_MASTER_IMR 0x21 | ||
16 | #define PIC_MASTER_ISR PIC_MASTER_CMD | ||
17 | #define PIC_MASTER_POLL PIC_MASTER_ISR | ||
18 | #define PIC_MASTER_OCW3 PIC_MASTER_ISR | ||
19 | #define PIC_SLAVE_CMD 0xa0 | ||
20 | #define PIC_SLAVE_IMR 0xa1 | ||
21 | |||
22 | /* i8259A PIC related value */ | ||
23 | #define PIC_CASCADE_IR 2 | ||
24 | #define MASTER_ICW4_DEFAULT 0x01 | ||
25 | #define SLAVE_ICW4_DEFAULT 0x01 | ||
26 | #define PIC_ICW4_AEOI 2 | ||
27 | |||
28 | extern void setup_pit_timer(void); | 13 | extern void setup_pit_timer(void); |
29 | 14 | ||
30 | #endif /* __ASM_I8253_H */ | 15 | #endif /* __ASM_I8253_H */ |
diff --git a/include/asm-mips/ip32/ip32_ints.h b/include/asm-mips/ip32/ip32_ints.h index 042f821899a8..ab5612f90f6f 100644 --- a/include/asm-mips/ip32/ip32_ints.h +++ b/include/asm-mips/ip32/ip32_ints.h | |||
@@ -22,10 +22,12 @@ enum ip32_irq_no { | |||
22 | * CPU interrupts are 0 ... 7 | 22 | * CPU interrupts are 0 ... 7 |
23 | */ | 23 | */ |
24 | 24 | ||
25 | CRIME_IRQ_BASE = MIPS_CPU_IRQ_BASE, | ||
26 | |||
25 | /* | 27 | /* |
26 | * MACE | 28 | * MACE |
27 | */ | 29 | */ |
28 | MACE_VID_IN1_IRQ = MIPS_CPU_IRQ_BASE + 8, | 30 | MACE_VID_IN1_IRQ = CRIME_IRQ_BASE, |
29 | MACE_VID_IN2_IRQ, | 31 | MACE_VID_IN2_IRQ, |
30 | MACE_VID_OUT_IRQ, | 32 | MACE_VID_OUT_IRQ, |
31 | MACE_ETHERNET_IRQ, | 33 | MACE_ETHERNET_IRQ, |
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index b2dc35f56181..81602c8047eb 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h | |||
@@ -132,9 +132,7 @@ | |||
132 | #define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA) | 132 | #define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA) |
133 | #define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO) | 133 | #define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO) |
134 | #define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI) | 134 | #define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI) |
135 | #define JMR3927_IRQ_IRC_TMR0 (JMR3927_IRQ_IRC + TX3927_IR_TMR0) | 135 | #define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch)) |
136 | #define JMR3927_IRQ_IRC_TMR1 (JMR3927_IRQ_IRC + TX3927_IR_TMR1) | ||
137 | #define JMR3927_IRQ_IRC_TMR2 (JMR3927_IRQ_IRC + TX3927_IR_TMR2) | ||
138 | #define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA) | 136 | #define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA) |
139 | #define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB) | 137 | #define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB) |
140 | #define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC) | 138 | #define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC) |
@@ -148,17 +146,12 @@ | |||
148 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 | 146 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 |
149 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ | 147 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ |
150 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 | 148 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 |
151 | /* Clock Tick (10ms) */ | ||
152 | #define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0 | ||
153 | 149 | ||
154 | /* Clocks */ | 150 | /* Clocks */ |
155 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ | 151 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ |
156 | #define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ | 152 | #define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ |
157 | #define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ | 153 | #define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ |
158 | 154 | ||
159 | #define jmr3927_tmrptr tx3927_tmrptr(0) /* TMR0 */ | ||
160 | |||
161 | |||
162 | /* | 155 | /* |
163 | * TX3927 Pin Configuration: | 156 | * TX3927 Pin Configuration: |
164 | * | 157 | * |
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h index 211bcf47fffb..338f99882a39 100644 --- a/include/asm-mips/jmr3927/tx3927.h +++ b/include/asm-mips/jmr3927/tx3927.h | |||
@@ -222,9 +222,7 @@ struct tx3927_ccfg_reg { | |||
222 | #define TX3927_IR_DMA 8 | 222 | #define TX3927_IR_DMA 8 |
223 | #define TX3927_IR_PIO 9 | 223 | #define TX3927_IR_PIO 9 |
224 | #define TX3927_IR_PCI 10 | 224 | #define TX3927_IR_PCI 10 |
225 | #define TX3927_IR_TMR0 13 | 225 | #define TX3927_IR_TMR(ch) (13 + (ch)) |
226 | #define TX3927_IR_TMR1 14 | ||
227 | #define TX3927_IR_TMR2 15 | ||
228 | #define TX3927_NUM_IR 16 | 226 | #define TX3927_NUM_IR 16 |
229 | 227 | ||
230 | /* | 228 | /* |
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h index 58a8ff6be815..0474fe8dac3f 100644 --- a/include/asm-mips/jmr3927/txx927.h +++ b/include/asm-mips/jmr3927/txx927.h | |||
@@ -10,22 +10,6 @@ | |||
10 | #ifndef __ASM_TXX927_H | 10 | #ifndef __ASM_TXX927_H |
11 | #define __ASM_TXX927_H | 11 | #define __ASM_TXX927_H |
12 | 12 | ||
13 | struct txx927_tmr_reg { | ||
14 | volatile unsigned long tcr; | ||
15 | volatile unsigned long tisr; | ||
16 | volatile unsigned long cpra; | ||
17 | volatile unsigned long cprb; | ||
18 | volatile unsigned long itmr; | ||
19 | volatile unsigned long unused0[3]; | ||
20 | volatile unsigned long ccdr; | ||
21 | volatile unsigned long unused1[3]; | ||
22 | volatile unsigned long pgmr; | ||
23 | volatile unsigned long unused2[3]; | ||
24 | volatile unsigned long wtmr; | ||
25 | volatile unsigned long unused3[43]; | ||
26 | volatile unsigned long trr; | ||
27 | }; | ||
28 | |||
29 | struct txx927_sio_reg { | 13 | struct txx927_sio_reg { |
30 | volatile unsigned long lcr; | 14 | volatile unsigned long lcr; |
31 | volatile unsigned long dicr; | 15 | volatile unsigned long dicr; |
@@ -51,27 +35,6 @@ struct txx927_pio_reg { | |||
51 | }; | 35 | }; |
52 | 36 | ||
53 | /* | 37 | /* |
54 | * TMR | ||
55 | */ | ||
56 | /* TMTCR : Timer Control */ | ||
57 | #define TXx927_TMTCR_TCE 0x00000080 | ||
58 | #define TXx927_TMTCR_CCDE 0x00000040 | ||
59 | #define TXx927_TMTCR_CRE 0x00000020 | ||
60 | #define TXx927_TMTCR_ECES 0x00000008 | ||
61 | #define TXx927_TMTCR_CCS 0x00000004 | ||
62 | #define TXx927_TMTCR_TMODE_MASK 0x00000003 | ||
63 | #define TXx927_TMTCR_TMODE_ITVL 0x00000000 | ||
64 | |||
65 | /* TMTISR : Timer Int. Status */ | ||
66 | #define TXx927_TMTISR_TPIBS 0x00000004 | ||
67 | #define TXx927_TMTISR_TPIAS 0x00000002 | ||
68 | #define TXx927_TMTISR_TIIS 0x00000001 | ||
69 | |||
70 | /* TMTITMR : Interval Timer Mode */ | ||
71 | #define TXx927_TMTITMR_TIIE 0x00008000 | ||
72 | #define TXx927_TMTITMR_TZCE 0x00000001 | ||
73 | |||
74 | /* | ||
75 | * SIO | 38 | * SIO |
76 | */ | 39 | */ |
77 | /* SILCR : Line Control */ | 40 | /* SILCR : Line Control */ |
diff --git a/include/asm-mips/mach-au1x00/timex.h b/include/asm-mips/mach-au1x00/timex.h deleted file mode 100644 index e3ada66cb636..000000000000 --- a/include/asm-mips/mach-au1x00/timex.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_AU1X00_TIMEX_H | ||
9 | #define __ASM_MACH_AU1X00_TIMEX_H | ||
10 | |||
11 | #define CLOCK_TICK_RATE ((HZ * 100000UL) / 2) | ||
12 | |||
13 | #endif /* __ASM_MACH_AU1X00_TIMEX_H */ | ||
diff --git a/include/asm-mips/mach-cobalt/irq.h b/include/asm-mips/mach-cobalt/irq.h index 179d0e850b59..57c8c9ac5851 100644 --- a/include/asm-mips/mach-cobalt/irq.h +++ b/include/asm-mips/mach-cobalt/irq.h | |||
@@ -35,7 +35,7 @@ | |||
35 | * 4 - ethernet | 35 | * 4 - ethernet |
36 | * 5 - 16550 UART | 36 | * 5 - 16550 UART |
37 | * 6 - cascade i8259 | 37 | * 6 - cascade i8259 |
38 | * 7 - CP0 counter (unused) | 38 | * 7 - CP0 counter |
39 | */ | 39 | */ |
40 | #define MIPS_CPU_IRQ_BASE 16 | 40 | #define MIPS_CPU_IRQ_BASE 16 |
41 | 41 | ||
@@ -48,7 +48,6 @@ | |||
48 | #define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5) | 48 | #define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5) |
49 | #define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6) | 49 | #define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6) |
50 | 50 | ||
51 | |||
52 | #define GT641XX_IRQ_BASE 24 | 51 | #define GT641XX_IRQ_BASE 24 |
53 | 52 | ||
54 | #include <asm/irq_gt641xx.h> | 53 | #include <asm/irq_gt641xx.h> |
diff --git a/include/asm-mips/mach-generic/timex.h b/include/asm-mips/mach-generic/timex.h deleted file mode 100644 index 48b4cfaa0d50..000000000000 --- a/include/asm-mips/mach-generic/timex.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003, 2005 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_GENERIC_TIMEX_H | ||
9 | #define __ASM_MACH_GENERIC_TIMEX_H | ||
10 | |||
11 | #define CLOCK_TICK_RATE 500000 | ||
12 | |||
13 | #endif /* __ASM_MACH_GENERIC_TIMEX_H */ | ||
diff --git a/include/asm-mips/mach-jazz/timex.h b/include/asm-mips/mach-jazz/timex.h deleted file mode 100644 index 93affa33dfa8..000000000000 --- a/include/asm-mips/mach-jazz/timex.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_JAZZ_TIMEX_H | ||
9 | #define __ASM_MACH_JAZZ_TIMEX_H | ||
10 | |||
11 | /* | ||
12 | * Jazz is still using the R4030 100Hz counter | ||
13 | */ | ||
14 | #define CLOCK_TICK_RATE 100 | ||
15 | |||
16 | #endif /* __ASM_MACH_JAZZ_TIMEX_H */ | ||
diff --git a/include/asm-mips/mach-qemu/timex.h b/include/asm-mips/mach-qemu/timex.h deleted file mode 100644 index cd543693fb0a..000000000000 --- a/include/asm-mips/mach-qemu/timex.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2005 Daniel Jacobowitz | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_QEMU_TIMEX_H | ||
9 | #define __ASM_MACH_QEMU_TIMEX_H | ||
10 | |||
11 | /* | ||
12 | * We use a simulated i8254 PIC... | ||
13 | */ | ||
14 | #define CLOCK_TICK_RATE 1193182 | ||
15 | |||
16 | #endif /* __ASM_MACH_QEMU_TIMEX_H */ | ||
diff --git a/include/asm-mips/mach-rm/timex.h b/include/asm-mips/mach-rm/timex.h deleted file mode 100644 index 11ff6cb0f214..000000000000 --- a/include/asm-mips/mach-rm/timex.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003, 2005 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_RM200_TIMEX_H | ||
9 | #define __ASM_MACH_RM200_TIMEX_H | ||
10 | |||
11 | #define CLOCK_TICK_RATE 1193182 | ||
12 | |||
13 | #endif /* __ASM_MACH_RM200_TIMEX_H */ | ||
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index bc47af313bcd..ee1663e64da1 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h | |||
@@ -10,15 +10,10 @@ | |||
10 | * under the terms of the GNU General Public License as published by the | 10 | * under the terms of the GNU General Public License as published by the |
11 | * Free Software Foundation; either version 2 of the License, or (at your | 11 | * Free Software Foundation; either version 2 of the License, or (at your |
12 | * option) any later version. | 12 | * option) any later version. |
13 | * | ||
14 | * Please refer to Documentation/mips/time.README. | ||
15 | */ | 13 | */ |
16 | #ifndef _ASM_TIME_H | 14 | #ifndef _ASM_TIME_H |
17 | #define _ASM_TIME_H | 15 | #define _ASM_TIME_H |
18 | 16 | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/linkage.h> | ||
21 | #include <linux/ptrace.h> | ||
22 | #include <linux/rtc.h> | 17 | #include <linux/rtc.h> |
23 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
24 | #include <linux/clockchips.h> | 19 | #include <linux/clockchips.h> |
@@ -38,27 +33,13 @@ extern int rtc_mips_set_mmss(unsigned long); | |||
38 | /* | 33 | /* |
39 | * Timer interrupt functions. | 34 | * Timer interrupt functions. |
40 | * mips_timer_state is needed for high precision timer calibration. | 35 | * mips_timer_state is needed for high precision timer calibration. |
41 | * mips_timer_ack may be NULL if the interrupt is self-recoverable. | ||
42 | */ | 36 | */ |
43 | extern int (*mips_timer_state)(void); | 37 | extern int (*mips_timer_state)(void); |
44 | 38 | ||
45 | /* | 39 | /* |
46 | * High precision timer clocksource. | ||
47 | * If .read is NULL, an R4k-compatible timer setup is attempted. | ||
48 | */ | ||
49 | extern struct clocksource clocksource_mips; | ||
50 | |||
51 | /* | ||
52 | * profiling and process accouting is done separately in local_timer_interrupt | ||
53 | */ | ||
54 | extern void local_timer_interrupt(int irq, void *dev_id); | ||
55 | |||
56 | /* | ||
57 | * board specific routines required by time_init(). | 40 | * board specific routines required by time_init(). |
58 | */ | 41 | */ |
59 | struct irqaction; | ||
60 | extern void plat_time_init(void); | 42 | extern void plat_time_init(void); |
61 | extern void plat_timer_setup(struct irqaction *irq); | ||
62 | 43 | ||
63 | /* | 44 | /* |
64 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible | 45 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible |
@@ -78,6 +59,7 @@ extern int (*perf_irq)(void); | |||
78 | */ | 59 | */ |
79 | #ifdef CONFIG_CEVT_R4K | 60 | #ifdef CONFIG_CEVT_R4K |
80 | extern void mips_clockevent_init(void); | 61 | extern void mips_clockevent_init(void); |
62 | extern unsigned int __weak get_c0_compare_int(void); | ||
81 | #else | 63 | #else |
82 | static inline void mips_clockevent_init(void) | 64 | static inline void mips_clockevent_init(void) |
83 | { | 65 | { |
diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h index 87c68ae76ff8..5816ad1569d6 100644 --- a/include/asm-mips/timex.h +++ b/include/asm-mips/timex.h | |||
@@ -13,27 +13,12 @@ | |||
13 | #include <asm/mipsregs.h> | 13 | #include <asm/mipsregs.h> |
14 | 14 | ||
15 | /* | 15 | /* |
16 | * This is the frequency of the timer used for Linux's timer interrupt. | 16 | * This is the clock rate of the i8253 PIT. A MIPS system may not have |
17 | * The value should be defined as accurate as possible or under certain | 17 | * a PIT by the symbol is used all over the kernel including some APIs. |
18 | * circumstances Linux timekeeping might become inaccurate or fail. | 18 | * So keeping it defined to the number for the PIT is the only sane thing |
19 | * | 19 | * for now. |
20 | * For many system the exact clockrate of the timer isn't known but due to | ||
21 | * the way this value is used we can get away with a wrong value as long | ||
22 | * as this value is: | ||
23 | * | ||
24 | * - a multiple of HZ | ||
25 | * - a divisor of the actual rate | ||
26 | * | ||
27 | * 500000 is a good such cheat value. | ||
28 | * | ||
29 | * The obscure number 1193182 is the same as used by the original i8254 | ||
30 | * time in legacy PC hardware; the chip unfortunately also found in a | ||
31 | * bunch of MIPS systems. The last remaining user of the i8254 for the | ||
32 | * timer interrupt is the RM200; it's a very standard system so there is | ||
33 | * no reason to make this a separate architecture. | ||
34 | */ | 20 | */ |
35 | 21 | #define CLOCK_TICK_RATE 1193182 | |
36 | #include <timex.h> | ||
37 | 22 | ||
38 | /* | 23 | /* |
39 | * Standard way to access the cycle counter. | 24 | * Standard way to access the cycle counter. |
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h index f98b2bb719d5..3f1e470192e3 100644 --- a/include/asm-mips/tx4927/tx4927_pci.h +++ b/include/asm-mips/tx4927/tx4927_pci.h | |||
@@ -9,6 +9,7 @@ | |||
9 | #define __ASM_TX4927_TX4927_PCI_H | 9 | #define __ASM_TX4927_TX4927_PCI_H |
10 | 10 | ||
11 | #define TX4927_CCFG_TOE 0x00004000 | 11 | #define TX4927_CCFG_TOE 0x00004000 |
12 | #define TX4927_CCFG_TINTDIS 0x01000000 | ||
12 | 13 | ||
13 | #define TX4927_PCIMEM 0x08000000 | 14 | #define TX4927_PCIMEM 0x08000000 |
14 | #define TX4927_PCIMEM_SIZE 0x08000000 | 15 | #define TX4927_PCIMEM_SIZE 0x08000000 |
@@ -20,6 +21,8 @@ | |||
20 | #define TX4927_PCIC_REG 0xff1fd000 | 21 | #define TX4927_PCIC_REG 0xff1fd000 |
21 | #define TX4927_CCFG_REG 0xff1fe000 | 22 | #define TX4927_CCFG_REG 0xff1fe000 |
22 | #define TX4927_IRC_REG 0xff1ff600 | 23 | #define TX4927_IRC_REG 0xff1ff600 |
24 | #define TX4927_NR_TMR 3 | ||
25 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) | ||
23 | #define TX4927_CE3 0x17f00000 /* 1M */ | 26 | #define TX4927_CE3 0x17f00000 /* 1M */ |
24 | #define TX4927_PCIRESET_ADDR 0xbc00f006 | 27 | #define TX4927_PCIRESET_ADDR 0xbc00f006 |
25 | #define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020) | 28 | #define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020) |
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h index 650b010761f9..f7c448b90578 100644 --- a/include/asm-mips/tx4938/tx4938.h +++ b/include/asm-mips/tx4938/tx4938.h | |||
@@ -641,7 +641,6 @@ struct tx4938_ccfg_reg { | |||
641 | #define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) | 641 | #define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) |
642 | #define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) | 642 | #define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) |
643 | #define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) | 643 | #define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) |
644 | #define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch)) | ||
645 | #define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) | 644 | #define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) |
646 | #define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG) | 645 | #define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG) |
647 | #define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) | 646 | #define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) |
diff --git a/include/asm-mips/txx9tmr.h b/include/asm-mips/txx9tmr.h new file mode 100644 index 000000000000..67f70a8f09bd --- /dev/null +++ b/include/asm-mips/txx9tmr.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * include/asm-mips/txx9tmr.h | ||
3 | * TX39/TX49 timer controller definitions. | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | */ | ||
9 | #ifndef __ASM_TXX9TMR_H | ||
10 | #define __ASM_TXX9TMR_H | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | |||
14 | struct txx9_tmr_reg { | ||
15 | u32 tcr; | ||
16 | u32 tisr; | ||
17 | u32 cpra; | ||
18 | u32 cprb; | ||
19 | u32 itmr; | ||
20 | u32 unused0[3]; | ||
21 | u32 ccdr; | ||
22 | u32 unused1[3]; | ||
23 | u32 pgmr; | ||
24 | u32 unused2[3]; | ||
25 | u32 wtmr; | ||
26 | u32 unused3[43]; | ||
27 | u32 trr; | ||
28 | }; | ||
29 | |||
30 | /* TMTCR : Timer Control */ | ||
31 | #define TXx9_TMTCR_TCE 0x00000080 | ||
32 | #define TXx9_TMTCR_CCDE 0x00000040 | ||
33 | #define TXx9_TMTCR_CRE 0x00000020 | ||
34 | #define TXx9_TMTCR_ECES 0x00000008 | ||
35 | #define TXx9_TMTCR_CCS 0x00000004 | ||
36 | #define TXx9_TMTCR_TMODE_MASK 0x00000003 | ||
37 | #define TXx9_TMTCR_TMODE_ITVL 0x00000000 | ||
38 | #define TXx9_TMTCR_TMODE_PGEN 0x00000001 | ||
39 | #define TXx9_TMTCR_TMODE_WDOG 0x00000002 | ||
40 | |||
41 | /* TMTISR : Timer Int. Status */ | ||
42 | #define TXx9_TMTISR_TPIBS 0x00000004 | ||
43 | #define TXx9_TMTISR_TPIAS 0x00000002 | ||
44 | #define TXx9_TMTISR_TIIS 0x00000001 | ||
45 | |||
46 | /* TMITMR : Interval Timer Mode */ | ||
47 | #define TXx9_TMITMR_TIIE 0x00008000 | ||
48 | #define TXx9_TMITMR_TZCE 0x00000001 | ||
49 | |||
50 | /* TMWTMR : Watchdog Timer Mode */ | ||
51 | #define TXx9_TMWTMR_TWIE 0x00008000 | ||
52 | #define TXx9_TMWTMR_WDIS 0x00000080 | ||
53 | #define TXx9_TMWTMR_TWC 0x00000001 | ||
54 | |||
55 | void txx9_clocksource_init(unsigned long baseaddr, | ||
56 | unsigned int imbusclk); | ||
57 | void txx9_clockevent_init(unsigned long baseaddr, int irq, | ||
58 | unsigned int imbusclk); | ||
59 | void txx9_tmr_init(unsigned long baseaddr); | ||
60 | |||
61 | #ifdef CONFIG_CPU_TX39XX | ||
62 | #define TXX9_TIMER_BITS 24 | ||
63 | #else | ||
64 | #define TXX9_TIMER_BITS 32 | ||
65 | #endif | ||
66 | |||
67 | #endif /* __ASM_TXX9TMR_H */ | ||
diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h index 876312fe82cc..df1097d6ffbe 100644 --- a/include/asm-sparc64/futex.h +++ b/include/asm-sparc64/futex.h | |||
@@ -17,7 +17,8 @@ | |||
17 | "3:\n" \ | 17 | "3:\n" \ |
18 | " .section .fixup,#alloc,#execinstr\n" \ | 18 | " .section .fixup,#alloc,#execinstr\n" \ |
19 | " .align 4\n" \ | 19 | " .align 4\n" \ |
20 | "4: ba 3b\n" \ | 20 | "4: sethi %%hi(3b), %0\n" \ |
21 | " jmpl %0 + %%lo(3b), %%g0\n" \ | ||
21 | " mov %5, %0\n" \ | 22 | " mov %5, %0\n" \ |
22 | " .previous\n" \ | 23 | " .previous\n" \ |
23 | " .section __ex_table,\"a\"\n" \ | 24 | " .section __ex_table,\"a\"\n" \ |
@@ -91,7 +92,8 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | |||
91 | "2:\n" | 92 | "2:\n" |
92 | " .section .fixup,#alloc,#execinstr\n" | 93 | " .section .fixup,#alloc,#execinstr\n" |
93 | " .align 4\n" | 94 | " .align 4\n" |
94 | "3: ba 2b\n" | 95 | "3: sethi %%hi(2b), %0\n" |
96 | " jmpl %0 + %%lo(2b), %%g0\n" | ||
95 | " mov %4, %0\n" | 97 | " mov %4, %0\n" |
96 | " .previous\n" | 98 | " .previous\n" |
97 | " .section __ex_table,\"a\"\n" | 99 | " .section __ex_table,\"a\"\n" |
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index 159e62b51d70..99a669c190c7 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h | |||
@@ -178,7 +178,9 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ | |||
178 | "ldx [%%g6 + %9], %%g4\n\t" \ | 178 | "ldx [%%g6 + %9], %%g4\n\t" \ |
179 | "brz,pt %%o7, 1f\n\t" \ | 179 | "brz,pt %%o7, 1f\n\t" \ |
180 | " mov %%g7, %0\n\t" \ | 180 | " mov %%g7, %0\n\t" \ |
181 | "b,a ret_from_syscall\n\t" \ | 181 | "sethi %%hi(ret_from_syscall), %%g1\n\t" \ |
182 | "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ | ||
183 | " nop\n\t" \ | ||
182 | "1:\n\t" \ | 184 | "1:\n\t" \ |
183 | : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ | 185 | : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ |
184 | "=r" (__local_per_cpu_offset) \ | 186 | "=r" (__local_per_cpu_offset) \ |
diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h index afe236ba555b..93720e7b0289 100644 --- a/include/asm-sparc64/uaccess.h +++ b/include/asm-sparc64/uaccess.h | |||
@@ -123,7 +123,8 @@ __asm__ __volatile__( \ | |||
123 | ".section .fixup,#alloc,#execinstr\n\t" \ | 123 | ".section .fixup,#alloc,#execinstr\n\t" \ |
124 | ".align 4\n" \ | 124 | ".align 4\n" \ |
125 | "3:\n\t" \ | 125 | "3:\n\t" \ |
126 | "b 2b\n\t" \ | 126 | "sethi %%hi(2b), %0\n\t" \ |
127 | "jmpl %0 + %%lo(2b), %%g0\n\t" \ | ||
127 | " mov %3, %0\n\n\t" \ | 128 | " mov %3, %0\n\n\t" \ |
128 | ".previous\n\t" \ | 129 | ".previous\n\t" \ |
129 | ".section __ex_table,\"a\"\n\t" \ | 130 | ".section __ex_table,\"a\"\n\t" \ |
@@ -165,8 +166,9 @@ __asm__ __volatile__( \ | |||
165 | ".section .fixup,#alloc,#execinstr\n\t" \ | 166 | ".section .fixup,#alloc,#execinstr\n\t" \ |
166 | ".align 4\n" \ | 167 | ".align 4\n" \ |
167 | "3:\n\t" \ | 168 | "3:\n\t" \ |
169 | "sethi %%hi(2b), %0\n\t" \ | ||
168 | "clr %1\n\t" \ | 170 | "clr %1\n\t" \ |
169 | "b 2b\n\t" \ | 171 | "jmpl %0 + %%lo(2b), %%g0\n\t" \ |
170 | " mov %3, %0\n\n\t" \ | 172 | " mov %3, %0\n\n\t" \ |
171 | ".previous\n\t" \ | 173 | ".previous\n\t" \ |
172 | ".section __ex_table,\"a\"\n\t" \ | 174 | ".section __ex_table,\"a\"\n\t" \ |
diff --git a/include/asm-um/unistd.h b/include/asm-um/unistd.h index 732c83f04c3d..38bd9d94ee46 100644 --- a/include/asm-um/unistd.h +++ b/include/asm-um/unistd.h | |||
@@ -14,7 +14,6 @@ extern int um_execve(const char *file, char *const argv[], char *const env[]); | |||
14 | 14 | ||
15 | #ifdef __KERNEL__ | 15 | #ifdef __KERNEL__ |
16 | /* We get __ARCH_WANT_OLD_STAT and __ARCH_WANT_STAT64 from the base arch */ | 16 | /* We get __ARCH_WANT_OLD_STAT and __ARCH_WANT_STAT64 from the base arch */ |
17 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
18 | #define __ARCH_WANT_OLD_READDIR | 17 | #define __ARCH_WANT_OLD_READDIR |
19 | #define __ARCH_WANT_SYS_ALARM | 18 | #define __ARCH_WANT_SYS_ALARM |
20 | #define __ARCH_WANT_SYS_GETHOSTNAME | 19 | #define __ARCH_WANT_SYS_GETHOSTNAME |
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h new file mode 100644 index 000000000000..f704c50519b8 --- /dev/null +++ b/include/asm-x86/gart.h | |||
@@ -0,0 +1,29 @@ | |||
1 | #ifndef _ASM_X8664_IOMMU_H | ||
2 | #define _ASM_X8664_IOMMU_H 1 | ||
3 | |||
4 | extern void pci_iommu_shutdown(void); | ||
5 | extern void no_iommu_init(void); | ||
6 | extern int force_iommu, no_iommu; | ||
7 | extern int iommu_detected; | ||
8 | #ifdef CONFIG_GART_IOMMU | ||
9 | extern void gart_iommu_init(void); | ||
10 | extern void gart_iommu_shutdown(void); | ||
11 | extern void __init gart_parse_options(char *); | ||
12 | extern void gart_iommu_hole_init(void); | ||
13 | extern int fallback_aper_order; | ||
14 | extern int fallback_aper_force; | ||
15 | extern int gart_iommu_aperture; | ||
16 | extern int gart_iommu_aperture_allowed; | ||
17 | extern int gart_iommu_aperture_disabled; | ||
18 | extern int fix_aperture; | ||
19 | #else | ||
20 | #define gart_iommu_aperture 0 | ||
21 | #define gart_iommu_aperture_allowed 0 | ||
22 | |||
23 | static inline void gart_iommu_shutdown(void) | ||
24 | { | ||
25 | } | ||
26 | |||
27 | #endif | ||
28 | |||
29 | #endif | ||
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h index 5af471f228ee..07862fdd23c0 100644 --- a/include/asm-x86/iommu.h +++ b/include/asm-x86/iommu.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifndef _ASM_X8664_IOMMU_H | 1 | #ifndef _ASM_X8664_GART_H |
2 | #define _ASM_X8664_IOMMU_H 1 | 2 | #define _ASM_X8664_GART_H 1 |
3 | 3 | ||
4 | extern void pci_iommu_shutdown(void); | 4 | extern void pci_iommu_shutdown(void); |
5 | extern void no_iommu_init(void); | 5 | extern void no_iommu_init(void); |
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h index 9baa46d9f594..ef54226a9325 100644 --- a/include/asm-x86/pci_64.h +++ b/include/asm-x86/pci_64.h | |||
@@ -37,7 +37,7 @@ extern int iommu_setup(char *opt); | |||
37 | */ | 37 | */ |
38 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) | 38 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) |
39 | 39 | ||
40 | #if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU) | 40 | #if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU) |
41 | 41 | ||
42 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | 42 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
43 | dma_addr_t ADDR_NAME; | 43 | dma_addr_t ADDR_NAME; |
diff --git a/include/asm-x86/smp_32.h b/include/asm-x86/smp_32.h index 7056d8684522..e10b7affdfe5 100644 --- a/include/asm-x86/smp_32.h +++ b/include/asm-x86/smp_32.h | |||
@@ -94,9 +94,12 @@ static inline void smp_send_reschedule(int cpu) | |||
94 | { | 94 | { |
95 | smp_ops.smp_send_reschedule(cpu); | 95 | smp_ops.smp_send_reschedule(cpu); |
96 | } | 96 | } |
97 | extern int smp_call_function_mask(cpumask_t mask, | 97 | static inline int smp_call_function_mask(cpumask_t mask, |
98 | void (*func) (void *info), void *info, | 98 | void (*func) (void *info), void *info, |
99 | int wait); | 99 | int wait) |
100 | { | ||
101 | return smp_ops.smp_call_function_mask(mask, func, info, wait); | ||
102 | } | ||
100 | 103 | ||
101 | void native_smp_prepare_boot_cpu(void); | 104 | void native_smp_prepare_boot_cpu(void); |
102 | void native_smp_prepare_cpus(unsigned int max_cpus); | 105 | void native_smp_prepare_cpus(unsigned int max_cpus); |
diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 6a65231bc785..37bfa19d8064 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild | |||
@@ -149,6 +149,7 @@ header-y += ticable.h | |||
149 | header-y += times.h | 149 | header-y += times.h |
150 | header-y += tiocl.h | 150 | header-y += tiocl.h |
151 | header-y += tipc.h | 151 | header-y += tipc.h |
152 | header-y += tipc_config.h | ||
152 | header-y += toshiba.h | 153 | header-y += toshiba.h |
153 | header-y += ultrasound.h | 154 | header-y += ultrasound.h |
154 | header-y += un.h | 155 | header-y += un.h |
@@ -325,6 +326,7 @@ unifdef-y += sonypi.h | |||
325 | unifdef-y += soundcard.h | 326 | unifdef-y += soundcard.h |
326 | unifdef-y += stat.h | 327 | unifdef-y += stat.h |
327 | unifdef-y += stddef.h | 328 | unifdef-y += stddef.h |
329 | unifdef-y += string.h | ||
328 | unifdef-y += synclink.h | 330 | unifdef-y += synclink.h |
329 | unifdef-y += sysctl.h | 331 | unifdef-y += sysctl.h |
330 | unifdef-y += tcp.h | 332 | unifdef-y += tcp.h |
diff --git a/include/linux/ata.h b/include/linux/ata.h index 8263a7b74d34..128dc7ad4901 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h | |||
@@ -180,6 +180,7 @@ enum { | |||
180 | ATA_CMD_VERIFY_EXT = 0x42, | 180 | ATA_CMD_VERIFY_EXT = 0x42, |
181 | ATA_CMD_STANDBYNOW1 = 0xE0, | 181 | ATA_CMD_STANDBYNOW1 = 0xE0, |
182 | ATA_CMD_IDLEIMMEDIATE = 0xE1, | 182 | ATA_CMD_IDLEIMMEDIATE = 0xE1, |
183 | ATA_CMD_SLEEP = 0xE6, | ||
183 | ATA_CMD_INIT_DEV_PARAMS = 0x91, | 184 | ATA_CMD_INIT_DEV_PARAMS = 0x91, |
184 | ATA_CMD_READ_NATIVE_MAX = 0xF8, | 185 | ATA_CMD_READ_NATIVE_MAX = 0xF8, |
185 | ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, | 186 | ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, |
@@ -235,6 +236,7 @@ enum { | |||
235 | 236 | ||
236 | /* SETFEATURE Sector counts for SATA features */ | 237 | /* SETFEATURE Sector counts for SATA features */ |
237 | SATA_AN = 0x05, /* Asynchronous Notification */ | 238 | SATA_AN = 0x05, /* Asynchronous Notification */ |
239 | SATA_DIPM = 0x03, /* Device Initiated Power Management */ | ||
238 | 240 | ||
239 | /* ATAPI stuff */ | 241 | /* ATAPI stuff */ |
240 | ATAPI_PKT_DMA = (1 << 0), | 242 | ATAPI_PKT_DMA = (1 << 0), |
@@ -377,6 +379,26 @@ struct ata_taskfile { | |||
377 | 379 | ||
378 | #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) | 380 | #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) |
379 | 381 | ||
382 | static inline bool ata_id_has_hipm(const u16 *id) | ||
383 | { | ||
384 | u16 val = id[76]; | ||
385 | |||
386 | if (val == 0 || val == 0xffff) | ||
387 | return false; | ||
388 | |||
389 | return val & (1 << 9); | ||
390 | } | ||
391 | |||
392 | static inline bool ata_id_has_dipm(const u16 *id) | ||
393 | { | ||
394 | u16 val = id[78]; | ||
395 | |||
396 | if (val == 0 || val == 0xffff) | ||
397 | return false; | ||
398 | |||
399 | return val & (1 << 3); | ||
400 | } | ||
401 | |||
380 | static inline int ata_id_has_fua(const u16 *id) | 402 | static inline int ata_id_has_fua(const u16 *id) |
381 | { | 403 | { |
382 | if ((id[84] & 0xC000) != 0x4000) | 404 | if ((id[84] & 0xC000) != 0x4000) |
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index bbf906a0b419..8396db24d019 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h | |||
@@ -341,7 +341,6 @@ enum blk_queue_state { | |||
341 | struct blk_queue_tag { | 341 | struct blk_queue_tag { |
342 | struct request **tag_index; /* map of busy tags */ | 342 | struct request **tag_index; /* map of busy tags */ |
343 | unsigned long *tag_map; /* bit map of free/busy tags */ | 343 | unsigned long *tag_map; /* bit map of free/busy tags */ |
344 | struct list_head busy_list; /* fifo list of busy tags */ | ||
345 | int busy; /* current depth */ | 344 | int busy; /* current depth */ |
346 | int max_depth; /* what we will send to device */ | 345 | int max_depth; /* what we will send to device */ |
347 | int real_max_depth; /* what the array can hold */ | 346 | int real_max_depth; /* what the array can hold */ |
@@ -435,6 +434,7 @@ struct request_queue | |||
435 | unsigned int dma_alignment; | 434 | unsigned int dma_alignment; |
436 | 435 | ||
437 | struct blk_queue_tag *queue_tags; | 436 | struct blk_queue_tag *queue_tags; |
437 | struct list_head tag_busy_list; | ||
438 | 438 | ||
439 | unsigned int nr_sorted; | 439 | unsigned int nr_sorted; |
440 | unsigned int in_flight; | 440 | unsigned int in_flight; |
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h index c83534ee1e79..0365ec9fc0c9 100644 --- a/include/linux/bootmem.h +++ b/include/linux/bootmem.h | |||
@@ -59,7 +59,6 @@ extern void *__alloc_bootmem_core(struct bootmem_data *bdata, | |||
59 | unsigned long align, | 59 | unsigned long align, |
60 | unsigned long goal, | 60 | unsigned long goal, |
61 | unsigned long limit); | 61 | unsigned long limit); |
62 | extern void *alloc_bootmem_high_node(pg_data_t *pgdat, unsigned long size); | ||
63 | 62 | ||
64 | #ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE | 63 | #ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE |
65 | extern void reserve_bootmem(unsigned long addr, unsigned long size); | 64 | extern void reserve_bootmem(unsigned long addr, unsigned long size); |
diff --git a/include/linux/eventpoll.h b/include/linux/eventpoll.h index d2a96cbf4f0e..cf79853967ff 100644 --- a/include/linux/eventpoll.h +++ b/include/linux/eventpoll.h | |||
@@ -32,18 +32,13 @@ | |||
32 | * On x86-64 make the 64bit structure have the same alignment as the | 32 | * On x86-64 make the 64bit structure have the same alignment as the |
33 | * 32bit structure. This makes 32bit emulation easier. | 33 | * 32bit structure. This makes 32bit emulation easier. |
34 | * | 34 | * |
35 | * UML/x86_64 needs the same packing as x86_64 - UML + UML_X86 + | 35 | * UML/x86_64 needs the same packing as x86_64 |
36 | * 64_BIT adds up to UML/x86_64. | ||
37 | */ | 36 | */ |
38 | #ifdef __x86_64__ | 37 | #ifdef __x86_64__ |
39 | #define EPOLL_PACKED __attribute__((packed)) | 38 | #define EPOLL_PACKED __attribute__((packed)) |
40 | #else | 39 | #else |
41 | #if defined(CONFIG_UML) && defined(CONFIG_UML_X86) && defined(CONFIG_64BIT) | ||
42 | #define EPOLL_PACKED __attribute__((packed)) | ||
43 | #else | ||
44 | #define EPOLL_PACKED | 40 | #define EPOLL_PACKED |
45 | #endif | 41 | #endif |
46 | #endif | ||
47 | 42 | ||
48 | struct epoll_event { | 43 | struct epoll_event { |
49 | __u32 events; | 44 | __u32 events; |
diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h index 56ae438ae510..6e8cec503380 100644 --- a/include/linux/ipmi_smi.h +++ b/include/linux/ipmi_smi.h | |||
@@ -173,7 +173,7 @@ static inline int ipmi_demangle_device_id(const unsigned char *data, | |||
173 | id->firmware_revision_2 = data[3]; | 173 | id->firmware_revision_2 = data[3]; |
174 | id->ipmi_version = data[4]; | 174 | id->ipmi_version = data[4]; |
175 | id->additional_device_support = data[5]; | 175 | id->additional_device_support = data[5]; |
176 | if (data_len >= 6) { | 176 | if (data_len >= 11) { |
177 | id->manufacturer_id = (data[6] | (data[7] << 8) | | 177 | id->manufacturer_id = (data[6] | (data[7] << 8) | |
178 | (data[8] << 16)); | 178 | (data[8] << 16)); |
179 | id->product_id = data[9] | (data[10] << 8); | 179 | id->product_id = data[9] | (data[10] << 8); |
diff --git a/include/linux/libata.h b/include/linux/libata.h index 6fd24e03622e..1e277852ba42 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h | |||
@@ -133,11 +133,14 @@ enum { | |||
133 | ATA_DFLAG_ACPI_PENDING = (1 << 5), /* ACPI resume action pending */ | 133 | ATA_DFLAG_ACPI_PENDING = (1 << 5), /* ACPI resume action pending */ |
134 | ATA_DFLAG_ACPI_FAILED = (1 << 6), /* ACPI on devcfg has failed */ | 134 | ATA_DFLAG_ACPI_FAILED = (1 << 6), /* ACPI on devcfg has failed */ |
135 | ATA_DFLAG_AN = (1 << 7), /* AN configured */ | 135 | ATA_DFLAG_AN = (1 << 7), /* AN configured */ |
136 | ATA_DFLAG_HIPM = (1 << 8), /* device supports HIPM */ | ||
137 | ATA_DFLAG_DIPM = (1 << 9), /* device supports DIPM */ | ||
136 | ATA_DFLAG_CFG_MASK = (1 << 12) - 1, | 138 | ATA_DFLAG_CFG_MASK = (1 << 12) - 1, |
137 | 139 | ||
138 | ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */ | 140 | ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */ |
139 | ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */ | 141 | ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */ |
140 | ATA_DFLAG_SPUNDOWN = (1 << 14), /* XXX: for spindown_compat */ | 142 | ATA_DFLAG_SPUNDOWN = (1 << 14), /* XXX: for spindown_compat */ |
143 | ATA_DFLAG_SLEEPING = (1 << 15), /* device is sleeping */ | ||
141 | ATA_DFLAG_INIT_MASK = (1 << 16) - 1, | 144 | ATA_DFLAG_INIT_MASK = (1 << 16) - 1, |
142 | 145 | ||
143 | ATA_DFLAG_DETACH = (1 << 16), | 146 | ATA_DFLAG_DETACH = (1 << 16), |
@@ -185,6 +188,7 @@ enum { | |||
185 | ATA_FLAG_ACPI_SATA = (1 << 17), /* need native SATA ACPI layout */ | 188 | ATA_FLAG_ACPI_SATA = (1 << 17), /* need native SATA ACPI layout */ |
186 | ATA_FLAG_AN = (1 << 18), /* controller supports AN */ | 189 | ATA_FLAG_AN = (1 << 18), /* controller supports AN */ |
187 | ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */ | 190 | ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */ |
191 | ATA_FLAG_IPM = (1 << 20), /* driver can handle IPM */ | ||
188 | 192 | ||
189 | /* The following flag belongs to ap->pflags but is kept in | 193 | /* The following flag belongs to ap->pflags but is kept in |
190 | * ap->flags because it's referenced in many LLDs and will be | 194 | * ap->flags because it's referenced in many LLDs and will be |
@@ -217,6 +221,7 @@ enum { | |||
217 | ATA_QCFLAG_IO = (1 << 3), /* standard IO command */ | 221 | ATA_QCFLAG_IO = (1 << 3), /* standard IO command */ |
218 | ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */ | 222 | ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */ |
219 | ATA_QCFLAG_CLEAR_EXCL = (1 << 5), /* clear excl_link on completion */ | 223 | ATA_QCFLAG_CLEAR_EXCL = (1 << 5), /* clear excl_link on completion */ |
224 | ATA_QCFLAG_QUIET = (1 << 6), /* don't report device error */ | ||
220 | 225 | ||
221 | ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */ | 226 | ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */ |
222 | ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */ | 227 | ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */ |
@@ -234,6 +239,13 @@ enum { | |||
234 | ATA_TMOUT_INTERNAL = 30 * HZ, | 239 | ATA_TMOUT_INTERNAL = 30 * HZ, |
235 | ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, | 240 | ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, |
236 | 241 | ||
242 | /* FIXME: GoVault needs 2s but we can't afford that without | ||
243 | * parallel probing. 800ms is enough for iVDR disk | ||
244 | * HHD424020F7SV00. Increase to 2secs when parallel probing | ||
245 | * is in place. | ||
246 | */ | ||
247 | ATA_TMOUT_FF_WAIT = 4 * HZ / 5, | ||
248 | |||
237 | /* ATA bus states */ | 249 | /* ATA bus states */ |
238 | BUS_UNKNOWN = 0, | 250 | BUS_UNKNOWN = 0, |
239 | BUS_DMA = 1, | 251 | BUS_DMA = 1, |
@@ -294,6 +306,7 @@ enum { | |||
294 | ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */ | 306 | ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */ |
295 | ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ | 307 | ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ |
296 | ATA_EHI_QUIET = (1 << 3), /* be quiet */ | 308 | ATA_EHI_QUIET = (1 << 3), /* be quiet */ |
309 | ATA_EHI_LPM = (1 << 4), /* link power management action */ | ||
297 | 310 | ||
298 | ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */ | 311 | ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */ |
299 | ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */ | 312 | ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */ |
@@ -325,6 +338,7 @@ enum { | |||
325 | ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */ | 338 | ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */ |
326 | ATA_HORKAGE_SKIP_PM = (1 << 5), /* Skip PM operations */ | 339 | ATA_HORKAGE_SKIP_PM = (1 << 5), /* Skip PM operations */ |
327 | ATA_HORKAGE_HPA_SIZE = (1 << 6), /* native size off by one */ | 340 | ATA_HORKAGE_HPA_SIZE = (1 << 6), /* native size off by one */ |
341 | ATA_HORKAGE_IPM = (1 << 7), /* Link PM problems */ | ||
328 | 342 | ||
329 | /* DMA mask for user DMA control: User visible values; DO NOT | 343 | /* DMA mask for user DMA control: User visible values; DO NOT |
330 | renumber */ | 344 | renumber */ |
@@ -370,6 +384,18 @@ typedef int (*ata_reset_fn_t)(struct ata_link *link, unsigned int *classes, | |||
370 | unsigned long deadline); | 384 | unsigned long deadline); |
371 | typedef void (*ata_postreset_fn_t)(struct ata_link *link, unsigned int *classes); | 385 | typedef void (*ata_postreset_fn_t)(struct ata_link *link, unsigned int *classes); |
372 | 386 | ||
387 | /* | ||
388 | * host pm policy: If you alter this, you also need to alter libata-scsi.c | ||
389 | * (for the ascii descriptions) | ||
390 | */ | ||
391 | enum link_pm { | ||
392 | NOT_AVAILABLE, | ||
393 | MIN_POWER, | ||
394 | MAX_PERFORMANCE, | ||
395 | MEDIUM_POWER, | ||
396 | }; | ||
397 | extern struct class_device_attribute class_device_attr_link_power_management_policy; | ||
398 | |||
373 | struct ata_ioports { | 399 | struct ata_ioports { |
374 | void __iomem *cmd_addr; | 400 | void __iomem *cmd_addr; |
375 | void __iomem *data_addr; | 401 | void __iomem *data_addr; |
@@ -616,6 +642,7 @@ struct ata_port { | |||
616 | 642 | ||
617 | pm_message_t pm_mesg; | 643 | pm_message_t pm_mesg; |
618 | int *pm_result; | 644 | int *pm_result; |
645 | enum link_pm pm_policy; | ||
619 | 646 | ||
620 | struct timer_list fastdrain_timer; | 647 | struct timer_list fastdrain_timer; |
621 | unsigned long fastdrain_cnt; | 648 | unsigned long fastdrain_cnt; |
@@ -683,7 +710,8 @@ struct ata_port_operations { | |||
683 | 710 | ||
684 | int (*port_suspend) (struct ata_port *ap, pm_message_t mesg); | 711 | int (*port_suspend) (struct ata_port *ap, pm_message_t mesg); |
685 | int (*port_resume) (struct ata_port *ap); | 712 | int (*port_resume) (struct ata_port *ap); |
686 | 713 | int (*enable_pm) (struct ata_port *ap, enum link_pm policy); | |
714 | void (*disable_pm) (struct ata_port *ap); | ||
687 | int (*port_start) (struct ata_port *ap); | 715 | int (*port_start) (struct ata_port *ap); |
688 | void (*port_stop) (struct ata_port *ap); | 716 | void (*port_stop) (struct ata_port *ap); |
689 | 717 | ||
@@ -799,6 +827,7 @@ extern void ata_host_resume(struct ata_host *host); | |||
799 | extern int ata_ratelimit(void); | 827 | extern int ata_ratelimit(void); |
800 | extern int ata_busy_sleep(struct ata_port *ap, | 828 | extern int ata_busy_sleep(struct ata_port *ap, |
801 | unsigned long timeout_pat, unsigned long timeout); | 829 | unsigned long timeout_pat, unsigned long timeout); |
830 | extern void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline); | ||
802 | extern int ata_wait_ready(struct ata_port *ap, unsigned long deadline); | 831 | extern int ata_wait_ready(struct ata_port *ap, unsigned long deadline); |
803 | extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn, | 832 | extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn, |
804 | void *data, unsigned long delay); | 833 | void *data, unsigned long delay); |
diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 3f272396642b..30e11aa3c1c9 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h | |||
@@ -8,6 +8,9 @@ | |||
8 | #define MV643XX_ETH_NAME "mv643xx_eth" | 8 | #define MV643XX_ETH_NAME "mv643xx_eth" |
9 | #define MV643XX_ETH_SHARED_REGS 0x2000 | 9 | #define MV643XX_ETH_SHARED_REGS 0x2000 |
10 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 | 10 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 |
11 | #define MV643XX_ETH_BAR_4 0x2220 | ||
12 | #define MV643XX_ETH_SIZE_REG_4 0x2224 | ||
13 | #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 | ||
11 | 14 | ||
12 | struct mv643xx_eth_platform_data { | 15 | struct mv643xx_eth_platform_data { |
13 | int port_number; | 16 | int port_number; |
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 9b0c8f12373e..1e6af4f174b6 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h | |||
@@ -739,6 +739,16 @@ static inline void *netdev_priv(const struct net_device *dev) | |||
739 | */ | 739 | */ |
740 | #define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev)) | 740 | #define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev)) |
741 | 741 | ||
742 | /** | ||
743 | * netif_napi_add - initialize a napi context | ||
744 | * @dev: network device | ||
745 | * @napi: napi context | ||
746 | * @poll: polling function | ||
747 | * @weight: default weight | ||
748 | * | ||
749 | * netif_napi_add() must be used to initialize a napi context prior to calling | ||
750 | * *any* of the other napi related functions. | ||
751 | */ | ||
742 | static inline void netif_napi_add(struct net_device *dev, | 752 | static inline void netif_napi_add(struct net_device *dev, |
743 | struct napi_struct *napi, | 753 | struct napi_struct *napi, |
744 | int (*poll)(struct napi_struct *, int), | 754 | int (*poll)(struct napi_struct *, int), |
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h index 457123171389..32326c293d7b 100644 --- a/include/linux/scatterlist.h +++ b/include/linux/scatterlist.h | |||
@@ -150,7 +150,7 @@ static inline struct scatterlist *sg_last(struct scatterlist *sgl, | |||
150 | struct scatterlist *ret = &sgl[nents - 1]; | 150 | struct scatterlist *ret = &sgl[nents - 1]; |
151 | #else | 151 | #else |
152 | struct scatterlist *sg, *ret = NULL; | 152 | struct scatterlist *sg, *ret = NULL; |
153 | int i; | 153 | unsigned int i; |
154 | 154 | ||
155 | for_each_sg(sgl, sg, nents, i) | 155 | for_each_sg(sgl, sg, nents, i) |
156 | ret = sg; | 156 | ret = sg; |
@@ -179,7 +179,11 @@ static inline void sg_chain(struct scatterlist *prv, unsigned int prv_nents, | |||
179 | #ifndef ARCH_HAS_SG_CHAIN | 179 | #ifndef ARCH_HAS_SG_CHAIN |
180 | BUG(); | 180 | BUG(); |
181 | #endif | 181 | #endif |
182 | prv[prv_nents - 1].page_link = (unsigned long) sgl | 0x01; | 182 | /* |
183 | * Set lowest bit to indicate a link pointer, and make sure to clear | ||
184 | * the termination bit if it happens to be set. | ||
185 | */ | ||
186 | prv[prv_nents - 1].page_link = ((unsigned long) sgl | 0x01) & ~0x02; | ||
183 | } | 187 | } |
184 | 188 | ||
185 | /** | 189 | /** |
@@ -239,7 +243,7 @@ static inline void sg_init_table(struct scatterlist *sgl, unsigned int nents) | |||
239 | sg_mark_end(sgl, nents); | 243 | sg_mark_end(sgl, nents); |
240 | #ifdef CONFIG_DEBUG_SG | 244 | #ifdef CONFIG_DEBUG_SG |
241 | { | 245 | { |
242 | int i; | 246 | unsigned int i; |
243 | for (i = 0; i < nents; i++) | 247 | for (i = 0; i < nents; i++) |
244 | sgl[i].sg_magic = SG_MAGIC; | 248 | sgl[i].sg_magic = SG_MAGIC; |
245 | } | 249 | } |
diff --git a/include/linux/sched.h b/include/linux/sched.h index 3c07d595979f..155d7438f7ad 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h | |||
@@ -1009,6 +1009,7 @@ struct task_struct { | |||
1009 | unsigned int rt_priority; | 1009 | unsigned int rt_priority; |
1010 | cputime_t utime, stime, utimescaled, stimescaled; | 1010 | cputime_t utime, stime, utimescaled, stimescaled; |
1011 | cputime_t gtime; | 1011 | cputime_t gtime; |
1012 | cputime_t prev_utime, prev_stime; | ||
1012 | unsigned long nvcsw, nivcsw; /* context switch counts */ | 1013 | unsigned long nvcsw, nivcsw; /* context switch counts */ |
1013 | struct timespec start_time; /* monotonic time */ | 1014 | struct timespec start_time; /* monotonic time */ |
1014 | struct timespec real_start_time; /* boot based time */ | 1015 | struct timespec real_start_time; /* boot based time */ |
diff --git a/include/linux/string.h b/include/linux/string.h index 836062b7582a..c5d3fcad7b57 100644 --- a/include/linux/string.h +++ b/include/linux/string.h | |||
@@ -3,16 +3,14 @@ | |||
3 | 3 | ||
4 | /* We don't want strings.h stuff being user by user stuff by accident */ | 4 | /* We don't want strings.h stuff being user by user stuff by accident */ |
5 | 5 | ||
6 | #ifdef __KERNEL__ | 6 | #ifndef __KERNEL__ |
7 | #include <string.h> | ||
8 | #else | ||
7 | 9 | ||
8 | #include <linux/compiler.h> /* for inline */ | 10 | #include <linux/compiler.h> /* for inline */ |
9 | #include <linux/types.h> /* for size_t */ | 11 | #include <linux/types.h> /* for size_t */ |
10 | #include <linux/stddef.h> /* for NULL */ | 12 | #include <linux/stddef.h> /* for NULL */ |
11 | 13 | ||
12 | #ifdef __cplusplus | ||
13 | extern "C" { | ||
14 | #endif | ||
15 | |||
16 | extern char *strndup_user(const char __user *, long); | 14 | extern char *strndup_user(const char __user *, long); |
17 | 15 | ||
18 | /* | 16 | /* |
@@ -111,9 +109,5 @@ extern void *kmemdup(const void *src, size_t len, gfp_t gfp); | |||
111 | extern char **argv_split(gfp_t gfp, const char *str, int *argcp); | 109 | extern char **argv_split(gfp_t gfp, const char *str, int *argcp); |
112 | extern void argv_free(char **argv); | 110 | extern void argv_free(char **argv); |
113 | 111 | ||
114 | #ifdef __cplusplus | ||
115 | } | ||
116 | #endif | ||
117 | |||
118 | #endif | 112 | #endif |
119 | #endif /* _LINUX_STRING_H_ */ | 113 | #endif /* _LINUX_STRING_H_ */ |
diff --git a/include/linux/sunrpc/rpc_rdma.h b/include/linux/sunrpc/rpc_rdma.h index 0013a0d8dc6b..87b895d5c786 100644 --- a/include/linux/sunrpc/rpc_rdma.h +++ b/include/linux/sunrpc/rpc_rdma.h | |||
@@ -41,17 +41,17 @@ | |||
41 | #define _LINUX_SUNRPC_RPC_RDMA_H | 41 | #define _LINUX_SUNRPC_RPC_RDMA_H |
42 | 42 | ||
43 | struct rpcrdma_segment { | 43 | struct rpcrdma_segment { |
44 | uint32_t rs_handle; /* Registered memory handle */ | 44 | __be32 rs_handle; /* Registered memory handle */ |
45 | uint32_t rs_length; /* Length of the chunk in bytes */ | 45 | __be32 rs_length; /* Length of the chunk in bytes */ |
46 | uint64_t rs_offset; /* Chunk virtual address or offset */ | 46 | __be64 rs_offset; /* Chunk virtual address or offset */ |
47 | }; | 47 | }; |
48 | 48 | ||
49 | /* | 49 | /* |
50 | * read chunk(s), encoded as a linked list. | 50 | * read chunk(s), encoded as a linked list. |
51 | */ | 51 | */ |
52 | struct rpcrdma_read_chunk { | 52 | struct rpcrdma_read_chunk { |
53 | uint32_t rc_discrim; /* 1 indicates presence */ | 53 | __be32 rc_discrim; /* 1 indicates presence */ |
54 | uint32_t rc_position; /* Position in XDR stream */ | 54 | __be32 rc_position; /* Position in XDR stream */ |
55 | struct rpcrdma_segment rc_target; | 55 | struct rpcrdma_segment rc_target; |
56 | }; | 56 | }; |
57 | 57 | ||
@@ -66,29 +66,29 @@ struct rpcrdma_write_chunk { | |||
66 | * write chunk(s), encoded as a counted array. | 66 | * write chunk(s), encoded as a counted array. |
67 | */ | 67 | */ |
68 | struct rpcrdma_write_array { | 68 | struct rpcrdma_write_array { |
69 | uint32_t wc_discrim; /* 1 indicates presence */ | 69 | __be32 wc_discrim; /* 1 indicates presence */ |
70 | uint32_t wc_nchunks; /* Array count */ | 70 | __be32 wc_nchunks; /* Array count */ |
71 | struct rpcrdma_write_chunk wc_array[0]; | 71 | struct rpcrdma_write_chunk wc_array[0]; |
72 | }; | 72 | }; |
73 | 73 | ||
74 | struct rpcrdma_msg { | 74 | struct rpcrdma_msg { |
75 | uint32_t rm_xid; /* Mirrors the RPC header xid */ | 75 | __be32 rm_xid; /* Mirrors the RPC header xid */ |
76 | uint32_t rm_vers; /* Version of this protocol */ | 76 | __be32 rm_vers; /* Version of this protocol */ |
77 | uint32_t rm_credit; /* Buffers requested/granted */ | 77 | __be32 rm_credit; /* Buffers requested/granted */ |
78 | uint32_t rm_type; /* Type of message (enum rpcrdma_proc) */ | 78 | __be32 rm_type; /* Type of message (enum rpcrdma_proc) */ |
79 | union { | 79 | union { |
80 | 80 | ||
81 | struct { /* no chunks */ | 81 | struct { /* no chunks */ |
82 | uint32_t rm_empty[3]; /* 3 empty chunk lists */ | 82 | __be32 rm_empty[3]; /* 3 empty chunk lists */ |
83 | } rm_nochunks; | 83 | } rm_nochunks; |
84 | 84 | ||
85 | struct { /* no chunks and padded */ | 85 | struct { /* no chunks and padded */ |
86 | uint32_t rm_align; /* Padding alignment */ | 86 | __be32 rm_align; /* Padding alignment */ |
87 | uint32_t rm_thresh; /* Padding threshold */ | 87 | __be32 rm_thresh; /* Padding threshold */ |
88 | uint32_t rm_pempty[3]; /* 3 empty chunk lists */ | 88 | __be32 rm_pempty[3]; /* 3 empty chunk lists */ |
89 | } rm_padded; | 89 | } rm_padded; |
90 | 90 | ||
91 | uint32_t rm_chunks[0]; /* read, write and reply chunks */ | 91 | __be32 rm_chunks[0]; /* read, write and reply chunks */ |
92 | 92 | ||
93 | } rm_body; | 93 | } rm_body; |
94 | }; | 94 | }; |
diff --git a/include/linux/types.h b/include/linux/types.h index 4f0dad21c917..f4f8d19158e4 100644 --- a/include/linux/types.h +++ b/include/linux/types.h | |||
@@ -37,6 +37,8 @@ typedef __kernel_gid32_t gid_t; | |||
37 | typedef __kernel_uid16_t uid16_t; | 37 | typedef __kernel_uid16_t uid16_t; |
38 | typedef __kernel_gid16_t gid16_t; | 38 | typedef __kernel_gid16_t gid16_t; |
39 | 39 | ||
40 | typedef unsigned long uintptr_t; | ||
41 | |||
40 | #ifdef CONFIG_UID16 | 42 | #ifdef CONFIG_UID16 |
41 | /* This is defined by include/asm-{arch}/posix_types.h */ | 43 | /* This is defined by include/asm-{arch}/posix_types.h */ |
42 | typedef __kernel_old_uid_t old_uid_t; | 44 | typedef __kernel_old_uid_t old_uid_t; |
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h index 5279466606d2..1fd449a6530b 100644 --- a/include/net/net_namespace.h +++ b/include/net/net_namespace.h | |||
@@ -51,13 +51,12 @@ static inline struct net *copy_net_ns(unsigned long flags, struct net *net_ns) | |||
51 | } | 51 | } |
52 | #endif | 52 | #endif |
53 | 53 | ||
54 | #ifdef CONFIG_NET_NS | ||
54 | extern void __put_net(struct net *net); | 55 | extern void __put_net(struct net *net); |
55 | 56 | ||
56 | static inline struct net *get_net(struct net *net) | 57 | static inline struct net *get_net(struct net *net) |
57 | { | 58 | { |
58 | #ifdef CONFIG_NET | ||
59 | atomic_inc(&net->count); | 59 | atomic_inc(&net->count); |
60 | #endif | ||
61 | return net; | 60 | return net; |
62 | } | 61 | } |
63 | 62 | ||
@@ -75,26 +74,44 @@ static inline struct net *maybe_get_net(struct net *net) | |||
75 | 74 | ||
76 | static inline void put_net(struct net *net) | 75 | static inline void put_net(struct net *net) |
77 | { | 76 | { |
78 | #ifdef CONFIG_NET | ||
79 | if (atomic_dec_and_test(&net->count)) | 77 | if (atomic_dec_and_test(&net->count)) |
80 | __put_net(net); | 78 | __put_net(net); |
81 | #endif | ||
82 | } | 79 | } |
83 | 80 | ||
84 | static inline struct net *hold_net(struct net *net) | 81 | static inline struct net *hold_net(struct net *net) |
85 | { | 82 | { |
86 | #ifdef CONFIG_NET | ||
87 | atomic_inc(&net->use_count); | 83 | atomic_inc(&net->use_count); |
88 | #endif | ||
89 | return net; | 84 | return net; |
90 | } | 85 | } |
91 | 86 | ||
92 | static inline void release_net(struct net *net) | 87 | static inline void release_net(struct net *net) |
93 | { | 88 | { |
94 | #ifdef CONFIG_NET | ||
95 | atomic_dec(&net->use_count); | 89 | atomic_dec(&net->use_count); |
96 | #endif | ||
97 | } | 90 | } |
91 | #else | ||
92 | static inline struct net *get_net(struct net *net) | ||
93 | { | ||
94 | return net; | ||
95 | } | ||
96 | |||
97 | static inline void put_net(struct net *net) | ||
98 | { | ||
99 | } | ||
100 | |||
101 | static inline struct net *hold_net(struct net *net) | ||
102 | { | ||
103 | return net; | ||
104 | } | ||
105 | |||
106 | static inline void release_net(struct net *net) | ||
107 | { | ||
108 | } | ||
109 | |||
110 | static inline struct net *maybe_get_net(struct net *net) | ||
111 | { | ||
112 | return net; | ||
113 | } | ||
114 | #endif | ||
98 | 115 | ||
99 | #define for_each_net(VAR) \ | 116 | #define for_each_net(VAR) \ |
100 | list_for_each_entry(VAR, &net_namespace_list, list) | 117 | list_for_each_entry(VAR, &net_namespace_list, list) |
diff --git a/include/net/sctp/auth.h b/include/net/sctp/auth.h index 9e8f13b7da5a..5db261a1e85e 100644 --- a/include/net/sctp/auth.h +++ b/include/net/sctp/auth.h | |||
@@ -103,7 +103,7 @@ struct sctp_hmac *sctp_auth_asoc_get_hmac(const struct sctp_association *asoc); | |||
103 | void sctp_auth_asoc_set_default_hmac(struct sctp_association *asoc, | 103 | void sctp_auth_asoc_set_default_hmac(struct sctp_association *asoc, |
104 | struct sctp_hmac_algo_param *hmacs); | 104 | struct sctp_hmac_algo_param *hmacs); |
105 | int sctp_auth_asoc_verify_hmac_id(const struct sctp_association *asoc, | 105 | int sctp_auth_asoc_verify_hmac_id(const struct sctp_association *asoc, |
106 | __u16 hmac_id); | 106 | __be16 hmac_id); |
107 | int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc); | 107 | int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc); |
108 | int sctp_auth_recv_cid(sctp_cid_t chunk, const struct sctp_association *asoc); | 108 | int sctp_auth_recv_cid(sctp_cid_t chunk, const struct sctp_association *asoc); |
109 | void sctp_auth_calculate_hmac(const struct sctp_association *asoc, | 109 | void sctp_auth_calculate_hmac(const struct sctp_association *asoc, |
diff --git a/include/net/sock.h b/include/net/sock.h index 43fc3fa50d62..20de3fa7ae40 100644 --- a/include/net/sock.h +++ b/include/net/sock.h | |||
@@ -779,7 +779,7 @@ extern void FASTCALL(release_sock(struct sock *sk)); | |||
779 | 779 | ||
780 | extern struct sock *sk_alloc(struct net *net, int family, | 780 | extern struct sock *sk_alloc(struct net *net, int family, |
781 | gfp_t priority, | 781 | gfp_t priority, |
782 | struct proto *prot, int zero_it); | 782 | struct proto *prot); |
783 | extern void sk_free(struct sock *sk); | 783 | extern void sk_free(struct sock *sk); |
784 | extern struct sock *sk_clone(const struct sock *sk, | 784 | extern struct sock *sk_clone(const struct sock *sk, |
785 | const gfp_t priority); | 785 | const gfp_t priority); |
@@ -993,20 +993,6 @@ static inline void sock_graft(struct sock *sk, struct socket *parent) | |||
993 | write_unlock_bh(&sk->sk_callback_lock); | 993 | write_unlock_bh(&sk->sk_callback_lock); |
994 | } | 994 | } |
995 | 995 | ||
996 | static inline void sock_copy(struct sock *nsk, const struct sock *osk) | ||
997 | { | ||
998 | #ifdef CONFIG_SECURITY_NETWORK | ||
999 | void *sptr = nsk->sk_security; | ||
1000 | #endif | ||
1001 | |||
1002 | memcpy(nsk, osk, osk->sk_prot->obj_size); | ||
1003 | get_net(nsk->sk_net); | ||
1004 | #ifdef CONFIG_SECURITY_NETWORK | ||
1005 | nsk->sk_security = sptr; | ||
1006 | security_sk_clone(osk, nsk); | ||
1007 | #endif | ||
1008 | } | ||
1009 | |||
1010 | extern int sock_i_uid(struct sock *sk); | 996 | extern int sock_i_uid(struct sock *sk); |
1011 | extern unsigned long sock_i_ino(struct sock *sk); | 997 | extern unsigned long sock_i_ino(struct sock *sk); |
1012 | 998 | ||