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-rw-r--r--include/asm-blackfin/blackfin.h6
-rw-r--r--include/asm-blackfin/gpio.h1
-rw-r--r--include/asm-blackfin/mach-common/def_LPBlackfin.h22
-rw-r--r--include/asm-blackfin/macros.h95
4 files changed, 28 insertions, 96 deletions
diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h
index 14e58de73973..db3b615ffbab 100644
--- a/include/asm-blackfin/blackfin.h
+++ b/include/asm-blackfin/blackfin.h
@@ -6,7 +6,11 @@
6#ifndef _BLACKFIN_H_ 6#ifndef _BLACKFIN_H_
7#define _BLACKFIN_H_ 7#define _BLACKFIN_H_
8 8
9#include <asm/macros.h> 9#define LO(con32) ((con32) & 0xFFFF)
10#define lo(con32) ((con32) & 0xFFFF)
11#define HI(con32) (((con32) >> 16) & 0xFFFF)
12#define hi(con32) (((con32) >> 16) & 0xFFFF)
13
10#include <asm/mach/blackfin.h> 14#include <asm/mach/blackfin.h>
11#include <asm/bfin-global.h> 15#include <asm/bfin-global.h>
12 16
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index aa0d5503e232..d98d77ad71f7 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -332,6 +332,7 @@ struct gpio_port_s {
332 unsigned short inen; 332 unsigned short inen;
333 333
334 unsigned short fer; 334 unsigned short fer;
335 unsigned short reserved;
335}; 336};
336#endif /*CONFIG_PM*/ 337#endif /*CONFIG_PM*/
337 338
diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h
index 76103526aec1..be1ece8c0c27 100644
--- a/include/asm-blackfin/mach-common/def_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h
@@ -42,6 +42,12 @@
42 42
43#if defined(ANOMALY_05000198) 43#if defined(ANOMALY_05000198)
44 44
45#define bfin_read8(addr) ({ unsigned char __v; \
46 __asm__ __volatile__ ("NOP;\n\t" \
47 "%0 = b[%1] (z);\n\t" \
48 : "=d"(__v) : "a"(addr)); \
49 __v; })
50
45#define bfin_read16(addr) ({ unsigned __v; \ 51#define bfin_read16(addr) ({ unsigned __v; \
46 __asm__ __volatile__ ("NOP;\n\t"\ 52 __asm__ __volatile__ ("NOP;\n\t"\
47 "%0 = w[%1] (z);\n\t"\ 53 "%0 = w[%1] (z);\n\t"\
@@ -52,6 +58,11 @@
52 "%0 = [%1];\n\t"\ 58 "%0 = [%1];\n\t"\
53 : "=d"(__v) : "a"(addr)); __v; }) 59 : "=d"(__v) : "a"(addr)); __v; })
54 60
61#define bfin_write8(addr, val) ({ \
62 __asm__ __volatile__ ("NOP;\n\t" \
63 "b[%0] = %1;\n\t" \
64 : : "a"(addr), "d"(val) : "memory");})
65
55#define bfin_write16(addr,val) ({\ 66#define bfin_write16(addr,val) ({\
56 __asm__ __volatile__ ("NOP;\n\t"\ 67 __asm__ __volatile__ ("NOP;\n\t"\
57 "w[%0] = %1;\n\t"\ 68 "w[%0] = %1;\n\t"\
@@ -64,6 +75,12 @@
64 75
65#else 76#else
66 77
78#define bfin_read8(addr) ({ unsigned char __v; \
79 __asm__ __volatile__ ( \
80 "%0 = b[%1] (z);\n\t" \
81 :"=d"(__v) : "a"(addr)); \
82 __v; })
83
67#define bfin_read16(addr) ({ unsigned __v; \ 84#define bfin_read16(addr) ({ unsigned __v; \
68 __asm__ __volatile__ (\ 85 __asm__ __volatile__ (\
69 "%0 = w[%1] (z);\n\t"\ 86 "%0 = w[%1] (z);\n\t"\
@@ -74,6 +91,11 @@
74 "%0 = [%1];\n\t"\ 91 "%0 = [%1];\n\t"\
75 : "=d"(__v) : "a"(addr)); __v; }) 92 : "=d"(__v) : "a"(addr)); __v; })
76 93
94#define bfin_write8(addr, val) ({ \
95 __asm__ __volatile__ ( \
96 "b[%0] = %1; \n\t" \
97 ::"a"(addr), "d"(val) : "memory");})
98
77#define bfin_write16(addr,val) ({\ 99#define bfin_write16(addr,val) ({\
78 __asm__ __volatile__ (\ 100 __asm__ __volatile__ (\
79 "w[%0] = %1;\n\t"\ 101 "w[%0] = %1;\n\t"\
diff --git a/include/asm-blackfin/macros.h b/include/asm-blackfin/macros.h
index c0c04a2f2dd5..e69de29bb2d1 100644
--- a/include/asm-blackfin/macros.h
+++ b/include/asm-blackfin/macros.h
@@ -1,95 +0,0 @@
1/************************************************************************
2 *
3 * macros.h
4 *
5 * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved.
6 *
7 ************************************************************************/
8
9/* Defines various assembly macros. */
10
11#ifndef _MACROS_H
12#define _MACROS_H
13
14#define LO(con32) ((con32) & 0xFFFF)
15#define lo(con32) ((con32) & 0xFFFF)
16#define HI(con32) (((con32) >> 16) & 0xFFFF)
17#define hi(con32) (((con32) >> 16) & 0xFFFF)
18
19/*
20 * Set the corresponding bits in a System Register (SR);
21 * All bits set in "mask" will be set in the system register
22 * specified by "sys_reg" bitset_SR(sys_reg, mask), where
23 * sys_reg is the system register and mask are the bits to be set.
24 */
25#define bitset_SR(sys_reg, mask)\
26 [--SP] = (R7:6);\
27 r7 = sys_reg;\
28 r6.l = (mask) & 0xffff;\
29 r6.h = (mask) >> 16;\
30 r7 = r7 | r6;\
31 sys_reg = r7;\
32 csync;\
33 (R7:6) = [SP++]
34
35/*
36 * Clear the corresponding bits in a System Register (SR);
37 * All bits set in "mask" will be cleared in the SR
38 * specified by "sys_reg" bitclr_SR(sys_reg, mask), where
39 * sys_reg is the SR and mask are the bits to be cleared.
40 */
41#define bitclr_SR(sys_reg, mask)\
42 [--SP] = (R7:6);\
43 r7 = sys_reg;\
44 r7 =~ r7;\
45 r6.l = (mask) & 0xffff;\
46 r6.h = (mask) >> 16;\
47 r7 = r7 | r6;\
48 r7 =~ r7;\
49 sys_reg = r7;\
50 csync;\
51 (R7:6) = [SP++]
52
53/*
54 * Set the corresponding bits in a Memory Mapped Register (MMR);
55 * All bits set in "mask" will be set in the MMR specified by "mmr_reg"
56 * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are
57 * the bits to be set.
58 */
59#define bitset_MMR(mmr_reg, mask)\
60 [--SP] = (R7:6);\
61 [--SP] = P5;\
62 p5.l = mmr_reg & 0xffff;\
63 p5.h = mmr_reg >> 16;\
64 r7 = [p5];\
65 r6.l = (mask) & 0xffff;\
66 r6.h = (mask) >> 16;\
67 r7 = r7 | r6;\
68 [p5] = r7;\
69 csync;\
70 p5 = [SP++];\
71 (R7:6) = [SP++]
72
73/*
74 * Clear the corresponding bits in a Memory Mapped Register (MMR);
75 * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg"
76 * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are
77 * the bits to be cleared.
78 */
79#define bitclr_MMR(mmr_reg, mask)\
80 [--SP] = (R7:6);\
81 [--SP] = P5;\
82 p5.l = mmr_reg & 0xffff;\
83 p5.h = mmr_reg >> 16;\
84 r7 = [p5];\
85 r7 =~ r7;\
86 r6.l = (mask) & 0xffff;\
87 r6.h = (mask) >> 16;\
88 r7 = r7 | r6;\
89 r7 =~ r7;\
90 [p5] = r7;\
91 csync;\
92 p5 = [SP++];\
93 (R7:6) = [SP++]
94
95#endif /* _MACROS_H */
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