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-rw-r--r--include/asm-alpha/smp.h2
-rw-r--r--include/asm-arm/smp.h2
-rw-r--r--include/asm-arm/system.h2
-rw-r--r--include/asm-generic/pgtable.h3
-rw-r--r--include/asm-i386/page.h1
-rw-r--r--include/asm-i386/pgtable.h2
-rw-r--r--include/asm-i386/smp.h2
-rw-r--r--include/asm-i386/unistd.h2
-rw-r--r--include/asm-ia64/mmzone.h14
-rw-r--r--include/asm-ia64/pgtable.h1
-rw-r--r--include/asm-ia64/smp.h2
-rw-r--r--include/asm-ia64/sn/mspec.h59
-rw-r--r--include/asm-ia64/uncached.h12
-rw-r--r--include/asm-ia64/unistd.h1
-rw-r--r--include/asm-m32r/div64.h39
-rw-r--r--include/asm-m32r/ide.h2
-rw-r--r--include/asm-m32r/m32102.h1
-rw-r--r--include/asm-m32r/m32102peri.h468
-rw-r--r--include/asm-m32r/m32r.h5
-rw-r--r--include/asm-m32r/mappi3/mappi3_pld.h143
-rw-r--r--include/asm-m32r/smp.h2
-rw-r--r--include/asm-mips/smp.h2
-rw-r--r--include/asm-mips/vr41xx/giu.h69
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h35
-rw-r--r--include/asm-parisc/smp.h2
-rw-r--r--include/asm-ppc/irq.h34
-rw-r--r--include/asm-ppc/mpc10x.h6
-rw-r--r--include/asm-ppc/mpc85xx.h60
-rw-r--r--include/asm-ppc/pgtable.h2
-rw-r--r--include/asm-ppc/ppc_sys.h2
-rw-r--r--include/asm-ppc/smp.h2
-rw-r--r--include/asm-ppc64/dma.h3
-rw-r--r--include/asm-ppc64/iSeries/HvCall.h156
-rw-r--r--include/asm-ppc64/iSeries/HvCallCfg.h213
-rw-r--r--include/asm-ppc64/iSeries/HvCallEvent.h94
-rw-r--r--include/asm-ppc64/iSeries/HvCallHpt.h112
-rw-r--r--include/asm-ppc64/iSeries/HvCallPci.h486
-rw-r--r--include/asm-ppc64/iSeries/HvCallSc.h40
-rw-r--r--include/asm-ppc64/iSeries/HvCallSm.h36
-rw-r--r--include/asm-ppc64/iSeries/HvCallXm.h113
-rw-r--r--include/asm-ppc64/iSeries/HvLpConfig.h300
-rw-r--r--include/asm-ppc64/iSeries/HvLpEvent.h116
-rw-r--r--include/asm-ppc64/iSeries/HvReleaseData.h78
-rw-r--r--include/asm-ppc64/iSeries/HvTypes.h108
-rw-r--r--include/asm-ppc64/iSeries/IoHriMainStore.h33
-rw-r--r--include/asm-ppc64/iSeries/IoHriProcessorVpd.h32
-rw-r--r--include/asm-ppc64/iSeries/ItExtVpdPanel.h54
-rw-r--r--include/asm-ppc64/iSeries/ItIplParmsReal.h99
-rw-r--r--include/asm-ppc64/iSeries/ItLpNaca.h44
-rw-r--r--include/asm-ppc64/iSeries/ItLpQueue.h84
-rw-r--r--include/asm-ppc64/iSeries/ItLpRegSave.h41
-rw-r--r--include/asm-ppc64/iSeries/ItSpCommArea.h10
-rw-r--r--include/asm-ppc64/iSeries/ItVpdAreas.h125
-rw-r--r--include/asm-ppc64/iSeries/LparData.h49
-rw-r--r--include/asm-ppc64/iSeries/LparMap.h44
-rw-r--r--include/asm-ppc64/iSeries/XmPciLpEvent.h18
-rw-r--r--include/asm-ppc64/iSeries/iSeries_io.h59
-rw-r--r--include/asm-ppc64/iSeries/iSeries_irq.h17
-rw-r--r--include/asm-ppc64/iSeries/iSeries_pci.h142
-rw-r--r--include/asm-ppc64/iSeries/iSeries_proc.h24
-rw-r--r--include/asm-ppc64/iSeries/mf.h5
-rw-r--r--include/asm-ppc64/iSeries/vio.h57
-rw-r--r--include/asm-ppc64/imalloc.h12
-rw-r--r--include/asm-ppc64/iommu.h25
-rw-r--r--include/asm-ppc64/paca.h2
-rw-r--r--include/asm-ppc64/page.h2
-rw-r--r--include/asm-ppc64/pgtable.h9
-rw-r--r--include/asm-ppc64/processor.h10
-rw-r--r--include/asm-ppc64/smp.h2
-rw-r--r--include/asm-s390/smp.h2
-rw-r--r--include/asm-sh/page.h1
-rw-r--r--include/asm-sh/pgtable.h1
-rw-r--r--include/asm-sh/smp.h2
-rw-r--r--include/asm-sh64/page.h1
-rw-r--r--include/asm-sh64/pgtable.h2
-rw-r--r--include/asm-sparc/smp.h2
-rw-r--r--include/asm-sparc64/page.h2
-rw-r--r--include/asm-sparc64/pgtable.h1
-rw-r--r--include/asm-sparc64/processor.h34
-rw-r--r--include/asm-sparc64/smp.h2
-rw-r--r--include/asm-um/smp.h3
-rw-r--r--include/asm-x86_64/a.out.h2
-rw-r--r--include/asm-x86_64/page.h1
-rw-r--r--include/asm-x86_64/pgtable.h3
-rw-r--r--include/asm-x86_64/processor.h11
-rw-r--r--include/asm-x86_64/smp.h2
-rw-r--r--include/linux/arcfb.h8
-rw-r--r--include/linux/auto_fs4.h2
-rw-r--r--include/linux/fb.h19
-rw-r--r--include/linux/font.h26
-rw-r--r--include/linux/fsl_devices.h8
-rw-r--r--include/linux/genalloc.h40
-rw-r--r--include/linux/gfp.h8
-rw-r--r--include/linux/hugetlb.h40
-rw-r--r--include/linux/ioc4.h179
-rw-r--r--include/linux/ioc4_common.h21
-rw-r--r--include/linux/irq.h4
-rw-r--r--include/linux/mm.h6
-rw-r--r--include/linux/mmzone.h21
-rw-r--r--include/linux/netfilter_ipv4.h6
-rw-r--r--include/linux/netfilter_ipv4/ip_conntrack_core.h3
-rw-r--r--include/linux/netfilter_ipv4/ip_nat.h3
-rw-r--r--include/linux/netfilter_ipv4/listhelp.h1
-rw-r--r--include/linux/netfilter_ipv4/lockhelp.h129
-rw-r--r--include/linux/netlink.h2
-rw-r--r--include/linux/page-flags.h35
-rw-r--r--include/linux/pagemap.h4
-rw-r--r--include/linux/pci_ids.h1
-rw-r--r--include/linux/raid/bitmap.h273
-rw-r--r--include/linux/raid/md.h17
-rw-r--r--include/linux/raid/md_k.h22
-rw-r--r--include/linux/raid/md_p.h9
-rw-r--r--include/linux/raid/md_u.h7
-rw-r--r--include/linux/raid/raid1.h16
-rw-r--r--include/linux/sched.h11
-rw-r--r--include/linux/skbuff.h13
-rw-r--r--include/linux/smp.h40
-rw-r--r--include/linux/swap.h3
-rw-r--r--include/net/ip6_fib.h9
-rw-r--r--include/net/ip6_route.h9
-rw-r--r--include/net/route.h2
-rw-r--r--include/net/snmp.h14
122 files changed, 2174 insertions, 2742 deletions
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h
index cbc173ae45aa..9950706abdf8 100644
--- a/include/asm-alpha/smp.h
+++ b/include/asm-alpha/smp.h
@@ -43,7 +43,7 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
43#define PROC_CHANGE_PENALTY 20 43#define PROC_CHANGE_PENALTY 20
44 44
45#define hard_smp_processor_id() __hard_smp_processor_id() 45#define hard_smp_processor_id() __hard_smp_processor_id()
46#define smp_processor_id() (current_thread_info()->cpu) 46#define raw_smp_processor_id() (current_thread_info()->cpu)
47 47
48extern cpumask_t cpu_present_mask; 48extern cpumask_t cpu_present_mask;
49extern cpumask_t cpu_online_map; 49extern cpumask_t cpu_online_map;
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index bd44f894690f..6c6c60adbbaa 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -21,7 +21,7 @@
21# error "<asm-arm/smp.h> included in non-SMP build" 21# error "<asm-arm/smp.h> included in non-SMP build"
22#endif 22#endif
23 23
24#define smp_processor_id() (current_thread_info()->cpu) 24#define raw_smp_processor_id() (current_thread_info()->cpu)
25 25
26extern cpumask_t cpu_present_mask; 26extern cpumask_t cpu_present_mask;
27#define cpu_possible_map cpu_present_mask 27#define cpu_possible_map cpu_present_mask
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 8405eb6558ed..39dd7008013c 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -308,7 +308,7 @@ do { \
308({ \ 308({ \
309 unsigned long flags; \ 309 unsigned long flags; \
310 local_save_flags(flags); \ 310 local_save_flags(flags); \
311 flags & PSR_I_BIT; \ 311 (int)(flags & PSR_I_BIT); \
312}) 312})
313 313
314#ifdef CONFIG_SMP 314#ifdef CONFIG_SMP
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 1f4ec7b70270..f40593565173 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -125,6 +125,9 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres
125 125
126#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY 126#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
127#define page_test_and_clear_dirty(page) (0) 127#define page_test_and_clear_dirty(page) (0)
128#define pte_maybe_dirty(pte) pte_dirty(pte)
129#else
130#define pte_maybe_dirty(pte) (1)
128#endif 131#endif
129 132
130#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG 133#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index ed13969fa2d6..41400d342d44 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -68,6 +68,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
68#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 68#define HPAGE_MASK (~(HPAGE_SIZE - 1))
69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
71#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
71#endif 72#endif
72 73
73#define pgd_val(x) ((x).pgd) 74#define pgd_val(x) ((x).pgd)
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 8d60c2b4b003..e9efe148fdf7 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -236,6 +236,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
236static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; } 236static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
237static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } 237static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
238static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } 238static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
239static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; }
239 240
240#ifdef CONFIG_X86_PAE 241#ifdef CONFIG_X86_PAE
241# include <asm/pgtable-3level.h> 242# include <asm/pgtable-3level.h>
@@ -275,7 +276,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
275 */ 276 */
276 277
277#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 278#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
278#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
279 279
280static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 280static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
281{ 281{
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index e03a206dfa36..55ef31f66bbe 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -51,7 +51,7 @@ extern u8 x86_cpu_to_apicid[];
51 * from the initial startup. We map APIC_BASE very early in page_setup(), 51 * from the initial startup. We map APIC_BASE very early in page_setup(),
52 * so this is correct in the x86 case. 52 * so this is correct in the x86 case.
53 */ 53 */
54#define __smp_processor_id() (current_thread_info()->cpu) 54#define raw_smp_processor_id() (current_thread_info()->cpu)
55 55
56extern cpumask_t cpu_callout_map; 56extern cpumask_t cpu_callout_map;
57extern cpumask_t cpu_callin_map; 57extern cpumask_t cpu_callin_map;
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index 61bcc1b1e3f4..176413fb9ae3 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -256,7 +256,7 @@
256#define __NR_io_submit 248 256#define __NR_io_submit 248
257#define __NR_io_cancel 249 257#define __NR_io_cancel 249
258#define __NR_fadvise64 250 258#define __NR_fadvise64 250
259 259#define __NR_set_zone_reclaim 251
260#define __NR_exit_group 252 260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253 261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254 262#define __NR_epoll_create 254
diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h
index 9491dacc89cf..83ca4043fc11 100644
--- a/include/asm-ia64/mmzone.h
+++ b/include/asm-ia64/mmzone.h
@@ -15,6 +15,20 @@
15#include <asm/page.h> 15#include <asm/page.h>
16#include <asm/meminit.h> 16#include <asm/meminit.h>
17 17
18static inline int pfn_to_nid(unsigned long pfn)
19{
20#ifdef CONFIG_NUMA
21 extern int paddr_to_nid(unsigned long);
22 int nid = paddr_to_nid(pfn << PAGE_SHIFT);
23 if (nid < 0)
24 return 0;
25 else
26 return nid;
27#else
28 return 0;
29#endif
30}
31
18#ifdef CONFIG_DISCONTIGMEM 32#ifdef CONFIG_DISCONTIGMEM
19 33
20#ifdef CONFIG_IA64_DIG /* DIG systems are small */ 34#ifdef CONFIG_IA64_DIG /* DIG systems are small */
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index fcc9c3344ab4..48586e08f432 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -283,6 +283,7 @@ ia64_phys_addr_valid (unsigned long addr)
283#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A)) 283#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A))
284#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D)) 284#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D))
285#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D)) 285#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D))
286#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_P))
286 287
287/* 288/*
288 * Macro to a page protection value as "uncacheable". Note that "protection" is really a 289 * Macro to a page protection value as "uncacheable". Note that "protection" is really a
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index 3ba1a061e4ae..a3914352c995 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -46,7 +46,7 @@ ia64_get_lid (void)
46#define SMP_IRQ_REDIRECTION (1 << 0) 46#define SMP_IRQ_REDIRECTION (1 << 0)
47#define SMP_IPI_REDIRECTION (1 << 1) 47#define SMP_IPI_REDIRECTION (1 << 1)
48 48
49#define smp_processor_id() (current_thread_info()->cpu) 49#define raw_smp_processor_id() (current_thread_info()->cpu)
50 50
51extern struct smp_boot_data { 51extern struct smp_boot_data {
52 int cpu_count; 52 int cpu_count;
diff --git a/include/asm-ia64/sn/mspec.h b/include/asm-ia64/sn/mspec.h
new file mode 100644
index 000000000000..dbe13c6121a8
--- /dev/null
+++ b/include/asm-ia64/sn/mspec.h
@@ -0,0 +1,59 @@
1/*
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
8 */
9
10#ifndef _ASM_IA64_SN_MSPEC_H
11#define _ASM_IA64_SN_MSPEC_H
12
13#define FETCHOP_VAR_SIZE 64 /* 64 byte per fetchop variable */
14
15#define FETCHOP_LOAD 0
16#define FETCHOP_INCREMENT 8
17#define FETCHOP_DECREMENT 16
18#define FETCHOP_CLEAR 24
19
20#define FETCHOP_STORE 0
21#define FETCHOP_AND 24
22#define FETCHOP_OR 32
23
24#define FETCHOP_CLEAR_CACHE 56
25
26#define FETCHOP_LOAD_OP(addr, op) ( \
27 *(volatile long *)((char*) (addr) + (op)))
28
29#define FETCHOP_STORE_OP(addr, op, x) ( \
30 *(volatile long *)((char*) (addr) + (op)) = (long) (x))
31
32#ifdef __KERNEL__
33
34/*
35 * Each Atomic Memory Operation (AMO formerly known as fetchop)
36 * variable is 64 bytes long. The first 8 bytes are used. The
37 * remaining 56 bytes are unaddressable due to the operation taking
38 * that portion of the address.
39 *
40 * NOTE: The AMO_t _MUST_ be placed in either the first or second half
41 * of the cache line. The cache line _MUST NOT_ be used for anything
42 * other than additional AMO_t entries. This is because there are two
43 * addresses which reference the same physical cache line. One will
44 * be a cached entry with the memory type bits all set. This address
45 * may be loaded into processor cache. The AMO_t will be referenced
46 * uncached via the memory special memory type. If any portion of the
47 * cached cache-line is modified, when that line is flushed, it will
48 * overwrite the uncached value in physical memory and lead to
49 * inconsistency.
50 */
51typedef struct {
52 u64 variable;
53 u64 unused[7];
54} AMO_t;
55
56
57#endif /* __KERNEL__ */
58
59#endif /* _ASM_IA64_SN_MSPEC_H */
diff --git a/include/asm-ia64/uncached.h b/include/asm-ia64/uncached.h
new file mode 100644
index 000000000000..b82d923b73c1
--- /dev/null
+++ b/include/asm-ia64/uncached.h
@@ -0,0 +1,12 @@
1/*
2 * Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
7 *
8 * Prototypes for the uncached page allocator
9 */
10
11extern unsigned long uncached_alloc_page(int nid);
12extern void uncached_free_page(unsigned long);
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index 33e26c557c5c..f7f43ec2483a 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -263,6 +263,7 @@
263#define __NR_add_key 1271 263#define __NR_add_key 1271
264#define __NR_request_key 1272 264#define __NR_request_key 1272
265#define __NR_keyctl 1273 265#define __NR_keyctl 1273
266#define __NR_set_zone_reclaim 1276
266 267
267#ifdef __KERNEL__ 268#ifdef __KERNEL__
268 269
diff --git a/include/asm-m32r/div64.h b/include/asm-m32r/div64.h
index 417a51bd552d..6cd978cefb28 100644
--- a/include/asm-m32r/div64.h
+++ b/include/asm-m32r/div64.h
@@ -1,38 +1 @@
1#ifndef _ASM_M32R_DIV64 #include <asm-generic/div64.h>
2#define _ASM_M32R_DIV64
3
4/* $Id$ */
5
6/* unsigned long long division.
7 * Input:
8 * unsigned long long n
9 * unsigned long base
10 * Output:
11 * n = n / base;
12 * return value = n % base;
13 */
14#define do_div(n, base) \
15({ \
16 unsigned long _res, _high, _mid, _low; \
17 \
18 _low = (n) & 0xffffffffUL; \
19 _high = (n) >> 32; \
20 if (_high) { \
21 _mid = (_high % (unsigned long)(base)) << 16; \
22 _high = _high / (unsigned long)(base); \
23 _mid += _low >> 16; \
24 _low &= 0x0000ffffUL; \
25 _low += (_mid % (unsigned long)(base)) << 16; \
26 _mid = _mid / (unsigned long)(base); \
27 _res = _low % (unsigned long)(base); \
28 _low = _low / (unsigned long)(base); \
29 n = _low + ((long long)_mid << 16) + \
30 ((long long)_high << 32); \
31 } else { \
32 _res = _low % (unsigned long)(base); \
33 n = (_low / (unsigned long)(base)); \
34 } \
35 _res; \
36})
37
38#endif /* _ASM_M32R_DIV64 */
diff --git a/include/asm-m32r/ide.h b/include/asm-m32r/ide.h
index be64f24e37ee..194393bd8beb 100644
--- a/include/asm-m32r/ide.h
+++ b/include/asm-m32r/ide.h
@@ -35,7 +35,7 @@
35static __inline__ int ide_default_irq(unsigned long base) 35static __inline__ int ide_default_irq(unsigned long base)
36{ 36{
37 switch (base) { 37 switch (base) {
38#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) 38#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3)
39 case 0x1f0: return PLD_IRQ_CFIREQ; 39 case 0x1f0: return PLD_IRQ_CFIREQ;
40 default: 40 default:
41 return 0; 41 return 0;
diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h
index b56034026bf8..cb98101f4f6e 100644
--- a/include/asm-m32r/m32102.h
+++ b/include/asm-m32r/m32102.h
@@ -175,6 +175,7 @@
175#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ 175#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
176#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ 176#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
177#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ 177#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
178#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
178#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */ 179#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
179#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */ 180#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
180#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */ 181#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */
diff --git a/include/asm-m32r/m32102peri.h b/include/asm-m32r/m32102peri.h
deleted file mode 100644
index 3c12955ad0f0..000000000000
--- a/include/asm-m32r/m32102peri.h
+++ /dev/null
@@ -1,468 +0,0 @@
1/* $Id$
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 2000,2001 by Hiroyuki Kondo
8 */
9
10#ifndef __ASSEMBLY__
11
12typedef void V;
13typedef char B;
14typedef short S;
15typedef int W;
16typedef long L;
17typedef float F;
18typedef double D;
19typedef unsigned char UB;
20typedef unsigned short US;
21typedef unsigned int UW;
22typedef unsigned long UL;
23typedef const unsigned int CUW;
24
25/*********************************
26
27M32102 ICU
28
29*********************************/
30#define ICUISTS (UW *)0xa0EFF004
31#define ICUIREQ0 (UW *)0xa0EFF008
32#define ICUIREQ1 (UW *)0xa0EFF00C
33
34#define ICUSBICR (UW *)0xa0EFF018
35#define ICUIMASK (UW *)0xa0EFF01C
36
37#define ICUCR1 (UW *)0xa0EFF200 /* INT0 */
38#define ICUCR2 (UW *)0xa0EFF204 /* INT1 */
39#define ICUCR3 (UW *)0xa0EFF208 /* INT2 */
40#define ICUCR4 (UW *)0xa0EFF20C /* INT3 */
41#define ICUCR5 (UW *)0xa0EFF210 /* INT4 */
42#define ICUCR6 (UW *)0xa0EFF214 /* INT5 */
43#define ICUCR7 (UW *)0xa0EFF218 /* INT6 */
44
45#define ICUCR16 (UW *)0xa0EFF23C /* MFT0 */
46#define ICUCR17 (UW *)0xa0EFF240 /* MFT1 */
47#define ICUCR18 (UW *)0xa0EFF244 /* MFT2 */
48#define ICUCR19 (UW *)0xa0EFF248 /* MFT3 */
49#define ICUCR20 (UW *)0xa0EFF24C /* MFT4 */
50#define ICUCR21 (UW *)0xa0EFF250 /* MFT5 */
51
52#define ICUCR32 (UW *)0xa0EFF27C /* DMA0 */
53#define ICUCR33 (UW *)0xa0EFF280 /* DMA1 */
54
55#define ICUCR48 (UW *)0xa0EFF2BC /* SIO0R */
56#define ICUCR49 (UW *)0xa0EFF2C0 /* SIO0S */
57#define ICUCR50 (UW *)0xa0EFF2C4 /* SIO1R */
58#define ICUCR51 (UW *)0xa0EFF2C8 /* SIO1S */
59#define ICUCR52 (UW *)0xa0EFF2CC /* SIO2R */
60#define ICUCR53 (UW *)0xa0EFF2D0 /* SIO2S */
61#define ICUCR54 (UW *)0xa0EFF2D4 /* SIO3R */
62#define ICUCR55 (UW *)0xa0EFF2D8 /* SIO3S */
63#define ICUCR56 (UW *)0xa0EFF2DC /* SIO4R */
64#define ICUCR57 (UW *)0xa0EFF2E0 /* SIO4S */
65
66/*********************************
67
68M32102 MFT
69
70*********************************/
71#define MFTCR (US *)0xa0EFC002
72#define MFTRPR (UB *)0xa0EFC006
73
74#define MFT0MOD (US *)0xa0EFC102
75#define MFT0BOS (US *)0xa0EFC106
76#define MFT0CUT (US *)0xa0EFC10A
77#define MFT0RLD (US *)0xa0EFC10E
78#define MFT0CRLD (US *)0xa0EFC112
79
80#define MFT1MOD (US *)0xa0EFC202
81#define MFT1BOS (US *)0xa0EFC206
82#define MFT1CUT (US *)0xa0EFC20A
83#define MFT1RLD (US *)0xa0EFC20E
84#define MFT1CRLD (US *)0xa0EFC212
85
86#define MFT2MOD (US *)0xa0EFC302
87#define MFT2BOS (US *)0xa0EFC306
88#define MFT2CUT (US *)0xa0EFC30A
89#define MFT2RLD (US *)0xa0EFC30E
90#define MFT2CRLD (US *)0xa0EFC312
91
92#define MFT3MOD (US *)0xa0EFC402
93#define MFT3CUT (US *)0xa0EFC40A
94#define MFT3RLD (US *)0xa0EFC40E
95#define MFT3CRLD (US *)0xa0EFC412
96
97#define MFT4MOD (US *)0xa0EFC502
98#define MFT4CUT (US *)0xa0EFC50A
99#define MFT4RLD (US *)0xa0EFC50E
100#define MFT4CRLD (US *)0xa0EFC512
101
102#define MFT5MOD (US *)0xa0EFC602
103#define MFT5CUT (US *)0xa0EFC60A
104#define MFT5RLD (US *)0xa0EFC60E
105#define MFT5CRLD (US *)0xa0EFC612
106
107/*********************************
108
109M32102 SIO
110
111*********************************/
112
113#define SIO0CR (volatile int *)0xa0efd000
114#define SIO0MOD0 (volatile int *)0xa0efd004
115#define SIO0MOD1 (volatile int *)0xa0efd008
116#define SIO0STS (volatile int *)0xa0efd00c
117#define SIO0IMASK (volatile int *)0xa0efd010
118#define SIO0BAUR (volatile int *)0xa0efd014
119#define SIO0RBAUR (volatile int *)0xa0efd018
120#define SIO0TXB (volatile int *)0xa0efd01c
121#define SIO0RXB (volatile int *)0xa0efd020
122
123#define SIO1CR (volatile int *)0xa0efd100
124#define SIO1MOD0 (volatile int *)0xa0efd104
125#define SIO1MOD1 (volatile int *)0xa0efd108
126#define SIO1STS (volatile int *)0xa0efd10c
127#define SIO1IMASK (volatile int *)0xa0efd110
128#define SIO1BAUR (volatile int *)0xa0efd114
129#define SIO1RBAUR (volatile int *)0xa0efd118
130#define SIO1TXB (volatile int *)0xa0efd11c
131#define SIO1RXB (volatile int *)0xa0efd120
132/*********************************
133
134M32102 PORT
135
136*********************************/
137#define PIEN (UB *)0xa0EF1003 /* input enable */
138
139#define P0DATA (UB *)0xa0EF1020 /* data */
140#define P1DATA (UB *)0xa0EF1021
141#define P2DATA (UB *)0xa0EF1022
142#define P3DATA (UB *)0xa0EF1023
143#define P4DATA (UB *)0xa0EF1024
144#define P5DATA (UB *)0xa0EF1025
145#define P6DATA (UB *)0xa0EF1026
146#define P7DATA (UB *)0xa0EF1027
147
148#define P0DIR (UB *)0xa0EF1040 /* direction */
149#define P1DIR (UB *)0xa0EF1041
150#define P2DIR (UB *)0xa0EF1042
151#define P3DIR (UB *)0xa0EF1043
152#define P4DIR (UB *)0xa0EF1044
153#define P5DIR (UB *)0xa0EF1045
154#define P6DIR (UB *)0xa0EF1046
155#define P7DIR (UB *)0xa0EF1047
156
157#define P0MOD (US *)0xa0EF1060 /* mode control */
158#define P1MOD (US *)0xa0EF1062
159#define P2MOD (US *)0xa0EF1064
160#define P3MOD (US *)0xa0EF1066
161#define P4MOD (US *)0xa0EF1068
162#define P5MOD (US *)0xa0EF106A
163#define P6MOD (US *)0xa0EF106C
164#define P7MOD (US *)0xa0EF106E
165
166#define P0ODCR (UB *)0xa0EF1080 /* open-drain control */
167#define P1ODCR (UB *)0xa0EF1081
168#define P2ODCR (UB *)0xa0EF1082
169#define P3ODCR (UB *)0xa0EF1083
170#define P4ODCR (UB *)0xa0EF1084
171#define P5ODCR (UB *)0xa0EF1085
172#define P6ODCR (UB *)0xa0EF1086
173#define P7ODCR (UB *)0xa0EF1087
174
175/*********************************
176
177M32102 Cache
178
179********************************/
180
181#define MCCR (US *)0xFFFFFFFE
182
183
184#else /* __ASSEMBLY__ */
185
186;;
187;; PIO 0x80ef1000
188;;
189
190#define PIEN 0xa0ef1000
191
192#define P0DATA 0xa0ef1020
193#define P1DATA 0xa0ef1021
194#define P2DATA 0xa0ef1022
195#define P3DATA 0xa0ef1023
196#define P4DATA 0xa0ef1024
197#define P5DATA 0xa0ef1025
198#define P6DATA 0xa0ef1026
199#define P7DATA 0xa0ef1027
200
201#define P0DIR 0xa0ef1040
202#define P1DIR 0xa0ef1041
203#define P2DIR 0xa0ef1042
204#define P3DIR 0xa0ef1043
205#define P4DIR 0xa0ef1044
206#define P5DIR 0xa0ef1045
207#define P6DIR 0xa0ef1046
208#define P7DIR 0xa0ef1047
209
210#define P0MOD 0xa0ef1060
211#define P1MOD 0xa0ef1062
212#define P2MOD 0xa0ef1064
213#define P3MOD 0xa0ef1066
214#define P4MOD 0xa0ef1068
215#define P5MOD 0xa0ef106a
216#define P6MOD 0xa0ef106c
217#define P7MOD 0xa0ef106e
218;
219#define P0ODCR 0xa0ef1080
220#define P1ODCR 0xa0ef1081
221#define P2ODCR 0xa0ef1082
222#define P3ODCR 0xa0ef1083
223#define P4ODCR 0xa0ef1084
224#define P5ODCR 0xa0ef1085
225#define P6ODCR 0xa0ef1086
226#define P7ODCR 0xa0ef1087
227
228;;
229;; WDT 0xa0ef2000
230;;
231
232#define WDTCR 0xa0ef2000
233
234
235;;
236;; CLK 0xa0ef4000
237;;
238
239#define CPUCLKCR 0xa0ef4000
240#define CLKMOD 0xa0ef4004
241#define PLLCR 0xa0ef4008
242
243
244;;
245;; BSEL 0xa0ef5000
246;;
247
248#define BSEL0CR 0xa0ef5000
249#define BSEL1CR 0xa0ef5004
250#define BSEL2CR 0xa0ef5008
251#define BSEL3CR 0xa0ef500c
252#define BSEL4CR 0xa0ef5010
253#define BSEL5CR 0xa0ef5014
254
255
256;;
257;; SDRAMC 0xa0ef6000
258;;
259
260#define SDRF0 0xa0ef6000
261#define SDRF1 0xa0ef6004
262#define SDIR0 0xa0ef6008
263#define SDIR1 0xa0ef600c
264#define SDBR 0xa0ef6010
265
266;; CH0
267#define SD0ADR 0xa0ef6020
268#define SD0SZ 0xa0ef6022
269#define SD0ER 0xa0ef6024
270#define SD0TR 0xa0ef6028
271#define SD0MOD 0xa0ef602c
272
273;; CH1
274#define SD1ADR 0xa0ef6040
275#define SD1SZ 0xa0ef6042
276#define SD1ER 0xa0ef6044
277#define SD1TR 0xa0ef6048
278#define SD1MOD 0xa0ef604c
279
280
281;;
282;; DMAC 0xa0ef8000
283;;
284
285#define DMAEN 0xa0ef8000
286#define DMAISTS 0xa0ef8004
287#define DMAEDET 0xa0ef8008
288#define DMAASTS 0xa0ef800c
289
290;; CH0
291#define DMA0CR0 0xa0ef8100
292#define DMA0CR1 0xa0ef8104
293#define DMA0CSA 0xa0ef8108
294#define DMA0RSA 0xa0ef810c
295#define DMA0CDA 0xa0ef8110
296#define DMA0RDA 0xa0ef8114
297#define DMA0CBCUT 0xa0ef8118
298#define DMA0RBCUT 0xa0ef811c
299
300;; CH1
301#define DMA1CR0 0xa0ef8200
302#define DMA1CR1 0xa0ef8204
303#define DMA1CSA 0xa0ef8208
304#define DMA1RSA 0xa0ef820c
305#define DMA1CDA 0xa0ef8210
306#define DMA1RDA 0xa0ef8214
307#define DMA1CBCUT 0xa0ef8218
308#define DMA1RBCUT 0xa0ef821c
309
310
311;;
312;; MFT 0xa0efc000
313;;
314
315#define MFTCR 0xa0efc000
316#define MFTRPR 0xa0efc004
317
318;; CH0
319#define MFT0MOD 0xa0efc100
320#define MFT0BOS 0xa0efc104
321#define MFT0CUT 0xa0efc108
322#define MFT0RLD 0xa0efc10c
323#define MFT0CMPRLD 0xa0efc110
324
325;; CH1
326#define MFT1MOD 0xa0efc200
327#define MFT1BOS 0xa0efc204
328#define MFT1CUT 0xa0efc208
329#define MFT1RLD 0xa0efc20c
330#define MFT1CMPRLD 0xa0efc210
331
332;; CH2
333#define MFT2MOD 0xa0efc300
334#define MFT2BOS 0xa0efc304
335#define MFT2CUT 0xa0efc308
336#define MFT2RLD 0xa0efc30c
337#define MFT2CMPRLD 0xa0efc310
338
339;; CH3
340#define MFT3MOD 0xa0efc400
341#define MFT3BOS 0xa0efc404
342#define MFT3CUT 0xa0efc408
343#define MFT3RLD 0xa0efc40c
344#define MFT3CMPRLD 0xa0efc410
345
346;; CH4
347#define MFT4MOD 0xa0efc500
348#define MFT4BOS 0xa0efc504
349#define MFT4CUT 0xa0efc508
350#define MFT4RLD 0xa0efc50c
351#define MFT4CMPRLD 0xa0efc510
352
353;; CH5
354#define MFT5MOD 0xa0efc600
355#define MFT5BOS 0xa0efc604
356#define MFT5CUT 0xa0efc608
357#define MFT5RLD 0xa0efc60c
358#define MFT5CMPRLD 0xa0efc610
359
360
361;;
362;; SIO 0xa0efd000
363;;
364
365;; CH0
366#define SIO0CR 0xa0efd000
367#define SIO0MOD0 0xa0efd004
368#define SIO0MOD1 0xa0efd008
369#define SIO0STS 0xa0efd00c
370#define SIO0IMASK 0xa0efd010
371#define SIO0BAUR 0xa0efd014
372#define SIO0RBAUR 0xa0efd018
373#define SIO0TXB 0xa0efd01c
374#define SIO0RXB 0xa0efd020
375
376;; CH1
377#define SIO1CR 0xa0efd100
378#define SIO1MOD0 0xa0efd104
379#define SIO1MOD1 0xa0efd108
380#define SIO1STS 0xa0efd10c
381#define SIO1IMASK 0xa0efd110
382#define SIO1BAUR 0xa0efd114
383#define SIO1RBAUR 0xa0efd118
384#define SIO1TXB 0xa0efd11c
385#define SIO1RXB 0xa0efd120
386
387;; CH2
388#define SIO2CR 0xa0efd200
389#define SIO2MOD0 0xa0efd204
390#define SIO2MOD1 0xa0efd208
391#define SIO2STS 0xa0efd20c
392#define SIO2IMASK 0xa0efd210
393#define SIO2BAUR 0xa0efd214
394#define SIO2RBAUR 0xa0efd218
395#define SIO2TXB 0xa0efd21c
396#define SIO2RXB 0xa0efd220
397
398;; CH3
399#define SIO3CR 0xa0efd300
400#define SIO3MOD0 0xa0efd304
401#define SIO3MOD1 0xa0efd308
402#define SIO3STS 0xa0efd30c
403#define SIO3IMASK 0xa0efd310
404#define SIO3BAUR 0xa0efd314
405#define SIO3RBAUR 0xa0efd318
406#define SIO3TXB 0xa0efd31c
407#define SIO3RXB 0xa0efd320
408
409;; CH4
410#define SIO4CR 0xa0efd400
411#define SIO4MOD0 0xa0efd404
412#define SIO4MOD1 0xa0efd408
413#define SIO4STS 0xa0efd40c
414#define SIO4IMASK 0xa0efd410
415#define SIO4BAUR 0xa0efd414
416#define SIO4RBAUR 0xa0efd418
417#define SIO4TXB 0xa0efd41c
418#define SIO4RXB 0xa0efd420
419
420
421;;
422;; ICU 0xa0eff000
423;;
424
425#define ICUISTS 0xa0eff004
426#define ICUIREQ0 0xa0eff008
427#define ICUIREQ1 0xa0eff00c
428
429#define ICUSBICR 0xa0eff018
430#define ICUIMASK 0xa0eff01c
431
432#define ICUCR1 0xa0eff200
433#define ICUCR2 0xa0eff204
434#define ICUCR3 0xa0eff208
435#define ICUCR4 0xa0eff20c
436#define ICUCR5 0xa0eff210
437#define ICUCR6 0xa0eff214
438#define ICUCR7 0xa0eff218
439
440#define ICUCR16 0xa0eff23c
441#define ICUCR17 0xa0eff240
442#define ICUCR18 0xa0eff244
443#define ICUCR19 0xa0eff248
444#define ICUCR20 0xa0eff24c
445#define ICUCR21 0xa0eff250
446
447#define ICUCR32 0xa0eff27c
448#define ICUCR33 0xa0eff280
449
450#define ICUCR48 0xa0eff2bc
451#define ICUCR49 0xa0eff2c0
452#define ICUCR50 0xa0eff2c4
453#define ICUCR51 0xa0eff2c8
454#define ICUCR52 0xa0eff2cc
455#define ICUCR53 0xa0eff2d0
456#define ICUCR54 0xa0eff2d4
457#define ICUCR55 0xa0eff2d8
458#define ICUCR56 0xa0eff2dc
459#define ICUCR57 0xa0eff2e0
460
461;;
462;; CACHE
463;;
464
465#define MCCR 0xfffffffc
466
467
468#endif /* __ASSEMBLY__ */
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h
index f116649bbef3..ec142be00862 100644
--- a/include/asm-m32r/m32r.h
+++ b/include/asm-m32r/m32r.h
@@ -16,7 +16,6 @@
16 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ 16 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
17 || defined(CONFIG_CHIP_OPSP) 17 || defined(CONFIG_CHIP_OPSP)
18#include <asm/m32102.h> 18#include <asm/m32102.h>
19#include <asm/m32102peri.h>
20#endif 19#endif
21 20
22/* Platform type */ 21/* Platform type */
@@ -36,6 +35,10 @@
36#include <asm/mappi2/mappi2_pld.h> 35#include <asm/mappi2/mappi2_pld.h>
37#endif /* CONFIG_PLAT_MAPPI2 */ 36#endif /* CONFIG_PLAT_MAPPI2 */
38 37
38#if defined(CONFIG_PLAT_MAPPI3)
39#include <asm/mappi3/mappi3_pld.h>
40#endif /* CONFIG_PLAT_MAPPI3 */
41
39#if defined(CONFIG_PLAT_USRV) 42#if defined(CONFIG_PLAT_USRV)
40#include <asm/m32700ut/m32700ut_pld.h> 43#include <asm/m32700ut/m32700ut_pld.h>
41#endif 44#endif
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h
new file mode 100644
index 000000000000..3f1551f7f01f
--- /dev/null
+++ b/include/asm-m32r/mappi3/mappi3_pld.h
@@ -0,0 +1,143 @@
1/*
2 * include/asm/mappi3/mappi3_pld.h
3 *
4 * Definitions for Extended IO Logic on MAPPI3 board.
5 * based on m32700ut_pld.h
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file "COPYING" in the main directory of
9 * this archive for more details.
10 *
11 */
12
13#ifndef _MAPPI3_PLD_H
14#define _MAPPI3_PLD_H
15
16#ifndef __ASSEMBLY__
17/* FIXME:
18 * Some C functions use non-cache address, so can't define non-cache address.
19 */
20#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
21#define __reg8 (volatile unsigned char *)
22#define __reg16 (volatile unsigned short *)
23#define __reg32 (volatile unsigned int *)
24#else
25#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
26#define __reg8
27#define __reg16
28#define __reg32
29#endif /* __ASSEMBLY__ */
30
31/* CFC */
32#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
33#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
34#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
35#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
36#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
37#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
38
39/* MMC */
40#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
41#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
42#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
43#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
44#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
45#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
46#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
47#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
48#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
49#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
50#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
51#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
52
53/* Power Control of MMC and CF */
54#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
55
56
57/*==== ICU ====*/
58#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
59#define M32R_IRQ_I2C (28) /* I2C-BUS */
60#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
61#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */
62#define PLD_IRQ_CFC_EJECT (8) /* INT7 CFC Card Eject */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65
66
67#if 0
68/* LED Control
69 *
70 * 1: DIP swich side
71 * 2: Reset switch side
72 */
73#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
74#define PLD_IOLED_1_ON 0x001
75#define PLD_IOLED_1_OFF 0x000
76#define PLD_IOLED_2_ON 0x002
77#define PLD_IOLED_2_OFF 0x000
78
79/* DIP Switch
80 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
81 * 1: -
82 * 2: -
83 * 3: -
84 */
85#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
86#define PLD_IOSWSTS_IOSW2 0x0200
87#define PLD_IOSWSTS_IOSW1 0x0100
88#define PLD_IOSWSTS_IOWP0 0x0001
89
90#endif
91
92/* CRC */
93#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
94#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
95#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
96#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
97#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
98#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
99
100
101#if 0
102/* RTC */
103#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
104#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
105#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
106#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
107#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
108
109/* SIO0 */
110#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
111#define PLD_ESIO0CR_TXEN 0x0001
112#define PLD_ESIO0CR_RXEN 0x0002
113#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
114#define PLD_ESIO0MOD0_CTSS 0x0040
115#define PLD_ESIO0MOD0_RTSS 0x0080
116#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
117#define PLD_ESIO0MOD1_LMFS 0x0010
118#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
119#define PLD_ESIO0STS_TEMP 0x0001
120#define PLD_ESIO0STS_TXCP 0x0002
121#define PLD_ESIO0STS_RXCP 0x0004
122#define PLD_ESIO0STS_TXSC 0x0100
123#define PLD_ESIO0STS_RXSC 0x0200
124#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
125#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
126#define PLD_ESIO0INTCR_TXIEN 0x0002
127#define PLD_ESIO0INTCR_RXCEN 0x0004
128#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
129#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
130#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
131
132/* SIM Card */
133#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
134#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
135#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
136#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
137#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
138#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
139#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
140
141#endif
142
143#endif /* _MAPPI3_PLD.H */
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h
index 8cd4d0da4be1..b9a20cdad65f 100644
--- a/include/asm-m32r/smp.h
+++ b/include/asm-m32r/smp.h
@@ -66,7 +66,7 @@ extern volatile int cpu_2_physid[NR_CPUS];
66#define physid_to_cpu(physid) physid_2_cpu[physid] 66#define physid_to_cpu(physid) physid_2_cpu[physid]
67#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id] 67#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
68 68
69#define smp_processor_id() (current_thread_info()->cpu) 69#define raw_smp_processor_id() (current_thread_info()->cpu)
70 70
71extern cpumask_t cpu_callout_map; 71extern cpumask_t cpu_callout_map;
72#define cpu_possible_map cpu_callout_map 72#define cpu_possible_map cpu_callout_map
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 8ba370ecfd4c..5618f1e12f40 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -21,7 +21,7 @@
21#include <linux/cpumask.h> 21#include <linux/cpumask.h>
22#include <asm/atomic.h> 22#include <asm/atomic.h>
23 23
24#define smp_processor_id() (current_thread_info()->cpu) 24#define raw_smp_processor_id() (current_thread_info()->cpu)
25 25
26/* Map from cpu id to sequential logical cpu number. This will only 26/* Map from cpu id to sequential logical cpu number. This will only
27 not be idempotent when cpus failed to come on-line. */ 27 not be idempotent when cpus failed to come on-line. */
diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h
new file mode 100644
index 000000000000..8590885a7638
--- /dev/null
+++ b/include/asm-mips/vr41xx/giu.h
@@ -0,0 +1,69 @@
1/*
2 * Include file for NEC VR4100 series General-purpose I/O Unit.
3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __NEC_VR41XX_GIU_H
21#define __NEC_VR41XX_GIU_H
22
23typedef enum {
24 IRQ_TRIGGER_LEVEL,
25 IRQ_TRIGGER_EDGE,
26 IRQ_TRIGGER_EDGE_FALLING,
27 IRQ_TRIGGER_EDGE_RISING,
28} irq_trigger_t;
29
30typedef enum {
31 IRQ_SIGNAL_THROUGH,
32 IRQ_SIGNAL_HOLD,
33} irq_signal_t;
34
35extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
36
37typedef enum {
38 IRQ_LEVEL_LOW,
39 IRQ_LEVEL_HIGH,
40} irq_level_t;
41
42extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
43
44typedef enum {
45 GPIO_DATA_LOW,
46 GPIO_DATA_HIGH,
47 GPIO_DATA_INVAL,
48} gpio_data_t;
49
50extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
51extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
52
53typedef enum {
54 GPIO_INPUT,
55 GPIO_OUTPUT,
56 GPIO_OUTPUT_DISABLE,
57} gpio_direction_t;
58
59extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
60
61typedef enum {
62 GPIO_PULL_DOWN,
63 GPIO_PULL_UP,
64 GPIO_PULL_DISABLE,
65} gpio_pull_t;
66
67extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
68
69#endif /* __NEC_VR41XX_GIU_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index ad0d1ea144f0..7d41e44463f9 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -126,7 +126,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
126#define GIU_IRQ_BASE 40 126#define GIU_IRQ_BASE 40
127#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ 127#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
128#define GIU_IRQ_LAST GIU_IRQ(31) 128#define GIU_IRQ_LAST GIU_IRQ(31)
129#define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */
130 129
131extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); 130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
132extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); 131extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
@@ -197,38 +196,4 @@ extern void vr41xx_disable_csiint(uint16_t mask);
197extern void vr41xx_enable_bcuint(void); 196extern void vr41xx_enable_bcuint(void);
198extern void vr41xx_disable_bcuint(void); 197extern void vr41xx_disable_bcuint(void);
199 198
200/*
201 * General-Purpose I/O Unit
202 */
203enum {
204 TRIGGER_LEVEL,
205 TRIGGER_EDGE,
206 TRIGGER_EDGE_FALLING,
207 TRIGGER_EDGE_RISING
208};
209
210enum {
211 SIGNAL_THROUGH,
212 SIGNAL_HOLD
213};
214
215extern void vr41xx_set_irq_trigger(int pin, int trigger, int hold);
216
217enum {
218 LEVEL_LOW,
219 LEVEL_HIGH
220};
221
222extern void vr41xx_set_irq_level(int pin, int level);
223
224enum {
225 PIO_INPUT,
226 PIO_OUTPUT
227};
228
229enum {
230 DATA_LOW,
231 DATA_HIGH
232};
233
234#endif /* __NEC_VR41XX_H */ 199#endif /* __NEC_VR41XX_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index fde77ac35463..9413f67a540b 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -51,7 +51,7 @@ extern void smp_send_reschedule(int cpu);
51 51
52extern unsigned long cpu_present_mask; 52extern unsigned long cpu_present_mask;
53 53
54#define smp_processor_id() (current_thread_info()->cpu) 54#define raw_smp_processor_id() (current_thread_info()->cpu)
55 55
56#endif /* CONFIG_SMP */ 56#endif /* CONFIG_SMP */
57 57
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index 06b86be61ed1..a9b33324f562 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -176,7 +176,7 @@ static __inline__ int irq_canonicalize(int irq)
176*/ 176*/
177#include <asm/mpc85xx.h> 177#include <asm/mpc85xx.h>
178 178
179/* The MPC8560 openpic has 32 internal interrupts and 12 external 179/* The MPC8548 openpic has 48 internal interrupts and 12 external
180 * interrupts. 180 * interrupts.
181 * 181 *
182 * We are "flattening" the interrupt vectors of the cascaded CPM 182 * We are "flattening" the interrupt vectors of the cascaded CPM
@@ -184,7 +184,7 @@ static __inline__ int irq_canonicalize(int irq)
184 * single integer. 184 * single integer.
185 */ 185 */
186#define NR_CPM_INTS 64 186#define NR_CPM_INTS 64
187#define NR_EPIC_INTS 44 187#define NR_EPIC_INTS 60
188#ifndef NR_8259_INTS 188#ifndef NR_8259_INTS
189#define NR_8259_INTS 0 189#define NR_8259_INTS 0
190#endif 190#endif
@@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(int irq)
223#define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET) 223#define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET)
224#define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET) 224#define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET)
225#define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET) 225#define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET)
226#define MPC85xx_IRQ_TSEC3_TX (15 + MPC85xx_OPENPIC_IRQ_OFFSET)
227#define MPC85xx_IRQ_TSEC3_RX (16 + MPC85xx_OPENPIC_IRQ_OFFSET)
228#define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET)
226#define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET) 229#define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET)
227#define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET) 230#define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET)
228#define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET) 231#define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET)
232#define MPC85xx_IRQ_TSEC4_TX (21 + MPC85xx_OPENPIC_IRQ_OFFSET)
233#define MPC85xx_IRQ_TSEC4_RX (22 + MPC85xx_OPENPIC_IRQ_OFFSET)
234#define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET)
229#define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET) 235#define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET)
230#define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET) 236#define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET)
231#define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) 237#define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
@@ -235,18 +241,18 @@ static __inline__ int irq_canonicalize(int irq)
235#define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET) 241#define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
236 242
237/* The 12 external interrupt lines */ 243/* The 12 external interrupt lines */
238#define MPC85xx_IRQ_EXT0 (32 + MPC85xx_OPENPIC_IRQ_OFFSET) 244#define MPC85xx_IRQ_EXT0 (48 + MPC85xx_OPENPIC_IRQ_OFFSET)
239#define MPC85xx_IRQ_EXT1 (33 + MPC85xx_OPENPIC_IRQ_OFFSET) 245#define MPC85xx_IRQ_EXT1 (49 + MPC85xx_OPENPIC_IRQ_OFFSET)
240#define MPC85xx_IRQ_EXT2 (34 + MPC85xx_OPENPIC_IRQ_OFFSET) 246#define MPC85xx_IRQ_EXT2 (50 + MPC85xx_OPENPIC_IRQ_OFFSET)
241#define MPC85xx_IRQ_EXT3 (35 + MPC85xx_OPENPIC_IRQ_OFFSET) 247#define MPC85xx_IRQ_EXT3 (51 + MPC85xx_OPENPIC_IRQ_OFFSET)
242#define MPC85xx_IRQ_EXT4 (36 + MPC85xx_OPENPIC_IRQ_OFFSET) 248#define MPC85xx_IRQ_EXT4 (52 + MPC85xx_OPENPIC_IRQ_OFFSET)
243#define MPC85xx_IRQ_EXT5 (37 + MPC85xx_OPENPIC_IRQ_OFFSET) 249#define MPC85xx_IRQ_EXT5 (53 + MPC85xx_OPENPIC_IRQ_OFFSET)
244#define MPC85xx_IRQ_EXT6 (38 + MPC85xx_OPENPIC_IRQ_OFFSET) 250#define MPC85xx_IRQ_EXT6 (54 + MPC85xx_OPENPIC_IRQ_OFFSET)
245#define MPC85xx_IRQ_EXT7 (39 + MPC85xx_OPENPIC_IRQ_OFFSET) 251#define MPC85xx_IRQ_EXT7 (55 + MPC85xx_OPENPIC_IRQ_OFFSET)
246#define MPC85xx_IRQ_EXT8 (40 + MPC85xx_OPENPIC_IRQ_OFFSET) 252#define MPC85xx_IRQ_EXT8 (56 + MPC85xx_OPENPIC_IRQ_OFFSET)
247#define MPC85xx_IRQ_EXT9 (41 + MPC85xx_OPENPIC_IRQ_OFFSET) 253#define MPC85xx_IRQ_EXT9 (57 + MPC85xx_OPENPIC_IRQ_OFFSET)
248#define MPC85xx_IRQ_EXT10 (42 + MPC85xx_OPENPIC_IRQ_OFFSET) 254#define MPC85xx_IRQ_EXT10 (58 + MPC85xx_OPENPIC_IRQ_OFFSET)
249#define MPC85xx_IRQ_EXT11 (43 + MPC85xx_OPENPIC_IRQ_OFFSET) 255#define MPC85xx_IRQ_EXT11 (59 + MPC85xx_OPENPIC_IRQ_OFFSET)
250 256
251/* CPM related interrupts */ 257/* CPM related interrupts */
252#define SIU_INT_ERROR ((uint)0x00+CPM_IRQ_OFFSET) 258#define SIU_INT_ERROR ((uint)0x00+CPM_IRQ_OFFSET)
diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
index d8e7e2d6128e..f5196a4efbe0 100644
--- a/include/asm-ppc/mpc10x.h
+++ b/include/asm-ppc/mpc10x.h
@@ -159,6 +159,12 @@ extern unsigned long ioremap_base;
159#define MPC10X_MAPA_EUMB_BASE (ioremap_base - MPC10X_EUMB_SIZE) 159#define MPC10X_MAPA_EUMB_BASE (ioremap_base - MPC10X_EUMB_SIZE)
160#define MPC10X_MAPB_EUMB_BASE MPC10X_MAPA_EUMB_BASE 160#define MPC10X_MAPB_EUMB_BASE MPC10X_MAPA_EUMB_BASE
161 161
162enum ppc_sys_devices {
163 MPC10X_IIC1,
164 MPC10X_DMA0,
165 MPC10X_DMA1,
166 MPC10X_DUART,
167};
162 168
163int mpc10x_bridge_init(struct pci_controller *hose, 169int mpc10x_bridge_init(struct pci_controller *hose,
164 uint current_map, 170 uint current_map,
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 22713e331585..516984ee14b5 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -25,7 +25,7 @@
25#ifdef CONFIG_MPC8540_ADS 25#ifdef CONFIG_MPC8540_ADS
26#include <platforms/85xx/mpc8540_ads.h> 26#include <platforms/85xx/mpc8540_ads.h>
27#endif 27#endif
28#ifdef CONFIG_MPC8555_CDS 28#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
29#include <platforms/85xx/mpc8555_cds.h> 29#include <platforms/85xx/mpc8555_cds.h>
30#endif 30#endif
31#ifdef CONFIG_MPC8560_ADS 31#ifdef CONFIG_MPC8560_ADS
@@ -74,7 +74,7 @@ extern unsigned char __res[];
74#define MPC85xx_GUTS_OFFSET (0xe0000) 74#define MPC85xx_GUTS_OFFSET (0xe0000)
75#define MPC85xx_GUTS_SIZE (0x01000) 75#define MPC85xx_GUTS_SIZE (0x01000)
76#define MPC85xx_IIC1_OFFSET (0x03000) 76#define MPC85xx_IIC1_OFFSET (0x03000)
77#define MPC85xx_IIC1_SIZE (0x01000) 77#define MPC85xx_IIC1_SIZE (0x00100)
78#define MPC85xx_OPENPIC_OFFSET (0x40000) 78#define MPC85xx_OPENPIC_OFFSET (0x40000)
79#define MPC85xx_OPENPIC_SIZE (0x40000) 79#define MPC85xx_OPENPIC_SIZE (0x40000)
80#define MPC85xx_PCI1_OFFSET (0x08000) 80#define MPC85xx_PCI1_OFFSET (0x08000)
@@ -127,8 +127,64 @@ enum ppc_sys_devices {
127 MPC85xx_CPM_MCC2, 127 MPC85xx_CPM_MCC2,
128 MPC85xx_CPM_SMC1, 128 MPC85xx_CPM_SMC1,
129 MPC85xx_CPM_SMC2, 129 MPC85xx_CPM_SMC2,
130 MPC85xx_eTSEC1,
131 MPC85xx_eTSEC2,
132 MPC85xx_eTSEC3,
133 MPC85xx_eTSEC4,
134 MPC85xx_IIC2,
130}; 135};
131 136
137/* Internal interrupts are all Level Sensitive, and Positive Polarity */
138#define MPC85XX_INTERNAL_IRQ_SENSES \
139 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0 */ \
140 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1 */ \
141 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2 */ \
142 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3 */ \
143 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4 */ \
144 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5 */ \
145 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6 */ \
146 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7 */ \
147 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8 */ \
148 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9 */ \
149 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10 */ \
150 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11 */ \
151 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12 */ \
152 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13 */ \
153 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14 */ \
154 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15 */ \
155 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16 */ \
156 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17 */ \
157 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18 */ \
158 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19 */ \
159 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20 */ \
160 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21 */ \
161 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22 */ \
162 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23 */ \
163 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24 */ \
164 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25 */ \
165 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26 */ \
166 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27 */ \
167 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28 */ \
168 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29 */ \
169 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30 */ \
170 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31 */ \
171 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32 */ \
172 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33 */ \
173 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34 */ \
174 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35 */ \
175 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36 */ \
176 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37 */ \
177 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38 */ \
178 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39 */ \
179 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40 */ \
180 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41 */ \
181 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42 */ \
182 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43 */ \
183 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44 */ \
184 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45 */ \
185 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46 */ \
186 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE) /* Internal 47 */
187
132#endif /* CONFIG_85xx */ 188#endif /* CONFIG_85xx */
133#endif /* __ASM_MPC85xx_H__ */ 189#endif /* __ASM_MPC85xx_H__ */
134#endif /* __KERNEL__ */ 190#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index a38606d15549..4d4b20c9de78 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -267,8 +267,6 @@ extern unsigned long ioremap_bot, ioremap_base;
267#define _PMD_PRESENT_MASK (PAGE_MASK) 267#define _PMD_PRESENT_MASK (PAGE_MASK)
268#define _PMD_BAD (~PAGE_MASK) 268#define _PMD_BAD (~PAGE_MASK)
269 269
270#define NUM_TLBCAMS (16)
271
272#elif defined(CONFIG_8xx) 270#elif defined(CONFIG_8xx)
273/* Definitions for 8xx embedded chips. */ 271/* Definitions for 8xx embedded chips. */
274#define _PAGE_PRESENT 0x0001 /* Page is valid */ 272#define _PAGE_PRESENT 0x0001 /* Page is valid */
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 24b991c42769..8ea624566231 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -27,6 +27,8 @@
27#include <asm/mpc85xx.h> 27#include <asm/mpc85xx.h>
28#elif defined(CONFIG_PPC_MPC52xx) 28#elif defined(CONFIG_PPC_MPC52xx)
29#include <asm/mpc52xx.h> 29#include <asm/mpc52xx.h>
30#elif defined(CONFIG_MPC10X_BRIDGE)
31#include <asm/mpc10x.h>
30#else 32#else
31#error "need definition of ppc_sys_devices" 33#error "need definition of ppc_sys_devices"
32#endif 34#endif
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
index ebfb614f55f6..17530c232c76 100644
--- a/include/asm-ppc/smp.h
+++ b/include/asm-ppc/smp.h
@@ -44,7 +44,7 @@ extern void smp_message_recv(int, struct pt_regs *);
44#define NO_PROC_ID 0xFF /* No processor magic marker */ 44#define NO_PROC_ID 0xFF /* No processor magic marker */
45#define PROC_CHANGE_PENALTY 20 45#define PROC_CHANGE_PENALTY 20
46 46
47#define smp_processor_id() (current_thread_info()->cpu) 47#define raw_smp_processor_id() (current_thread_info()->cpu)
48 48
49extern int __cpu_up(unsigned int cpu); 49extern int __cpu_up(unsigned int cpu);
50 50
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h
index d693b8026bc3..dfd1f69059ba 100644
--- a/include/asm-ppc64/dma.h
+++ b/include/asm-ppc64/dma.h
@@ -27,6 +27,8 @@
27/* Doesn't really apply... */ 27/* Doesn't really apply... */
28#define MAX_DMA_ADDRESS (~0UL) 28#define MAX_DMA_ADDRESS (~0UL)
29 29
30#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
31
30#define dma_outb outb 32#define dma_outb outb
31#define dma_inb inb 33#define dma_inb inb
32 34
@@ -323,4 +325,5 @@ extern int isa_dma_bridge_buggy;
323#else 325#else
324#define isa_dma_bridge_buggy (0) 326#define isa_dma_bridge_buggy (0)
325#endif 327#endif
328#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
326#endif /* _ASM_DMA_H */ 329#endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-ppc64/iSeries/HvCall.h
index d9a2e74e2399..c3f19475c0d9 100644
--- a/include/asm-ppc64/iSeries/HvCall.h
+++ b/include/asm-ppc64/iSeries/HvCall.h
@@ -1,84 +1,36 @@
1/* 1/*
2 * HvCall.h 2 * HvCall.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19/*
20//=========================================================================== 20 * This file contains the "hypervisor call" interface which is used to
21// 21 * drive the hypervisor from the OS.
22// This file contains the "hypervisor call" interface which is used to 22 */
23// drive the hypervisor from the OS.
24//
25//===========================================================================
26#ifndef _HVCALL_H 23#ifndef _HVCALL_H
27#define _HVCALL_H 24#define _HVCALL_H
28 25
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h> 26#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
34#include <asm/paca.h> 28#include <asm/paca.h>
35 29
36/*
37enum HvCall_ReturnCode
38{
39 HvCall_Good = 0,
40 HvCall_Partial = 1,
41 HvCall_NotOwned = 2,
42 HvCall_NotFreed = 3,
43 HvCall_UnspecifiedError = 4
44};
45
46enum HvCall_TypeOfSIT
47{
48 HvCall_ReduceOnly = 0,
49 HvCall_Unconditional = 1
50};
51
52enum HvCall_TypeOfYield
53{
54 HvCall_YieldTimed = 0, // Yield until specified time
55 HvCall_YieldToActive = 1, // Yield until all active procs have run
56 HvCall_YieldToProc = 2 // Yield until the specified processor has run
57};
58
59enum HvCall_InterruptMasks
60{
61 HvCall_MaskIPI = 0x00000001,
62 HvCall_MaskLpEvent = 0x00000002,
63 HvCall_MaskLpProd = 0x00000004,
64 HvCall_MaskTimeout = 0x00000008
65};
66
67enum HvCall_VaryOffChunkRc
68{
69 HvCall_VaryOffSucceeded = 0,
70 HvCall_VaryOffWithdrawn = 1,
71 HvCall_ChunkInLoadArea = 2,
72 HvCall_ChunkInHPT = 3,
73 HvCall_ChunkNotAccessible = 4,
74 HvCall_ChunkInUse = 5
75};
76*/
77
78/* Type of yield for HvCallBaseYieldProcessor */ 30/* Type of yield for HvCallBaseYieldProcessor */
79#define HvCall_YieldTimed 0 // Yield until specified time (tb) 31#define HvCall_YieldTimed 0 /* Yield until specified time (tb) */
80#define HvCall_YieldToActive 1 // Yield until all active procs have run 32#define HvCall_YieldToActive 1 /* Yield until all active procs have run */
81#define HvCall_YieldToProc 2 // Yield until the specified processor has run 33#define HvCall_YieldToProc 2 /* Yield until the specified processor has run */
82 34
83/* interrupt masks for setEnabledInterrupts */ 35/* interrupt masks for setEnabledInterrupts */
84#define HvCall_MaskIPI 0x00000001 36#define HvCall_MaskIPI 0x00000001
@@ -86,7 +38,7 @@ enum HvCall_VaryOffChunkRc
86#define HvCall_MaskLpProd 0x00000004 38#define HvCall_MaskLpProd 0x00000004
87#define HvCall_MaskTimeout 0x00000008 39#define HvCall_MaskTimeout 0x00000008
88 40
89/* Log buffer formats */ 41/* Log buffer formats */
90#define HvCall_LogBuffer_ASCII 0 42#define HvCall_LogBuffer_ASCII 0
91#define HvCall_LogBuffer_EBCDIC 1 43#define HvCall_LogBuffer_EBCDIC 1
92 44
@@ -95,7 +47,7 @@ enum HvCall_VaryOffChunkRc
95#define HvCallBaseGetHwPatch HvCallBase + 2 47#define HvCallBaseGetHwPatch HvCallBase + 2
96#define HvCallBaseReIplSpAttn HvCallBase + 3 48#define HvCallBaseReIplSpAttn HvCallBase + 3
97#define HvCallBaseSetASR HvCallBase + 4 49#define HvCallBaseSetASR HvCallBase + 4
98#define HvCallBaseSetASRAndRfi HvCallBase + 5 50#define HvCallBaseSetASRAndRfi HvCallBase + 5
99#define HvCallBaseSetIMR HvCallBase + 6 51#define HvCallBaseSetIMR HvCallBase + 6
100#define HvCallBaseSendIPI HvCallBase + 7 52#define HvCallBaseSendIPI HvCallBase + 7
101#define HvCallBaseTerminateMachine HvCallBase + 8 53#define HvCallBaseTerminateMachine HvCallBase + 8
@@ -115,91 +67,47 @@ enum HvCall_VaryOffChunkRc
115#define HvCallBaseGetLogBufferCodePage HvCallBase + 22 67#define HvCallBaseGetLogBufferCodePage HvCallBase + 22
116#define HvCallBaseGetLogBufferFormat HvCallBase + 23 68#define HvCallBaseGetLogBufferFormat HvCallBase + 23
117#define HvCallBaseGetLogBufferLength HvCallBase + 24 69#define HvCallBaseGetLogBufferLength HvCallBase + 24
118#define HvCallBaseReadLogBuffer HvCallBase + 25 70#define HvCallBaseReadLogBuffer HvCallBase + 25
119#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26 71#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26
120#define HvCallBaseWriteLogBuffer HvCallBase + 27 72#define HvCallBaseWriteLogBuffer HvCallBase + 27
121#define HvCallBaseRouter28 HvCallBase + 28 73#define HvCallBaseRouter28 HvCallBase + 28
122#define HvCallBaseRouter29 HvCallBase + 29 74#define HvCallBaseRouter29 HvCallBase + 29
123#define HvCallBaseRouter30 HvCallBase + 30 75#define HvCallBaseRouter30 HvCallBase + 30
124#define HvCallBaseSetDebugBus HvCallBase + 31 76#define HvCallBaseSetDebugBus HvCallBase + 31
125 77
126#define HvCallCcSetDABR HvCallCc + 7 78#define HvCallCcSetDABR HvCallCc + 7
127 79
128//===================================================================================== 80static inline void HvCall_setVirtualDecr(void)
129static inline void HvCall_setVirtualDecr(void)
130{ 81{
131 /* Ignore any error return codes - most likely means that the target value for the 82 /*
132 * LP has been increased and this vary off would bring us below the new target. */ 83 * Ignore any error return codes - most likely means that the
84 * target value for the LP has been increased and this vary off
85 * would bring us below the new target.
86 */
133 HvCall0(HvCallBaseSetVirtualDecr); 87 HvCall0(HvCallBaseSetVirtualDecr);
134} 88}
135//=====================================================================
136static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
137{
138 HvCall2( HvCallBaseYieldProcessor, typeOfYield, yieldParm );
139}
140//=====================================================================
141static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
142{
143 HvCall1(HvCallBaseSetEnabledInterrupts,enabledInterrupts);
144}
145
146//=====================================================================
147static inline void HvCall_clearLogBuffer(HvLpIndex lpindex)
148{
149 HvCall1(HvCallBaseClearLogBuffer,lpindex);
150}
151
152//=====================================================================
153static inline u32 HvCall_getLogBufferCodePage(HvLpIndex lpindex)
154{
155 u32 retVal = HvCall1(HvCallBaseGetLogBufferCodePage,lpindex);
156 return retVal;
157}
158
159//=====================================================================
160static inline int HvCall_getLogBufferFormat(HvLpIndex lpindex)
161{
162 int retVal = HvCall1(HvCallBaseGetLogBufferFormat,lpindex);
163 return retVal;
164}
165
166//=====================================================================
167static inline u32 HvCall_getLogBufferLength(HvLpIndex lpindex)
168{
169 u32 retVal = HvCall1(HvCallBaseGetLogBufferLength,lpindex);
170 return retVal;
171}
172 89
173//===================================================================== 90static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
174static inline void HvCall_setLogBufferFormatAndCodepage(int format, u32 codePage)
175{ 91{
176 HvCall2(HvCallBaseSetLogBufferFormatAndCodePage,format, codePage); 92 HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm);
177} 93}
178 94
179//===================================================================== 95static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
180int HvCall_readLogBuffer(HvLpIndex lpindex, void *buffer, u64 bufLen);
181void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
182
183//=====================================================================
184static inline void HvCall_sendIPI(struct paca_struct * targetPaca)
185{ 96{
186 HvCall1( HvCallBaseSendIPI, targetPaca->paca_index ); 97 HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts);
187} 98}
188 99
189//===================================================================== 100static inline void HvCall_setLogBufferFormatAndCodepage(int format,
190static inline void HvCall_terminateMachineSrc(void) 101 u32 codePage)
191{ 102{
192 HvCall0( HvCallBaseTerminateMachineSrc ); 103 HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage);
193} 104}
194 105
195static inline void HvCall_setDABR(unsigned long val) 106extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
196{
197 HvCall1(HvCallCcSetDABR, val);
198}
199 107
200static inline void HvCall_setDebugBus(unsigned long val) 108static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
201{ 109{
202 HvCall1(HvCallBaseSetDebugBus, val); 110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
203} 111}
204 112
205#endif /* _HVCALL_H */ 113#endif /* _HVCALL_H */
diff --git a/include/asm-ppc64/iSeries/HvCallCfg.h b/include/asm-ppc64/iSeries/HvCallCfg.h
deleted file mode 100644
index 9f40f16de533..000000000000
--- a/include/asm-ppc64/iSeries/HvCallCfg.h
+++ /dev/null
@@ -1,213 +0,0 @@
1/*
2 * HvCallCfg.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20//=====================================================================================
21//
22// This file contains the "hypervisor call" interface which is used to
23// drive the hypervisor from the OS.
24//
25//=====================================================================================
26#ifndef _HVCALLCFG_H
27#define _HVCALLCFG_H
28
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h>
34
35//-------------------------------------------------------------------------------------
36// Constants
37//-------------------------------------------------------------------------------------
38
39enum HvCallCfg_ReqQual
40{
41 HvCallCfg_Cur = 0,
42 HvCallCfg_Init = 1,
43 HvCallCfg_Max = 2,
44 HvCallCfg_Min = 3
45};
46
47#define HvCallCfgGetLps HvCallCfg + 0
48#define HvCallCfgGetActiveLpMap HvCallCfg + 1
49#define HvCallCfgGetLpVrmIndex HvCallCfg + 2
50#define HvCallCfgGetLpMinSupportedPlicVrmIndex HvCallCfg + 3
51#define HvCallCfgGetLpMinCompatablePlicVrmIndex HvCallCfg + 4
52#define HvCallCfgGetLpVrmName HvCallCfg + 5
53#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
54#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
55#define HvCallCfgGetSystemMsChunks HvCallCfg + 8
56#define HvCallCfgGetMsChunks HvCallCfg + 9
57#define HvCallCfgGetInteractivePercentage HvCallCfg + 10
58#define HvCallCfgIsBusDedicated HvCallCfg + 11
59#define HvCallCfgGetBusOwner HvCallCfg + 12
60#define HvCallCfgGetBusAllocation HvCallCfg + 13
61#define HvCallCfgGetBusUnitOwner HvCallCfg + 14
62#define HvCallCfgGetBusUnitAllocation HvCallCfg + 15
63#define HvCallCfgGetVirtualBusPool HvCallCfg + 16
64#define HvCallCfgGetBusUnitInterruptProc HvCallCfg + 17
65#define HvCallCfgGetConfiguredBusUnitsForIntProc HvCallCfg + 18
66#define HvCallCfgGetRioSanBusPool HvCallCfg + 19
67#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
68#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
69#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
70#define HvCallCfgRouter23 HvCallCfg + 23
71#define HvCallCfgRouter24 HvCallCfg + 24
72#define HvCallCfgRouter25 HvCallCfg + 25
73#define HvCallCfgRouter26 HvCallCfg + 26
74#define HvCallCfgRouter27 HvCallCfg + 27
75#define HvCallCfgGetMinRuntimeMsChunks HvCallCfg + 28
76#define HvCallCfgSetMinRuntimeMsChunks HvCallCfg + 29
77#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
78#define HvCallCfgGetLpExecutionMode HvCallCfg + 31
79#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
80
81//====================================================================
82static inline HvLpIndex HvCallCfg_getLps(void)
83{
84 HvLpIndex retVal = HvCall0(HvCallCfgGetLps);
85 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
86 return retVal;
87}
88//====================================================================
89static inline int HvCallCfg_isBusDedicated(u64 busIndex)
90{
91 int retVal = HvCall1(HvCallCfgIsBusDedicated,busIndex);
92 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
93 return retVal;
94}
95//====================================================================
96static inline HvLpIndex HvCallCfg_getBusOwner(u64 busIndex)
97{
98 HvLpIndex retVal = HvCall1(HvCallCfgGetBusOwner,busIndex);
99 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
100 return retVal;
101}
102//====================================================================
103static inline HvLpIndexMap HvCallCfg_getBusAllocation(u64 busIndex)
104{
105 HvLpIndexMap retVal = HvCall1(HvCallCfgGetBusAllocation,busIndex);
106 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
107 return retVal;
108}
109//====================================================================
110static inline HvLpIndexMap HvCallCfg_getActiveLpMap(void)
111{
112 HvLpIndexMap retVal = HvCall0(HvCallCfgGetActiveLpMap);
113 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
114 return retVal;
115}
116//====================================================================
117static inline HvLpVirtualLanIndexMap HvCallCfg_getVirtualLanIndexMap(HvLpIndex lp)
118{
119 // This is a new function in V5R1 so calls to this on older
120 // hypervisors will return -1
121 u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
122 if(retVal == -1)
123 retVal = 0;
124 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
125 return retVal;
126}
127//===================================================================
128static inline u64 HvCallCfg_getSystemMsChunks(void)
129{
130 u64 retVal = HvCall0(HvCallCfgGetSystemMsChunks);
131 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
132 return retVal;
133}
134//===================================================================
135static inline u64 HvCallCfg_getMsChunks(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
136{
137 u64 retVal = HvCall2(HvCallCfgGetMsChunks,lp,qual);
138 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
139 return retVal;
140}
141//===================================================================
142static inline u64 HvCallCfg_getMinRuntimeMsChunks(HvLpIndex lp)
143{
144 // NOTE: This function was added in v5r1 so older hypervisors will return a -1 value
145 u64 retVal = HvCall1(HvCallCfgGetMinRuntimeMsChunks,lp);
146 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
147 return retVal;
148}
149//===================================================================
150static inline u64 HvCallCfg_setMinRuntimeMsChunks(u64 chunks)
151{
152 u64 retVal = HvCall1(HvCallCfgSetMinRuntimeMsChunks,chunks);
153 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
154 return retVal;
155}
156//===================================================================
157static inline u64 HvCallCfg_getSystemPhysicalProcessors(void)
158{
159 u64 retVal = HvCall0(HvCallCfgGetSystemPhysicalProcessors);
160 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
161 return retVal;
162}
163//===================================================================
164static inline u64 HvCallCfg_getPhysicalProcessors(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
165{
166 u64 retVal = HvCall2(HvCallCfgGetPhysicalProcessors,lp,qual);
167 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
168 return retVal;
169}
170//===================================================================
171static inline u64 HvCallCfg_getConfiguredBusUnitsForInterruptProc(HvLpIndex lp,
172 u16 hvLogicalProcIndex)
173{
174 u64 retVal = HvCall2(HvCallCfgGetConfiguredBusUnitsForIntProc,lp,hvLogicalProcIndex);
175 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
176 return retVal;
177
178}
179//==================================================================
180static inline HvLpSharedPoolIndex HvCallCfg_getSharedPoolIndex(HvLpIndex lp)
181{
182 HvLpSharedPoolIndex retVal =
183 HvCall1(HvCallCfgGetSharedPoolIndex,lp);
184 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
185 return retVal;
186
187}
188//==================================================================
189static inline u64 HvCallCfg_getSharedProcUnits(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
190{
191 u64 retVal = HvCall2(HvCallCfgGetSharedProcUnits,lp,qual);
192 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
193 return retVal;
194
195}
196//==================================================================
197static inline u64 HvCallCfg_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
198{
199 u16 retVal = HvCall1(HvCallCfgGetNumProcsInSharedPool,sPI);
200 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
201 return retVal;
202
203}
204//==================================================================
205static inline HvLpIndex HvCallCfg_getHostingLpIndex(HvLpIndex lp)
206{
207 u64 retVal = HvCall1(HvCallCfgGetHostingLpIndex,lp);
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209 return retVal;
210
211}
212
213#endif /* _HVCALLCFG_H */
diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-ppc64/iSeries/HvCallEvent.h
index 191ddce0c2c6..5d9a327d0122 100644
--- a/include/asm-ppc64/iSeries/HvCallEvent.h
+++ b/include/asm-ppc64/iSeries/HvCallEvent.h
@@ -1,32 +1,28 @@
1/* 1/*
2 * HvCallEvent.h 2 * HvCallEvent.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19
20/* 19/*
21 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
22 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
23 */ 22 */
24#ifndef _HVCALLEVENT_H 23#ifndef _HVCALLEVENT_H
25#define _HVCALLEVENT_H 24#define _HVCALLEVENT_H
26 25
27/*
28 * Standard Includes
29 */
30#include <asm/iSeries/HvCallSc.h> 26#include <asm/iSeries/HvCallSc.h>
31#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
32#include <asm/abs_addr.h> 28#include <asm/abs_addr.h>
@@ -71,7 +67,7 @@ typedef u64 HvLpDma_Rc;
71#define HvCallEventCloseLpEventPath HvCallEvent + 2 67#define HvCallEventCloseLpEventPath HvCallEvent + 2
72#define HvCallEventDmaBufList HvCallEvent + 3 68#define HvCallEventDmaBufList HvCallEvent + 3
73#define HvCallEventDmaSingle HvCallEvent + 4 69#define HvCallEventDmaSingle HvCallEvent + 4
74#define HvCallEventDmaToSp HvCallEvent + 5 70#define HvCallEventDmaToSp HvCallEvent + 5
75#define HvCallEventGetOverflowLpEvents HvCallEvent + 6 71#define HvCallEventGetOverflowLpEvents HvCallEvent + 6
76#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7 72#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7
77#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8 73#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8
@@ -85,14 +81,12 @@ typedef u64 HvLpDma_Rc;
85 81
86static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex) 82static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex)
87{ 83{
88 HvCall1(HvCallEventGetOverflowLpEvents,queueIndex); 84 HvCall1(HvCallEventGetOverflowLpEvents, queueIndex);
89 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
90} 85}
91 86
92static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex) 87static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex)
93{ 88{
94 HvCall1(HvCallEventSetInterLpQueueIndex,queueIndex); 89 HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex);
95 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
96} 90}
97 91
98static inline void HvCallEvent_setLpEventStack(u8 queueIndex, 92static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
@@ -103,7 +97,6 @@ static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
103 abs_addr = virt_to_abs(eventStackAddr); 97 abs_addr = virt_to_abs(eventStackAddr);
104 HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr, 98 HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr,
105 eventStackSize); 99 eventStackSize);
106 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
107} 100}
108 101
109static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex, 102static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
@@ -111,22 +104,18 @@ static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
111{ 104{
112 HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex, 105 HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex,
113 lpLogicalProcIndex); 106 lpLogicalProcIndex);
114 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
115} 107}
116 108
117static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event) 109static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event)
118{ 110{
119 u64 abs_addr; 111 u64 abs_addr;
120 HvLpEvent_Rc retVal;
121 112
122#ifdef DEBUG_SENDEVENT 113#ifdef DEBUG_SENDEVENT
123 printk("HvCallEvent_signalLpEvent: *event = %016lx\n ", 114 printk("HvCallEvent_signalLpEvent: *event = %016lx\n ",
124 (unsigned long)event); 115 (unsigned long)event);
125#endif 116#endif
126 abs_addr = virt_to_abs(event); 117 abs_addr = virt_to_abs(event);
127 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventSignalLpEvent, abs_addr); 118 return HvCall1(HvCallEventSignalLpEvent, abs_addr);
128 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
129 return retVal;
130} 119}
131 120
132static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp, 121static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
@@ -136,9 +125,7 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
136 u64 eventData1, u64 eventData2, u64 eventData3, 125 u64 eventData1, u64 eventData2, u64 eventData3,
137 u64 eventData4, u64 eventData5) 126 u64 eventData4, u64 eventData5)
138{ 127{
139 HvLpEvent_Rc retVal; 128 /* Pack the misc bits into a single Dword to pass to PLIC */
140
141 // Pack the misc bits into a single Dword to pass to PLIC
142 union { 129 union {
143 struct HvCallEvent_PackedParms parms; 130 struct HvCallEvent_PackedParms parms;
144 u64 dword; 131 u64 dword;
@@ -152,67 +139,49 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
152 packed.parms.xSourceInstId = sourceInstanceId; 139 packed.parms.xSourceInstId = sourceInstanceId;
153 packed.parms.xTargetInstId = targetInstanceId; 140 packed.parms.xTargetInstId = targetInstanceId;
154 141
155 retVal = (HvLpEvent_Rc)HvCall7(HvCallEventSignalLpEventParms, 142 return HvCall7(HvCallEventSignalLpEventParms, packed.dword,
156 packed.dword, correlationToken, eventData1,eventData2, 143 correlationToken, eventData1, eventData2,
157 eventData3,eventData4, eventData5); 144 eventData3, eventData4, eventData5);
158 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
159 return retVal;
160} 145}
161 146
162static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event) 147static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event)
163{ 148{
164 u64 abs_addr; 149 u64 abs_addr;
165 HvLpEvent_Rc retVal;
166 150
167 abs_addr = virt_to_abs(event); 151 abs_addr = virt_to_abs(event);
168 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventAckLpEvent, abs_addr); 152 return HvCall1(HvCallEventAckLpEvent, abs_addr);
169 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
170 return retVal;
171} 153}
172 154
173static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event) 155static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event)
174{ 156{
175 u64 abs_addr; 157 u64 abs_addr;
176 HvLpEvent_Rc retVal;
177 158
178 abs_addr = virt_to_abs(event); 159 abs_addr = virt_to_abs(event);
179 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventCancelLpEvent, abs_addr); 160 return HvCall1(HvCallEventCancelLpEvent, abs_addr);
180 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
181 return retVal;
182} 161}
183 162
184static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId( 163static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId(
185 HvLpIndex targetLp, HvLpEvent_Type type) 164 HvLpIndex targetLp, HvLpEvent_Type type)
186{ 165{
187 HvLpInstanceId retVal; 166 return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
188
189 retVal = HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
190 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
191 return retVal;
192} 167}
193 168
194static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId( 169static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId(
195 HvLpIndex targetLp, HvLpEvent_Type type) 170 HvLpIndex targetLp, HvLpEvent_Type type)
196{ 171{
197 HvLpInstanceId retVal; 172 return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
198
199 retVal = HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
200 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
201 return retVal;
202} 173}
203 174
204static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp, 175static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp,
205 HvLpEvent_Type type) 176 HvLpEvent_Type type)
206{ 177{
207 HvCall2(HvCallEventOpenLpEventPath, targetLp, type); 178 HvCall2(HvCallEventOpenLpEventPath, targetLp, type);
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209} 179}
210 180
211static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp, 181static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp,
212 HvLpEvent_Type type) 182 HvLpEvent_Type type)
213{ 183{
214 HvCall2(HvCallEventCloseLpEventPath, targetLp, type); 184 HvCall2(HvCallEventCloseLpEventPath, targetLp, type);
215 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
216} 185}
217 186
218static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type, 187static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
@@ -224,8 +193,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
224 /* Do these need to be converted to absolute addresses? */ 193 /* Do these need to be converted to absolute addresses? */
225 u64 localBufList, u64 remoteBufList, u32 transferLength) 194 u64 localBufList, u64 remoteBufList, u32 transferLength)
226{ 195{
227 HvLpDma_Rc retVal; 196 /* Pack the misc bits into a single Dword to pass to PLIC */
228 // Pack the misc bits into a single Dword to pass to PLIC
229 union { 197 union {
230 struct HvCallEvent_PackedDmaParms parms; 198 struct HvCallEvent_PackedDmaParms parms;
231 u64 dword; 199 u64 dword;
@@ -241,11 +209,8 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
241 packed.parms.xLocalInstId = localInstanceId; 209 packed.parms.xLocalInstId = localInstanceId;
242 packed.parms.xRemoteInstId = remoteInstanceId; 210 packed.parms.xRemoteInstId = remoteInstanceId;
243 211
244 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaBufList, 212 return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList,
245 packed.dword, localBufList, remoteBufList, 213 remoteBufList, transferLength);
246 transferLength);
247 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
248 return retVal;
249} 214}
250 215
251static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type, 216static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
@@ -256,8 +221,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
256 HvLpDma_AddressType remoteAddressType, 221 HvLpDma_AddressType remoteAddressType,
257 u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength) 222 u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength)
258{ 223{
259 HvLpDma_Rc retVal; 224 /* Pack the misc bits into a single Dword to pass to PLIC */
260 // Pack the misc bits into a single Dword to pass to PLIC
261 union { 225 union {
262 struct HvCallEvent_PackedDmaParms parms; 226 struct HvCallEvent_PackedDmaParms parms;
263 u64 dword; 227 u64 dword;
@@ -273,25 +237,17 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
273 packed.parms.xLocalInstId = localInstanceId; 237 packed.parms.xLocalInstId = localInstanceId;
274 packed.parms.xRemoteInstId = remoteInstanceId; 238 packed.parms.xRemoteInstId = remoteInstanceId;
275 239
276 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, 240 return (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, packed.dword,
277 packed.dword, localAddrOrTce, remoteAddrOrTce, 241 localAddrOrTce, remoteAddrOrTce, transferLength);
278 transferLength);
279 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
280 return retVal;
281} 242}
282 243
283static inline HvLpDma_Rc HvCallEvent_dmaToSp(void* local, u32 remote, 244static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
284 u32 length, HvLpDma_Direction dir) 245 u32 length, HvLpDma_Direction dir)
285{ 246{
286 u64 abs_addr; 247 u64 abs_addr;
287 HvLpDma_Rc retVal;
288 248
289 abs_addr = virt_to_abs(local); 249 abs_addr = virt_to_abs(local);
290 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaToSp, abs_addr, remote, 250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
291 length, dir);
292 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
293 return retVal;
294} 251}
295 252
296
297#endif /* _HVCALLEVENT_H */ 253#endif /* _HVCALLEVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h
index da769873d18b..66f38222ff75 100644
--- a/include/asm-ppc64/iSeries/HvCallHpt.h
+++ b/include/asm-ppc64/iSeries/HvCallHpt.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallHpt.h 2 * HvCallHpt.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,21 +19,15 @@
19#ifndef _HVCALLHPT_H 19#ifndef _HVCALLHPT_H
20#define _HVCALLHPT_H 20#define _HVCALLHPT_H
21 21
22//============================================================================ 22/*
23// 23 * This file contains the "hypervisor call" interface which is used to
24// This file contains the "hypervisor call" interface which is used to 24 * drive the hypervisor from the OS.
25// drive the hypervisor from the OS. 25 */
26//
27//============================================================================
28 26
29#include <asm/iSeries/HvCallSc.h> 27#include <asm/iSeries/HvCallSc.h>
30#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
31#include <asm/mmu.h> 29#include <asm/mmu.h>
32 30
33//-----------------------------------------------------------------------------
34// Constants
35//-----------------------------------------------------------------------------
36
37#define HvCallHptGetHptAddress HvCallHpt + 0 31#define HvCallHptGetHptAddress HvCallHpt + 0
38#define HvCallHptGetHptPages HvCallHpt + 1 32#define HvCallHptGetHptPages HvCallHpt + 1
39#define HvCallHptSetPp HvCallHpt + 5 33#define HvCallHptSetPp HvCallHpt + 5
@@ -47,81 +41,63 @@
47#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18 41#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18
48 42
49 43
50//============================================================================ 44static inline u64 HvCallHpt_getHptAddress(void)
51static inline u64 HvCallHpt_getHptAddress(void)
52{ 45{
53 u64 retval = HvCall0(HvCallHptGetHptAddress); 46 return HvCall0(HvCallHptGetHptAddress);
54 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
55 return retval;
56} 47}
57//============================================================================ 48
58static inline u64 HvCallHpt_getHptPages(void) 49static inline u64 HvCallHpt_getHptPages(void)
59{ 50{
60 u64 retval = HvCall0(HvCallHptGetHptPages); 51 return HvCall0(HvCallHptGetHptPages);
61 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
62 return retval;
63} 52}
64//============================================================================= 53
65static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value) 54static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
66{ 55{
67 HvCall2( HvCallHptSetPp, hpteIndex, value ); 56 HvCall2(HvCallHptSetPp, hpteIndex, value);
68 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
69} 57}
70//============================================================================= 58
71static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff ) 59static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff)
72{ 60{
73 HvCall3( HvCallHptSetSwBits, hpteIndex, bitson, bitsoff ); 61 HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff);
74 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
75} 62}
76//============================================================================= 63
77static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex) 64static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
78
79{ 65{
80 HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex ); 66 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
81 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
82} 67}
83//============================================================================= 68
84static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson, u8 bitsoff ) 69static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
85 70 u8 bitsoff)
86{ 71{
87 u64 compressedStatus; 72 u64 compressedStatus;
88 compressedStatus = HvCall4( HvCallHptInvalidateSetSwBitsGet, hpteIndex, bitson, bitsoff, 1 ); 73
89 HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex ); 74 compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet,
90 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 75 hpteIndex, bitson, bitsoff, 1);
76 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
91 return compressedStatus; 77 return compressedStatus;
92} 78}
93//============================================================================= 79
94static inline u64 HvCallHpt_findValid( HPTE *hpte, u64 vpn ) 80static inline u64 HvCallHpt_findValid(HPTE *hpte, u64 vpn)
95{ 81{
96 u64 retIndex = HvCall3Ret16( HvCallHptFindValid, hpte, vpn, 0, 0 ); 82 return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
97 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
98 return retIndex;
99} 83}
100//============================================================================= 84
101static inline u64 HvCallHpt_findNextValid( HPTE *hpte, u32 hpteIndex, u8 bitson, u8 bitsoff ) 85static inline u64 HvCallHpt_findNextValid(HPTE *hpte, u32 hpteIndex,
86 u8 bitson, u8 bitsoff)
102{ 87{
103 u64 retIndex = HvCall3Ret16( HvCallHptFindNextValid, hpte, hpteIndex, bitson, bitsoff ); 88 return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
104 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 89 bitson, bitsoff);
105 return retIndex;
106} 90}
107//============================================================================= 91
108static inline void HvCallHpt_get( HPTE *hpte, u32 hpteIndex ) 92static inline void HvCallHpt_get(HPTE *hpte, u32 hpteIndex)
109{ 93{
110 HvCall2Ret16( HvCallHptGet, hpte, hpteIndex, 0 ); 94 HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
111 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
112} 95}
113//============================================================================ 96
114static inline void HvCallHpt_addValidate( u32 hpteIndex, 97static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, HPTE *hpte)
115 u32 hBit,
116 HPTE *hpte )
117
118{ 98{
119 HvCall4( HvCallHptAddValidate, hpteIndex, 99 HvCall4(HvCallHptAddValidate, hpteIndex, hBit, (*((u64 *)hpte)),
120 hBit, (*((u64 *)hpte)), (*(((u64 *)hpte)+1)) ); 100 (*(((u64 *)hpte)+1)));
121 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
122} 101}
123 102
124
125//=============================================================================
126
127#endif /* _HVCALLHPT_H */ 103#endif /* _HVCALLHPT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h
index 6887b619288e..c8d675c40f5e 100644
--- a/include/asm-ppc64/iSeries/HvCallPci.h
+++ b/include/asm-ppc64/iSeries/HvCallPci.h
@@ -1,26 +1,26 @@
1/************************************************************************/ 1/*
2/* Provides the Hypervisor PCI calls for iSeries Linux Parition. */ 2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3/* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> */ 3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
4/* */ 4 *
5/* This program is free software; you can redistribute it and/or modify */ 5 * This program is free software; you can redistribute it and/or modify
6/* it under the terms of the GNU General Public License as published by */ 6 * it under the terms of the GNU General Public License as published by
7/* the Free Software Foundation; either version 2 of the License, or */ 7 * the Free Software Foundation; either version 2 of the License, or
8/* (at your option) any later version. */ 8 * (at your option) any later version.
9/* */ 9 *
10/* This program is distributed in the hope that it will be useful, */ 10 * This program is distributed in the hope that it will be useful,
11/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13/* GNU General Public License for more details. */ 13 * GNU General Public License for more details.
14/* */ 14 *
15/* You should have received a copy of the GNU General Public License */ 15 * You should have received a copy of the GNU General Public License
16/* along with this program; if not, write to the: */ 16 * along with this program; if not, write to the:
17/* Free Software Foundation, Inc., */ 17 * Free Software Foundation, Inc.,
18/* 59 Temple Place, Suite 330, */ 18 * 59 Temple Place, Suite 330,
19/* Boston, MA 02111-1307 USA */ 19 * Boston, MA 02111-1307 USA
20/************************************************************************/ 20 *
21/* Change Activity: */ 21 * Change Activity:
22/* Created, Jan 9, 2001 */ 22 * Created, Jan 9, 2001
23/************************************************************************/ 23 */
24 24
25#ifndef _HVCALLPCI_H 25#ifndef _HVCALLPCI_H
26#define _HVCALLPCI_H 26#define _HVCALLPCI_H
@@ -34,8 +34,8 @@
34 */ 34 */
35struct HvCallPci_DsaAddr { 35struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */ 36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */ 37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */ 38 u8 deviceId; /* device and function? */
39 u8 barNumber; 39 u8 barNumber;
40 u8 reserved[3]; 40 u8 reserved[3];
41}; 41};
@@ -52,34 +52,37 @@ struct HvCallPci_LoadReturn {
52 52
53enum HvCallPci_DeviceType { 53enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1, 54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2, 55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3, 56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4, 57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5, 58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6 59 HvCallPci_IoaDevice = 6
60}; 60};
61 61
62 62
63struct HvCallPci_DeviceInfo { 63struct HvCallPci_DeviceInfo {
64 u32 deviceType; // See DeviceType enum for values 64 u32 deviceType; /* See DeviceType enum for values */
65}; 65};
66 66
67struct HvCallPci_BusUnitInfo { 67struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; // length of data returned 68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; // see DeviceType enum for values 69 u32 deviceType; /* see DeviceType enum for values */
70}; 70};
71 71
72struct HvCallPci_BridgeInfo { 72struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info 73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; // Bus number of secondary bus 74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; // Max idsels on secondary bus 75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; // Max Sub Bus 76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; // Logical Slot Number for IOA 77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
78}; 78};
79
80 79
81// Maximum BusUnitInfo buffer size. Provided for clients so they can allocate 80
82// a buffer big enough for any type of bus unit. Increase as needed. 81/*
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
85 */
83enum {HvCallPci_MaxBusUnitInfoSize = 128}; 86enum {HvCallPci_MaxBusUnitInfoSize = 128};
84 87
85struct HvCallPci_BarParms { 88struct HvCallPci_BarParms {
@@ -89,12 +92,12 @@ struct HvCallPci_BarParms {
89 u64 protectStart; 92 u64 protectStart;
90 u64 protectEnd; 93 u64 protectEnd;
91 u64 relocationOffset; 94 u64 relocationOffset;
92 u64 pciAddress; 95 u64 pciAddress;
93 u64 reserved[3]; 96 u64 reserved[3];
94}; 97};
95 98
96enum HvCallPci_VpdType { 99enum HvCallPci_VpdType {
97 HvCallPci_BusVpd = 1, 100 HvCallPci_BusVpd = 1,
98 HvCallPci_BusAdapterVpd = 2 101 HvCallPci_BusAdapterVpd = 2
99}; 102};
100 103
@@ -123,15 +126,13 @@ enum HvCallPci_VpdType {
123#define HvCallPciUnmaskInterrupts HvCallPci + 49 126#define HvCallPciUnmaskInterrupts HvCallPci + 49
124#define HvCallPciGetBusUnitInfo HvCallPci + 50 127#define HvCallPciGetBusUnitInfo HvCallPci + 50
125 128
126//============================================================================
127static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, 129static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
128 u8 deviceId, u32 offset, 130 u8 deviceId, u32 offset, u8 *value)
129 u8 *value)
130{ 131{
131 struct HvCallPci_DsaAddr dsa; 132 struct HvCallPci_DsaAddr dsa;
132 struct HvCallPci_LoadReturn retVal; 133 struct HvCallPci_LoadReturn retVal;
133 134
134 *((u64*)&dsa) = 0; 135 *((u64*)&dsa) = 0;
135 136
136 dsa.busNumber = busNumber; 137 dsa.busNumber = busNumber;
137 dsa.subBusNumber = subBusNumber; 138 dsa.subBusNumber = subBusNumber;
@@ -139,21 +140,18 @@ static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
139 140
140 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); 141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
141 142
142 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
143
144 *value = retVal.value; 143 *value = retVal.value;
145 144
146 return retVal.rc; 145 return retVal.rc;
147} 146}
148//============================================================================ 147
149static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, 148static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
150 u8 deviceId, u32 offset, 149 u8 deviceId, u32 offset, u16 *value)
151 u16 *value)
152{ 150{
153 struct HvCallPci_DsaAddr dsa; 151 struct HvCallPci_DsaAddr dsa;
154 struct HvCallPci_LoadReturn retVal; 152 struct HvCallPci_LoadReturn retVal;
155 153
156 *((u64*)&dsa) = 0; 154 *((u64*)&dsa) = 0;
157 155
158 dsa.busNumber = busNumber; 156 dsa.busNumber = busNumber;
159 dsa.subBusNumber = subBusNumber; 157 dsa.subBusNumber = subBusNumber;
@@ -161,21 +159,18 @@ static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
161 159
162 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); 160 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
163 161
164 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
165
166 *value = retVal.value; 162 *value = retVal.value;
167 163
168 return retVal.rc; 164 return retVal.rc;
169} 165}
170//============================================================================ 166
171static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, 167static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
172 u8 deviceId, u32 offset, 168 u8 deviceId, u32 offset, u32 *value)
173 u32 *value)
174{ 169{
175 struct HvCallPci_DsaAddr dsa; 170 struct HvCallPci_DsaAddr dsa;
176 struct HvCallPci_LoadReturn retVal; 171 struct HvCallPci_LoadReturn retVal;
177 172
178 *((u64*)&dsa) = 0; 173 *((u64*)&dsa) = 0;
179 174
180 dsa.busNumber = busNumber; 175 dsa.busNumber = busNumber;
181 dsa.subBusNumber = subBusNumber; 176 dsa.subBusNumber = subBusNumber;
@@ -183,84 +178,61 @@ static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
183 178
184 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); 179 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
185 180
186 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
187
188 *value = retVal.value; 181 *value = retVal.value;
189 182
190 return retVal.rc; 183 return retVal.rc;
191} 184}
192//============================================================================ 185
193static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, 186static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
194 u8 deviceId, u32 offset, 187 u8 deviceId, u32 offset, u8 value)
195 u8 value)
196{ 188{
197 struct HvCallPci_DsaAddr dsa; 189 struct HvCallPci_DsaAddr dsa;
198 u64 retVal;
199 190
200 *((u64*)&dsa) = 0; 191 *((u64*)&dsa) = 0;
201 192
202 dsa.busNumber = busNumber; 193 dsa.busNumber = busNumber;
203 dsa.subBusNumber = subBusNumber; 194 dsa.subBusNumber = subBusNumber;
204 dsa.deviceId = deviceId; 195 dsa.deviceId = deviceId;
205 196
206 retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); 197 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
207
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209
210 return retVal;
211} 198}
212//============================================================================ 199
213static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, 200static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
214 u8 deviceId, u32 offset, 201 u8 deviceId, u32 offset, u16 value)
215 u16 value)
216{ 202{
217 struct HvCallPci_DsaAddr dsa; 203 struct HvCallPci_DsaAddr dsa;
218 u64 retVal;
219 204
220 *((u64*)&dsa) = 0; 205 *((u64*)&dsa) = 0;
221 206
222 dsa.busNumber = busNumber; 207 dsa.busNumber = busNumber;
223 dsa.subBusNumber = subBusNumber; 208 dsa.subBusNumber = subBusNumber;
224 dsa.deviceId = deviceId; 209 dsa.deviceId = deviceId;
225 210
226 retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); 211 return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
227
228 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
229
230 return retVal;
231} 212}
232//============================================================================ 213
233static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, 214static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
234 u8 deviceId, u32 offset, 215 u8 deviceId, u32 offset, u32 value)
235 u32 value)
236{ 216{
237 struct HvCallPci_DsaAddr dsa; 217 struct HvCallPci_DsaAddr dsa;
238 u64 retVal;
239 218
240 *((u64*)&dsa) = 0; 219 *((u64*)&dsa) = 0;
241 220
242 dsa.busNumber = busNumber; 221 dsa.busNumber = busNumber;
243 dsa.subBusNumber = subBusNumber; 222 dsa.subBusNumber = subBusNumber;
244 dsa.deviceId = deviceId; 223 dsa.deviceId = deviceId;
245 224
246 retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); 225 return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
247
248 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
249
250 return retVal;
251} 226}
252//============================================================================ 227
253static inline u64 HvCallPci_barLoad8(u16 busNumberParm, 228static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
254 u8 subBusParm, 229 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
255 u8 deviceIdParm, 230 u8 *valueParm)
256 u8 barNumberParm,
257 u64 offsetParm,
258 u8* valueParm)
259{ 231{
260 struct HvCallPci_DsaAddr dsa; 232 struct HvCallPci_DsaAddr dsa;
261 struct HvCallPci_LoadReturn retVal; 233 struct HvCallPci_LoadReturn retVal;
262 234
263 *((u64*)&dsa) = 0; 235 *((u64*)&dsa) = 0;
264 236
265 dsa.busNumber = busNumberParm; 237 dsa.busNumber = busNumberParm;
266 dsa.subBusNumber = subBusParm; 238 dsa.subBusNumber = subBusParm;
@@ -269,24 +241,19 @@ static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
269 241
270 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); 242 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
271 243
272 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
273
274 *valueParm = retVal.value; 244 *valueParm = retVal.value;
275 245
276 return retVal.rc; 246 return retVal.rc;
277} 247}
278//============================================================================ 248
279static inline u64 HvCallPci_barLoad16(u16 busNumberParm, 249static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
280 u8 subBusParm, 250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
281 u8 deviceIdParm, 251 u16 *valueParm)
282 u8 barNumberParm,
283 u64 offsetParm,
284 u16* valueParm)
285{ 252{
286 struct HvCallPci_DsaAddr dsa; 253 struct HvCallPci_DsaAddr dsa;
287 struct HvCallPci_LoadReturn retVal; 254 struct HvCallPci_LoadReturn retVal;
288 255
289 *((u64*)&dsa) = 0; 256 *((u64*)&dsa) = 0;
290 257
291 dsa.busNumber = busNumberParm; 258 dsa.busNumber = busNumberParm;
292 dsa.subBusNumber = subBusParm; 259 dsa.subBusNumber = subBusParm;
@@ -295,24 +262,19 @@ static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
295 262
296 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); 263 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
297 264
298 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
299
300 *valueParm = retVal.value; 265 *valueParm = retVal.value;
301 266
302 return retVal.rc; 267 return retVal.rc;
303} 268}
304//============================================================================ 269
305static inline u64 HvCallPci_barLoad32(u16 busNumberParm, 270static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
306 u8 subBusParm, 271 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
307 u8 deviceIdParm, 272 u32 *valueParm)
308 u8 barNumberParm,
309 u64 offsetParm,
310 u32* valueParm)
311{ 273{
312 struct HvCallPci_DsaAddr dsa; 274 struct HvCallPci_DsaAddr dsa;
313 struct HvCallPci_LoadReturn retVal; 275 struct HvCallPci_LoadReturn retVal;
314 276
315 *((u64*)&dsa) = 0; 277 *((u64*)&dsa) = 0;
316 278
317 dsa.busNumber = busNumberParm; 279 dsa.busNumber = busNumberParm;
318 dsa.subBusNumber = subBusParm; 280 dsa.subBusNumber = subBusParm;
@@ -321,24 +283,19 @@ static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
321 283
322 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); 284 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
323 285
324 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
325
326 *valueParm = retVal.value; 286 *valueParm = retVal.value;
327 287
328 return retVal.rc; 288 return retVal.rc;
329} 289}
330//============================================================================ 290
331static inline u64 HvCallPci_barLoad64(u16 busNumberParm, 291static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
332 u8 subBusParm, 292 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
333 u8 deviceIdParm, 293 u64 *valueParm)
334 u8 barNumberParm,
335 u64 offsetParm,
336 u64* valueParm)
337{ 294{
338 struct HvCallPci_DsaAddr dsa; 295 struct HvCallPci_DsaAddr dsa;
339 struct HvCallPci_LoadReturn retVal; 296 struct HvCallPci_LoadReturn retVal;
340 297
341 *((u64*)&dsa) = 0; 298 *((u64*)&dsa) = 0;
342 299
343 dsa.busNumber = busNumberParm; 300 dsa.busNumber = busNumberParm;
344 dsa.subBusNumber = subBusParm; 301 dsa.subBusNumber = subBusParm;
@@ -347,112 +304,81 @@ static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
347 304
348 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); 305 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
349 306
350 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
351
352 *valueParm = retVal.value; 307 *valueParm = retVal.value;
353 308
354 return retVal.rc; 309 return retVal.rc;
355} 310}
356//============================================================================ 311
357static inline u64 HvCallPci_barStore8(u16 busNumberParm, 312static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
358 u8 subBusParm, 313 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
359 u8 deviceIdParm, 314 u8 valueParm)
360 u8 barNumberParm,
361 u64 offsetParm,
362 u8 valueParm)
363{ 315{
364 struct HvCallPci_DsaAddr dsa; 316 struct HvCallPci_DsaAddr dsa;
365 u64 retVal;
366 317
367 *((u64*)&dsa) = 0; 318 *((u64*)&dsa) = 0;
368 319
369 dsa.busNumber = busNumberParm; 320 dsa.busNumber = busNumberParm;
370 dsa.subBusNumber = subBusParm; 321 dsa.subBusNumber = subBusParm;
371 dsa.deviceId = deviceIdParm; 322 dsa.deviceId = deviceIdParm;
372 dsa.barNumber = barNumberParm; 323 dsa.barNumber = barNumberParm;
373 324
374 retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0); 325 return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
375 326 valueParm, 0);
376 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
377
378 return retVal;
379} 327}
380//============================================================================ 328
381static inline u64 HvCallPci_barStore16(u16 busNumberParm, 329static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
382 u8 subBusParm, 330 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
383 u8 deviceIdParm, 331 u16 valueParm)
384 u8 barNumberParm,
385 u64 offsetParm,
386 u16 valueParm)
387{ 332{
388 struct HvCallPci_DsaAddr dsa; 333 struct HvCallPci_DsaAddr dsa;
389 u64 retVal;
390 334
391 *((u64*)&dsa) = 0; 335 *((u64*)&dsa) = 0;
392 336
393 dsa.busNumber = busNumberParm; 337 dsa.busNumber = busNumberParm;
394 dsa.subBusNumber = subBusParm; 338 dsa.subBusNumber = subBusParm;
395 dsa.deviceId = deviceIdParm; 339 dsa.deviceId = deviceIdParm;
396 dsa.barNumber = barNumberParm; 340 dsa.barNumber = barNumberParm;
397 341
398 retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0); 342 return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
399 343 valueParm, 0);
400 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
401
402 return retVal;
403} 344}
404//============================================================================ 345
405static inline u64 HvCallPci_barStore32(u16 busNumberParm, 346static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
406 u8 subBusParm, 347 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
407 u8 deviceIdParm, 348 u32 valueParm)
408 u8 barNumberParm,
409 u64 offsetParm,
410 u32 valueParm)
411{ 349{
412 struct HvCallPci_DsaAddr dsa; 350 struct HvCallPci_DsaAddr dsa;
413 u64 retVal;
414 351
415 *((u64*)&dsa) = 0; 352 *((u64*)&dsa) = 0;
416 353
417 dsa.busNumber = busNumberParm; 354 dsa.busNumber = busNumberParm;
418 dsa.subBusNumber = subBusParm; 355 dsa.subBusNumber = subBusParm;
419 dsa.deviceId = deviceIdParm; 356 dsa.deviceId = deviceIdParm;
420 dsa.barNumber = barNumberParm; 357 dsa.barNumber = barNumberParm;
421 358
422 retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0); 359 return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
423 360 valueParm, 0);
424 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
425
426 return retVal;
427} 361}
428//============================================================================ 362
429static inline u64 HvCallPci_barStore64(u16 busNumberParm, 363static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
430 u8 subBusParm, 364 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
431 u8 deviceIdParm, 365 u64 valueParm)
432 u8 barNumberParm,
433 u64 offsetParm,
434 u64 valueParm)
435{ 366{
436 struct HvCallPci_DsaAddr dsa; 367 struct HvCallPci_DsaAddr dsa;
437 u64 retVal;
438 368
439 *((u64*)&dsa) = 0; 369 *((u64*)&dsa) = 0;
440 370
441 dsa.busNumber = busNumberParm; 371 dsa.busNumber = busNumberParm;
442 dsa.subBusNumber = subBusParm; 372 dsa.subBusNumber = subBusParm;
443 dsa.deviceId = deviceIdParm; 373 dsa.deviceId = deviceIdParm;
444 dsa.barNumber = barNumberParm; 374 dsa.barNumber = barNumberParm;
445 375
446 retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0); 376 return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
447 377 valueParm, 0);
448 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
449
450 return retVal;
451} 378}
452//============================================================================ 379
453static inline u64 HvCallPci_eoi(u16 busNumberParm, 380static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
454 u8 subBusParm, 381 u8 deviceIdParm)
455 u8 deviceIdParm)
456{ 382{
457 struct HvCallPci_DsaAddr dsa; 383 struct HvCallPci_DsaAddr dsa;
458 struct HvCallPci_LoadReturn retVal; 384 struct HvCallPci_LoadReturn retVal;
@@ -465,20 +391,13 @@ static inline u64 HvCallPci_eoi(u16 busNumberParm,
465 391
466 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); 392 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
467 393
468 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
469
470 return retVal.rc; 394 return retVal.rc;
471} 395}
472//============================================================================ 396
473static inline u64 HvCallPci_getBarParms(u16 busNumberParm, 397static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
474 u8 subBusParm, 398 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
475 u8 deviceIdParm,
476 u8 barNumberParm,
477 u64 parms,
478 u32 sizeofParms)
479{ 399{
480 struct HvCallPci_DsaAddr dsa; 400 struct HvCallPci_DsaAddr dsa;
481 u64 retVal;
482 401
483 *((u64*)&dsa) = 0; 402 *((u64*)&dsa) = 0;
484 403
@@ -487,62 +406,41 @@ static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
487 dsa.deviceId = deviceIdParm; 406 dsa.deviceId = deviceIdParm;
488 dsa.barNumber = barNumberParm; 407 dsa.barNumber = barNumberParm;
489 408
490 retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); 409 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
491
492 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
493
494 return retVal;
495} 410}
496//============================================================================ 411
497static inline u64 HvCallPci_maskFisr(u16 busNumberParm, 412static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
498 u8 subBusParm, 413 u8 deviceIdParm, u64 fisrMask)
499 u8 deviceIdParm,
500 u64 fisrMask)
501{ 414{
502 struct HvCallPci_DsaAddr dsa; 415 struct HvCallPci_DsaAddr dsa;
503 u64 retVal;
504 416
505 *((u64*)&dsa) = 0; 417 *((u64*)&dsa) = 0;
506 418
507 dsa.busNumber = busNumberParm; 419 dsa.busNumber = busNumberParm;
508 dsa.subBusNumber = subBusParm; 420 dsa.subBusNumber = subBusParm;
509 dsa.deviceId = deviceIdParm; 421 dsa.deviceId = deviceIdParm;
510 422
511 retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); 423 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
512
513 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
514
515 return retVal;
516} 424}
517//============================================================================ 425
518static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, 426static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
519 u8 subBusParm, 427 u8 deviceIdParm, u64 fisrMask)
520 u8 deviceIdParm,
521 u64 fisrMask)
522{ 428{
523 struct HvCallPci_DsaAddr dsa; 429 struct HvCallPci_DsaAddr dsa;
524 u64 retVal;
525 430
526 *((u64*)&dsa) = 0; 431 *((u64*)&dsa) = 0;
527 432
528 dsa.busNumber = busNumberParm; 433 dsa.busNumber = busNumberParm;
529 dsa.subBusNumber = subBusParm; 434 dsa.subBusNumber = subBusParm;
530 dsa.deviceId = deviceIdParm; 435 dsa.deviceId = deviceIdParm;
531 436
532 retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); 437 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
533
534 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
535
536 return retVal;
537} 438}
538//============================================================================ 439
539static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, 440static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
540 u8 subBusParm, 441 u8 deviceIdParm, u64 onNotOff)
541 u8 deviceIdParm,
542 u64 onNotOff)
543{ 442{
544 struct HvCallPci_DsaAddr dsa; 443 struct HvCallPci_DsaAddr dsa;
545 u64 retVal;
546 444
547 *((u64*)&dsa) = 0; 445 *((u64*)&dsa) = 0;
548 446
@@ -550,21 +448,13 @@ static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
550 dsa.subBusNumber = subBusParm; 448 dsa.subBusNumber = subBusParm;
551 dsa.deviceId = deviceIdParm; 449 dsa.deviceId = deviceIdParm;
552 450
553 retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); 451 return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
554
555 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
556
557 return retVal;
558} 452}
559//============================================================================ 453
560static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, 454static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
561 u8 subBusParm, 455 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
562 u8 deviceNumberParm,
563 u64 parms,
564 u32 sizeofParms)
565{ 456{
566 struct HvCallPci_DsaAddr dsa; 457 struct HvCallPci_DsaAddr dsa;
567 u64 retVal;
568 458
569 *((u64*)&dsa) = 0; 459 *((u64*)&dsa) = 0;
570 460
@@ -572,102 +462,72 @@ static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
572 dsa.subBusNumber = subBusParm; 462 dsa.subBusNumber = subBusParm;
573 dsa.deviceId = deviceNumberParm << 4; 463 dsa.deviceId = deviceNumberParm << 4;
574 464
575 retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); 465 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
576
577 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
578
579 return retVal;
580} 466}
581//============================================================================ 467
582static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, 468static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
583 u8 subBusParm, 469 u8 deviceIdParm, u64 interruptMask)
584 u8 deviceIdParm,
585 u64 interruptMask)
586{ 470{
587 struct HvCallPci_DsaAddr dsa; 471 struct HvCallPci_DsaAddr dsa;
588 u64 retVal;
589 472
590 *((u64*)&dsa) = 0; 473 *((u64*)&dsa) = 0;
591 474
592 dsa.busNumber = busNumberParm; 475 dsa.busNumber = busNumberParm;
593 dsa.subBusNumber = subBusParm; 476 dsa.subBusNumber = subBusParm;
594 dsa.deviceId = deviceIdParm; 477 dsa.deviceId = deviceIdParm;
595 478
596 retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); 479 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
597
598 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
599
600 return retVal;
601} 480}
602//============================================================================ 481
603static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, 482static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
604 u8 subBusParm, 483 u8 deviceIdParm, u64 interruptMask)
605 u8 deviceIdParm,
606 u64 interruptMask)
607{ 484{
608 struct HvCallPci_DsaAddr dsa; 485 struct HvCallPci_DsaAddr dsa;
609 u64 retVal;
610 486
611 *((u64*)&dsa) = 0; 487 *((u64*)&dsa) = 0;
612 488
613 dsa.busNumber = busNumberParm; 489 dsa.busNumber = busNumberParm;
614 dsa.subBusNumber = subBusParm; 490 dsa.subBusNumber = subBusParm;
615 dsa.deviceId = deviceIdParm; 491 dsa.deviceId = deviceIdParm;
616 492
617 retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); 493 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
618
619 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
620
621 return retVal;
622} 494}
623//============================================================================
624 495
625static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, 496static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
626 u8 subBusParm, 497 u8 deviceIdParm, u64 parms, u32 sizeofParms)
627 u8 deviceIdParm,
628 u64 parms,
629 u32 sizeofParms)
630{ 498{
631 struct HvCallPci_DsaAddr dsa; 499 struct HvCallPci_DsaAddr dsa;
632 u64 retVal;
633 500
634 *((u64*)&dsa) = 0; 501 *((u64*)&dsa) = 0;
635 502
636 dsa.busNumber = busNumberParm; 503 dsa.busNumber = busNumberParm;
637 dsa.subBusNumber = subBusParm; 504 dsa.subBusNumber = subBusParm;
638 dsa.deviceId = deviceIdParm; 505 dsa.deviceId = deviceIdParm;
639 506
640 retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms); 507 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
641 508 sizeofParms);
642 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
643
644 return retVal;
645} 509}
646//============================================================================
647 510
648static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 511static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
512 u16 sizeParm)
649{ 513{
650 int xRetSize; 514 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
651 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd); 515 sizeParm, HvCallPci_BusVpd);
652 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
653 if (xRc == -1) 516 if (xRc == -1)
654 xRetSize = -1; 517 return -1;
655 else 518 else
656 xRetSize = xRc & 0xFFFF; 519 return xRc & 0xFFFF;
657 return xRetSize;
658} 520}
659//============================================================================
660 521
661static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 522static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
523 u16 sizeParm)
662{ 524{
663 int xRetSize; 525 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
664 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd); 526 sizeParm, HvCallPci_BusAdapterVpd);
665 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
666 if (xRc == -1) 527 if (xRc == -1)
667 xRetSize = -1; 528 return -1;
668 else 529 else
669 xRetSize = xRc & 0xFFFF; 530 return xRc & 0xFFFF;
670 return xRetSize;
671} 531}
672//============================================================================ 532
673#endif /* _HVCALLPCI_H */ 533#endif /* _HVCALLPCI_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-ppc64/iSeries/HvCallSc.h
index eea258447642..a62cef3822f9 100644
--- a/include/asm-ppc64/iSeries/HvCallSc.h
+++ b/include/asm-ppc64/iSeries/HvCallSc.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallSc.h 2 * HvCallSc.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,7 +19,7 @@
19#ifndef _HVCALLSC_H 19#ifndef _HVCALLSC_H
20#define _HVCALLSC_H 20#define _HVCALLSC_H
21 21
22#include <asm/iSeries/HvTypes.h> 22#include <linux/types.h>
23 23
24#define HvCallBase 0x8000000000000000ul 24#define HvCallBase 0x8000000000000000ul
25#define HvCallCc 0x8001000000000000ul 25#define HvCallCc 0x8001000000000000ul
@@ -30,22 +30,22 @@
30#define HvCallSm 0x8007000000000000ul 30#define HvCallSm 0x8007000000000000ul
31#define HvCallXm 0x8009000000000000ul 31#define HvCallXm 0x8009000000000000ul
32 32
33u64 HvCall0( u64 ); 33extern u64 HvCall0(u64);
34u64 HvCall1( u64, u64 ); 34extern u64 HvCall1(u64, u64);
35u64 HvCall2( u64, u64, u64 ); 35extern u64 HvCall2(u64, u64, u64);
36u64 HvCall3( u64, u64, u64, u64 ); 36extern u64 HvCall3(u64, u64, u64, u64);
37u64 HvCall4( u64, u64, u64, u64, u64 ); 37extern u64 HvCall4(u64, u64, u64, u64, u64);
38u64 HvCall5( u64, u64, u64, u64, u64, u64 ); 38extern u64 HvCall5(u64, u64, u64, u64, u64, u64);
39u64 HvCall6( u64, u64, u64, u64, u64, u64, u64 ); 39extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64);
40u64 HvCall7( u64, u64, u64, u64, u64, u64, u64, u64 ); 40extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64);
41 41
42u64 HvCall0Ret16( u64, void * ); 42extern u64 HvCall0Ret16(u64, void *);
43u64 HvCall1Ret16( u64, void *, u64 ); 43extern u64 HvCall1Ret16(u64, void *, u64);
44u64 HvCall2Ret16( u64, void *, u64, u64 ); 44extern u64 HvCall2Ret16(u64, void *, u64, u64);
45u64 HvCall3Ret16( u64, void *, u64, u64, u64 ); 45extern u64 HvCall3Ret16(u64, void *, u64, u64, u64);
46u64 HvCall4Ret16( u64, void *, u64, u64, u64, u64 ); 46extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64);
47u64 HvCall5Ret16( u64, void *, u64, u64, u64, u64, u64 ); 47extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
48u64 HvCall6Ret16( u64, void *, u64, u64, u64, u64, u64, u64 ); 48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
49u64 HvCall7Ret16( u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64 ); 49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
50 50
51#endif /* _HVCALLSC_H */ 51#endif /* _HVCALLSC_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSm.h b/include/asm-ppc64/iSeries/HvCallSm.h
index 9050c94a529d..8a3dbb071a43 100644
--- a/include/asm-ppc64/iSeries/HvCallSm.h
+++ b/include/asm-ppc64/iSeries/HvCallSm.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallSm.h 2 * HvCallSm.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,34 +19,20 @@
19#ifndef _HVCALLSM_H 19#ifndef _HVCALLSM_H
20#define _HVCALLSM_H 20#define _HVCALLSM_H
21 21
22//============================================================================ 22/*
23// 23 * This file contains the "hypervisor call" interface which is used to
24// This file contains the "hypervisor call" interface which is used to 24 * drive the hypervisor from the OS.
25// drive the hypervisor from the OS. 25 */
26//
27//============================================================================
28 26
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h> 27#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
34 29
35//-----------------------------------------------------------------------------
36// Constants
37//-----------------------------------------------------------------------------
38
39#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11 30#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11
40 31
41 32static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex,
42//============================================================================ 33 u64 indexIntoBitMap)
43static inline u64 HvCallSm_get64BitsOfAccessMap(
44 HvLpIndex lpIndex, u64 indexIntoBitMap )
45{ 34{
46 u64 retval = HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, 35 return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap);
47 indexIntoBitMap );
48 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
49 return retval;
50} 36}
51//============================================================================ 37
52#endif /* _HVCALLSM_H */ 38#endif /* _HVCALLSM_H */
diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-ppc64/iSeries/HvCallXm.h
index bfb898f4db8d..8b9ba608daaf 100644
--- a/include/asm-ppc64/iSeries/HvCallXm.h
+++ b/include/asm-ppc64/iSeries/HvCallXm.h
@@ -1,30 +1,13 @@
1//============================================================================ 1/*
2// Header File Id 2 * This file contains the "hypervisor call" interface which is used to
3// Name______________: HvCallXm.H 3 * drive the hypervisor from SLIC.
4// 4 */
5// Description_______:
6//
7// This file contains the "hypervisor call" interface which is used to
8// drive the hypervisor from SLIC.
9//
10//============================================================================
11#ifndef _HVCALLXM_H 5#ifndef _HVCALLXM_H
12#define _HVCALLXM_H 6#define _HVCALLXM_H
13 7
14//-------------------------------------------------------------------
15// Forward declarations
16//-------------------------------------------------------------------
17
18//-------------------------------------------------------------------
19// Standard Includes
20//-------------------------------------------------------------------
21#include <asm/iSeries/HvCallSc.h> 8#include <asm/iSeries/HvCallSc.h>
22#include <asm/iSeries/HvTypes.h> 9#include <asm/iSeries/HvTypes.h>
23 10
24//-----------------------------------------------------------------------------
25// Constants
26//-----------------------------------------------------------------------------
27
28#define HvCallXmGetTceTableParms HvCallXm + 0 11#define HvCallXmGetTceTableParms HvCallXm + 0
29#define HvCallXmTestBus HvCallXm + 1 12#define HvCallXmTestBus HvCallXm + 1
30#define HvCallXmConnectBusUnit HvCallXm + 2 13#define HvCallXmConnectBusUnit HvCallXm + 2
@@ -33,63 +16,63 @@
33#define HvCallXmSetTce HvCallXm + 11 16#define HvCallXmSetTce HvCallXm + 11
34#define HvCallXmSetTces HvCallXm + 13 17#define HvCallXmSetTces HvCallXm + 13
35 18
19/*
20 * Structure passed to HvCallXm_getTceTableParms
21 */
22struct iommu_table_cb {
23 unsigned long itc_busno; /* Bus number for this tce table */
24 unsigned long itc_start; /* Will be NULL for secondary */
25 unsigned long itc_totalsize; /* Size (in pages) of whole table */
26 unsigned long itc_offset; /* Index into real tce table of the
27 start of our section */
28 unsigned long itc_size; /* Size (in pages) of our section */
29 unsigned long itc_index; /* Index of this tce table */
30 unsigned short itc_maxtables; /* Max num of tables for partition */
31 unsigned char itc_virtbus; /* Flag to indicate virtual bus */
32 unsigned char itc_slotno; /* IOA Tce Slot Index */
33 unsigned char itc_rsvd[4];
34};
36 35
37 36static inline void HvCallXm_getTceTableParms(u64 cb)
38//============================================================================
39static inline void HvCallXm_getTceTableParms(u64 cb)
40{ 37{
41 HvCall1(HvCallXmGetTceTableParms, cb); 38 HvCall1(HvCallXmGetTceTableParms, cb);
42 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
43} 39}
44//============================================================================ 40
45static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) 41static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce)
46{ 42{
47 u64 retval = HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce ); 43 return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce);
48 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
49 return retval;
50}
51//============================================================================
52static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
53{
54 u64 retval = HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
55 tce1, tce2, tce3, tce4 );
56 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
57 return retval;
58} 44}
59//============================================================================= 45
60static inline u64 HvCallXm_testBus(u16 busNumber) 46static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset,
47 u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
61{ 48{
62 u64 retVal = HvCall1(HvCallXmTestBus, busNumber); 49 return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
63 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 50 tce1, tce2, tce3, tce4);
64 return retVal;
65} 51}
66//===================================================================================== 52
67static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId) 53static inline u64 HvCallXm_testBus(u16 busNumber)
68{ 54{
69 u64 busUnitNumber = (subBusNumber << 8) | deviceId; 55 return HvCall1(HvCallXmTestBus, busNumber);
70 u64 retVal = HvCall2(HvCallXmTestBusUnit, busNumber, busUnitNumber);
71 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
72 return retVal;
73} 56}
74//===================================================================================== 57
75static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId, 58static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber,
76 u64 interruptToken) 59 u8 deviceId)
77{ 60{
78 u64 busUnitNumber = (subBusNumber << 8) | deviceId; 61 return HvCall2(HvCallXmTestBusUnit, busNumber,
79 u64 queueIndex = 0; // HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)); 62 (subBusNumber << 8) | deviceId);
63}
80 64
81 u64 retVal = HvCall5(HvCallXmConnectBusUnit, busNumber, busUnitNumber, 65static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber,
82 interruptToken, 0, queueIndex); 66 u8 deviceId, u64 interruptToken)
83 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 67{
84 return retVal; 68 return HvCall5(HvCallXmConnectBusUnit, busNumber,
69 (subBusNumber << 8) | deviceId, interruptToken, 0,
70 0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */);
85} 71}
86//===================================================================================== 72
87static inline u64 HvCallXm_loadTod(void) 73static inline u64 HvCallXm_loadTod(void)
88{ 74{
89 u64 retVal = HvCall0(HvCallXmLoadTod); 75 return HvCall0(HvCallXmLoadTod);
90 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
91 return retVal;
92} 76}
93//=====================================================================================
94 77
95#endif /* _HVCALLXM_H */ 78#endif /* _HVCALLXM_H */
diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-ppc64/iSeries/HvLpConfig.h
index bdbd70f42c9d..f1cf1e70ca3c 100644
--- a/include/asm-ppc64/iSeries/HvLpConfig.h
+++ b/include/asm-ppc64/iSeries/HvLpConfig.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvLpConfig.h 2 * HvLpConfig.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,262 +19,120 @@
19#ifndef _HVLPCONFIG_H 19#ifndef _HVLPCONFIG_H
20#define _HVLPCONFIG_H 20#define _HVLPCONFIG_H
21 21
22//=========================================================================== 22/*
23// 23 * This file contains the interface to the LPAR configuration data
24// This file contains the interface to the LPAR configuration data 24 * to determine which resources should be allocated to each partition.
25// to determine which resources should be allocated to each partition. 25 */
26//
27//===========================================================================
28 26
29#include <asm/iSeries/HvCallCfg.h> 27#include <asm/iSeries/HvCallSc.h>
30#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
31#include <asm/iSeries/ItLpNaca.h> 29#include <asm/iSeries/ItLpNaca.h>
32#include <asm/iSeries/LparData.h>
33 30
34//------------------------------------------------------------------- 31enum {
35// Constants 32 HvCallCfg_Cur = 0,
36//------------------------------------------------------------------- 33 HvCallCfg_Init = 1,
34 HvCallCfg_Max = 2,
35 HvCallCfg_Min = 3
36};
37
38#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
39#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
40#define HvCallCfgGetMsChunks HvCallCfg + 9
41#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
42#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
43#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
44#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
45#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
37 46
38extern HvLpIndex HvLpConfig_getLpIndex_outline(void); 47extern HvLpIndex HvLpConfig_getLpIndex_outline(void);
39 48
40//===================================================================
41static inline HvLpIndex HvLpConfig_getLpIndex(void) 49static inline HvLpIndex HvLpConfig_getLpIndex(void)
42{ 50{
43 return itLpNaca.xLpIndex; 51 return itLpNaca.xLpIndex;
44} 52}
45//=================================================================== 53
46static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void) 54static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void)
47{ 55{
48 return itLpNaca.xPrimaryLpIndex; 56 return itLpNaca.xPrimaryLpIndex;
49} 57}
50//================================================================= 58
51static inline HvLpIndex HvLpConfig_getLps(void) 59static inline u64 HvLpConfig_getMsChunks(void)
52{
53 return HvCallCfg_getLps();
54}
55//=================================================================
56static inline HvLpIndexMap HvLpConfig_getActiveLpMap(void)
57{
58 return HvCallCfg_getActiveLpMap();
59}
60//=================================================================
61static inline u64 HvLpConfig_getSystemMsMegs(void)
62{
63 return HvCallCfg_getSystemMsChunks() / HVCHUNKSPERMEG;
64}
65//=================================================================
66static inline u64 HvLpConfig_getSystemMsChunks(void)
67{
68 return HvCallCfg_getSystemMsChunks();
69}
70//=================================================================
71static inline u64 HvLpConfig_getSystemMsPages(void)
72{
73 return HvCallCfg_getSystemMsChunks() * HVPAGESPERCHUNK;
74}
75//================================================================
76static inline u64 HvLpConfig_getMsMegs(void)
77{
78 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) / HVCHUNKSPERMEG;
79}
80//================================================================
81static inline u64 HvLpConfig_getMsChunks(void)
82{
83 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
84}
85//================================================================
86static inline u64 HvLpConfig_getMsPages(void)
87{
88 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * HVPAGESPERCHUNK;
89}
90//================================================================
91static inline u64 HvLpConfig_getMinMsMegs(void)
92{
93 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) / HVCHUNKSPERMEG;
94}
95//================================================================
96static inline u64 HvLpConfig_getMinMsChunks(void)
97{
98 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min);
99}
100//================================================================
101static inline u64 HvLpConfig_getMinMsPages(void)
102{
103 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) * HVPAGESPERCHUNK;
104}
105//================================================================
106static inline u64 HvLpConfig_getMinRuntimeMsMegs(void)
107{
108 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) / HVCHUNKSPERMEG;
109}
110//===============================================================
111static inline u64 HvLpConfig_getMinRuntimeMsChunks(void)
112{
113 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex());
114}
115//===============================================================
116static inline u64 HvLpConfig_getMinRuntimeMsPages(void)
117{
118 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) * HVPAGESPERCHUNK;
119}
120//===============================================================
121static inline u64 HvLpConfig_getMaxMsMegs(void)
122{
123 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) / HVCHUNKSPERMEG;
124}
125//===============================================================
126static inline u64 HvLpConfig_getMaxMsChunks(void)
127{
128 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max);
129}
130//===============================================================
131static inline u64 HvLpConfig_getMaxMsPages(void)
132{
133 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) * HVPAGESPERCHUNK;
134}
135//===============================================================
136static inline u64 HvLpConfig_getInitMsMegs(void)
137{
138 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) / HVCHUNKSPERMEG;
139}
140//===============================================================
141static inline u64 HvLpConfig_getInitMsChunks(void)
142{
143 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init);
144}
145//===============================================================
146static inline u64 HvLpConfig_getInitMsPages(void)
147{ return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) * HVPAGESPERCHUNK;
148}
149//===============================================================
150static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
151{
152 return HvCallCfg_getSystemPhysicalProcessors();
153}
154//===============================================================
155static inline u64 HvLpConfig_getSystemLogicalProcessors(void)
156{
157 return HvCallCfg_getSystemPhysicalProcessors() * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
158}
159//===============================================================
160static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
161{
162 return HvCallCfg_getNumProcsInSharedPool(sPI);
163}
164//===============================================================
165static inline u64 HvLpConfig_getPhysicalProcessors(void)
166{
167 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
168}
169//===============================================================
170static inline u64 HvLpConfig_getLogicalProcessors(void)
171{
172 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
173}
174//===============================================================
175static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
176{
177 return HvCallCfg_getSharedPoolIndex(HvLpConfig_getLpIndex());
178}
179//===============================================================
180static inline u64 HvLpConfig_getSharedProcUnits(void)
181{
182 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
183}
184//===============================================================
185static inline u64 HvLpConfig_getMinSharedProcUnits(void)
186{
187 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Min);
188}
189//===============================================================
190static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
191{
192 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Max);
193}
194//===============================================================
195static inline u64 HvLpConfig_getMinPhysicalProcessors(void)
196{
197 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min);
198}
199//===============================================================
200static inline u64 HvLpConfig_getMinLogicalProcessors(void)
201{
202 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
203}
204//===============================================================
205static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
206{
207 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max);
208}
209//===============================================================
210static inline u64 HvLpConfig_getMaxLogicalProcessors(void)
211{
212 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
213}
214//===============================================================
215static inline u64 HvLpConfig_getInitPhysicalProcessors(void)
216{ 60{
217 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init); 61 return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(),
62 HvCallCfg_Cur);
218} 63}
219//=============================================================== 64
220static inline u64 HvLpConfig_getInitLogicalProcessors(void) 65static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
221{ 66{
222 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init) * (/*getPaca()->getSecondaryThreadCount() +*/ 1); 67 return HvCall0(HvCallCfgGetSystemPhysicalProcessors);
223} 68}
224//================================================================ 69
225static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void) 70static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
226{ 71{
227 return HvCallCfg_getVirtualLanIndexMap(HvLpConfig_getLpIndex_outline()); 72 return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI);
228} 73}
229//=============================================================== 74
230static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(HvLpIndex lp) 75static inline u64 HvLpConfig_getPhysicalProcessors(void)
231{ 76{
232 return HvCallCfg_getVirtualLanIndexMap(lp); 77 return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
78 HvCallCfg_Cur);
233} 79}
234//================================================================ 80
235static inline HvLpIndex HvLpConfig_getBusOwner(HvBusNumber busNumber) 81static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
236{ 82{
237 return HvCallCfg_getBusOwner(busNumber); 83 return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex());
238} 84}
239//=============================================================== 85
240static inline int HvLpConfig_isBusDedicated(HvBusNumber busNumber) 86static inline u64 HvLpConfig_getSharedProcUnits(void)
241{ 87{
242 return HvCallCfg_isBusDedicated(busNumber); 88 return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
89 HvCallCfg_Cur);
243} 90}
244//================================================================ 91
245static inline HvLpIndexMap HvLpConfig_getBusAllocation(HvBusNumber busNumber) 92static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
246{ 93{
247 return HvCallCfg_getBusAllocation(busNumber); 94 return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
95 HvCallCfg_Max);
248} 96}
249//================================================================ 97
250// returns the absolute real address of the load area 98static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
251static inline u64 HvLpConfig_getLoadAddress(void)
252{ 99{
253 return itLpNaca.xLoadAreaAddr & 0x7fffffffffffffff; 100 return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
101 HvCallCfg_Max);
254} 102}
255//================================================================ 103
256static inline u64 HvLpConfig_getLoadPages(void) 104static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(
257{ 105 HvLpIndex lp)
258 return itLpNaca.xLoadAreaChunks * HVPAGESPERCHUNK; 106{
107 /*
108 * This is a new function in V5R1 so calls to this on older
109 * hypervisors will return -1
110 */
111 u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
112 if (retVal == -1)
113 retVal = 0;
114 return retVal;
259} 115}
260//================================================================ 116
261static inline int HvLpConfig_isBusOwnedByThisLp(HvBusNumber busNumber) 117static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void)
262{ 118{
263 HvLpIndex busOwner = HvLpConfig_getBusOwner(busNumber); 119 return HvLpConfig_getVirtualLanIndexMapForLp(
264 return (busOwner == HvLpConfig_getLpIndex()); 120 HvLpConfig_getLpIndex_outline());
265} 121}
266//================================================================ 122
267static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1, HvLpIndex lp2) 123static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1,
124 HvLpIndex lp2)
268{ 125{
269 HvLpVirtualLanIndexMap virtualLanIndexMap1 = HvCallCfg_getVirtualLanIndexMap( lp1 ); 126 HvLpVirtualLanIndexMap virtualLanIndexMap1 =
270 HvLpVirtualLanIndexMap virtualLanIndexMap2 = HvCallCfg_getVirtualLanIndexMap( lp2 ); 127 HvLpConfig_getVirtualLanIndexMapForLp(lp1);
128 HvLpVirtualLanIndexMap virtualLanIndexMap2 =
129 HvLpConfig_getVirtualLanIndexMapForLp(lp2);
271 return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0); 130 return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0);
272} 131}
273//================================================================ 132
274static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp) 133static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
275{ 134{
276 return HvCallCfg_getHostingLpIndex(lp); 135 return HvCall1(HvCallCfgGetHostingLpIndex, lp);
277} 136}
278//================================================================
279 137
280#endif /* _HVLPCONFIG_H */ 138#endif /* _HVLPCONFIG_H */
diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-ppc64/iSeries/HvLpEvent.h
index 30936e433064..865000de79b6 100644
--- a/include/asm-ppc64/iSeries/HvLpEvent.h
+++ b/include/asm-ppc64/iSeries/HvLpEvent.h
@@ -1,27 +1,24 @@
1/* 1/*
2 * HvLpEvent.h 2 * HvLpEvent.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20//====================================================================== 20/* This file contains the class for HV events in the system. */
21// 21
22// This file contains the class for HV events in the system.
23//
24//=====================================================================
25#ifndef _HVLPEVENT_H 22#ifndef _HVLPEVENT_H
26#define _HVLPEVENT_H 23#define _HVLPEVENT_H
27 24
@@ -30,69 +27,70 @@
30#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
31#include <asm/iSeries/HvCallEvent.h> 28#include <asm/iSeries/HvCallEvent.h>
32 29
33//===================================================================== 30/*
34// 31 * HvLpEvent is the structure for Lp Event messages passed between
35// HvLpEvent is the structure for Lp Event messages passed between 32 * partitions through PLIC.
36// partitions through PLIC. 33 */
37// 34
38//===================================================================== 35struct HvEventFlags {
39 36 u8 xValid:1; /* Indicates a valid request x00-x00 */
40struct HvEventFlags 37 u8 xRsvd1:4; /* Reserved ... */
41{ 38 u8 xAckType:1; /* Immediate or deferred ... */
42 u8 xValid:1; // Indicates a valid request x00-x00 39 u8 xAckInd:1; /* Indicates if ACK required ... */
43 u8 xRsvd1:4; // Reserved ... 40 u8 xFunction:1; /* Interrupt or Acknowledge ... */
44 u8 xAckType:1; // Immediate or deferred ...
45 u8 xAckInd:1; // Indicates if ACK required ...
46 u8 xFunction:1; // Interrupt or Acknowledge ...
47}; 41};
48 42
49 43
50struct HvLpEvent 44struct HvLpEvent {
51{ 45 struct HvEventFlags xFlags; /* Event flags x00-x00 */
52 struct HvEventFlags xFlags; // Event flags x00-x00 46 u8 xType; /* Type of message x01-x01 */
53 u8 xType; // Type of message x01-x01 47 u16 xSubtype; /* Subtype for event x02-x03 */
54 u16 xSubtype; // Subtype for event x02-x03 48 u8 xSourceLp; /* Source LP x04-x04 */
55 u8 xSourceLp; // Source LP x04-x04 49 u8 xTargetLp; /* Target LP x05-x05 */
56 u8 xTargetLp; // Target LP x05-x05 50 u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */
57 u8 xSizeMinus1; // Size of Derived class - 1 x06-x06 51 u8 xRc; /* RC for Ack flows x07-x07 */
58 u8 xRc; // RC for Ack flows x07-x07 52 u16 xSourceInstanceId; /* Source sides instance id x08-x09 */
59 u16 xSourceInstanceId; // Source sides instance id x08-x09 53 u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */
60 u16 xTargetInstanceId; // Target sides instance id x0A-x0B
61 union { 54 union {
62 u32 xSubtypeData; // Data usable by the subtype x0C-x0F 55 u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */
63 u16 xSubtypeDataShort[2]; // Data as 2 shorts 56 u16 xSubtypeDataShort[2]; /* Data as 2 shorts */
64 u8 xSubtypeDataChar[4]; // Data as 4 chars 57 u8 xSubtypeDataChar[4]; /* Data as 4 chars */
65 } x; 58 } x;
66 59
67 u64 xCorrelationToken; // Unique value for source/type x10-x17 60 u64 xCorrelationToken; /* Unique value for source/type x10-x17 */
68}; 61};
69 62
70// Lp Event handler function
71typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *); 63typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *);
72 64
73// Register a handler for an event type 65/* Register a handler for an event type - returns 0 on success */
74// returns 0 on success 66extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType,
75extern int HvLpEvent_registerHandler( HvLpEvent_Type eventType, LpEventHandler hdlr); 67 LpEventHandler hdlr);
76
77// Unregister a handler for an event type
78// This call will sleep until the handler being removed is guaranteed to
79// be no longer executing on any CPU. Do not call with locks held.
80//
81// returns 0 on success
82// Unregister will fail if there are any paths open for the type
83extern int HvLpEvent_unregisterHandler( HvLpEvent_Type eventType );
84 68
85// Open an Lp Event Path for an event type 69/*
86// returns 0 on success 70 * Unregister a handler for an event type
87// openPath will fail if there is no handler registered for the event type. 71 *
88// The lpIndex specified is the partition index for the target partition 72 * This call will sleep until the handler being removed is guaranteed to
89// (for VirtualIo, VirtualLan and SessionMgr) other types specify zero) 73 * be no longer executing on any CPU. Do not call with locks held.
90extern int HvLpEvent_openPath( HvLpEvent_Type eventType, HvLpIndex lpIndex ); 74 *
75 * returns 0 on success
76 * Unregister will fail if there are any paths open for the type
77 */
78extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType);
91 79
80/*
81 * Open an Lp Event Path for an event type
82 * returns 0 on success
83 * openPath will fail if there is no handler registered for the event type.
84 * The lpIndex specified is the partition index for the target partition
85 * (for VirtualIo, VirtualLan and SessionMgr) other types specify zero)
86 */
87extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
92 88
93// Close an Lp Event Path for a type and partition 89/*
94// returns 0 on sucess 90 * Close an Lp Event Path for a type and partition
95extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex ); 91 * returns 0 on sucess
92 */
93extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
96 94
97#define HvLpEvent_Type_Hypervisor 0 95#define HvLpEvent_Type_Hypervisor 0
98#define HvLpEvent_Type_MachineFac 1 96#define HvLpEvent_Type_MachineFac 1
@@ -141,4 +139,4 @@ extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex );
141#define HvLpDma_Rc_InvalidAddress 4 139#define HvLpDma_Rc_InvalidAddress 4
142#define HvLpDma_Rc_InvalidLength 5 140#define HvLpDma_Rc_InvalidLength 5
143 141
144#endif // _HVLPEVENT_H 142#endif /* _HVLPEVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvReleaseData.h b/include/asm-ppc64/iSeries/HvReleaseData.h
index 183e5e738c26..01a1f13ea4a0 100644
--- a/include/asm-ppc64/iSeries/HvReleaseData.h
+++ b/include/asm-ppc64/iSeries/HvReleaseData.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvReleaseData.h 2 * HvReleaseData.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,47 +19,45 @@
19#ifndef _HVRELEASEDATA_H 19#ifndef _HVRELEASEDATA_H
20#define _HVRELEASEDATA_H 20#define _HVRELEASEDATA_H
21 21
22//============================================================================= 22/*
23// 23 * This control block contains the critical information about the
24// This control block contains the critical information about the 24 * release so that it can be changed in the future (ie, the virtual
25// release so that it can be changed in the future (ie, the virtual 25 * address of the OS's NACA).
26// address of the OS's NACA). 26 */
27//
28#include <asm/types.h> 27#include <asm/types.h>
29#include <asm/naca.h> 28#include <asm/naca.h>
30 29
31//============================================================================= 30/*
32// 31 * When we IPL a secondary partition, we will check if if the
33// When we IPL a secondary partition, we will check if if the 32 * secondary xMinPlicVrmIndex > the primary xVrmIndex.
34// secondary xMinPlicVrmIndex > the primary xVrmIndex. 33 * If it is then this tells PLIC that this secondary is not
35// If it is then this tells PLIC that this secondary is not 34 * supported running on this "old" of a level of PLIC.
36// supported running on this "old" of a level of PLIC. 35 *
37// 36 * Likewise, we will compare the primary xMinSlicVrmIndex to
38// Likewise, we will compare the primary xMinSlicVrmIndex to 37 * the secondary xVrmIndex.
39// the secondary xVrmIndex. 38 * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
40// If the primary xMinSlicVrmDelta > secondary xVrmDelta then we 39 * know that this PLIC does not support running an OS "that old".
41// know that this PLIC does not support running an OS "that old". 40 */
42//
43//=============================================================================
44 41
45struct HvReleaseData 42struct HvReleaseData {
46{ 43 u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */
47 u32 xDesc; // Descriptor "HvRD" ebcdic x00-x03 44 u16 xSize; /* Size of this control block x04-x05 */
48 u16 xSize; // Size of this control block x04-x05 45 u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */
49 u16 xVpdAreasPtrOffset; // Offset in NACA of ItVpdAreas x06-x07 46 struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
50 struct naca_struct * xSlicNacaAddr; // Virt addr of SLIC NACA x08-x0F 47 u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
51 u32 xMsNucDataOffset; // Offset of Linux Mapping Data x10-x13 48 u32 xRsvd1; /* Reserved x14-x17 */
52 u32 xRsvd1; // Reserved x14-x17 49 u16 xTagsMode:1; /* 0 == tags active, 1 == tags inactive */
53 u16 xTagsMode:1; // 0 == tags active, 1 == tags inactive 50 u16 xAddressSize:1; /* 0 == 64-bit, 1 == 32-bit */
54 u16 xAddressSize:1; // 0 == 64-bit, 1 == 32-bit 51 u16 xNoSharedProcs:1; /* 0 == shared procs, 1 == no shared */
55 u16 xNoSharedProcs:1; // 0 == shared procs, 1 == no shared 52 u16 xNoHMT:1; /* 0 == allow HMT, 1 == no HMT */
56 u16 xNoHMT:1; // 0 == allow HMT, 1 == no HMT 53 u16 xRsvd2:12; /* Reserved x18-x19 */
57 u16 xRsvd2:12; // Reserved x18-x19 54 u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */
58 u16 xVrmIndex; // VRM Index of OS image x1A-x1B 55 u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */
59 u16 xMinSupportedPlicVrmIndex;// Min PLIC level (soft) x1C-x1D 56 u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
60 u16 xMinCompatablePlicVrmIndex;// Min PLIC levelP (hard) x1E-x1F 57 char xVrmName[12]; /* Displayable name x20-x2B */
61 char xVrmName[12]; // Displayable name x20-x2B 58 char xRsvd3[20]; /* Reserved x2C-x3F */
62 char xRsvd3[20]; // Reserved x2C-x3F
63}; 59};
64 60
61extern struct HvReleaseData hvReleaseData;
62
65#endif /* _HVRELEASEDATA_H */ 63#endif /* _HVRELEASEDATA_H */
diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-ppc64/iSeries/HvTypes.h
index 3ec49c1aec32..b1ef2b4cb3e3 100644
--- a/include/asm-ppc64/iSeries/HvTypes.h
+++ b/include/asm-ppc64/iSeries/HvTypes.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvTypes.h 2 * HvTypes.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,74 +19,60 @@
19#ifndef _HVTYPES_H 19#ifndef _HVTYPES_H
20#define _HVTYPES_H 20#define _HVTYPES_H
21 21
22//=========================================================================== 22/*
23// Header File Id 23 * General typedefs for the hypervisor.
24// Name______________: HvTypes.H 24 */
25//
26// Description_______:
27//
28// General typedefs for the hypervisor.
29//
30// Declared Class(es):
31//
32//===========================================================================
33 25
34#include <asm/types.h> 26#include <asm/types.h>
35 27
36//-------------------------------------------------------------------
37// Typedefs
38//-------------------------------------------------------------------
39typedef u8 HvLpIndex; 28typedef u8 HvLpIndex;
40typedef u16 HvLpInstanceId; 29typedef u16 HvLpInstanceId;
41typedef u64 HvLpTOD; 30typedef u64 HvLpTOD;
42typedef u64 HvLpSystemSerialNum; 31typedef u64 HvLpSystemSerialNum;
43typedef u8 HvLpDeviceSerialNum[12]; 32typedef u8 HvLpDeviceSerialNum[12];
44typedef u16 HvLpSanHwSet; 33typedef u16 HvLpSanHwSet;
45typedef u16 HvLpBus; 34typedef u16 HvLpBus;
46typedef u16 HvLpBoard; 35typedef u16 HvLpBoard;
47typedef u16 HvLpCard; 36typedef u16 HvLpCard;
48typedef u8 HvLpDeviceType[4]; 37typedef u8 HvLpDeviceType[4];
49typedef u8 HvLpDeviceModel[3]; 38typedef u8 HvLpDeviceModel[3];
50typedef u64 HvIoToken; 39typedef u64 HvIoToken;
51typedef u8 HvLpName[8]; 40typedef u8 HvLpName[8];
52typedef u32 HvIoId; 41typedef u32 HvIoId;
53typedef u64 HvRealMemoryIndex; 42typedef u64 HvRealMemoryIndex;
54typedef u32 HvLpIndexMap; // Must hold HvMaxArchitectedLps bits!!! 43typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */
55typedef u16 HvLpVrmIndex; 44typedef u16 HvLpVrmIndex;
56typedef u32 HvXmGenerationId; 45typedef u32 HvXmGenerationId;
57typedef u8 HvLpBusPool; 46typedef u8 HvLpBusPool;
58typedef u8 HvLpSharedPoolIndex; 47typedef u8 HvLpSharedPoolIndex;
59typedef u16 HvLpSharedProcUnitsX100; 48typedef u16 HvLpSharedProcUnitsX100;
60typedef u8 HvLpVirtualLanIndex; 49typedef u8 HvLpVirtualLanIndex;
61typedef u16 HvLpVirtualLanIndexMap; // Must hold HvMaxArchitectedVirtualLans bits!!! 50typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */
62typedef u16 HvBusNumber; // Hypervisor Bus Number 51typedef u16 HvBusNumber; /* Hypervisor Bus Number */
63typedef u8 HvSubBusNumber; // Hypervisor SubBus Number 52typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */
64typedef u8 HvAgentId; // Hypervisor DevFn 53typedef u8 HvAgentId; /* Hypervisor DevFn */
54
65 55
56#define HVMAXARCHITECTEDLPS 32
57#define HVMAXARCHITECTEDVIRTUALLANS 16
58#define HVMAXARCHITECTEDVIRTUALDISKS 32
59#define HVMAXARCHITECTEDVIRTUALCDROMS 8
60#define HVMAXARCHITECTEDVIRTUALTAPES 8
61#define HVCHUNKSIZE (256 * 1024)
62#define HVPAGESIZE (4 * 1024)
63#define HVLPMINMEGSPRIMARY 256
64#define HVLPMINMEGSSECONDARY 64
65#define HVCHUNKSPERMEG 4
66#define HVPAGESPERMEG 256
67#define HVPAGESPERCHUNK 64
66 68
67#define HVMAXARCHITECTEDLPS 32
68#define HVMAXARCHITECTEDVIRTUALLANS 16
69#define HVMAXARCHITECTEDVIRTUALDISKS 32
70#define HVMAXARCHITECTEDVIRTUALCDROMS 8
71#define HVMAXARCHITECTEDVIRTUALTAPES 8
72#define HVCHUNKSIZE 256 * 1024
73#define HVPAGESIZE 4 * 1024
74#define HVLPMINMEGSPRIMARY 256
75#define HVLPMINMEGSSECONDARY 64
76#define HVCHUNKSPERMEG 4
77#define HVPAGESPERMEG 256
78#define HVPAGESPERCHUNK 64
79
80#define HvMaxArchitectedLps ((HvLpIndex)HVMAXARCHITECTEDLPS)
81#define HvMaxArchitectedVirtualLans ((HvLpVirtualLanIndex)16)
82#define HvLpIndexInvalid ((HvLpIndex)0xff) 69#define HvLpIndexInvalid ((HvLpIndex)0xff)
83 70
84//-------------------------------------------------------------------- 71/*
85// Enums for the sub-components under PLIC 72 * Enums for the sub-components under PLIC
86// Used in HvCall and HvPrimaryCall 73 * Used in HvCall and HvPrimaryCall
87//-------------------------------------------------------------------- 74 */
88enum HvCallCompIds 75enum {
89{
90 HvCallCompId = 0, 76 HvCallCompId = 0,
91 HvCallCpuCtlsCompId = 1, 77 HvCallCpuCtlsCompId = 1,
92 HvCallCfgCompId = 2, 78 HvCallCfgCompId = 2,
@@ -97,18 +83,18 @@ enum HvCallCompIds
97 HvCallSmCompId = 7, 83 HvCallSmCompId = 7,
98 HvCallSpdCompId = 8, 84 HvCallSpdCompId = 8,
99 HvCallXmCompId = 9, 85 HvCallXmCompId = 9,
100 HvCallRioCompId = 10, 86 HvCallRioCompId = 10,
101 HvCallRsvd3CompId = 11, 87 HvCallRsvd3CompId = 11,
102 HvCallRsvd2CompId = 12, 88 HvCallRsvd2CompId = 12,
103 HvCallRsvd1CompId = 13, 89 HvCallRsvd1CompId = 13,
104 HvCallMaxCompId = 14, 90 HvCallMaxCompId = 14,
105 HvPrimaryCallCompId = 0, 91 HvPrimaryCallCompId = 0,
106 HvPrimaryCallCfgCompId = 1, 92 HvPrimaryCallCfgCompId = 1,
107 HvPrimaryCallPciCompId = 2, 93 HvPrimaryCallPciCompId = 2,
108 HvPrimaryCallSmCompId = 3, 94 HvPrimaryCallSmCompId = 3,
109 HvPrimaryCallSpdCompId = 4, 95 HvPrimaryCallSpdCompId = 4,
110 HvPrimaryCallXmCompId = 5, 96 HvPrimaryCallXmCompId = 5,
111 HvPrimaryCallRioCompId = 6, 97 HvPrimaryCallRioCompId = 6,
112 HvPrimaryCallRsvd7CompId = 7, 98 HvPrimaryCallRsvd7CompId = 7,
113 HvPrimaryCallRsvd6CompId = 8, 99 HvPrimaryCallRsvd6CompId = 8,
114 HvPrimaryCallRsvd5CompId = 9, 100 HvPrimaryCallRsvd5CompId = 9,
@@ -116,7 +102,7 @@ enum HvCallCompIds
116 HvPrimaryCallRsvd3CompId = 11, 102 HvPrimaryCallRsvd3CompId = 11,
117 HvPrimaryCallRsvd2CompId = 12, 103 HvPrimaryCallRsvd2CompId = 12,
118 HvPrimaryCallRsvd1CompId = 13, 104 HvPrimaryCallRsvd1CompId = 13,
119 HvPrimaryCallMaxCompId = HvCallMaxCompId 105 HvPrimaryCallMaxCompId = HvCallMaxCompId
120}; 106};
121 107
122struct HvLpBufferList { 108struct HvLpBufferList {
diff --git a/include/asm-ppc64/iSeries/IoHriMainStore.h b/include/asm-ppc64/iSeries/IoHriMainStore.h
index ff00e865f620..45ed3ea67d06 100644
--- a/include/asm-ppc64/iSeries/IoHriMainStore.h
+++ b/include/asm-ppc64/iSeries/IoHriMainStore.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * IoHriMainStore.h 2 * IoHriMainStore.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,7 +21,7 @@
21#define _IOHRIMAINSTORE_H 21#define _IOHRIMAINSTORE_H
22 22
23/* Main Store Vpd for Condor,iStar,sStar */ 23/* Main Store Vpd for Condor,iStar,sStar */
24struct IoHriMainStoreSegment4 { 24struct IoHriMainStoreSegment4 {
25 u8 msArea0Exists:1; 25 u8 msArea0Exists:1;
26 u8 msArea1Exists:1; 26 u8 msArea1Exists:1;
27 u8 msArea2Exists:1; 27 u8 msArea2Exists:1;
@@ -51,7 +51,7 @@ struct IoHriMainStoreSegment4 {
51 u8 msArea1HasRiserVpd:1; 51 u8 msArea1HasRiserVpd:1;
52 u8 msArea2HasRiserVpd:1; 52 u8 msArea2HasRiserVpd:1;
53 u8 msArea3HasRiserVpd:1; 53 u8 msArea3HasRiserVpd:1;
54 u8 reserved5:4; 54 u8 reserved5:4;
55 u8 reserved6; 55 u8 reserved6;
56 u16 reserved7; 56 u16 reserved7;
57 57
@@ -82,8 +82,8 @@ struct IoHriMainStoreVpdFruData {
82}; 82};
83 83
84struct IoHriMainStoreAdrRangeBlock { 84struct IoHriMainStoreAdrRangeBlock {
85 void * blockStart __attribute((packed)); 85 void *blockStart __attribute((packed));
86 void * blockEnd __attribute((packed)); 86 void *blockEnd __attribute((packed));
87 u32 blockProcChipId __attribute((packed)); 87 u32 blockProcChipId __attribute((packed));
88}; 88};
89 89
@@ -102,7 +102,7 @@ struct IoHriMainStoreArea4 {
102 u32 procNodeId __attribute((packed)); 102 u32 procNodeId __attribute((packed));
103 103
104 u32 numAdrRangeBlocks __attribute((packed)); 104 u32 numAdrRangeBlocks __attribute((packed));
105 struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed)); 105 struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
106 106
107 struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed)); 107 struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
108 struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed)); 108 struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
@@ -113,17 +113,17 @@ struct IoHriMainStoreArea4 {
113 struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed)); 113 struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
114 struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed)); 114 struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
115 115
116 void * msRamAreaArray __attribute((packed)); 116 void *msRamAreaArray __attribute((packed));
117 u32 msRamAreaArrayNumEntries __attribute((packed)); 117 u32 msRamAreaArrayNumEntries __attribute((packed));
118 u32 msRamAreaArrayEntrySize __attribute((packed)); 118 u32 msRamAreaArrayEntrySize __attribute((packed));
119 119
120 u32 numaDimmExists __attribute((packed)); 120 u32 numaDimmExists __attribute((packed));
121 u32 numaDimmFunctional __attribute((packed)); 121 u32 numaDimmFunctional __attribute((packed));
122 void * numaDimmArray __attribute((packed)); 122 void *numaDimmArray __attribute((packed));
123 u32 numaDimmArrayNumEntries __attribute((packed)); 123 u32 numaDimmArrayNumEntries __attribute((packed));
124 u32 numaDimmArrayEntrySize __attribute((packed)); 124 u32 numaDimmArrayEntrySize __attribute((packed));
125 125
126 struct IoHriMainStoreVpdIdData idData __attribute((packed)); 126 struct IoHriMainStoreVpdIdData idData __attribute((packed));
127 127
128 u64 powerData __attribute((packed)); 128 u64 powerData __attribute((packed));
129 u64 cardAssemblyPartNum __attribute((packed)); 129 u64 cardAssemblyPartNum __attribute((packed));
@@ -143,7 +143,7 @@ struct IoHriMainStoreArea4 {
143}; 143};
144 144
145 145
146struct IoHriMainStoreSegment5 { 146struct IoHriMainStoreSegment5 {
147 u16 reserved1; 147 u16 reserved1;
148 u8 reserved2; 148 u8 reserved2;
149 u8 msVpdFormat; 149 u8 msVpdFormat;
@@ -151,17 +151,16 @@ struct IoHriMainStoreSegment5 {
151 u32 totalMainStore; 151 u32 totalMainStore;
152 u64 maxConfiguredMsAdr; 152 u64 maxConfiguredMsAdr;
153 153
154 struct IoHriMainStoreArea4* msAreaArray; 154 struct IoHriMainStoreArea4 *msAreaArray;
155 u32 msAreaArrayNumEntries; 155 u32 msAreaArrayNumEntries;
156 u32 msAreaArrayEntrySize; 156 u32 msAreaArrayEntrySize;
157 157
158 u32 msAreaExists; 158 u32 msAreaExists;
159 u32 msAreaFunctional; 159 u32 msAreaFunctional;
160 160
161 u64 reserved3; 161 u64 reserved3;
162}; 162};
163 163
164extern u64 xMsVpd[];
164 165
165 166#endif /* _IOHRIMAINSTORE_H */
166#endif // _IOHRIMAINSTORE_H
167
diff --git a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
index 965433888653..73b73d80b8b1 100644
--- a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
+++ b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * IoHriProcessorVpd.h 2 * IoHriProcessorVpd.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,16 +19,12 @@
19#ifndef _IOHRIPROCESSORVPD_H 19#ifndef _IOHRIPROCESSORVPD_H
20#define _IOHRIPROCESSORVPD_H 20#define _IOHRIPROCESSORVPD_H
21 21
22//===================================================================
23//
24// This struct maps Processor Vpd that is DMAd to SLIC by CSP
25//
26
27#include <asm/types.h> 22#include <asm/types.h>
28 23
29struct IoHriProcessorVpd 24/*
30{ 25 * This struct maps Processor Vpd that is DMAd to SLIC by CSP
31 26 */
27struct IoHriProcessorVpd {
32 u8 xFormat; // VPD format indicator x00-x00 28 u8 xFormat; // VPD format indicator x00-x00
33 u8 xProcStatus:8; // Processor State x01-x01 29 u8 xProcStatus:8; // Processor State x01-x01
34 u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02 30 u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
@@ -40,12 +36,12 @@ struct IoHriProcessorVpd
40 u16 xRsvd2; // Reserved x06-x07 36 u16 xRsvd2; // Reserved x06-x07
41 u32 xHwNodeId; // Hardware node id x08-x0B 37 u32 xHwNodeId; // Hardware node id x08-x0B
42 u32 xHwProcId; // Hardware processor id x0C-x0F 38 u32 xHwProcId; // Hardware processor id x0C-x0F
43 39
44 u32 xTypeNum; // Card Type/CCIN number x10-x13 40 u32 xTypeNum; // Card Type/CCIN number x10-x13
45 u32 xModelNum; // Model/Feature number x14-x17 41 u32 xModelNum; // Model/Feature number x14-x17
46 u64 xSerialNum; // Serial number x18-x1F 42 u64 xSerialNum; // Serial number x18-x1F
47 char xPartNum[12]; // Book Part or FPU number x20-x2B 43 char xPartNum[12]; // Book Part or FPU number x20-x2B
48 char xMfgID[4]; // Manufacturing ID x2C-x2F 44 char xMfgID[4]; // Manufacturing ID x2C-x2F
49 45
50 u32 xProcFreq; // Processor Frequency x30-x33 46 u32 xProcFreq; // Processor Frequency x30-x33
51 u32 xTimeBaseFreq; // Time Base Frequency x34-x37 47 u32 xTimeBaseFreq; // Time Base Frequency x34-x37
@@ -71,7 +67,7 @@ struct IoHriProcessorVpd
71 u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83 67 u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83
72 u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87 68 u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87
73 u64 xRsvd6; // Reserved x88-x8F 69 u64 xRsvd6; // Reserved x88-x8F
74 70
75 u64 xFruLabel; // Card Location Label x90-x97 71 u64 xFruLabel; // Card Location Label x90-x97
76 u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98 72 u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98
77 u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99 73 u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99
@@ -79,10 +75,12 @@ struct IoHriProcessorVpd
79 u8 xSmartCardPortNo; // Smart card port number x9C-x9C 75 u8 xSmartCardPortNo; // Smart card port number x9C-x9C
80 u8 xRsvd7; // Reserved x9D-x9D 76 u8 xRsvd7; // Reserved x9D-x9D
81 u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F 77 u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F
82 78
83 u8 xRsvd8[24]; // Reserved xA0-xB7 79 u8 xRsvd8[24]; // Reserved xA0-xB7
84 80
85 char xProcSrc[72]; // CSP format SRC xB8-xFF 81 char xProcSrc[72]; // CSP format SRC xB8-xFF
86}; 82};
87 83
84extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
85
88#endif /* _IOHRIPROCESSORVPD_H */ 86#endif /* _IOHRIPROCESSORVPD_H */
diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-ppc64/iSeries/ItExtVpdPanel.h
index dee6b1273031..4c546a8802b4 100644
--- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h
+++ b/include/asm-ppc64/iSeries/ItExtVpdPanel.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItExtVpdPanel.h 2 * ItExtVpdPanel.h
3 * Copyright (C) 2002 Dave Boutcher IBM Corporation 3 * Copyright (C) 2002 Dave Boutcher IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -20,39 +20,33 @@
20#define _ITEXTVPDPANEL_H 20#define _ITEXTVPDPANEL_H
21 21
22/* 22/*
23 * 23 * This struct maps the panel information
24 * This struct maps the panel information
25 * 24 *
26 * Warning: 25 * Warning:
27 * This data must match the architecture for the panel information 26 * This data must match the architecture for the panel information
28 *
29 */ 27 */
30 28
31
32/*-------------------------------------------------------------------
33 * Standard Includes
34 *-------------------------------------------------------------------
35*/
36#include <asm/types.h> 29#include <asm/types.h>
37 30
38struct ItExtVpdPanel 31struct ItExtVpdPanel {
39{ 32 /* Definition of the Extended Vpd On Panel Data Area */
40 // Definition of the Extended Vpd On Panel Data Area 33 char systemSerial[8];
41 char systemSerial[8]; 34 char mfgID[4];
42 char mfgID[4]; 35 char reserved1[24];
43 char reserved1[24]; 36 char machineType[4];
44 char machineType[4]; 37 char systemID[6];
45 char systemID[6]; 38 char somUniqueCnt[4];
46 char somUniqueCnt[4]; 39 char serialNumberCount;
47 char serialNumberCount; 40 char reserved2[7];
48 char reserved2[7]; 41 u16 bbu3;
49 u16 bbu3; 42 u16 bbu2;
50 u16 bbu2; 43 u16 bbu1;
51 u16 bbu1; 44 char xLocationLabel[8];
52 char xLocationLabel[8]; 45 u8 xRsvd1[6];
53 u8 xRsvd1[6]; 46 u16 xFrameId;
54 u16 xFrameId; 47 u8 xRsvd2[48];
55 u8 xRsvd2[48];
56}; 48};
57 49
58#endif /* _ITEXTVPDPANEL_H */ 50extern struct ItExtVpdPanel xItExtVpdPanel;
51
52#endif /* _ITEXTVPDPANEL_H */
diff --git a/include/asm-ppc64/iSeries/ItIplParmsReal.h b/include/asm-ppc64/iSeries/ItIplParmsReal.h
index 4d8b430ab12d..ae3417dc599e 100644
--- a/include/asm-ppc64/iSeries/ItIplParmsReal.h
+++ b/include/asm-ppc64/iSeries/ItIplParmsReal.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItIplParmsReal.h 2 * ItIplParmsReal.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,58 +19,53 @@
19#ifndef _ITIPLPARMSREAL_H 19#ifndef _ITIPLPARMSREAL_H
20#define _ITIPLPARMSREAL_H 20#define _ITIPLPARMSREAL_H
21 21
22//============================================================================== 22/*
23// 23 * This struct maps the IPL Parameters DMA'd from the SP.
24// This struct maps the IPL Parameters DMA'd from the SP. 24 *
25// 25 * Warning:
26// Warning: 26 * This data must map in exactly 64 bytes and match the architecture for
27// This data must map in exactly 64 bytes and match the architecture for 27 * the IPL parms
28// the IPL parms 28 */
29//
30//=============================================================================
31
32 29
33//-------------------------------------------------------------------
34// Standard Includes
35//-------------------------------------------------------------------
36#include <asm/types.h> 30#include <asm/types.h>
37 31
38struct ItIplParmsReal 32struct ItIplParmsReal {
39{ 33 u8 xFormat; // Defines format of IplParms x00-x00
40 u8 xFormat; // Defines format of IplParms x00-x00 34 u8 xRsvd01:6; // Reserved x01-x01
41 u8 xRsvd01:6; // Reserved x01-x01 35 u8 xAlternateSearch:1; // Alternate search indicator ...
42 u8 xAlternateSearch:1; // Alternate search indicator ... 36 u8 xUaSupplied:1; // UA Supplied on programmed IPL...
43 u8 xUaSupplied:1; // UA Supplied on programmed IPL ... 37 u8 xLsUaFormat; // Format byte for UA x02-x02
44 u8 xLsUaFormat; // Format byte for UA x02-x02 38 u8 xRsvd02; // Reserved x03-x03
45 u8 xRsvd02; // Reserved x03-x03 39 u32 xLsUa; // LS UA x04-x07
46 u32 xLsUa; // LS UA x04-x07 40 u32 xUnusedLsLid; // First OS LID to load x08-x0B
47 u32 xUnusedLsLid; // First OS LID to load x08-x0B 41 u16 xLsBusNumber; // LS Bus Number x0C-x0D
48 u16 xLsBusNumber; // LS Bus Number x0C-x0D 42 u8 xLsCardAdr; // LS Card Address x0E-x0E
49 u8 xLsCardAdr; // LS Card Address x0E-x0E 43 u8 xLsBoardAdr; // LS Board Address x0F-x0F
50 u8 xLsBoardAdr; // LS Board Address x0F-x0F 44 u32 xRsvd03; // Reserved x10-x13
51 u32 xRsvd03; // Reserved x10-x13 45 u8 xSpcnPresent:1; // SPCN present x14-x14
52 u8 xSpcnPresent:1; // SPCN present x14-x14 46 u8 xCpmPresent:1; // CPM present ...
53 u8 xCpmPresent:1; // CPM present ... 47 u8 xRsvd04:6; // Reserved ...
54 u8 xRsvd04:6; // Reserved ... 48 u8 xRsvd05:4; // Reserved x15-x15
55 u8 xRsvd05:4; // Reserved x15-x15 49 u8 xKeyLock:4; // Keylock setting ...
56 u8 xKeyLock:4; // Keylock setting ... 50 u8 xRsvd06:6; // Reserved x16-x16
57 u8 xRsvd06:6; // Reserved x16-x16 51 u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
58 u8 xIplMode:2; // Ipl mode (A|B|C|D) ... 52 u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
59 u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17 53 u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19
60 u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiated x18-x19 54 u16 xPowerOnResetIpl:1; // Indicate POR condition ...
61 u16 xPowerOnResetIpl:1; // Indicate POR condition ... 55 u16 xMainStorePreserved:1; // Main Storage is preserved ...
62 u16 xMainStorePreserved:1; // Main Storage is preserved ... 56 u16 xRsvd07:13; // Reserved ...
63 u16 xRsvd07:13; // Reserved ... 57 u16 xIplSource:16; // Ipl source x1A-x1B
64 u16 xIplSource:16; // Ipl source x1A-x1B 58 u8 xIplReason:8; // Reason for this IPL x1C-x1C
65 u8 xIplReason:8; // Reason for this IPL x1C-x1C 59 u8 xRsvd08; // Reserved x1D-x1D
66 u8 xRsvd08; // Reserved x1D-x1D 60 u16 xRsvd09; // Reserved x1E-x1F
67 u16 xRsvd09; // Reserved x1E-x1F 61 u16 xSysBoxType; // System Box Type x20-x21
68 u16 xSysBoxType; // System Box Type x20-x21 62 u16 xSysProcType; // System Processor Type x22-x23
69 u16 xSysProcType; // System Processor Type x22-x23 63 u32 xRsvd10; // Reserved x24-x27
70 u32 xRsvd10; // Reserved x24-x27 64 u64 xRsvd11; // Reserved x28-x2F
71 u64 xRsvd11; // Reserved x28-x2F 65 u64 xRsvd12; // Reserved x30-x37
72 u64 xRsvd12; // Reserved x30-x37 66 u64 xRsvd13; // Reserved x38-x3F
73 u64 xRsvd13; // Reserved x38-x3F
74}; 67};
75 68
69extern struct ItIplParmsReal xItIplParmsReal;
70
76#endif /* _ITIPLPARMSREAL_H */ 71#endif /* _ITIPLPARMSREAL_H */
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-ppc64/iSeries/ItLpNaca.h
index 5baffddfae1b..225d0176779d 100644
--- a/include/asm-ppc64/iSeries/ItLpNaca.h
+++ b/include/asm-ppc64/iSeries/ItLpNaca.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpNaca.h 2 * ItLpNaca.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,18 +19,15 @@
19#ifndef _ITLPNACA_H 19#ifndef _ITLPNACA_H
20#define _ITLPNACA_H 20#define _ITLPNACA_H
21 21
22//============================================================================= 22#include <linux/types.h>
23//
24// This control block contains the data that is shared between the
25// hypervisor (PLIC) and the OS.
26//
27//=============================================================================
28 23
29struct ItLpNaca 24/*
30{ 25 * This control block contains the data that is shared between the
31//============================================================================= 26 * hypervisor (PLIC) and the OS.
27 */
28
29struct ItLpNaca {
32// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 30// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
33//=============================================================================
34 u32 xDesc; // Eye catcher x00-x03 31 u32 xDesc; // Eye catcher x00-x03
35 u16 xSize; // Size of this class x04-x05 32 u16 xSize; // Size of this class x04-x05
36 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 33 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
@@ -59,30 +56,25 @@ struct ItLpNaca
59 u64 xLoadAreaAddr; // ER address of load area x28-x2F 56 u64 xLoadAreaAddr; // ER address of load area x28-x2F
60 u32 xLoadAreaChunks; // Chunks for the load area x30-x33 57 u32 xLoadAreaChunks; // Chunks for the load area x30-x33
61 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 58 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
62 // doing an ASR switch on PASE 59 // doing an ASR switch on PASE
63 // system call. 60 // system call.
64 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f 61 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
65 u8 xRsvd1_4[64]; // x40-x7F 62 u8 xRsvd1_4[64]; // x40-x7F
66 63
67//=============================================================================
68// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data 64// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
69//=============================================================================
70 u8 xRsvd2_0[128]; // Reserved x00-x7F 65 u8 xRsvd2_0[128]; // Reserved x00-x7F
71 66
72//=============================================================================
73// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators 67// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
74// NB: Padding required to keep xInterrruptHdlr at x300 which is required 68// NB: Padding required to keep xInterrruptHdlr at x300 which is required
75// for v4r4 PLIC. 69// for v4r4 PLIC.
76//=============================================================================
77 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F 70 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
78 u8 xRsvd3_0[384]; // Reserved 180-2FF 71 u8 xRsvd3_0[384]; // Reserved 180-2FF
79//============================================================================= 72
80// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt 73// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
81// handlers 74// handlers
82//=============================================================================
83 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF 75 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
84}; 76};
85 77
86//============================================================================= 78extern struct ItLpNaca itLpNaca;
87 79
88#endif /* _ITLPNACA_H */ 80#endif /* _ITLPNACA_H */
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-ppc64/iSeries/ItLpQueue.h
index 4f4dde2a638d..393299e04d7f 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-ppc64/iSeries/ItLpQueue.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpQueue.h 2 * ItLpQueue.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,54 +19,54 @@
19#ifndef _ITLPQUEUE_H 19#ifndef _ITLPQUEUE_H
20#define _ITLPQUEUE_H 20#define _ITLPQUEUE_H
21 21
22//============================================================================= 22/*
23// 23 * This control block defines the simple LP queue structure that is
24// This control block defines the simple LP queue structure that is 24 * shared between the hypervisor (PLIC) and the OS in order to send
25// shared between the hypervisor (PLIC) and the OS in order to send 25 * events to an LP.
26// events to an LP. 26 */
27//
28 27
29#include <asm/types.h> 28#include <asm/types.h>
30#include <asm/ptrace.h> 29#include <asm/ptrace.h>
31 30
32struct HvLpEvent; 31struct HvLpEvent;
33 32
34#define ITMaxLpQueues 8 33#define ITMaxLpQueues 8
35 34
36#define NotUsed 0 // Queue will not be used by PLIC 35#define NotUsed 0 // Queue will not be used by PLIC
37#define DedicatedIo 1 // Queue dedicated to IO processor specified 36#define DedicatedIo 1 // Queue dedicated to IO processor specified
38#define DedicatedLp 2 // Queue dedicated to LP specified 37#define DedicatedLp 2 // Queue dedicated to LP specified
39#define Shared 3 // Queue shared for both IO and LP 38#define Shared 3 // Queue shared for both IO and LP
40 39
41#define LpEventStackSize 4096 40#define LpEventStackSize 4096
42#define LpEventMaxSize 256 41#define LpEventMaxSize 256
43#define LpEventAlign 64 42#define LpEventAlign 64
44 43
45struct ItLpQueue 44struct ItLpQueue {
46{ 45/*
47// 46 * The xSlicCurEventPtr is the pointer to the next event stack entry
48// The xSlicCurEventPtr is the pointer to the next event stack entry that will 47 * that will become valid. The OS must peek at this entry to determine
49// become valid. The OS must peek at this entry to determine if it is valid. 48 * if it is valid. PLIC will set the valid indicator as the very last
50// PLIC will set the valid indicator as the very last store into that entry. 49 * store into that entry.
51// 50 *
52// When the OS has completed processing of the event then it will mark the event 51 * When the OS has completed processing of the event then it will mark
53// as invalid so that PLIC knows it can store into that event location again. 52 * the event as invalid so that PLIC knows it can store into that event
54// 53 * location again.
55// If the event stack fills and there are overflow events, then PLIC will set 54 *
56// the xPlicOverflowIntPending flag in which case the OS will have to fetch the 55 * If the event stack fills and there are overflow events, then PLIC
57// additional LP events once they have drained the event stack. 56 * will set the xPlicOverflowIntPending flag in which case the OS will
58// 57 * have to fetch the additional LP events once they have drained the
59// The first 16-bytes are known by both the OS and PLIC. The remainder of the 58 * event stack.
60// cache line is for use by the OS. 59 *
61// 60 * The first 16-bytes are known by both the OS and PLIC. The remainder
62//============================================================================= 61 * of the cache line is for use by the OS.
62 */
63 u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending 63 u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending
64 u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed 64 u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed
65 u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation 65 u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation
66 u8 xPlicRsvd[12]; // 0x04 66 u8 xPlicRsvd[12]; // 0x04
67 char* xSlicCurEventPtr; // 0x10 67 char *xSlicCurEventPtr; // 0x10
68 char* xSlicLastValidEventPtr; // 0x18 68 char *xSlicLastValidEventPtr; // 0x18
69 char* xSlicEventStackPtr; // 0x20 69 char *xSlicEventStackPtr; // 0x20
70 u8 xIndex; // 0x28 unique sequential index. 70 u8 xIndex; // 0x28 unique sequential index.
71 u8 xSlicRsvd[3]; // 0x29-2b 71 u8 xSlicRsvd[3]; // 0x29-2b
72 u32 xInUseWord; // 0x2C 72 u32 xInUseWord; // 0x2C
@@ -76,17 +76,9 @@ struct ItLpQueue
76 76
77extern struct ItLpQueue xItLpQueue; 77extern struct ItLpQueue xItLpQueue;
78 78
79extern struct HvLpEvent * ItLpQueue_getNextLpEvent( struct ItLpQueue * ); 79extern struct HvLpEvent *ItLpQueue_getNextLpEvent(struct ItLpQueue *);
80extern int ItLpQueue_isLpIntPending( struct ItLpQueue * ); 80extern int ItLpQueue_isLpIntPending(struct ItLpQueue *);
81extern unsigned ItLpQueue_process( struct ItLpQueue *, struct pt_regs * ); 81extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *);
82extern void ItLpQueue_clearValid( struct HvLpEvent * ); 82extern void ItLpQueue_clearValid(struct HvLpEvent *);
83
84static __inline__ void process_iSeries_events( void )
85{
86 __asm__ __volatile__ (
87 " li 0,0x5555 \n\
88 sc"
89 : : : "r0", "r3" );
90}
91 83
92#endif /* _ITLPQUEUE_H */ 84#endif /* _ITLPQUEUE_H */
diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-ppc64/iSeries/ItLpRegSave.h
index dafc4c813788..1b3087e76205 100644
--- a/include/asm-ppc64/iSeries/ItLpRegSave.h
+++ b/include/asm-ppc64/iSeries/ItLpRegSave.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpRegSave.h 2 * ItLpRegSave.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,33 +19,30 @@
19#ifndef _ITLPREGSAVE_H 19#ifndef _ITLPREGSAVE_H
20#define _ITLPREGSAVE_H 20#define _ITLPREGSAVE_H
21 21
22//===================================================================================== 22/*
23// 23 * This control block contains the data that is shared between PLIC
24// This control block contains the data that is shared between PLIC 24 * and the OS
25// and the OS 25 */
26//
27//
28 26
29struct ItLpRegSave 27struct ItLpRegSave {
30{
31 u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003 28 u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003
32 u16 xSize; // Size of this class 004-005 29 u16 xSize; // Size of this class 004-005
33 u8 xInUse; // Area is live 006-007 30 u8 xInUse; // Area is live 006-007
34 u8 xRsvd1[9]; // Reserved 007-00F 31 u8 xRsvd1[9]; // Reserved 007-00F
35 32
36 u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F 33 u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
37 u32 xCTRL; // Control Register 170-173 34 u32 xCTRL; // Control Register 170-173
38 u32 xDEC; // Decrementer 174-177 35 u32 xDEC; // Decrementer 174-177
39 u32 xFPSCR; // FP Status and Control Reg 178-17B 36 u32 xFPSCR; // FP Status and Control Reg 178-17B
40 u32 xPVR; // Processor Version Number 17C-17F 37 u32 xPVR; // Processor Version Number 17C-17F
41 38
42 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 39 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187
43 u32 xPMC1; // Perf Monitor Counter 1 188-18B 40 u32 xPMC1; // Perf Monitor Counter 1 188-18B
44 u32 xPMC2; // Perf Monitor Counter 2 18C-18F 41 u32 xPMC2; // Perf Monitor Counter 2 18C-18F
45 u32 xPMC3; // Perf Monitor Counter 3 190-193 42 u32 xPMC3; // Perf Monitor Counter 3 190-193
46 u32 xPMC4; // Perf Monitor Counter 4 194-197 43 u32 xPMC4; // Perf Monitor Counter 4 194-197
47 u32 xPIR; // Processor ID Reg 198-19B 44 u32 xPIR; // Processor ID Reg 198-19B
48 45
49 u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F 46 u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F
50 u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3 47 u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3
51 u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7 48 u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7
@@ -57,17 +54,17 @@ struct ItLpRegSave
57 u32 xRsvd; // Reserved 1BC-1BF 54 u32 xRsvd; // Reserved 1BC-1BF
58 55
59 u64 xACCR; // Address Compare Control Reg 1C0-1C7 56 u64 xACCR; // Address Compare Control Reg 1C0-1C7
60 u64 xIMR; // Instruction Match Register 1C8-1CF 57 u64 xIMR; // Instruction Match Register 1C8-1CF
61 u64 xSDR1; // Storage Description Reg 1 1D0-1D7 58 u64 xSDR1; // Storage Description Reg 1 1D0-1D7
62 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF 59 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF
63 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 60 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7
64 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF 61 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF
65 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 62 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7
66 u64 xTB; // Time Base Register 1F8-1FF 63 u64 xTB; // Time Base Register 1F8-1FF
67 64
68 u64 xFPR[32]; // Floating Point Registers 200-2FF 65 u64 xFPR[32]; // Floating Point Registers 200-2FF
69 66
70 u64 xMSR; // Machine State Register 300-307 67 u64 xMSR; // Machine State Register 300-307
71 u64 xNIA; // Next Instruction Address 308-30F 68 u64 xNIA; // Next Instruction Address 308-30F
72 69
73 u64 xDABR; // Data Address Breakpoint Reg 310-317 70 u64 xDABR; // Data Address Breakpoint Reg 310-317
@@ -76,8 +73,8 @@ struct ItLpRegSave
76 u64 xHID0; // HW Implementation Dependent0 320-327 73 u64 xHID0; // HW Implementation Dependent0 320-327
77 74
78 u64 xHID4; // HW Implementation Dependent4 328-32F 75 u64 xHID4; // HW Implementation Dependent4 328-32F
79 u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337 76 u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
80 u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F 77 u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
81 u64 xSDAR; // Sample Data Address Register 340-347 78 u64 xSDAR; // Sample Data Address Register 340-347
82 u64 xSIAR; // Sample Inst Address Register 348-34F 79 u64 xSIAR; // Sample Inst Address Register 348-34F
83 80
diff --git a/include/asm-ppc64/iSeries/ItSpCommArea.h b/include/asm-ppc64/iSeries/ItSpCommArea.h
index f1b56f9e11e2..5535f8271c9f 100644
--- a/include/asm-ppc64/iSeries/ItSpCommArea.h
+++ b/include/asm-ppc64/iSeries/ItSpCommArea.h
@@ -1,29 +1,27 @@
1/* 1/*
2 * ItSpCommArea.h 2 * ItSpCommArea.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20
21#ifndef _ITSPCOMMAREA_H 20#ifndef _ITSPCOMMAREA_H
22#define _ITSPCOMMAREA_H 21#define _ITSPCOMMAREA_H
23 22
24 23
25struct SpCommArea 24struct SpCommArea {
26{
27 u32 xDesc; // Descriptor (only in new formats) 000-003 25 u32 xDesc; // Descriptor (only in new formats) 000-003
28 u8 xFormat; // Format (only in new formats) 004-004 26 u8 xFormat; // Format (only in new formats) 004-004
29 u8 xRsvd1[11]; // Reserved 005-00F 27 u8 xRsvd1[11]; // Reserved 005-00F
diff --git a/include/asm-ppc64/iSeries/ItVpdAreas.h b/include/asm-ppc64/iSeries/ItVpdAreas.h
index d120439f30a5..71b3ad24f95a 100644
--- a/include/asm-ppc64/iSeries/ItVpdAreas.h
+++ b/include/asm-ppc64/iSeries/ItVpdAreas.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItVpdAreas.h 2 * ItVpdAreas.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,78 +19,71 @@
19#ifndef _ITVPDAREAS_H 19#ifndef _ITVPDAREAS_H
20#define _ITVPDAREAS_H 20#define _ITVPDAREAS_H
21 21
22//===================================================================================== 22/*
23// 23 * This file defines the address and length of all of the VPD area passed to
24// This file defines the address and length of all of the VPD area passed to 24 * the OS from PLIC (most of which start from the SP).
25// the OS from PLIC (most of which start from the SP). 25 */
26//
27 26
28#include <asm/types.h> 27#include <asm/types.h>
29 28
30// VPD Entry index is carved in stone - cannot be changed (easily). 29/* VPD Entry index is carved in stone - cannot be changed (easily). */
31#define ItVpdCecVpd 0 30#define ItVpdCecVpd 0
32#define ItVpdDynamicSpace 1 31#define ItVpdDynamicSpace 1
33#define ItVpdExtVpd 2 32#define ItVpdExtVpd 2
34#define ItVpdExtVpdOnPanel 3 33#define ItVpdExtVpdOnPanel 3
35#define ItVpdFirstPaca 4 34#define ItVpdFirstPaca 4
36#define ItVpdIoVpd 5 35#define ItVpdIoVpd 5
37#define ItVpdIplParms 6 36#define ItVpdIplParms 6
38#define ItVpdMsVpd 7 37#define ItVpdMsVpd 7
39#define ItVpdPanelVpd 8 38#define ItVpdPanelVpd 8
40#define ItVpdLpNaca 9 39#define ItVpdLpNaca 9
41#define ItVpdBackplaneAndMaybeClockCardVpd 10 40#define ItVpdBackplaneAndMaybeClockCardVpd 10
42#define ItVpdRecoveryLogBuffer 11 41#define ItVpdRecoveryLogBuffer 11
43#define ItVpdSpCommArea 12 42#define ItVpdSpCommArea 12
44#define ItVpdSpLogBuffer 13 43#define ItVpdSpLogBuffer 13
45#define ItVpdSpLogBufferSave 14 44#define ItVpdSpLogBufferSave 14
46#define ItVpdSpCardVpd 15 45#define ItVpdSpCardVpd 15
47#define ItVpdFirstProcVpd 16 46#define ItVpdFirstProcVpd 16
48#define ItVpdApModelVpd 17 47#define ItVpdApModelVpd 17
49#define ItVpdClockCardVpd 18 48#define ItVpdClockCardVpd 18
50#define ItVpdBusExtCardVpd 19 49#define ItVpdBusExtCardVpd 19
51#define ItVpdProcCapacityVpd 20 50#define ItVpdProcCapacityVpd 20
52#define ItVpdInteractiveCapacityVpd 21 51#define ItVpdInteractiveCapacityVpd 21
53#define ItVpdFirstSlotLabel 22 52#define ItVpdFirstSlotLabel 22
54#define ItVpdFirstLpQueue 23 53#define ItVpdFirstLpQueue 23
55#define ItVpdFirstL3CacheVpd 24 54#define ItVpdFirstL3CacheVpd 24
56#define ItVpdFirstProcFruVpd 25 55#define ItVpdFirstProcFruVpd 25
57
58#define ItVpdMaxEntries 26
59 56
57#define ItVpdMaxEntries 26
60 58
61#define ItDmaMaxEntries 10 59#define ItDmaMaxEntries 10
62 60
63#define ItVpdAreasMaxSlotLabels 192 61#define ItVpdAreasMaxSlotLabels 192
64 62
65 63
66struct SlicVpdAdrs { 64struct ItVpdAreas {
67 u32 pad1; 65 u32 xSlicDesc; // Descriptor 000-003
68 void * vpdAddr; 66 u16 xSlicSize; // Size of this control block 004-005
67 u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007
68 u16 xRsvd1:15; // Reserved bits ...
69 u16 xSlicVpdEntries; // Number of VPD entries 008-009
70 u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
71 u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
72 u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
73 u16 xSlicDmaToksOffset; // Offset into this of array 010-011
74 u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
75 u16 xSlicDmaLensOffset; // Offset into this of array 014-015
76 u16 xSlicVpdLensOffset; // Offset into this of array 016-017
77 u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019
78 u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
79 u8 xRsvd2[4]; // Reserved 01C-01F
80 u64 xRsvd3[12]; // Reserved 020-07F
81 u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
82 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
83 u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
84 void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
69}; 85};
70 86
71 87extern struct ItVpdAreas itVpdAreas;
72struct ItVpdAreas
73{
74 u32 xSlicDesc; // Descriptor 000-003
75 u16 xSlicSize; // Size of this control block 004-005
76 u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface 006-007
77 u16 xRsvd1:15; // Reserved bits ...
78 u16 xSlicVpdEntries; // Number of VPD entries 008-009
79 u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
80 u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
81 u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
82 u16 xSlicDmaToksOffset; // Offset into this of array 010-011
83 u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
84 u16 xSlicDmaLensOffset; // Offset into this of array 014-015
85 u16 xSlicVpdLensOffset; // Offset into this of array 016-017
86 u16 xSlicMaxSlotLabels; // Maximum number of slot labels 018-019
87 u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
88 u8 xRsvd2[4]; // Reserved 01C-01F
89 u64 xRsvd3[12]; // Reserved 020-07F
90 u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
91 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
92 u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
93 void * xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
94};
95 88
96#endif /* _ITVPDAREAS_H */ 89#endif /* _ITVPDAREAS_H */
diff --git a/include/asm-ppc64/iSeries/LparData.h b/include/asm-ppc64/iSeries/LparData.h
deleted file mode 100644
index e54f3b686e58..000000000000
--- a/include/asm-ppc64/iSeries/LparData.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * LparData.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _LPARDATA_H
21#define _LPARDATA_H
22
23#include <asm/types.h>
24#include <asm/page.h>
25#include <asm/abs_addr.h>
26
27#include <asm/iSeries/ItLpNaca.h>
28#include <asm/iSeries/ItLpRegSave.h>
29#include <asm/iSeries/HvReleaseData.h>
30#include <asm/iSeries/LparMap.h>
31#include <asm/iSeries/ItVpdAreas.h>
32#include <asm/iSeries/ItIplParmsReal.h>
33#include <asm/iSeries/ItExtVpdPanel.h>
34#include <asm/iSeries/ItLpQueue.h>
35#include <asm/iSeries/IoHriProcessorVpd.h>
36
37extern struct LparMap xLparMap;
38extern struct HvReleaseData hvReleaseData;
39extern struct ItLpNaca itLpNaca;
40extern struct ItIplParmsReal xItIplParmsReal;
41extern struct ItExtVpdPanel xItExtVpdPanel;
42extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
43extern struct ItLpQueue xItLpQueue;
44extern struct ItVpdAreas itVpdAreas;
45extern u64 xMsVpd[];
46extern struct msChunks msChunks;
47
48
49#endif /* _LPARDATA_H */
diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-ppc64/iSeries/LparMap.h
index 075205bb0f4a..038e5df7e9f8 100644
--- a/include/asm-ppc64/iSeries/LparMap.h
+++ b/include/asm-ppc64/iSeries/LparMap.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * LparMap.h 2 * LparMap.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,13 +21,14 @@
21 21
22#include <asm/types.h> 22#include <asm/types.h>
23 23
24/* The iSeries hypervisor will set up mapping for one or more 24/*
25 * The iSeries hypervisor will set up mapping for one or more
25 * ESID/VSID pairs (in SLB/segment registers) and will set up 26 * ESID/VSID pairs (in SLB/segment registers) and will set up
26 * mappings of one or more ranges of pages to VAs. 27 * mappings of one or more ranges of pages to VAs.
27 * We will have the hypervisor set up the ESID->VSID mapping 28 * We will have the hypervisor set up the ESID->VSID mapping
28 * for the four kernel segments (C-F). With shared processors, 29 * for the four kernel segments (C-F). With shared processors,
29 * the hypervisor will clear all segment registers and reload 30 * the hypervisor will clear all segment registers and reload
30 * these four whenever the processor is switched from one 31 * these four whenever the processor is switched from one
31 * partition to another. 32 * partition to another.
32 */ 33 */
33 34
@@ -38,30 +39,31 @@
38 * need to be located within the load area (if the total partition size 39 * need to be located within the load area (if the total partition size
39 * is 64 MB), but cannot be mapped. Typically, this should specify 40 * is 64 MB), but cannot be mapped. Typically, this should specify
40 * to map half (32 MB) of the load area. 41 * to map half (32 MB) of the load area.
41 * 42 *
42 * The hypervisor will set up page table entries for the number of 43 * The hypervisor will set up page table entries for the number of
43 * pages specified. 44 * pages specified.
44 * 45 *
45 * In 32-bit mode, the hypervisor will load all four of the 46 * In 32-bit mode, the hypervisor will load all four of the
46 * segment registers (identified by the low-order four bits of the 47 * segment registers (identified by the low-order four bits of the
47 * Esid field. In 64-bit mode, the hypervisor will load one SLB 48 * Esid field. In 64-bit mode, the hypervisor will load one SLB
48 * entry to map the Esid to the Vsid. 49 * entry to map the Esid to the Vsid.
49*/ 50*/
50 51
51// Hypervisor initially maps 32MB of the load area 52/* Hypervisor initially maps 32MB of the load area */
52#define HvPagesToMap 8192 53#define HvPagesToMap 8192
53 54
54struct LparMap 55struct LparMap {
55{ 56 u64 xNumberEsids; // Number of ESID/VSID pairs (1)
56 u64 xNumberEsids; // Number of ESID/VSID pairs (1) 57 u64 xNumberRanges; // Number of VA ranges to map (1)
57 u64 xNumberRanges; // Number of VA ranges to map (1) 58 u64 xSegmentTableOffs; // Page number within load area of seg table (0)
58 u64 xSegmentTableOffs; // Page number within load area of seg table (0) 59 u64 xRsvd[5];
59 u64 xRsvd[5]; // Reserved (0) 60 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
60 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000) 61 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
61 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000) 62 u64 xPages; // Number of pages to be mapped (8192)
62 u64 xPages; // Number of pages to be mapped (8192) 63 u64 xOffset; // Offset from start of load area (0)
63 u64 xOffset; // Offset from start of load area (0) 64 u64 xVPN; // Virtual Page Number (0x000C000000000000)
64 u64 xVPN; // Virtual Page Number (0x000C000000000000)
65}; 65};
66 66
67extern struct LparMap xLparMap;
68
67#endif /* _LPARMAP_H */ 69#endif /* _LPARMAP_H */
diff --git a/include/asm-ppc64/iSeries/XmPciLpEvent.h b/include/asm-ppc64/iSeries/XmPciLpEvent.h
deleted file mode 100644
index a3d27f116e49..000000000000
--- a/include/asm-ppc64/iSeries/XmPciLpEvent.h
+++ /dev/null
@@ -1,18 +0,0 @@
1
2#ifndef __XMPCILPEVENT_H__
3#define __XMPCILPEVENT_H__
4
5
6#ifdef __cplusplus
7extern "C" {
8#endif
9
10int XmPciLpEvent_init(void);
11void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
12
13
14#ifdef __cplusplus
15}
16#endif
17
18#endif /* __XMPCILPEVENT_H__ */
diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-ppc64/iSeries/iSeries_io.h
index f52b7599b372..9f79413342b3 100644
--- a/include/asm-ppc64/iSeries/iSeries_io.h
+++ b/include/asm-ppc64/iSeries/iSeries_io.h
@@ -5,32 +5,33 @@
5 5
6#ifdef CONFIG_PPC_ISERIES 6#ifdef CONFIG_PPC_ISERIES
7#include <linux/types.h> 7#include <linux/types.h>
8/************************************************************************/ 8/*
9/* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000. */ 9 * File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000.
10/************************************************************************/ 10 *
11/* Remaps the io.h for the iSeries Io */ 11 * Remaps the io.h for the iSeries Io
12/* Copyright (C) 20yy Allan H Trautman, IBM Corporation */ 12 * Copyright (C) 2000 Allan H Trautman, IBM Corporation
13/* */ 13 *
14/* This program is free software; you can redistribute it and/or modify */ 14 * This program is free software; you can redistribute it and/or modify
15/* it under the terms of the GNU General Public License as published by */ 15 * it under the terms of the GNU General Public License as published by
16/* the Free Software Foundation; either version 2 of the License, or */ 16 * the Free Software Foundation; either version 2 of the License, or
17/* (at your option) any later version. */ 17 * (at your option) any later version.
18/* */ 18 *
19/* This program is distributed in the hope that it will be useful, */ 19 * This program is distributed in the hope that it will be useful,
20/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22/* GNU General Public License for more details. */ 22 * GNU General Public License for more details.
23/* */ 23 *
24/* You should have received a copy of the GNU General Public License */ 24 * You should have received a copy of the GNU General Public License
25/* along with this program; if not, write to the: */ 25 * along with this program; if not, write to the:
26/* Free Software Foundation, Inc., */ 26 * Free Software Foundation, Inc.,
27/* 59 Temple Place, Suite 330, */ 27 * 59 Temple Place, Suite 330,
28/* Boston, MA 02111-1307 USA */ 28 * Boston, MA 02111-1307 USA
29/************************************************************************/ 29 *
30/* Change Activity: */ 30 * Change Activity:
31/* Created December 28, 2000 */ 31 * Created December 28, 2000
32/* End Change Activity */ 32 * End Change Activity
33/************************************************************************/ 33 */
34
34extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress); 35extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
35extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress); 36extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
36extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress); 37extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
@@ -39,8 +40,10 @@ extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
39extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress); 40extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
40 41
41extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n); 42extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
42extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t n); 43extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
43extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n); 44 size_t n);
45extern void iSeries_memcpy_fromio(void *dest,
46 const volatile void __iomem *source, size_t n);
44 47
45#endif /* CONFIG_PPC_ISERIES */ 48#endif /* CONFIG_PPC_ISERIES */
46#endif /* _ISERIES_IO_H */ 49#endif /* _ISERIES_IO_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_irq.h b/include/asm-ppc64/iSeries/iSeries_irq.h
index ff8ddede038c..6c9767ac1302 100644
--- a/include/asm-ppc64/iSeries/iSeries_irq.h
+++ b/include/asm-ppc64/iSeries/iSeries_irq.h
@@ -1,19 +1,8 @@
1#ifndef __ISERIES_IRQ_H__ 1#ifndef __ISERIES_IRQ_H__
2#define __ISERIES_IRQ_H__ 2#define __ISERIES_IRQ_H__
3 3
4#ifdef __cplusplus 4extern void iSeries_init_IRQ(void);
5extern "C" { 5extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
6#endif 6extern void iSeries_activate_IRQs(void);
7
8void iSeries_init_IRQ(void);
9int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
10int iSeries_assign_IRQ(int, HvBusNumber, HvSubBusNumber, HvAgentId);
11void iSeries_activate_IRQs(void);
12
13int XmPciLpEvent_init(void);
14
15#ifdef __cplusplus
16}
17#endif
18 7
19#endif /* __ISERIES_IRQ_H__ */ 8#endif /* __ISERIES_IRQ_H__ */
diff --git a/include/asm-ppc64/iSeries/iSeries_pci.h b/include/asm-ppc64/iSeries/iSeries_pci.h
index 5769cff4c00c..575f611f8b33 100644
--- a/include/asm-ppc64/iSeries/iSeries_pci.h
+++ b/include/asm-ppc64/iSeries/iSeries_pci.h
@@ -1,112 +1,88 @@
1#ifndef _ISERIES_64_PCI_H 1#ifndef _ISERIES_64_PCI_H
2#define _ISERIES_64_PCI_H 2#define _ISERIES_64_PCI_H
3 3
4/************************************************************************/ 4/*
5/* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. */ 5 * File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001.
6/************************************************************************/ 6 *
7/* Define some useful macros for the iSeries pci routines. */ 7 * Define some useful macros for the iSeries pci routines.
8/* Copyright (C) 2001 Allan H Trautman, IBM Corporation */ 8 * Copyright (C) 2001 Allan H Trautman, IBM Corporation
9/* */ 9 *
10/* This program is free software; you can redistribute it and/or modify */ 10 * This program is free software; you can redistribute it and/or modify
11/* it under the terms of the GNU General Public License as published by */ 11 * it under the terms of the GNU General Public License as published by
12/* the Free Software Foundation; either version 2 of the License, or */ 12 * the Free Software Foundation; either version 2 of the License, or
13/* (at your option) any later version. */ 13 * (at your option) any later version.
14/* */ 14 *
15/* This program is distributed in the hope that it will be useful, */ 15 * This program is distributed in the hope that it will be useful,
16/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18/* GNU General Public License for more details. */ 18 * GNU General Public License for more details.
19/* */ 19 *
20/* You should have received a copy of the GNU General Public License */ 20 * You should have received a copy of the GNU General Public License
21/* along with this program; if not, write to the: */ 21 * along with this program; if not, write to the:
22/* Free Software Foundation, Inc., */ 22 * Free Software Foundation, Inc.,
23/* 59 Temple Place, Suite 330, */ 23 * 59 Temple Place, Suite 330,
24/* Boston, MA 02111-1307 USA */ 24 * Boston, MA 02111-1307 USA
25/************************************************************************/ 25 *
26/* Change Activity: */ 26 * Change Activity:
27/* Created Feb 20, 2001 */ 27 * Created Feb 20, 2001
28/* Added device reset, March 22, 2001 */ 28 * Added device reset, March 22, 2001
29/* Ported to ppc64, May 25, 2001 */ 29 * Ported to ppc64, May 25, 2001
30/* End Change Activity */ 30 * End Change Activity
31/************************************************************************/ 31 */
32 32
33#include <asm/iSeries/HvCallPci.h> 33#include <asm/iSeries/HvCallPci.h>
34#include <asm/abs_addr.h> 34#include <asm/abs_addr.h>
35 35
36struct pci_dev; /* For Forward Reference */ 36struct pci_dev; /* For Forward Reference */
37struct iSeries_Device_Node; 37struct iSeries_Device_Node;
38 38
39/************************************************************************/ 39/*
40/* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure */ 40 * Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure
41/************************************************************************/ 41 */
42 42
43#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber 43#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
44#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber 44#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
45#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId 45#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
46#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr 46#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
47#define ISERIES_DEVFUN(DevPtr) DevPtr->DevFn 47#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata)
48#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node*)PciDev->sysdata)
49 48
50#define EADsMaxAgents 7 49#define EADsMaxAgents 7
51 50
52/************************************************************************/
53/* Decodes Linux DevFn to iSeries DevFn, bridge device, or function. */
54/* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h */
55/************************************************************************/
56
57#define ISERIES_PCI_AGENTID(idsel,func) ((idsel & 0x0F) << 4) | (func & 0x07)
58#define ISERIES_ENCODE_DEVICE(agentid) ((0x10) | ((agentid&0x20)>>2) | (agentid&07))
59
60#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
61#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
62
63/* 51/*
64 * N.B. the ISERIES_DECODE_* macros are not used anywhere, and I think 52 * Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
65 * the 0x71 (at least) must be wrong - 0x78 maybe? -- paulus. 53 * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
66 */ 54 */
67#define ISERIES_DECODE_DEVFN(linuxdevfn) (((linuxdevfn & 0x71) << 1) | (linuxdevfn & 0x07))
68#define ISERIES_DECODE_DEVICE(linuxdevfn) (((linuxdevfn & 0x38) >> 3) |(((linuxdevfn & 0x40) >> 2) + 0x10))
69#define ISERIES_DECODE_FUNCTION(linuxdevfn) (linuxdevfn & 0x07)
70 55
71/************************************************************************/ 56#define ISERIES_PCI_AGENTID(idsel, func) \
72/* Converts Virtual Address to Real Address for Hypervisor calls */ 57 (((idsel & 0x0F) << 4) | (func & 0x07))
73/************************************************************************/ 58#define ISERIES_ENCODE_DEVICE(agentid) \
59 ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
74 60
75#define ISERIES_HV_ADDR(virtaddr) (0x8000000000000000 | virt_to_abs(virtaddr)) 61#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
62#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
76 63
77/************************************************************************/ 64/*
78/* iSeries Device Information */ 65 * Converts Virtual Address to Real Address for Hypervisor calls
79/************************************************************************/ 66 */
67#define ISERIES_HV_ADDR(virtaddr) \
68 (0x8000000000000000 | virt_to_abs(virtaddr))
80 69
70/*
71 * iSeries Device Information
72 */
81struct iSeries_Device_Node { 73struct iSeries_Device_Node {
82 struct list_head Device_List; 74 struct list_head Device_List;
83 struct pci_dev* PciDev; /* Pointer to pci_dev structure*/ 75 struct pci_dev *PciDev;
84 union HvDsaMap DsaAddr; /* Direct Select Address */ 76 union HvDsaMap DsaAddr; /* Direct Select Address */
85 /* busNumber,subBusNumber, */ 77 /* busNumber, subBusNumber, */
86 /* deviceId, barNumber */ 78 /* deviceId, barNumber */
87 HvAgentId AgentId; /* Hypervisor DevFn */ 79 int DevFn; /* Linux devfn */
88 int DevFn; /* Linux devfn */ 80 int Irq; /* Assigned IRQ */
89 int BarOffset; 81 int Flags; /* Possible flags(disable/bist)*/
90 int Irq; /* Assigned IRQ */ 82 u8 LogicalSlot; /* Hv Slot Index for Tces */
91 int ReturnCode; /* Return Code Holder */ 83 struct iommu_table *iommu_table;/* Device TCE Table */
92 int IoRetry; /* Current Retry Count */
93 int Flags; /* Possible flags(disable/bist)*/
94 u16 Vendor; /* Vendor ID */
95 u8 LogicalSlot; /* Hv Slot Index for Tces */
96 struct iommu_table* iommu_table;/* Device TCE Table */
97 u8 PhbId; /* Phb Card is on. */
98 u16 Board; /* Board Number */
99 u8 FrameId; /* iSeries spcn Frame Id */
100 char CardLocation[4];/* Char format of planar vpd */
101 char Location[20]; /* Frame 1, Card C10 */
102}; 84};
103 85
104/************************************************************************/ 86extern void iSeries_Device_Information(struct pci_dev*, int);
105/* Functions */
106/************************************************************************/
107
108extern int iSeries_Device_Information(struct pci_dev*,char*, int);
109extern void iSeries_Get_Location_Code(struct iSeries_Device_Node*);
110extern int iSeries_Device_ToggleReset(struct pci_dev* PciDev, int AssertTime, int DelayTime);
111 87
112#endif /* _ISERIES_64_PCI_H */ 88#endif /* _ISERIES_64_PCI_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_proc.h b/include/asm-ppc64/iSeries/iSeries_proc.h
deleted file mode 100644
index adb6dc14dd4d..000000000000
--- a/include/asm-ppc64/iSeries/iSeries_proc.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * iSeries_proc.h
3 * Copyright (C) 2001 Kyle A. Lucke IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _ISERIES_PROC_H
20#define _ISERIES_PROC_H
21
22extern void iSeries_proc_early_init(void);
23
24#endif /* _iSeries_PROC_H */
diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-ppc64/iSeries/mf.h
index db333e1ee216..7e6a0d936999 100644
--- a/include/asm-ppc64/iSeries/mf.h
+++ b/include/asm-ppc64/iSeries/mf.h
@@ -9,17 +9,16 @@
9 * all partitions in the iSeries. It also provides miscellaneous low-level 9 * all partitions in the iSeries. It also provides miscellaneous low-level
10 * machine facility type operations. 10 * machine facility type operations.
11 * 11 *
12 *
13 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by 13 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or 14 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version. 15 * (at your option) any later version.
17 * 16 *
18 * This program is distributed in the hope that it will be useful, 17 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 20 * GNU General Public License for more details.
22 * 21 *
23 * You should have received a copy of the GNU General Public License 22 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-ppc64/iSeries/vio.h
index 3e5766a849d6..6c05e6257f53 100644
--- a/include/asm-ppc64/iSeries/vio.h
+++ b/include/asm-ppc64/iSeries/vio.h
@@ -8,32 +8,32 @@
8 * Colin Devilbiss <devilbis@us.ibm.com> 8 * Colin Devilbiss <devilbis@us.ibm.com>
9 * 9 *
10 * (C) Copyright 2000 IBM Corporation 10 * (C) Copyright 2000 IBM Corporation
11 * 11 *
12 * This header file is used by the iSeries virtual I/O device 12 * This header file is used by the iSeries virtual I/O device
13 * drivers. It defines the interfaces to the common functions 13 * drivers. It defines the interfaces to the common functions
14 * (implemented in drivers/char/viopath.h) as well as defining 14 * (implemented in drivers/char/viopath.h) as well as defining
15 * common functions and structures. Currently (at the time I 15 * common functions and structures. Currently (at the time I
16 * wrote this comment) the iSeries virtual I/O device drivers 16 * wrote this comment) the iSeries virtual I/O device drivers
17 * that use this are 17 * that use this are
18 * drivers/block/viodasd.c 18 * drivers/block/viodasd.c
19 * drivers/char/viocons.c 19 * drivers/char/viocons.c
20 * drivers/char/viotape.c 20 * drivers/char/viotape.c
21 * drivers/cdrom/viocd.c 21 * drivers/cdrom/viocd.c
22 * 22 *
23 * The iSeries virtual ethernet support (veth.c) uses a whole 23 * The iSeries virtual ethernet support (veth.c) uses a whole
24 * different set of functions. 24 * different set of functions.
25 * 25 *
26 * This program is free software; you can redistribute it and/or 26 * This program is free software; you can redistribute it and/or
27 * modify it under the terms of the GNU General Public License as 27 * modify it under the terms of the GNU General Public License as
28 * published by the Free Software Foundation; either version 2 of the 28 * published by the Free Software Foundation; either version 2 of the
29 * License, or (at your option) anyu later version. 29 * License, or (at your option) anyu later version.
30 * 30 *
31 * This program is distributed in the hope that it will be useful, but 31 * This program is distributed in the hope that it will be useful, but
32 * WITHOUT ANY WARRANTY; without even the implied warranty of 32 * WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
34 * General Public License for more details. 34 * General Public License for more details.
35 * 35 *
36 * You should have received a copy of the GNU General Public License 36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software Foundation, 37 * along with this program; if not, write to the Free Software Foundation,
38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 * 39 *
@@ -44,39 +44,41 @@
44#include <asm/iSeries/HvTypes.h> 44#include <asm/iSeries/HvTypes.h>
45#include <asm/iSeries/HvLpEvent.h> 45#include <asm/iSeries/HvLpEvent.h>
46 46
47/* iSeries virtual I/O events use the subtype field in 47/*
48 * iSeries virtual I/O events use the subtype field in
48 * HvLpEvent to figure out what kind of vio event is coming 49 * HvLpEvent to figure out what kind of vio event is coming
49 * in. We use a table to route these, and this defines 50 * in. We use a table to route these, and this defines
50 * the maximum number of distinct subtypes 51 * the maximum number of distinct subtypes
51 */ 52 */
52#define VIO_MAX_SUBTYPES 8 53#define VIO_MAX_SUBTYPES 8
53 54
54/* Each subtype can register a handler to process their events. 55/*
56 * Each subtype can register a handler to process their events.
55 * The handler must have this interface. 57 * The handler must have this interface.
56 */ 58 */
57typedef void (vio_event_handler_t) (struct HvLpEvent * event); 59typedef void (vio_event_handler_t) (struct HvLpEvent * event);
58 60
59int viopath_open(HvLpIndex remoteLp, int subtype, int numReq); 61extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq);
60int viopath_close(HvLpIndex remoteLp, int subtype, int numReq); 62extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq);
61int vio_setHandler(int subtype, vio_event_handler_t * beh); 63extern int vio_setHandler(int subtype, vio_event_handler_t * beh);
62int vio_clearHandler(int subtype); 64extern int vio_clearHandler(int subtype);
63int viopath_isactive(HvLpIndex lp); 65extern int viopath_isactive(HvLpIndex lp);
64HvLpInstanceId viopath_sourceinst(HvLpIndex lp); 66extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp);
65HvLpInstanceId viopath_targetinst(HvLpIndex lp); 67extern HvLpInstanceId viopath_targetinst(HvLpIndex lp);
66void vio_set_hostlp(void); 68extern void vio_set_hostlp(void);
67void *vio_get_event_buffer(int subtype); 69extern void *vio_get_event_buffer(int subtype);
68void vio_free_event_buffer(int subtype, void *buffer); 70extern void vio_free_event_buffer(int subtype, void *buffer);
69 71
70extern HvLpIndex viopath_hostLp; 72extern HvLpIndex viopath_hostLp;
71extern HvLpIndex viopath_ourLp; 73extern HvLpIndex viopath_ourLp;
72 74
73#define VIOCHAR_MAX_DATA 200 75#define VIOCHAR_MAX_DATA 200
74 76
75#define VIOMAJOR_SUBTYPE_MASK 0xff00 77#define VIOMAJOR_SUBTYPE_MASK 0xff00
76#define VIOMINOR_SUBTYPE_MASK 0x00ff 78#define VIOMINOR_SUBTYPE_MASK 0x00ff
77#define VIOMAJOR_SUBTYPE_SHIFT 8 79#define VIOMAJOR_SUBTYPE_SHIFT 8
78 80
79#define VIOVERSION 0x0101 81#define VIOVERSION 0x0101
80 82
81/* 83/*
82 * This is the general structure for VIO errors; each module should have 84 * This is the general structure for VIO errors; each module should have
@@ -89,8 +91,8 @@ struct vio_error_entry {
89 int errno; 91 int errno;
90 const char *msg; 92 const char *msg;
91}; 93};
92const struct vio_error_entry *vio_lookup_rc(const struct vio_error_entry 94extern const struct vio_error_entry *vio_lookup_rc(
93 *local_table, u16 rc); 95 const struct vio_error_entry *local_table, u16 rc);
94 96
95enum viosubtypes { 97enum viosubtypes {
96 viomajorsubtype_monitor = 0x0100, 98 viomajorsubtype_monitor = 0x0100,
@@ -102,7 +104,6 @@ enum viosubtypes {
102 viomajorsubtype_scsi = 0x0700 104 viomajorsubtype_scsi = 0x0700
103}; 105};
104 106
105
106enum vioconfigsubtype { 107enum vioconfigsubtype {
107 vioconfigget = 0x0001, 108 vioconfigget = 0x0001,
108}; 109};
diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h
index 3a45e918bf16..e46ff68a6e41 100644
--- a/include/asm-ppc64/imalloc.h
+++ b/include/asm-ppc64/imalloc.h
@@ -4,9 +4,9 @@
4/* 4/*
5 * Define the address range of the imalloc VM area. 5 * Define the address range of the imalloc VM area.
6 */ 6 */
7#define PHBS_IO_BASE IOREGIONBASE 7#define PHBS_IO_BASE VMALLOC_END
8#define IMALLOC_BASE (IOREGIONBASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ 8#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
9#define IMALLOC_END (IOREGIONBASE + EADDR_MASK) 9#define IMALLOC_END (VMALLOC_START + EADDR_MASK)
10 10
11 11
12/* imalloc region types */ 12/* imalloc region types */
@@ -18,7 +18,9 @@
18 18
19extern struct vm_struct * im_get_free_area(unsigned long size); 19extern struct vm_struct * im_get_free_area(unsigned long size);
20extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size, 20extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
21 int region_type); 21 int region_type);
22unsigned long im_free(void *addr); 22extern void im_free(void *addr);
23
24extern unsigned long ioremap_bot;
23 25
24#endif /* _PPC64_IMALLOC_H */ 26#endif /* _PPC64_IMALLOC_H */
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h
index bd53ca4dcfa2..729de5cc21d9 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-ppc64/iommu.h
@@ -82,24 +82,6 @@ struct iommu_table {
82 unsigned long *it_map; /* A simple allocation bitmap for now */ 82 unsigned long *it_map; /* A simple allocation bitmap for now */
83}; 83};
84 84
85#ifdef CONFIG_PPC_ISERIES
86struct iommu_table_cb {
87 unsigned long itc_busno; /* Bus number for this tce table */
88 unsigned long itc_start; /* Will be NULL for secondary */
89 unsigned long itc_totalsize; /* Size (in pages) of whole table */
90 unsigned long itc_offset; /* Index into real tce table of the
91 start of our section */
92 unsigned long itc_size; /* Size (in pages) of our section */
93 unsigned long itc_index; /* Index of this tce table */
94 unsigned short itc_maxtables; /* Max num of tables for partition */
95 unsigned char itc_virtbus; /* Flag to indicate virtual bus */
96 unsigned char itc_slotno; /* IOA Tce Slot Index */
97 unsigned char itc_rsvd[4];
98};
99
100extern struct iommu_table vio_tce_table; /* Tce table for virtual bus */
101#endif /* CONFIG_PPC_ISERIES */
102
103struct scatterlist; 85struct scatterlist;
104 86
105#ifdef CONFIG_PPC_MULTIPLATFORM 87#ifdef CONFIG_PPC_MULTIPLATFORM
@@ -122,9 +104,6 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn);
122 104
123#ifdef CONFIG_PPC_ISERIES 105#ifdef CONFIG_PPC_ISERIES
124 106
125/* Walks all buses and creates iommu tables */
126extern void iommu_setup_iSeries(void);
127
128/* Initializes tables for bio buses */ 107/* Initializes tables for bio buses */
129extern void __init iommu_vio_init(void); 108extern void __init iommu_vio_init(void);
130 109
@@ -158,8 +137,12 @@ extern void iommu_init_early_pSeries(void);
158extern void iommu_init_early_iSeries(void); 137extern void iommu_init_early_iSeries(void);
159extern void iommu_init_early_u3(void); 138extern void iommu_init_early_u3(void);
160 139
140#ifdef CONFIG_PCI
161extern void pci_iommu_init(void); 141extern void pci_iommu_init(void);
162extern void pci_direct_iommu_init(void); 142extern void pci_direct_iommu_init(void);
143#else
144static inline void pci_iommu_init(void) { }
145#endif
163 146
164extern void alloc_u3_dart_table(void); 147extern void alloc_u3_dart_table(void);
165 148
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index 1a0223b5f3b8..ae76cae1483f 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -20,13 +20,13 @@
20#include <asm/types.h> 20#include <asm/types.h>
21#include <asm/lppaca.h> 21#include <asm/lppaca.h>
22#include <asm/iSeries/ItLpRegSave.h> 22#include <asm/iSeries/ItLpRegSave.h>
23#include <asm/iSeries/ItLpQueue.h>
23#include <asm/mmu.h> 24#include <asm/mmu.h>
24 25
25register struct paca_struct *local_paca asm("r13"); 26register struct paca_struct *local_paca asm("r13");
26#define get_paca() local_paca 27#define get_paca() local_paca
27 28
28struct task_struct; 29struct task_struct;
29struct ItLpQueue;
30 30
31/* 31/*
32 * Defines the layout of the paca. 32 * Defines the layout of the paca.
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index bcd21789d3b7..257d87eb7c34 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -202,9 +202,7 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
202#define PAGE_OFFSET ASM_CONST(0xC000000000000000) 202#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
203#define KERNELBASE PAGE_OFFSET 203#define KERNELBASE PAGE_OFFSET
204#define VMALLOCBASE ASM_CONST(0xD000000000000000) 204#define VMALLOCBASE ASM_CONST(0xD000000000000000)
205#define IOREGIONBASE ASM_CONST(0xE000000000000000)
206 205
207#define IO_REGION_ID (IOREGIONBASE >> REGION_SHIFT)
208#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT) 206#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
209#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT) 207#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
210#define USER_REGION_ID (0UL) 208#define USER_REGION_ID (0UL)
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-ppc64/pgtable.h
index 264c4f7993be..46cf61c2ff69 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-ppc64/pgtable.h
@@ -53,7 +53,8 @@
53 * Define the address range of the vmalloc VM area. 53 * Define the address range of the vmalloc VM area.
54 */ 54 */
55#define VMALLOC_START (0xD000000000000000ul) 55#define VMALLOC_START (0xD000000000000000ul)
56#define VMALLOC_END (VMALLOC_START + EADDR_MASK) 56#define VMALLOC_SIZE (0x10000000000UL)
57#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
57 58
58/* 59/*
59 * Bits in a linux-style PTE. These match the bits in the 60 * Bits in a linux-style PTE. These match the bits in the
@@ -239,9 +240,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
239/* This now only contains the vmalloc pages */ 240/* This now only contains the vmalloc pages */
240#define pgd_offset_k(address) pgd_offset(&init_mm, address) 241#define pgd_offset_k(address) pgd_offset(&init_mm, address)
241 242
242/* to find an entry in the ioremap page-table-directory */
243#define pgd_offset_i(address) (ioremap_pgd + pgd_index(address))
244
245/* 243/*
246 * The following only work if pte_present() is true. 244 * The following only work if pte_present() is true.
247 * Undefined behaviour if not.. 245 * Undefined behaviour if not..
@@ -459,15 +457,12 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
459#define __HAVE_ARCH_PTE_SAME 457#define __HAVE_ARCH_PTE_SAME
460#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 458#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
461 459
462extern unsigned long ioremap_bot, ioremap_base;
463
464#define pmd_ERROR(e) \ 460#define pmd_ERROR(e) \
465 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e)) 461 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e))
466#define pgd_ERROR(e) \ 462#define pgd_ERROR(e) \
467 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e)) 463 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e))
468 464
469extern pgd_t swapper_pg_dir[]; 465extern pgd_t swapper_pg_dir[];
470extern pgd_t ioremap_dir[];
471 466
472extern void paging_init(void); 467extern void paging_init(void);
473 468
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 809c634ba1df..3084099086a8 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -430,16 +430,6 @@ struct thread_struct {
430} 430}
431 431
432/* 432/*
433 * Note: the vm_start and vm_end fields here should *not*
434 * be in kernel space. (Could vm_end == vm_start perhaps?)
435 */
436#define IOREMAP_MMAP { &ioremap_mm, 0, 0x1000, NULL, \
437 PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
438 1, NULL, NULL }
439
440extern struct mm_struct ioremap_mm;
441
442/*
443 * Return saved PC of a blocked thread. For now, this is the "user" PC 433 * Return saved PC of a blocked thread. For now, this is the "user" PC
444 */ 434 */
445#define thread_saved_pc(tsk) \ 435#define thread_saved_pc(tsk) \
diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h
index c8646fa999c2..8115ecb8feee 100644
--- a/include/asm-ppc64/smp.h
+++ b/include/asm-ppc64/smp.h
@@ -45,7 +45,7 @@ void generic_cpu_die(unsigned int cpu);
45void generic_mach_cpu_die(void); 45void generic_mach_cpu_die(void);
46#endif 46#endif
47 47
48#define __smp_processor_id() (get_paca()->paca_index) 48#define raw_smp_processor_id() (get_paca()->paca_index)
49#define hard_smp_processor_id() (get_paca()->hw_cpu_id) 49#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
50 50
51extern cpumask_t cpu_sibling_map[NR_CPUS]; 51extern cpumask_t cpu_sibling_map[NR_CPUS];
diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h
index 9473786387a3..dd50e57a928f 100644
--- a/include/asm-s390/smp.h
+++ b/include/asm-s390/smp.h
@@ -47,7 +47,7 @@ extern int smp_call_function_on(void (*func) (void *info), void *info,
47 47
48#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */ 48#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
49 49
50#define smp_processor_id() (S390_lowcore.cpu_data.cpu_nr) 50#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
51 51
52extern int smp_get_cpu(cpumask_t cpu_map); 52extern int smp_get_cpu(cpumask_t cpu_map);
53extern void smp_put_cpu(int cpu); 53extern void smp_put_cpu(int cpu);
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 4c6d129e7d91..180467be8e7b 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -31,6 +31,7 @@
31#define HPAGE_SIZE (1UL << HPAGE_SHIFT) 31#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
32#define HPAGE_MASK (~(HPAGE_SIZE-1)) 32#define HPAGE_MASK (~(HPAGE_SIZE-1))
33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) 33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
34#define ARCH_HAS_SETCLEAR_HUGE_PTE
34#endif 35#endif
35 36
36#ifdef __KERNEL__ 37#ifdef __KERNEL__
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index cd847a47a9aa..ecb909572d3f 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -196,6 +196,7 @@ static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
196static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } 196static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
197static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } 197static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
198static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; } 198static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
199static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
199 200
200/* 201/*
201 * Macro and implementation to make a page protection as uncachable. 202 * Macro and implementation to make a page protection as uncachable.
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h
index 38b54469d7d1..f19a8b3b69a6 100644
--- a/include/asm-sh/smp.h
+++ b/include/asm-sh/smp.h
@@ -25,7 +25,7 @@ extern cpumask_t cpu_possible_map;
25 25
26#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) 26#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
27 27
28#define smp_processor_id() (current_thread_info()->cpu) 28#define raw_smp_processor_id() (current_thread_info()->cpu)
29 29
30/* I've no idea what the real meaning of this is */ 30/* I've no idea what the real meaning of this is */
31#define PROC_CHANGE_PENALTY 20 31#define PROC_CHANGE_PENALTY 20
diff --git a/include/asm-sh64/page.h b/include/asm-sh64/page.h
index e1f7f5a41210..d6167f1c0e99 100644
--- a/include/asm-sh64/page.h
+++ b/include/asm-sh64/page.h
@@ -41,6 +41,7 @@
41#define HPAGE_SIZE (1UL << HPAGE_SHIFT) 41#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
42#define HPAGE_MASK (~(HPAGE_SIZE-1)) 42#define HPAGE_MASK (~(HPAGE_SIZE-1))
43#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) 43#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
44#define ARCH_HAS_SETCLEAR_HUGE_PTE
44#endif 45#endif
45 46
46#ifdef __KERNEL__ 47#ifdef __KERNEL__
diff --git a/include/asm-sh64/pgtable.h b/include/asm-sh64/pgtable.h
index 525e1523ef5f..78ac6be2d9ef 100644
--- a/include/asm-sh64/pgtable.h
+++ b/include/asm-sh64/pgtable.h
@@ -430,6 +430,8 @@ extern inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) |
430extern inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_EXECUTE)); return pte; } 430extern inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_EXECUTE)); return pte; }
431extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } 431extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
432extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } 432extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
433extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
434
433 435
434/* 436/*
435 * Conversion functions: convert a page and protection to a page entry. 437 * Conversion functions: convert a page and protection to a page entry.
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index f986c0d0922a..4f96d8333a12 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -148,7 +148,7 @@ extern __inline__ int hard_smp_processor_id(void)
148} 148}
149#endif 149#endif
150 150
151#define smp_processor_id() (current_thread_info()->cpu) 151#define raw_smp_processor_id() (current_thread_info()->cpu)
152 152
153#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier 153#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
154#define prof_counter(__cpu) cpu_data(__cpu).counter 154#define prof_counter(__cpu) cpu_data(__cpu).counter
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index 219ea043a14a..b87dbbd64bc9 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -95,6 +95,8 @@ typedef unsigned long pgprot_t;
95#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 95#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
96#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) 96#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
97#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 97#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
98#define ARCH_HAS_SETCLEAR_HUGE_PTE
99#define ARCH_HAS_HUGETLB_PREFAULT_HOOK
98#endif 100#endif
99 101
100#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ 102#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index ae2cd5b09a7c..1ae00c5087f1 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -286,6 +286,7 @@ static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
286#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R)) 286#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
287#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE)) 287#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
288#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W)) 288#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
289#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_SZHUGE))
289 290
290/* to find an entry in a page-table-directory. */ 291/* to find an entry in a page-table-directory. */
291#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 292#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index bc1445b904ef..d0bee2413560 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -192,6 +192,40 @@ extern unsigned long get_wchan(struct task_struct *task);
192 192
193#define cpu_relax() barrier() 193#define cpu_relax() barrier()
194 194
195/* Prefetch support. This is tuned for UltraSPARC-III and later.
196 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
197 * a shallower prefetch queue than later chips.
198 */
199#define ARCH_HAS_PREFETCH
200#define ARCH_HAS_PREFETCHW
201#define ARCH_HAS_SPINLOCK_PREFETCH
202
203static inline void prefetch(const void *x)
204{
205 /* We do not use the read prefetch mnemonic because that
206 * prefetches into the prefetch-cache which only is accessible
207 * by floating point operations in UltraSPARC-III and later.
208 * By contrast, "#one_write" prefetches into the L2 cache
209 * in shared state.
210 */
211 __asm__ __volatile__("prefetch [%0], #one_write"
212 : /* no outputs */
213 : "r" (x));
214}
215
216static inline void prefetchw(const void *x)
217{
218 /* The most optimal prefetch to use for writes is
219 * "#n_writes". This brings the cacheline into the
220 * L2 cache in "owned" state.
221 */
222 __asm__ __volatile__("prefetch [%0], #n_writes"
223 : /* no outputs */
224 : "r" (x));
225}
226
227#define spin_lock_prefetch(x) prefetchw(x)
228
195#endif /* !(__ASSEMBLY__) */ 229#endif /* !(__ASSEMBLY__) */
196 230
197#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ 231#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
index 5e3e06d908fe..110a2de89123 100644
--- a/include/asm-sparc64/smp.h
+++ b/include/asm-sparc64/smp.h
@@ -64,7 +64,7 @@ static __inline__ int hard_smp_processor_id(void)
64 } 64 }
65} 65}
66 66
67#define smp_processor_id() (current_thread_info()->cpu) 67#define raw_smp_processor_id() (current_thread_info()->cpu)
68 68
69#endif /* !(__ASSEMBLY__) */ 69#endif /* !(__ASSEMBLY__) */
70 70
diff --git a/include/asm-um/smp.h b/include/asm-um/smp.h
index 4412d5d9c26b..d879eba2b52c 100644
--- a/include/asm-um/smp.h
+++ b/include/asm-um/smp.h
@@ -8,7 +8,8 @@
8#include "asm/current.h" 8#include "asm/current.h"
9#include "linux/cpumask.h" 9#include "linux/cpumask.h"
10 10
11#define smp_processor_id() (current_thread->cpu) 11#define raw_smp_processor_id() (current_thread->cpu)
12
12#define cpu_logical_map(n) (n) 13#define cpu_logical_map(n) (n)
13#define cpu_number_map(n) (n) 14#define cpu_number_map(n) (n)
14#define PROC_CHANGE_PENALTY 15 /* Pick a number, any number */ 15#define PROC_CHANGE_PENALTY 15 /* Pick a number, any number */
diff --git a/include/asm-x86_64/a.out.h b/include/asm-x86_64/a.out.h
index 5952914f4121..7255cde06538 100644
--- a/include/asm-x86_64/a.out.h
+++ b/include/asm-x86_64/a.out.h
@@ -21,7 +21,7 @@ struct exec
21 21
22#ifdef __KERNEL__ 22#ifdef __KERNEL__
23#include <linux/thread_info.h> 23#include <linux/thread_info.h>
24#define STACK_TOP (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE) 24#define STACK_TOP TASK_SIZE
25#endif 25#endif
26 26
27#endif /* __A_OUT_GNU_H__ */ 27#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h
index f43048035a03..9ce338c3a71e 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86_64/page.h
@@ -28,6 +28,7 @@
28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) 28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
29#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 29#define HPAGE_MASK (~(HPAGE_SIZE - 1))
30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
31#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
31 32
32#ifdef __KERNEL__ 33#ifdef __KERNEL__
33#ifndef __ASSEMBLY__ 34#ifndef __ASSEMBLY__
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index db2a0efbf573..4eec176c3c39 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -253,6 +253,7 @@ extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;
253extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } 253extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
254static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 254static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
255 255
256#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
256extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 257extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
257extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 258extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
258extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } 259extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
@@ -263,6 +264,7 @@ extern inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
263extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } 264extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
264extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } 265extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
265extern inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; } 266extern inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
267extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | __LARGE_PTE)); return pte; }
266 268
267struct vm_area_struct; 269struct vm_area_struct;
268 270
@@ -290,7 +292,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
290 */ 292 */
291#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) 293#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
292 294
293#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
294static inline int pmd_large(pmd_t pte) { 295static inline int pmd_large(pmd_t pte) {
295 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE; 296 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
296} 297}
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index d641b19f6da5..8b55f139968f 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -160,16 +160,17 @@ static inline void clear_in_cr4 (unsigned long mask)
160/* 160/*
161 * User space process size. 47bits minus one guard page. 161 * User space process size. 47bits minus one guard page.
162 */ 162 */
163#define TASK_SIZE (0x800000000000UL - 4096) 163#define TASK_SIZE64 (0x800000000000UL - 4096)
164 164
165/* This decides where the kernel will search for a free chunk of vm 165/* This decides where the kernel will search for a free chunk of vm
166 * space during mmap's. 166 * space during mmap's.
167 */ 167 */
168#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? 0xc0000000 : 0xFFFFe000) 168#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? 0xc0000000 : 0xFFFFe000)
169#define TASK_UNMAPPED_32 PAGE_ALIGN(IA32_PAGE_OFFSET/3) 169
170#define TASK_UNMAPPED_64 PAGE_ALIGN(TASK_SIZE/3) 170#define TASK_SIZE (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE64)
171#define TASK_UNMAPPED_BASE \ 171#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? IA32_PAGE_OFFSET : TASK_SIZE64)
172 (test_thread_flag(TIF_IA32) ? TASK_UNMAPPED_32 : TASK_UNMAPPED_64) 172
173#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE/3)
173 174
174/* 175/*
175 * Size of io_bitmap. 176 * Size of io_bitmap.
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
index 96844fecbde8..a7425aa5a3b7 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86_64/smp.h
@@ -68,7 +68,7 @@ static inline int num_booting_cpus(void)
68 return cpus_weight(cpu_callout_map); 68 return cpus_weight(cpu_callout_map);
69} 69}
70 70
71#define __smp_processor_id() read_pda(cpunumber) 71#define raw_smp_processor_id() read_pda(cpunumber)
72 72
73extern __inline int hard_smp_processor_id(void) 73extern __inline int hard_smp_processor_id(void)
74{ 74{
diff --git a/include/linux/arcfb.h b/include/linux/arcfb.h
new file mode 100644
index 000000000000..721e7654daeb
--- /dev/null
+++ b/include/linux/arcfb.h
@@ -0,0 +1,8 @@
1#ifndef __LINUX_ARCFB_H__
2#define __LINUX_ARCFB_H__
3
4#define FBIO_WAITEVENT _IO('F', 0x88)
5#define FBIO_GETCONTROL2 _IOR('F', 0x89, size_t)
6
7#endif
8
diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h
index a1657fb99516..9343c89d843c 100644
--- a/include/linux/auto_fs4.h
+++ b/include/linux/auto_fs4.h
@@ -23,7 +23,7 @@
23#define AUTOFS_MIN_PROTO_VERSION 3 23#define AUTOFS_MIN_PROTO_VERSION 3
24#define AUTOFS_MAX_PROTO_VERSION 4 24#define AUTOFS_MAX_PROTO_VERSION 4
25 25
26#define AUTOFS_PROTO_SUBVERSION 6 26#define AUTOFS_PROTO_SUBVERSION 7
27 27
28/* Mask for expire behaviour */ 28/* Mask for expire behaviour */
29#define AUTOFS_EXP_IMMEDIATE 1 29#define AUTOFS_EXP_IMMEDIATE 1
diff --git a/include/linux/fb.h b/include/linux/fb.h
index b468bf496547..bc24beeed971 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -524,11 +524,11 @@ struct fb_pixmap {
524 u32 offset; /* current offset to buffer */ 524 u32 offset; /* current offset to buffer */
525 u32 buf_align; /* byte alignment of each bitmap */ 525 u32 buf_align; /* byte alignment of each bitmap */
526 u32 scan_align; /* alignment per scanline */ 526 u32 scan_align; /* alignment per scanline */
527 u32 access_align; /* alignment per read/write */ 527 u32 access_align; /* alignment per read/write (bits) */
528 u32 flags; /* see FB_PIXMAP_* */ 528 u32 flags; /* see FB_PIXMAP_* */
529 /* access methods */ 529 /* access methods */
530 void (*outbuf)(struct fb_info *info, u8 *addr, u8 *src, unsigned int size); 530 void (*writeio)(struct fb_info *info, void __iomem *dst, void *src, unsigned int size);
531 u8 (*inbuf) (struct fb_info *info, u8 *addr); 531 void (*readio) (struct fb_info *info, void *dst, void __iomem *src, unsigned int size);
532}; 532};
533 533
534 534
@@ -816,18 +816,9 @@ extern int unregister_framebuffer(struct fb_info *fb_info);
816extern int fb_prepare_logo(struct fb_info *fb_info); 816extern int fb_prepare_logo(struct fb_info *fb_info);
817extern int fb_show_logo(struct fb_info *fb_info); 817extern int fb_show_logo(struct fb_info *fb_info);
818extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size); 818extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size);
819extern void fb_iomove_buf_unaligned(struct fb_info *info, struct fb_pixmap *buf, 819extern void fb_pad_unaligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 idx,
820 u8 *dst, u32 d_pitch, u8 *src, u32 idx,
821 u32 height, u32 shift_high, u32 shift_low, u32 mod); 820 u32 height, u32 shift_high, u32 shift_low, u32 mod);
822extern void fb_iomove_buf_aligned(struct fb_info *info, struct fb_pixmap *buf, 821extern void fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch, u32 height);
823 u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch,
824 u32 height);
825extern void fb_sysmove_buf_unaligned(struct fb_info *info, struct fb_pixmap *buf,
826 u8 *dst, u32 d_pitch, u8 *src, u32 idx,
827 u32 height, u32 shift_high, u32 shift_low, u32 mod);
828extern void fb_sysmove_buf_aligned(struct fb_info *info, struct fb_pixmap *buf,
829 u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch,
830 u32 height);
831extern void fb_set_suspend(struct fb_info *info, int state); 822extern void fb_set_suspend(struct fb_info *info, int state);
832extern int fb_get_color_depth(struct fb_var_screeninfo *var); 823extern int fb_get_color_depth(struct fb_var_screeninfo *var);
833extern int fb_get_options(char *name, char **option); 824extern int fb_get_options(char *name, char **option);
diff --git a/include/linux/font.h b/include/linux/font.h
index fc2d690c9d5f..8fc80a7d78ac 100644
--- a/include/linux/font.h
+++ b/include/linux/font.h
@@ -25,19 +25,23 @@ struct font_desc {
25#define VGA8x16_IDX 1 25#define VGA8x16_IDX 1
26#define PEARL8x8_IDX 2 26#define PEARL8x8_IDX 2
27#define VGA6x11_IDX 3 27#define VGA6x11_IDX 3
28#define SUN8x16_IDX 4 28#define FONT7x14_IDX 4
29#define SUN12x22_IDX 5 29#define FONT10x18_IDX 5
30#define ACORN8x8_IDX 6 30#define SUN8x16_IDX 6
31#define MINI4x6_IDX 7 31#define SUN12x22_IDX 7
32#define ACORN8x8_IDX 8
33#define MINI4x6_IDX 9
32 34
33extern struct font_desc font_vga_8x8, 35extern struct font_desc font_vga_8x8,
34 font_vga_8x16, 36 font_vga_8x16,
35 font_pearl_8x8, 37 font_pearl_8x8,
36 font_vga_6x11, 38 font_vga_6x11,
37 font_sun_8x16, 39 font_7x14,
38 font_sun_12x22, 40 font_10x18,
39 font_acorn_8x8, 41 font_sun_8x16,
40 font_mini_4x6; 42 font_sun_12x22,
43 font_acorn_8x8,
44 font_mini_4x6;
41 45
42/* Find a font with a specific name */ 46/* Find a font with a specific name */
43 47
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index faaff4c64559..70f54af87b9f 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -51,6 +51,7 @@ struct gianfar_platform_data {
51 51
52 /* board specific information */ 52 /* board specific information */
53 u32 board_flags; 53 u32 board_flags;
54 u32 phy_flags;
54 u32 phyid; 55 u32 phyid;
55 u32 interruptPHY; 56 u32 interruptPHY;
56 u8 mac_addr[6]; 57 u8 mac_addr[6];
@@ -61,9 +62,14 @@ struct gianfar_platform_data {
61#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 62#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
62#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004 63#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004
63#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008 64#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008
65#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
66#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
67#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
68#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
64 69
65/* Flags in gianfar_platform_data */ 70/* Flags in gianfar_platform_data */
66#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* if not set use a timer */ 71#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
72#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
67 73
68struct fsl_i2c_platform_data { 74struct fsl_i2c_platform_data {
69 /* device specific information */ 75 /* device specific information */
diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
new file mode 100644
index 000000000000..7fd0576a4454
--- /dev/null
+++ b/include/linux/genalloc.h
@@ -0,0 +1,40 @@
1/*
2 * Basic general purpose allocator for managing special purpose memory
3 * not managed by the regular kmalloc/kfree interface.
4 * Uses for this includes on-device special memory, uncached memory
5 * etc.
6 *
7 * This code is based on the buddy allocator found in the sym53c8xx_2
8 * driver, adapted for general purpose use.
9 *
10 * This source code is licensed under the GNU General Public License,
11 * Version 2. See the file COPYING for more details.
12 */
13
14#include <linux/spinlock.h>
15
16#define ALLOC_MIN_SHIFT 5 /* 32 bytes minimum */
17/*
18 * Link between free memory chunks of a given size.
19 */
20struct gen_pool_link {
21 struct gen_pool_link *next;
22};
23
24/*
25 * Memory pool descriptor.
26 */
27struct gen_pool {
28 spinlock_t lock;
29 unsigned long (*get_new_chunk)(struct gen_pool *);
30 struct gen_pool *next;
31 struct gen_pool_link *h;
32 unsigned long private;
33 int max_chunk_shift;
34};
35
36unsigned long gen_pool_alloc(struct gen_pool *poolp, int size);
37void gen_pool_free(struct gen_pool *mp, unsigned long ptr, int size);
38struct gen_pool *gen_pool_create(int nr_chunks, int max_chunk_shift,
39 unsigned long (*fp)(struct gen_pool *),
40 unsigned long data);
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index af7407e8cfc5..8d6bf608b199 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -39,6 +39,7 @@ struct vm_area_struct;
39#define __GFP_COMP 0x4000u /* Add compound page metadata */ 39#define __GFP_COMP 0x4000u /* Add compound page metadata */
40#define __GFP_ZERO 0x8000u /* Return zeroed page on success */ 40#define __GFP_ZERO 0x8000u /* Return zeroed page on success */
41#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */ 41#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */
42#define __GFP_NORECLAIM 0x20000u /* No realy zone reclaim during allocation */
42 43
43#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */ 44#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */
44#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1) 45#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1)
@@ -47,7 +48,7 @@ struct vm_area_struct;
47#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \ 48#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \
48 __GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \ 49 __GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \
49 __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \ 50 __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \
50 __GFP_NOMEMALLOC) 51 __GFP_NOMEMALLOC|__GFP_NORECLAIM)
51 52
52#define GFP_ATOMIC (__GFP_HIGH) 53#define GFP_ATOMIC (__GFP_HIGH)
53#define GFP_NOIO (__GFP_WAIT) 54#define GFP_NOIO (__GFP_WAIT)
@@ -132,5 +133,10 @@ extern void FASTCALL(free_cold_page(struct page *page));
132#define free_page(addr) free_pages((addr),0) 133#define free_page(addr) free_pages((addr),0)
133 134
134void page_alloc_init(void); 135void page_alloc_init(void);
136#ifdef CONFIG_NUMA
137void drain_remote_pages(void);
138#else
139static inline void drain_remote_pages(void) { };
140#endif
135 141
136#endif /* __LINUX_GFP_H */ 142#endif /* __LINUX_GFP_H */
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 6af1ae4a8211..f529d1442815 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -4,6 +4,7 @@
4#ifdef CONFIG_HUGETLB_PAGE 4#ifdef CONFIG_HUGETLB_PAGE
5 5
6#include <linux/mempolicy.h> 6#include <linux/mempolicy.h>
7#include <asm/tlbflush.h>
7 8
8struct ctl_table; 9struct ctl_table;
9 10
@@ -22,12 +23,6 @@ int hugetlb_report_meminfo(char *);
22int hugetlb_report_node_meminfo(int, char *); 23int hugetlb_report_node_meminfo(int, char *);
23int is_hugepage_mem_enough(size_t); 24int is_hugepage_mem_enough(size_t);
24unsigned long hugetlb_total_pages(void); 25unsigned long hugetlb_total_pages(void);
25struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,
26 int write);
27struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
28 pmd_t *pmd, int write);
29int is_aligned_hugepage_range(unsigned long addr, unsigned long len);
30int pmd_huge(pmd_t pmd);
31struct page *alloc_huge_page(void); 26struct page *alloc_huge_page(void);
32void free_huge_page(struct page *); 27void free_huge_page(struct page *);
33 28
@@ -35,6 +30,17 @@ extern unsigned long max_huge_pages;
35extern const unsigned long hugetlb_zero, hugetlb_infinity; 30extern const unsigned long hugetlb_zero, hugetlb_infinity;
36extern int sysctl_hugetlb_shm_group; 31extern int sysctl_hugetlb_shm_group;
37 32
33/* arch callbacks */
34
35pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr);
36pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr);
37struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,
38 int write);
39struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
40 pmd_t *pmd, int write);
41int is_aligned_hugepage_range(unsigned long addr, unsigned long len);
42int pmd_huge(pmd_t pmd);
43
38#ifndef ARCH_HAS_HUGEPAGE_ONLY_RANGE 44#ifndef ARCH_HAS_HUGEPAGE_ONLY_RANGE
39#define is_hugepage_only_range(mm, addr, len) 0 45#define is_hugepage_only_range(mm, addr, len) 0
40#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \ 46#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \
@@ -48,6 +54,28 @@ extern int sysctl_hugetlb_shm_group;
48int prepare_hugepage_range(unsigned long addr, unsigned long len); 54int prepare_hugepage_range(unsigned long addr, unsigned long len);
49#endif 55#endif
50 56
57#ifndef ARCH_HAS_SETCLEAR_HUGE_PTE
58#define set_huge_pte_at(mm, addr, ptep, pte) set_pte_at(mm, addr, ptep, pte)
59#define huge_ptep_get_and_clear(mm, addr, ptep) ptep_get_and_clear(mm, addr, ptep)
60#else
61void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
62 pte_t *ptep, pte_t pte);
63pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
64 pte_t *ptep);
65#endif
66
67#ifndef ARCH_HAS_HUGETLB_PREFAULT_HOOK
68#define hugetlb_prefault_arch_hook(mm) do { } while (0)
69#else
70void hugetlb_prefault_arch_hook(struct mm_struct *mm);
71#endif
72
73#ifndef ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
74#define hugetlb_clean_stale_pgtable(pte) BUG()
75#else
76void hugetlb_clean_stale_pgtable(pte_t *pte);
77#endif
78
51#else /* !CONFIG_HUGETLB_PAGE */ 79#else /* !CONFIG_HUGETLB_PAGE */
52 80
53static inline int is_vm_hugetlb_page(struct vm_area_struct *vma) 81static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)
diff --git a/include/linux/ioc4.h b/include/linux/ioc4.h
new file mode 100644
index 000000000000..3dd18b785ebd
--- /dev/null
+++ b/include/linux/ioc4.h
@@ -0,0 +1,179 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
7 */
8
9#ifndef _LINUX_IOC4_H
10#define _LINUX_IOC4_H
11
12#include <linux/interrupt.h>
13
14/***************
15 * Definitions *
16 ***************/
17
18/* Miscellaneous values inherent to hardware */
19
20#define IOC4_EXTINT_COUNT_DIVISOR 520 /* PCI clocks per COUNT tick */
21
22/***********************************
23 * Structures needed by subdrivers *
24 ***********************************/
25
26/* This structure fully describes the IOC4 miscellaneous registers which
27 * appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
28 * PCI resource is managed by the main IOC4 driver because it contains
29 * registers of interest to many different IOC4 subdrivers.
30 */
31struct ioc4_misc_regs {
32 /* Miscellaneous IOC4 registers */
33 union ioc4_pci_err_addr_l {
34 uint32_t raw;
35 struct {
36 uint32_t valid:1; /* Address captured */
37 uint32_t master_id:4; /* Unit causing error
38 * 0/1: Serial port 0 TX/RX
39 * 2/3: Serial port 1 TX/RX
40 * 4/5: Serial port 2 TX/RX
41 * 6/7: Serial port 3 TX/RX
42 * 8: ATA/ATAPI
43 * 9-15: Undefined
44 */
45 uint32_t mul_err:1; /* Multiple errors occurred */
46 uint32_t addr:26; /* Bits 31-6 of error addr */
47 } fields;
48 } pci_err_addr_l;
49 uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
50 union ioc4_sio_int {
51 uint32_t raw;
52 struct {
53 uint8_t tx_mt:1; /* TX ring buffer empty */
54 uint8_t rx_full:1; /* RX ring buffer full */
55 uint8_t rx_high:1; /* RX high-water exceeded */
56 uint8_t rx_timer:1; /* RX timer has triggered */
57 uint8_t delta_dcd:1; /* DELTA_DCD seen */
58 uint8_t delta_cts:1; /* DELTA_CTS seen */
59 uint8_t intr_pass:1; /* Interrupt pass-through */
60 uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
61 } fields[4];
62 } sio_ir; /* Serial interrupt state */
63 union ioc4_other_int {
64 uint32_t raw;
65 struct {
66 uint32_t ata_int:1; /* ATA port passthru */
67 uint32_t ata_memerr:1; /* ATA halted by mem error */
68 uint32_t memerr:4; /* Serial halted by mem err */
69 uint32_t kbd_int:1; /* kbd/mouse intr asserted */
70 uint32_t reserved:16; /* zero */
71 uint32_t rt_int:1; /* INT_OUT section latch */
72 uint32_t gen_int:8; /* Intr. from generic pins */
73 } fields;
74 } other_ir; /* Other interrupt state */
75 union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
76 union ioc4_other_int other_ies; /* Other interrupt enable set */
77 union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
78 union ioc4_other_int other_iec; /* Other interrupt enable clear */
79 union ioc4_sio_cr {
80 uint32_t raw;
81 struct {
82 uint32_t cmd_pulse:4; /* Bytebus strobe width */
83 uint32_t arb_diag:3; /* PCI bus requester */
84 uint32_t sio_diag_idle:1; /* Active ser req? */
85 uint32_t ata_diag_idle:1; /* Active ATA req? */
86 uint32_t ata_diag_active:1; /* ATA req is winner */
87 uint32_t reserved:22; /* zero */
88 } fields;
89 } sio_cr;
90 uint32_t unused1;
91 union ioc4_int_out {
92 uint32_t raw;
93 struct {
94 uint32_t count:16; /* Period control */
95 uint32_t mode:3; /* Output signal shape */
96 uint32_t reserved:11; /* zero */
97 uint32_t diag:1; /* Timebase control */
98 uint32_t int_out:1; /* Current value */
99 } fields;
100 } int_out; /* External interrupt output control */
101 uint32_t unused2;
102 union ioc4_gpcr {
103 uint32_t raw;
104 struct {
105 uint32_t dir:8; /* Pin direction */
106 uint32_t edge:8; /* Edge/level mode */
107 uint32_t reserved1:4; /* zero */
108 uint32_t int_out_en:1; /* INT_OUT enable */
109 uint32_t reserved2:11; /* zero */
110 } fields;
111 } gpcr_s; /* Generic PIO control set */
112 union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
113 union ioc4_gpdr {
114 uint32_t raw;
115 struct {
116 uint32_t gen_pin:8; /* State of pins */
117 uint32_t reserved:24;
118 } fields;
119 } gpdr; /* Generic PIO data */
120 uint32_t unused3;
121 union ioc4_gppr {
122 uint32_t raw;
123 struct {
124 uint32_t gen_pin:1; /* Single pin state */
125 uint32_t reserved:31;
126 } fields;
127 } gppr[8]; /* Generic PIO pins */
128};
129
130/* Masks for GPCR DIR pins */
131#define IOC4_GPCR_DIR_0 0x01 /* External interrupt output */
132#define IOC4_GPCR_DIR_1 0x02 /* External interrupt input */
133#define IOC4_GPCR_DIR_2 0x04
134#define IOC4_GPCR_DIR_3 0x08 /* Keyboard/mouse presence */
135#define IOC4_GPCR_DIR_4 0x10 /* Ser. port 0 xcvr select (0=232, 1=422) */
136#define IOC4_GPCR_DIR_5 0x20 /* Ser. port 1 xcvr select (0=232, 1=422) */
137#define IOC4_GPCR_DIR_6 0x40 /* Ser. port 2 xcvr select (0=232, 1=422) */
138#define IOC4_GPCR_DIR_7 0x80 /* Ser. port 3 xcvr select (0=232, 1=422) */
139
140/* Masks for GPCR EDGE pins */
141#define IOC4_GPCR_EDGE_0 0x01
142#define IOC4_GPCR_EDGE_1 0x02 /* External interrupt input */
143#define IOC4_GPCR_EDGE_2 0x04
144#define IOC4_GPCR_EDGE_3 0x08
145#define IOC4_GPCR_EDGE_4 0x10
146#define IOC4_GPCR_EDGE_5 0x20
147#define IOC4_GPCR_EDGE_6 0x40
148#define IOC4_GPCR_EDGE_7 0x80
149
150/* One of these per IOC4 */
151struct ioc4_driver_data {
152 struct list_head idd_list;
153 unsigned long idd_bar0;
154 struct pci_dev *idd_pdev;
155 const struct pci_device_id *idd_pci_id;
156 struct __iomem ioc4_misc_regs *idd_misc_regs;
157 unsigned long count_period;
158 void *idd_serial_data;
159};
160
161/* One per submodule */
162struct ioc4_submodule {
163 struct list_head is_list;
164 char *is_name;
165 struct module *is_owner;
166 int (*is_probe) (struct ioc4_driver_data *);
167 int (*is_remove) (struct ioc4_driver_data *);
168};
169
170#define IOC4_NUM_CARDS 8 /* max cards per partition */
171
172/**********************************
173 * Functions needed by submodules *
174 **********************************/
175
176extern int ioc4_register_submodule(struct ioc4_submodule *);
177extern void ioc4_unregister_submodule(struct ioc4_submodule *);
178
179#endif /* _LINUX_IOC4_H */
diff --git a/include/linux/ioc4_common.h b/include/linux/ioc4_common.h
deleted file mode 100644
index b03bcc46df55..000000000000
--- a/include/linux/ioc4_common.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
7 */
8
9#ifndef _LINUX_IOC4_COMMON_H
10#define _LINUX_IOC4_COMMON_H
11
12/* prototypes */
13
14int ioc4_serial_init(void);
15
16int ioc4_serial_attach_one(struct pci_dev *pdev, const struct
17 pci_device_id *pci_id);
18int ioc4_ide_attach_one(struct pci_dev *pdev, const struct
19 pci_device_id *pci_id);
20
21#endif /* _LINUX_IOC4_COMMON_H */
diff --git a/include/linux/irq.h b/include/linux/irq.h
index c3ff4d101667..7fc1022be9ee 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -47,6 +47,10 @@ struct hw_interrupt_type {
47 void (*ack)(unsigned int irq); 47 void (*ack)(unsigned int irq);
48 void (*end)(unsigned int irq); 48 void (*end)(unsigned int irq);
49 void (*set_affinity)(unsigned int irq, cpumask_t dest); 49 void (*set_affinity)(unsigned int irq, cpumask_t dest);
50 /* Currently used only by UML, might disappear one day.*/
51#ifdef CONFIG_IRQ_RELEASE_METHOD
52 void (*release)(unsigned int irq, void *dev_id);
53#endif
50}; 54};
51 55
52typedef struct hw_interrupt_type hw_irq_controller; 56typedef struct hw_interrupt_type hw_irq_controller;
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 17518fe0b311..1813b162b0a8 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -691,6 +691,12 @@ extern void show_mem(void);
691extern void si_meminfo(struct sysinfo * val); 691extern void si_meminfo(struct sysinfo * val);
692extern void si_meminfo_node(struct sysinfo *val, int nid); 692extern void si_meminfo_node(struct sysinfo *val, int nid);
693 693
694#ifdef CONFIG_NUMA
695extern void setup_per_cpu_pageset(void);
696#else
697static inline void setup_per_cpu_pageset(void) {}
698#endif
699
694/* prio_tree.c */ 700/* prio_tree.c */
695void vma_prio_tree_add(struct vm_area_struct *, struct vm_area_struct *old); 701void vma_prio_tree_add(struct vm_area_struct *, struct vm_area_struct *old);
696void vma_prio_tree_insert(struct vm_area_struct *, struct prio_tree_root *); 702void vma_prio_tree_insert(struct vm_area_struct *, struct prio_tree_root *);
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index e530c6c092f1..4733d35d8223 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -63,6 +63,12 @@ struct per_cpu_pageset {
63#endif 63#endif
64} ____cacheline_aligned_in_smp; 64} ____cacheline_aligned_in_smp;
65 65
66#ifdef CONFIG_NUMA
67#define zone_pcp(__z, __cpu) ((__z)->pageset[(__cpu)])
68#else
69#define zone_pcp(__z, __cpu) (&(__z)->pageset[(__cpu)])
70#endif
71
66#define ZONE_DMA 0 72#define ZONE_DMA 0
67#define ZONE_NORMAL 1 73#define ZONE_NORMAL 1
68#define ZONE_HIGHMEM 2 74#define ZONE_HIGHMEM 2
@@ -122,8 +128,11 @@ struct zone {
122 */ 128 */
123 unsigned long lowmem_reserve[MAX_NR_ZONES]; 129 unsigned long lowmem_reserve[MAX_NR_ZONES];
124 130
131#ifdef CONFIG_NUMA
132 struct per_cpu_pageset *pageset[NR_CPUS];
133#else
125 struct per_cpu_pageset pageset[NR_CPUS]; 134 struct per_cpu_pageset pageset[NR_CPUS];
126 135#endif
127 /* 136 /*
128 * free areas of different sizes 137 * free areas of different sizes
129 */ 138 */
@@ -145,6 +154,14 @@ struct zone {
145 int all_unreclaimable; /* All pages pinned */ 154 int all_unreclaimable; /* All pages pinned */
146 155
147 /* 156 /*
157 * Does the allocator try to reclaim pages from the zone as soon
158 * as it fails a watermark_ok() in __alloc_pages?
159 */
160 int reclaim_pages;
161 /* A count of how many reclaimers are scanning this zone */
162 atomic_t reclaim_in_progress;
163
164 /*
148 * prev_priority holds the scanning priority for this zone. It is 165 * prev_priority holds the scanning priority for this zone. It is
149 * defined as the scanning priority at which we achieved our reclaim 166 * defined as the scanning priority at which we achieved our reclaim
150 * target at the previous try_to_free_pages() or balance_pgdat() 167 * target at the previous try_to_free_pages() or balance_pgdat()
@@ -381,7 +398,7 @@ int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, struct file *,
381 398
382#include <linux/topology.h> 399#include <linux/topology.h>
383/* Returns the number of the current Node. */ 400/* Returns the number of the current Node. */
384#define numa_node_id() (cpu_to_node(_smp_processor_id())) 401#define numa_node_id() (cpu_to_node(raw_smp_processor_id()))
385 402
386#ifndef CONFIG_DISCONTIGMEM 403#ifndef CONFIG_DISCONTIGMEM
387 404
diff --git a/include/linux/netfilter_ipv4.h b/include/linux/netfilter_ipv4.h
index 9e5750079e09..3ebc36afae1a 100644
--- a/include/linux/netfilter_ipv4.h
+++ b/include/linux/netfilter_ipv4.h
@@ -75,12 +75,6 @@ enum nf_ip_hook_priorities {
75#define SO_ORIGINAL_DST 80 75#define SO_ORIGINAL_DST 80
76 76
77#ifdef __KERNEL__ 77#ifdef __KERNEL__
78#ifdef CONFIG_NETFILTER_DEBUG
79void nf_debug_ip_local_deliver(struct sk_buff *skb);
80void nf_debug_ip_loopback_xmit(struct sk_buff *newskb);
81void nf_debug_ip_finish_output2(struct sk_buff *skb);
82#endif /*CONFIG_NETFILTER_DEBUG*/
83
84extern int ip_route_me_harder(struct sk_buff **pskb); 78extern int ip_route_me_harder(struct sk_buff **pskb);
85 79
86/* Call this before modifying an existing IP packet: ensures it is 80/* Call this before modifying an existing IP packet: ensures it is
diff --git a/include/linux/netfilter_ipv4/ip_conntrack_core.h b/include/linux/netfilter_ipv4/ip_conntrack_core.h
index d84be02cb4fc..694aec9b4784 100644
--- a/include/linux/netfilter_ipv4/ip_conntrack_core.h
+++ b/include/linux/netfilter_ipv4/ip_conntrack_core.h
@@ -1,7 +1,6 @@
1#ifndef _IP_CONNTRACK_CORE_H 1#ifndef _IP_CONNTRACK_CORE_H
2#define _IP_CONNTRACK_CORE_H 2#define _IP_CONNTRACK_CORE_H
3#include <linux/netfilter.h> 3#include <linux/netfilter.h>
4#include <linux/netfilter_ipv4/lockhelp.h>
5 4
6/* This header is used to share core functionality between the 5/* This header is used to share core functionality between the
7 standalone connection tracking module, and the compatibility layer's use 6 standalone connection tracking module, and the compatibility layer's use
@@ -47,6 +46,6 @@ static inline int ip_conntrack_confirm(struct sk_buff **pskb)
47 46
48extern struct list_head *ip_conntrack_hash; 47extern struct list_head *ip_conntrack_hash;
49extern struct list_head ip_conntrack_expect_list; 48extern struct list_head ip_conntrack_expect_list;
50DECLARE_RWLOCK_EXTERN(ip_conntrack_lock); 49extern rwlock_t ip_conntrack_lock;
51#endif /* _IP_CONNTRACK_CORE_H */ 50#endif /* _IP_CONNTRACK_CORE_H */
52 51
diff --git a/include/linux/netfilter_ipv4/ip_nat.h b/include/linux/netfilter_ipv4/ip_nat.h
index 2b72b86176f0..e201ec6e9905 100644
--- a/include/linux/netfilter_ipv4/ip_nat.h
+++ b/include/linux/netfilter_ipv4/ip_nat.h
@@ -50,10 +50,9 @@ struct ip_nat_multi_range_compat
50 50
51#ifdef __KERNEL__ 51#ifdef __KERNEL__
52#include <linux/list.h> 52#include <linux/list.h>
53#include <linux/netfilter_ipv4/lockhelp.h>
54 53
55/* Protects NAT hash tables, and NAT-private part of conntracks. */ 54/* Protects NAT hash tables, and NAT-private part of conntracks. */
56DECLARE_RWLOCK_EXTERN(ip_nat_lock); 55extern rwlock_t ip_nat_lock;
57 56
58/* The structure embedded in the conntrack structure. */ 57/* The structure embedded in the conntrack structure. */
59struct ip_nat_info 58struct ip_nat_info
diff --git a/include/linux/netfilter_ipv4/listhelp.h b/include/linux/netfilter_ipv4/listhelp.h
index f2ae7c5e57bb..360429f48737 100644
--- a/include/linux/netfilter_ipv4/listhelp.h
+++ b/include/linux/netfilter_ipv4/listhelp.h
@@ -2,7 +2,6 @@
2#define _LISTHELP_H 2#define _LISTHELP_H
3#include <linux/config.h> 3#include <linux/config.h>
4#include <linux/list.h> 4#include <linux/list.h>
5#include <linux/netfilter_ipv4/lockhelp.h>
6 5
7/* Header to do more comprehensive job than linux/list.h; assume list 6/* Header to do more comprehensive job than linux/list.h; assume list
8 is first entry in structure. */ 7 is first entry in structure. */
diff --git a/include/linux/netfilter_ipv4/lockhelp.h b/include/linux/netfilter_ipv4/lockhelp.h
deleted file mode 100644
index a3288633ab46..000000000000
--- a/include/linux/netfilter_ipv4/lockhelp.h
+++ /dev/null
@@ -1,129 +0,0 @@
1#ifndef _LOCKHELP_H
2#define _LOCKHELP_H
3#include <linux/config.h>
4
5#include <linux/spinlock.h>
6#include <asm/atomic.h>
7#include <linux/interrupt.h>
8#include <linux/smp.h>
9
10/* Header to do help in lock debugging. */
11
12#ifdef CONFIG_NETFILTER_DEBUG
13struct spinlock_debug
14{
15 spinlock_t l;
16 atomic_t locked_by;
17};
18
19struct rwlock_debug
20{
21 rwlock_t l;
22 long read_locked_map;
23 long write_locked_map;
24};
25
26#define DECLARE_LOCK(l) \
27struct spinlock_debug l = { SPIN_LOCK_UNLOCKED, ATOMIC_INIT(-1) }
28#define DECLARE_LOCK_EXTERN(l) \
29extern struct spinlock_debug l
30#define DECLARE_RWLOCK(l) \
31struct rwlock_debug l = { RW_LOCK_UNLOCKED, 0, 0 }
32#define DECLARE_RWLOCK_EXTERN(l) \
33extern struct rwlock_debug l
34
35#define MUST_BE_LOCKED(l) \
36do { if (atomic_read(&(l)->locked_by) != smp_processor_id()) \
37 printk("ASSERT %s:%u %s unlocked\n", __FILE__, __LINE__, #l); \
38} while(0)
39
40#define MUST_BE_UNLOCKED(l) \
41do { if (atomic_read(&(l)->locked_by) == smp_processor_id()) \
42 printk("ASSERT %s:%u %s locked\n", __FILE__, __LINE__, #l); \
43} while(0)
44
45/* Write locked OK as well. */
46#define MUST_BE_READ_LOCKED(l) \
47do { if (!((l)->read_locked_map & (1UL << smp_processor_id())) \
48 && !((l)->write_locked_map & (1UL << smp_processor_id()))) \
49 printk("ASSERT %s:%u %s not readlocked\n", __FILE__, __LINE__, #l); \
50} while(0)
51
52#define MUST_BE_WRITE_LOCKED(l) \
53do { if (!((l)->write_locked_map & (1UL << smp_processor_id()))) \
54 printk("ASSERT %s:%u %s not writelocked\n", __FILE__, __LINE__, #l); \
55} while(0)
56
57#define MUST_BE_READ_WRITE_UNLOCKED(l) \
58do { if ((l)->read_locked_map & (1UL << smp_processor_id())) \
59 printk("ASSERT %s:%u %s readlocked\n", __FILE__, __LINE__, #l); \
60 else if ((l)->write_locked_map & (1UL << smp_processor_id())) \
61 printk("ASSERT %s:%u %s writelocked\n", __FILE__, __LINE__, #l); \
62} while(0)
63
64#define LOCK_BH(lk) \
65do { \
66 MUST_BE_UNLOCKED(lk); \
67 spin_lock_bh(&(lk)->l); \
68 atomic_set(&(lk)->locked_by, smp_processor_id()); \
69} while(0)
70
71#define UNLOCK_BH(lk) \
72do { \
73 MUST_BE_LOCKED(lk); \
74 atomic_set(&(lk)->locked_by, -1); \
75 spin_unlock_bh(&(lk)->l); \
76} while(0)
77
78#define READ_LOCK(lk) \
79do { \
80 MUST_BE_READ_WRITE_UNLOCKED(lk); \
81 read_lock_bh(&(lk)->l); \
82 set_bit(smp_processor_id(), &(lk)->read_locked_map); \
83} while(0)
84
85#define WRITE_LOCK(lk) \
86do { \
87 MUST_BE_READ_WRITE_UNLOCKED(lk); \
88 write_lock_bh(&(lk)->l); \
89 set_bit(smp_processor_id(), &(lk)->write_locked_map); \
90} while(0)
91
92#define READ_UNLOCK(lk) \
93do { \
94 if (!((lk)->read_locked_map & (1UL << smp_processor_id()))) \
95 printk("ASSERT: %s:%u %s not readlocked\n", \
96 __FILE__, __LINE__, #lk); \
97 clear_bit(smp_processor_id(), &(lk)->read_locked_map); \
98 read_unlock_bh(&(lk)->l); \
99} while(0)
100
101#define WRITE_UNLOCK(lk) \
102do { \
103 MUST_BE_WRITE_LOCKED(lk); \
104 clear_bit(smp_processor_id(), &(lk)->write_locked_map); \
105 write_unlock_bh(&(lk)->l); \
106} while(0)
107
108#else
109#define DECLARE_LOCK(l) spinlock_t l = SPIN_LOCK_UNLOCKED
110#define DECLARE_LOCK_EXTERN(l) extern spinlock_t l
111#define DECLARE_RWLOCK(l) rwlock_t l = RW_LOCK_UNLOCKED
112#define DECLARE_RWLOCK_EXTERN(l) extern rwlock_t l
113
114#define MUST_BE_LOCKED(l)
115#define MUST_BE_UNLOCKED(l)
116#define MUST_BE_READ_LOCKED(l)
117#define MUST_BE_WRITE_LOCKED(l)
118#define MUST_BE_READ_WRITE_UNLOCKED(l)
119
120#define LOCK_BH(l) spin_lock_bh(l)
121#define UNLOCK_BH(l) spin_unlock_bh(l)
122
123#define READ_LOCK(l) read_lock_bh(l)
124#define WRITE_LOCK(l) write_lock_bh(l)
125#define READ_UNLOCK(l) read_unlock_bh(l)
126#define WRITE_UNLOCK(l) write_unlock_bh(l)
127#endif /*CONFIG_NETFILTER_DEBUG*/
128
129#endif /* _LOCKHELP_H */
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index 561d4dc75836..3029cad63a01 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -147,7 +147,7 @@ struct netlink_callback
147 int (*dump)(struct sk_buff * skb, struct netlink_callback *cb); 147 int (*dump)(struct sk_buff * skb, struct netlink_callback *cb);
148 int (*done)(struct netlink_callback *cb); 148 int (*done)(struct netlink_callback *cb);
149 int family; 149 int family;
150 long args[4]; 150 long args[5];
151}; 151};
152 152
153struct netlink_notify 153struct netlink_notify
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index 39ab8c6b5652..f5a6695d4d21 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -61,21 +61,20 @@
61#define PG_active 6 61#define PG_active 6
62#define PG_slab 7 /* slab debug (Suparna wants this) */ 62#define PG_slab 7 /* slab debug (Suparna wants this) */
63 63
64#define PG_highmem 8 64#define PG_checked 8 /* kill me in 2.5.<early>. */
65#define PG_checked 9 /* kill me in 2.5.<early>. */ 65#define PG_arch_1 9
66#define PG_arch_1 10 66#define PG_reserved 10
67#define PG_reserved 11 67#define PG_private 11 /* Has something at ->private */
68 68
69#define PG_private 12 /* Has something at ->private */ 69#define PG_writeback 12 /* Page is under writeback */
70#define PG_writeback 13 /* Page is under writeback */ 70#define PG_nosave 13 /* Used for system suspend/resume */
71#define PG_nosave 14 /* Used for system suspend/resume */ 71#define PG_compound 14 /* Part of a compound page */
72#define PG_compound 15 /* Part of a compound page */ 72#define PG_swapcache 15 /* Swap page: swp_entry_t in private */
73 73
74#define PG_swapcache 16 /* Swap page: swp_entry_t in private */ 74#define PG_mappedtodisk 16 /* Has blocks allocated on-disk */
75#define PG_mappedtodisk 17 /* Has blocks allocated on-disk */ 75#define PG_reclaim 17 /* To be reclaimed asap */
76#define PG_reclaim 18 /* To be reclaimed asap */ 76#define PG_nosave_free 18 /* Free, should not be written */
77#define PG_nosave_free 19 /* Free, should not be written */ 77#define PG_uncached 19 /* Page has been mapped as uncached */
78#define PG_uncached 20 /* Page has been mapped as uncached */
79 78
80/* 79/*
81 * Global page accounting. One instance per CPU. Only unsigned longs are 80 * Global page accounting. One instance per CPU. Only unsigned longs are
@@ -136,8 +135,8 @@ struct page_state {
136 135
137extern void get_page_state(struct page_state *ret); 136extern void get_page_state(struct page_state *ret);
138extern void get_full_page_state(struct page_state *ret); 137extern void get_full_page_state(struct page_state *ret);
139extern unsigned long __read_page_state(unsigned offset); 138extern unsigned long __read_page_state(unsigned long offset);
140extern void __mod_page_state(unsigned offset, unsigned long delta); 139extern void __mod_page_state(unsigned long offset, unsigned long delta);
141 140
142#define read_page_state(member) \ 141#define read_page_state(member) \
143 __read_page_state(offsetof(struct page_state, member)) 142 __read_page_state(offsetof(struct page_state, member))
@@ -215,7 +214,7 @@ extern void __mod_page_state(unsigned offset, unsigned long delta);
215#define TestSetPageSlab(page) test_and_set_bit(PG_slab, &(page)->flags) 214#define TestSetPageSlab(page) test_and_set_bit(PG_slab, &(page)->flags)
216 215
217#ifdef CONFIG_HIGHMEM 216#ifdef CONFIG_HIGHMEM
218#define PageHighMem(page) test_bit(PG_highmem, &(page)->flags) 217#define PageHighMem(page) is_highmem(page_zone(page))
219#else 218#else
220#define PageHighMem(page) 0 /* needed to optimize away at compile time */ 219#define PageHighMem(page) 0 /* needed to optimize away at compile time */
221#endif 220#endif
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 0422031161ba..d9a25647a295 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -52,12 +52,12 @@ void release_pages(struct page **pages, int nr, int cold);
52 52
53static inline struct page *page_cache_alloc(struct address_space *x) 53static inline struct page *page_cache_alloc(struct address_space *x)
54{ 54{
55 return alloc_pages(mapping_gfp_mask(x), 0); 55 return alloc_pages(mapping_gfp_mask(x)|__GFP_NORECLAIM, 0);
56} 56}
57 57
58static inline struct page *page_cache_alloc_cold(struct address_space *x) 58static inline struct page *page_cache_alloc_cold(struct address_space *x)
59{ 59{
60 return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD, 0); 60 return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD|__GFP_NORECLAIM, 0);
61} 61}
62 62
63typedef int filler_t(void *, struct page *); 63typedef int filler_t(void *, struct page *);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index b8b4ebf9abf1..63e89e47b8e9 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -575,6 +575,7 @@
575#define PCI_DEVICE_ID_CT_65550 0x00e0 575#define PCI_DEVICE_ID_CT_65550 0x00e0
576#define PCI_DEVICE_ID_CT_65554 0x00e4 576#define PCI_DEVICE_ID_CT_65554 0x00e4
577#define PCI_DEVICE_ID_CT_65555 0x00e5 577#define PCI_DEVICE_ID_CT_65555 0x00e5
578#define PCI_DEVICE_ID_CT_69000 0x00c0
578 579
579#define PCI_VENDOR_ID_MIRO 0x1031 580#define PCI_VENDOR_ID_MIRO 0x1031
580#define PCI_DEVICE_ID_MIRO_36050 0x5601 581#define PCI_DEVICE_ID_MIRO_36050 0x5601
diff --git a/include/linux/raid/bitmap.h b/include/linux/raid/bitmap.h
new file mode 100644
index 000000000000..e24b74b11150
--- /dev/null
+++ b/include/linux/raid/bitmap.h
@@ -0,0 +1,273 @@
1/*
2 * bitmap.h: Copyright (C) Peter T. Breuer (ptb@ot.uc3m.es) 2003
3 *
4 * additions: Copyright (C) 2003-2004, Paul Clements, SteelEye Technology, Inc.
5 */
6#ifndef BITMAP_H
7#define BITMAP_H 1
8
9#define BITMAP_MAJOR 3
10#define BITMAP_MINOR 38
11
12/*
13 * in-memory bitmap:
14 *
15 * Use 16 bit block counters to track pending writes to each "chunk".
16 * The 2 high order bits are special-purpose, the first is a flag indicating
17 * whether a resync is needed. The second is a flag indicating whether a
18 * resync is active.
19 * This means that the counter is actually 14 bits:
20 *
21 * +--------+--------+------------------------------------------------+
22 * | resync | resync | counter |
23 * | needed | active | |
24 * | (0-1) | (0-1) | (0-16383) |
25 * +--------+--------+------------------------------------------------+
26 *
27 * The "resync needed" bit is set when:
28 * a '1' bit is read from storage at startup.
29 * a write request fails on some drives
30 * a resync is aborted on a chunk with 'resync active' set
31 * It is cleared (and resync-active set) when a resync starts across all drives
32 * of the chunk.
33 *
34 *
35 * The "resync active" bit is set when:
36 * a resync is started on all drives, and resync_needed is set.
37 * resync_needed will be cleared (as long as resync_active wasn't already set).
38 * It is cleared when a resync completes.
39 *
40 * The counter counts pending write requests, plus the on-disk bit.
41 * When the counter is '1' and the resync bits are clear, the on-disk
42 * bit can be cleared aswell, thus setting the counter to 0.
43 * When we set a bit, or in the counter (to start a write), if the fields is
44 * 0, we first set the disk bit and set the counter to 1.
45 *
46 * If the counter is 0, the on-disk bit is clear and the stipe is clean
47 * Anything that dirties the stipe pushes the counter to 2 (at least)
48 * and sets the on-disk bit (lazily).
49 * If a periodic sweep find the counter at 2, it is decremented to 1.
50 * If the sweep find the counter at 1, the on-disk bit is cleared and the
51 * counter goes to zero.
52 *
53 * Also, we'll hijack the "map" pointer itself and use it as two 16 bit block
54 * counters as a fallback when "page" memory cannot be allocated:
55 *
56 * Normal case (page memory allocated):
57 *
58 * page pointer (32-bit)
59 *
60 * [ ] ------+
61 * |
62 * +-------> [ ][ ]..[ ] (4096 byte page == 2048 counters)
63 * c1 c2 c2048
64 *
65 * Hijacked case (page memory allocation failed):
66 *
67 * hijacked page pointer (32-bit)
68 *
69 * [ ][ ] (no page memory allocated)
70 * counter #1 (16-bit) counter #2 (16-bit)
71 *
72 */
73
74#ifdef __KERNEL__
75
76#define PAGE_BITS (PAGE_SIZE << 3)
77#define PAGE_BIT_SHIFT (PAGE_SHIFT + 3)
78
79typedef __u16 bitmap_counter_t;
80#define COUNTER_BITS 16
81#define COUNTER_BIT_SHIFT 4
82#define COUNTER_BYTE_RATIO (COUNTER_BITS / 8)
83#define COUNTER_BYTE_SHIFT (COUNTER_BIT_SHIFT - 3)
84
85#define NEEDED_MASK ((bitmap_counter_t) (1 << (COUNTER_BITS - 1)))
86#define RESYNC_MASK ((bitmap_counter_t) (1 << (COUNTER_BITS - 2)))
87#define COUNTER_MAX ((bitmap_counter_t) RESYNC_MASK - 1)
88#define NEEDED(x) (((bitmap_counter_t) x) & NEEDED_MASK)
89#define RESYNC(x) (((bitmap_counter_t) x) & RESYNC_MASK)
90#define COUNTER(x) (((bitmap_counter_t) x) & COUNTER_MAX)
91
92/* how many counters per page? */
93#define PAGE_COUNTER_RATIO (PAGE_BITS / COUNTER_BITS)
94/* same, except a shift value for more efficient bitops */
95#define PAGE_COUNTER_SHIFT (PAGE_BIT_SHIFT - COUNTER_BIT_SHIFT)
96/* same, except a mask value for more efficient bitops */
97#define PAGE_COUNTER_MASK (PAGE_COUNTER_RATIO - 1)
98
99#define BITMAP_BLOCK_SIZE 512
100#define BITMAP_BLOCK_SHIFT 9
101
102/* how many blocks per chunk? (this is variable) */
103#define CHUNK_BLOCK_RATIO(bitmap) ((bitmap)->chunksize >> BITMAP_BLOCK_SHIFT)
104#define CHUNK_BLOCK_SHIFT(bitmap) ((bitmap)->chunkshift - BITMAP_BLOCK_SHIFT)
105#define CHUNK_BLOCK_MASK(bitmap) (CHUNK_BLOCK_RATIO(bitmap) - 1)
106
107/* when hijacked, the counters and bits represent even larger "chunks" */
108/* there will be 1024 chunks represented by each counter in the page pointers */
109#define PAGEPTR_BLOCK_RATIO(bitmap) \
110 (CHUNK_BLOCK_RATIO(bitmap) << PAGE_COUNTER_SHIFT >> 1)
111#define PAGEPTR_BLOCK_SHIFT(bitmap) \
112 (CHUNK_BLOCK_SHIFT(bitmap) + PAGE_COUNTER_SHIFT - 1)
113#define PAGEPTR_BLOCK_MASK(bitmap) (PAGEPTR_BLOCK_RATIO(bitmap) - 1)
114
115/*
116 * on-disk bitmap:
117 *
118 * Use one bit per "chunk" (block set). We do the disk I/O on the bitmap
119 * file a page at a time. There's a superblock at the start of the file.
120 */
121
122/* map chunks (bits) to file pages - offset by the size of the superblock */
123#define CHUNK_BIT_OFFSET(chunk) ((chunk) + (sizeof(bitmap_super_t) << 3))
124
125#endif
126
127/*
128 * bitmap structures:
129 */
130
131#define BITMAP_MAGIC 0x6d746962
132
133/* use these for bitmap->flags and bitmap->sb->state bit-fields */
134enum bitmap_state {
135 BITMAP_ACTIVE = 0x001, /* the bitmap is in use */
136 BITMAP_STALE = 0x002 /* the bitmap file is out of date or had -EIO */
137};
138
139/* the superblock at the front of the bitmap file -- little endian */
140typedef struct bitmap_super_s {
141 __u32 magic; /* 0 BITMAP_MAGIC */
142 __u32 version; /* 4 the bitmap major for now, could change... */
143 __u8 uuid[16]; /* 8 128 bit uuid - must match md device uuid */
144 __u64 events; /* 24 event counter for the bitmap (1)*/
145 __u64 events_cleared;/*32 event counter when last bit cleared (2) */
146 __u64 sync_size; /* 40 the size of the md device's sync range(3) */
147 __u32 state; /* 48 bitmap state information */
148 __u32 chunksize; /* 52 the bitmap chunk size in bytes */
149 __u32 daemon_sleep; /* 56 seconds between disk flushes */
150
151 __u8 pad[256 - 60]; /* set to zero */
152} bitmap_super_t;
153
154/* notes:
155 * (1) This event counter is updated before the eventcounter in the md superblock
156 * When a bitmap is loaded, it is only accepted if this event counter is equal
157 * to, or one greater than, the event counter in the superblock.
158 * (2) This event counter is updated when the other one is *if*and*only*if* the
159 * array is not degraded. As bits are not cleared when the array is degraded,
160 * this represents the last time that any bits were cleared.
161 * If a device is being added that has an event count with this value or
162 * higher, it is accepted as conforming to the bitmap.
163 * (3)This is the number of sectors represented by the bitmap, and is the range that
164 * resync happens across. For raid1 and raid5/6 it is the size of individual
165 * devices. For raid10 it is the size of the array.
166 */
167
168#ifdef __KERNEL__
169
170/* the in-memory bitmap is represented by bitmap_pages */
171struct bitmap_page {
172 /*
173 * map points to the actual memory page
174 */
175 char *map;
176 /*
177 * in emergencies (when map cannot be alloced), hijack the map
178 * pointer and use it as two counters itself
179 */
180 unsigned int hijacked:1;
181 /*
182 * count of dirty bits on the page
183 */
184 unsigned int count:31;
185};
186
187/* keep track of bitmap file pages that have pending writes on them */
188struct page_list {
189 struct list_head list;
190 struct page *page;
191};
192
193/* the main bitmap structure - one per mddev */
194struct bitmap {
195 struct bitmap_page *bp;
196 unsigned long pages; /* total number of pages in the bitmap */
197 unsigned long missing_pages; /* number of pages not yet allocated */
198
199 mddev_t *mddev; /* the md device that the bitmap is for */
200
201 int counter_bits; /* how many bits per block counter */
202
203 /* bitmap chunksize -- how much data does each bit represent? */
204 unsigned long chunksize;
205 unsigned long chunkshift; /* chunksize = 2^chunkshift (for bitops) */
206 unsigned long chunks; /* total number of data chunks for the array */
207
208 /* We hold a count on the chunk currently being synced, and drop
209 * it when the last block is started. If the resync is aborted
210 * midway, we need to be able to drop that count, so we remember
211 * the counted chunk..
212 */
213 unsigned long syncchunk;
214
215 __u64 events_cleared;
216
217 /* bitmap spinlock */
218 spinlock_t lock;
219
220 long offset; /* offset from superblock if file is NULL */
221 struct file *file; /* backing disk file */
222 struct page *sb_page; /* cached copy of the bitmap file superblock */
223 struct page **filemap; /* list of cache pages for the file */
224 unsigned long *filemap_attr; /* attributes associated w/ filemap pages */
225 unsigned long file_pages; /* number of pages in the file */
226
227 unsigned long flags;
228
229 /*
230 * the bitmap daemon - periodically wakes up and sweeps the bitmap
231 * file, cleaning up bits and flushing out pages to disk as necessary
232 */
233 unsigned long daemon_lastrun; /* jiffies of last run */
234 unsigned long daemon_sleep; /* how many seconds between updates? */
235
236 /*
237 * bitmap_writeback_daemon waits for file-pages that have been written,
238 * as there is no way to get a call-back when a page write completes.
239 */
240 mdk_thread_t *writeback_daemon;
241 spinlock_t write_lock;
242 wait_queue_head_t write_wait;
243 struct list_head complete_pages;
244 mempool_t *write_pool;
245};
246
247/* the bitmap API */
248
249/* these are used only by md/bitmap */
250int bitmap_create(mddev_t *mddev);
251void bitmap_destroy(mddev_t *mddev);
252int bitmap_active(struct bitmap *bitmap);
253
254char *file_path(struct file *file, char *buf, int count);
255void bitmap_print_sb(struct bitmap *bitmap);
256int bitmap_update_sb(struct bitmap *bitmap);
257
258int bitmap_setallbits(struct bitmap *bitmap);
259void bitmap_write_all(struct bitmap *bitmap);
260
261/* these are exported */
262int bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long sectors);
263void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long sectors,
264 int success);
265int bitmap_start_sync(struct bitmap *bitmap, sector_t offset, int *blocks);
266void bitmap_end_sync(struct bitmap *bitmap, sector_t offset, int *blocks, int aborted);
267void bitmap_close_sync(struct bitmap *bitmap);
268
269int bitmap_unplug(struct bitmap *bitmap);
270int bitmap_daemon_work(struct bitmap *bitmap);
271#endif
272
273#endif
diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h
index a6a67d102bfa..ffa316ce4dc8 100644
--- a/include/linux/raid/md.h
+++ b/include/linux/raid/md.h
@@ -60,7 +60,14 @@
60 */ 60 */
61#define MD_MAJOR_VERSION 0 61#define MD_MAJOR_VERSION 0
62#define MD_MINOR_VERSION 90 62#define MD_MINOR_VERSION 90
63#define MD_PATCHLEVEL_VERSION 1 63/*
64 * MD_PATCHLEVEL_VERSION indicates kernel functionality.
65 * >=1 means different superblock formats are selectable using SET_ARRAY_INFO
66 * and major_version/minor_version accordingly
67 * >=2 means that Internal bitmaps are supported by setting MD_SB_BITMAP_PRESENT
68 * in the super status byte
69 */
70#define MD_PATCHLEVEL_VERSION 2
64 71
65extern int register_md_personality (int p_num, mdk_personality_t *p); 72extern int register_md_personality (int p_num, mdk_personality_t *p);
66extern int unregister_md_personality (int p_num); 73extern int unregister_md_personality (int p_num);
@@ -69,7 +76,7 @@ extern mdk_thread_t * md_register_thread (void (*run) (mddev_t *mddev),
69extern void md_unregister_thread (mdk_thread_t *thread); 76extern void md_unregister_thread (mdk_thread_t *thread);
70extern void md_wakeup_thread(mdk_thread_t *thread); 77extern void md_wakeup_thread(mdk_thread_t *thread);
71extern void md_check_recovery(mddev_t *mddev); 78extern void md_check_recovery(mddev_t *mddev);
72extern void md_write_start(mddev_t *mddev); 79extern void md_write_start(mddev_t *mddev, struct bio *bi);
73extern void md_write_end(mddev_t *mddev); 80extern void md_write_end(mddev_t *mddev);
74extern void md_handle_safemode(mddev_t *mddev); 81extern void md_handle_safemode(mddev_t *mddev);
75extern void md_done_sync(mddev_t *mddev, int blocks, int ok); 82extern void md_done_sync(mddev_t *mddev, int blocks, int ok);
@@ -78,6 +85,12 @@ extern void md_unplug_mddev(mddev_t *mddev);
78 85
79extern void md_print_devices (void); 86extern void md_print_devices (void);
80 87
88extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev,
89 sector_t sector, int size, struct page *page);
90extern int sync_page_io(struct block_device *bdev, sector_t sector, int size,
91 struct page *page, int rw);
92
93
81#define MD_BUG(x...) { printk("md: bug in file %s, line %d\n", __FILE__, __LINE__); md_print_devices(); } 94#define MD_BUG(x...) { printk("md: bug in file %s, line %d\n", __FILE__, __LINE__); md_print_devices(); }
82 95
83#endif 96#endif
diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h
index c9a0d4013be7..8c14ba565a45 100644
--- a/include/linux/raid/md_k.h
+++ b/include/linux/raid/md_k.h
@@ -15,6 +15,9 @@
15#ifndef _MD_K_H 15#ifndef _MD_K_H
16#define _MD_K_H 16#define _MD_K_H
17 17
18/* and dm-bio-list.h is not under include/linux because.... ??? */
19#include "../../../drivers/md/dm-bio-list.h"
20
18#define MD_RESERVED 0UL 21#define MD_RESERVED 0UL
19#define LINEAR 1UL 22#define LINEAR 1UL
20#define RAID0 2UL 23#define RAID0 2UL
@@ -180,6 +183,10 @@ struct mdk_rdev_s
180 183
181 int desc_nr; /* descriptor index in the superblock */ 184 int desc_nr; /* descriptor index in the superblock */
182 int raid_disk; /* role of device in array */ 185 int raid_disk; /* role of device in array */
186 int saved_raid_disk; /* role that device used to have in the
187 * array and could again if we did a partial
188 * resync from the bitmap
189 */
183 190
184 atomic_t nr_pending; /* number of pending requests. 191 atomic_t nr_pending; /* number of pending requests.
185 * only maintained for arrays that 192 * only maintained for arrays that
@@ -252,6 +259,11 @@ struct mddev_s
252 atomic_t recovery_active; /* blocks scheduled, but not written */ 259 atomic_t recovery_active; /* blocks scheduled, but not written */
253 wait_queue_head_t recovery_wait; 260 wait_queue_head_t recovery_wait;
254 sector_t recovery_cp; 261 sector_t recovery_cp;
262
263 spinlock_t write_lock;
264 wait_queue_head_t sb_wait; /* for waiting on superblock updates */
265 atomic_t pending_writes; /* number of active superblock writes */
266
255 unsigned int safemode; /* if set, update "clean" superblock 267 unsigned int safemode; /* if set, update "clean" superblock
256 * when no writes pending. 268 * when no writes pending.
257 */ 269 */
@@ -260,6 +272,13 @@ struct mddev_s
260 atomic_t writes_pending; 272 atomic_t writes_pending;
261 request_queue_t *queue; /* for plugging ... */ 273 request_queue_t *queue; /* for plugging ... */
262 274
275 struct bitmap *bitmap; /* the bitmap for the device */
276 struct file *bitmap_file; /* the bitmap file */
277 long bitmap_offset; /* offset from superblock of
278 * start of bitmap. May be
279 * negative, but not '0'
280 */
281
263 struct list_head all_mddevs; 282 struct list_head all_mddevs;
264}; 283};
265 284
@@ -291,7 +310,7 @@ struct mdk_personality_s
291 int (*hot_add_disk) (mddev_t *mddev, mdk_rdev_t *rdev); 310 int (*hot_add_disk) (mddev_t *mddev, mdk_rdev_t *rdev);
292 int (*hot_remove_disk) (mddev_t *mddev, int number); 311 int (*hot_remove_disk) (mddev_t *mddev, int number);
293 int (*spare_active) (mddev_t *mddev); 312 int (*spare_active) (mddev_t *mddev);
294 int (*sync_request)(mddev_t *mddev, sector_t sector_nr, int go_faster); 313 sector_t (*sync_request)(mddev_t *mddev, sector_t sector_nr, int *skipped, int go_faster);
295 int (*resize) (mddev_t *mddev, sector_t sectors); 314 int (*resize) (mddev_t *mddev, sector_t sectors);
296 int (*reshape) (mddev_t *mddev, int raid_disks); 315 int (*reshape) (mddev_t *mddev, int raid_disks);
297 int (*reconfig) (mddev_t *mddev, int layout, int chunk_size); 316 int (*reconfig) (mddev_t *mddev, int layout, int chunk_size);
@@ -334,6 +353,7 @@ typedef struct mdk_thread_s {
334 unsigned long flags; 353 unsigned long flags;
335 struct completion *event; 354 struct completion *event;
336 struct task_struct *tsk; 355 struct task_struct *tsk;
356 unsigned long timeout;
337 const char *name; 357 const char *name;
338} mdk_thread_t; 358} mdk_thread_t;
339 359
diff --git a/include/linux/raid/md_p.h b/include/linux/raid/md_p.h
index 8ba95d67329f..dc65cd435494 100644
--- a/include/linux/raid/md_p.h
+++ b/include/linux/raid/md_p.h
@@ -96,6 +96,7 @@ typedef struct mdp_device_descriptor_s {
96#define MD_SB_CLEAN 0 96#define MD_SB_CLEAN 0
97#define MD_SB_ERRORS 1 97#define MD_SB_ERRORS 1
98 98
99#define MD_SB_BITMAP_PRESENT 8 /* bitmap may be present nearby */
99typedef struct mdp_superblock_s { 100typedef struct mdp_superblock_s {
100 /* 101 /*
101 * Constant generic information 102 * Constant generic information
@@ -184,7 +185,7 @@ struct mdp_superblock_1 {
184 /* constant array information - 128 bytes */ 185 /* constant array information - 128 bytes */
185 __u32 magic; /* MD_SB_MAGIC: 0xa92b4efc - little endian */ 186 __u32 magic; /* MD_SB_MAGIC: 0xa92b4efc - little endian */
186 __u32 major_version; /* 1 */ 187 __u32 major_version; /* 1 */
187 __u32 feature_map; /* 0 for now */ 188 __u32 feature_map; /* bit 0 set if 'bitmap_offset' is meaningful */
188 __u32 pad0; /* always set to 0 when writing */ 189 __u32 pad0; /* always set to 0 when writing */
189 190
190 __u8 set_uuid[16]; /* user-space generated. */ 191 __u8 set_uuid[16]; /* user-space generated. */
@@ -197,7 +198,11 @@ struct mdp_superblock_1 {
197 198
198 __u32 chunksize; /* in 512byte sectors */ 199 __u32 chunksize; /* in 512byte sectors */
199 __u32 raid_disks; 200 __u32 raid_disks;
200 __u8 pad1[128-96]; /* set to 0 when written */ 201 __u32 bitmap_offset; /* sectors after start of superblock that bitmap starts
202 * NOTE: signed, so bitmap can be before superblock
203 * only meaningful of feature_map[0] is set.
204 */
205 __u8 pad1[128-100]; /* set to 0 when written */
201 206
202 /* constant this-device information - 64 bytes */ 207 /* constant this-device information - 64 bytes */
203 __u64 data_offset; /* sector start of data, often 0 */ 208 __u64 data_offset; /* sector start of data, often 0 */
diff --git a/include/linux/raid/md_u.h b/include/linux/raid/md_u.h
index a2df5c2a42af..81da20ccec4d 100644
--- a/include/linux/raid/md_u.h
+++ b/include/linux/raid/md_u.h
@@ -23,6 +23,7 @@
23#define GET_DISK_INFO _IOR (MD_MAJOR, 0x12, mdu_disk_info_t) 23#define GET_DISK_INFO _IOR (MD_MAJOR, 0x12, mdu_disk_info_t)
24#define PRINT_RAID_DEBUG _IO (MD_MAJOR, 0x13) 24#define PRINT_RAID_DEBUG _IO (MD_MAJOR, 0x13)
25#define RAID_AUTORUN _IO (MD_MAJOR, 0x14) 25#define RAID_AUTORUN _IO (MD_MAJOR, 0x14)
26#define GET_BITMAP_FILE _IOR (MD_MAJOR, 0x15, mdu_bitmap_file_t)
26 27
27/* configuration */ 28/* configuration */
28#define CLEAR_ARRAY _IO (MD_MAJOR, 0x20) 29#define CLEAR_ARRAY _IO (MD_MAJOR, 0x20)
@@ -36,6 +37,7 @@
36#define HOT_ADD_DISK _IO (MD_MAJOR, 0x28) 37#define HOT_ADD_DISK _IO (MD_MAJOR, 0x28)
37#define SET_DISK_FAULTY _IO (MD_MAJOR, 0x29) 38#define SET_DISK_FAULTY _IO (MD_MAJOR, 0x29)
38#define HOT_GENERATE_ERROR _IO (MD_MAJOR, 0x2a) 39#define HOT_GENERATE_ERROR _IO (MD_MAJOR, 0x2a)
40#define SET_BITMAP_FILE _IOW (MD_MAJOR, 0x2b, int)
39 41
40/* usage */ 42/* usage */
41#define RUN_ARRAY _IOW (MD_MAJOR, 0x30, mdu_param_t) 43#define RUN_ARRAY _IOW (MD_MAJOR, 0x30, mdu_param_t)
@@ -106,6 +108,11 @@ typedef struct mdu_start_info_s {
106 108
107} mdu_start_info_t; 109} mdu_start_info_t;
108 110
111typedef struct mdu_bitmap_file_s
112{
113 char pathname[4096];
114} mdu_bitmap_file_t;
115
109typedef struct mdu_param_s 116typedef struct mdu_param_s
110{ 117{
111 int personality; /* 1,2,3,4 */ 118 int personality; /* 1,2,3,4 */
diff --git a/include/linux/raid/raid1.h b/include/linux/raid/raid1.h
index abbfdd9afe1e..9d93cf12e890 100644
--- a/include/linux/raid/raid1.h
+++ b/include/linux/raid/raid1.h
@@ -36,12 +36,21 @@ struct r1_private_data_s {
36 spinlock_t device_lock; 36 spinlock_t device_lock;
37 37
38 struct list_head retry_list; 38 struct list_head retry_list;
39 /* queue pending writes and submit them on unplug */
40 struct bio_list pending_bio_list;
41 /* queue of writes that have been unplugged */
42 struct bio_list flushing_bio_list;
43
39 /* for use when syncing mirrors: */ 44 /* for use when syncing mirrors: */
40 45
41 spinlock_t resync_lock; 46 spinlock_t resync_lock;
42 int nr_pending; 47 int nr_pending;
43 int barrier; 48 int barrier;
44 sector_t next_resync; 49 sector_t next_resync;
50 int fullsync; /* set to 1 if a full sync is needed,
51 * (fresh device added).
52 * Cleared when a sync completes.
53 */
45 54
46 wait_queue_head_t wait_idle; 55 wait_queue_head_t wait_idle;
47 wait_queue_head_t wait_resume; 56 wait_queue_head_t wait_resume;
@@ -85,14 +94,17 @@ struct r1bio_s {
85 int read_disk; 94 int read_disk;
86 95
87 struct list_head retry_list; 96 struct list_head retry_list;
97 struct bitmap_update *bitmap_update;
88 /* 98 /*
89 * if the IO is in WRITE direction, then multiple bios are used. 99 * if the IO is in WRITE direction, then multiple bios are used.
90 * We choose the number when they are allocated. 100 * We choose the number when they are allocated.
91 */ 101 */
92 struct bio *bios[0]; 102 struct bio *bios[0];
103 /* DO NOT PUT ANY NEW FIELDS HERE - bios array is contiguously alloced*/
93}; 104};
94 105
95/* bits for r1bio.state */ 106/* bits for r1bio.state */
96#define R1BIO_Uptodate 0 107#define R1BIO_Uptodate 0
97#define R1BIO_IsSync 1 108#define R1BIO_IsSync 1
109#define R1BIO_Degraded 2
98#endif 110#endif
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 4dbb109022f3..b58afd97a180 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -201,8 +201,8 @@ extern unsigned long
201arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr, 201arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr,
202 unsigned long len, unsigned long pgoff, 202 unsigned long len, unsigned long pgoff,
203 unsigned long flags); 203 unsigned long flags);
204extern void arch_unmap_area(struct vm_area_struct *area); 204extern void arch_unmap_area(struct mm_struct *, unsigned long);
205extern void arch_unmap_area_topdown(struct vm_area_struct *area); 205extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long);
206 206
207#define set_mm_counter(mm, member, value) (mm)->_##member = (value) 207#define set_mm_counter(mm, member, value) (mm)->_##member = (value)
208#define get_mm_counter(mm, member) ((mm)->_##member) 208#define get_mm_counter(mm, member) ((mm)->_##member)
@@ -218,9 +218,10 @@ struct mm_struct {
218 unsigned long (*get_unmapped_area) (struct file *filp, 218 unsigned long (*get_unmapped_area) (struct file *filp,
219 unsigned long addr, unsigned long len, 219 unsigned long addr, unsigned long len,
220 unsigned long pgoff, unsigned long flags); 220 unsigned long pgoff, unsigned long flags);
221 void (*unmap_area) (struct vm_area_struct *area); 221 void (*unmap_area) (struct mm_struct *mm, unsigned long addr);
222 unsigned long mmap_base; /* base of mmap area */ 222 unsigned long mmap_base; /* base of mmap area */
223 unsigned long free_area_cache; /* first hole */ 223 unsigned long cached_hole_size; /* if non-zero, the largest hole below free_area_cache */
224 unsigned long free_area_cache; /* first hole of size cached_hole_size or larger */
224 pgd_t * pgd; 225 pgd_t * pgd;
225 atomic_t mm_users; /* How many users with user space? */ 226 atomic_t mm_users; /* How many users with user space? */
226 atomic_t mm_count; /* How many references to "struct mm_struct" (users count as 1) */ 227 atomic_t mm_count; /* How many references to "struct mm_struct" (users count as 1) */
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index cc04f5cd2286..d7c839a21842 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -193,7 +193,6 @@ struct skb_shared_info {
193 * @nfcache: Cache info 193 * @nfcache: Cache info
194 * @nfct: Associated connection, if any 194 * @nfct: Associated connection, if any
195 * @nfctinfo: Relationship of this skb to the connection 195 * @nfctinfo: Relationship of this skb to the connection
196 * @nf_debug: Netfilter debugging
197 * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c 196 * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c
198 * @private: Data which is private to the HIPPI implementation 197 * @private: Data which is private to the HIPPI implementation
199 * @tc_index: Traffic control index 198 * @tc_index: Traffic control index
@@ -264,9 +263,6 @@ struct sk_buff {
264 __u32 nfcache; 263 __u32 nfcache;
265 __u32 nfctinfo; 264 __u32 nfctinfo;
266 struct nf_conntrack *nfct; 265 struct nf_conntrack *nfct;
267#ifdef CONFIG_NETFILTER_DEBUG
268 unsigned int nf_debug;
269#endif
270#ifdef CONFIG_BRIDGE_NETFILTER 266#ifdef CONFIG_BRIDGE_NETFILTER
271 struct nf_bridge_info *nf_bridge; 267 struct nf_bridge_info *nf_bridge;
272#endif 268#endif
@@ -1219,15 +1215,6 @@ static inline void nf_reset(struct sk_buff *skb)
1219{ 1215{
1220 nf_conntrack_put(skb->nfct); 1216 nf_conntrack_put(skb->nfct);
1221 skb->nfct = NULL; 1217 skb->nfct = NULL;
1222#ifdef CONFIG_NETFILTER_DEBUG
1223 skb->nf_debug = 0;
1224#endif
1225}
1226static inline void nf_reset_debug(struct sk_buff *skb)
1227{
1228#ifdef CONFIG_NETFILTER_DEBUG
1229 skb->nf_debug = 0;
1230#endif
1231} 1218}
1232 1219
1233#ifdef CONFIG_BRIDGE_NETFILTER 1220#ifdef CONFIG_BRIDGE_NETFILTER
diff --git a/include/linux/smp.h b/include/linux/smp.h
index dcf1db3b35d3..9dfa3ee769ae 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -92,10 +92,7 @@ void smp_prepare_boot_cpu(void);
92/* 92/*
93 * These macros fold the SMP functionality into a single CPU system 93 * These macros fold the SMP functionality into a single CPU system
94 */ 94 */
95 95#define raw_smp_processor_id() 0
96#if !defined(__smp_processor_id) || !defined(CONFIG_PREEMPT)
97# define smp_processor_id() 0
98#endif
99#define hard_smp_processor_id() 0 96#define hard_smp_processor_id() 0
100#define smp_call_function(func,info,retry,wait) ({ 0; }) 97#define smp_call_function(func,info,retry,wait) ({ 0; })
101#define on_each_cpu(func,info,retry,wait) ({ func(info); 0; }) 98#define on_each_cpu(func,info,retry,wait) ({ func(info); 0; })
@@ -106,30 +103,25 @@ static inline void smp_send_reschedule(int cpu) { }
106#endif /* !SMP */ 103#endif /* !SMP */
107 104
108/* 105/*
109 * DEBUG_PREEMPT support: check whether smp_processor_id() is being 106 * smp_processor_id(): get the current CPU ID.
110 * used in a preemption-safe way.
111 * 107 *
112 * An architecture has to enable this debugging code explicitly. 108 * if DEBUG_PREEMPT is enabled the we check whether it is
113 * It can do so by renaming the smp_processor_id() macro to 109 * used in a preemption-safe way. (smp_processor_id() is safe
114 * __smp_processor_id(). This should only be done after some minimal 110 * if it's used in a preemption-off critical section, or in
115 * testing, because usually there are a number of false positives 111 * a thread that is bound to the current CPU.)
116 * that an architecture will trigger.
117 * 112 *
118 * To fix a false positive (i.e. smp_processor_id() use that the 113 * NOTE: raw_smp_processor_id() is for internal use only
119 * debugging code reports but which use for some reason is legal), 114 * (smp_processor_id() is the preferred variant), but in rare
120 * change the smp_processor_id() reference to _smp_processor_id(), 115 * instances it might also be used to turn off false positives
121 * which is the nondebug variant. NOTE: don't use this to hack around 116 * (i.e. smp_processor_id() use that the debugging code reports but
122 * real bugs. 117 * which use for some reason is legal). Don't use this to hack around
118 * the warning message, as your code might not work under PREEMPT.
123 */ 119 */
124#ifdef __smp_processor_id 120#ifdef CONFIG_DEBUG_PREEMPT
125# if defined(CONFIG_PREEMPT) && defined(CONFIG_DEBUG_PREEMPT) 121 extern unsigned int debug_smp_processor_id(void);
126 extern unsigned int smp_processor_id(void); 122# define smp_processor_id() debug_smp_processor_id()
127# else
128# define smp_processor_id() __smp_processor_id()
129# endif
130# define _smp_processor_id() __smp_processor_id()
131#else 123#else
132# define _smp_processor_id() smp_processor_id() 124# define smp_processor_id() raw_smp_processor_id()
133#endif 125#endif
134 126
135#define get_cpu() ({ preempt_disable(); smp_processor_id(); }) 127#define get_cpu() ({ preempt_disable(); smp_processor_id(); })
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 3bbc41be9bd0..2343f999e6e1 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -172,7 +172,8 @@ extern int rotate_reclaimable_page(struct page *page);
172extern void swap_setup(void); 172extern void swap_setup(void);
173 173
174/* linux/mm/vmscan.c */ 174/* linux/mm/vmscan.c */
175extern int try_to_free_pages(struct zone **, unsigned int, unsigned int); 175extern int try_to_free_pages(struct zone **, unsigned int);
176extern int zone_reclaim(struct zone *, unsigned int, unsigned int);
176extern int shrink_all_memory(int); 177extern int shrink_all_memory(int);
177extern int vm_swappiness; 178extern int vm_swappiness;
178 179
diff --git a/include/net/ip6_fib.h b/include/net/ip6_fib.h
index 319904518194..a66e9de16a6c 100644
--- a/include/net/ip6_fib.h
+++ b/include/net/ip6_fib.h
@@ -167,14 +167,17 @@ extern int fib6_walk_continue(struct fib6_walker_t *w);
167extern int fib6_add(struct fib6_node *root, 167extern int fib6_add(struct fib6_node *root,
168 struct rt6_info *rt, 168 struct rt6_info *rt,
169 struct nlmsghdr *nlh, 169 struct nlmsghdr *nlh,
170 void *rtattr); 170 void *rtattr,
171 struct netlink_skb_parms *req);
171 172
172extern int fib6_del(struct rt6_info *rt, 173extern int fib6_del(struct rt6_info *rt,
173 struct nlmsghdr *nlh, 174 struct nlmsghdr *nlh,
174 void *rtattr); 175 void *rtattr,
176 struct netlink_skb_parms *req);
175 177
176extern void inet6_rt_notify(int event, struct rt6_info *rt, 178extern void inet6_rt_notify(int event, struct rt6_info *rt,
177 struct nlmsghdr *nlh); 179 struct nlmsghdr *nlh,
180 struct netlink_skb_parms *req);
178 181
179extern void fib6_run_gc(unsigned long dummy); 182extern void fib6_run_gc(unsigned long dummy);
180 183
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index d5d1dd10cdb8..f920706d526b 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -41,13 +41,16 @@ extern int ipv6_route_ioctl(unsigned int cmd, void __user *arg);
41 41
42extern int ip6_route_add(struct in6_rtmsg *rtmsg, 42extern int ip6_route_add(struct in6_rtmsg *rtmsg,
43 struct nlmsghdr *, 43 struct nlmsghdr *,
44 void *rtattr); 44 void *rtattr,
45 struct netlink_skb_parms *req);
45extern int ip6_ins_rt(struct rt6_info *, 46extern int ip6_ins_rt(struct rt6_info *,
46 struct nlmsghdr *, 47 struct nlmsghdr *,
47 void *rtattr); 48 void *rtattr,
49 struct netlink_skb_parms *req);
48extern int ip6_del_rt(struct rt6_info *, 50extern int ip6_del_rt(struct rt6_info *,
49 struct nlmsghdr *, 51 struct nlmsghdr *,
50 void *rtattr); 52 void *rtattr,
53 struct netlink_skb_parms *req);
51 54
52extern int ip6_rt_addr_add(struct in6_addr *addr, 55extern int ip6_rt_addr_add(struct in6_addr *addr,
53 struct net_device *dev, 56 struct net_device *dev,
diff --git a/include/net/route.h b/include/net/route.h
index d34ca8fc6756..c3cd069a9aca 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -107,7 +107,7 @@ struct rt_cache_stat
107 107
108extern struct rt_cache_stat *rt_cache_stat; 108extern struct rt_cache_stat *rt_cache_stat;
109#define RT_CACHE_STAT_INC(field) \ 109#define RT_CACHE_STAT_INC(field) \
110 (per_cpu_ptr(rt_cache_stat, _smp_processor_id())->field++) 110 (per_cpu_ptr(rt_cache_stat, raw_smp_processor_id())->field++)
111 111
112extern struct ip_rt_acct *ip_rt_acct; 112extern struct ip_rt_acct *ip_rt_acct;
113 113
diff --git a/include/net/snmp.h b/include/net/snmp.h
index a15ab256276e..a36bed8ea210 100644
--- a/include/net/snmp.h
+++ b/include/net/snmp.h
@@ -128,18 +128,18 @@ struct linux_mib {
128#define SNMP_STAT_USRPTR(name) (name[1]) 128#define SNMP_STAT_USRPTR(name) (name[1])
129 129
130#define SNMP_INC_STATS_BH(mib, field) \ 130#define SNMP_INC_STATS_BH(mib, field) \
131 (per_cpu_ptr(mib[0], _smp_processor_id())->mibs[field]++) 131 (per_cpu_ptr(mib[0], raw_smp_processor_id())->mibs[field]++)
132#define SNMP_INC_STATS_OFFSET_BH(mib, field, offset) \ 132#define SNMP_INC_STATS_OFFSET_BH(mib, field, offset) \
133 (per_cpu_ptr(mib[0], _smp_processor_id())->mibs[field + (offset)]++) 133 (per_cpu_ptr(mib[0], raw_smp_processor_id())->mibs[field + (offset)]++)
134#define SNMP_INC_STATS_USER(mib, field) \ 134#define SNMP_INC_STATS_USER(mib, field) \
135 (per_cpu_ptr(mib[1], _smp_processor_id())->mibs[field]++) 135 (per_cpu_ptr(mib[1], raw_smp_processor_id())->mibs[field]++)
136#define SNMP_INC_STATS(mib, field) \ 136#define SNMP_INC_STATS(mib, field) \
137 (per_cpu_ptr(mib[!in_softirq()], _smp_processor_id())->mibs[field]++) 137 (per_cpu_ptr(mib[!in_softirq()], raw_smp_processor_id())->mibs[field]++)
138#define SNMP_DEC_STATS(mib, field) \ 138#define SNMP_DEC_STATS(mib, field) \
139 (per_cpu_ptr(mib[!in_softirq()], _smp_processor_id())->mibs[field]--) 139 (per_cpu_ptr(mib[!in_softirq()], raw_smp_processor_id())->mibs[field]--)
140#define SNMP_ADD_STATS_BH(mib, field, addend) \ 140#define SNMP_ADD_STATS_BH(mib, field, addend) \
141 (per_cpu_ptr(mib[0], _smp_processor_id())->mibs[field] += addend) 141 (per_cpu_ptr(mib[0], raw_smp_processor_id())->mibs[field] += addend)
142#define SNMP_ADD_STATS_USER(mib, field, addend) \ 142#define SNMP_ADD_STATS_USER(mib, field, addend) \
143 (per_cpu_ptr(mib[1], _smp_processor_id())->mibs[field] += addend) 143 (per_cpu_ptr(mib[1], raw_smp_processor_id())->mibs[field] += addend)
144 144
145#endif 145#endif