diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-frv/cpu-irqs.h | 54 | ||||
-rw-r--r-- | include/asm-frv/hardirq.h | 5 | ||||
-rw-r--r-- | include/asm-frv/irq-routing.h | 70 | ||||
-rw-r--r-- | include/asm-frv/irq.h | 26 | ||||
-rw-r--r-- | include/asm-frv/mb93091-fpga-irqs.h | 6 | ||||
-rw-r--r-- | include/asm-frv/mb93093-fpga-irqs.h | 6 | ||||
-rw-r--r-- | include/asm-frv/mb93493-irqs.h | 6 | ||||
-rw-r--r-- | include/asm-frv/mb93493-regs.h | 2 |
8 files changed, 45 insertions, 130 deletions
diff --git a/include/asm-frv/cpu-irqs.h b/include/asm-frv/cpu-irqs.h index 5cd691e1f8c4..478f3498fcfe 100644 --- a/include/asm-frv/cpu-irqs.h +++ b/include/asm-frv/cpu-irqs.h | |||
@@ -14,36 +14,6 @@ | |||
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
16 | 16 | ||
17 | #include <asm/irq-routing.h> | ||
18 | |||
19 | #define IRQ_BASE_CPU (NR_IRQ_ACTIONS_PER_GROUP * 0) | ||
20 | |||
21 | /* IRQ IDs presented to drivers */ | ||
22 | enum { | ||
23 | IRQ_CPU__UNUSED = IRQ_BASE_CPU, | ||
24 | IRQ_CPU_UART0, | ||
25 | IRQ_CPU_UART1, | ||
26 | IRQ_CPU_TIMER0, | ||
27 | IRQ_CPU_TIMER1, | ||
28 | IRQ_CPU_TIMER2, | ||
29 | IRQ_CPU_DMA0, | ||
30 | IRQ_CPU_DMA1, | ||
31 | IRQ_CPU_DMA2, | ||
32 | IRQ_CPU_DMA3, | ||
33 | IRQ_CPU_DMA4, | ||
34 | IRQ_CPU_DMA5, | ||
35 | IRQ_CPU_DMA6, | ||
36 | IRQ_CPU_DMA7, | ||
37 | IRQ_CPU_EXTERNAL0, | ||
38 | IRQ_CPU_EXTERNAL1, | ||
39 | IRQ_CPU_EXTERNAL2, | ||
40 | IRQ_CPU_EXTERNAL3, | ||
41 | IRQ_CPU_EXTERNAL4, | ||
42 | IRQ_CPU_EXTERNAL5, | ||
43 | IRQ_CPU_EXTERNAL6, | ||
44 | IRQ_CPU_EXTERNAL7, | ||
45 | }; | ||
46 | |||
47 | /* IRQ to level mappings */ | 17 | /* IRQ to level mappings */ |
48 | #define IRQ_GDBSTUB_LEVEL 15 | 18 | #define IRQ_GDBSTUB_LEVEL 15 |
49 | #define IRQ_UART_LEVEL 13 | 19 | #define IRQ_UART_LEVEL 13 |
@@ -82,6 +52,30 @@ enum { | |||
82 | #define IRQ_XIRQ6_LEVEL 7 | 52 | #define IRQ_XIRQ6_LEVEL 7 |
83 | #define IRQ_XIRQ7_LEVEL 8 | 53 | #define IRQ_XIRQ7_LEVEL 8 |
84 | 54 | ||
55 | /* IRQ IDs presented to drivers */ | ||
56 | #define IRQ_CPU__UNUSED IRQ_BASE_CPU | ||
57 | #define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL) | ||
58 | #define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL) | ||
59 | #define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL) | ||
60 | #define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL) | ||
61 | #define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL) | ||
62 | #define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL) | ||
63 | #define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL) | ||
64 | #define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL) | ||
65 | #define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL) | ||
66 | #define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL) | ||
67 | #define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL) | ||
68 | #define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL) | ||
69 | #define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL) | ||
70 | #define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL) | ||
71 | #define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL) | ||
72 | #define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL) | ||
73 | #define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL) | ||
74 | #define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL) | ||
75 | #define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL) | ||
76 | #define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL) | ||
77 | #define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL) | ||
78 | |||
85 | #endif /* !__ASSEMBLY__ */ | 79 | #endif /* !__ASSEMBLY__ */ |
86 | 80 | ||
87 | #endif /* _ASM_CPU_IRQS_H */ | 81 | #endif /* _ASM_CPU_IRQS_H */ |
diff --git a/include/asm-frv/hardirq.h b/include/asm-frv/hardirq.h index 7581b5a7559a..fc47515822a2 100644 --- a/include/asm-frv/hardirq.h +++ b/include/asm-frv/hardirq.h | |||
@@ -26,5 +26,10 @@ typedef struct { | |||
26 | #error SMP not available on FR-V | 26 | #error SMP not available on FR-V |
27 | #endif /* CONFIG_SMP */ | 27 | #endif /* CONFIG_SMP */ |
28 | 28 | ||
29 | extern atomic_t irq_err_count; | ||
30 | static inline void ack_bad_irq(int irq) | ||
31 | { | ||
32 | atomic_inc(&irq_err_count); | ||
33 | } | ||
29 | 34 | ||
30 | #endif | 35 | #endif |
diff --git a/include/asm-frv/irq-routing.h b/include/asm-frv/irq-routing.h deleted file mode 100644 index ac3ab900a1dc..000000000000 --- a/include/asm-frv/irq-routing.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* irq-routing.h: multiplexed IRQ routing | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRQ_ROUTING_H | ||
13 | #define _ASM_IRQ_ROUTING_H | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | #include <linux/spinlock.h> | ||
18 | #include <asm/irq.h> | ||
19 | |||
20 | struct irq_source; | ||
21 | struct irq_level; | ||
22 | |||
23 | /* | ||
24 | * IRQ action distribution sets | ||
25 | */ | ||
26 | struct irq_group { | ||
27 | int first_irq; /* first IRQ distributed here */ | ||
28 | void (*control)(struct irq_group *group, int index, int on); | ||
29 | |||
30 | struct irqaction *actions[NR_IRQ_ACTIONS_PER_GROUP]; /* IRQ action chains */ | ||
31 | struct irq_source *sources[NR_IRQ_ACTIONS_PER_GROUP]; /* IRQ sources */ | ||
32 | int disable_cnt[NR_IRQ_ACTIONS_PER_GROUP]; /* disable counts */ | ||
33 | }; | ||
34 | |||
35 | /* | ||
36 | * IRQ source manager | ||
37 | */ | ||
38 | struct irq_source { | ||
39 | struct irq_source *next; | ||
40 | struct irq_level *level; | ||
41 | const char *muxname; | ||
42 | volatile void __iomem *muxdata; | ||
43 | unsigned long irqmask; | ||
44 | |||
45 | void (*doirq)(struct irq_source *source); | ||
46 | }; | ||
47 | |||
48 | /* | ||
49 | * IRQ level management (per CPU IRQ priority / entry vector) | ||
50 | */ | ||
51 | struct irq_level { | ||
52 | int usage; | ||
53 | int disable_count; | ||
54 | unsigned long flags; /* current IRQF_DISABLED and IRQF_SHARED settings */ | ||
55 | spinlock_t lock; | ||
56 | struct irq_source *sources; | ||
57 | }; | ||
58 | |||
59 | extern struct irq_level frv_irq_levels[16]; | ||
60 | extern struct irq_group *irq_groups[NR_IRQ_GROUPS]; | ||
61 | |||
62 | extern void frv_irq_route(struct irq_source *source, int irqlevel); | ||
63 | extern void frv_irq_route_external(struct irq_source *source, int irq); | ||
64 | extern void frv_irq_set_group(struct irq_group *group); | ||
65 | extern void distribute_irqs(struct irq_group *group, unsigned long irqmask); | ||
66 | extern void route_cpu_irqs(void); | ||
67 | |||
68 | #endif /* !__ASSEMBLY__ */ | ||
69 | |||
70 | #endif /* _ASM_IRQ_ROUTING_H */ | ||
diff --git a/include/asm-frv/irq.h b/include/asm-frv/irq.h index 58b619215a50..8fefd6b827aa 100644 --- a/include/asm-frv/irq.h +++ b/include/asm-frv/irq.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* irq.h: FRV IRQ definitions | 1 | /* irq.h: FRV IRQ definitions |
2 | * | 2 | * |
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | 3 | * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. |
4 | * Written by David Howells (dhowells@redhat.com) | 4 | * Written by David Howells (dhowells@redhat.com) |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
@@ -12,32 +12,22 @@ | |||
12 | #ifndef _ASM_IRQ_H_ | 12 | #ifndef _ASM_IRQ_H_ |
13 | #define _ASM_IRQ_H_ | 13 | #define _ASM_IRQ_H_ |
14 | 14 | ||
15 | |||
16 | /* | ||
17 | * the system has an on-CPU PIC and another PIC on the FPGA and other PICs on other peripherals, | ||
18 | * so we do some routing in irq-routing.[ch] to reduce the number of false-positives seen by | ||
19 | * drivers | ||
20 | */ | ||
21 | |||
22 | /* this number is used when no interrupt has been assigned */ | 15 | /* this number is used when no interrupt has been assigned */ |
23 | #define NO_IRQ (-1) | 16 | #define NO_IRQ (-1) |
24 | 17 | ||
25 | #define NR_IRQ_LOG2_ACTIONS_PER_GROUP 5 | 18 | #define NR_IRQS 48 |
26 | #define NR_IRQ_ACTIONS_PER_GROUP (1 << NR_IRQ_LOG2_ACTIONS_PER_GROUP) | 19 | #define IRQ_BASE_CPU (0 * 16) |
27 | #define NR_IRQ_GROUPS 4 | 20 | #define IRQ_BASE_FPGA (1 * 16) |
28 | #define NR_IRQS (NR_IRQ_ACTIONS_PER_GROUP * NR_IRQ_GROUPS) | 21 | #define IRQ_BASE_MB93493 (2 * 16) |
29 | 22 | ||
30 | /* probe returns a 32-bit IRQ mask:-/ */ | 23 | /* probe returns a 32-bit IRQ mask:-/ */ |
31 | #define MIN_PROBE_IRQ (NR_IRQS - 32) | 24 | #define MIN_PROBE_IRQ (NR_IRQS - 32) |
32 | 25 | ||
26 | #ifndef __ASSEMBLY__ | ||
33 | static inline int irq_canonicalize(int irq) | 27 | static inline int irq_canonicalize(int irq) |
34 | { | 28 | { |
35 | return irq; | 29 | return irq; |
36 | } | 30 | } |
37 | 31 | #endif | |
38 | extern void disable_irq_nosync(unsigned int irq); | ||
39 | extern void disable_irq(unsigned int irq); | ||
40 | extern void enable_irq(unsigned int irq); | ||
41 | |||
42 | 32 | ||
43 | #endif /* _ASM_IRQ_H_ */ | 33 | #endif /* _ASM_IRQ_H_ */ |
diff --git a/include/asm-frv/mb93091-fpga-irqs.h b/include/asm-frv/mb93091-fpga-irqs.h index 341bfc52a0eb..19778c5ba9d6 100644 --- a/include/asm-frv/mb93091-fpga-irqs.h +++ b/include/asm-frv/mb93091-fpga-irqs.h | |||
@@ -12,11 +12,9 @@ | |||
12 | #ifndef _ASM_MB93091_FPGA_IRQS_H | 12 | #ifndef _ASM_MB93091_FPGA_IRQS_H |
13 | #define _ASM_MB93091_FPGA_IRQS_H | 13 | #define _ASM_MB93091_FPGA_IRQS_H |
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #include <asm/irq.h> |
16 | |||
17 | #include <asm/irq-routing.h> | ||
18 | 16 | ||
19 | #define IRQ_BASE_FPGA (NR_IRQ_ACTIONS_PER_GROUP * 1) | 17 | #ifndef __ASSEMBLY__ |
20 | 18 | ||
21 | /* IRQ IDs presented to drivers */ | 19 | /* IRQ IDs presented to drivers */ |
22 | enum { | 20 | enum { |
diff --git a/include/asm-frv/mb93093-fpga-irqs.h b/include/asm-frv/mb93093-fpga-irqs.h index 1e0f11c2fcdb..590266b1a6d3 100644 --- a/include/asm-frv/mb93093-fpga-irqs.h +++ b/include/asm-frv/mb93093-fpga-irqs.h | |||
@@ -12,11 +12,9 @@ | |||
12 | #ifndef _ASM_MB93093_FPGA_IRQS_H | 12 | #ifndef _ASM_MB93093_FPGA_IRQS_H |
13 | #define _ASM_MB93093_FPGA_IRQS_H | 13 | #define _ASM_MB93093_FPGA_IRQS_H |
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #include <asm/irq.h> |
16 | |||
17 | #include <asm/irq-routing.h> | ||
18 | 16 | ||
19 | #define IRQ_BASE_FPGA (NR_IRQ_ACTIONS_PER_GROUP * 1) | 17 | #ifndef __ASSEMBLY__ |
20 | 18 | ||
21 | /* IRQ IDs presented to drivers */ | 19 | /* IRQ IDs presented to drivers */ |
22 | enum { | 20 | enum { |
diff --git a/include/asm-frv/mb93493-irqs.h b/include/asm-frv/mb93493-irqs.h index 15096e731325..82c7aeddd333 100644 --- a/include/asm-frv/mb93493-irqs.h +++ b/include/asm-frv/mb93493-irqs.h | |||
@@ -12,11 +12,9 @@ | |||
12 | #ifndef _ASM_MB93493_IRQS_H | 12 | #ifndef _ASM_MB93493_IRQS_H |
13 | #define _ASM_MB93493_IRQS_H | 13 | #define _ASM_MB93493_IRQS_H |
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #include <asm/irq.h> |
16 | |||
17 | #include <asm/irq-routing.h> | ||
18 | 16 | ||
19 | #define IRQ_BASE_MB93493 (NR_IRQ_ACTIONS_PER_GROUP * 2) | 17 | #ifndef __ASSEMBLY__ |
20 | 18 | ||
21 | /* IRQ IDs presented to drivers */ | 19 | /* IRQ IDs presented to drivers */ |
22 | enum { | 20 | enum { |
diff --git a/include/asm-frv/mb93493-regs.h b/include/asm-frv/mb93493-regs.h index c54aa9d14468..8a1f6aac8cf1 100644 --- a/include/asm-frv/mb93493-regs.h +++ b/include/asm-frv/mb93493-regs.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <asm/mb-regs.h> | 15 | #include <asm/mb-regs.h> |
16 | #include <asm/mb93493-irqs.h> | 16 | #include <asm/mb93493-irqs.h> |
17 | 17 | ||
18 | #define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X))) | ||
18 | #define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); }) | 19 | #define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); }) |
19 | 20 | ||
20 | #define __set_MB93493(X,V) \ | 21 | #define __set_MB93493(X,V) \ |
@@ -26,6 +27,7 @@ do { \ | |||
26 | #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) | 27 | #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) |
27 | #define MB93493_STSR_EN | 28 | #define MB93493_STSR_EN |
28 | 29 | ||
30 | #define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4) | ||
29 | #define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4) | 31 | #define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4) |
30 | #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) | 32 | #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) |
31 | 33 | ||