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-rw-r--r--include/linux/mtd/onenand.h18
-rw-r--r--include/linux/mtd/onenand_regs.h20
2 files changed, 36 insertions, 2 deletions
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 0fa3ac4ad576..9aab82c1c743 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -17,6 +17,7 @@
17#include <linux/mtd/onenand_regs.h> 17#include <linux/mtd/onenand_regs.h>
18#include <linux/mtd/bbm.h> 18#include <linux/mtd/bbm.h>
19 19
20#define MAX_DIES 2
20#define MAX_BUFFERRAM 2 21#define MAX_BUFFERRAM 2
21 22
22/* Scan and identify a OneNAND device */ 23/* Scan and identify a OneNAND device */
@@ -51,7 +52,12 @@ struct onenand_bufferram {
51/** 52/**
52 * struct onenand_chip - OneNAND Private Flash Chip Data 53 * struct onenand_chip - OneNAND Private Flash Chip Data
53 * @base: [BOARDSPECIFIC] address to access OneNAND 54 * @base: [BOARDSPECIFIC] address to access OneNAND
55 * @dies: [INTERN][FLEX-ONENAND] number of dies on chip
56 * @boundary: [INTERN][FLEX-ONENAND] Boundary of the dies
57 * @diesize: [INTERN][FLEX-ONENAND] Size of the dies
54 * @chipsize: [INTERN] the size of one chip for multichip arrays 58 * @chipsize: [INTERN] the size of one chip for multichip arrays
59 * FIXME For Flex-OneNAND, chipsize holds maximum possible
60 * device size ie when all blocks are considered MLC
55 * @device_id: [INTERN] device ID 61 * @device_id: [INTERN] device ID
56 * @density_mask: chip density, used for DDP devices 62 * @density_mask: chip density, used for DDP devices
57 * @verstion_id: [INTERN] version ID 63 * @verstion_id: [INTERN] version ID
@@ -92,9 +98,13 @@ struct onenand_bufferram {
92 */ 98 */
93struct onenand_chip { 99struct onenand_chip {
94 void __iomem *base; 100 void __iomem *base;
101 unsigned dies;
102 unsigned boundary[MAX_DIES];
103 loff_t diesize[MAX_DIES];
95 unsigned int chipsize; 104 unsigned int chipsize;
96 unsigned int device_id; 105 unsigned int device_id;
97 unsigned int version_id; 106 unsigned int version_id;
107 unsigned int technology;
98 unsigned int density_mask; 108 unsigned int density_mask;
99 unsigned int options; 109 unsigned int options;
100 110
@@ -145,6 +155,8 @@ struct onenand_chip {
145#define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) 155#define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0)
146#define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) 156#define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1)
147 157
158#define FLEXONENAND(this) \
159 (this->device_id & DEVICE_IS_FLEXONENAND)
148#define ONENAND_GET_SYS_CFG1(this) \ 160#define ONENAND_GET_SYS_CFG1(this) \
149 (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) 161 (this->read_word(this->base + ONENAND_REG_SYS_CFG1))
150#define ONENAND_SET_SYS_CFG1(v, this) \ 162#define ONENAND_SET_SYS_CFG1(v, this) \
@@ -153,6 +165,9 @@ struct onenand_chip {
153#define ONENAND_IS_DDP(this) \ 165#define ONENAND_IS_DDP(this) \
154 (this->device_id & ONENAND_DEVICE_IS_DDP) 166 (this->device_id & ONENAND_DEVICE_IS_DDP)
155 167
168#define ONENAND_IS_MLC(this) \
169 (this->technology & ONENAND_TECHNOLOGY_IS_MLC)
170
156#ifdef CONFIG_MTD_ONENAND_2X_PROGRAM 171#ifdef CONFIG_MTD_ONENAND_2X_PROGRAM
157#define ONENAND_IS_2PLANE(this) \ 172#define ONENAND_IS_2PLANE(this) \
158 (this->options & ONENAND_HAS_2PLANE) 173 (this->options & ONENAND_HAS_2PLANE)
@@ -190,5 +205,8 @@ struct onenand_manufacturers {
190 205
191int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 206int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
192 struct mtd_oob_ops *ops); 207 struct mtd_oob_ops *ops);
208unsigned onenand_block(struct onenand_chip *this, loff_t addr);
209loff_t onenand_addr(struct onenand_chip *this, int block);
210int flexonenand_region(struct mtd_info *mtd, loff_t addr);
193 211
194#endif /* __LINUX_MTD_ONENAND_H */ 212#endif /* __LINUX_MTD_ONENAND_H */
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index 0c6bbe28f38c..86a6bbef6465 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -67,6 +67,9 @@
67/* 67/*
68 * Device ID Register F001h (R) 68 * Device ID Register F001h (R)
69 */ 69 */
70#define DEVICE_IS_FLEXONENAND (1 << 9)
71#define FLEXONENAND_PI_MASK (0x3ff)
72#define FLEXONENAND_PI_UNLOCK_SHIFT (14)
70#define ONENAND_DEVICE_DENSITY_MASK (0xf) 73#define ONENAND_DEVICE_DENSITY_MASK (0xf)
71#define ONENAND_DEVICE_DENSITY_SHIFT (4) 74#define ONENAND_DEVICE_DENSITY_SHIFT (4)
72#define ONENAND_DEVICE_IS_DDP (1 << 3) 75#define ONENAND_DEVICE_IS_DDP (1 << 3)
@@ -84,6 +87,11 @@
84#define ONENAND_VERSION_PROCESS_SHIFT (8) 87#define ONENAND_VERSION_PROCESS_SHIFT (8)
85 88
86/* 89/*
90 * Technology Register F006h (R)
91 */
92#define ONENAND_TECHNOLOGY_IS_MLC (1 << 0)
93
94/*
87 * Start Address 1 F100h (R/W) & Start Address 2 F101h (R/W) 95 * Start Address 1 F100h (R/W) & Start Address 2 F101h (R/W)
88 */ 96 */
89#define ONENAND_DDP_SHIFT (15) 97#define ONENAND_DDP_SHIFT (15)
@@ -93,7 +101,8 @@
93/* 101/*
94 * Start Address 8 F107h (R/W) 102 * Start Address 8 F107h (R/W)
95 */ 103 */
96#define ONENAND_FPA_MASK (0x3f) 104/* Note: It's actually 0x3f in case of SLC */
105#define ONENAND_FPA_MASK (0x7f)
97#define ONENAND_FPA_SHIFT (2) 106#define ONENAND_FPA_SHIFT (2)
98#define ONENAND_FSA_MASK (0x03) 107#define ONENAND_FSA_MASK (0x03)
99 108
@@ -105,7 +114,8 @@
105#define ONENAND_BSA_BOOTRAM (0 << 2) 114#define ONENAND_BSA_BOOTRAM (0 << 2)
106#define ONENAND_BSA_DATARAM0 (2 << 2) 115#define ONENAND_BSA_DATARAM0 (2 << 2)
107#define ONENAND_BSA_DATARAM1 (3 << 2) 116#define ONENAND_BSA_DATARAM1 (3 << 2)
108#define ONENAND_BSC_MASK (0x03) 117/* Note: It's actually 0x03 in case of SLC */
118#define ONENAND_BSC_MASK (0x07)
109 119
110/* 120/*
111 * Command Register F220h (R/W) 121 * Command Register F220h (R/W)
@@ -124,9 +134,13 @@
124#define ONENAND_CMD_RESET (0xF0) 134#define ONENAND_CMD_RESET (0xF0)
125#define ONENAND_CMD_OTP_ACCESS (0x65) 135#define ONENAND_CMD_OTP_ACCESS (0x65)
126#define ONENAND_CMD_READID (0x90) 136#define ONENAND_CMD_READID (0x90)
137#define FLEXONENAND_CMD_PI_UPDATE (0x05)
138#define FLEXONENAND_CMD_PI_ACCESS (0x66)
139#define FLEXONENAND_CMD_RECOVER_LSB (0x05)
127 140
128/* NOTE: Those are not *REAL* commands */ 141/* NOTE: Those are not *REAL* commands */
129#define ONENAND_CMD_BUFFERRAM (0x1978) 142#define ONENAND_CMD_BUFFERRAM (0x1978)
143#define FLEXONENAND_CMD_READ_PI (0x1985)
130 144
131/* 145/*
132 * System Configuration 1 Register F221h (R, R/W) 146 * System Configuration 1 Register F221h (R, R/W)
@@ -192,10 +206,12 @@
192#define ONENAND_ECC_1BIT_ALL (0x5555) 206#define ONENAND_ECC_1BIT_ALL (0x5555)
193#define ONENAND_ECC_2BIT (1 << 1) 207#define ONENAND_ECC_2BIT (1 << 1)
194#define ONENAND_ECC_2BIT_ALL (0xAAAA) 208#define ONENAND_ECC_2BIT_ALL (0xAAAA)
209#define FLEXONENAND_UNCORRECTABLE_ERROR (0x1010)
195 210
196/* 211/*
197 * One-Time Programmable (OTP) 212 * One-Time Programmable (OTP)
198 */ 213 */
214#define FLEXONENAND_OTP_LOCK_OFFSET (2048)
199#define ONENAND_OTP_LOCK_OFFSET (14) 215#define ONENAND_OTP_LOCK_OFFSET (14)
200 216
201#endif /* __ONENAND_REG_H */ 217#endif /* __ONENAND_REG_H */