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-rw-r--r--include/asm-powerpc/spu.h76
-rw-r--r--include/asm-powerpc/spu_csa.h256
2 files changed, 332 insertions, 0 deletions
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index b036385cd831..62718f3ba03f 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -29,6 +29,81 @@
29#define LS_ORDER (6) /* 256 kb */ 29#define LS_ORDER (6) /* 256 kb */
30 30
31#define LS_SIZE (PAGE_SIZE << LS_ORDER) 31#define LS_SIZE (PAGE_SIZE << LS_ORDER)
32#define LS_ADDR_MASK (LS_SIZE - 1)
33
34#define MFC_PUT_CMD 0x20
35#define MFC_PUTS_CMD 0x28
36#define MFC_PUTR_CMD 0x30
37#define MFC_PUTF_CMD 0x22
38#define MFC_PUTB_CMD 0x21
39#define MFC_PUTFS_CMD 0x2A
40#define MFC_PUTBS_CMD 0x29
41#define MFC_PUTRF_CMD 0x32
42#define MFC_PUTRB_CMD 0x31
43#define MFC_PUTL_CMD 0x24
44#define MFC_PUTRL_CMD 0x34
45#define MFC_PUTLF_CMD 0x26
46#define MFC_PUTLB_CMD 0x25
47#define MFC_PUTRLF_CMD 0x36
48#define MFC_PUTRLB_CMD 0x35
49
50#define MFC_GET_CMD 0x40
51#define MFC_GETS_CMD 0x48
52#define MFC_GETF_CMD 0x42
53#define MFC_GETB_CMD 0x41
54#define MFC_GETFS_CMD 0x4A
55#define MFC_GETBS_CMD 0x49
56#define MFC_GETL_CMD 0x44
57#define MFC_GETLF_CMD 0x46
58#define MFC_GETLB_CMD 0x45
59
60#define MFC_SDCRT_CMD 0x80
61#define MFC_SDCRTST_CMD 0x81
62#define MFC_SDCRZ_CMD 0x89
63#define MFC_SDCRS_CMD 0x8D
64#define MFC_SDCRF_CMD 0x8F
65
66#define MFC_GETLLAR_CMD 0xD0
67#define MFC_PUTLLC_CMD 0xB4
68#define MFC_PUTLLUC_CMD 0xB0
69#define MFC_PUTQLLUC_CMD 0xB8
70#define MFC_SNDSIG_CMD 0xA0
71#define MFC_SNDSIGB_CMD 0xA1
72#define MFC_SNDSIGF_CMD 0xA2
73#define MFC_BARRIER_CMD 0xC0
74#define MFC_EIEIO_CMD 0xC8
75#define MFC_SYNC_CMD 0xCC
76
77#define MFC_MIN_DMA_SIZE_SHIFT 4 /* 16 bytes */
78#define MFC_MAX_DMA_SIZE_SHIFT 14 /* 16384 bytes */
79#define MFC_MIN_DMA_SIZE (1 << MFC_MIN_DMA_SIZE_SHIFT)
80#define MFC_MAX_DMA_SIZE (1 << MFC_MAX_DMA_SIZE_SHIFT)
81#define MFC_MIN_DMA_SIZE_MASK (MFC_MIN_DMA_SIZE - 1)
82#define MFC_MAX_DMA_SIZE_MASK (MFC_MAX_DMA_SIZE - 1)
83#define MFC_MIN_DMA_LIST_SIZE 0x0008 /* 8 bytes */
84#define MFC_MAX_DMA_LIST_SIZE 0x4000 /* 16K bytes */
85
86#define MFC_TAGID_TO_TAGMASK(tag_id) (1 << (tag_id & 0x1F))
87
88/* Events for Channels 0-2 */
89#define MFC_DMA_TAG_STATUS_UPDATE_EVENT 0x00000001
90#define MFC_DMA_TAG_CMD_STALL_NOTIFY_EVENT 0x00000002
91#define MFC_DMA_QUEUE_AVAILABLE_EVENT 0x00000008
92#define MFC_SPU_MAILBOX_WRITTEN_EVENT 0x00000010
93#define MFC_DECREMENTER_EVENT 0x00000020
94#define MFC_PU_INT_MAILBOX_AVAILABLE_EVENT 0x00000040
95#define MFC_PU_MAILBOX_AVAILABLE_EVENT 0x00000080
96#define MFC_SIGNAL_2_EVENT 0x00000100
97#define MFC_SIGNAL_1_EVENT 0x00000200
98#define MFC_LLR_LOST_EVENT 0x00000400
99#define MFC_PRIV_ATTN_EVENT 0x00000800
100#define MFC_MULTI_SRC_EVENT 0x00001000
101
102/* Flags indicating progress during context switch. */
103#define SPU_CONTEXT_SWITCH_PENDING_nr 0UL
104#define SPU_CONTEXT_SWITCH_ACTIVE_nr 1UL
105#define SPU_CONTEXT_SWITCH_PENDING (1UL << SPU_CONTEXT_SWITCH_PENDING_nr)
106#define SPU_CONTEXT_SWITCH_ACTIVE (1UL << SPU_CONTEXT_SWITCH_ACTIVE_nr)
32 107
33struct spu { 108struct spu {
34 char *name; 109 char *name;
@@ -41,6 +116,7 @@ struct spu {
41 int number; 116 int number;
42 u32 isrc; 117 u32 isrc;
43 u32 node; 118 u32 node;
119 u64 flags;
44 struct kref kref; 120 struct kref kref;
45 size_t ls_size; 121 size_t ls_size;
46 unsigned int slb_replace; 122 unsigned int slb_replace;
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
new file mode 100644
index 000000000000..d1d537de4f5c
--- /dev/null
+++ b/include/asm-powerpc/spu_csa.h
@@ -0,0 +1,256 @@
1/*
2 * spu_csa.h: Definitions for SPU context save area (CSA).
3 *
4 * (C) Copyright IBM 2005
5 *
6 * Author: Mark Nutter <mnutter@us.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef _SPU_CSA_H_
24#define _SPU_CSA_H_
25
26/*
27 * Total number of 128-bit registers.
28 */
29#define NR_SPU_GPRS 128
30#define NR_SPU_SPRS 9
31#define NR_SPU_REGS_PAD 7
32#define NR_SPU_SPILL_REGS 144 /* GPRS + SPRS + PAD */
33#define SIZEOF_SPU_SPILL_REGS NR_SPU_SPILL_REGS * 16
34
35#define SPU_SAVE_COMPLETE 0x3FFB
36#define SPU_RESTORE_COMPLETE 0x3FFC
37
38/*
39 * Definitions for various 'stopped' status conditions,
40 * to be recreated during context restore.
41 */
42#define SPU_STOPPED_STATUS_P 1
43#define SPU_STOPPED_STATUS_I 2
44#define SPU_STOPPED_STATUS_H 3
45#define SPU_STOPPED_STATUS_S 4
46#define SPU_STOPPED_STATUS_S_I 5
47#define SPU_STOPPED_STATUS_S_P 6
48#define SPU_STOPPED_STATUS_P_H 7
49#define SPU_STOPPED_STATUS_P_I 8
50#define SPU_STOPPED_STATUS_R 9
51
52#ifndef __ASSEMBLY__
53/**
54 * spu_reg128 - generic 128-bit register definition.
55 */
56struct spu_reg128 {
57 u32 slot[4];
58};
59
60/**
61 * struct spu_lscsa - Local Store Context Save Area.
62 * @gprs: Array of saved registers.
63 * @fpcr: Saved floating point status control register.
64 * @decr: Saved decrementer value.
65 * @decr_status: Indicates decrementer run status.
66 * @ppu_mb: Saved PPU mailbox data.
67 * @ppuint_mb: Saved PPU interrupting mailbox data.
68 * @tag_mask: Saved tag group mask.
69 * @event_mask: Saved event mask.
70 * @srr0: Saved SRR0.
71 * @stopped_status: Conditions to be recreated by restore.
72 * @ls: Saved contents of Local Storage Area.
73 *
74 * The LSCSA represents state that is primarily saved and
75 * restored by SPU-side code.
76 */
77struct spu_lscsa {
78 struct spu_reg128 gprs[128];
79 struct spu_reg128 fpcr;
80 struct spu_reg128 decr;
81 struct spu_reg128 decr_status;
82 struct spu_reg128 ppu_mb;
83 struct spu_reg128 ppuint_mb;
84 struct spu_reg128 tag_mask;
85 struct spu_reg128 event_mask;
86 struct spu_reg128 srr0;
87 struct spu_reg128 stopped_status;
88 struct spu_reg128 pad[119]; /* 'ls' must be page-aligned. */
89 unsigned char ls[LS_SIZE];
90};
91
92#ifdef __KERNEL__
93
94/*
95 * struct spu_problem_collapsed - condensed problem state area, w/o pads.
96 */
97struct spu_problem_collapsed {
98 u64 spc_mssync_RW;
99 u32 mfc_lsa_W;
100 u32 unused_pad0;
101 u64 mfc_ea_W;
102 union mfc_tag_size_class_cmd mfc_union_W;
103 u32 dma_qstatus_R;
104 u32 dma_querytype_RW;
105 u32 dma_querymask_RW;
106 u32 dma_tagstatus_R;
107 u32 pu_mb_R;
108 u32 spu_mb_W;
109 u32 mb_stat_R;
110 u32 spu_runcntl_RW;
111 u32 spu_status_R;
112 u32 spu_spc_R;
113 u32 spu_npc_RW;
114 u32 signal_notify1;
115 u32 signal_notify2;
116 u32 unused_pad1;
117};
118
119/*
120 * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads.
121 */
122struct spu_priv1_collapsed {
123 u64 mfc_sr1_RW;
124 u64 mfc_lpid_RW;
125 u64 spu_idr_RW;
126 u64 mfc_vr_RO;
127 u64 spu_vr_RO;
128 u64 int_mask_class0_RW;
129 u64 int_mask_class1_RW;
130 u64 int_mask_class2_RW;
131 u64 int_stat_class0_RW;
132 u64 int_stat_class1_RW;
133 u64 int_stat_class2_RW;
134 u64 int_route_RW;
135 u64 mfc_atomic_flush_RW;
136 u64 resource_allocation_groupID_RW;
137 u64 resource_allocation_enable_RW;
138 u64 mfc_fir_R;
139 u64 mfc_fir_status_or_W;
140 u64 mfc_fir_status_and_W;
141 u64 mfc_fir_mask_R;
142 u64 mfc_fir_mask_or_W;
143 u64 mfc_fir_mask_and_W;
144 u64 mfc_fir_chkstp_enable_RW;
145 u64 smf_sbi_signal_sel;
146 u64 smf_ato_signal_sel;
147 u64 mfc_sdr_RW;
148 u64 tlb_index_hint_RO;
149 u64 tlb_index_W;
150 u64 tlb_vpn_RW;
151 u64 tlb_rpn_RW;
152 u64 tlb_invalidate_entry_W;
153 u64 tlb_invalidate_all_W;
154 u64 smm_hid;
155 u64 mfc_accr_RW;
156 u64 mfc_dsisr_RW;
157 u64 mfc_dar_RW;
158 u64 rmt_index_RW;
159 u64 rmt_data1_RW;
160 u64 mfc_dsir_R;
161 u64 mfc_lsacr_RW;
162 u64 mfc_lscrr_R;
163 u64 mfc_tclass_id_RW;
164 u64 mfc_rm_boundary;
165 u64 smf_dma_signal_sel;
166 u64 smm_signal_sel;
167 u64 mfc_cer_R;
168 u64 pu_ecc_cntl_RW;
169 u64 pu_ecc_stat_RW;
170 u64 spu_ecc_addr_RW;
171 u64 spu_err_mask_RW;
172 u64 spu_trig0_sel;
173 u64 spu_trig1_sel;
174 u64 spu_trig2_sel;
175 u64 spu_trig3_sel;
176 u64 spu_trace_sel;
177 u64 spu_event0_sel;
178 u64 spu_event1_sel;
179 u64 spu_event2_sel;
180 u64 spu_event3_sel;
181 u64 spu_trace_cntl;
182};
183
184/*
185 * struct spu_priv2_collapsed - condensed priviliged 2 area, w/o pads.
186 */
187struct spu_priv2_collapsed {
188 u64 slb_index_W;
189 u64 slb_esid_RW;
190 u64 slb_vsid_RW;
191 u64 slb_invalidate_entry_W;
192 u64 slb_invalidate_all_W;
193 struct mfc_cq_sr spuq[16];
194 struct mfc_cq_sr puq[8];
195 u64 mfc_control_RW;
196 u64 puint_mb_R;
197 u64 spu_privcntl_RW;
198 u64 spu_lslr_RW;
199 u64 spu_chnlcntptr_RW;
200 u64 spu_chnlcnt_RW;
201 u64 spu_chnldata_RW;
202 u64 spu_cfg_RW;
203 u64 spu_pm_trace_tag_status_RW;
204 u64 spu_tag_status_query_RW;
205 u64 spu_cmd_buf1_RW;
206 u64 spu_cmd_buf2_RW;
207 u64 spu_atomic_status_RW;
208};
209
210/**
211 * struct spu_state
212 * @lscsa: Local Store Context Save Area.
213 * @prob: Collapsed Problem State Area, w/o pads.
214 * @priv1: Collapsed Privileged 1 Area, w/o pads.
215 * @priv2: Collapsed Privileged 2 Area, w/o pads.
216 * @spu_chnlcnt_RW: Array of saved channel counts.
217 * @spu_chnldata_RW: Array of saved channel data.
218 * @suspend_time: Time stamp when decrementer disabled.
219 * @slb_esid_RW: Array of saved SLB esid entries.
220 * @slb_vsid_RW: Array of saved SLB vsid entries.
221 *
222 * Structure representing the whole of the SPU
223 * context save area (CSA). This struct contains
224 * all of the state necessary to suspend and then
225 * later optionally resume execution of an SPU
226 * context.
227 *
228 * The @lscsa region is by far the largest, and is
229 * allocated separately so that it may either be
230 * pinned or mapped to/from application memory, as
231 * appropriate for the OS environment.
232 */
233struct spu_state {
234 struct spu_lscsa *lscsa;
235 struct spu_problem_collapsed prob;
236 struct spu_priv1_collapsed priv1;
237 struct spu_priv2_collapsed priv2;
238 u64 spu_chnlcnt_RW[32];
239 u64 spu_chnldata_RW[32];
240 u32 spu_mailbox_data[4];
241 u32 pu_mailbox_data[1];
242 unsigned long suspend_time;
243 u64 slb_esid_RW[8];
244 u64 slb_vsid_RW[8];
245};
246
247extern void spu_init_csa(struct spu_state *csa);
248extern void spu_fini_csa(struct spu_state *csa);
249extern int spu_save(struct spu_state *prev, struct spu *spu);
250extern int spu_restore(struct spu_state *new, struct spu *spu);
251extern int spu_switch(struct spu_state *prev, struct spu_state *new,
252 struct spu *spu);
253
254#endif /* __KERNEL__ */
255#endif /* !__ASSEMBLY__ */
256#endif /* _SPU_CSA_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 13:46:20 -0500