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-rw-r--r--include/asm-alpha/pci.h29
-rw-r--r--include/asm-arm/pci.h9
-rw-r--r--include/asm-cris/pci.h36
-rw-r--r--include/asm-frv/pci.h7
-rw-r--r--include/asm-h8300/pci.h4
-rw-r--r--include/asm-i386/pci.h37
-rw-r--r--include/asm-ia64/pci.h12
-rw-r--r--include/asm-m68k/pci.h4
-rw-r--r--include/asm-m68knommu/pci.h10
-rw-r--r--include/asm-mips/pci.h18
-rw-r--r--include/asm-parisc/pci.h7
-rw-r--r--include/asm-powerpc/dma-mapping.h1
-rw-r--r--include/asm-powerpc/pci.h20
-rw-r--r--include/asm-ppc/pci.h8
-rw-r--r--include/asm-sh/pci.h9
-rw-r--r--include/asm-sh64/pci.h9
-rw-r--r--include/asm-sparc/pci.h6
-rw-r--r--include/asm-sparc64/pci.h47
-rw-r--r--include/asm-v850/pci.h4
-rw-r--r--include/asm-v850/rte_cb.h1
-rw-r--r--include/asm-x86_64/pci.h44
-rw-r--r--include/asm-xtensa/pci.h7
-rw-r--r--include/linux/aer.h10
-rw-r--r--include/linux/pci.h16
-rw-r--r--include/linux/pci_ids.h74
25 files changed, 33 insertions, 396 deletions
diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h
index 85aa1127c903..30ee7669b19f 100644
--- a/include/asm-alpha/pci.h
+++ b/include/asm-alpha/pci.h
@@ -199,30 +199,6 @@ pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg,
199 199
200extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); 200extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
201 201
202/* True if the machine supports DAC addressing, and DEV can
203 make use of it given MASK. */
204extern int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask);
205
206/* Convert to/from DAC dma address and struct page. */
207extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *, struct page *,
208 unsigned long, int);
209extern struct page *pci_dac_dma_to_page(struct pci_dev *, dma64_addr_t);
210extern unsigned long pci_dac_dma_to_offset(struct pci_dev *, dma64_addr_t);
211
212static inline void
213pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr,
214 size_t len, int direction)
215{
216 /* Nothing to do. */
217}
218
219static inline void
220pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr,
221 size_t len, int direction)
222{
223 /* Nothing to do. */
224}
225
226#ifdef CONFIG_PCI 202#ifdef CONFIG_PCI
227static inline void pci_dma_burst_advice(struct pci_dev *pdev, 203static inline void pci_dma_burst_advice(struct pci_dev *pdev,
228 enum pci_dma_burst_strategy *strat, 204 enum pci_dma_burst_strategy *strat,
@@ -275,11 +251,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
275 return hose->need_domain_info; 251 return hose->need_domain_info;
276} 252}
277 253
278static inline void
279pcibios_add_platform_entries(struct pci_dev *dev)
280{
281}
282
283struct pci_dev *alpha_gendev_to_pci(struct device *dev); 254struct pci_dev *alpha_gendev_to_pci(struct device *dev);
284 255
285#endif /* __KERNEL__ */ 256#endif /* __KERNEL__ */
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
index f21abd4ddac6..ed3f898191f4 100644
--- a/include/asm-arm/pci.h
+++ b/include/asm-arm/pci.h
@@ -26,11 +26,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
26#define PCI_DMA_BUS_IS_PHYS (0) 26#define PCI_DMA_BUS_IS_PHYS (0)
27 27
28/* 28/*
29 * We don't support DAC DMA cycles.
30 */
31#define pci_dac_dma_supported(pci_dev, mask) (0)
32
33/*
34 * Whether pci_unmap_{single,page} is a nop depends upon the 29 * Whether pci_unmap_{single,page} is a nop depends upon the
35 * configuration. 30 * configuration.
36 */ 31 */
@@ -76,10 +71,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
76 return root; 71 return root;
77} 72}
78 73
79static inline void pcibios_add_platform_entries(struct pci_dev *dev)
80{
81}
82
83#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
84 75
85#endif 76#endif
diff --git a/include/asm-cris/pci.h b/include/asm-cris/pci.h
index b2ac8a331da1..730ce40fdd0f 100644
--- a/include/asm-cris/pci.h
+++ b/include/asm-cris/pci.h
@@ -52,47 +52,11 @@ struct pci_dev;
52#define pci_unmap_len(PTR, LEN_NAME) (0) 52#define pci_unmap_len(PTR, LEN_NAME) (0)
53#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 53#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
54 54
55/* This is always fine. */
56#define pci_dac_dma_supported(pci_dev, mask) (1)
57
58static inline dma64_addr_t
59pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
60{
61 return ((dma64_addr_t) page_to_phys(page) +
62 (dma64_addr_t) offset);
63}
64
65static inline struct page *
66pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
67{
68 return pfn_to_page(dma_addr >> PAGE_SHIFT);
69}
70
71static inline unsigned long
72pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
73{
74 return (dma_addr & ~PAGE_MASK);
75}
76
77static inline void
78pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
79{
80}
81
82static inline void
83pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
84{
85}
86
87#define HAVE_PCI_MMAP 55#define HAVE_PCI_MMAP
88extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 56extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
89 enum pci_mmap_state mmap_state, int write_combine); 57 enum pci_mmap_state mmap_state, int write_combine);
90 58
91 59
92static inline void pcibios_add_platform_entries(struct pci_dev *dev)
93{
94}
95
96#endif /* __KERNEL__ */ 60#endif /* __KERNEL__ */
97 61
98/* implement the pci_ DMA API in terms of the generic device dma_ one */ 62/* implement the pci_ DMA API in terms of the generic device dma_ one */
diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h
index f35a4511e7b9..585d9b49949a 100644
--- a/include/asm-frv/pci.h
+++ b/include/asm-frv/pci.h
@@ -22,10 +22,6 @@ struct pci_dev;
22 22
23#define pcibios_assign_all_busses() 0 23#define pcibios_assign_all_busses() 0
24 24
25static inline void pcibios_add_platform_entries(struct pci_dev *dev)
26{
27}
28
29extern void pcibios_set_master(struct pci_dev *dev); 25extern void pcibios_set_master(struct pci_dev *dev);
30 26
31extern void pcibios_penalize_isa_irq(int irq); 27extern void pcibios_penalize_isa_irq(int irq);
@@ -44,9 +40,6 @@ extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
44extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, 40extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
45 void *vaddr, dma_addr_t dma_handle); 41 void *vaddr, dma_addr_t dma_handle);
46 42
47/* This is always fine. */
48#define pci_dac_dma_supported(pci_dev, mask) (1)
49
50/* Return the index of the PCI controller for device PDEV. */ 43/* Return the index of the PCI controller for device PDEV. */
51#define pci_controller_num(PDEV) (0) 44#define pci_controller_num(PDEV) (0)
52 45
diff --git a/include/asm-h8300/pci.h b/include/asm-h8300/pci.h
index 0c771b05fdd5..97389b35aa35 100644
--- a/include/asm-h8300/pci.h
+++ b/include/asm-h8300/pci.h
@@ -22,8 +22,4 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
22 22
23#define PCI_DMA_BUS_IS_PHYS (1) 23#define PCI_DMA_BUS_IS_PHYS (1)
24 24
25static inline void pcibios_add_platform_entries(struct pci_dev *dev)
26{
27}
28
29#endif /* _ASM_H8300_PCI_H */ 25#endif /* _ASM_H8300_PCI_H */
diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h
index 64b6d0baedbc..392d3fe5d45e 100644
--- a/include/asm-i386/pci.h
+++ b/include/asm-i386/pci.h
@@ -56,48 +56,11 @@ struct pci_dev;
56#define pci_unmap_len(PTR, LEN_NAME) (0) 56#define pci_unmap_len(PTR, LEN_NAME) (0)
57#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 57#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
58 58
59/* This is always fine. */
60#define pci_dac_dma_supported(pci_dev, mask) (1)
61
62static inline dma64_addr_t
63pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
64{
65 return ((dma64_addr_t) page_to_phys(page) +
66 (dma64_addr_t) offset);
67}
68
69static inline struct page *
70pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
71{
72 return pfn_to_page(dma_addr >> PAGE_SHIFT);
73}
74
75static inline unsigned long
76pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
77{
78 return (dma_addr & ~PAGE_MASK);
79}
80
81static inline void
82pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
83{
84}
85
86static inline void
87pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
88{
89 flush_write_buffers();
90}
91
92#define HAVE_PCI_MMAP 59#define HAVE_PCI_MMAP
93extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 60extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
94 enum pci_mmap_state mmap_state, int write_combine); 61 enum pci_mmap_state mmap_state, int write_combine);
95 62
96 63
97static inline void pcibios_add_platform_entries(struct pci_dev *dev)
98{
99}
100
101#ifdef CONFIG_PCI 64#ifdef CONFIG_PCI
102static inline void pci_dma_burst_advice(struct pci_dev *pdev, 65static inline void pci_dma_burst_advice(struct pci_dev *pdev,
103 enum pci_dma_burst_strategy *strat, 66 enum pci_dma_burst_strategy *strat,
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index 5a5d1c2ce39d..3523d2584598 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -71,14 +71,6 @@ pcibios_penalize_isa_irq (int irq, int active)
71#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ 71#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
72 (((PTR)->LEN_NAME) = (VAL)) 72 (((PTR)->LEN_NAME) = (VAL))
73 73
74/* The ia64 platform always supports 64-bit addressing. */
75#define pci_dac_dma_supported(pci_dev, mask) (1)
76#define pci_dac_page_to_dma(dev,pg,off,dir) ((dma_addr_t) page_to_bus(pg) + (off))
77#define pci_dac_dma_to_page(dev,dma_addr) (virt_to_page(bus_to_virt(dma_addr)))
78#define pci_dac_dma_to_offset(dev,dma_addr) offset_in_page(dma_addr)
79#define pci_dac_dma_sync_single_for_cpu(dev,dma_addr,len,dir) do { } while (0)
80#define pci_dac_dma_sync_single_for_device(dev,dma_addr,len,dir) do { mb(); } while (0)
81
82#ifdef CONFIG_PCI 74#ifdef CONFIG_PCI
83static inline void pci_dma_burst_advice(struct pci_dev *pdev, 75static inline void pci_dma_burst_advice(struct pci_dev *pdev,
84 enum pci_dma_burst_strategy *strat, 76 enum pci_dma_burst_strategy *strat,
@@ -143,10 +135,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
143 return (pci_domain_nr(bus) != 0); 135 return (pci_domain_nr(bus) != 0);
144} 136}
145 137
146static inline void pcibios_add_platform_entries(struct pci_dev *dev)
147{
148}
149
150extern void pcibios_resource_to_bus(struct pci_dev *dev, 138extern void pcibios_resource_to_bus(struct pci_dev *dev,
151 struct pci_bus_region *region, struct resource *res); 139 struct pci_bus_region *region, struct resource *res);
152 140
diff --git a/include/asm-m68k/pci.h b/include/asm-m68k/pci.h
index 9d2c07abe44f..678cb0b52314 100644
--- a/include/asm-m68k/pci.h
+++ b/include/asm-m68k/pci.h
@@ -54,8 +54,4 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
54 */ 54 */
55#define PCI_DMA_BUS_IS_PHYS (1) 55#define PCI_DMA_BUS_IS_PHYS (1)
56 56
57static inline void pcibios_add_platform_entries(struct pci_dev *dev)
58{
59}
60
61#endif /* _ASM_M68K_PCI_H */ 57#endif /* _ASM_M68K_PCI_H */
diff --git a/include/asm-m68knommu/pci.h b/include/asm-m68knommu/pci.h
index e04c77e1184d..a13f3cc87451 100644
--- a/include/asm-m68knommu/pci.h
+++ b/include/asm-m68knommu/pci.h
@@ -24,16 +24,6 @@ static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
24 return 1; 24 return 1;
25} 25}
26 26
27/*
28 * Not supporting more than 32-bit PCI bus addresses now, but
29 * must satisfy references to this function. Change if needed.
30 */
31#define pci_dac_dma_supported(pci_dev, mask) (0)
32
33static inline void pcibios_add_platform_entries(struct pci_dev *dev)
34{
35}
36
37#endif /* CONFIG_COMEMPCI */ 27#endif /* CONFIG_COMEMPCI */
38 28
39#endif /* M68KNOMMU_PCI_H */ 29#endif /* M68KNOMMU_PCI_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index a59d54749eef..4fcc185cb2d1 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -121,20 +121,6 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
121 121
122#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ 122#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
123 123
124/* This is always fine. */
125#define pci_dac_dma_supported(pci_dev, mask) (1)
126
127extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
128 struct page *page, unsigned long offset, int direction);
129extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
130 dma64_addr_t dma_addr);
131extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
132 dma64_addr_t dma_addr);
133extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
134 dma64_addr_t dma_addr, size_t len, int direction);
135extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
136 dma64_addr_t dma_addr, size_t len, int direction);
137
138#ifdef CONFIG_PCI 124#ifdef CONFIG_PCI
139static inline void pci_dma_burst_advice(struct pci_dev *pdev, 125static inline void pci_dma_burst_advice(struct pci_dev *pdev,
140 enum pci_dma_burst_strategy *strat, 126 enum pci_dma_burst_strategy *strat,
@@ -181,10 +167,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
181/* implement the pci_ DMA API in terms of the generic device dma_ one */ 167/* implement the pci_ DMA API in terms of the generic device dma_ one */
182#include <asm-generic/pci-dma-compat.h> 168#include <asm-generic/pci-dma-compat.h>
183 169
184static inline void pcibios_add_platform_entries(struct pci_dev *dev)
185{
186}
187
188/* Do platform specific device initialization at pci_enable_device() time */ 170/* Do platform specific device initialization at pci_enable_device() time */
189extern int pcibios_plat_dev_init(struct pci_dev *dev); 171extern int pcibios_plat_dev_init(struct pci_dev *dev);
190 172
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
index 7b3be9ac0dda..61fbd57a8323 100644
--- a/include/asm-parisc/pci.h
+++ b/include/asm-parisc/pci.h
@@ -238,9 +238,6 @@ extern inline void pcibios_register_hba(struct pci_hba_data *x)
238#define PCIBIOS_MIN_IO 0x10 238#define PCIBIOS_MIN_IO 0x10
239#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */ 239#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
240 240
241/* Don't support DAC yet. */
242#define pci_dac_dma_supported(pci_dev, mask) (0)
243
244/* export the pci_ DMA API in terms of the dma_ one */ 241/* export the pci_ DMA API in terms of the dma_ one */
245#include <asm-generic/pci-dma-compat.h> 242#include <asm-generic/pci-dma-compat.h>
246 243
@@ -284,10 +281,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
284 return root; 281 return root;
285} 282}
286 283
287static inline void pcibios_add_platform_entries(struct pci_dev *dev)
288{
289}
290
291static inline void pcibios_penalize_isa_irq(int irq, int active) 284static inline void pcibios_penalize_isa_irq(int irq, int active)
292{ 285{
293 /* We don't need to penalize isa irq's */ 286 /* We don't need to penalize isa irq's */
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index a19a6f1a1cf1..f6bd804d9090 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -61,7 +61,6 @@ struct dma_mapping_ops {
61 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, 61 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
62 int nents, enum dma_data_direction direction); 62 int nents, enum dma_data_direction direction);
63 int (*dma_supported)(struct device *dev, u64 mask); 63 int (*dma_supported)(struct device *dev, u64 mask);
64 int (*dac_dma_supported)(struct device *dev, u64 mask);
65 int (*set_dma_mask)(struct device *dev, u64 dma_mask); 64 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
66}; 65};
67 66
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index ce0f13e8eb14..e16e7bc9ab5c 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -74,18 +74,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
74extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops); 74extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
75extern struct dma_mapping_ops *get_pci_dma_ops(void); 75extern struct dma_mapping_ops *get_pci_dma_ops(void);
76 76
77/* For DAC DMA, we currently don't support it by default, but
78 * we let 64-bit platforms override this.
79 */
80static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
81{
82 struct dma_mapping_ops *d = get_pci_dma_ops();
83
84 if (d && d->dac_dma_supported)
85 return d->dac_dma_supported(&hwdev->dev, mask);
86 return 0;
87}
88
89static inline void pci_dma_burst_advice(struct pci_dev *pdev, 77static inline void pci_dma_burst_advice(struct pci_dev *pdev,
90 enum pci_dma_burst_strategy *strat, 78 enum pci_dma_burst_strategy *strat,
91 unsigned long *strategy_parameter) 79 unsigned long *strategy_parameter)
@@ -124,12 +112,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
124} 112}
125#endif 113#endif
126 114
127/*
128 * At present there are very few 32-bit PPC machines that can have
129 * memory above the 4GB point, and we don't support that.
130 */
131#define pci_dac_dma_supported(pci_dev, mask) (0)
132
133/* Return the index of the PCI controller for device PDEV. */ 115/* Return the index of the PCI controller for device PDEV. */
134#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 116#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
135 117
@@ -243,8 +225,6 @@ extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
243 225
244extern int pci_read_irq_line(struct pci_dev *dev); 226extern int pci_read_irq_line(struct pci_dev *dev);
245 227
246extern void pcibios_add_platform_entries(struct pci_dev *dev);
247
248struct file; 228struct file;
249extern pgprot_t pci_phys_mem_access_prot(struct file *file, 229extern pgprot_t pci_phys_mem_access_prot(struct file *file,
250 unsigned long pfn, 230 unsigned long pfn,
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index 9d162028dab9..d2442cd72a59 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -102,12 +102,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
102} 102}
103#endif 103#endif
104 104
105/*
106 * At present there are very few 32-bit PPC machines that can have
107 * memory above the 4GB point, and we don't support that.
108 */
109#define pci_dac_dma_supported(pci_dev, mask) (0)
110
111/* Return the index of the PCI controller for device PDEV. */ 105/* Return the index of the PCI controller for device PDEV. */
112#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 106#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
113 107
@@ -145,8 +139,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
145 return root; 139 return root;
146} 140}
147 141
148extern void pcibios_add_platform_entries(struct pci_dev *dev);
149
150struct file; 142struct file;
151extern pgprot_t pci_phys_mem_access_prot(struct file *file, 143extern pgprot_t pci_phys_mem_access_prot(struct file *file,
152 unsigned long pfn, 144 unsigned long pfn,
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index b1f9a9e0231e..2757ce096ff7 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -110,11 +110,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
110#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 110#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
111#endif 111#endif
112 112
113/* Not supporting more than 32-bit PCI bus addresses now, but
114 * must satisfy references to this function. Change if needed.
115 */
116#define pci_dac_dma_supported(pci_dev, mask) (0)
117
118#ifdef CONFIG_PCI 113#ifdef CONFIG_PCI
119static inline void pci_dma_burst_advice(struct pci_dev *pdev, 114static inline void pci_dma_burst_advice(struct pci_dev *pdev,
120 enum pci_dma_burst_strategy *strat, 115 enum pci_dma_burst_strategy *strat,
@@ -134,10 +129,6 @@ int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
134int pciauto_assign_resources(int busno, struct pci_channel *hose); 129int pciauto_assign_resources(int busno, struct pci_channel *hose);
135#endif 130#endif
136 131
137static inline void pcibios_add_platform_entries(struct pci_dev *dev)
138{
139}
140
141#endif /* __KERNEL__ */ 132#endif /* __KERNEL__ */
142 133
143/* generic pci stuff */ 134/* generic pci stuff */
diff --git a/include/asm-sh64/pci.h b/include/asm-sh64/pci.h
index aa8043089bb6..57a67cf7a5c4 100644
--- a/include/asm-sh64/pci.h
+++ b/include/asm-sh64/pci.h
@@ -72,11 +72,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
72#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 72#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
73#endif 73#endif
74 74
75/* Not supporting more than 32-bit PCI bus addresses now, but
76 * must satisfy references to this function. Change if needed.
77 */
78#define pci_dac_dma_supported(pci_dev, mask) (0)
79
80/* These macros should be used after a pci_map_sg call has been done 75/* These macros should be used after a pci_map_sg call has been done
81 * to get bus addresses of each of the SG entries and their lengths. 76 * to get bus addresses of each of the SG entries and their lengths.
82 * You should only work with the number of sg entries pci_map_sg 77 * You should only work with the number of sg entries pci_map_sg
@@ -104,10 +99,6 @@ extern void pcibios_fixup_irqs(void);
104extern int pciauto_assign_resources(int busno, struct pci_channel *hose); 99extern int pciauto_assign_resources(int busno, struct pci_channel *hose);
105#endif 100#endif
106 101
107static inline void pcibios_add_platform_entries(struct pci_dev *dev)
108{
109}
110
111#endif /* __KERNEL__ */ 102#endif /* __KERNEL__ */
112 103
113/* generic pci stuff */ 104/* generic pci stuff */
diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h
index a750c688408b..b93b6c79e08f 100644
--- a/include/asm-sparc/pci.h
+++ b/include/asm-sparc/pci.h
@@ -142,8 +142,6 @@ static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
142 return 1; 142 return 1;
143} 143}
144 144
145#define pci_dac_dma_supported(dev, mask) (0)
146
147#ifdef CONFIG_PCI 145#ifdef CONFIG_PCI
148static inline void pci_dma_burst_advice(struct pci_dev *pdev, 146static inline void pci_dma_burst_advice(struct pci_dev *pdev,
149 enum pci_dma_burst_strategy *strat, 147 enum pci_dma_burst_strategy *strat,
@@ -154,10 +152,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
154} 152}
155#endif 153#endif
156 154
157static inline void pcibios_add_platform_entries(struct pci_dev *dev)
158{
159}
160
161#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) 155#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
162 156
163static inline int pci_dma_mapping_error(dma_addr_t dma_addr) 157static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index 47cea16e1bad..e11ac100f043 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -206,49 +206,6 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
206#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) 206#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
207#define PCI64_ADDR_BASE 0xfffc000000000000UL 207#define PCI64_ADDR_BASE 0xfffc000000000000UL
208 208
209/* Usage of the pci_dac_foo interfaces is only valid if this
210 * test passes.
211 */
212#define pci_dac_dma_supported(pci_dev, mask) \
213 ((((mask) & PCI64_REQUIRED_MASK) == PCI64_REQUIRED_MASK) ? 1 : 0)
214
215static inline dma64_addr_t
216pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
217{
218 return (PCI64_ADDR_BASE +
219 __pa(page_address(page)) + offset);
220}
221
222static inline struct page *
223pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
224{
225 unsigned long paddr = (dma_addr & PAGE_MASK) - PCI64_ADDR_BASE;
226
227 return virt_to_page(__va(paddr));
228}
229
230static inline unsigned long
231pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
232{
233 return (dma_addr & ~PAGE_MASK);
234}
235
236static inline void
237pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
238{
239 /* DAC cycle addressing does not make use of the
240 * PCI controller's streaming cache, so nothing to do.
241 */
242}
243
244static inline void
245pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
246{
247 /* DAC cycle addressing does not make use of the
248 * PCI controller's streaming cache, so nothing to do.
249 */
250}
251
252#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) 209#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
253 210
254static inline int pci_dma_mapping_error(dma_addr_t dma_addr) 211static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
@@ -303,10 +260,6 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
303 260
304extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); 261extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
305 262
306static inline void pcibios_add_platform_entries(struct pci_dev *dev)
307{
308}
309
310static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 263static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
311{ 264{
312 return PCI_IRQ_NONE; 265 return PCI_IRQ_NONE;
diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h
index 4581826e1cac..de2a7d0a81cc 100644
--- a/include/asm-v850/pci.h
+++ b/include/asm-v850/pci.h
@@ -116,8 +116,4 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
116extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); 116extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
117extern void pci_iounmap (struct pci_dev *dev, void __iomem *addr); 117extern void pci_iounmap (struct pci_dev *dev, void __iomem *addr);
118 118
119static inline void pcibios_add_platform_entries(struct pci_dev *dev)
120{
121}
122
123#endif /* __V850_PCI_H__ */ 119#endif /* __V850_PCI_H__ */
diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h
index 9f7f02cb0391..e85d261b79bf 100644
--- a/include/asm-v850/rte_cb.h
+++ b/include/asm-v850/rte_cb.h
@@ -64,7 +64,6 @@
64/* As we don't really support PCI DMA to cpu memory, and use bounce-buffers 64/* As we don't really support PCI DMA to cpu memory, and use bounce-buffers
65 instead, perversely enough, this becomes always true! */ 65 instead, perversely enough, this becomes always true! */
66# define pci_dma_supported(dev, mask) 1 66# define pci_dma_supported(dev, mask) 1
67# define pci_dac_dma_supported(dev, mask) 0
68# define pcibios_assign_all_busses() 1 67# define pcibios_assign_all_busses() 1
69 68
70#endif /* CONFIG_RTE_MB_A_PCI */ 69#endif /* CONFIG_RTE_MB_A_PCI */
diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h
index 49c5e9280598..bda94fd5176f 100644
--- a/include/asm-x86_64/pci.h
+++ b/include/asm-x86_64/pci.h
@@ -54,14 +54,6 @@ extern int iommu_setup(char *opt);
54 54
55#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU) 55#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
56 56
57/*
58 * x86-64 always supports DAC, but sometimes it is useful to force
59 * devices through the IOMMU to get automatic sg list merging.
60 * Optional right now.
61 */
62extern int iommu_sac_force;
63#define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force)
64
65#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ 57#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
66 dma_addr_t ADDR_NAME; 58 dma_addr_t ADDR_NAME;
67#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ 59#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
@@ -78,8 +70,6 @@ extern int iommu_sac_force;
78#else 70#else
79/* No IOMMU */ 71/* No IOMMU */
80 72
81#define pci_dac_dma_supported(pci_dev, mask) 1
82
83#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 73#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
84#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 74#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
85#define pci_unmap_addr(PTR, ADDR_NAME) (0) 75#define pci_unmap_addr(PTR, ADDR_NAME) (0)
@@ -91,36 +81,6 @@ extern int iommu_sac_force;
91 81
92#include <asm-generic/pci-dma-compat.h> 82#include <asm-generic/pci-dma-compat.h>
93 83
94static inline dma64_addr_t
95pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
96{
97 return ((dma64_addr_t) page_to_phys(page) +
98 (dma64_addr_t) offset);
99}
100
101static inline struct page *
102pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
103{
104 return virt_to_page(__va(dma_addr));
105}
106
107static inline unsigned long
108pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
109{
110 return (dma_addr & ~PAGE_MASK);
111}
112
113static inline void
114pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
115{
116}
117
118static inline void
119pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
120{
121 flush_write_buffers();
122}
123
124#ifdef CONFIG_PCI 84#ifdef CONFIG_PCI
125static inline void pci_dma_burst_advice(struct pci_dev *pdev, 85static inline void pci_dma_burst_advice(struct pci_dev *pdev,
126 enum pci_dma_burst_strategy *strat, 86 enum pci_dma_burst_strategy *strat,
@@ -135,10 +95,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
135extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 95extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
136 enum pci_mmap_state mmap_state, int write_combine); 96 enum pci_mmap_state mmap_state, int write_combine);
137 97
138static inline void pcibios_add_platform_entries(struct pci_dev *dev)
139{
140}
141
142#endif /* __KERNEL__ */ 98#endif /* __KERNEL__ */
143 99
144/* generic pci stuff */ 100/* generic pci stuff */
diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h
index 24eb7fc25da8..66410acf18b4 100644
--- a/include/asm-xtensa/pci.h
+++ b/include/asm-xtensa/pci.h
@@ -64,9 +64,6 @@ struct pci_dev;
64#define pci_ubnmap_len(PTR, LEN_NAME) (0) 64#define pci_ubnmap_len(PTR, LEN_NAME) (0)
65#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 65#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
66 66
67/* We cannot access memory above 4GB */
68#define pci_dac_dma_supported(pci_dev, mask) (0)
69
70/* Map a range of PCI memory or I/O space for a device into user space */ 67/* Map a range of PCI memory or I/O space for a device into user space */
71int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 68int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
72 enum pci_mmap_state mmap_state, int write_combine); 69 enum pci_mmap_state mmap_state, int write_combine);
@@ -74,10 +71,6 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
74/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ 71/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
75#define HAVE_PCI_MMAP 1 72#define HAVE_PCI_MMAP 1
76 73
77static inline void pcibios_add_platform_entries(struct pci_dev *dev)
78{
79}
80
81#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
82 75
83/* Implement the pci_ DMA API in terms of the generic device dma_ one */ 76/* Implement the pci_ DMA API in terms of the generic device dma_ one */
diff --git a/include/linux/aer.h b/include/linux/aer.h
index 402e178b38eb..509656286e53 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -13,11 +13,13 @@ extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
13extern int pci_find_aer_capability(struct pci_dev *dev); 13extern int pci_find_aer_capability(struct pci_dev *dev);
14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); 14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
16extern int pci_cleanup_aer_correct_error_status(struct pci_dev *dev);
16#else 17#else
17#define pci_enable_pcie_error_reporting(dev) do { } while (0) 18#define pci_enable_pcie_error_reporting(dev) (-EINVAL)
18#define pci_find_aer_capability(dev) do { } while (0) 19#define pci_find_aer_capability(dev) (0)
19#define pci_disable_pcie_error_reporting(dev) do { } while (0) 20#define pci_disable_pcie_error_reporting(dev) (-EINVAL)
20#define pci_cleanup_aer_uncorrect_error_status(dev) do { } while (0) 21#define pci_cleanup_aer_uncorrect_error_status(dev) (-EINVAL)
22#define pci_cleanup_aer_correct_error_status(dev) (-EINVAL)
21#endif 23#endif
22 24
23#endif //_AER_H_ 25#endif //_AER_H_
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 086a0e5a6318..a5602e26f4dd 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -111,7 +111,8 @@ enum pcie_reset_state {
111 111
112typedef unsigned short __bitwise pci_bus_flags_t; 112typedef unsigned short __bitwise pci_bus_flags_t;
113enum pci_bus_flags { 113enum pci_bus_flags {
114 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, 114 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
115 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
115}; 116};
116 117
117struct pci_cap_saved_state { 118struct pci_cap_saved_state {
@@ -138,6 +139,7 @@ struct pci_dev {
138 unsigned short subsystem_vendor; 139 unsigned short subsystem_vendor;
139 unsigned short subsystem_device; 140 unsigned short subsystem_device;
140 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 141 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
142 u8 revision; /* PCI revision, low byte of class word */
141 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 143 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
142 u8 rom_base_reg; /* which config register controls the ROM */ 144 u8 rom_base_reg; /* which config register controls the ROM */
143 u8 pin; /* which interrupt pin this device uses */ 145 u8 pin; /* which interrupt pin this device uses */
@@ -313,7 +315,7 @@ struct pci_dynids {
313 315
314/* ---------------------------------------------------------------- */ 316/* ---------------------------------------------------------------- */
315/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 317/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
316 * a set fof callbacks in struct pci_error_handlers, then that device driver 318 * a set of callbacks in struct pci_error_handlers, then that device driver
317 * will be notified of PCI bus errors, and will be driven to recovery 319 * will be notified of PCI bus errors, and will be driven to recovery
318 * when an error occurs. 320 * when an error occurs.
319 */ 321 */
@@ -370,7 +372,6 @@ struct pci_driver {
370 int (*suspend_late) (struct pci_dev *dev, pm_message_t state); 372 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
371 int (*resume_early) (struct pci_dev *dev); 373 int (*resume_early) (struct pci_dev *dev);
372 int (*resume) (struct pci_dev *dev); /* Device woken up */ 374 int (*resume) (struct pci_dev *dev); /* Device woken up */
373 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
374 void (*shutdown) (struct pci_dev *dev); 375 void (*shutdown) (struct pci_dev *dev);
375 376
376 struct pci_error_handlers *err_handler; 377 struct pci_error_handlers *err_handler;
@@ -475,7 +476,7 @@ extern void pci_sort_breadthfirst(void);
475/* Generic PCI functions exported to card drivers */ 476/* Generic PCI functions exported to card drivers */
476 477
477struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from); 478struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
478struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); 479struct pci_dev __deprecated *pci_find_slot (unsigned int bus, unsigned int devfn);
479int pci_find_capability (struct pci_dev *dev, int cap); 480int pci_find_capability (struct pci_dev *dev, int cap);
480int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap); 481int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
481int pci_find_ext_capability (struct pci_dev *dev, int cap); 482int pci_find_ext_capability (struct pci_dev *dev, int cap);
@@ -544,11 +545,16 @@ void pci_set_master(struct pci_dev *dev);
544int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); 545int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
545#define HAVE_PCI_SET_MWI 546#define HAVE_PCI_SET_MWI
546int __must_check pci_set_mwi(struct pci_dev *dev); 547int __must_check pci_set_mwi(struct pci_dev *dev);
548int pci_try_set_mwi(struct pci_dev *dev);
547void pci_clear_mwi(struct pci_dev *dev); 549void pci_clear_mwi(struct pci_dev *dev);
548void pci_intx(struct pci_dev *dev, int enable); 550void pci_intx(struct pci_dev *dev, int enable);
549void pci_msi_off(struct pci_dev *dev); 551void pci_msi_off(struct pci_dev *dev);
550int pci_set_dma_mask(struct pci_dev *dev, u64 mask); 552int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
551int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); 553int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
554int pcix_get_max_mmrbc(struct pci_dev *dev);
555int pcix_get_mmrbc(struct pci_dev *dev);
556int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
557int pcie_set_readrq(struct pci_dev *dev, int rq);
552void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 558void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
553int __must_check pci_assign_resource(struct pci_dev *dev, int i); 559int __must_check pci_assign_resource(struct pci_dev *dev, int i);
554int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i); 560int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
@@ -876,5 +882,7 @@ extern int pci_pci_problems;
876extern unsigned long pci_cardbus_io_size; 882extern unsigned long pci_cardbus_io_size;
877extern unsigned long pci_cardbus_mem_size; 883extern unsigned long pci_cardbus_mem_size;
878 884
885extern int pcibios_add_platform_entries(struct pci_dev *dev);
886
879#endif /* __KERNEL__ */ 887#endif /* __KERNEL__ */
880#endif /* LINUX_PCI_H */ 888#endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8300001e9078..9366182fffa7 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -133,6 +133,9 @@
133 133
134/* Vendors and devices. Sort key: vendor first, device next. */ 134/* Vendors and devices. Sort key: vendor first, device next. */
135 135
136#define PCI_VENDOR_ID_TTTECH 0x0357
137#define PCI_DEVICE_ID_TTTECH_MC322 0x000a
138
136#define PCI_VENDOR_ID_DYNALINK 0x0675 139#define PCI_VENDOR_ID_DYNALINK 0x0675
137#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 140#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702
138 141
@@ -733,7 +736,6 @@
733#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 736#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
734#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 737#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
735 738
736
737#define PCI_VENDOR_ID_BUSLOGIC 0x104B 739#define PCI_VENDOR_ID_BUSLOGIC 0x104B
738#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 740#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
739#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 741#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040
@@ -779,7 +781,6 @@
779 781
780#define PCI_VENDOR_ID_SONY 0x104d 782#define PCI_VENDOR_ID_SONY 0x104d
781 783
782
783/* Winbond have two vendor IDs! See 0x10ad as well */ 784/* Winbond have two vendor IDs! See 0x10ad as well */
784#define PCI_VENDOR_ID_WINBOND2 0x1050 785#define PCI_VENDOR_ID_WINBOND2 0x1050
785#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a 786#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a
@@ -817,7 +818,6 @@
817#define PCI_DEVICE_ID_PROMISE_20276 0x5275 818#define PCI_DEVICE_ID_PROMISE_20276 0x5275
818#define PCI_DEVICE_ID_PROMISE_20277 0x7275 819#define PCI_DEVICE_ID_PROMISE_20277 0x7275
819 820
820
821#define PCI_VENDOR_ID_UMC 0x1060 821#define PCI_VENDOR_ID_UMC 0x1060
822#define PCI_DEVICE_ID_UMC_UM8673F 0x0101 822#define PCI_DEVICE_ID_UMC_UM8673F 0x0101
823#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a 823#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
@@ -833,7 +833,6 @@
833#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 833#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56
834#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 834#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166
835 835
836
837#define PCI_VENDOR_ID_APPLE 0x106b 836#define PCI_VENDOR_ID_APPLE 0x106b
838#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 837#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001
839#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e 838#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e
@@ -869,7 +868,6 @@
869#define PCI_DEVICE_ID_YAMAHA_744 0x0010 868#define PCI_DEVICE_ID_YAMAHA_744 0x0010
870#define PCI_DEVICE_ID_YAMAHA_754 0x0012 869#define PCI_DEVICE_ID_YAMAHA_754 0x0012
871 870
872
873#define PCI_VENDOR_ID_QLOGIC 0x1077 871#define PCI_VENDOR_ID_QLOGIC 0x1077
874#define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016 872#define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016
875#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 873#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
@@ -900,12 +898,9 @@
900#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 898#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103
901#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 899#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104
902 900
903
904
905#define PCI_VENDOR_ID_CONTAQ 0x1080 901#define PCI_VENDOR_ID_CONTAQ 0x1080
906#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 902#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693
907 903
908
909#define PCI_VENDOR_ID_OLICOM 0x108d 904#define PCI_VENDOR_ID_OLICOM 0x108d
910#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 905#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012
911#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 906#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013
@@ -937,23 +932,19 @@
937#define PCI_DEVICE_ID_SII_3112 0x3112 932#define PCI_DEVICE_ID_SII_3112 0x3112
938#define PCI_DEVICE_ID_SII_1210SA 0x0240 933#define PCI_DEVICE_ID_SII_1210SA 0x0240
939 934
940
941#define PCI_VENDOR_ID_BROOKTREE 0x109e 935#define PCI_VENDOR_ID_BROOKTREE 0x109e
942#define PCI_DEVICE_ID_BROOKTREE_878 0x0878 936#define PCI_DEVICE_ID_BROOKTREE_878 0x0878
943#define PCI_DEVICE_ID_BROOKTREE_879 0x0879 937#define PCI_DEVICE_ID_BROOKTREE_879 0x0879
944 938
945
946#define PCI_VENDOR_ID_SGI 0x10a9 939#define PCI_VENDOR_ID_SGI 0x10a9
947#define PCI_DEVICE_ID_SGI_IOC3 0x0003 940#define PCI_DEVICE_ID_SGI_IOC3 0x0003
941#define PCI_DEVICE_ID_SGI_LITHIUM 0x1002
948#define PCI_DEVICE_ID_SGI_IOC4 0x100a 942#define PCI_DEVICE_ID_SGI_IOC4 0x100a
949#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002
950
951 943
952#define PCI_VENDOR_ID_WINBOND 0x10ad 944#define PCI_VENDOR_ID_WINBOND 0x10ad
953#define PCI_DEVICE_ID_WINBOND_82C105 0x0105 945#define PCI_DEVICE_ID_WINBOND_82C105 0x0105
954#define PCI_DEVICE_ID_WINBOND_83C553 0x0565 946#define PCI_DEVICE_ID_WINBOND_83C553 0x0565
955 947
956
957#define PCI_VENDOR_ID_PLX 0x10b5 948#define PCI_VENDOR_ID_PLX 0x10b5
958#define PCI_DEVICE_ID_PLX_R685 0x1030 949#define PCI_DEVICE_ID_PLX_R685 0x1030
959#define PCI_DEVICE_ID_PLX_ROMULUS 0x106a 950#define PCI_DEVICE_ID_PLX_ROMULUS 0x106a
@@ -987,7 +978,6 @@
987#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 978#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909
988#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a 979#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a
989 980
990
991#define PCI_VENDOR_ID_AL 0x10b9 981#define PCI_VENDOR_ID_AL 0x10b9
992#define PCI_DEVICE_ID_AL_M1533 0x1533 982#define PCI_DEVICE_ID_AL_M1533 0x1533
993#define PCI_DEVICE_ID_AL_M1535 0x1535 983#define PCI_DEVICE_ID_AL_M1535 0x1535
@@ -1010,18 +1000,14 @@
1010#define PCI_DEVICE_ID_AL_M5451 0x5451 1000#define PCI_DEVICE_ID_AL_M5451 0x5451
1011#define PCI_DEVICE_ID_AL_M7101 0x7101 1001#define PCI_DEVICE_ID_AL_M7101 0x7101
1012 1002
1013
1014
1015#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 1003#define PCI_VENDOR_ID_NEOMAGIC 0x10c8
1016#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 1004#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
1017#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 1005#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
1018#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 1006#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
1019 1007
1020
1021#define PCI_VENDOR_ID_TCONRAD 0x10da 1008#define PCI_VENDOR_ID_TCONRAD 0x10da
1022#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 1009#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508
1023 1010
1024
1025#define PCI_VENDOR_ID_NVIDIA 0x10de 1011#define PCI_VENDOR_ID_NVIDIA 0x10de
1026#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 1012#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
1027#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 1013#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028
@@ -1242,9 +1228,6 @@
1242#define PCI_DEVICE_ID_IMS_TT128 0x9128 1228#define PCI_DEVICE_ID_IMS_TT128 0x9128
1243#define PCI_DEVICE_ID_IMS_TT3D 0x9135 1229#define PCI_DEVICE_ID_IMS_TT3D 0x9135
1244 1230
1245
1246
1247
1248#define PCI_VENDOR_ID_INTERG 0x10ea 1231#define PCI_VENDOR_ID_INTERG 0x10ea
1249#define PCI_DEVICE_ID_INTERG_1682 0x1682 1232#define PCI_DEVICE_ID_INTERG_1682 0x1682
1250#define PCI_DEVICE_ID_INTERG_2000 0x2000 1233#define PCI_DEVICE_ID_INTERG_2000 0x2000
@@ -1263,7 +1246,6 @@
1263#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 1246#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
1264#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 1247#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
1265 1248
1266
1267#define PCI_VENDOR_ID_INIT 0x1101 1249#define PCI_VENDOR_ID_INIT 0x1101
1268 1250
1269#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */ 1251#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
@@ -1358,7 +1340,6 @@
1358#define PCI_VENDOR_ID_SIEMENS 0x110A 1340#define PCI_VENDOR_ID_SIEMENS 0x110A
1359#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 1341#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102
1360 1342
1361
1362#define PCI_VENDOR_ID_VORTEX 0x1119 1343#define PCI_VENDOR_ID_VORTEX 0x1119
1363#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 1344#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000
1364#define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 1345#define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001
@@ -1384,8 +1365,8 @@
1384#define PCI_VENDOR_ID_EF 0x111a 1365#define PCI_VENDOR_ID_EF 0x111a
1385#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 1366#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
1386#define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 1367#define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002
1387#define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003 1368#define PCI_DEVICE_ID_EF_ATM_LANAI2 0x0003
1388#define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005 1369#define PCI_DEVICE_ID_EF_ATM_LANAIHB 0x0005
1389 1370
1390#define PCI_VENDOR_ID_IDT 0x111d 1371#define PCI_VENDOR_ID_IDT 0x111d
1391#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 1372#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
@@ -1393,7 +1374,6 @@
1393#define PCI_VENDOR_ID_FORE 0x1127 1374#define PCI_VENDOR_ID_FORE 0x1127
1394#define PCI_DEVICE_ID_FORE_PCA200E 0x0300 1375#define PCI_DEVICE_ID_FORE_PCA200E 0x0300
1395 1376
1396
1397#define PCI_VENDOR_ID_PHILIPS 0x1131 1377#define PCI_VENDOR_ID_PHILIPS 0x1131
1398#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 1378#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146
1399#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 1379#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730
@@ -1412,7 +1392,6 @@
1412#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 1392#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
1413 1393
1414 1394
1415
1416#define PCI_VENDOR_ID_SYSKONNECT 0x1148 1395#define PCI_VENDOR_ID_SYSKONNECT 0x1148
1417#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 1396#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
1418#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 1397#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300
@@ -1420,7 +1399,6 @@
1420#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 1399#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400
1421#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 1400#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500
1422 1401
1423
1424#define PCI_VENDOR_ID_DIGI 0x114f 1402#define PCI_VENDOR_ID_DIGI 0x114f
1425#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 1403#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070
1426#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 1404#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071
@@ -1431,12 +1409,10 @@
1431#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA 1409#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA
1432#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB 1410#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB
1433 1411
1434
1435#define PCI_VENDOR_ID_XIRCOM 0x115d 1412#define PCI_VENDOR_ID_XIRCOM 0x115d
1436#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 1413#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101
1437#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 1414#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103
1438 1415
1439
1440#define PCI_VENDOR_ID_SERVERWORKS 0x1166 1416#define PCI_VENDOR_ID_SERVERWORKS 0x1166
1441#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 1417#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008
1442#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 1418#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
@@ -1505,7 +1481,6 @@
1505#define PCI_DEVICE_ID_ZEITNET_1221 0x0001 1481#define PCI_DEVICE_ID_ZEITNET_1221 0x0001
1506#define PCI_DEVICE_ID_ZEITNET_1225 0x0002 1482#define PCI_DEVICE_ID_ZEITNET_1225 0x0002
1507 1483
1508
1509#define PCI_VENDOR_ID_FUJITSU_ME 0x119e 1484#define PCI_VENDOR_ID_FUJITSU_ME 0x119e
1510#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 1485#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001
1511#define PCI_DEVICE_ID_FUJITSU_FS50 0x0003 1486#define PCI_DEVICE_ID_FUJITSU_FS50 0x0003
@@ -1523,28 +1498,23 @@
1523#define PCI_DEVICE_ID_V3_V960 0x0001 1498#define PCI_DEVICE_ID_V3_V960 0x0001
1524#define PCI_DEVICE_ID_V3_V351 0x0002 1499#define PCI_DEVICE_ID_V3_V351 0x0002
1525 1500
1526
1527#define PCI_VENDOR_ID_ATT 0x11c1 1501#define PCI_VENDOR_ID_ATT 0x11c1
1528#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 1502#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
1529 1503
1530
1531#define PCI_VENDOR_ID_SPECIALIX 0x11cb 1504#define PCI_VENDOR_ID_SPECIALIX 0x11cb
1532#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 1505#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
1533#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 1506#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
1534#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 1507#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
1535 1508
1536
1537#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 1509#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
1538#define PCI_DEVICE_ID_AD1889JS 0x1889 1510#define PCI_DEVICE_ID_AD1889JS 0x1889
1539 1511
1540
1541#define PCI_DEVICE_ID_SEGA_BBA 0x1234 1512#define PCI_DEVICE_ID_SEGA_BBA 0x1234
1542 1513
1543#define PCI_VENDOR_ID_ZORAN 0x11de 1514#define PCI_VENDOR_ID_ZORAN 0x11de
1544#define PCI_DEVICE_ID_ZORAN_36057 0x6057 1515#define PCI_DEVICE_ID_ZORAN_36057 0x6057
1545#define PCI_DEVICE_ID_ZORAN_36120 0x6120 1516#define PCI_DEVICE_ID_ZORAN_36120 0x6120
1546 1517
1547
1548#define PCI_VENDOR_ID_COMPEX 0x11f6 1518#define PCI_VENDOR_ID_COMPEX 0x11f6
1549#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 1519#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
1550 1520
@@ -1603,8 +1573,6 @@
1603#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 1573#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005
1604#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 1574#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
1605 1575
1606
1607
1608#define PCI_VENDOR_ID_AVM 0x1244 1576#define PCI_VENDOR_ID_AVM 0x1244
1609#define PCI_DEVICE_ID_AVM_B1 0x0700 1577#define PCI_DEVICE_ID_AVM_B1 0x0700
1610#define PCI_DEVICE_ID_AVM_C4 0x0800 1578#define PCI_DEVICE_ID_AVM_C4 0x0800
@@ -1613,7 +1581,6 @@
1613#define PCI_DEVICE_ID_AVM_C2 0x1100 1581#define PCI_DEVICE_ID_AVM_C2 0x1100
1614#define PCI_DEVICE_ID_AVM_T1 0x1200 1582#define PCI_DEVICE_ID_AVM_T1 0x1200
1615 1583
1616
1617#define PCI_VENDOR_ID_STALLION 0x124d 1584#define PCI_VENDOR_ID_STALLION 0x124d
1618 1585
1619/* Allied Telesyn */ 1586/* Allied Telesyn */
@@ -1636,7 +1603,6 @@
1636#define PCI_VENDOR_ID_SATSAGEM 0x1267 1603#define PCI_VENDOR_ID_SATSAGEM 0x1267
1637#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 1604#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016
1638 1605
1639
1640#define PCI_VENDOR_ID_ENSONIQ 0x1274 1606#define PCI_VENDOR_ID_ENSONIQ 0x1274
1641#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 1607#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
1642#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 1608#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
@@ -1659,7 +1625,6 @@
1659 1625
1660#define PCI_VENDOR_ID_ALTEON 0x12ae 1626#define PCI_VENDOR_ID_ALTEON 0x12ae
1661 1627
1662
1663#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 1628#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4
1664#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 1629#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001
1665#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002 1630#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002
@@ -1690,7 +1655,6 @@
1690#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331 1655#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331
1691#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332 1656#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332
1692 1657
1693
1694#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 1658#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
1695#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 1659#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
1696 1660
@@ -1800,7 +1764,6 @@
1800#define PCI_DEVICE_ID_LMC_SSI 0x0005 1764#define PCI_DEVICE_ID_LMC_SSI 0x0005
1801#define PCI_DEVICE_ID_LMC_T1 0x0006 1765#define PCI_DEVICE_ID_LMC_T1 0x0006
1802 1766
1803
1804#define PCI_VENDOR_ID_NETGEAR 0x1385 1767#define PCI_VENDOR_ID_NETGEAR 0x1385
1805#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a 1768#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
1806 1769
@@ -1903,6 +1866,8 @@
1903#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 1866#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521
1904#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523 1867#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523
1905 1868
1869#define PCI_VENDOR_ID_CHELSIO 0x1425
1870
1906#define PCI_VENDOR_ID_SAMSUNG 0x144d 1871#define PCI_VENDOR_ID_SAMSUNG 0x144d
1907 1872
1908#define PCI_VENDOR_ID_MYRICOM 0x14c1 1873#define PCI_VENDOR_ID_MYRICOM 0x14c1
@@ -2011,13 +1976,10 @@
2011#define PCI_DEVICE_ID_ENE_720 0x1421 1976#define PCI_DEVICE_ID_ENE_720 0x1421
2012#define PCI_DEVICE_ID_ENE_722 0x1422 1977#define PCI_DEVICE_ID_ENE_722 0x1422
2013 1978
2014#define PCI_VENDOR_ID_CHELSIO 0x1425
2015
2016#define PCI_SUBVENDOR_ID_PERLE 0x155f 1979#define PCI_SUBVENDOR_ID_PERLE 0x155f
2017#define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001 1980#define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001
2018#define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010 1981#define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010
2019 1982
2020
2021#define PCI_VENDOR_ID_SYBA 0x1592 1983#define PCI_VENDOR_ID_SYBA 0x1592
2022#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 1984#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
2023#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 1985#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783
@@ -2036,8 +1998,10 @@
2036#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 1998#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
2037#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 1999#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
2038 2000
2039#define PCI_VENDOR_ID_PDC 0x15e9 2001#define PCI_VENDOR_ID_QUICKNET 0x15e2
2002#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500
2040 2003
2004#define PCI_VENDOR_ID_PDC 0x15e9
2041 2005
2042#define PCI_VENDOR_ID_FARSITE 0x1619 2006#define PCI_VENDOR_ID_FARSITE 0x1619
2043#define PCI_DEVICE_ID_FARSITE_T2P 0x0400 2007#define PCI_DEVICE_ID_FARSITE_T2P 0x0400
@@ -2054,6 +2018,8 @@
2054#define PCI_DEVICE_ID_BCM1250_PCI 0x0001 2018#define PCI_DEVICE_ID_BCM1250_PCI 0x0001
2055#define PCI_DEVICE_ID_BCM1250_HT 0x0002 2019#define PCI_DEVICE_ID_BCM1250_HT 0x0002
2056 2020
2021#define PCI_VENDOR_ID_ATHEROS 0x168c
2022
2057#define PCI_VENDOR_ID_NETCELL 0x169c 2023#define PCI_VENDOR_ID_NETCELL 0x169c
2058#define PCI_DEVICE_ID_REVOLUTION 0x0044 2024#define PCI_DEVICE_ID_REVOLUTION 0x0044
2059 2025
@@ -2092,7 +2058,6 @@
2092#define PCI_DEVICE_ID_HERC_WIN 0x5732 2058#define PCI_DEVICE_ID_HERC_WIN 0x5732
2093#define PCI_DEVICE_ID_HERC_UNI 0x5832 2059#define PCI_DEVICE_ID_HERC_UNI 0x5832
2094 2060
2095
2096#define PCI_VENDOR_ID_SITECOM 0x182d 2061#define PCI_VENDOR_ID_SITECOM 0x182d
2097#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 2062#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069
2098 2063
@@ -2128,12 +2093,9 @@
2128#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 2093#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007
2129#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 2094#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009
2130 2095
2131
2132#define PCI_VENDOR_ID_AKS 0x416c 2096#define PCI_VENDOR_ID_AKS 0x416c
2133#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 2097#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100
2134 2098
2135
2136
2137#define PCI_VENDOR_ID_S3 0x5333 2099#define PCI_VENDOR_ID_S3 0x5333
2138#define PCI_DEVICE_ID_S3_TRIO 0x8811 2100#define PCI_DEVICE_ID_S3_TRIO 0x8811
2139#define PCI_DEVICE_ID_S3_868 0x8880 2101#define PCI_DEVICE_ID_S3_868 0x8880
@@ -2145,7 +2107,6 @@
2145#define PCI_VENDOR_ID_DUNORD 0x5544 2107#define PCI_VENDOR_ID_DUNORD 0x5544
2146#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 2108#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
2147 2109
2148
2149#define PCI_VENDOR_ID_DCI 0x6666 2110#define PCI_VENDOR_ID_DCI 0x6666
2150#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 2111#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001
2151#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 2112#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
@@ -2389,7 +2350,6 @@
2389#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500 2350#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500
2390#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 2351#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
2391 2352
2392
2393#define PCI_VENDOR_ID_HOLTEK 0x9412 2353#define PCI_VENDOR_ID_HOLTEK 0x9412
2394#define PCI_DEVICE_ID_HOLTEK_6565 0x6565 2354#define PCI_DEVICE_ID_HOLTEK_6565 0x6565
2395 2355
@@ -2405,6 +2365,8 @@
2405#define PCI_DEVICE_ID_NETMOS_9845 0x9845 2365#define PCI_DEVICE_ID_NETMOS_9845 0x9845
2406#define PCI_DEVICE_ID_NETMOS_9855 0x9855 2366#define PCI_DEVICE_ID_NETMOS_9855 0x9855
2407 2367
2368#define PCI_VENDOR_ID_3COM_2 0xa727
2369
2408#define PCI_SUBVENDOR_ID_EXSYS 0xd84d 2370#define PCI_SUBVENDOR_ID_EXSYS 0xd84d
2409#define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 2371#define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014
2410#define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 2372#define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055
@@ -2413,13 +2375,7 @@
2413#define PCI_DEVICE_ID_TIGERJET_300 0x0001 2375#define PCI_DEVICE_ID_TIGERJET_300 0x0001
2414#define PCI_DEVICE_ID_TIGERJET_100 0x0002 2376#define PCI_DEVICE_ID_TIGERJET_100 0x0002
2415 2377
2416#define PCI_VENDOR_ID_TTTECH 0x0357
2417#define PCI_DEVICE_ID_TTTECH_MC322 0x000A
2418
2419#define PCI_VENDOR_ID_XILINX_RME 0xea60 2378#define PCI_VENDOR_ID_XILINX_RME 0xea60
2420#define PCI_DEVICE_ID_RME_DIGI32 0x9896 2379#define PCI_DEVICE_ID_RME_DIGI32 0x9896
2421#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 2380#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897
2422#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 2381#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898
2423
2424#define PCI_VENDOR_ID_QUICKNET 0x15E2
2425#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 16:37:23 -0500