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-rw-r--r--include/asm-arm/arch-omap/common.h4
-rw-r--r--include/asm-arm/arch-omap/control.h2
-rw-r--r--include/asm-arm/arch-omap/mmc.h24
-rw-r--r--include/asm-arm/arch-sa1100/irqs.h2
-rw-r--r--include/asm-arm/hardware/locomo.h19
-rw-r--r--include/asm-m68k/bug.h4
-rw-r--r--include/asm-m68k/io.h44
-rw-r--r--include/asm-m68k/setup.h2
-rw-r--r--include/asm-m68k/uaccess.h6
9 files changed, 62 insertions, 45 deletions
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h
index 224e009e5296..36a3b62d4d8d 100644
--- a/include/asm-arm/arch-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
47} 47}
48#endif 48#endif
49 49
50void omap2_set_globals_242x(void);
51void omap2_set_globals_243x(void);
52void omap2_set_globals_343x(void);
53
50#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 54#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h
index 9944bb5d5330..59c0686f8be7 100644
--- a/include/asm-arm/arch-omap/control.h
+++ b/include/asm-arm/arch-omap/control.h
@@ -80,7 +80,7 @@
80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) 80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064)
81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) 81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c)
82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) 82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070)
83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074 83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074)
84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) 84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080)
85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) 85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084)
86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) 86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088)
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h
index c9588f49eb52..7cfc5f258560 100644
--- a/include/asm-arm/arch-omap/mmc.h
+++ b/include/asm-arm/arch-omap/mmc.h
@@ -15,21 +15,16 @@
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/mmc/host.h> 16#include <linux/mmc/host.h>
17 17
18#include <asm/arch/board.h>
19
18#define OMAP_MMC_MAX_SLOTS 2 20#define OMAP_MMC_MAX_SLOTS 2
19 21
20struct omap_mmc_platform_data { 22struct omap_mmc_platform_data {
21 struct omap_mmc_conf conf; 23 struct omap_mmc_conf conf;
22 24
23 unsigned enabled:1;
24 /* number of slots on board */ 25 /* number of slots on board */
25 unsigned nr_slots:2; 26 unsigned nr_slots:2;
26 /* nomux means "standard" muxing is wrong on this board, and that 27
27 * board-specific code handled it before common init logic.
28 */
29 unsigned nomux:1;
30 /* 4 wire signaling is optional, and is only used for SD/SDIO and
31 * MMCv4 */
32 unsigned wire4:1;
33 /* set if your board has components or wiring that limits the 28 /* set if your board has components or wiring that limits the
34 * maximum frequency on the MMC bus */ 29 * maximum frequency on the MMC bus */
35 unsigned int max_freq; 30 unsigned int max_freq;
@@ -40,6 +35,11 @@ struct omap_mmc_platform_data {
40 * not supported */ 35 * not supported */
41 int (* init)(struct device *dev); 36 int (* init)(struct device *dev);
42 void (* cleanup)(struct device *dev); 37 void (* cleanup)(struct device *dev);
38 void (* shutdown)(struct device *dev);
39
40 /* To handle board related suspend/resume functionality for MMC */
41 int (*suspend)(struct device *dev, int slot);
42 int (*resume)(struct device *dev, int slot);
43 43
44 struct omap_mmc_slot_data { 44 struct omap_mmc_slot_data {
45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); 45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
@@ -56,13 +56,19 @@ struct omap_mmc_platform_data {
56 56
57 const char *name; 57 const char *name;
58 u32 ocr_mask; 58 u32 ocr_mask;
59
60 /* Card detection IRQs */
61 int card_detect_irq;
62 int (* card_detect)(int irq);
63
64 unsigned int ban_openended:1;
65
59 } slots[OMAP_MMC_MAX_SLOTS]; 66 } slots[OMAP_MMC_MAX_SLOTS];
60}; 67};
61 68
62extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); 69extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
63 70
64/* called from board-specific card detection service routine */ 71/* called from board-specific card detection service routine */
65extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected);
66extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); 72extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
67 73
68#endif 74#endif
diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h
index d7940683efb1..7bf80484bb77 100644
--- a/include/asm-arm/arch-sa1100/irqs.h
+++ b/include/asm-arm/arch-sa1100/irqs.h
@@ -141,7 +141,7 @@
141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) 141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) 142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) 143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
144#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) 144#define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20)
145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) 145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
146 146
147/* 147/*
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index adab77780ed3..fb0645de6f31 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -58,6 +58,11 @@
58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */ 58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59#define LOCOMO_SPICT 0x04 /* SPI mode control */ 59#define LOCOMO_SPICT 0x04 /* SPI mode control */
60#define LOCOMO_SPIST 0x08 /* SPI status */ 60#define LOCOMO_SPIST 0x08 /* SPI status */
61#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
62#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */
63#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
64#define LOCOMO_SPI_RFR (1) /* read buffer bit */
65
61#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */ 66#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
62#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */ 67#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
63#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */ 68#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
@@ -66,16 +71,12 @@
66#define LOCOMO_SPIRD 0x24 /* SPI receive data read */ 71#define LOCOMO_SPIRD 0x24 /* SPI receive data read */
67#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */ 72#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */
68#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */ 73#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */
69#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
70#define LOCOMO_SPI_OVRN (1 << 2) /* Over Run bit */
71#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
72#define LOCOMO_SPI_RFR (1) /* read buffer bit */
73 74
74/* GPIO */ 75/* GPIO */
75#define LOCOMO_GPD 0x90 /* GPIO direction */ 76#define LOCOMO_GPD 0x90 /* GPIO direction */
76#define LOCOMO_GPE 0x94 /* GPIO input enable */ 77#define LOCOMO_GPE 0x94 /* GPIO input enable */
77#define LOCOMO_GPL 0x98 /* GPIO level */ 78#define LOCOMO_GPL 0x98 /* GPIO level */
78#define LOCOMO_GPO 0x9c /* GPIO out data setteing */ 79#define LOCOMO_GPO 0x9c /* GPIO out data setting */
79#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */ 80#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */
80#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */ 81#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */
81#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */ 82#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */
@@ -96,6 +97,9 @@
96#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10) 97#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10)
97#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11) 98#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11)
98#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12) 99#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12)
100#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13)
101#define LOCOMO_GPIO_WRITE_PROT LOCOMO_GPIO(14)
102#define LOCOMO_GPIO_CARD_POWER LOCOMO_GPIO(15)
99 103
100/* Start the definitions of the devices. Each device has an initial 104/* Start the definitions of the devices. Each device has an initial
101 * base address and a series of offsets from that base address. */ 105 * base address and a series of offsets from that base address. */
@@ -122,7 +126,7 @@
122/* Audio controller */ 126/* Audio controller */
123#define LOCOMO_AUDIO 0x54 127#define LOCOMO_AUDIO 0x54
124#define LOCOMO_ACC 0x00 /* Audio clock */ 128#define LOCOMO_ACC 0x00 /* Audio clock */
125#define LOCOMO_PAIF 0x7C /* PCM audio interface */ 129#define LOCOMO_PAIF 0xD0 /* PCM audio interface */
126/* Audio clock */ 130/* Audio clock */
127#define LOCOMO_ACC_XON 0x80 131#define LOCOMO_ACC_XON 0x80
128#define LOCOMO_ACC_XEN 0x40 132#define LOCOMO_ACC_XEN 0x40
@@ -162,7 +166,7 @@ extern struct bus_type locomo_bus_type;
162#define LOCOMO_DEVID_AUDIO 3 166#define LOCOMO_DEVID_AUDIO 3
163#define LOCOMO_DEVID_LED 4 167#define LOCOMO_DEVID_LED 4
164#define LOCOMO_DEVID_UART 5 168#define LOCOMO_DEVID_UART 5
165#define LOCOMO_DEVID_SPI 6 169#define LOCOMO_DEVID_SPI 6
166 170
167struct locomo_dev { 171struct locomo_dev {
168 struct device dev; 172 struct device dev;
@@ -204,7 +208,6 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits);
204int locomo_gpio_read_output(struct device *dev, unsigned int bits); 208int locomo_gpio_read_output(struct device *dev, unsigned int bits);
205void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set); 209void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
206 210
207
208/* M62332 control function */ 211/* M62332 control function */
209void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); 212void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
210 213
diff --git a/include/asm-m68k/bug.h b/include/asm-m68k/bug.h
index 7b60776cc966..e5b528deb8a8 100644
--- a/include/asm-m68k/bug.h
+++ b/include/asm-m68k/bug.h
@@ -7,7 +7,7 @@
7#ifndef CONFIG_SUN3 7#ifndef CONFIG_SUN3
8#define BUG() do { \ 8#define BUG() do { \
9 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ 9 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
10 asm volatile("illegal"); \ 10 __builtin_trap(); \
11} while (0) 11} while (0)
12#else 12#else
13#define BUG() do { \ 13#define BUG() do { \
@@ -17,7 +17,7 @@
17#endif 17#endif
18#else 18#else
19#define BUG() do { \ 19#define BUG() do { \
20 asm volatile("illegal"); \ 20 __builtin_trap(); \
21} while (0) 21} while (0)
22#endif 22#endif
23 23
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index baf4f9b8acfc..657187f0c7c2 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -91,20 +91,20 @@ extern unsigned long gg2_isa_base;
91#undef MULTI_ISA 91#undef MULTI_ISA
92#endif 92#endif
93 93
94#define Q40_ISA (1) 94#define ISA_TYPE_Q40 (1)
95#define GG2_ISA (2) 95#define ISA_TYPE_GG2 (2)
96#define AG_ISA (3) 96#define ISA_TYPE_AG (3)
97 97
98#if defined(CONFIG_Q40) && !defined(MULTI_ISA) 98#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
99#define ISA_TYPE Q40_ISA 99#define ISA_TYPE ISA_TYPE_Q40
100#define ISA_SEX 0 100#define ISA_SEX 0
101#endif 101#endif
102#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA) 102#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
103#define ISA_TYPE AG_ISA 103#define ISA_TYPE ISA_TYPE_AG
104#define ISA_SEX 1 104#define ISA_SEX 1
105#endif 105#endif
106#if defined(CONFIG_GG2) && !defined(MULTI_ISA) 106#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
107#define ISA_TYPE GG2_ISA 107#define ISA_TYPE ISA_TYPE_GG2
108#define ISA_SEX 0 108#define ISA_SEX 0
109#endif 109#endif
110 110
@@ -126,13 +126,13 @@ static inline u8 __iomem *isa_itb(unsigned long addr)
126 switch(ISA_TYPE) 126 switch(ISA_TYPE)
127 { 127 {
128#ifdef CONFIG_Q40 128#ifdef CONFIG_Q40
129 case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr); 129 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
130#endif 130#endif
131#ifdef CONFIG_GG2 131#ifdef CONFIG_GG2
132 case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr); 132 case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_IO_B(addr);
133#endif 133#endif
134#ifdef CONFIG_AMIGA_PCMCIA 134#ifdef CONFIG_AMIGA_PCMCIA
135 case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr); 135 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
136#endif 136#endif
137 default: return NULL; /* avoid warnings, just in case */ 137 default: return NULL; /* avoid warnings, just in case */
138 } 138 }
@@ -142,13 +142,13 @@ static inline u16 __iomem *isa_itw(unsigned long addr)
142 switch(ISA_TYPE) 142 switch(ISA_TYPE)
143 { 143 {
144#ifdef CONFIG_Q40 144#ifdef CONFIG_Q40
145 case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr); 145 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
146#endif 146#endif
147#ifdef CONFIG_GG2 147#ifdef CONFIG_GG2
148 case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr); 148 case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_IO_W(addr);
149#endif 149#endif
150#ifdef CONFIG_AMIGA_PCMCIA 150#ifdef CONFIG_AMIGA_PCMCIA
151 case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr); 151 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
152#endif 152#endif
153 default: return NULL; /* avoid warnings, just in case */ 153 default: return NULL; /* avoid warnings, just in case */
154 } 154 }
@@ -158,7 +158,7 @@ static inline u32 __iomem *isa_itl(unsigned long addr)
158 switch(ISA_TYPE) 158 switch(ISA_TYPE)
159 { 159 {
160#ifdef CONFIG_AMIGA_PCMCIA 160#ifdef CONFIG_AMIGA_PCMCIA
161 case AG_ISA: return (u32 __iomem *)AG_ISA_IO_W(addr); 161 case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
162#endif 162#endif
163 default: return 0; /* avoid warnings, just in case */ 163 default: return 0; /* avoid warnings, just in case */
164 } 164 }
@@ -168,13 +168,13 @@ static inline u8 __iomem *isa_mtb(unsigned long addr)
168 switch(ISA_TYPE) 168 switch(ISA_TYPE)
169 { 169 {
170#ifdef CONFIG_Q40 170#ifdef CONFIG_Q40
171 case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr); 171 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
172#endif 172#endif
173#ifdef CONFIG_GG2 173#ifdef CONFIG_GG2
174 case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr); 174 case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
175#endif 175#endif
176#ifdef CONFIG_AMIGA_PCMCIA 176#ifdef CONFIG_AMIGA_PCMCIA
177 case AG_ISA: return (u8 __iomem *)addr; 177 case ISA_TYPE_AG: return (u8 __iomem *)addr;
178#endif 178#endif
179 default: return NULL; /* avoid warnings, just in case */ 179 default: return NULL; /* avoid warnings, just in case */
180 } 180 }
@@ -184,13 +184,13 @@ static inline u16 __iomem *isa_mtw(unsigned long addr)
184 switch(ISA_TYPE) 184 switch(ISA_TYPE)
185 { 185 {
186#ifdef CONFIG_Q40 186#ifdef CONFIG_Q40
187 case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr); 187 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
188#endif 188#endif
189#ifdef CONFIG_GG2 189#ifdef CONFIG_GG2
190 case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr); 190 case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
191#endif 191#endif
192#ifdef CONFIG_AMIGA_PCMCIA 192#ifdef CONFIG_AMIGA_PCMCIA
193 case AG_ISA: return (u16 __iomem *)addr; 193 case ISA_TYPE_AG: return (u16 __iomem *)addr;
194#endif 194#endif
195 default: return NULL; /* avoid warnings, just in case */ 195 default: return NULL; /* avoid warnings, just in case */
196 } 196 }
@@ -218,13 +218,13 @@ static inline void isa_delay(void)
218 switch(ISA_TYPE) 218 switch(ISA_TYPE)
219 { 219 {
220#ifdef CONFIG_Q40 220#ifdef CONFIG_Q40
221 case Q40_ISA: isa_outb(0,0x80); break; 221 case ISA_TYPE_Q40: isa_outb(0,0x80); break;
222#endif 222#endif
223#ifdef CONFIG_GG2 223#ifdef CONFIG_GG2
224 case GG2_ISA: break; 224 case ISA_TYPE_GG2: break;
225#endif 225#endif
226#ifdef CONFIG_AMIGA_PCMCIA 226#ifdef CONFIG_AMIGA_PCMCIA
227 case AG_ISA: break; 227 case ISA_TYPE_AG: break;
228#endif 228#endif
229 default: break; /* avoid warnings */ 229 default: break; /* avoid warnings */
230 } 230 }
diff --git a/include/asm-m68k/setup.h b/include/asm-m68k/setup.h
index 2a8853cd6554..4dfb3952b375 100644
--- a/include/asm-m68k/setup.h
+++ b/include/asm-m68k/setup.h
@@ -248,7 +248,7 @@ extern unsigned long m68k_machtype;
248#ifndef __ASSEMBLY__ 248#ifndef __ASSEMBLY__
249extern unsigned long m68k_cputype; 249extern unsigned long m68k_cputype;
250extern unsigned long m68k_fputype; 250extern unsigned long m68k_fputype;
251extern unsigned long m68k_mmutype; /* Not really used yet */ 251extern unsigned long m68k_mmutype;
252#ifdef CONFIG_VME 252#ifdef CONFIG_VME
253extern unsigned long vme_brdtype; 253extern unsigned long vme_brdtype;
254#endif 254#endif
diff --git a/include/asm-m68k/uaccess.h b/include/asm-m68k/uaccess.h
index 5c1264cf0c65..7107f3fbdbb6 100644
--- a/include/asm-m68k/uaccess.h
+++ b/include/asm-m68k/uaccess.h
@@ -14,7 +14,11 @@
14#define VERIFY_WRITE 1 14#define VERIFY_WRITE 1
15 15
16/* We let the MMU do all checking */ 16/* We let the MMU do all checking */
17#define access_ok(type,addr,size) 1 17static inline int access_ok(int type, const void __user *addr,
18 unsigned long size)
19{
20 return 1;
21}
18 22
19/* 23/*
20 * The exception table consists of pairs of addresses: the first is the 24 * The exception table consists of pairs of addresses: the first is the