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-rw-r--r--include/video/s1d13xxxfb.h16
1 files changed, 10 insertions, 6 deletions
diff --git a/include/video/s1d13xxxfb.h b/include/video/s1d13xxxfb.h
index fe41b8407946..c3b2a2aa7140 100644
--- a/include/video/s1d13xxxfb.h
+++ b/include/video/s1d13xxxfb.h
@@ -14,13 +14,16 @@
14#define S1D13XXXFB_H 14#define S1D13XXXFB_H
15 15
16#define S1D_PALETTE_SIZE 256 16#define S1D_PALETTE_SIZE 256
17#define S1D13506_CHIP_REV 4 /* expected chip revision number for s1d13506 */ 17#define S1D_FBID "S1D13xxx"
18#define S1D13806_CHIP_REV 7 /* expected chip revision number for s1d13806 */ 18#define S1D_DEVICENAME "s1d13xxxfb"
19#define S1D_FBID "S1D13806" 19
20#define S1D_DEVICENAME "s1d13806fb" 20/* S1DREG_REV_CODE register = prod_id (6 bits) + revision (2 bits) */
21#define S1D13505_PROD_ID 0x3 /* 000011 */
22#define S1D13506_PROD_ID 0x4 /* 000100 */
23#define S1D13806_PROD_ID 0x7 /* 000111 */
21 24
22/* register definitions (tested on s1d13896) */ 25/* register definitions (tested on s1d13896) */
23#define S1DREG_REV_CODE 0x0000 /* Revision Code Register */ 26#define S1DREG_REV_CODE 0x0000 /* Prod + Rev Code Register */
24#define S1DREG_MISC 0x0001 /* Miscellaneous Register */ 27#define S1DREG_MISC 0x0001 /* Miscellaneous Register */
25#define S1DREG_GPIO_CNF0 0x0004 /* General IO Pins Configuration Register 0 */ 28#define S1DREG_GPIO_CNF0 0x0004 /* General IO Pins Configuration Register 0 */
26#define S1DREG_GPIO_CNF1 0x0005 /* General IO Pins Configuration Register 1 */ 29#define S1DREG_GPIO_CNF1 0x0005 /* General IO Pins Configuration Register 1 */
@@ -141,10 +144,11 @@ struct s1d13xxxfb_regval {
141 u8 value; 144 u8 value;
142}; 145};
143 146
144
145struct s1d13xxxfb_par { 147struct s1d13xxxfb_par {
146 void __iomem *regs; 148 void __iomem *regs;
147 unsigned char display; 149 unsigned char display;
150 unsigned char prod_id;
151 unsigned char revision;
148 152
149 unsigned int pseudo_palette[16]; 153 unsigned int pseudo_palette[16];
150#ifdef CONFIG_PM 154#ifdef CONFIG_PM