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-rw-r--r--include/video/samsung_fimd.h205
1 files changed, 100 insertions, 105 deletions
diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h
index e7554486a2b7..b0393209679b 100644
--- a/include/video/samsung_fimd.h
+++ b/include/video/samsung_fimd.h
@@ -8,12 +8,8 @@
8 * S3C Platform - new-style fimd and framebuffer register definitions 8 * S3C Platform - new-style fimd and framebuffer register definitions
9 * 9 *
10 * This is the register set for the fimd and new style framebuffer interface 10 * This is the register set for the fimd and new style framebuffer interface
11 * found from the S3C2443 onwards into the S3C2416, S3C2450 and the 11 * found from the S3C2443 onwards into the S3C2416, S3C2450, the
12 * S3C64XX series such as the S3C6400 and S3C6410. 12 * S3C64XX series such as the S3C6400 and S3C6410, and EXYNOS series.
13 *
14 * The file does not contain the cpu specific items which are based on
15 * whichever architecture is selected, it only contains the core of the
16 * register set. See <mach/regs-fb.h> to get the specifics.
17 * 13 *
18 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
@@ -22,10 +18,10 @@
22 18
23/* VIDCON0 */ 19/* VIDCON0 */
24 20
25#define VIDCON0 (0x00) 21#define VIDCON0 0x00
26#define VIDCON0_INTERLACE (1 << 29) 22#define VIDCON0_INTERLACE (1 << 29)
27#define VIDCON0_VIDOUT_MASK (0x7 << 26) 23#define VIDCON0_VIDOUT_MASK (0x7 << 26)
28#define VIDCON0_VIDOUT_SHIFT (26) 24#define VIDCON0_VIDOUT_SHIFT 26
29#define VIDCON0_VIDOUT_RGB (0x0 << 26) 25#define VIDCON0_VIDOUT_RGB (0x0 << 26)
30#define VIDCON0_VIDOUT_TV (0x1 << 26) 26#define VIDCON0_VIDOUT_TV (0x1 << 26)
31#define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26) 27#define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26)
@@ -35,7 +31,7 @@
35#define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26) 31#define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26)
36 32
37#define VIDCON0_L1_DATA_MASK (0x7 << 23) 33#define VIDCON0_L1_DATA_MASK (0x7 << 23)
38#define VIDCON0_L1_DATA_SHIFT (23) 34#define VIDCON0_L1_DATA_SHIFT 23
39#define VIDCON0_L1_DATA_16BPP (0x0 << 23) 35#define VIDCON0_L1_DATA_16BPP (0x0 << 23)
40#define VIDCON0_L1_DATA_18BPP16 (0x1 << 23) 36#define VIDCON0_L1_DATA_18BPP16 (0x1 << 23)
41#define VIDCON0_L1_DATA_18BPP9 (0x2 << 23) 37#define VIDCON0_L1_DATA_18BPP9 (0x2 << 23)
@@ -44,7 +40,7 @@
44#define VIDCON0_L1_DATA_16BPP8 (0x5 << 23) 40#define VIDCON0_L1_DATA_16BPP8 (0x5 << 23)
45 41
46#define VIDCON0_L0_DATA_MASK (0x7 << 20) 42#define VIDCON0_L0_DATA_MASK (0x7 << 20)
47#define VIDCON0_L0_DATA_SHIFT (20) 43#define VIDCON0_L0_DATA_SHIFT 20
48#define VIDCON0_L0_DATA_16BPP (0x0 << 20) 44#define VIDCON0_L0_DATA_16BPP (0x0 << 20)
49#define VIDCON0_L0_DATA_18BPP16 (0x1 << 20) 45#define VIDCON0_L0_DATA_18BPP16 (0x1 << 20)
50#define VIDCON0_L0_DATA_18BPP9 (0x2 << 20) 46#define VIDCON0_L0_DATA_18BPP9 (0x2 << 20)
@@ -53,7 +49,7 @@
53#define VIDCON0_L0_DATA_16BPP8 (0x5 << 20) 49#define VIDCON0_L0_DATA_16BPP8 (0x5 << 20)
54 50
55#define VIDCON0_PNRMODE_MASK (0x3 << 17) 51#define VIDCON0_PNRMODE_MASK (0x3 << 17)
56#define VIDCON0_PNRMODE_SHIFT (17) 52#define VIDCON0_PNRMODE_SHIFT 17
57#define VIDCON0_PNRMODE_RGB (0x0 << 17) 53#define VIDCON0_PNRMODE_RGB (0x0 << 17)
58#define VIDCON0_PNRMODE_BGR (0x1 << 17) 54#define VIDCON0_PNRMODE_BGR (0x1 << 17)
59#define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17) 55#define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17)
@@ -61,14 +57,14 @@
61 57
62#define VIDCON0_CLKVALUP (1 << 16) 58#define VIDCON0_CLKVALUP (1 << 16)
63#define VIDCON0_CLKVAL_F_MASK (0xff << 6) 59#define VIDCON0_CLKVAL_F_MASK (0xff << 6)
64#define VIDCON0_CLKVAL_F_SHIFT (6) 60#define VIDCON0_CLKVAL_F_SHIFT 6
65#define VIDCON0_CLKVAL_F_LIMIT (0xff) 61#define VIDCON0_CLKVAL_F_LIMIT 0xff
66#define VIDCON0_CLKVAL_F(_x) ((_x) << 6) 62#define VIDCON0_CLKVAL_F(_x) ((_x) << 6)
67#define VIDCON0_VLCKFREE (1 << 5) 63#define VIDCON0_VLCKFREE (1 << 5)
68#define VIDCON0_CLKDIR (1 << 4) 64#define VIDCON0_CLKDIR (1 << 4)
69 65
70#define VIDCON0_CLKSEL_MASK (0x3 << 2) 66#define VIDCON0_CLKSEL_MASK (0x3 << 2)
71#define VIDCON0_CLKSEL_SHIFT (2) 67#define VIDCON0_CLKSEL_SHIFT 2
72#define VIDCON0_CLKSEL_HCLK (0x0 << 2) 68#define VIDCON0_CLKSEL_HCLK (0x0 << 2)
73#define VIDCON0_CLKSEL_LCD (0x1 << 2) 69#define VIDCON0_CLKSEL_LCD (0x1 << 2)
74#define VIDCON0_CLKSEL_27M (0x3 << 2) 70#define VIDCON0_CLKSEL_27M (0x3 << 2)
@@ -76,17 +72,17 @@
76#define VIDCON0_ENVID (1 << 1) 72#define VIDCON0_ENVID (1 << 1)
77#define VIDCON0_ENVID_F (1 << 0) 73#define VIDCON0_ENVID_F (1 << 0)
78 74
79#define VIDCON1 (0x04) 75#define VIDCON1 0x04
80#define VIDCON1_LINECNT_MASK (0x7ff << 16) 76#define VIDCON1_LINECNT_MASK (0x7ff << 16)
81#define VIDCON1_LINECNT_SHIFT (16) 77#define VIDCON1_LINECNT_SHIFT 16
82#define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff) 78#define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff)
83#define VIDCON1_FSTATUS_EVEN (1 << 15) 79#define VIDCON1_FSTATUS_EVEN (1 << 15)
84#define VIDCON1_VSTATUS_MASK (0x3 << 13) 80#define VIDCON1_VSTATUS_MASK (0x3 << 13)
85#define VIDCON1_VSTATUS_SHIFT (13) 81#define VIDCON1_VSTATUS_SHIFT 13
86#define VIDCON1_VSTATUS_VSYNC (0x0 << 13) 82#define VIDCON1_VSTATUS_VSYNC (0x0 << 13)
87#define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13) 83#define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13)
88#define VIDCON1_VSTATUS_ACTIVE (0x2 << 13) 84#define VIDCON1_VSTATUS_ACTIVE (0x2 << 13)
89#define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13) 85#define VIDCON1_VSTATUS_FRONTPORCH (0x3 << 13)
90#define VIDCON1_VCLK_MASK (0x3 << 9) 86#define VIDCON1_VCLK_MASK (0x3 << 9)
91#define VIDCON1_VCLK_HOLD (0x0 << 9) 87#define VIDCON1_VCLK_HOLD (0x0 << 9)
92#define VIDCON1_VCLK_RUN (0x1 << 9) 88#define VIDCON1_VCLK_RUN (0x1 << 9)
@@ -98,12 +94,12 @@
98 94
99/* VIDCON2 */ 95/* VIDCON2 */
100 96
101#define VIDCON2 (0x08) 97#define VIDCON2 0x08
102#define VIDCON2_EN601 (1 << 23) 98#define VIDCON2_EN601 (1 << 23)
103#define VIDCON2_TVFMTSEL_SW (1 << 14) 99#define VIDCON2_TVFMTSEL_SW (1 << 14)
104 100
105#define VIDCON2_TVFMTSEL1_MASK (0x3 << 12) 101#define VIDCON2_TVFMTSEL1_MASK (0x3 << 12)
106#define VIDCON2_TVFMTSEL1_SHIFT (12) 102#define VIDCON2_TVFMTSEL1_SHIFT 12
107#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12) 103#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
108#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12) 104#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
109#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12) 105#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
@@ -115,74 +111,75 @@
115 * Might not be present in the S3C6410 documentation, 111 * Might not be present in the S3C6410 documentation,
116 * but tests prove it's there almost for sure; shouldn't hurt in any case. 112 * but tests prove it's there almost for sure; shouldn't hurt in any case.
117 */ 113 */
118#define PRTCON (0x0c) 114#define PRTCON 0x0c
119#define PRTCON_PROTECT (1 << 11) 115#define PRTCON_PROTECT (1 << 11)
120 116
121/* VIDTCON0 */ 117/* VIDTCON0 */
122 118
123#define VIDTCON0 (0x10) 119#define VIDTCON0 0x10
124#define VIDTCON0_VBPDE_MASK (0xff << 24) 120#define VIDTCON0_VBPDE_MASK (0xff << 24)
125#define VIDTCON0_VBPDE_SHIFT (24) 121#define VIDTCON0_VBPDE_SHIFT 24
126#define VIDTCON0_VBPDE_LIMIT (0xff) 122#define VIDTCON0_VBPDE_LIMIT 0xff
127#define VIDTCON0_VBPDE(_x) ((_x) << 24) 123#define VIDTCON0_VBPDE(_x) ((_x) << 24)
128 124
129#define VIDTCON0_VBPD_MASK (0xff << 16) 125#define VIDTCON0_VBPD_MASK (0xff << 16)
130#define VIDTCON0_VBPD_SHIFT (16) 126#define VIDTCON0_VBPD_SHIFT 16
131#define VIDTCON0_VBPD_LIMIT (0xff) 127#define VIDTCON0_VBPD_LIMIT 0xff
132#define VIDTCON0_VBPD(_x) ((_x) << 16) 128#define VIDTCON0_VBPD(_x) ((_x) << 16)
133 129
134#define VIDTCON0_VFPD_MASK (0xff << 8) 130#define VIDTCON0_VFPD_MASK (0xff << 8)
135#define VIDTCON0_VFPD_SHIFT (8) 131#define VIDTCON0_VFPD_SHIFT 8
136#define VIDTCON0_VFPD_LIMIT (0xff) 132#define VIDTCON0_VFPD_LIMIT 0xff
137#define VIDTCON0_VFPD(_x) ((_x) << 8) 133#define VIDTCON0_VFPD(_x) ((_x) << 8)
138 134
139#define VIDTCON0_VSPW_MASK (0xff << 0) 135#define VIDTCON0_VSPW_MASK (0xff << 0)
140#define VIDTCON0_VSPW_SHIFT (0) 136#define VIDTCON0_VSPW_SHIFT 0
141#define VIDTCON0_VSPW_LIMIT (0xff) 137#define VIDTCON0_VSPW_LIMIT 0xff
142#define VIDTCON0_VSPW(_x) ((_x) << 0) 138#define VIDTCON0_VSPW(_x) ((_x) << 0)
143 139
144/* VIDTCON1 */ 140/* VIDTCON1 */
145 141
146#define VIDTCON1 (0x14) 142#define VIDTCON1 0x14
147#define VIDTCON1_VFPDE_MASK (0xff << 24) 143#define VIDTCON1_VFPDE_MASK (0xff << 24)
148#define VIDTCON1_VFPDE_SHIFT (24) 144#define VIDTCON1_VFPDE_SHIFT 24
149#define VIDTCON1_VFPDE_LIMIT (0xff) 145#define VIDTCON1_VFPDE_LIMIT 0xff
150#define VIDTCON1_VFPDE(_x) ((_x) << 24) 146#define VIDTCON1_VFPDE(_x) ((_x) << 24)
151 147
152#define VIDTCON1_HBPD_MASK (0xff << 16) 148#define VIDTCON1_HBPD_MASK (0xff << 16)
153#define VIDTCON1_HBPD_SHIFT (16) 149#define VIDTCON1_HBPD_SHIFT 16
154#define VIDTCON1_HBPD_LIMIT (0xff) 150#define VIDTCON1_HBPD_LIMIT 0xff
155#define VIDTCON1_HBPD(_x) ((_x) << 16) 151#define VIDTCON1_HBPD(_x) ((_x) << 16)
156 152
157#define VIDTCON1_HFPD_MASK (0xff << 8) 153#define VIDTCON1_HFPD_MASK (0xff << 8)
158#define VIDTCON1_HFPD_SHIFT (8) 154#define VIDTCON1_HFPD_SHIFT 8
159#define VIDTCON1_HFPD_LIMIT (0xff) 155#define VIDTCON1_HFPD_LIMIT 0xff
160#define VIDTCON1_HFPD(_x) ((_x) << 8) 156#define VIDTCON1_HFPD(_x) ((_x) << 8)
161 157
162#define VIDTCON1_HSPW_MASK (0xff << 0) 158#define VIDTCON1_HSPW_MASK (0xff << 0)
163#define VIDTCON1_HSPW_SHIFT (0) 159#define VIDTCON1_HSPW_SHIFT 0
164#define VIDTCON1_HSPW_LIMIT (0xff) 160#define VIDTCON1_HSPW_LIMIT 0xff
165#define VIDTCON1_HSPW(_x) ((_x) << 0) 161#define VIDTCON1_HSPW(_x) ((_x) << 0)
166 162
167#define VIDTCON2 (0x18) 163#define VIDTCON2 0x18
168#define VIDTCON2 (0x18)
169#define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23) 164#define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23)
170#define VIDTCON2_LINEVAL_MASK (0x7ff << 11) 165#define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
171#define VIDTCON2_LINEVAL_SHIFT (11) 166#define VIDTCON2_LINEVAL_SHIFT 11
172#define VIDTCON2_LINEVAL_LIMIT (0x7ff) 167#define VIDTCON2_LINEVAL_LIMIT 0x7ff
173#define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11) 168#define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11)
174 169
175#define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22) 170#define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22)
176#define VIDTCON2_HOZVAL_MASK (0x7ff << 0) 171#define VIDTCON2_HOZVAL_MASK (0x7ff << 0)
177#define VIDTCON2_HOZVAL_SHIFT (0) 172#define VIDTCON2_HOZVAL_SHIFT 0
178#define VIDTCON2_HOZVAL_LIMIT (0x7ff) 173#define VIDTCON2_HOZVAL_LIMIT 0x7ff
179#define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0) 174#define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0)
180 175
181/* WINCONx */ 176/* WINCONx */
182 177
183#define WINCON(_win) (0x20 + ((_win) * 4)) 178#define WINCON(_win) (0x20 + ((_win) * 4))
179#define WINCONx_CSCCON_EQ601 (0x0 << 28)
180#define WINCONx_CSCCON_EQ709 (0x1 << 28)
184#define WINCONx_CSCWIDTH_MASK (0x3 << 26) 181#define WINCONx_CSCWIDTH_MASK (0x3 << 26)
185#define WINCONx_CSCWIDTH_SHIFT (26) 182#define WINCONx_CSCWIDTH_SHIFT 26
186#define WINCONx_CSCWIDTH_WIDE (0x0 << 26) 183#define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
187#define WINCONx_CSCWIDTH_NARROW (0x3 << 26) 184#define WINCONx_CSCWIDTH_NARROW (0x3 << 26)
188#define WINCONx_ENLOCAL (1 << 22) 185#define WINCONx_ENLOCAL (1 << 22)
@@ -195,14 +192,14 @@
195#define WINCONx_WSWP (1 << 15) 192#define WINCONx_WSWP (1 << 15)
196#define WINCONx_YCbCr (1 << 13) 193#define WINCONx_YCbCr (1 << 13)
197#define WINCONx_BURSTLEN_MASK (0x3 << 9) 194#define WINCONx_BURSTLEN_MASK (0x3 << 9)
198#define WINCONx_BURSTLEN_SHIFT (9) 195#define WINCONx_BURSTLEN_SHIFT 9
199#define WINCONx_BURSTLEN_16WORD (0x0 << 9) 196#define WINCONx_BURSTLEN_16WORD (0x0 << 9)
200#define WINCONx_BURSTLEN_8WORD (0x1 << 9) 197#define WINCONx_BURSTLEN_8WORD (0x1 << 9)
201#define WINCONx_BURSTLEN_4WORD (0x2 << 9) 198#define WINCONx_BURSTLEN_4WORD (0x2 << 9)
202#define WINCONx_ENWIN (1 << 0) 199#define WINCONx_ENWIN (1 << 0)
203 200
204#define WINCON0_BPPMODE_MASK (0xf << 2) 201#define WINCON0_BPPMODE_MASK (0xf << 2)
205#define WINCON0_BPPMODE_SHIFT (2) 202#define WINCON0_BPPMODE_SHIFT 2
206#define WINCON0_BPPMODE_1BPP (0x0 << 2) 203#define WINCON0_BPPMODE_1BPP (0x0 << 2)
207#define WINCON0_BPPMODE_2BPP (0x1 << 2) 204#define WINCON0_BPPMODE_2BPP (0x1 << 2)
208#define WINCON0_BPPMODE_4BPP (0x2 << 2) 205#define WINCON0_BPPMODE_4BPP (0x2 << 2)
@@ -215,7 +212,7 @@
215#define WINCON1_LOCALSEL_CAMIF (1 << 23) 212#define WINCON1_LOCALSEL_CAMIF (1 << 23)
216#define WINCON1_BLD_PIX (1 << 6) 213#define WINCON1_BLD_PIX (1 << 6)
217#define WINCON1_BPPMODE_MASK (0xf << 2) 214#define WINCON1_BPPMODE_MASK (0xf << 2)
218#define WINCON1_BPPMODE_SHIFT (2) 215#define WINCON1_BPPMODE_SHIFT 2
219#define WINCON1_BPPMODE_1BPP (0x0 << 2) 216#define WINCON1_BPPMODE_1BPP (0x0 << 2)
220#define WINCON1_BPPMODE_2BPP (0x1 << 2) 217#define WINCON1_BPPMODE_2BPP (0x1 << 2)
221#define WINCON1_BPPMODE_4BPP (0x2 << 2) 218#define WINCON1_BPPMODE_4BPP (0x2 << 2)
@@ -234,7 +231,7 @@
234#define WINCON1_ALPHA_SEL (1 << 1) 231#define WINCON1_ALPHA_SEL (1 << 1)
235 232
236/* S5PV210 */ 233/* S5PV210 */
237#define SHADOWCON (0x34) 234#define SHADOWCON 0x34
238#define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win))) 235#define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win)))
239/* DMA channels (all windows) */ 236/* DMA channels (all windows) */
240#define SHADOWCON_CHx_ENABLE(_win) (1 << (_win)) 237#define SHADOWCON_CHx_ENABLE(_win) (1 << (_win))
@@ -243,52 +240,52 @@
243 240
244/* VIDOSDx */ 241/* VIDOSDx */
245 242
246#define VIDOSD_BASE (0x40) 243#define VIDOSD_BASE 0x40
247#define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 244#define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
248#define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) 245#define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11)
249#define VIDOSDxA_TOPLEFT_X_SHIFT (11) 246#define VIDOSDxA_TOPLEFT_X_SHIFT 11
250#define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff) 247#define VIDOSDxA_TOPLEFT_X_LIMIT 0x7ff
251#define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11) 248#define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11)
252 249
253#define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 250#define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
254#define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0) 251#define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0)
255#define VIDOSDxA_TOPLEFT_Y_SHIFT (0) 252#define VIDOSDxA_TOPLEFT_Y_SHIFT 0
256#define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff) 253#define VIDOSDxA_TOPLEFT_Y_LIMIT 0x7ff
257#define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0) 254#define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0)
258 255
259#define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 256#define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
260#define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11) 257#define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11)
261#define VIDOSDxB_BOTRIGHT_X_SHIFT (11) 258#define VIDOSDxB_BOTRIGHT_X_SHIFT 11
262#define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff) 259#define VIDOSDxB_BOTRIGHT_X_LIMIT 0x7ff
263#define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11) 260#define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11)
264 261
265#define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 262#define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
266#define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0) 263#define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0)
267#define VIDOSDxB_BOTRIGHT_Y_SHIFT (0) 264#define VIDOSDxB_BOTRIGHT_Y_SHIFT 0
268#define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff) 265#define VIDOSDxB_BOTRIGHT_Y_LIMIT 0x7ff
269#define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0) 266#define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0)
270 267
271/* For VIDOSD[1..4]C */ 268/* For VIDOSD[1..4]C */
272#define VIDISD14C_ALPHA0_R(_x) ((_x) << 20) 269#define VIDISD14C_ALPHA0_R(_x) ((_x) << 20)
273#define VIDISD14C_ALPHA0_G_MASK (0xf << 16) 270#define VIDISD14C_ALPHA0_G_MASK (0xf << 16)
274#define VIDISD14C_ALPHA0_G_SHIFT (16) 271#define VIDISD14C_ALPHA0_G_SHIFT 16
275#define VIDISD14C_ALPHA0_G_LIMIT (0xf) 272#define VIDISD14C_ALPHA0_G_LIMIT 0xf
276#define VIDISD14C_ALPHA0_G(_x) ((_x) << 16) 273#define VIDISD14C_ALPHA0_G(_x) ((_x) << 16)
277#define VIDISD14C_ALPHA0_B_MASK (0xf << 12) 274#define VIDISD14C_ALPHA0_B_MASK (0xf << 12)
278#define VIDISD14C_ALPHA0_B_SHIFT (12) 275#define VIDISD14C_ALPHA0_B_SHIFT 12
279#define VIDISD14C_ALPHA0_B_LIMIT (0xf) 276#define VIDISD14C_ALPHA0_B_LIMIT 0xf
280#define VIDISD14C_ALPHA0_B(_x) ((_x) << 12) 277#define VIDISD14C_ALPHA0_B(_x) ((_x) << 12)
281#define VIDISD14C_ALPHA1_R_MASK (0xf << 8) 278#define VIDISD14C_ALPHA1_R_MASK (0xf << 8)
282#define VIDISD14C_ALPHA1_R_SHIFT (8) 279#define VIDISD14C_ALPHA1_R_SHIFT 8
283#define VIDISD14C_ALPHA1_R_LIMIT (0xf) 280#define VIDISD14C_ALPHA1_R_LIMIT 0xf
284#define VIDISD14C_ALPHA1_R(_x) ((_x) << 8) 281#define VIDISD14C_ALPHA1_R(_x) ((_x) << 8)
285#define VIDISD14C_ALPHA1_G_MASK (0xf << 4) 282#define VIDISD14C_ALPHA1_G_MASK (0xf << 4)
286#define VIDISD14C_ALPHA1_G_SHIFT (4) 283#define VIDISD14C_ALPHA1_G_SHIFT 4
287#define VIDISD14C_ALPHA1_G_LIMIT (0xf) 284#define VIDISD14C_ALPHA1_G_LIMIT 0xf
288#define VIDISD14C_ALPHA1_G(_x) ((_x) << 4) 285#define VIDISD14C_ALPHA1_G(_x) ((_x) << 4)
289#define VIDISD14C_ALPHA1_B_MASK (0xf << 0) 286#define VIDISD14C_ALPHA1_B_MASK (0xf << 0)
290#define VIDISD14C_ALPHA1_B_SHIFT (0) 287#define VIDISD14C_ALPHA1_B_SHIFT 0
291#define VIDISD14C_ALPHA1_B_LIMIT (0xf) 288#define VIDISD14C_ALPHA1_B_LIMIT 0xf
292#define VIDISD14C_ALPHA1_B(_x) ((_x) << 0) 289#define VIDISD14C_ALPHA1_B(_x) ((_x) << 0)
293 290
294/* Video buffer addresses */ 291/* Video buffer addresses */
@@ -300,22 +297,22 @@
300 297
301#define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27) 298#define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27)
302#define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13) 299#define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13)
303#define VIDW_BUF_SIZE_OFFSET_SHIFT (13) 300#define VIDW_BUF_SIZE_OFFSET_SHIFT 13
304#define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff) 301#define VIDW_BUF_SIZE_OFFSET_LIMIT 0x1fff
305#define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13) 302#define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13)
306 303
307#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26) 304#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26)
308#define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0) 305#define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0)
309#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0) 306#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT 0
310#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff) 307#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT 0x1fff
311#define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0) 308#define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0)
312 309
313/* Interrupt controls and status */ 310/* Interrupt controls and status */
314 311
315#define VIDINTCON0 (0x130) 312#define VIDINTCON0 0x130
316#define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20) 313#define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20)
317#define VIDINTCON0_FIFOINTERVAL_SHIFT (20) 314#define VIDINTCON0_FIFOINTERVAL_SHIFT 20
318#define VIDINTCON0_FIFOINTERVAL_LIMIT (0x3f) 315#define VIDINTCON0_FIFOINTERVAL_LIMIT 0x3f
319#define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20) 316#define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20)
320 317
321#define VIDINTCON0_INT_SYSMAINCON (1 << 19) 318#define VIDINTCON0_INT_SYSMAINCON (1 << 19)
@@ -323,7 +320,7 @@
323#define VIDINTCON0_INT_I80IFDONE (1 << 17) 320#define VIDINTCON0_INT_I80IFDONE (1 << 17)
324 321
325#define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15) 322#define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15)
326#define VIDINTCON0_FRAMESEL0_SHIFT (15) 323#define VIDINTCON0_FRAMESEL0_SHIFT 15
327#define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15) 324#define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15)
328#define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15) 325#define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15)
329#define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) 326#define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15)
@@ -338,7 +335,7 @@
338 335
339#define VIDINTCON0_INT_FRAME (1 << 12) 336#define VIDINTCON0_INT_FRAME (1 << 12)
340#define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) 337#define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5)
341#define VIDINTCON0_FIFIOSEL_SHIFT (5) 338#define VIDINTCON0_FIFIOSEL_SHIFT 5
342#define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5) 339#define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5)
343#define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5) 340#define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5)
344#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) 341#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5)
@@ -346,7 +343,7 @@
346#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) 343#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5)
347 344
348#define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2) 345#define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2)
349#define VIDINTCON0_FIFOLEVEL_SHIFT (2) 346#define VIDINTCON0_FIFOLEVEL_SHIFT 2
350#define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2) 347#define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2)
351#define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2) 348#define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2)
352#define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2) 349#define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2)
@@ -354,46 +351,46 @@
354#define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2) 351#define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2)
355 352
356#define VIDINTCON0_INT_FIFO_MASK (0x3 << 0) 353#define VIDINTCON0_INT_FIFO_MASK (0x3 << 0)
357#define VIDINTCON0_INT_FIFO_SHIFT (0) 354#define VIDINTCON0_INT_FIFO_SHIFT 0
358#define VIDINTCON0_INT_ENABLE (1 << 0) 355#define VIDINTCON0_INT_ENABLE (1 << 0)
359 356
360#define VIDINTCON1 (0x134) 357#define VIDINTCON1 0x134
361#define VIDINTCON1_INT_I180 (1 << 2) 358#define VIDINTCON1_INT_I180 (1 << 2)
362#define VIDINTCON1_INT_FRAME (1 << 1) 359#define VIDINTCON1_INT_FRAME (1 << 1)
363#define VIDINTCON1_INT_FIFO (1 << 0) 360#define VIDINTCON1_INT_FIFO (1 << 0)
364 361
365/* Window colour-key control registers */ 362/* Window colour-key control registers */
366#define WKEYCON (0x140) /* 6410,V210 */ 363#define WKEYCON 0x140
367 364
368#define WKEYCON0 (0x00) 365#define WKEYCON0 0x00
369#define WKEYCON1 (0x04) 366#define WKEYCON1 0x04
370 367
371#define WxKEYCON0_KEYBL_EN (1 << 26) 368#define WxKEYCON0_KEYBL_EN (1 << 26)
372#define WxKEYCON0_KEYEN_F (1 << 25) 369#define WxKEYCON0_KEYEN_F (1 << 25)
373#define WxKEYCON0_DIRCON (1 << 24) 370#define WxKEYCON0_DIRCON (1 << 24)
374#define WxKEYCON0_COMPKEY_MASK (0xffffff << 0) 371#define WxKEYCON0_COMPKEY_MASK (0xffffff << 0)
375#define WxKEYCON0_COMPKEY_SHIFT (0) 372#define WxKEYCON0_COMPKEY_SHIFT 0
376#define WxKEYCON0_COMPKEY_LIMIT (0xffffff) 373#define WxKEYCON0_COMPKEY_LIMIT 0xffffff
377#define WxKEYCON0_COMPKEY(_x) ((_x) << 0) 374#define WxKEYCON0_COMPKEY(_x) ((_x) << 0)
378#define WxKEYCON1_COLVAL_MASK (0xffffff << 0) 375#define WxKEYCON1_COLVAL_MASK (0xffffff << 0)
379#define WxKEYCON1_COLVAL_SHIFT (0) 376#define WxKEYCON1_COLVAL_SHIFT 0
380#define WxKEYCON1_COLVAL_LIMIT (0xffffff) 377#define WxKEYCON1_COLVAL_LIMIT 0xffffff
381#define WxKEYCON1_COLVAL(_x) ((_x) << 0) 378#define WxKEYCON1_COLVAL(_x) ((_x) << 0)
382 379
383/* Dithering control */ 380/* Dithering control */
384#define DITHMODE (0x170) 381#define DITHMODE 0x170
385#define DITHMODE_R_POS_MASK (0x3 << 5) 382#define DITHMODE_R_POS_MASK (0x3 << 5)
386#define DITHMODE_R_POS_SHIFT (5) 383#define DITHMODE_R_POS_SHIFT 5
387#define DITHMODE_R_POS_8BIT (0x0 << 5) 384#define DITHMODE_R_POS_8BIT (0x0 << 5)
388#define DITHMODE_R_POS_6BIT (0x1 << 5) 385#define DITHMODE_R_POS_6BIT (0x1 << 5)
389#define DITHMODE_R_POS_5BIT (0x2 << 5) 386#define DITHMODE_R_POS_5BIT (0x2 << 5)
390#define DITHMODE_G_POS_MASK (0x3 << 3) 387#define DITHMODE_G_POS_MASK (0x3 << 3)
391#define DITHMODE_G_POS_SHIFT (3) 388#define DITHMODE_G_POS_SHIFT 3
392#define DITHMODE_G_POS_8BIT (0x0 << 3) 389#define DITHMODE_G_POS_8BIT (0x0 << 3)
393#define DITHMODE_G_POS_6BIT (0x1 << 3) 390#define DITHMODE_G_POS_6BIT (0x1 << 3)
394#define DITHMODE_G_POS_5BIT (0x2 << 3) 391#define DITHMODE_G_POS_5BIT (0x2 << 3)
395#define DITHMODE_B_POS_MASK (0x3 << 1) 392#define DITHMODE_B_POS_MASK (0x3 << 1)
396#define DITHMODE_B_POS_SHIFT (1) 393#define DITHMODE_B_POS_SHIFT 1
397#define DITHMODE_B_POS_8BIT (0x0 << 1) 394#define DITHMODE_B_POS_8BIT (0x0 << 1)
398#define DITHMODE_B_POS_6BIT (0x1 << 1) 395#define DITHMODE_B_POS_6BIT (0x1 << 1)
399#define DITHMODE_B_POS_5BIT (0x2 << 1) 396#define DITHMODE_B_POS_5BIT (0x2 << 1)
@@ -403,18 +400,18 @@
403#define WINxMAP(_win) (0x180 + ((_win) * 4)) 400#define WINxMAP(_win) (0x180 + ((_win) * 4))
404#define WINxMAP_MAP (1 << 24) 401#define WINxMAP_MAP (1 << 24)
405#define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0) 402#define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0)
406#define WINxMAP_MAP_COLOUR_SHIFT (0) 403#define WINxMAP_MAP_COLOUR_SHIFT 0
407#define WINxMAP_MAP_COLOUR_LIMIT (0xffffff) 404#define WINxMAP_MAP_COLOUR_LIMIT 0xffffff
408#define WINxMAP_MAP_COLOUR(_x) ((_x) << 0) 405#define WINxMAP_MAP_COLOUR(_x) ((_x) << 0)
409 406
410/* Winodw palette control */ 407/* Winodw palette control */
411#define WPALCON (0x1A0) 408#define WPALCON 0x1A0
412#define WPALCON_PAL_UPDATE (1 << 9) 409#define WPALCON_PAL_UPDATE (1 << 9)
413#define WPALCON_W4PAL_16BPP_A555 (1 << 8) 410#define WPALCON_W4PAL_16BPP_A555 (1 << 8)
414#define WPALCON_W3PAL_16BPP_A555 (1 << 7) 411#define WPALCON_W3PAL_16BPP_A555 (1 << 7)
415#define WPALCON_W2PAL_16BPP_A555 (1 << 6) 412#define WPALCON_W2PAL_16BPP_A555 (1 << 6)
416#define WPALCON_W1PAL_MASK (0x7 << 3) 413#define WPALCON_W1PAL_MASK (0x7 << 3)
417#define WPALCON_W1PAL_SHIFT (3) 414#define WPALCON_W1PAL_SHIFT 3
418#define WPALCON_W1PAL_25BPP_A888 (0x0 << 3) 415#define WPALCON_W1PAL_25BPP_A888 (0x0 << 3)
419#define WPALCON_W1PAL_24BPP (0x1 << 3) 416#define WPALCON_W1PAL_24BPP (0x1 << 3)
420#define WPALCON_W1PAL_19BPP_A666 (0x2 << 3) 417#define WPALCON_W1PAL_19BPP_A666 (0x2 << 3)
@@ -423,7 +420,7 @@
423#define WPALCON_W1PAL_16BPP_A555 (0x5 << 3) 420#define WPALCON_W1PAL_16BPP_A555 (0x5 << 3)
424#define WPALCON_W1PAL_16BPP_565 (0x6 << 3) 421#define WPALCON_W1PAL_16BPP_565 (0x6 << 3)
425#define WPALCON_W0PAL_MASK (0x7 << 0) 422#define WPALCON_W0PAL_MASK (0x7 << 0)
426#define WPALCON_W0PAL_SHIFT (0) 423#define WPALCON_W0PAL_SHIFT 0
427#define WPALCON_W0PAL_25BPP_A888 (0x0 << 0) 424#define WPALCON_W0PAL_25BPP_A888 (0x0 << 0)
428#define WPALCON_W0PAL_24BPP (0x1 << 0) 425#define WPALCON_W0PAL_24BPP (0x1 << 0)
429#define WPALCON_W0PAL_19BPP_A666 (0x2 << 0) 426#define WPALCON_W0PAL_19BPP_A666 (0x2 << 0)
@@ -433,13 +430,11 @@
433#define WPALCON_W0PAL_16BPP_565 (0x6 << 0) 430#define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
434 431
435/* Blending equation control */ 432/* Blending equation control */
436#define BLENDCON (0x260) 433#define BLENDCON 0x260
437#define BLENDCON_NEW_MASK (1 << 0) 434#define BLENDCON_NEW_MASK (1 << 0)
438#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0) 435#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
439#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0) 436#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
440 437
441#define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */
442
443/* Notes on per-window bpp settings 438/* Notes on per-window bpp settings
444 * 439 *
445 * Value Win0 Win1 Win2 Win3 Win 4 440 * Value Win0 Win1 Win2 Win3 Win 4
@@ -462,8 +457,8 @@
462*/ 457*/
463 458
464/* FIMD Version 8 register offset definitions */ 459/* FIMD Version 8 register offset definitions */
465#define FIMD_V8_VIDTCON0 (0x20010) 460#define FIMD_V8_VIDTCON0 0x20010
466#define FIMD_V8_VIDTCON1 (0x20014) 461#define FIMD_V8_VIDTCON1 0x20014
467#define FIMD_V8_VIDTCON2 (0x20018) 462#define FIMD_V8_VIDTCON2 0x20018
468#define FIMD_V8_VIDTCON3 (0x2001C) 463#define FIMD_V8_VIDTCON3 0x2001C
469#define FIMD_V8_VIDCON1 (0x20004) 464#define FIMD_V8_VIDCON1 0x20004
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-17 10:13:46 -0500