1 files changed, 50 insertions, 24 deletions
diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h
index 87b81a555139..7539b9087a80 100644
--- a/include/video/pmagb-b-fb.h
+++ b/include/video/pmagb-b-fb.h
@@ -1,32 +1,58 @@
 /*
- *      linux/drivers/video/pmagb-b-fb.h
+ *      linux/include/video/pmagb-b-fb.h
 *
- *      TurboChannel PMAGB-B framebuffer card support,
+ *      TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
- *      Copyright (C) 1999, 2000, 2001 by
+ *      Copyright (C) 1999, 2000, 2001 by
- *      Michael Engel <engel@unix-ag.org> and 
+ *      Michael Engel <engel@unix-ag.org> and
- *      Karsten Merker <merker@linuxtag.org>
+ *      Karsten Merker <merker@linuxtag.org>
- *      This file is subject to the terms and conditions of the GNU General
+ *      Copyright (c) 2005  Maciej W. Rozycki
- *      Public License.  See the file COPYING in the main directory of this
+ *
- *      archive for more details.
+ *      This file is subject to the terms and conditions of the GNU General
+ *      Public License.  See the file COPYING in the main directory of this
+ *      archive for more details.
 */
+/* IOmem resource offsets.  */
+#define PMAGB_B_ROM             0x000000        /* REX option ROM */
+#define PMAGB_B_SFB             0x100000        /* SFB ASIC */
+#define PMAGB_B_GP0             0x140000        /* general purpose output 0 */
+#define PMAGB_B_GP1             0x180000        /* general purpose output 1 */
+#define PMAGB_B_BT459           0x1c0000        /* Bt459 RAMDAC */
+#define PMAGB_B_FBMEM           0x200000        /* frame buffer */
+#define PMAGB_B_SIZE            0x400000        /* address space size */
-/*
+/* IOmem register offsets.  */
- * Bt459 RAM DAC register base offset (rel. to TC slot base address)
+#define SFB_REG_VID_HOR         0x64            /* video horizontal setup */
- */
+#define SFB_REG_VID_VER         0x68            /* video vertical setup */
-#define PMAGB_B_BT459_OFFSET                    0x001C0000
+#define SFB_REG_VID_BASE        0x6c            /* video base address */
+#define SFB_REG_TCCLK_COUNT     0x78            /* TURBOchannel clock count */
+#define SFB_REG_VIDCLK_COUNT    0x7c            /* video clock count */
-/*
+/* Video horizontal setup register constants.  All bits are r/w.  */
- * Begin of PMAGB-B framebuffer memory, resolution is configurable:
+#define SFB_VID_HOR_BP_SHIFT    0x15            /* back porch */
- * 1024x864x8 or 1280x1024x8, settable by jumper on the card
+#define SFB_VID_HOR_BP_MASK     0x7f
- */
+#define SFB_VID_HOR_SYN_SHIFT   0x0e            /* sync pulse */
-#define PMAGB_B_ONBOARD_FBMEM_OFFSET    0x00201000
+#define SFB_VID_HOR_SYN_MASK    0x7f
+#define SFB_VID_HOR_FP_SHIFT    0x09            /* front porch */
+#define SFB_VID_HOR_FP_MASK     0x1f
+#define SFB_VID_HOR_PIX_SHIFT   0x00            /* active video */
+#define SFB_VID_HOR_PIX_MASK    0x1ff
-/*
+/* Video vertical setup register constants.  All bits are r/w.  */
- * Bt459 register offsets, byte-wide registers
+#define SFB_VID_VER_BP_SHIFT    0x16            /* back porch */
- */
+#define SFB_VID_VER_BP_MASK     0x3f
+#define SFB_VID_VER_SYN_SHIFT   0x10            /* sync pulse */
+#define SFB_VID_VER_SYN_MASK    0x3f
+#define SFB_VID_VER_FP_SHIFT    0x0b            /* front porch */
+#define SFB_VID_VER_FP_MASK     0x1f
+#define SFB_VID_VER_SL_SHIFT    0x00            /* active scan lines */
+#define SFB_VID_VER_SL_MASK     0x7ff
+/* Video base address register constants.  All bits are r/w.  */
+#define SFB_VID_BASE_MASK       0x1ff           /* video base row address */
-#define BT459_ADR_LOW                   BT459_OFFSET + 0x00     /* addr. low */
+/* Bt459 register offsets, byte-wide registers.  */
-#define BT459_ADR_HIGH                  BT459_OFFSET + 0x04     /* addr. high */
+#define BT459_ADDR_LO           0x0             /* address low */
-#define BT459_DATA                      BT459_OFFSET + 0x08     /* r/w data */
+#define BT459_ADDR_HI           0x4             /* address high */
-#define BT459_CMAP                      BT459_OFFSET + 0x0C     /* color map */
+#define BT459_DATA              0x8             /* data window register */
+#define BT459_CMAP              0xc             /* color map window register */

diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h index 87b81a555139..7539b9087a80 100644 --- a/include/video/pmagb-b-fb.h +++ b/include/video/pmagb-b-fb.h
@@ -1,32 +1,58 @@
1	/*	1	/*
2	* linux/drivers/video/pmagb-b-fb.h	2	* linux/include/video/pmagb-b-fb.h
3	*	3	*
4	* TurboChannel PMAGB-B framebuffer card support,	4	* TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
5	* Copyright (C) 1999, 2000, 2001 by	5	* Copyright (C) 1999, 2000, 2001 by
6	* Michael Engel <engel@unix-ag.org> and	6	* Michael Engel <engel@unix-ag.org> and
7	* Karsten Merker <merker@linuxtag.org>	7	* Karsten Merker <merker@linuxtag.org>
8	* This file is subject to the terms and conditions of the GNU General	8	* Copyright (c) 2005 Maciej W. Rozycki
9	* Public License. See the file COPYING in the main directory of this	9	*
10	* archive for more details.	10	* This file is subject to the terms and conditions of the GNU General
		11	* Public License. See the file COPYING in the main directory of this
		12	* archive for more details.
11	*/	13	*/
12		14
		15	/* IOmem resource offsets. */
		16	#define PMAGB_B_ROM 0x000000 /* REX option ROM */
		17	#define PMAGB_B_SFB 0x100000 /* SFB ASIC */
		18	#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
		19	#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
		20	#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
		21	#define PMAGB_B_FBMEM 0x200000 /* frame buffer */
		22	#define PMAGB_B_SIZE 0x400000 /* address space size */
13		23
14	/*	24	/* IOmem register offsets. */
15	* Bt459 RAM DAC register base offset (rel. to TC slot base address)	25	#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
16	*/	26	#define SFB_REG_VID_VER 0x68 /* video vertical setup */
17	#define PMAGB_B_BT459_OFFSET 0x001C0000	27	#define SFB_REG_VID_BASE 0x6c /* video base address */
		28	#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */
		29	#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */
18		30
19	/*	31	/* Video horizontal setup register constants. All bits are r/w. */
20	* Begin of PMAGB-B framebuffer memory, resolution is configurable:	32	#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */
21	* 1024x864x8 or 1280x1024x8, settable by jumper on the card	33	#define SFB_VID_HOR_BP_MASK 0x7f
22	*/	34	#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */
23	#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000	35	#define SFB_VID_HOR_SYN_MASK 0x7f
		36	#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */
		37	#define SFB_VID_HOR_FP_MASK 0x1f
		38	#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */
		39	#define SFB_VID_HOR_PIX_MASK 0x1ff
24		40
25	/*	41	/* Video vertical setup register constants. All bits are r/w. */
26	* Bt459 register offsets, byte-wide registers	42	#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */
27	*/	43	#define SFB_VID_VER_BP_MASK 0x3f
		44	#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */
		45	#define SFB_VID_VER_SYN_MASK 0x3f
		46	#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */
		47	#define SFB_VID_VER_FP_MASK 0x1f
		48	#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */
		49	#define SFB_VID_VER_SL_MASK 0x7ff
		50
		51	/* Video base address register constants. All bits are r/w. */
		52	#define SFB_VID_BASE_MASK 0x1ff /* video base row address */
28		53
29	#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */	54	/* Bt459 register offsets, byte-wide registers. */
30	#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */	55	#define BT459_ADDR_LO 0x0 /* address low */
31	#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */	56	#define BT459_ADDR_HI 0x4 /* address high */
32	#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */	57	#define BT459_DATA 0x8 /* data window register */
		58	#define BT459_CMAP 0xc /* color map window register */