61 files changed, 1784 insertions, 148 deletions

diff --git a/include/uapi/drm/Kbuild b/include/uapi/drm/Kbuild
index 119487e05e65..2d9a25daab05 100644
--- a/include/uapi/drm/Kbuild
+++ b/include/uapi/drm/Kbuild
@@ -16,3 +16,4 @@ header-y += sis_drm.h
 header-y += tegra_drm.h
 header-y += via_drm.h
 header-y += vmwgfx_drm.h
+header-y += msm_drm.h
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 238a166b9fe6..ece867889cc7 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -181,7 +181,7 @@ enum drm_map_type {
         _DRM_AGP = 3,             /**< AGP/GART */
         _DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
         _DRM_CONSISTENT = 5,      /**< Consistent memory for PCI DMA */
-        _DRM_GEM = 6,             /**< GEM object */
+        _DRM_GEM = 6,             /**< GEM object (obsolete) */
 };
 
 /**
@@ -780,6 +780,7 @@ struct drm_event_vblank {
 #define DRM_CAP_DUMB_PREFER_SHADOW 0x4
 #define DRM_CAP_PRIME 0x5
 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
+#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
 
 #define DRM_PRIME_CAP_IMPORT 0x1
 #define DRM_PRIME_CAP_EXPORT 0x2
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 53db7cea373b..550811712f78 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -412,7 +412,8 @@ struct drm_mode_crtc_lut {
 };
 
 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
-#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
+#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
+#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
 
 /*
  * Request a page flip on the specified crtc.
@@ -426,11 +427,14 @@ struct drm_mode_crtc_lut {
  * flip is already pending as the ioctl is called, EBUSY will be
  * returned.
  *
- * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
- * request that drm sends back a vblank event (see drm.h: struct
- * drm_event_vblank) when the page flip is done.  The user_data field
- * passed in with this ioctl will be returned as the user_data field
- * in the vblank event struct.
+ * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
+ * event (see drm.h: struct drm_event_vblank) when the page flip is
+ * done.  The user_data field passed in with this ioctl will be
+ * returned as the user_data field in the vblank event struct.
+ *
+ * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
+ * 'as soon as possible', meaning that it not delay waiting for vblank.
+ * This may cause tearing on the screen.
  *
  * The reserved field must be zero until we figure out something
  * clever to use it for.
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 923ed7fe5775..55bb5729bd78 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -33,6 +33,30 @@
  * subject to backwards-compatibility constraints.
  */
 
+/**
+ * DOC: uevents generated by i915 on it's device node
+ *
+ * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
+ *      event from the gpu l3 cache. Additional information supplied is ROW,
+ *      BANK, SUBBANK of the affected cacheline. Userspace should keep track of
+ *      these events and if a specific cache-line seems to have a persistent
+ *      error remap it with the l3 remapping tool supplied in intel-gpu-tools.
+ *      The value supplied with the event is always 1.
+ *
+ * I915_ERROR_UEVENT - Generated upon error detection, currently only via
+ *      hangcheck. The error detection event is a good indicator of when things
+ *      began to go badly. The value supplied with the event is a 1 upon error
+ *      detection, and a 0 upon reset completion, signifying no more error
+ *      exists. NOTE: Disabling hangcheck or reset via module parameter will
+ *      cause the related events to not be seen.
+ *
+ * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
+ *      the GPU. The value supplied with the event is always 1. NOTE: Disable
+ *      reset via module parameter will cause this event to not be seen.
+ */
+#define I915_L3_PARITY_UEVENT           "L3_PARITY_ERROR"
+#define I915_ERROR_UEVENT               "ERROR"
+#define I915_RESET_UEVENT               "RESET"
 
 /* Each region is a minimum of 16k, and there are at most 255 of them.
  */
@@ -310,6 +334,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_PINNED_BATCHES    24
 #define I915_PARAM_HAS_EXEC_NO_RELOC     25
 #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
+#define I915_PARAM_HAS_WT                27
 
 typedef struct drm_i915_getparam {
         int param;
@@ -744,8 +769,32 @@ struct drm_i915_gem_busy {
         __u32 busy;
 };
 
+/**
+ * I915_CACHING_NONE
+ *
+ * GPU access is not coherent with cpu caches. Default for machines without an
+ * LLC.
+ */
 #define I915_CACHING_NONE               0
+/**
+ * I915_CACHING_CACHED
+ *
+ * GPU access is coherent with cpu caches and furthermore the data is cached in
+ * last-level caches shared between cpu cores and the gpu GT. Default on
+ * machines with HAS_LLC.
+ */
 #define I915_CACHING_CACHED             1
+/**
+ * I915_CACHING_DISPLAY
+ *
+ * Special GPU caching mode which is coherent with the scanout engines.
+ * Transparently falls back to I915_CACHING_NONE on platforms where no special
+ * cache mode (like write-through or gfdt flushing) is available. The kernel
+ * automatically sets this mode when using a buffer as a scanout target.
+ * Userspace can manually set this mode to avoid a costly stall and clflush in
+ * the hotpath of drawing the first frame.
+ */
+#define I915_CACHING_DISPLAY            2
 
 struct drm_i915_gem_caching {
         /**
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
new file mode 100644
index 000000000000..d3c62074016d
--- /dev/null
+++ b/include/uapi/drm/msm_drm.h
@@ -0,0 +1,207 @@
+/*
+ * Copyright (C) 2013 Red Hat
+ * Author: Rob Clark <robdclark@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __MSM_DRM_H__
+#define __MSM_DRM_H__
+
+#include <stddef.h>
+#include <drm/drm.h>
+
+/* Please note that modifications to all structs defined here are
+ * subject to backwards-compatibility constraints:
+ *  1) Do not use pointers, use uint64_t instead for 32 bit / 64 bit
+ *     user/kernel compatibility
+ *  2) Keep fields aligned to their size
+ *  3) Because of how drm_ioctl() works, we can add new fields at
+ *     the end of an ioctl if some care is taken: drm_ioctl() will
+ *     zero out the new fields at the tail of the ioctl, so a zero
+ *     value should have a backwards compatible meaning.  And for
+ *     output params, userspace won't see the newly added output
+ *     fields.. so that has to be somehow ok.
+ */
+
+#define MSM_PIPE_NONE        0x00
+#define MSM_PIPE_2D0         0x01
+#define MSM_PIPE_2D1         0x02
+#define MSM_PIPE_3D0         0x10
+
+/* timeouts are specified in clock-monotonic absolute times (to simplify
+ * restarting interrupted ioctls).  The following struct is logically the
+ * same as 'struct timespec' but 32/64b ABI safe.
+ */
+struct drm_msm_timespec {
+        int64_t tv_sec;          /* seconds */
+        int64_t tv_nsec;         /* nanoseconds */
+};
+
+#define MSM_PARAM_GPU_ID     0x01
+#define MSM_PARAM_GMEM_SIZE  0x02
+
+struct drm_msm_param {
+        uint32_t pipe;           /* in, MSM_PIPE_x */
+        uint32_t param;          /* in, MSM_PARAM_x */
+        uint64_t value;          /* out (get_param) or in (set_param) */
+};
+
+/*
+ * GEM buffers:
+ */
+
+#define MSM_BO_SCANOUT       0x00000001     /* scanout capable */
+#define MSM_BO_GPU_READONLY  0x00000002
+#define MSM_BO_CACHE_MASK    0x000f0000
+/* cache modes */
+#define MSM_BO_CACHED        0x00010000
+#define MSM_BO_WC            0x00020000
+#define MSM_BO_UNCACHED      0x00040000
+
+struct drm_msm_gem_new {
+        uint64_t size;           /* in */
+        uint32_t flags;          /* in, mask of MSM_BO_x */
+        uint32_t handle;         /* out */
+};
+
+struct drm_msm_gem_info {
+        uint32_t handle;         /* in */
+        uint32_t pad;
+        uint64_t offset;         /* out, offset to pass to mmap() */
+};
+
+#define MSM_PREP_READ        0x01
+#define MSM_PREP_WRITE       0x02
+#define MSM_PREP_NOSYNC      0x04
+
+struct drm_msm_gem_cpu_prep {
+        uint32_t handle;         /* in */
+        uint32_t op;             /* in, mask of MSM_PREP_x */
+        struct drm_msm_timespec timeout;   /* in */
+};
+
+struct drm_msm_gem_cpu_fini {
+        uint32_t handle;         /* in */
+};
+
+/*
+ * Cmdstream Submission:
+ */
+
+/* The value written into the cmdstream is logically:
+ *
+ *   ((relocbuf->gpuaddr + reloc_offset) << shift) | or
+ *
+ * When we have GPU's w/ >32bit ptrs, it should be possible to deal
+ * with this by emit'ing two reloc entries with appropriate shift
+ * values.  Or a new MSM_SUBMIT_CMD_x type would also be an option.
+ *
+ * NOTE that reloc's must be sorted by order of increasing submit_offset,
+ * otherwise EINVAL.
+ */
+struct drm_msm_gem_submit_reloc {
+        uint32_t submit_offset;  /* in, offset from submit_bo */
+        uint32_t or;             /* in, value OR'd with result */
+        int32_t  shift;          /* in, amount of left shift (can be negative) */
+        uint32_t reloc_idx;      /* in, index of reloc_bo buffer */
+        uint64_t reloc_offset;   /* in, offset from start of reloc_bo */
+};
+
+/* submit-types:
+ *   BUF - this cmd buffer is executed normally.
+ *   IB_TARGET_BUF - this cmd buffer is an IB target.  Reloc's are
+ *      processed normally, but the kernel does not setup an IB to
+ *      this buffer in the first-level ringbuffer
+ *   CTX_RESTORE_BUF - only executed if there has been a GPU context
+ *      switch since the last SUBMIT ioctl
+ */
+#define MSM_SUBMIT_CMD_BUF             0x0001
+#define MSM_SUBMIT_CMD_IB_TARGET_BUF   0x0002
+#define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
+struct drm_msm_gem_submit_cmd {
+        uint32_t type;           /* in, one of MSM_SUBMIT_CMD_x */
+        uint32_t submit_idx;     /* in, index of submit_bo cmdstream buffer */
+        uint32_t submit_offset;  /* in, offset into submit_bo */
+        uint32_t size;           /* in, cmdstream size */
+        uint32_t pad;
+        uint32_t nr_relocs;      /* in, number of submit_reloc's */
+        uint64_t __user relocs;  /* in, ptr to array of submit_reloc's */
+};
+
+/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
+ * cmdstream buffer(s) themselves or reloc entries) has one (and only
+ * one) entry in the submit->bos[] table.
+ *
+ * As a optimization, the current buffer (gpu virtual address) can be
+ * passed back through the 'presumed' field.  If on a subsequent reloc,
+ * userspace passes back a 'presumed' address that is still valid,
+ * then patching the cmdstream for this entry is skipped.  This can
+ * avoid kernel needing to map/access the cmdstream bo in the common
+ * case.
+ */
+#define MSM_SUBMIT_BO_READ             0x0001
+#define MSM_SUBMIT_BO_WRITE            0x0002
+struct drm_msm_gem_submit_bo {
+        uint32_t flags;          /* in, mask of MSM_SUBMIT_BO_x */
+        uint32_t handle;         /* in, GEM handle */
+        uint64_t presumed;       /* in/out, presumed buffer address */
+};
+
+/* Each cmdstream submit consists of a table of buffers involved, and
+ * one or more cmdstream buffers.  This allows for conditional execution
+ * (context-restore), and IB buffers needed for per tile/bin draw cmds.
+ */
+struct drm_msm_gem_submit {
+        uint32_t pipe;           /* in, MSM_PIPE_x */
+        uint32_t fence;          /* out */
+        uint32_t nr_bos;         /* in, number of submit_bo's */
+        uint32_t nr_cmds;        /* in, number of submit_cmd's */
+        uint64_t __user bos;     /* in, ptr to array of submit_bo's */
+        uint64_t __user cmds;    /* in, ptr to array of submit_cmd's */
+};
+
+/* The normal way to synchronize with the GPU is just to CPU_PREP on
+ * a buffer if you need to access it from the CPU (other cmdstream
+ * submission from same or other contexts, PAGE_FLIP ioctl, etc, all
+ * handle the required synchronization under the hood).  This ioctl
+ * mainly just exists as a way to implement the gallium pipe_fence
+ * APIs without requiring a dummy bo to synchronize on.
+ */
+struct drm_msm_wait_fence {
+        uint32_t fence;          /* in */
+        uint32_t pad;
+        struct drm_msm_timespec timeout;   /* in */
+};
+
+#define DRM_MSM_GET_PARAM              0x00
+/* placeholder:
+#define DRM_MSM_SET_PARAM              0x01
+ */
+#define DRM_MSM_GEM_NEW                0x02
+#define DRM_MSM_GEM_INFO               0x03
+#define DRM_MSM_GEM_CPU_PREP           0x04
+#define DRM_MSM_GEM_CPU_FINI           0x05
+#define DRM_MSM_GEM_SUBMIT             0x06
+#define DRM_MSM_WAIT_FENCE             0x07
+#define DRM_MSM_NUM_IOCTLS             0x08
+
+#define DRM_IOCTL_MSM_GET_PARAM        DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
+#define DRM_IOCTL_MSM_GEM_NEW          DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
+#define DRM_IOCTL_MSM_GEM_INFO         DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
+#define DRM_IOCTL_MSM_GEM_CPU_PREP     DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)
+#define DRM_IOCTL_MSM_GEM_CPU_FINI     DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
+#define DRM_IOCTL_MSM_GEM_SUBMIT       DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
+#define DRM_IOCTL_MSM_WAIT_FENCE       DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
+
+#endif /* __MSM_DRM_H__ */
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 321d4ac5c512..fa8b3adf9ffb 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -979,6 +979,8 @@ struct drm_radeon_cs {
 #define RADEON_INFO_RING_WORKING        0x15
 /* SI tile mode array */
 #define RADEON_INFO_SI_TILE_MODE_ARRAY  0x16
+/* query if CP DMA is supported on the compute ring */
+#define RADEON_INFO_SI_CP_DMA_COMPUTE   0x17
 
 
 struct drm_radeon_info {
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index 997f9f2f0963..115add2515aa 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -227,6 +227,7 @@ header-y += kvm_para.h
 endif
 
 header-y += l2tp.h
+header-y += libc-compat.h
 header-y += limits.h
 header-y += llc.h
 header-y += loop.h
@@ -283,6 +284,7 @@ header-y += nfs_mount.h
 header-y += nfsacl.h
 header-y += nl80211.h
 header-y += nubus.h
+header-y += nvme.h
 header-y += nvram.h
 header-y += omap3isp.h
 header-y += omapfb.h
diff --git a/include/uapi/linux/can/gw.h b/include/uapi/linux/can/gw.h
index ae07bec74f4b..4e27c82b564a 100644
--- a/include/uapi/linux/can/gw.h
+++ b/include/uapi/linux/can/gw.h
@@ -45,6 +45,7 @@ enum {
         CGW_DST_IF,     /* ifindex of destination network interface */
         CGW_FILTER,     /* specify struct can_filter on source CAN device */
         CGW_DELETED,    /* number of deleted CAN frames (see max_hops param) */
+        CGW_LIM_HOPS,   /* limit the number of hops of this specific rule */
         __CGW_MAX
 };
 
@@ -116,13 +117,19 @@ enum {
  * Sets a CAN receive filter for the gateway job specified by the
  * struct can_filter described in include/linux/can.h
  *
- * CGW_MOD_XXX (length 17 bytes):
+ * CGW_MOD_(AND|OR|XOR|SET) (length 17 bytes):
  * Specifies a modification that's done to a received CAN frame before it is
  * send out to the destination interface.
  *
  * <struct can_frame> data used as operator
  * <u8> affected CAN frame elements
  *
+ * CGW_LIM_HOPS (length 1 byte):
+ * Limit the number of hops of this specific rule. Usually the received CAN
+ * frame can be processed as much as 'max_hops' times (which is given at module
+ * load time of the can-gw module). This value is used to reduce the number of
+ * possible hops for this gateway rule to a value smaller then max_hops.
+ *
  * CGW_CS_XOR (length 4 bytes):
  * Set a simple XOR checksum starting with an initial value into
  * data[result-idx] using data[start-idx] .. data[end-idx]
diff --git a/include/uapi/linux/cifs/cifs_mount.h b/include/uapi/linux/cifs/cifs_mount.h
new file mode 100644
index 000000000000..d7e4c6ce6171
--- /dev/null
+++ b/include/uapi/linux/cifs/cifs_mount.h
@@ -0,0 +1,27 @@
+/*
+ *   include/uapi/linux/cifs/cifs_mount.h
+ *
+ *   Author(s): Scott Lovenberg (scott.lovenberg@gmail.com)
+ *
+ *   This library is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU Lesser General Public License as published
+ *   by the Free Software Foundation; either version 2.1 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This library is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ *   the GNU Lesser General Public License for more details.
+ */
+#ifndef _CIFS_MOUNT_H
+#define _CIFS_MOUNT_H
+
+/* Max string lengths for cifs mounting options. */
+#define CIFS_MAX_DOMAINNAME_LEN 256 /* max fully qualified domain name */
+#define CIFS_MAX_USERNAME_LEN   256 /* reasonable max for current servers */
+#define CIFS_MAX_PASSWORD_LEN   512 /* Windows max seems to be 256 wide chars */
+#define CIFS_MAX_SHARE_LEN      256 /* reasonable max share name length */
+#define CIFS_NI_MAXHOST        1024 /* max host name length (256 * 4 bytes) */
+
+
+#endif /* _CIFS_MOUNT_H */
diff --git a/include/uapi/linux/cm4000_cs.h b/include/uapi/linux/cm4000_cs.h
index bc51f77db918..1217f751a1bc 100644
--- a/include/uapi/linux/cm4000_cs.h
+++ b/include/uapi/linux/cm4000_cs.h
@@ -2,6 +2,7 @@
 #define _UAPI_CM4000_H_
 
 #include <linux/types.h>
+#include <linux/ioctl.h>
 
 #define MAX_ATR                 33
 
diff --git a/include/uapi/linux/dm-ioctl.h b/include/uapi/linux/dm-ioctl.h
index afd0cbd52edb..f1e12bd40b3b 100644
--- a/include/uapi/linux/dm-ioctl.h
+++ b/include/uapi/linux/dm-ioctl.h
@@ -267,9 +267,9 @@ enum {
 #define DM_DEV_SET_GEOMETRY     _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
 
 #define DM_VERSION_MAJOR        4
-#define DM_VERSION_MINOR        25
+#define DM_VERSION_MINOR        26
 #define DM_VERSION_PATCHLEVEL   0
-#define DM_VERSION_EXTRA        "-ioctl (2013-06-26)"
+#define DM_VERSION_EXTRA        "-ioctl (2013-08-15)"
 
 /* Status bits */
 #define DM_READONLY_FLAG        (1 << 0) /* In/Out */
diff --git a/include/uapi/linux/dn.h b/include/uapi/linux/dn.h
index 9c50445462d9..5fbdd3d49eba 100644
--- a/include/uapi/linux/dn.h
+++ b/include/uapi/linux/dn.h
@@ -2,6 +2,7 @@
 #define _LINUX_DN_H
 
 #include <linux/types.h>
+#include <linux/if_ether.h>
 
 /*
 
@@ -120,7 +121,7 @@ struct linkinfo_dn {
  * Ethernet address format (for DECnet)
  */
 union etheraddress {
-        __u8 dne_addr[6];             /* Full ethernet address */
+        __u8 dne_addr[ETH_ALEN];      /* Full ethernet address */
   struct {
                 __u8 dne_hiord[4];    /* DECnet HIORD prefix   */
                 __u8 dne_nodeaddr[2]; /* DECnet node address   */
diff --git a/include/uapi/linux/dqblk_xfs.h b/include/uapi/linux/dqblk_xfs.h
index 86552807aed9..dcd75cc26196 100644
--- a/include/uapi/linux/dqblk_xfs.h
+++ b/include/uapi/linux/dqblk_xfs.h
@@ -38,6 +38,7 @@
 #define Q_XGETQSTAT     XQM_CMD(5)      /* get quota subsystem status */
 #define Q_XQUOTARM      XQM_CMD(6)      /* free disk space used by dquots */
 #define Q_XQUOTASYNC    XQM_CMD(7)      /* delalloc flush, updates dquots */
+#define Q_XGETQSTATV    XQM_CMD(8)      /* newer version of get quota */
 
 /*
  * fs_disk_quota structure:
@@ -163,4 +164,50 @@ typedef struct fs_quota_stat {
         __u16           qs_iwarnlimit;  /* limit for num warnings */
 } fs_quota_stat_t;
 
+/*
+ * fs_quota_statv is used by Q_XGETQSTATV for a given file system. It provides
+ * a centralized way to get meta information about the quota subsystem. eg.
+ * space taken up for user, group, and project quotas, number of dquots
+ * currently incore.
+ *
+ * This version has proper versioning support with appropriate padding for
+ * future expansions, and ability to expand for future without creating any
+ * backward compatibility issues.
+ *
+ * Q_XGETQSTATV uses the passed in value of the requested version via
+ * fs_quota_statv.qs_version to determine the return data layout of
+ * fs_quota_statv.  The kernel will fill the data fields relevant to that
+ * version.
+ *
+ * If kernel does not support user space caller specified version, EINVAL will
+ * be returned. User space caller can then reduce the version number and retry
+ * the same command.
+ */
+#define FS_QSTATV_VERSION1      1       /* fs_quota_statv.qs_version */
+/*
+ * Some basic information about 'quota files' for Q_XGETQSTATV command
+ */
+struct fs_qfilestatv {
+        __u64           qfs_ino;        /* inode number */
+        __u64           qfs_nblks;      /* number of BBs 512-byte-blks */
+        __u32           qfs_nextents;   /* number of extents */
+        __u32           qfs_pad;        /* pad for 8-byte alignment */
+};
+
+struct fs_quota_statv {
+        __s8                    qs_version;     /* version for future changes */
+        __u8                    qs_pad1;        /* pad for 16bit alignment */
+        __u16                   qs_flags;       /* FS_QUOTA_.* flags */
+        __u32                   qs_incoredqs;   /* number of dquots incore */
+        struct fs_qfilestatv    qs_uquota;      /* user quota information */
+        struct fs_qfilestatv    qs_gquota;      /* group quota information */
+        struct fs_qfilestatv    qs_pquota;      /* project quota information */
+        __s32                   qs_btimelimit;  /* limit for blks timer */
+        __s32                   qs_itimelimit;  /* limit for inodes timer */
+        __s32                   qs_rtbtimelimit;/* limit for rt blks timer */
+        __u16                   qs_bwarnlimit;  /* limit for num warnings */
+        __u16                   qs_iwarnlimit;  /* limit for num warnings */
+        __u64                   qs_pad2[8];     /* for future proofing */
+};
+
 #endif  /* _LINUX_DQBLK_XFS_H */
diff --git a/include/uapi/linux/elf-em.h b/include/uapi/linux/elf-em.h
index 8e2b7bac4378..59c17a2d38ad 100644
--- a/include/uapi/linux/elf-em.h
+++ b/include/uapi/linux/elf-em.h
@@ -22,6 +22,7 @@
 #define EM_PPC          20      /* PowerPC */
 #define EM_PPC64        21       /* PowerPC64 */
 #define EM_SPU          23      /* Cell BE SPU */
+#define EM_ARM          40      /* ARM 32 bit */
 #define EM_SH           42      /* SuperH */
 #define EM_SPARCV9      43      /* SPARC v9 64-bit */
 #define EM_IA_64        50      /* HP/Intel IA-64 */
@@ -34,6 +35,7 @@
 #define EM_MN10300      89      /* Panasonic/MEI MN10300, AM33 */
 #define EM_BLACKFIN     106     /* ADI Blackfin Processor */
 #define EM_TI_C6000     140     /* TI C6X DSPs */
+#define EM_AARCH64      183     /* ARM 64 bit */
 #define EM_FRV          0x5441  /* Fujitsu FR-V */
 #define EM_AVR32        0x18ad  /* Atmel AVR32 */
 
diff --git a/include/uapi/linux/fib_rules.h b/include/uapi/linux/fib_rules.h
index 51da65b68b85..2b82d7e30974 100644
--- a/include/uapi/linux/fib_rules.h
+++ b/include/uapi/linux/fib_rules.h
@@ -44,8 +44,8 @@ enum {
         FRA_FWMARK,     /* mark */
         FRA_FLOW,       /* flow/class id */
         FRA_UNUSED6,
-        FRA_UNUSED7,
-        FRA_UNUSED8,
+        FRA_SUPPRESS_IFGROUP,
+        FRA_SUPPRESS_PREFIXLEN,
         FRA_TABLE,      /* Extended table id */
         FRA_FWMASK,     /* mask for netfilter mark */
         FRA_OIFNAME,
diff --git a/include/uapi/linux/fiemap.h b/include/uapi/linux/fiemap.h
index d830747f5c0b..0c51d617dae9 100644
--- a/include/uapi/linux/fiemap.h
+++ b/include/uapi/linux/fiemap.h
@@ -40,6 +40,7 @@ struct fiemap {
 
 #define FIEMAP_FLAG_SYNC        0x00000001 /* sync file data before map */
 #define FIEMAP_FLAG_XATTR       0x00000002 /* map extended attribute tree */
+#define FIEMAP_FLAG_CACHE       0x00000004 /* request caching of the extents */
 
 #define FIEMAP_FLAGS_COMPAT     (FIEMAP_FLAG_SYNC | FIEMAP_FLAG_XATTR)
 
diff --git a/include/uapi/linux/icmpv6.h b/include/uapi/linux/icmpv6.h
index e0133c73c304..590beda78ea0 100644
--- a/include/uapi/linux/icmpv6.h
+++ b/include/uapi/linux/icmpv6.h
@@ -115,6 +115,8 @@ struct icmp6hdr {
 #define ICMPV6_NOT_NEIGHBOUR            2
 #define ICMPV6_ADDR_UNREACH             3
 #define ICMPV6_PORT_UNREACH             4
+#define ICMPV6_POLICY_FAIL              5
+#define ICMPV6_REJECT_ROUTE             6
 
 /*
  *      Codes for Time Exceeded
diff --git a/include/uapi/linux/if_bridge.h b/include/uapi/linux/if_bridge.h
index 2d70d79ce2fd..39f621a9fe82 100644
--- a/include/uapi/linux/if_bridge.h
+++ b/include/uapi/linux/if_bridge.h
@@ -14,6 +14,7 @@
 #define _UAPI_LINUX_IF_BRIDGE_H
 
 #include <linux/types.h>
+#include <linux/if_ether.h>
 
 #define SYSFS_BRIDGE_ATTR       "bridge"
 #define SYSFS_BRIDGE_FDB        "brforward"
@@ -88,7 +89,7 @@ struct __port_info {
 };
 
 struct __fdb_entry {
-        __u8 mac_addr[6];
+        __u8 mac_addr[ETH_ALEN];
         __u8 port_no;
         __u8 is_local;
         __u32 ageing_timer_value;
diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h
index 03f6170ab337..80394e8dc3a3 100644
--- a/include/uapi/linux/if_link.h
+++ b/include/uapi/linux/if_link.h
@@ -143,6 +143,7 @@ enum {
         IFLA_NUM_TX_QUEUES,
         IFLA_NUM_RX_QUEUES,
         IFLA_CARRIER,
+        IFLA_PHYS_PORT_ID,
         __IFLA_MAX
 };
 
@@ -313,6 +314,8 @@ enum {
         IFLA_VXLAN_L2MISS,
         IFLA_VXLAN_L3MISS,
         IFLA_VXLAN_PORT,        /* destination port */
+        IFLA_VXLAN_GROUP6,
+        IFLA_VXLAN_LOCAL6,
         __IFLA_VXLAN_MAX
 };
 #define IFLA_VXLAN_MAX  (__IFLA_VXLAN_MAX - 1)
diff --git a/include/uapi/linux/if_packet.h b/include/uapi/linux/if_packet.h
index b950c02030c0..dbf06667394b 100644
--- a/include/uapi/linux/if_packet.h
+++ b/include/uapi/linux/if_packet.h
@@ -56,6 +56,7 @@ struct sockaddr_ll {
 #define PACKET_FANOUT_LB                1
 #define PACKET_FANOUT_CPU               2
 #define PACKET_FANOUT_ROLLOVER          3
+#define PACKET_FANOUT_RND               4
 #define PACKET_FANOUT_FLAG_ROLLOVER     0x1000
 #define PACKET_FANOUT_FLAG_DEFRAG       0x8000
 
diff --git a/include/uapi/linux/if_pppox.h b/include/uapi/linux/if_pppox.h
index e36a4aecd311..e128769331b5 100644
--- a/include/uapi/linux/if_pppox.h
+++ b/include/uapi/linux/if_pppox.h
@@ -46,7 +46,7 @@ struct pppoe_addr {
  * PPTP addressing definition
  */
 struct pptp_addr {
-        __be16          call_id;
+        __u16           call_id;
         struct in_addr  sin_addr;
 };
 
diff --git a/include/uapi/linux/if_tun.h b/include/uapi/linux/if_tun.h
index 82334f88967e..e9502dd1ee2c 100644
--- a/include/uapi/linux/if_tun.h
+++ b/include/uapi/linux/if_tun.h
@@ -56,6 +56,8 @@
 #define TUNGETVNETHDRSZ _IOR('T', 215, int)
 #define TUNSETVNETHDRSZ _IOW('T', 216, int)
 #define TUNSETQUEUE  _IOW('T', 217, int)
+#define TUNSETIFINDEX   _IOW('T', 218, unsigned int)
+#define TUNGETFILTER _IOR('T', 219, struct sock_fprog)
 
 /* TUNSETIFF ifr flags */
 #define IFF_TUN         0x0001
@@ -70,6 +72,10 @@
 #define IFF_DETACH_QUEUE 0x0400
 /* read-only flag */
 #define IFF_PERSIST     0x0800
+#define IFF_NOFILTER    0x1000
+
+/* Socket options */
+#define TUN_TX_TIMESTAMP 1
 
 /* Features for GSO (TUNSETOFFLOAD). */
 #define TUN_F_CSUM      0x01    /* You can hand me unchecksummed packets. */
diff --git a/include/uapi/linux/in.h b/include/uapi/linux/in.h
index 9edb441df827..f9e8e496ae5d 100644
--- a/include/uapi/linux/in.h
+++ b/include/uapi/linux/in.h
@@ -24,30 +24,53 @@
 /* Standard well-defined IP protocols.  */
 enum {
   IPPROTO_IP = 0,               /* Dummy protocol for TCP               */
+#define IPPROTO_IP              IPPROTO_IP
   IPPROTO_ICMP = 1,             /* Internet Control Message Protocol    */
+#define IPPROTO_ICMP            IPPROTO_ICMP
   IPPROTO_IGMP = 2,             /* Internet Group Management Protocol   */
+#define IPPROTO_IGMP            IPPROTO_IGMP
   IPPROTO_IPIP = 4,             /* IPIP tunnels (older KA9Q tunnels use 94) */
+#define IPPROTO_IPIP            IPPROTO_IPIP
   IPPROTO_TCP = 6,              /* Transmission Control Protocol        */
+#define IPPROTO_TCP             IPPROTO_TCP
   IPPROTO_EGP = 8,              /* Exterior Gateway Protocol            */
+#define IPPROTO_EGP             IPPROTO_EGP
   IPPROTO_PUP = 12,             /* PUP protocol                         */
+#define IPPROTO_PUP             IPPROTO_PUP
   IPPROTO_UDP = 17,             /* User Datagram Protocol               */
+#define IPPROTO_UDP             IPPROTO_UDP
   IPPROTO_IDP = 22,             /* XNS IDP protocol                     */
+#define IPPROTO_IDP             IPPROTO_IDP
+  IPPROTO_TP = 29,              /* SO Transport Protocol Class 4        */
+#define IPPROTO_TP              IPPROTO_TP
   IPPROTO_DCCP = 33,            /* Datagram Congestion Control Protocol */
-  IPPROTO_RSVP = 46,            /* RSVP protocol                        */
+#define IPPROTO_DCCP            IPPROTO_DCCP
+  IPPROTO_IPV6 = 41,            /* IPv6-in-IPv4 tunnelling              */
+#define IPPROTO_IPV6            IPPROTO_IPV6
+  IPPROTO_RSVP = 46,            /* RSVP Protocol                        */
+#define IPPROTO_RSVP            IPPROTO_RSVP
   IPPROTO_GRE = 47,             /* Cisco GRE tunnels (rfc 1701,1702)    */
-
-  IPPROTO_IPV6   = 41,          /* IPv6-in-IPv4 tunnelling              */
-
-  IPPROTO_ESP = 50,            /* Encapsulation Security Payload protocol */
-  IPPROTO_AH = 51,             /* Authentication Header protocol       */
-  IPPROTO_BEETPH = 94,         /* IP option pseudo header for BEET */
-  IPPROTO_PIM    = 103,         /* Protocol Independent Multicast       */
-
-  IPPROTO_COMP   = 108,                /* Compression Header protocol */
-  IPPROTO_SCTP   = 132,         /* Stream Control Transport Protocol    */
+#define IPPROTO_GRE             IPPROTO_GRE
+  IPPROTO_ESP = 50,             /* Encapsulation Security Payload protocol */
+#define IPPROTO_ESP             IPPROTO_ESP
+  IPPROTO_AH = 51,              /* Authentication Header protocol       */
+#define IPPROTO_AH              IPPROTO_AH
+  IPPROTO_MTP = 92,             /* Multicast Transport Protocol         */
+#define IPPROTO_MTP             IPPROTO_MTP
+  IPPROTO_BEETPH = 94,          /* IP option pseudo header for BEET     */
+#define IPPROTO_BEETPH          IPPROTO_BEETPH
+  IPPROTO_ENCAP = 98,           /* Encapsulation Header                 */
+#define IPPROTO_ENCAP           IPPROTO_ENCAP
+  IPPROTO_PIM = 103,            /* Protocol Independent Multicast       */
+#define IPPROTO_PIM             IPPROTO_PIM
+  IPPROTO_COMP = 108,           /* Compression Header Protocol          */
+#define IPPROTO_COMP            IPPROTO_COMP
+  IPPROTO_SCTP = 132,           /* Stream Control Transport Protocol    */
+#define IPPROTO_SCTP            IPPROTO_SCTP
   IPPROTO_UDPLITE = 136,        /* UDP-Lite (RFC 3828)                  */
-
-  IPPROTO_RAW    = 255,         /* Raw IP packets                       */
+#define IPPROTO_UDPLITE         IPPROTO_UDPLITE
+  IPPROTO_RAW = 255,            /* Raw IP packets                       */
+#define IPPROTO_RAW             IPPROTO_RAW
   IPPROTO_MAX
 };
 
diff --git a/include/uapi/linux/in6.h b/include/uapi/linux/in6.h
index 53b1d56a6e7f..440d5c479145 100644
--- a/include/uapi/linux/in6.h
+++ b/include/uapi/linux/in6.h
@@ -22,22 +22,30 @@
 #define _UAPI_LINUX_IN6_H
 
 #include <linux/types.h>
+#include <linux/libc-compat.h>
 
 /*
  *      IPv6 address structure
  */
 
+#if __UAPI_DEF_IN6_ADDR
 struct in6_addr {
         union {
                 __u8            u6_addr8[16];
+#if __UAPI_DEF_IN6_ADDR_ALT
                 __be16          u6_addr16[8];
                 __be32          u6_addr32[4];
+#endif
         } in6_u;
 #define s6_addr                 in6_u.u6_addr8
+#if __UAPI_DEF_IN6_ADDR_ALT
 #define s6_addr16               in6_u.u6_addr16
 #define s6_addr32               in6_u.u6_addr32
+#endif
 };
+#endif /* __UAPI_DEF_IN6_ADDR */
 
+#if __UAPI_DEF_SOCKADDR_IN6
 struct sockaddr_in6 {
         unsigned short int      sin6_family;    /* AF_INET6 */
         __be16                  sin6_port;      /* Transport layer port # */
@@ -45,7 +53,9 @@ struct sockaddr_in6 {
         struct in6_addr         sin6_addr;      /* IPv6 address */
         __u32                   sin6_scope_id;  /* scope id (new in RFC2553) */
 };
+#endif /* __UAPI_DEF_SOCKADDR_IN6 */
 
+#if __UAPI_DEF_IPV6_MREQ
 struct ipv6_mreq {
         /* IPv6 multicast address of group */
         struct in6_addr ipv6mr_multiaddr;
@@ -53,6 +63,7 @@ struct ipv6_mreq {
         /* local IPv6 address of interface */
         int             ipv6mr_ifindex;
 };
+#endif /* __UAPI_DEF_IVP6_MREQ */
 
 #define ipv6mr_acaddr   ipv6mr_multiaddr
 
@@ -114,13 +125,24 @@ struct in6_flowlabel_req {
 /*
  *      IPV6 extension headers
  */
-#define IPPROTO_HOPOPTS         0       /* IPv6 hop-by-hop options      */
-#define IPPROTO_ROUTING         43      /* IPv6 routing header          */
-#define IPPROTO_FRAGMENT        44      /* IPv6 fragmentation header    */
-#define IPPROTO_ICMPV6          58      /* ICMPv6                       */
-#define IPPROTO_NONE            59      /* IPv6 no next header          */
-#define IPPROTO_DSTOPTS         60      /* IPv6 destination options     */
-#define IPPROTO_MH              135     /* IPv6 mobility header         */
+#if __UAPI_DEF_IPPROTO_V6
+enum {
+  IPPROTO_HOPOPTS = 0,          /* IPv6 hop-by-hop options      */
+#define IPPROTO_HOPOPTS         IPPROTO_HOPOPTS
+  IPPROTO_ROUTING = 43,         /* IPv6 routing header          */
+#define IPPROTO_ROUTING         IPPROTO_ROUTING
+  IPPROTO_FRAGMENT = 44,        /* IPv6 fragmentation header    */
+#define IPPROTO_FRAGMENT        IPPROTO_FRAGMENT
+  IPPROTO_ICMPV6 = 58,          /* ICMPv6                       */
+#define IPPROTO_ICMPV6          IPPROTO_ICMPV6
+  IPPROTO_NONE = 59,            /* IPv6 no next header          */
+#define IPPROTO_NONE            IPPROTO_NONE
+  IPPROTO_DSTOPTS = 60,         /* IPv6 destination options     */
+#define IPPROTO_DSTOPTS         IPPROTO_DSTOPTS
+  IPPROTO_MH = 135,             /* IPv6 mobility header         */
+#define IPPROTO_MH              IPPROTO_MH
+};
+#endif /* __UAPI_DEF_IPPROTO_V6 */
 
 /*
  *      IPv6 TLV options.
diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h
index d584047b072b..d08abf9101d2 100644
--- a/include/uapi/linux/input.h
+++ b/include/uapi/linux/input.h
@@ -194,6 +194,8 @@ struct input_keymap_entry {
 #define SYN_CONFIG              1
 #define SYN_MT_REPORT           2
 #define SYN_DROPPED             3
+#define SYN_MAX                 0xf
+#define SYN_CNT                 (SYN_MAX+1)
 
 /*
  * Keys and buttons
diff --git a/include/uapi/linux/ip.h b/include/uapi/linux/ip.h
index 2fee45bdec0a..411959405ab6 100644
--- a/include/uapi/linux/ip.h
+++ b/include/uapi/linux/ip.h
@@ -162,6 +162,8 @@ enum
         IPV4_DEVCONF_SRC_VMARK,
         IPV4_DEVCONF_PROXY_ARP_PVLAN,
         IPV4_DEVCONF_ROUTE_LOCALNET,
+        IPV4_DEVCONF_IGMPV2_UNSOLICITED_REPORT_INTERVAL,
+        IPV4_DEVCONF_IGMPV3_UNSOLICITED_REPORT_INTERVAL,
         __IPV4_DEVCONF_MAX
 };
 
diff --git a/include/uapi/linux/ipv6.h b/include/uapi/linux/ipv6.h
index 4bda4cf5b0f5..593b0e32d956 100644
--- a/include/uapi/linux/ipv6.h
+++ b/include/uapi/linux/ipv6.h
@@ -160,6 +160,9 @@ enum {
         DEVCONF_ACCEPT_DAD,
         DEVCONF_FORCE_TLLAO,
         DEVCONF_NDISC_NOTIFY,
+        DEVCONF_MLDV1_UNSOLICITED_REPORT_INTERVAL,
+        DEVCONF_MLDV2_UNSOLICITED_REPORT_INTERVAL,
+        DEVCONF_SUPPRESS_FRAG_NDISC,
         DEVCONF_MAX
 };
 
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index acccd08be6c7..99c25338ede8 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -667,6 +667,7 @@ struct kvm_ppc_smmu_info {
 #define KVM_CAP_PPC_RTAS 91
 #define KVM_CAP_IRQ_XICS 92
 #define KVM_CAP_ARM_EL1_32BIT 93
+#define KVM_CAP_SPAPR_MULTITCE 94
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
diff --git a/include/uapi/linux/kvm_para.h b/include/uapi/linux/kvm_para.h
index cea2c5c72d26..2841f86eae0b 100644
--- a/include/uapi/linux/kvm_para.h
+++ b/include/uapi/linux/kvm_para.h
@@ -19,6 +19,7 @@
 #define KVM_HC_MMU_OP                   2
 #define KVM_HC_FEATURES                 3
 #define KVM_HC_PPC_MAP_MAGIC_PAGE       4
+#define KVM_HC_KICK_CPU                 5
 
 /*
  * hypercalls use architecture specific
diff --git a/include/uapi/linux/libc-compat.h b/include/uapi/linux/libc-compat.h
new file mode 100644
index 000000000000..335e8a7cad39
--- /dev/null
+++ b/include/uapi/linux/libc-compat.h
@@ -0,0 +1,103 @@
+/*
+ * Compatibility interface for userspace libc header coordination:
+ *
+ * Define compatibility macros that are used to control the inclusion or
+ * exclusion of UAPI structures and definitions in coordination with another
+ * userspace C library.
+ *
+ * This header is intended to solve the problem of UAPI definitions that
+ * conflict with userspace definitions. If a UAPI header has such conflicting
+ * definitions then the solution is as follows:
+ *
+ * * Synchronize the UAPI header and the libc headers so either one can be
+ *   used and such that the ABI is preserved. If this is not possible then
+ *   no simple compatibility interface exists (you need to write translating
+ *   wrappers and rename things) and you can't use this interface.
+ *
+ * Then follow this process:
+ *
+ * (a) Include libc-compat.h in the UAPI header.
+ *      e.g. #include <linux/libc-compat.h>
+ *     This include must be as early as possible.
+ *
+ * (b) In libc-compat.h add enough code to detect that the comflicting
+ *     userspace libc header has been included first.
+ *
+ * (c) If the userspace libc header has been included first define a set of
+ *     guard macros of the form __UAPI_DEF_FOO and set their values to 1, else
+ *     set their values to 0.
+ *
+ * (d) Back in the UAPI header with the conflicting definitions, guard the
+ *     definitions with:
+ *     #if __UAPI_DEF_FOO
+ *       ...
+ *     #endif
+ *
+ * This fixes the situation where the linux headers are included *after* the
+ * libc headers. To fix the problem with the inclusion in the other order the
+ * userspace libc headers must be fixed like this:
+ *
+ * * For all definitions that conflict with kernel definitions wrap those
+ *   defines in the following:
+ *   #if !__UAPI_DEF_FOO
+ *     ...
+ *   #endif
+ *
+ * This prevents the redefinition of a construct already defined by the kernel.
+ */
+#ifndef _UAPI_LIBC_COMPAT_H
+#define _UAPI_LIBC_COMPAT_H
+
+/* We have included glibc headers... */
+#if defined(__GLIBC__)
+
+/* Coordinate with glibc netinet/in.h header. */
+#if defined(_NETINET_IN_H)
+
+/* GLIBC headers included first so don't define anything
+ * that would already be defined. */
+#define __UAPI_DEF_IN6_ADDR             0
+/* The exception is the in6_addr macros which must be defined
+ * if the glibc code didn't define them. This guard matches
+ * the guard in glibc/inet/netinet/in.h which defines the
+ * additional in6_addr macros e.g. s6_addr16, and s6_addr32. */
+#if defined(__USE_MISC) || defined (__USE_GNU)
+#define __UAPI_DEF_IN6_ADDR_ALT         0
+#else
+#define __UAPI_DEF_IN6_ADDR_ALT         1
+#endif
+#define __UAPI_DEF_SOCKADDR_IN6         0
+#define __UAPI_DEF_IPV6_MREQ            0
+#define __UAPI_DEF_IPPROTO_V6           0
+
+#else
+
+/* Linux headers included first, and we must define everything
+ * we need. The expectation is that glibc will check the
+ * __UAPI_DEF_* defines and adjust appropriately. */
+#define __UAPI_DEF_IN6_ADDR             1
+/* We unconditionally define the in6_addr macros and glibc must
+ * coordinate. */
+#define __UAPI_DEF_IN6_ADDR_ALT         1
+#define __UAPI_DEF_SOCKADDR_IN6         1
+#define __UAPI_DEF_IPV6_MREQ            1
+#define __UAPI_DEF_IPPROTO_V6           1
+
+#endif /* _NETINET_IN_H */
+
+
+/* If we did not see any headers from any supported C libraries,
+ * or we are being included in the kernel, then define everything
+ * that we need. */
+#else /* !defined(__GLIBC__) */
+
+/* Definitions for in6.h */
+#define __UAPI_DEF_IN6_ADDR             1
+#define __UAPI_DEF_IN6_ADDR_ALT         1
+#define __UAPI_DEF_SOCKADDR_IN6         1
+#define __UAPI_DEF_IPV6_MREQ            1
+#define __UAPI_DEF_IPPROTO_V6           1
+
+#endif /* __GLIBC__ */
+
+#endif /* _UAPI_LIBC_COMPAT_H */
diff --git a/include/uapi/linux/netfilter/Kbuild b/include/uapi/linux/netfilter/Kbuild
index 41115776d76f..174915420d3f 100644
--- a/include/uapi/linux/netfilter/Kbuild
+++ b/include/uapi/linux/netfilter/Kbuild
@@ -22,6 +22,7 @@ header-y += xt_CONNMARK.h
 header-y += xt_CONNSECMARK.h
 header-y += xt_CT.h
 header-y += xt_DSCP.h
+header-y += xt_HMARK.h
 header-y += xt_IDLETIMER.h
 header-y += xt_LED.h
 header-y += xt_LOG.h
@@ -68,6 +69,7 @@ header-y += xt_quota.h
 header-y += xt_rateest.h
 header-y += xt_realm.h
 header-y += xt_recent.h
+header-y += xt_rpfilter.h
 header-y += xt_sctp.h
 header-y += xt_set.h
 header-y += xt_socket.h
diff --git a/include/uapi/linux/netfilter/nf_conntrack_common.h b/include/uapi/linux/netfilter/nf_conntrack_common.h
index d69483fb3825..8dd803818ebe 100644
--- a/include/uapi/linux/netfilter/nf_conntrack_common.h
+++ b/include/uapi/linux/netfilter/nf_conntrack_common.h
@@ -99,7 +99,8 @@ enum ip_conntrack_events {
         IPCT_PROTOINFO,         /* protocol information has changed */
         IPCT_HELPER,            /* new helper has been set */
         IPCT_MARK,              /* new mark has been set */
-        IPCT_NATSEQADJ,         /* NAT is doing sequence adjustment */
+        IPCT_SEQADJ,            /* sequence adjustment has changed */
+        IPCT_NATSEQADJ = IPCT_SEQADJ,
         IPCT_SECMARK,           /* new security mark has been set */
         IPCT_LABEL,             /* new connlabel has been set */
 };
diff --git a/include/uapi/linux/netfilter/nfnetlink_conntrack.h b/include/uapi/linux/netfilter/nfnetlink_conntrack.h
index 08fabc6c93f3..acad6c52a652 100644
--- a/include/uapi/linux/netfilter/nfnetlink_conntrack.h
+++ b/include/uapi/linux/netfilter/nfnetlink_conntrack.h
@@ -42,8 +42,10 @@ enum ctattr_type {
         CTA_ID,
         CTA_NAT_DST,
         CTA_TUPLE_MASTER,
-        CTA_NAT_SEQ_ADJ_ORIG,
-        CTA_NAT_SEQ_ADJ_REPLY,
+        CTA_SEQ_ADJ_ORIG,
+        CTA_NAT_SEQ_ADJ_ORIG    = CTA_SEQ_ADJ_ORIG,
+        CTA_SEQ_ADJ_REPLY,
+        CTA_NAT_SEQ_ADJ_REPLY   = CTA_SEQ_ADJ_REPLY,
         CTA_SECMARK,            /* obsolete */
         CTA_ZONE,
         CTA_SECCTX,
@@ -165,6 +167,15 @@ enum ctattr_protonat {
 };
 #define CTA_PROTONAT_MAX (__CTA_PROTONAT_MAX - 1)
 
+enum ctattr_seqadj {
+        CTA_SEQADJ_UNSPEC,
+        CTA_SEQADJ_CORRECTION_POS,
+        CTA_SEQADJ_OFFSET_BEFORE,
+        CTA_SEQADJ_OFFSET_AFTER,
+        __CTA_SEQADJ_MAX
+};
+#define CTA_SEQADJ_MAX (__CTA_SEQADJ_MAX - 1)
+
 enum ctattr_natseq {
         CTA_NAT_SEQ_UNSPEC,
         CTA_NAT_SEQ_CORRECTION_POS,
diff --git a/include/uapi/linux/netfilter/nfnetlink_queue.h b/include/uapi/linux/netfilter/nfnetlink_queue.h
index 3a9b92147339..0132bad79de7 100644
--- a/include/uapi/linux/netfilter/nfnetlink_queue.h
+++ b/include/uapi/linux/netfilter/nfnetlink_queue.h
@@ -46,6 +46,7 @@ enum nfqnl_attr_type {
         NFQA_CT_INFO,                   /* enum ip_conntrack_info */
         NFQA_CAP_LEN,                   /* __u32 length of captured packet */
         NFQA_SKB_INFO,                  /* __u32 skb meta information */
+        NFQA_EXP,                       /* nf_conntrack_netlink.h */
 
         __NFQA_MAX
 };
diff --git a/include/uapi/linux/netfilter/xt_HMARK.h b/include/uapi/linux/netfilter/xt_HMARK.h
new file mode 100644
index 000000000000..826fc5807577
--- /dev/null
+++ b/include/uapi/linux/netfilter/xt_HMARK.h
@@ -0,0 +1,50 @@
+#ifndef XT_HMARK_H_
+#define XT_HMARK_H_
+
+#include <linux/types.h>
+
+enum {
+        XT_HMARK_SADDR_MASK,
+        XT_HMARK_DADDR_MASK,
+        XT_HMARK_SPI,
+        XT_HMARK_SPI_MASK,
+        XT_HMARK_SPORT,
+        XT_HMARK_DPORT,
+        XT_HMARK_SPORT_MASK,
+        XT_HMARK_DPORT_MASK,
+        XT_HMARK_PROTO_MASK,
+        XT_HMARK_RND,
+        XT_HMARK_MODULUS,
+        XT_HMARK_OFFSET,
+        XT_HMARK_CT,
+        XT_HMARK_METHOD_L3,
+        XT_HMARK_METHOD_L3_4,
+};
+#define XT_HMARK_FLAG(flag)     (1 << flag)
+
+union hmark_ports {
+        struct {
+                __u16   src;
+                __u16   dst;
+        } p16;
+        struct {
+                __be16  src;
+                __be16  dst;
+        } b16;
+        __u32   v32;
+        __be32  b32;
+};
+
+struct xt_hmark_info {
+        union nf_inet_addr      src_mask;
+        union nf_inet_addr      dst_mask;
+        union hmark_ports       port_mask;
+        union hmark_ports       port_set;
+        __u32                   flags;
+        __u16                   proto_mask;
+        __u32                   hashrnd;
+        __u32                   hmodulus;
+        __u32                   hoffset;        /* Mark offset to start from */
+};
+
+#endif /* XT_HMARK_H_ */
diff --git a/include/uapi/linux/netfilter/xt_SYNPROXY.h b/include/uapi/linux/netfilter/xt_SYNPROXY.h
new file mode 100644
index 000000000000..2d59fbaa93c6
--- /dev/null
+++ b/include/uapi/linux/netfilter/xt_SYNPROXY.h
@@ -0,0 +1,16 @@
+#ifndef _XT_SYNPROXY_H
+#define _XT_SYNPROXY_H
+
+#define XT_SYNPROXY_OPT_MSS             0x01
+#define XT_SYNPROXY_OPT_WSCALE          0x02
+#define XT_SYNPROXY_OPT_SACK_PERM       0x04
+#define XT_SYNPROXY_OPT_TIMESTAMP       0x08
+#define XT_SYNPROXY_OPT_ECN             0x10
+
+struct xt_synproxy_info {
+        __u8    options;
+        __u8    wscale;
+        __u16   mss;
+};
+
+#endif /* _XT_SYNPROXY_H */
diff --git a/include/uapi/linux/netfilter/xt_rpfilter.h b/include/uapi/linux/netfilter/xt_rpfilter.h
new file mode 100644
index 000000000000..8358d4f71952
--- /dev/null
+++ b/include/uapi/linux/netfilter/xt_rpfilter.h
@@ -0,0 +1,23 @@
+#ifndef _XT_RPATH_H
+#define _XT_RPATH_H
+
+#include <linux/types.h>
+
+enum {
+        XT_RPFILTER_LOOSE = 1 << 0,
+        XT_RPFILTER_VALID_MARK = 1 << 1,
+        XT_RPFILTER_ACCEPT_LOCAL = 1 << 2,
+        XT_RPFILTER_INVERT = 1 << 3,
+#ifdef __KERNEL__
+        XT_RPFILTER_OPTION_MASK = XT_RPFILTER_LOOSE |
+                                  XT_RPFILTER_VALID_MARK |
+                                  XT_RPFILTER_ACCEPT_LOCAL |
+                                  XT_RPFILTER_INVERT,
+#endif
+};
+
+struct xt_rpfilter_info {
+        __u8 flags;
+};
+
+#endif
diff --git a/include/uapi/linux/netfilter_bridge/ebt_802_3.h b/include/uapi/linux/netfilter_bridge/ebt_802_3.h
index 5bf84912a082..f37522aade24 100644
--- a/include/uapi/linux/netfilter_bridge/ebt_802_3.h
+++ b/include/uapi/linux/netfilter_bridge/ebt_802_3.h
@@ -2,6 +2,7 @@
 #define _UAPI__LINUX_BRIDGE_EBT_802_3_H
 
 #include <linux/types.h>
+#include <linux/if_ether.h>
 
 #define EBT_802_3_SAP 0x01
 #define EBT_802_3_TYPE 0x02
@@ -42,8 +43,8 @@ struct hdr_ni {
 };
 
 struct ebt_802_3_hdr {
-        __u8  daddr[6];
-        __u8  saddr[6];
+        __u8  daddr[ETH_ALEN];
+        __u8  saddr[ETH_ALEN];
         __be16 len;
         union {
                 struct hdr_ui ui;
diff --git a/include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h b/include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h
index c6a204c97047..eac0f6548f47 100644
--- a/include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h
+++ b/include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h
@@ -2,6 +2,7 @@
 #define _IPT_CLUSTERIP_H_target
 
 #include <linux/types.h>
+#include <linux/if_ether.h>
 
 enum clusterip_hashmode {
     CLUSTERIP_HASHMODE_SIP = 0,
@@ -22,7 +23,7 @@ struct ipt_clusterip_tgt_info {
         __u32 flags;
 
         /* only relevant for new ones */
-        __u8 clustermac[6];
+        __u8 clustermac[ETH_ALEN];
         __u16 num_total_nodes;
         __u16 num_local_nodes;
         __u16 local_nodes[CLUSTERIP_MAX_NODES];
diff --git a/include/uapi/linux/nfc.h b/include/uapi/linux/nfc.h
index 8137dd8d2adf..29bed72a4ac4 100644
--- a/include/uapi/linux/nfc.h
+++ b/include/uapi/linux/nfc.h
@@ -71,6 +71,20 @@
  * @NFC_CMD_DISABLE_SE: Disable the physical link to a specific secure element.
  * @NFC_CMD_FW_DOWNLOAD: Request to Load/flash firmware, or event to inform
  *      that some firmware was loaded
+ * @NFC_EVENT_SE_ADDED: Event emitted when a new secure element is discovered.
+ *      This typically will be sent whenever a new NFC controller with either
+ *      an embedded SE or an UICC one connected to it through SWP.
+ * @NFC_EVENT_SE_REMOVED: Event emitted when a secure element is removed from
+ *      the system, as a consequence of e.g. an NFC controller being unplugged.
+ * @NFC_EVENT_SE_CONNECTIVITY: This event is emitted whenever a secure element
+ *      is requesting connectivity access. For example a UICC SE may need to
+ *      talk with a sleeping modem and will notify this need by sending this
+ *      event. It is then up to userspace to decide if it will wake the modem
+ *      up or not.
+ * @NFC_EVENT_SE_TRANSACTION: This event is sent when an application running on
+ *      a specific SE notifies us about the end of a transaction. The parameter
+ *      for this event is the application ID (AID).
+ * @NFC_CMD_GET_SE: Dump all discovered secure elements from an NFC controller.
  */
 enum nfc_commands {
         NFC_CMD_UNSPEC,
@@ -97,6 +111,9 @@ enum nfc_commands {
         NFC_CMD_FW_DOWNLOAD,
         NFC_EVENT_SE_ADDED,
         NFC_EVENT_SE_REMOVED,
+        NFC_EVENT_SE_CONNECTIVITY,
+        NFC_EVENT_SE_TRANSACTION,
+        NFC_CMD_GET_SE,
 /* private: internal use only */
         __NFC_CMD_AFTER_LAST
 };
@@ -129,6 +146,7 @@ enum nfc_commands {
  * @NFC_ATTR_FIRMWARE_NAME: Free format firmware version
  * @NFC_ATTR_SE_INDEX: Secure element index
  * @NFC_ATTR_SE_TYPE: Secure element type (UICC or EMBEDDED)
+ * @NFC_ATTR_FIRMWARE_DOWNLOAD_STATUS: Firmware download operation status
  */
 enum nfc_attrs {
         NFC_ATTR_UNSPEC,
@@ -154,6 +172,8 @@ enum nfc_attrs {
         NFC_ATTR_FIRMWARE_NAME,
         NFC_ATTR_SE_INDEX,
         NFC_ATTR_SE_TYPE,
+        NFC_ATTR_SE_AID,
+        NFC_ATTR_FIRMWARE_DOWNLOAD_STATUS,
 /* private: internal use only */
         __NFC_ATTR_AFTER_LAST
 };
diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index 861e5eba3953..fde2c021b26d 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -126,6 +126,31 @@
  */
 
 /**
+ * DOC: packet coalesce support
+ *
+ * In most cases, host that receives IPv4 and IPv6 multicast/broadcast
+ * packets does not do anything with these packets. Therefore the
+ * reception of these unwanted packets causes unnecessary processing
+ * and power consumption.
+ *
+ * Packet coalesce feature helps to reduce number of received interrupts
+ * to host by buffering these packets in firmware/hardware for some
+ * predefined time. Received interrupt will be generated when one of the
+ * following events occur.
+ * a) Expiration of hardware timer whose expiration time is set to maximum
+ * coalescing delay of matching coalesce rule.
+ * b) Coalescing buffer in hardware reaches it's limit.
+ * c) Packet doesn't match any of the configured coalesce rules.
+ *
+ * User needs to configure following parameters for creating a coalesce
+ * rule.
+ * a) Maximum coalescing delay
+ * b) List of packet patterns which needs to be matched
+ * c) Condition for coalescence. pattern 'match' or 'no match'
+ * Multiple such rules can be created.
+ */
+
+/**
  * enum nl80211_commands - supported nl80211 commands
  *
  * @NL80211_CMD_UNSPEC: unspecified command to catch errors
@@ -648,6 +673,19 @@
  * @NL80211_CMD_CRIT_PROTOCOL_STOP: Indicates the connection reliability can
  *      return back to normal.
  *
+ * @NL80211_CMD_GET_COALESCE: Get currently supported coalesce rules.
+ * @NL80211_CMD_SET_COALESCE: Configure coalesce rules or clear existing rules.
+ *
+ * @NL80211_CMD_CHANNEL_SWITCH: Perform a channel switch by announcing the
+ *      the new channel information (Channel Switch Announcement - CSA)
+ *      in the beacon for some time (as defined in the
+ *      %NL80211_ATTR_CH_SWITCH_COUNT parameter) and then change to the
+ *      new channel. Userspace provides the new channel information (using
+ *      %NL80211_ATTR_WIPHY_FREQ and the attributes determining channel
+ *      width). %NL80211_ATTR_CH_SWITCH_BLOCK_TX may be supplied to inform
+ *      other station that transmission must be blocked until the channel
+ *      switch is complete.
+ *
  * @NL80211_CMD_MAX: highest used command number
  * @__NL80211_CMD_AFTER_LAST: internal use
  */
@@ -810,6 +848,11 @@ enum nl80211_commands {
         NL80211_CMD_CRIT_PROTOCOL_START,
         NL80211_CMD_CRIT_PROTOCOL_STOP,
 
+        NL80211_CMD_GET_COALESCE,
+        NL80211_CMD_SET_COALESCE,
+
+        NL80211_CMD_CHANNEL_SWITCH,
+
         /* add new commands above here */
 
         /* used to define NL80211_CMD_MAX below */
@@ -1436,6 +1479,23 @@ enum nl80211_commands {
  *      allowed to be used with the first @NL80211_CMD_SET_STATION command to
  *      update a TDLS peer STA entry.
  *
+ * @NL80211_ATTR_COALESCE_RULE: Coalesce rule information.
+ *
+ * @NL80211_ATTR_CH_SWITCH_COUNT: u32 attribute specifying the number of TBTT's
+ *      until the channel switch event.
+ * @NL80211_ATTR_CH_SWITCH_BLOCK_TX: flag attribute specifying that transmission
+ *      must be blocked on the current channel (before the channel switch
+ *      operation).
+ * @NL80211_ATTR_CSA_IES: Nested set of attributes containing the IE information
+ *      for the time while performing a channel switch.
+ * @NL80211_ATTR_CSA_C_OFF_BEACON: Offset of the channel switch counter
+ *      field in the beacons tail (%NL80211_ATTR_BEACON_TAIL).
+ * @NL80211_ATTR_CSA_C_OFF_PRESP: Offset of the channel switch counter
+ *      field in the probe response (%NL80211_ATTR_PROBE_RESP).
+ *
+ * @NL80211_ATTR_RXMGMT_FLAGS: flags for nl80211_send_mgmt(), u32.
+ *      As specified in the &enum nl80211_rxmgmt_flags.
+ *
  * @NL80211_ATTR_MAX: highest attribute number currently defined
  * @__NL80211_ATTR_AFTER_LAST: internal use
  */
@@ -1736,6 +1796,16 @@ enum nl80211_attrs {
 
         NL80211_ATTR_PEER_AID,
 
+        NL80211_ATTR_COALESCE_RULE,
+
+        NL80211_ATTR_CH_SWITCH_COUNT,
+        NL80211_ATTR_CH_SWITCH_BLOCK_TX,
+        NL80211_ATTR_CSA_IES,
+        NL80211_ATTR_CSA_C_OFF_BEACON,
+        NL80211_ATTR_CSA_C_OFF_PRESP,
+
+        NL80211_ATTR_RXMGMT_FLAGS,
+
         /* add attributes here, update the policy in nl80211.c */
 
         __NL80211_ATTR_AFTER_LAST,
@@ -2773,6 +2843,21 @@ enum nl80211_chan_width {
 };
 
 /**
+ * enum nl80211_bss_scan_width - control channel width for a BSS
+ *
+ * These values are used with the %NL80211_BSS_CHAN_WIDTH attribute.
+ *
+ * @NL80211_BSS_CHAN_WIDTH_20: control channel is 20 MHz wide or compatible
+ * @NL80211_BSS_CHAN_WIDTH_10: control channel is 10 MHz wide
+ * @NL80211_BSS_CHAN_WIDTH_5: control channel is 5 MHz wide
+ */
+enum nl80211_bss_scan_width {
+        NL80211_BSS_CHAN_WIDTH_20,
+        NL80211_BSS_CHAN_WIDTH_10,
+        NL80211_BSS_CHAN_WIDTH_5,
+};
+
+/**
  * enum nl80211_bss - netlink attributes for a BSS
  *
  * @__NL80211_BSS_INVALID: invalid
@@ -2796,6 +2881,8 @@ enum nl80211_chan_width {
  * @NL80211_BSS_BEACON_IES: binary attribute containing the raw information
  *      elements from a Beacon frame (bin); not present if no Beacon frame has
  *      yet been received
+ * @NL80211_BSS_CHAN_WIDTH: channel width of the control channel
+ *      (u32, enum nl80211_bss_scan_width)
  * @__NL80211_BSS_AFTER_LAST: internal
  * @NL80211_BSS_MAX: highest BSS attribute
  */
@@ -2812,6 +2899,7 @@ enum nl80211_bss {
         NL80211_BSS_STATUS,
         NL80211_BSS_SEEN_MS_AGO,
         NL80211_BSS_BEACON_IES,
+        NL80211_BSS_CHAN_WIDTH,
 
         /* keep last */
         __NL80211_BSS_AFTER_LAST,
@@ -3060,11 +3148,11 @@ enum nl80211_tx_power_setting {
 };
 
 /**
- * enum nl80211_wowlan_packet_pattern_attr - WoWLAN packet pattern attribute
- * @__NL80211_WOWLAN_PKTPAT_INVALID: invalid number for nested attribute
- * @NL80211_WOWLAN_PKTPAT_PATTERN: the pattern, values where the mask has
+ * enum nl80211_packet_pattern_attr - packet pattern attribute
+ * @__NL80211_PKTPAT_INVALID: invalid number for nested attribute
+ * @NL80211_PKTPAT_PATTERN: the pattern, values where the mask has
  *      a zero bit are ignored
- * @NL80211_WOWLAN_PKTPAT_MASK: pattern mask, must be long enough to have
+ * @NL80211_PKTPAT_MASK: pattern mask, must be long enough to have
  *      a bit for each byte in the pattern. The lowest-order bit corresponds
  *      to the first byte of the pattern, but the bytes of the pattern are
  *      in a little-endian-like format, i.e. the 9th byte of the pattern
@@ -3075,39 +3163,50 @@ enum nl80211_tx_power_setting {
  *      Note that the pattern matching is done as though frames were not
  *      802.11 frames but 802.3 frames, i.e. the frame is fully unpacked
  *      first (including SNAP header unpacking) and then matched.
- * @NL80211_WOWLAN_PKTPAT_OFFSET: packet offset, pattern is matched after
+ * @NL80211_PKTPAT_OFFSET: packet offset, pattern is matched after
  *      these fixed number of bytes of received packet
- * @NUM_NL80211_WOWLAN_PKTPAT: number of attributes
- * @MAX_NL80211_WOWLAN_PKTPAT: max attribute number
+ * @NUM_NL80211_PKTPAT: number of attributes
+ * @MAX_NL80211_PKTPAT: max attribute number
  */
-enum nl80211_wowlan_packet_pattern_attr {
-        __NL80211_WOWLAN_PKTPAT_INVALID,
-        NL80211_WOWLAN_PKTPAT_MASK,
-        NL80211_WOWLAN_PKTPAT_PATTERN,
-        NL80211_WOWLAN_PKTPAT_OFFSET,
+enum nl80211_packet_pattern_attr {
+        __NL80211_PKTPAT_INVALID,
+        NL80211_PKTPAT_MASK,
+        NL80211_PKTPAT_PATTERN,
+        NL80211_PKTPAT_OFFSET,
 
-        NUM_NL80211_WOWLAN_PKTPAT,
-        MAX_NL80211_WOWLAN_PKTPAT = NUM_NL80211_WOWLAN_PKTPAT - 1,
+        NUM_NL80211_PKTPAT,
+        MAX_NL80211_PKTPAT = NUM_NL80211_PKTPAT - 1,
 };
 
 /**
- * struct nl80211_wowlan_pattern_support - pattern support information
+ * struct nl80211_pattern_support - packet pattern support information
  * @max_patterns: maximum number of patterns supported
  * @min_pattern_len: minimum length of each pattern
  * @max_pattern_len: maximum length of each pattern
  * @max_pkt_offset: maximum Rx packet offset
  *
  * This struct is carried in %NL80211_WOWLAN_TRIG_PKT_PATTERN when
- * that is part of %NL80211_ATTR_WOWLAN_TRIGGERS_SUPPORTED in the
- * capability information given by the kernel to userspace.
+ * that is part of %NL80211_ATTR_WOWLAN_TRIGGERS_SUPPORTED or in
+ * %NL80211_ATTR_COALESCE_RULE_PKT_PATTERN when that is part of
+ * %NL80211_ATTR_COALESCE_RULE in the capability information given
+ * by the kernel to userspace.
  */
-struct nl80211_wowlan_pattern_support {
+struct nl80211_pattern_support {
         __u32 max_patterns;
         __u32 min_pattern_len;
         __u32 max_pattern_len;
         __u32 max_pkt_offset;
 } __attribute__((packed));
 
+/* only for backward compatibility */
+#define __NL80211_WOWLAN_PKTPAT_INVALID __NL80211_PKTPAT_INVALID
+#define NL80211_WOWLAN_PKTPAT_MASK NL80211_PKTPAT_MASK
+#define NL80211_WOWLAN_PKTPAT_PATTERN NL80211_PKTPAT_PATTERN
+#define NL80211_WOWLAN_PKTPAT_OFFSET NL80211_PKTPAT_OFFSET
+#define NUM_NL80211_WOWLAN_PKTPAT NUM_NL80211_PKTPAT
+#define MAX_NL80211_WOWLAN_PKTPAT MAX_NL80211_PKTPAT
+#define nl80211_wowlan_pattern_support nl80211_pattern_support
+
 /**
  * enum nl80211_wowlan_triggers - WoWLAN trigger definitions
  * @__NL80211_WOWLAN_TRIG_INVALID: invalid number for nested attributes
@@ -3127,7 +3226,7 @@ struct nl80211_wowlan_pattern_support {
  *      pattern matching is done after the packet is converted to the MSDU.
  *
  *      In %NL80211_ATTR_WOWLAN_TRIGGERS_SUPPORTED, it is a binary attribute
- *      carrying a &struct nl80211_wowlan_pattern_support.
+ *      carrying a &struct nl80211_pattern_support.
  *
  *      When reporting wakeup. it is a u32 attribute containing the 0-based
  *      index of the pattern that caused the wakeup, in the patterns passed
@@ -3284,7 +3383,7 @@ struct nl80211_wowlan_tcp_data_token_feature {
  * @NL80211_WOWLAN_TCP_WAKE_PAYLOAD: wake packet payload, for advertising a
  *      u32 attribute holding the maximum length
  * @NL80211_WOWLAN_TCP_WAKE_MASK: Wake packet payload mask, not used for
- *      feature advertising. The mask works like @NL80211_WOWLAN_PKTPAT_MASK
+ *      feature advertising. The mask works like @NL80211_PKTPAT_MASK
  *      but on the TCP payload only.
  * @NUM_NL80211_WOWLAN_TCP: number of TCP attributes
  * @MAX_NL80211_WOWLAN_TCP: highest attribute number
@@ -3309,6 +3408,55 @@ enum nl80211_wowlan_tcp_attrs {
 };
 
 /**
+ * struct nl80211_coalesce_rule_support - coalesce rule support information
+ * @max_rules: maximum number of rules supported
+ * @pat: packet pattern support information
+ * @max_delay: maximum supported coalescing delay in msecs
+ *
+ * This struct is carried in %NL80211_ATTR_COALESCE_RULE in the
+ * capability information given by the kernel to userspace.
+ */
+struct nl80211_coalesce_rule_support {
+        __u32 max_rules;
+        struct nl80211_pattern_support pat;
+        __u32 max_delay;
+} __attribute__((packed));
+
+/**
+ * enum nl80211_attr_coalesce_rule - coalesce rule attribute
+ * @__NL80211_COALESCE_RULE_INVALID: invalid number for nested attribute
+ * @NL80211_ATTR_COALESCE_RULE_DELAY: delay in msecs used for packet coalescing
+ * @NL80211_ATTR_COALESCE_RULE_CONDITION: condition for packet coalescence,
+ *      see &enum nl80211_coalesce_condition.
+ * @NL80211_ATTR_COALESCE_RULE_PKT_PATTERN: packet offset, pattern is matched
+ *      after these fixed number of bytes of received packet
+ * @NUM_NL80211_ATTR_COALESCE_RULE: number of attributes
+ * @NL80211_ATTR_COALESCE_RULE_MAX: max attribute number
+ */
+enum nl80211_attr_coalesce_rule {
+        __NL80211_COALESCE_RULE_INVALID,
+        NL80211_ATTR_COALESCE_RULE_DELAY,
+        NL80211_ATTR_COALESCE_RULE_CONDITION,
+        NL80211_ATTR_COALESCE_RULE_PKT_PATTERN,
+
+        /* keep last */
+        NUM_NL80211_ATTR_COALESCE_RULE,
+        NL80211_ATTR_COALESCE_RULE_MAX = NUM_NL80211_ATTR_COALESCE_RULE - 1
+};
+
+/**
+ * enum nl80211_coalesce_condition - coalesce rule conditions
+ * @NL80211_COALESCE_CONDITION_MATCH: coalaesce Rx packets when patterns
+ *      in a rule are matched.
+ * @NL80211_COALESCE_CONDITION_NO_MATCH: coalesce Rx packets when patterns
+ *      in a rule are not matched.
+ */
+enum nl80211_coalesce_condition {
+        NL80211_COALESCE_CONDITION_MATCH,
+        NL80211_COALESCE_CONDITION_NO_MATCH
+};
+
+/**
  * enum nl80211_iface_limit_attrs - limit attributes
  * @NL80211_IFACE_LIMIT_UNSPEC: (reserved)
  * @NL80211_IFACE_LIMIT_MAX: maximum number of interfaces that
@@ -3758,4 +3906,15 @@ enum nl80211_crit_proto_id {
 /* maximum duration for critical protocol measures */
 #define NL80211_CRIT_PROTO_MAX_DURATION         5000 /* msec */
 
+/**
+ * enum nl80211_rxmgmt_flags - flags for received management frame.
+ *
+ * Used by cfg80211_rx_mgmt()
+ *
+ * @NL80211_RXMGMT_FLAG_ANSWERED: frame was answered by device/driver.
+ */
+enum nl80211_rxmgmt_flags {
+        NL80211_RXMGMT_FLAG_ANSWERED = 1 << 0,
+};
+
 #endif /* __LINUX_NL80211_H */
diff --git a/include/uapi/linux/nvme.h b/include/uapi/linux/nvme.h
new file mode 100644
index 000000000000..989c04e0c563
--- /dev/null
+++ b/include/uapi/linux/nvme.h
@@ -0,0 +1,477 @@
+/*
+ * Definitions for the NVM Express interface
+ * Copyright (c) 2011-2013, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef _UAPI_LINUX_NVME_H
+#define _UAPI_LINUX_NVME_H
+
+#include <linux/types.h>
+
+struct nvme_id_power_state {
+        __le16                  max_power;      /* centiwatts */
+        __u8                    rsvd2;
+        __u8                    flags;
+        __le32                  entry_lat;      /* microseconds */
+        __le32                  exit_lat;       /* microseconds */
+        __u8                    read_tput;
+        __u8                    read_lat;
+        __u8                    write_tput;
+        __u8                    write_lat;
+        __u8                    rsvd16[16];
+};
+
+enum {
+        NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
+        NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
+};
+
+struct nvme_id_ctrl {
+        __le16                  vid;
+        __le16                  ssvid;
+        char                    sn[20];
+        char                    mn[40];
+        char                    fr[8];
+        __u8                    rab;
+        __u8                    ieee[3];
+        __u8                    mic;
+        __u8                    mdts;
+        __u8                    rsvd78[178];
+        __le16                  oacs;
+        __u8                    acl;
+        __u8                    aerl;
+        __u8                    frmw;
+        __u8                    lpa;
+        __u8                    elpe;
+        __u8                    npss;
+        __u8                    rsvd264[248];
+        __u8                    sqes;
+        __u8                    cqes;
+        __u8                    rsvd514[2];
+        __le32                  nn;
+        __le16                  oncs;
+        __le16                  fuses;
+        __u8                    fna;
+        __u8                    vwc;
+        __le16                  awun;
+        __le16                  awupf;
+        __u8                    rsvd530[1518];
+        struct nvme_id_power_state      psd[32];
+        __u8                    vs[1024];
+};
+
+enum {
+        NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
+        NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
+        NVME_CTRL_ONCS_DSM                      = 1 << 2,
+};
+
+struct nvme_lbaf {
+        __le16                  ms;
+        __u8                    ds;
+        __u8                    rp;
+};
+
+struct nvme_id_ns {
+        __le64                  nsze;
+        __le64                  ncap;
+        __le64                  nuse;
+        __u8                    nsfeat;
+        __u8                    nlbaf;
+        __u8                    flbas;
+        __u8                    mc;
+        __u8                    dpc;
+        __u8                    dps;
+        __u8                    rsvd30[98];
+        struct nvme_lbaf        lbaf[16];
+        __u8                    rsvd192[192];
+        __u8                    vs[3712];
+};
+
+enum {
+        NVME_NS_FEAT_THIN       = 1 << 0,
+        NVME_LBAF_RP_BEST       = 0,
+        NVME_LBAF_RP_BETTER     = 1,
+        NVME_LBAF_RP_GOOD       = 2,
+        NVME_LBAF_RP_DEGRADED   = 3,
+};
+
+struct nvme_smart_log {
+        __u8                    critical_warning;
+        __u8                    temperature[2];
+        __u8                    avail_spare;
+        __u8                    spare_thresh;
+        __u8                    percent_used;
+        __u8                    rsvd6[26];
+        __u8                    data_units_read[16];
+        __u8                    data_units_written[16];
+        __u8                    host_reads[16];
+        __u8                    host_writes[16];
+        __u8                    ctrl_busy_time[16];
+        __u8                    power_cycles[16];
+        __u8                    power_on_hours[16];
+        __u8                    unsafe_shutdowns[16];
+        __u8                    media_errors[16];
+        __u8                    num_err_log_entries[16];
+        __u8                    rsvd192[320];
+};
+
+enum {
+        NVME_SMART_CRIT_SPARE           = 1 << 0,
+        NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
+        NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
+        NVME_SMART_CRIT_MEDIA           = 1 << 3,
+        NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
+};
+
+struct nvme_lba_range_type {
+        __u8                    type;
+        __u8                    attributes;
+        __u8                    rsvd2[14];
+        __u64                   slba;
+        __u64                   nlb;
+        __u8                    guid[16];
+        __u8                    rsvd48[16];
+};
+
+enum {
+        NVME_LBART_TYPE_FS      = 0x01,
+        NVME_LBART_TYPE_RAID    = 0x02,
+        NVME_LBART_TYPE_CACHE   = 0x03,
+        NVME_LBART_TYPE_SWAP    = 0x04,
+
+        NVME_LBART_ATTRIB_TEMP  = 1 << 0,
+        NVME_LBART_ATTRIB_HIDE  = 1 << 1,
+};
+
+/* I/O commands */
+
+enum nvme_opcode {
+        nvme_cmd_flush          = 0x00,
+        nvme_cmd_write          = 0x01,
+        nvme_cmd_read           = 0x02,
+        nvme_cmd_write_uncor    = 0x04,
+        nvme_cmd_compare        = 0x05,
+        nvme_cmd_dsm            = 0x09,
+};
+
+struct nvme_common_command {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __le32                  cdw2[2];
+        __le64                  metadata;
+        __le64                  prp1;
+        __le64                  prp2;
+        __le32                  cdw10[6];
+};
+
+struct nvme_rw_command {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __u64                   rsvd2;
+        __le64                  metadata;
+        __le64                  prp1;
+        __le64                  prp2;
+        __le64                  slba;
+        __le16                  length;
+        __le16                  control;
+        __le32                  dsmgmt;
+        __le32                  reftag;
+        __le16                  apptag;
+        __le16                  appmask;
+};
+
+enum {
+        NVME_RW_LR                      = 1 << 15,
+        NVME_RW_FUA                     = 1 << 14,
+        NVME_RW_DSM_FREQ_UNSPEC         = 0,
+        NVME_RW_DSM_FREQ_TYPICAL        = 1,
+        NVME_RW_DSM_FREQ_RARE           = 2,
+        NVME_RW_DSM_FREQ_READS          = 3,
+        NVME_RW_DSM_FREQ_WRITES         = 4,
+        NVME_RW_DSM_FREQ_RW             = 5,
+        NVME_RW_DSM_FREQ_ONCE           = 6,
+        NVME_RW_DSM_FREQ_PREFETCH       = 7,
+        NVME_RW_DSM_FREQ_TEMP           = 8,
+        NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
+        NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
+        NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
+        NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
+        NVME_RW_DSM_SEQ_REQ             = 1 << 6,
+        NVME_RW_DSM_COMPRESSED          = 1 << 7,
+};
+
+struct nvme_dsm_cmd {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __u64                   rsvd2[2];
+        __le64                  prp1;
+        __le64                  prp2;
+        __le32                  nr;
+        __le32                  attributes;
+        __u32                   rsvd12[4];
+};
+
+enum {
+        NVME_DSMGMT_IDR         = 1 << 0,
+        NVME_DSMGMT_IDW         = 1 << 1,
+        NVME_DSMGMT_AD          = 1 << 2,
+};
+
+struct nvme_dsm_range {
+        __le32                  cattr;
+        __le32                  nlb;
+        __le64                  slba;
+};
+
+/* Admin commands */
+
+enum nvme_admin_opcode {
+        nvme_admin_delete_sq            = 0x00,
+        nvme_admin_create_sq            = 0x01,
+        nvme_admin_get_log_page         = 0x02,
+        nvme_admin_delete_cq            = 0x04,
+        nvme_admin_create_cq            = 0x05,
+        nvme_admin_identify             = 0x06,
+        nvme_admin_abort_cmd            = 0x08,
+        nvme_admin_set_features         = 0x09,
+        nvme_admin_get_features         = 0x0a,
+        nvme_admin_async_event          = 0x0c,
+        nvme_admin_activate_fw          = 0x10,
+        nvme_admin_download_fw          = 0x11,
+        nvme_admin_format_nvm           = 0x80,
+        nvme_admin_security_send        = 0x81,
+        nvme_admin_security_recv        = 0x82,
+};
+
+enum {
+        NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
+        NVME_CQ_IRQ_ENABLED     = (1 << 1),
+        NVME_SQ_PRIO_URGENT     = (0 << 1),
+        NVME_SQ_PRIO_HIGH       = (1 << 1),
+        NVME_SQ_PRIO_MEDIUM     = (2 << 1),
+        NVME_SQ_PRIO_LOW        = (3 << 1),
+        NVME_FEAT_ARBITRATION   = 0x01,
+        NVME_FEAT_POWER_MGMT    = 0x02,
+        NVME_FEAT_LBA_RANGE     = 0x03,
+        NVME_FEAT_TEMP_THRESH   = 0x04,
+        NVME_FEAT_ERR_RECOVERY  = 0x05,
+        NVME_FEAT_VOLATILE_WC   = 0x06,
+        NVME_FEAT_NUM_QUEUES    = 0x07,
+        NVME_FEAT_IRQ_COALESCE  = 0x08,
+        NVME_FEAT_IRQ_CONFIG    = 0x09,
+        NVME_FEAT_WRITE_ATOMIC  = 0x0a,
+        NVME_FEAT_ASYNC_EVENT   = 0x0b,
+        NVME_FEAT_SW_PROGRESS   = 0x0c,
+        NVME_FWACT_REPL         = (0 << 3),
+        NVME_FWACT_REPL_ACTV    = (1 << 3),
+        NVME_FWACT_ACTV         = (2 << 3),
+};
+
+struct nvme_identify {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __u64                   rsvd2[2];
+        __le64                  prp1;
+        __le64                  prp2;
+        __le32                  cns;
+        __u32                   rsvd11[5];
+};
+
+struct nvme_features {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __u64                   rsvd2[2];
+        __le64                  prp1;
+        __le64                  prp2;
+        __le32                  fid;
+        __le32                  dword11;
+        __u32                   rsvd12[4];
+};
+
+struct nvme_create_cq {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __u32                   rsvd1[5];
+        __le64                  prp1;
+        __u64                   rsvd8;
+        __le16                  cqid;
+        __le16                  qsize;
+        __le16                  cq_flags;
+        __le16                  irq_vector;
+        __u32                   rsvd12[4];
+};
+
+struct nvme_create_sq {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __u32                   rsvd1[5];
+        __le64                  prp1;
+        __u64                   rsvd8;
+        __le16                  sqid;
+        __le16                  qsize;
+        __le16                  sq_flags;
+        __le16                  cqid;
+        __u32                   rsvd12[4];
+};
+
+struct nvme_delete_queue {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __u32                   rsvd1[9];
+        __le16                  qid;
+        __u16                   rsvd10;
+        __u32                   rsvd11[5];
+};
+
+struct nvme_download_firmware {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __u32                   rsvd1[5];
+        __le64                  prp1;
+        __le64                  prp2;
+        __le32                  numd;
+        __le32                  offset;
+        __u32                   rsvd12[4];
+};
+
+struct nvme_format_cmd {
+        __u8                    opcode;
+        __u8                    flags;
+        __u16                   command_id;
+        __le32                  nsid;
+        __u64                   rsvd2[4];
+        __le32                  cdw10;
+        __u32                   rsvd11[5];
+};
+
+struct nvme_command {
+        union {
+                struct nvme_common_command common;
+                struct nvme_rw_command rw;
+                struct nvme_identify identify;
+                struct nvme_features features;
+                struct nvme_create_cq create_cq;
+                struct nvme_create_sq create_sq;
+                struct nvme_delete_queue delete_queue;
+                struct nvme_download_firmware dlfw;
+                struct nvme_format_cmd format;
+                struct nvme_dsm_cmd dsm;
+        };
+};
+
+enum {
+        NVME_SC_SUCCESS                 = 0x0,
+        NVME_SC_INVALID_OPCODE          = 0x1,
+        NVME_SC_INVALID_FIELD           = 0x2,
+        NVME_SC_CMDID_CONFLICT          = 0x3,
+        NVME_SC_DATA_XFER_ERROR         = 0x4,
+        NVME_SC_POWER_LOSS              = 0x5,
+        NVME_SC_INTERNAL                = 0x6,
+        NVME_SC_ABORT_REQ               = 0x7,
+        NVME_SC_ABORT_QUEUE             = 0x8,
+        NVME_SC_FUSED_FAIL              = 0x9,
+        NVME_SC_FUSED_MISSING           = 0xa,
+        NVME_SC_INVALID_NS              = 0xb,
+        NVME_SC_CMD_SEQ_ERROR           = 0xc,
+        NVME_SC_LBA_RANGE               = 0x80,
+        NVME_SC_CAP_EXCEEDED            = 0x81,
+        NVME_SC_NS_NOT_READY            = 0x82,
+        NVME_SC_CQ_INVALID              = 0x100,
+        NVME_SC_QID_INVALID             = 0x101,
+        NVME_SC_QUEUE_SIZE              = 0x102,
+        NVME_SC_ABORT_LIMIT             = 0x103,
+        NVME_SC_ABORT_MISSING           = 0x104,
+        NVME_SC_ASYNC_LIMIT             = 0x105,
+        NVME_SC_FIRMWARE_SLOT           = 0x106,
+        NVME_SC_FIRMWARE_IMAGE          = 0x107,
+        NVME_SC_INVALID_VECTOR          = 0x108,
+        NVME_SC_INVALID_LOG_PAGE        = 0x109,
+        NVME_SC_INVALID_FORMAT          = 0x10a,
+        NVME_SC_BAD_ATTRIBUTES          = 0x180,
+        NVME_SC_WRITE_FAULT             = 0x280,
+        NVME_SC_READ_ERROR              = 0x281,
+        NVME_SC_GUARD_CHECK             = 0x282,
+        NVME_SC_APPTAG_CHECK            = 0x283,
+        NVME_SC_REFTAG_CHECK            = 0x284,
+        NVME_SC_COMPARE_FAILED          = 0x285,
+        NVME_SC_ACCESS_DENIED           = 0x286,
+};
+
+struct nvme_completion {
+        __le32  result;         /* Used by admin commands to return data */
+        __u32   rsvd;
+        __le16  sq_head;        /* how much of this queue may be reclaimed */
+        __le16  sq_id;          /* submission queue that generated this entry */
+        __u16   command_id;     /* of the command which completed */
+        __le16  status;         /* did the command fail, and if so, why? */
+};
+
+struct nvme_user_io {
+        __u8    opcode;
+        __u8    flags;
+        __u16   control;
+        __u16   nblocks;
+        __u16   rsvd;
+        __u64   metadata;
+        __u64   addr;
+        __u64   slba;
+        __u32   dsmgmt;
+        __u32   reftag;
+        __u16   apptag;
+        __u16   appmask;
+};
+
+struct nvme_admin_cmd {
+        __u8    opcode;
+        __u8    flags;
+        __u16   rsvd1;
+        __u32   nsid;
+        __u32   cdw2;
+        __u32   cdw3;
+        __u64   metadata;
+        __u64   addr;
+        __u32   metadata_len;
+        __u32   data_len;
+        __u32   cdw10;
+        __u32   cdw11;
+        __u32   cdw12;
+        __u32   cdw13;
+        __u32   cdw14;
+        __u32   cdw15;
+        __u32   timeout_ms;
+        __u32   result;
+};
+
+#define NVME_IOCTL_ID           _IO('N', 0x40)
+#define NVME_IOCTL_ADMIN_CMD    _IOWR('N', 0x41, struct nvme_admin_cmd)
+#define NVME_IOCTL_SUBMIT_IO    _IOW('N', 0x42, struct nvme_user_io)
+
+#endif /* _UAPI_LINUX_NVME_H */
diff --git a/include/uapi/linux/openvswitch.h b/include/uapi/linux/openvswitch.h
index c55efaaa9bb4..a74d375b439b 100644
--- a/include/uapi/linux/openvswitch.h
+++ b/include/uapi/linux/openvswitch.h
@@ -1,6 +1,6 @@
 
 /*
- * Copyright (c) 2007-2011 Nicira Networks.
+ * Copyright (c) 2007-2013 Nicira, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of version 2 of the GNU General Public
@@ -165,6 +165,7 @@ enum ovs_vport_type {
         OVS_VPORT_TYPE_NETDEV,   /* network device */
         OVS_VPORT_TYPE_INTERNAL, /* network device implemented by datapath */
         OVS_VPORT_TYPE_GRE,      /* GRE tunnel. */
+        OVS_VPORT_TYPE_VXLAN,    /* VXLAN tunnel. */
         __OVS_VPORT_TYPE_MAX
 };
 
@@ -211,6 +212,16 @@ enum ovs_vport_attr {
 
 #define OVS_VPORT_ATTR_MAX (__OVS_VPORT_ATTR_MAX - 1)
 
+/* OVS_VPORT_ATTR_OPTIONS attributes for tunnels.
+ */
+enum {
+        OVS_TUNNEL_ATTR_UNSPEC,
+        OVS_TUNNEL_ATTR_DST_PORT, /* 16-bit UDP port, used by L4 tunnels. */
+        __OVS_TUNNEL_ATTR_MAX
+};
+
+#define OVS_TUNNEL_ATTR_MAX (__OVS_TUNNEL_ATTR_MAX - 1)
+
 /* Flows. */
 
 #define OVS_FLOW_FAMILY  "ovs_flow"
@@ -248,6 +259,7 @@ enum ovs_key_attr {
         OVS_KEY_ATTR_ND,        /* struct ovs_key_nd */
         OVS_KEY_ATTR_SKB_MARK,  /* u32 skb mark */
         OVS_KEY_ATTR_TUNNEL,    /* Nested set of ovs_tunnel attributes */
+        OVS_KEY_ATTR_SCTP,      /* struct ovs_key_sctp */
 
 #ifdef __KERNEL__
         OVS_KEY_ATTR_IPV4_TUNNEL,  /* struct ovs_key_ipv4_tunnel */
@@ -322,6 +334,11 @@ struct ovs_key_udp {
         __be16 udp_dst;
 };
 
+struct ovs_key_sctp {
+        __be16 sctp_src;
+        __be16 sctp_dst;
+};
+
 struct ovs_key_icmp {
         __u8 icmp_type;
         __u8 icmp_code;
@@ -368,6 +385,12 @@ struct ovs_key_nd {
  * @OVS_FLOW_ATTR_CLEAR: If present in a %OVS_FLOW_CMD_SET request, clears the
  * last-used time, accumulated TCP flags, and statistics for this flow.
  * Otherwise ignored in requests.  Never present in notifications.
+ * @OVS_FLOW_ATTR_MASK: Nested %OVS_KEY_ATTR_* attributes specifying the
+ * mask bits for wildcarded flow match. Mask bit value '1' specifies exact
+ * match with corresponding flow key bit, while mask bit value '0' specifies
+ * a wildcarded match. Omitting attribute is treated as wildcarding all
+ * corresponding fields. Optional for all requests. If not present,
+ * all flow key bits are exact match bits.
  *
  * These attributes follow the &struct ovs_header within the Generic Netlink
  * payload for %OVS_FLOW_* commands.
@@ -380,6 +403,7 @@ enum ovs_flow_attr {
         OVS_FLOW_ATTR_TCP_FLAGS, /* 8-bit OR'd TCP flags. */
         OVS_FLOW_ATTR_USED,      /* u64 msecs last used in monotonic time. */
         OVS_FLOW_ATTR_CLEAR,     /* Flag to clear stats, tcp_flags, used. */
+        OVS_FLOW_ATTR_MASK,      /* Sequence of OVS_KEY_ATTR_* attributes. */
         __OVS_FLOW_ATTR_MAX
 };
 
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index c3cc01d474b0..baa7852468ef 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -421,24 +421,24 @@
 #define  PCI_EXP_TYPE_ROOT_PORT 0x4     /* Root Port */
 #define  PCI_EXP_TYPE_UPSTREAM  0x5     /* Upstream Port */
 #define  PCI_EXP_TYPE_DOWNSTREAM 0x6    /* Downstream Port */
-#define  PCI_EXP_TYPE_PCI_BRIDGE 0x7    /* PCI/PCI-X Bridge */
-#define  PCI_EXP_TYPE_PCIE_BRIDGE 0x8   /* PCI/PCI-X to PCIE Bridge */
+#define  PCI_EXP_TYPE_PCI_BRIDGE 0x7    /* PCIe to PCI/PCI-X Bridge */
+#define  PCI_EXP_TYPE_PCIE_BRIDGE 0x8   /* PCI/PCI-X to PCIe Bridge */
 #define  PCI_EXP_TYPE_RC_END    0x9     /* Root Complex Integrated Endpoint */
 #define  PCI_EXP_TYPE_RC_EC     0xa     /* Root Complex Event Collector */
 #define PCI_EXP_FLAGS_SLOT      0x0100  /* Slot implemented */
 #define PCI_EXP_FLAGS_IRQ       0x3e00  /* Interrupt message number */
 #define PCI_EXP_DEVCAP          4       /* Device capabilities */
-#define  PCI_EXP_DEVCAP_PAYLOAD 0x07    /* Max_Payload_Size */
-#define  PCI_EXP_DEVCAP_PHANTOM 0x18    /* Phantom functions */
-#define  PCI_EXP_DEVCAP_EXT_TAG 0x20    /* Extended tags */
-#define  PCI_EXP_DEVCAP_L0S     0x1c0   /* L0s Acceptable Latency */
-#define  PCI_EXP_DEVCAP_L1      0xe00   /* L1 Acceptable Latency */
-#define  PCI_EXP_DEVCAP_ATN_BUT 0x1000  /* Attention Button Present */
-#define  PCI_EXP_DEVCAP_ATN_IND 0x2000  /* Attention Indicator Present */
-#define  PCI_EXP_DEVCAP_PWR_IND 0x4000  /* Power Indicator Present */
-#define  PCI_EXP_DEVCAP_RBER    0x8000  /* Role-Based Error Reporting */
-#define  PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
-#define  PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
+#define  PCI_EXP_DEVCAP_PAYLOAD 0x00000007 /* Max_Payload_Size */
+#define  PCI_EXP_DEVCAP_PHANTOM 0x00000018 /* Phantom functions */
+#define  PCI_EXP_DEVCAP_EXT_TAG 0x00000020 /* Extended tags */
+#define  PCI_EXP_DEVCAP_L0S     0x000001c0 /* L0s Acceptable Latency */
+#define  PCI_EXP_DEVCAP_L1      0x00000e00 /* L1 Acceptable Latency */
+#define  PCI_EXP_DEVCAP_ATN_BUT 0x00001000 /* Attention Button Present */
+#define  PCI_EXP_DEVCAP_ATN_IND 0x00002000 /* Attention Indicator Present */
+#define  PCI_EXP_DEVCAP_PWR_IND 0x00004000 /* Power Indicator Present */
+#define  PCI_EXP_DEVCAP_RBER    0x00008000 /* Role-Based Error Reporting */
+#define  PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000 /* Slot Power Limit Value */
+#define  PCI_EXP_DEVCAP_PWR_SCL 0x0c000000 /* Slot Power Limit Scale */
 #define  PCI_EXP_DEVCAP_FLR     0x10000000 /* Function Level Reset */
 #define PCI_EXP_DEVCTL          8       /* Device Control */
 #define  PCI_EXP_DEVCTL_CERE    0x0001  /* Correctable Error Reporting En. */
@@ -454,16 +454,16 @@
 #define  PCI_EXP_DEVCTL_READRQ  0x7000  /* Max_Read_Request_Size */
 #define  PCI_EXP_DEVCTL_BCR_FLR 0x8000  /* Bridge Configuration Retry / FLR */
 #define PCI_EXP_DEVSTA          10      /* Device Status */
-#define  PCI_EXP_DEVSTA_CED     0x01    /* Correctable Error Detected */
-#define  PCI_EXP_DEVSTA_NFED    0x02    /* Non-Fatal Error Detected */
-#define  PCI_EXP_DEVSTA_FED     0x04    /* Fatal Error Detected */
-#define  PCI_EXP_DEVSTA_URD     0x08    /* Unsupported Request Detected */
-#define  PCI_EXP_DEVSTA_AUXPD   0x10    /* AUX Power Detected */
-#define  PCI_EXP_DEVSTA_TRPND   0x20    /* Transactions Pending */
+#define  PCI_EXP_DEVSTA_CED     0x0001  /* Correctable Error Detected */
+#define  PCI_EXP_DEVSTA_NFED    0x0002  /* Non-Fatal Error Detected */
+#define  PCI_EXP_DEVSTA_FED     0x0004  /* Fatal Error Detected */
+#define  PCI_EXP_DEVSTA_URD     0x0008  /* Unsupported Request Detected */
+#define  PCI_EXP_DEVSTA_AUXPD   0x0010  /* AUX Power Detected */
+#define  PCI_EXP_DEVSTA_TRPND   0x0020  /* Transactions Pending */
 #define PCI_EXP_LNKCAP          12      /* Link Capabilities */
 #define  PCI_EXP_LNKCAP_SLS     0x0000000f /* Supported Link Speeds */
-#define  PCI_EXP_LNKCAP_SLS_2_5GB 0x1   /* LNKCAP2 SLS Vector bit 0 (2.5GT/s) */
-#define  PCI_EXP_LNKCAP_SLS_5_0GB 0x2   /* LNKCAP2 SLS Vector bit 1 (5.0GT/s) */
+#define  PCI_EXP_LNKCAP_SLS_2_5GB 0x00000001 /* LNKCAP2 SLS Vector bit 0 */
+#define  PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */
 #define  PCI_EXP_LNKCAP_MLW     0x000003f0 /* Maximum Link Width */
 #define  PCI_EXP_LNKCAP_ASPMS   0x00000c00 /* ASPM Support */
 #define  PCI_EXP_LNKCAP_L0SEL   0x00007000 /* L0s Exit Latency */
@@ -475,21 +475,21 @@
 #define  PCI_EXP_LNKCAP_PN      0xff000000 /* Port Number */
 #define PCI_EXP_LNKCTL          16      /* Link Control */
 #define  PCI_EXP_LNKCTL_ASPMC   0x0003  /* ASPM Control */
-#define  PCI_EXP_LNKCTL_ASPM_L0S  0x01  /* L0s Enable */
-#define  PCI_EXP_LNKCTL_ASPM_L1   0x02  /* L1 Enable */
+#define  PCI_EXP_LNKCTL_ASPM_L0S 0x0001 /* L0s Enable */
+#define  PCI_EXP_LNKCTL_ASPM_L1  0x0002 /* L1 Enable */
 #define  PCI_EXP_LNKCTL_RCB     0x0008  /* Read Completion Boundary */
 #define  PCI_EXP_LNKCTL_LD      0x0010  /* Link Disable */
 #define  PCI_EXP_LNKCTL_RL      0x0020  /* Retrain Link */
 #define  PCI_EXP_LNKCTL_CCC     0x0040  /* Common Clock Configuration */
 #define  PCI_EXP_LNKCTL_ES      0x0080  /* Extended Synch */
-#define  PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */
+#define  PCI_EXP_LNKCTL_CLKREQ_EN 0x0100 /* Enable clkreq */
 #define  PCI_EXP_LNKCTL_HAWD    0x0200  /* Hardware Autonomous Width Disable */
 #define  PCI_EXP_LNKCTL_LBMIE   0x0400  /* Link Bandwidth Management Interrupt Enable */
 #define  PCI_EXP_LNKCTL_LABIE   0x0800  /* Lnk Autonomous Bandwidth Interrupt Enable */
 #define PCI_EXP_LNKSTA          18      /* Link Status */
 #define  PCI_EXP_LNKSTA_CLS     0x000f  /* Current Link Speed */
-#define  PCI_EXP_LNKSTA_CLS_2_5GB 0x01  /* Current Link Speed 2.5GT/s */
-#define  PCI_EXP_LNKSTA_CLS_5_0GB 0x02  /* Current Link Speed 5.0GT/s */
+#define  PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
+#define  PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
 #define  PCI_EXP_LNKSTA_NLW     0x03f0  /* Nogotiated Link Width */
 #define  PCI_EXP_LNKSTA_NLW_SHIFT 4     /* start of NLW mask in link status */
 #define  PCI_EXP_LNKSTA_LT      0x0800  /* Link Training */
@@ -534,44 +534,49 @@
 #define  PCI_EXP_SLTSTA_EIS     0x0080  /* Electromechanical Interlock Status */
 #define  PCI_EXP_SLTSTA_DLLSC   0x0100  /* Data Link Layer State Changed */
 #define PCI_EXP_RTCTL           28      /* Root Control */
-#define  PCI_EXP_RTCTL_SECEE    0x01    /* System Error on Correctable Error */
-#define  PCI_EXP_RTCTL_SENFEE   0x02    /* System Error on Non-Fatal Error */
-#define  PCI_EXP_RTCTL_SEFEE    0x04    /* System Error on Fatal Error */
-#define  PCI_EXP_RTCTL_PMEIE    0x08    /* PME Interrupt Enable */
-#define  PCI_EXP_RTCTL_CRSSVE   0x10    /* CRS Software Visibility Enable */
+#define  PCI_EXP_RTCTL_SECEE    0x0001  /* System Error on Correctable Error */
+#define  PCI_EXP_RTCTL_SENFEE   0x0002  /* System Error on Non-Fatal Error */
+#define  PCI_EXP_RTCTL_SEFEE    0x0004  /* System Error on Fatal Error */
+#define  PCI_EXP_RTCTL_PMEIE    0x0008  /* PME Interrupt Enable */
+#define  PCI_EXP_RTCTL_CRSSVE   0x0010  /* CRS Software Visibility Enable */
 #define PCI_EXP_RTCAP           30      /* Root Capabilities */
 #define PCI_EXP_RTSTA           32      /* Root Status */
-#define PCI_EXP_RTSTA_PME       0x10000 /* PME status */
-#define PCI_EXP_RTSTA_PENDING   0x20000 /* PME pending */
+#define PCI_EXP_RTSTA_PME       0x00010000 /* PME status */
+#define PCI_EXP_RTSTA_PENDING   0x00020000 /* PME pending */
 /*
- * Note that the following PCI Express 'Capability Structure' registers
- * were introduced with 'Capability Version' 0x2 (v2).  These registers
- * do not exist on devices with Capability Version 1.  Use pci_pcie_cap2()
- * to use these fields safely.
+ * The Device Capabilities 2, Device Status 2, Device Control 2,
+ * Link Capabilities 2, Link Status 2, Link Control 2,
+ * Slot Capabilities 2, Slot Status 2, and Slot Control 2 registers
+ * are only present on devices with PCIe Capability version 2.
+ * Use pcie_capability_read_word() and similar interfaces to use them
+ * safely.
  */
 #define PCI_EXP_DEVCAP2         36      /* Device Capabilities 2 */
-#define  PCI_EXP_DEVCAP2_ARI    0x20    /* Alternative Routing-ID */
-#define  PCI_EXP_DEVCAP2_LTR    0x800   /* Latency tolerance reporting */
-#define  PCI_EXP_OBFF_MASK      0xc0000 /* OBFF support mechanism */
-#define  PCI_EXP_OBFF_MSG       0x40000 /* New message signaling */
-#define  PCI_EXP_OBFF_WAKE      0x80000 /* Re-use WAKE# for OBFF */
+#define  PCI_EXP_DEVCAP2_ARI            0x00000020 /* Alternative Routing-ID */
+#define  PCI_EXP_DEVCAP2_LTR            0x00000800 /* Latency tolerance reporting */
+#define  PCI_EXP_DEVCAP2_OBFF_MASK      0x000c0000 /* OBFF support mechanism */
+#define  PCI_EXP_DEVCAP2_OBFF_MSG       0x00040000 /* New message signaling */
+#define  PCI_EXP_DEVCAP2_OBFF_WAKE      0x00080000 /* Re-use WAKE# for OBFF */
 #define PCI_EXP_DEVCTL2         40      /* Device Control 2 */
-#define  PCI_EXP_DEVCTL2_ARI    0x20    /* Alternative Routing-ID */
-#define  PCI_EXP_IDO_REQ_EN     0x100   /* ID-based ordering request enable */
-#define  PCI_EXP_IDO_CMP_EN     0x200   /* ID-based ordering completion enable */
-#define  PCI_EXP_LTR_EN         0x400   /* Latency tolerance reporting */
-#define  PCI_EXP_OBFF_MSGA_EN   0x2000  /* OBFF enable with Message type A */
-#define  PCI_EXP_OBFF_MSGB_EN   0x4000  /* OBFF enable with Message type B */
-#define  PCI_EXP_OBFF_WAKE_EN   0x6000  /* OBFF using WAKE# signaling */
+#define  PCI_EXP_DEVCTL2_ARI            0x20    /* Alternative Routing-ID */
+#define  PCI_EXP_DEVCTL2_IDO_REQ_EN     0x0100  /* Allow IDO for requests */
+#define  PCI_EXP_DEVCTL2_IDO_CMP_EN     0x0200  /* Allow IDO for completions */
+#define  PCI_EXP_DEVCTL2_LTR_EN         0x0400  /* Enable LTR mechanism */
+#define  PCI_EXP_DEVCTL2_OBFF_MSGA_EN   0x2000  /* Enable OBFF Message type A */
+#define  PCI_EXP_DEVCTL2_OBFF_MSGB_EN   0x4000  /* Enable OBFF Message type B */
+#define  PCI_EXP_DEVCTL2_OBFF_WAKE_EN   0x6000  /* OBFF using WAKE# signaling */
+#define PCI_EXP_DEVSTA2         42      /* Device Status 2 */
 #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2  44      /* v2 endpoints end here */
-#define PCI_EXP_LNKCAP2         44      /* Link Capability 2 */
-#define  PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */
-#define  PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */
-#define  PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */
-#define  PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */
+#define PCI_EXP_LNKCAP2         44      /* Link Capabilities 2 */
+#define  PCI_EXP_LNKCAP2_SLS_2_5GB      0x00000002 /* Supported Speed 2.5GT/s */
+#define  PCI_EXP_LNKCAP2_SLS_5_0GB      0x00000004 /* Supported Speed 5.0GT/s */
+#define  PCI_EXP_LNKCAP2_SLS_8_0GB      0x00000008 /* Supported Speed 8.0GT/s */
+#define  PCI_EXP_LNKCAP2_CROSSLINK      0x00000100 /* Crosslink supported */
 #define PCI_EXP_LNKCTL2         48      /* Link Control 2 */
 #define PCI_EXP_LNKSTA2         50      /* Link Status 2 */
+#define PCI_EXP_SLTCAP2         52      /* Slot Capabilities 2 */
 #define PCI_EXP_SLTCTL2         56      /* Slot Control 2 */
+#define PCI_EXP_SLTSTA2         58      /* Slot Status 2 */
 
 /* Extended Capabilities (PCI-X 2.0 and Express) */
 #define PCI_EXT_CAP_ID(header)          (header & 0x0000ffff)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 0b1df41691e8..ca1d90bcb74d 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -109,6 +109,7 @@ enum perf_sw_ids {
         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
+        PERF_COUNT_SW_DUMMY                     = 9,
 
         PERF_COUNT_SW_MAX,                      /* non-ABI */
 };
@@ -134,8 +135,9 @@ enum perf_event_sample_format {
         PERF_SAMPLE_STACK_USER                  = 1U << 13,
         PERF_SAMPLE_WEIGHT                      = 1U << 14,
         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
+        PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 
-        PERF_SAMPLE_MAX = 1U << 16,             /* non-ABI */
+        PERF_SAMPLE_MAX = 1U << 17,             /* non-ABI */
 };
 
 /*
@@ -275,8 +277,9 @@ struct perf_event_attr {
 
                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
                                 exclude_callchain_user   : 1, /* exclude user callchains */
+                                mmap2          :  1, /* include mmap with inode data     */
 
-                                __reserved_1   : 41;
+                                __reserved_1   : 40;
 
         union {
                 __u32           wakeup_events;    /* wakeup every n events */
@@ -321,6 +324,7 @@ struct perf_event_attr {
 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
+#define PERF_EVENT_IOC_ID               _IOR('$', 7, u64 *)
 
 enum perf_event_ioc_flags {
         PERF_IOC_FLAG_GROUP             = 1U << 0,
@@ -375,9 +379,12 @@ struct perf_event_mmap_page {
         __u64   time_running;           /* time event on cpu */
         union {
                 __u64   capabilities;
-                __u64   cap_usr_time  : 1,
-                        cap_usr_rdpmc : 1,
-                        cap_____res   : 62;
+                struct {
+                        __u64   cap_usr_time            : 1,
+                                cap_usr_rdpmc           : 1,
+                                cap_usr_time_zero       : 1,
+                                cap_____res             : 61;
+                };
         };
 
         /*
@@ -418,12 +425,29 @@ struct perf_event_mmap_page {
         __u16   time_shift;
         __u32   time_mult;
         __u64   time_offset;
+        /*
+         * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
+         * from sample timestamps.
+         *
+         *   time = timestamp - time_zero;
+         *   quot = time / time_mult;
+         *   rem  = time % time_mult;
+         *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
+         *
+         * And vice versa:
+         *
+         *   quot = cyc >> time_shift;
+         *   rem  = cyc & ((1 << time_shift) - 1);
+         *   timestamp = time_zero + quot * time_mult +
+         *               ((rem * time_mult) >> time_shift);
+         */
+        __u64   time_zero;
 
                 /*
                  * Hole for extension of the self monitor capabilities
                  */
 
-        __u64   __reserved[120];        /* align to 1k */
+        __u64   __reserved[119];        /* align to 1k */
 
         /*
          * Control data for the mmap() data buffer.
@@ -471,13 +495,28 @@ enum perf_event_type {
         /*
          * If perf_event_attr.sample_id_all is set then all event types will
          * have the sample_type selected fields related to where/when
-         * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID)
-         * described in PERF_RECORD_SAMPLE below, it will be stashed just after
-         * the perf_event_header and the fields already present for the existing
-         * fields, i.e. at the end of the payload. That way a newer perf.data
-         * file will be supported by older perf tools, with these new optional
-         * fields being ignored.
+         * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
+         * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
+         * just after the perf_event_header and the fields already present for
+         * the existing fields, i.e. at the end of the payload. That way a newer
+         * perf.data file will be supported by older perf tools, with these new
+         * optional fields being ignored.
+         *
+         * struct sample_id {
+         *      { u32                   pid, tid; } && PERF_SAMPLE_TID
+         *      { u64                   time;     } && PERF_SAMPLE_TIME
+         *      { u64                   id;       } && PERF_SAMPLE_ID
+         *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
+         *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
+         *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
+         * } && perf_event_attr::sample_id_all
          *
+         * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
+         * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
+         * relative to header.size.
+         */
+
+        /*
          * The MMAP events record the PROT_EXEC mappings so that we can
          * correlate userspace IPs to code. They have the following structure:
          *
@@ -498,6 +537,7 @@ enum perf_event_type {
          *      struct perf_event_header        header;
          *      u64                             id;
          *      u64                             lost;
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_LOST                        = 2,
@@ -508,6 +548,7 @@ enum perf_event_type {
          *
          *      u32                             pid, tid;
          *      char                            comm[];
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_COMM                        = 3,
@@ -518,6 +559,7 @@ enum perf_event_type {
          *      u32                             pid, ppid;
          *      u32                             tid, ptid;
          *      u64                             time;
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_EXIT                        = 4,
@@ -528,6 +570,7 @@ enum perf_event_type {
          *      u64                             time;
          *      u64                             id;
          *      u64                             stream_id;
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_THROTTLE                    = 5,
@@ -539,6 +582,7 @@ enum perf_event_type {
          *      u32                             pid, ppid;
          *      u32                             tid, ptid;
          *      u64                             time;
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_FORK                        = 7,
@@ -549,6 +593,7 @@ enum perf_event_type {
          *      u32                             pid, tid;
          *
          *      struct read_format              values;
+         *      struct sample_id                sample_id;
          * };
          */
         PERF_RECORD_READ                        = 8,
@@ -557,6 +602,13 @@ enum perf_event_type {
          * struct {
          *      struct perf_event_header        header;
          *
+         *      #
+         *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
+         *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
+         *      # is fixed relative to header.
+         *      #
+         *
+         *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
          *      { u64                   ip;       } && PERF_SAMPLE_IP
          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
          *      { u64                   time;     } && PERF_SAMPLE_TIME
@@ -596,11 +648,32 @@ enum perf_event_type {
          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
          *
          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
-         *      { u64                   data_src;     } && PERF_SAMPLE_DATA_SRC
+         *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
          * };
          */
         PERF_RECORD_SAMPLE                      = 9,
 
+        /*
+         * The MMAP2 records are an augmented version of MMAP, they add
+         * maj, min, ino numbers to be used to uniquely identify each mapping
+         *
+         * struct {
+         *      struct perf_event_header        header;
+         *
+         *      u32                             pid, tid;
+         *      u64                             addr;
+         *      u64                             len;
+         *      u64                             pgoff;
+         *      u32                             maj;
+         *      u32                             min;
+         *      u64                             ino;
+         *      u64                             ino_generation;
+         *      char                            filename[];
+         *      struct sample_id                sample_id;
+         * };
+         */
+        PERF_RECORD_MMAP2                       = 10,
+
         PERF_RECORD_MAX,                        /* non-ABI */
 };
 
@@ -685,4 +758,28 @@ union perf_mem_data_src {
 #define PERF_MEM_S(a, s) \
         (((u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 
+/*
+ * single taken branch record layout:
+ *
+ *      from: source instruction (may not always be a branch insn)
+ *        to: branch target
+ *   mispred: branch target was mispredicted
+ * predicted: branch target was predicted
+ *
+ * support for mispred, predicted is optional. In case it
+ * is not supported mispred = predicted = 0.
+ *
+ *     in_tx: running in a hardware transaction
+ *     abort: aborting a hardware transaction
+ */
+struct perf_branch_entry {
+        __u64   from;
+        __u64   to;
+        __u64   mispred:1,  /* target mispredicted */
+                predicted:1,/* target predicted */
+                in_tx:1,    /* in transaction */
+                abort:1,    /* transaction abort */
+                reserved:60;
+};
+
 #endif /* _UAPI_LINUX_PERF_EVENT_H */
diff --git a/include/uapi/linux/pkt_sched.h b/include/uapi/linux/pkt_sched.h
index 09d62b9228ff..9b829134d422 100644
--- a/include/uapi/linux/pkt_sched.h
+++ b/include/uapi/linux/pkt_sched.h
@@ -744,4 +744,45 @@ struct tc_fq_codel_xstats {
         };
 };
 
+/* FQ */
+
+enum {
+        TCA_FQ_UNSPEC,
+
+        TCA_FQ_PLIMIT,          /* limit of total number of packets in queue */
+
+        TCA_FQ_FLOW_PLIMIT,     /* limit of packets per flow */
+
+        TCA_FQ_QUANTUM,         /* RR quantum */
+
+        TCA_FQ_INITIAL_QUANTUM,         /* RR quantum for new flow */
+
+        TCA_FQ_RATE_ENABLE,     /* enable/disable rate limiting */
+
+        TCA_FQ_FLOW_DEFAULT_RATE,/* for sockets with unspecified sk_rate,
+                                  * use the following rate
+                                  */
+
+        TCA_FQ_FLOW_MAX_RATE,   /* per flow max rate */
+
+        TCA_FQ_BUCKETS_LOG,     /* log2(number of buckets) */
+        __TCA_FQ_MAX
+};
+
+#define TCA_FQ_MAX      (__TCA_FQ_MAX - 1)
+
+struct tc_fq_qd_stats {
+        __u64   gc_flows;
+        __u64   highprio_packets;
+        __u64   tcp_retrans;
+        __u64   throttled;
+        __u64   flows_plimit;
+        __u64   pkts_too_long;
+        __u64   allocation_errors;
+        __s64   time_next_delayed_flow;
+        __u32   flows;
+        __u32   inactive_flows;
+        __u32   throttled_flows;
+        __u32   pad;
+};
 #endif
diff --git a/include/uapi/linux/reiserfs_xattr.h b/include/uapi/linux/reiserfs_xattr.h
index d8ce17c2459a..38fdd648be21 100644
--- a/include/uapi/linux/reiserfs_xattr.h
+++ b/include/uapi/linux/reiserfs_xattr.h
@@ -16,7 +16,7 @@ struct reiserfs_xattr_header {
 };
 
 struct reiserfs_security_handle {
-        char *name;
+        const char *name;
         void *value;
         size_t length;
 };
diff --git a/include/uapi/linux/sctp.h b/include/uapi/linux/sctp.h
index 66b466e4ca08..ca451e99b28b 100644
--- a/include/uapi/linux/sctp.h
+++ b/include/uapi/linux/sctp.h
@@ -28,7 +28,7 @@
  *
  * Please send any bug reports or fixes you make to the
  * email address(es):
- *    lksctp developers <lksctp-developers@lists.sourceforge.net>
+ *    lksctp developers <linux-sctp@vger.kernel.org>
  *
  * Or submit a bug report through the following website:
  *    http://www.sf.net/projects/lksctp
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 9119cc0977bf..b47dba2c1e6f 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -232,4 +232,10 @@
 /* SH-SCI */
 #define PORT_HSCIF      104
 
+/* ST ASC type numbers */
+#define PORT_ASC       105
+
+/* Tilera TILE-Gx UART */
+#define PORT_TILEGX     106
+
 #endif /* _UAPILINUX_SERIAL_CORE_H */
diff --git a/include/uapi/linux/snmp.h b/include/uapi/linux/snmp.h
index a1356d3b54df..1bdb4a39d1e1 100644
--- a/include/uapi/linux/snmp.h
+++ b/include/uapi/linux/snmp.h
@@ -51,6 +51,10 @@ enum
         IPSTATS_MIB_INBCASTOCTETS,              /* InBcastOctets */
         IPSTATS_MIB_OUTBCASTOCTETS,             /* OutBcastOctets */
         IPSTATS_MIB_CSUMERRORS,                 /* InCsumErrors */
+        IPSTATS_MIB_NOECTPKTS,                  /* InNoECTPkts */
+        IPSTATS_MIB_ECT1PKTS,                   /* InECT1Pkts */
+        IPSTATS_MIB_ECT0PKTS,                   /* InECT0Pkts */
+        IPSTATS_MIB_CEPKTS,                     /* InCEPkts */
         __IPSTATS_MIB_MAX
 };
 
diff --git a/include/uapi/linux/tcp.h b/include/uapi/linux/tcp.h
index 8d776ebc4829..377f1e59411d 100644
--- a/include/uapi/linux/tcp.h
+++ b/include/uapi/linux/tcp.h
@@ -111,6 +111,7 @@ enum {
 #define TCP_REPAIR_OPTIONS      22
 #define TCP_FASTOPEN            23      /* Enable FastOpen on listeners */
 #define TCP_TIMESTAMP           24
+#define TCP_NOTSENT_LOWAT       25      /* limit number of unsent bytes in write queue */
 
 struct tcp_repair_opt {
         __u32   opt_code;
diff --git a/include/uapi/linux/uhid.h b/include/uapi/linux/uhid.h
index e9ed951e2b09..414b74be4da1 100644
--- a/include/uapi/linux/uhid.h
+++ b/include/uapi/linux/uhid.h
@@ -30,7 +30,7 @@ enum uhid_event_type {
         UHID_OPEN,
         UHID_CLOSE,
         UHID_OUTPUT,
-        UHID_OUTPUT_EV,
+        UHID_OUTPUT_EV,                 /* obsolete! */
         UHID_INPUT,
         UHID_FEATURE,
         UHID_FEATURE_ANSWER,
@@ -69,6 +69,8 @@ struct uhid_output_req {
         __u8 rtype;
 } __attribute__((__packed__));
 
+/* Obsolete! Newer kernels will no longer send these events but instead convert
+ * it into raw output reports via UHID_OUTPUT. */
 struct uhid_output_ev_req {
         __u16 type;
         __u16 code;
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index e90a88a8708f..083bb5a5aae2 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -161,6 +161,8 @@ enum v4l2_colorfx {
 #define V4L2_CID_USER_SI476X_BASE               (V4L2_CID_USER_BASE + 0x1040)
 
 /* MPEG-class control IDs */
+/* The MPEG controls are applicable to all codec controls
+ * and the 'MPEG' part of the define is historical */
 
 #define V4L2_CID_MPEG_BASE                      (V4L2_CTRL_CLASS_MPEG | 0x900)
 #define V4L2_CID_MPEG_CLASS                     (V4L2_CTRL_CLASS_MPEG | 1)
@@ -522,6 +524,33 @@ enum v4l2_mpeg_video_mpeg4_profile {
 };
 #define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL          (V4L2_CID_MPEG_BASE+407)
 
+/*  Control IDs for VP8 streams
+ *  Although VP8 is not part of MPEG we add these controls to the MPEG class
+ *  as that class is already handling other video compression standards
+ */
+#define V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS          (V4L2_CID_MPEG_BASE+500)
+enum v4l2_vp8_num_partitions {
+        V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION     = 0,
+        V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS    = 1,
+        V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS    = 2,
+        V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS    = 3,
+};
+#define V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4         (V4L2_CID_MPEG_BASE+501)
+#define V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES          (V4L2_CID_MPEG_BASE+502)
+enum v4l2_vp8_num_ref_frames {
+        V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME     = 0,
+        V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME     = 1,
+        V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME     = 2,
+};
+#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL            (V4L2_CID_MPEG_BASE+503)
+#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS        (V4L2_CID_MPEG_BASE+504)
+#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD (V4L2_CID_MPEG_BASE+505)
+#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL        (V4L2_CID_MPEG_BASE+506)
+enum v4l2_vp8_golden_frame_sel {
+        V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV           = 0,
+        V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD     = 1,
+};
+
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_MPEG_CX2341X_BASE                              (V4L2_CTRL_CLASS_MPEG | 0x1000)
 #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE         (V4L2_CID_MPEG_CX2341X_BASE+0)
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index 4e0c58d25ff0..be709fe29552 100644
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -823,12 +823,4 @@
                 V4L2_DV_FL_REDUCED_BLANKING) \
 }
 
-#define V4L2_DV_BT_DMT_1366X768P60 { \
-        .type = V4L2_DV_BT_656_1120, \
-        V4L2_INIT_BT_TIMINGS(1366, 768, 0, \
-                V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
-                85500000, 70, 143, 213, 3, 3, 24, 0, 0, 0, \
-                V4L2_DV_BT_STD_DMT, 0) \
-}
-
 #endif
diff --git a/include/uapi/linux/v4l2-mediabus.h b/include/uapi/linux/v4l2-mediabus.h
index 6ee63d09b32d..a9601257bb43 100644
--- a/include/uapi/linux/v4l2-mediabus.h
+++ b/include/uapi/linux/v4l2-mediabus.h
@@ -37,7 +37,7 @@
 enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_FIXED = 0x0001,
 
-        /* RGB - next is 0x100d */
+        /* RGB - next is 0x100e */
         V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
         V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
         V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
@@ -50,8 +50,9 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_RGB888_1X24 = 0x100a,
         V4L2_MBUS_FMT_RGB888_2X12_BE = 0x100b,
         V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c,
+        V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d,
 
-        /* YUV (including grey) - next is 0x2017 */
+        /* YUV (including grey) - next is 0x2018 */
         V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
         V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
         V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
@@ -74,6 +75,7 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
         V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
         V4L2_MBUS_FMT_YUV10_1X30 = 0x2016,
+        V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017,
 
         /* Bayer - next is 0x3019 */
         V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
index 916e444e6f74..0fd47f5bc146 100644
--- a/include/uapi/linux/vfio.h
+++ b/include/uapi/linux/vfio.h
@@ -324,6 +324,44 @@ enum {
         VFIO_PCI_NUM_IRQS
 };
 
+/**
+ * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
+ *                                            struct vfio_pci_hot_reset_info)
+ *
+ * Return: 0 on success, -errno on failure:
+ *      -enospc = insufficient buffer, -enodev = unsupported for device.
+ */
+struct vfio_pci_dependent_device {
+        __u32   group_id;
+        __u16   segment;
+        __u8    bus;
+        __u8    devfn; /* Use PCI_SLOT/PCI_FUNC */
+};
+
+struct vfio_pci_hot_reset_info {
+        __u32   argsz;
+        __u32   flags;
+        __u32   count;
+        struct vfio_pci_dependent_device        devices[];
+};
+
+#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO      _IO(VFIO_TYPE, VFIO_BASE + 12)
+
+/**
+ * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
+ *                                  struct vfio_pci_hot_reset)
+ *
+ * Return: 0 on success, -errno on failure.
+ */
+struct vfio_pci_hot_reset {
+        __u32   argsz;
+        __u32   flags;
+        __u32   count;
+        __s32   group_fds[];
+};
+
+#define VFIO_DEVICE_PCI_HOT_RESET       _IO(VFIO_TYPE, VFIO_BASE + 13)
+
 /* -------- API for Type1 VFIO IOMMU -------- */
 
 /**
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 95ef4551edc1..437f1b0f8937 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -348,6 +348,8 @@ struct v4l2_pix_format {
 /* two non contiguous planes - one Y, one Cr + Cb interleaved  */
 #define V4L2_PIX_FMT_NV12M   v4l2_fourcc('N', 'M', '1', '2') /* 12  Y/CbCr 4:2:0  */
 #define V4L2_PIX_FMT_NV21M   v4l2_fourcc('N', 'M', '2', '1') /* 21  Y/CrCb 4:2:0  */
+#define V4L2_PIX_FMT_NV16M   v4l2_fourcc('N', 'M', '1', '6') /* 16  Y/CbCr 4:2:2  */
+#define V4L2_PIX_FMT_NV61M   v4l2_fourcc('N', 'M', '6', '1') /* 16  Y/CrCb 4:2:2  */
 #define V4L2_PIX_FMT_NV12MT  v4l2_fourcc('T', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 64x32 macroblocks */
 #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 16x16 macroblocks */
 
@@ -1055,6 +1057,16 @@ struct v4l2_bt_timings {
    or used depends on the hardware. */
 #define V4L2_DV_FL_HALF_LINE                    (1 << 3)
 
+/* A few useful defines to calculate the total blanking and frame sizes */
+#define V4L2_DV_BT_BLANKING_WIDTH(bt) \
+        (bt->hfrontporch + bt->hsync + bt->hbackporch)
+#define V4L2_DV_BT_FRAME_WIDTH(bt) \
+        (bt->width + V4L2_DV_BT_BLANKING_WIDTH(bt))
+#define V4L2_DV_BT_BLANKING_HEIGHT(bt) \
+        (bt->vfrontporch + bt->vsync + bt->vbackporch + \
+         bt->il_vfrontporch + bt->il_vsync + bt->il_vbackporch)
+#define V4L2_DV_BT_FRAME_HEIGHT(bt) \
+        (bt->height + V4L2_DV_BT_BLANKING_HEIGHT(bt))
 
 /** struct v4l2_dv_timings - DV timings
  * @type:       the type of the timings
diff --git a/include/uapi/linux/virtio_net.h b/include/uapi/linux/virtio_net.h
index c520203fac2f..172a7f00780c 100644
--- a/include/uapi/linux/virtio_net.h
+++ b/include/uapi/linux/virtio_net.h
@@ -60,7 +60,7 @@
 
 struct virtio_net_config {
         /* The config defining mac address (if VIRTIO_NET_F_MAC) */
-        __u8 mac[6];
+        __u8 mac[ETH_ALEN];
         /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
         __u16 status;
         /* Maximum number of each of transmit and receive queues;
@@ -70,7 +70,9 @@ struct virtio_net_config {
         __u16 max_virtqueue_pairs;
 } __attribute__((packed));
 
-/* This is the first element of the scatter-gather list.  If you don't
+/* This header comes first in the scatter-gather list.
+ * If VIRTIO_F_ANY_LAYOUT is not negotiated, it must
+ * be the first element of the scatter-gather list.  If you don't
  * specify GSO or CSUM features, you can simply ignore the header. */
 struct virtio_net_hdr {
 #define VIRTIO_NET_HDR_F_NEEDS_CSUM     1       // Use csum_start, csum_offset
diff --git a/include/uapi/linux/wimax/i2400m.h b/include/uapi/linux/wimax/i2400m.h
index 62d356153565..fd198bc24a3c 100644
--- a/include/uapi/linux/wimax/i2400m.h
+++ b/include/uapi/linux/wimax/i2400m.h
@@ -122,7 +122,7 @@
 #define __LINUX__WIMAX__I2400M_H__
 
 #include <linux/types.h>
-
+#include <linux/if_ether.h>
 
 /*
  * Host Device Interface (HDI) common to all busses
@@ -487,7 +487,7 @@ struct i2400m_tlv_l4_message_versions {
 struct i2400m_tlv_detailed_device_info {
         struct i2400m_tlv_hdr hdr;
         __u8 reserved1[400];
-        __u8 mac_address[6];
+        __u8 mac_address[ETH_ALEN];
         __u8 reserved2[2];
 } __attribute__((packed));
 
diff --git a/include/uapi/rdma/ib_user_verbs.h b/include/uapi/rdma/ib_user_verbs.h
index 805711ea2005..0b233c56b0e4 100644
--- a/include/uapi/rdma/ib_user_verbs.h
+++ b/include/uapi/rdma/ib_user_verbs.h
@@ -43,6 +43,7 @@
  * compatibility are made.
  */
 #define IB_USER_VERBS_ABI_VERSION       6
+#define IB_USER_VERBS_CMD_THRESHOLD    50
 
 enum {
         IB_USER_VERBS_CMD_GET_CONTEXT,
@@ -85,7 +86,9 @@ enum {
         IB_USER_VERBS_CMD_OPEN_XRCD,
         IB_USER_VERBS_CMD_CLOSE_XRCD,
         IB_USER_VERBS_CMD_CREATE_XSRQ,
-        IB_USER_VERBS_CMD_OPEN_QP
+        IB_USER_VERBS_CMD_OPEN_QP,
+        IB_USER_VERBS_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
+        IB_USER_VERBS_CMD_DESTROY_FLOW
 };
 
 /*
@@ -123,6 +126,15 @@ struct ib_uverbs_cmd_hdr {
         __u16 out_words;
 };
 
+struct ib_uverbs_cmd_hdr_ex {
+        __u32 command;
+        __u16 in_words;
+        __u16 out_words;
+        __u16 provider_in_words;
+        __u16 provider_out_words;
+        __u32 cmd_hdr_reserved;
+};
+
 struct ib_uverbs_get_context {
         __u64 response;
         __u64 driver_data[0];
@@ -684,6 +696,91 @@ struct ib_uverbs_detach_mcast {
         __u64 driver_data[0];
 };
 
+struct ib_kern_eth_filter {
+        __u8  dst_mac[6];
+        __u8  src_mac[6];
+        __be16 ether_type;
+        __be16 vlan_tag;
+};
+
+struct ib_kern_spec_eth {
+        __u32  type;
+        __u16  size;
+        __u16  reserved;
+        struct ib_kern_eth_filter val;
+        struct ib_kern_eth_filter mask;
+};
+
+struct ib_kern_ipv4_filter {
+        __be32 src_ip;
+        __be32 dst_ip;
+};
+
+struct ib_kern_spec_ipv4 {
+        __u32  type;
+        __u16  size;
+        __u16  reserved;
+        struct ib_kern_ipv4_filter val;
+        struct ib_kern_ipv4_filter mask;
+};
+
+struct ib_kern_tcp_udp_filter {
+        __be16 dst_port;
+        __be16 src_port;
+};
+
+struct ib_kern_spec_tcp_udp {
+        __u32  type;
+        __u16  size;
+        __u16  reserved;
+        struct ib_kern_tcp_udp_filter val;
+        struct ib_kern_tcp_udp_filter mask;
+};
+
+struct ib_kern_spec {
+        union {
+                struct {
+                        __u32 type;
+                        __u16 size;
+                        __u16 reserved;
+                };
+                struct ib_kern_spec_eth     eth;
+                struct ib_kern_spec_ipv4    ipv4;
+                struct ib_kern_spec_tcp_udp tcp_udp;
+        };
+};
+
+struct ib_kern_flow_attr {
+        __u32 type;
+        __u16 size;
+        __u16 priority;
+        __u8  num_of_specs;
+        __u8  reserved[2];
+        __u8  port;
+        __u32 flags;
+        /* Following are the optional layers according to user request
+         * struct ib_flow_spec_xxx
+         * struct ib_flow_spec_yyy
+         */
+};
+
+struct ib_uverbs_create_flow  {
+        __u32 comp_mask;
+        __u64 response;
+        __u32 qp_handle;
+        struct ib_kern_flow_attr flow_attr;
+};
+
+struct ib_uverbs_create_flow_resp {
+        __u32 comp_mask;
+        __u32 flow_handle;
+};
+
+struct ib_uverbs_destroy_flow  {
+        __u32 comp_mask;
+        __u32 flow_handle;
+};
+
 struct ib_uverbs_create_srq {
         __u64 response;
         __u64 user_handle;
diff --git a/include/uapi/sound/hdspm.h b/include/uapi/sound/hdspm.h
index 1f59ea2a4a76..d956c3593f65 100644
--- a/include/uapi/sound/hdspm.h
+++ b/include/uapi/sound/hdspm.h
@@ -111,7 +111,7 @@ struct hdspm_ltc {
         enum hdspm_ltc_input_format input_format;
 };
 
-#define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_mixer_ioctl)
+#define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc)
 
 /**
  * The status data reflects the device's current state