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-rw-r--r--include/uapi/drm/vmwgfx_drm.h261
1 files changed, 261 insertions, 0 deletions
diff --git a/include/uapi/drm/vmwgfx_drm.h b/include/uapi/drm/vmwgfx_drm.h
index bcb0912afe7a..9971c560ed9a 100644
--- a/include/uapi/drm/vmwgfx_drm.h
+++ b/include/uapi/drm/vmwgfx_drm.h
@@ -28,6 +28,10 @@
28#ifndef __VMWGFX_DRM_H__ 28#ifndef __VMWGFX_DRM_H__
29#define __VMWGFX_DRM_H__ 29#define __VMWGFX_DRM_H__
30 30
31#ifndef __KERNEL__
32#include <drm.h>
33#endif
34
31#define DRM_VMW_MAX_SURFACE_FACES 6 35#define DRM_VMW_MAX_SURFACE_FACES 6
32#define DRM_VMW_MAX_MIP_LEVELS 24 36#define DRM_VMW_MAX_MIP_LEVELS 24
33 37
@@ -55,6 +59,11 @@
55#define DRM_VMW_PRESENT 18 59#define DRM_VMW_PRESENT 18
56#define DRM_VMW_PRESENT_READBACK 19 60#define DRM_VMW_PRESENT_READBACK 19
57#define DRM_VMW_UPDATE_LAYOUT 20 61#define DRM_VMW_UPDATE_LAYOUT 20
62#define DRM_VMW_CREATE_SHADER 21
63#define DRM_VMW_UNREF_SHADER 22
64#define DRM_VMW_GB_SURFACE_CREATE 23
65#define DRM_VMW_GB_SURFACE_REF 24
66#define DRM_VMW_SYNCCPU 25
58 67
59/*************************************************************************/ 68/*************************************************************************/
60/** 69/**
@@ -75,6 +84,9 @@
75#define DRM_VMW_PARAM_FIFO_CAPS 4 84#define DRM_VMW_PARAM_FIFO_CAPS 4
76#define DRM_VMW_PARAM_MAX_FB_SIZE 5 85#define DRM_VMW_PARAM_MAX_FB_SIZE 5
77#define DRM_VMW_PARAM_FIFO_HW_VERSION 6 86#define DRM_VMW_PARAM_FIFO_HW_VERSION 6
87#define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
88#define DRM_VMW_PARAM_3D_CAPS_SIZE 8
89#define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
78 90
79/** 91/**
80 * struct drm_vmw_getparam_arg 92 * struct drm_vmw_getparam_arg
@@ -787,4 +799,253 @@ struct drm_vmw_update_layout_arg {
787 uint64_t rects; 799 uint64_t rects;
788}; 800};
789 801
802
803/*************************************************************************/
804/**
805 * DRM_VMW_CREATE_SHADER - Create shader
806 *
807 * Creates a shader and optionally binds it to a dma buffer containing
808 * the shader byte-code.
809 */
810
811/**
812 * enum drm_vmw_shader_type - Shader types
813 */
814enum drm_vmw_shader_type {
815 drm_vmw_shader_type_vs = 0,
816 drm_vmw_shader_type_ps,
817 drm_vmw_shader_type_gs
818};
819
820
821/**
822 * struct drm_vmw_shader_create_arg
823 *
824 * @shader_type: Shader type of the shader to create.
825 * @size: Size of the byte-code in bytes.
826 * where the shader byte-code starts
827 * @buffer_handle: Buffer handle identifying the buffer containing the
828 * shader byte-code
829 * @shader_handle: On successful completion contains a handle that
830 * can be used to subsequently identify the shader.
831 * @offset: Offset in bytes into the buffer given by @buffer_handle,
832 *
833 * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
834 */
835struct drm_vmw_shader_create_arg {
836 enum drm_vmw_shader_type shader_type;
837 uint32_t size;
838 uint32_t buffer_handle;
839 uint32_t shader_handle;
840 uint64_t offset;
841};
842
843/*************************************************************************/
844/**
845 * DRM_VMW_UNREF_SHADER - Unreferences a shader
846 *
847 * Destroys a user-space reference to a shader, optionally destroying
848 * it.
849 */
850
851/**
852 * struct drm_vmw_shader_arg
853 *
854 * @handle: Handle identifying the shader to destroy.
855 *
856 * Input argument to the DRM_VMW_UNREF_SHADER ioctl.
857 */
858struct drm_vmw_shader_arg {
859 uint32_t handle;
860 uint32_t pad64;
861};
862
863/*************************************************************************/
864/**
865 * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
866 *
867 * Allocates a surface handle and queues a create surface command
868 * for the host on the first use of the surface. The surface ID can
869 * be used as the surface ID in commands referencing the surface.
870 */
871
872/**
873 * enum drm_vmw_surface_flags
874 *
875 * @drm_vmw_surface_flag_shareable: Whether the surface is shareable
876 * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout
877 * surface.
878 * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
879 * given.
880 */
881enum drm_vmw_surface_flags {
882 drm_vmw_surface_flag_shareable = (1 << 0),
883 drm_vmw_surface_flag_scanout = (1 << 1),
884 drm_vmw_surface_flag_create_buffer = (1 << 2)
885};
886
887/**
888 * struct drm_vmw_gb_surface_create_req
889 *
890 * @svga3d_flags: SVGA3d surface flags for the device.
891 * @format: SVGA3d format.
892 * @mip_level: Number of mip levels for all faces.
893 * @drm_surface_flags Flags as described above.
894 * @multisample_count Future use. Set to 0.
895 * @autogen_filter Future use. Set to 0.
896 * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID
897 * if none.
898 * @base_size Size of the base mip level for all faces.
899 *
900 * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl.
901 * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
902 */
903struct drm_vmw_gb_surface_create_req {
904 uint32_t svga3d_flags;
905 uint32_t format;
906 uint32_t mip_levels;
907 enum drm_vmw_surface_flags drm_surface_flags;
908 uint32_t multisample_count;
909 uint32_t autogen_filter;
910 uint32_t buffer_handle;
911 uint32_t pad64;
912 struct drm_vmw_size base_size;
913};
914
915/**
916 * struct drm_vmw_gb_surface_create_rep
917 *
918 * @handle: Surface handle.
919 * @backup_size: Size of backup buffers for this surface.
920 * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none.
921 * @buffer_size: Actual size of the buffer identified by
922 * @buffer_handle
923 * @buffer_map_handle: Offset into device address space for the buffer
924 * identified by @buffer_handle.
925 *
926 * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
927 * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
928 */
929struct drm_vmw_gb_surface_create_rep {
930 uint32_t handle;
931 uint32_t backup_size;
932 uint32_t buffer_handle;
933 uint32_t buffer_size;
934 uint64_t buffer_map_handle;
935};
936
937/**
938 * union drm_vmw_gb_surface_create_arg
939 *
940 * @req: Input argument as described above.
941 * @rep: Output argument as described above.
942 *
943 * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
944 */
945union drm_vmw_gb_surface_create_arg {
946 struct drm_vmw_gb_surface_create_rep rep;
947 struct drm_vmw_gb_surface_create_req req;
948};
949
950/*************************************************************************/
951/**
952 * DRM_VMW_GB_SURFACE_REF - Reference a host surface.
953 *
954 * Puts a reference on a host surface with a given handle, as previously
955 * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
956 * A reference will make sure the surface isn't destroyed while we hold
957 * it and will allow the calling client to use the surface handle in
958 * the command stream.
959 *
960 * On successful return, the Ioctl returns the surface information given
961 * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
962 */
963
964/**
965 * struct drm_vmw_gb_surface_reference_arg
966 *
967 * @creq: The data used as input when the surface was created, as described
968 * above at "struct drm_vmw_gb_surface_create_req"
969 * @crep: Additional data output when the surface was created, as described
970 * above at "struct drm_vmw_gb_surface_create_rep"
971 *
972 * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
973 */
974struct drm_vmw_gb_surface_ref_rep {
975 struct drm_vmw_gb_surface_create_req creq;
976 struct drm_vmw_gb_surface_create_rep crep;
977};
978
979/**
980 * union drm_vmw_gb_surface_reference_arg
981 *
982 * @req: Input data as described above at "struct drm_vmw_surface_arg"
983 * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
984 *
985 * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
986 */
987union drm_vmw_gb_surface_reference_arg {
988 struct drm_vmw_gb_surface_ref_rep rep;
989 struct drm_vmw_surface_arg req;
990};
991
992
993/*************************************************************************/
994/**
995 * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
996 *
997 * Idles any previously submitted GPU operations on the buffer and
998 * by default blocks command submissions that reference the buffer.
999 * If the file descriptor used to grab a blocking CPU sync is closed, the
1000 * cpu sync is released.
1001 * The flags argument indicates how the grab / release operation should be
1002 * performed:
1003 */
1004
1005/**
1006 * enum drm_vmw_synccpu_flags - Synccpu flags:
1007 *
1008 * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
1009 * hint to the kernel to allow command submissions that references the buffer
1010 * for read-only.
1011 * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
1012 * referencing this buffer.
1013 * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
1014 * -EBUSY should the buffer be busy.
1015 * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
1016 * while the buffer is synced for CPU. This is similar to the GEM bo idle
1017 * behavior.
1018 */
1019enum drm_vmw_synccpu_flags {
1020 drm_vmw_synccpu_read = (1 << 0),
1021 drm_vmw_synccpu_write = (1 << 1),
1022 drm_vmw_synccpu_dontblock = (1 << 2),
1023 drm_vmw_synccpu_allow_cs = (1 << 3)
1024};
1025
1026/**
1027 * enum drm_vmw_synccpu_op - Synccpu operations:
1028 *
1029 * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations
1030 * @drm_vmw_synccpu_release: Release a previous grab.
1031 */
1032enum drm_vmw_synccpu_op {
1033 drm_vmw_synccpu_grab,
1034 drm_vmw_synccpu_release
1035};
1036
1037/**
1038 * struct drm_vmw_synccpu_arg
1039 *
1040 * @op: The synccpu operation as described above.
1041 * @handle: Handle identifying the buffer object.
1042 * @flags: Flags as described above.
1043 */
1044struct drm_vmw_synccpu_arg {
1045 enum drm_vmw_synccpu_op op;
1046 enum drm_vmw_synccpu_flags flags;
1047 uint32_t handle;
1048 uint32_t pad64;
1049};
1050
790#endif 1051#endif