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-rw-r--r--include/sound/ac97_codec.h4
-rw-r--r--include/sound/ad1848.h2
-rw-r--r--include/sound/ak4114.h3
-rw-r--r--include/sound/ak4117.h2
-rw-r--r--include/sound/ak4xxx-adda.h6
-rw-r--r--include/sound/control.h5
-rw-r--r--include/sound/core.h62
-rw-r--r--include/sound/emu10k1.h418
-rw-r--r--include/sound/pcm.h4
-rw-r--r--include/sound/pt2258.h37
-rw-r--r--include/sound/sb16_csp.h14
-rw-r--r--include/sound/snd_wavefront.h2
-rw-r--r--include/sound/soc-dapm.h286
-rw-r--r--include/sound/soc.h461
-rw-r--r--include/sound/typedefs.h173
-rw-r--r--include/sound/version.h4
-rw-r--r--include/sound/vx_core.h2
-rw-r--r--include/sound/ymfpci.h6
18 files changed, 1286 insertions, 205 deletions
diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h
index 33720397a904..246ac23534bd 100644
--- a/include/sound/ac97_codec.h
+++ b/include/sound/ac97_codec.h
@@ -375,6 +375,7 @@
375#define AC97_SCAP_DETECT_BY_VENDOR (1<<8) /* use vendor registers for read tests */ 375#define AC97_SCAP_DETECT_BY_VENDOR (1<<8) /* use vendor registers for read tests */
376#define AC97_SCAP_NO_SPDIF (1<<9) /* don't build SPDIF controls */ 376#define AC97_SCAP_NO_SPDIF (1<<9) /* don't build SPDIF controls */
377#define AC97_SCAP_EAPD_LED (1<<10) /* EAPD as mute LED */ 377#define AC97_SCAP_EAPD_LED (1<<10) /* EAPD as mute LED */
378#define AC97_SCAP_POWER_SAVE (1<<11) /* capable for aggresive power-saving */
378 379
379/* ac97->flags */ 380/* ac97->flags */
380#define AC97_HAS_PC_BEEP (1<<0) /* force PC Speaker usage */ 381#define AC97_HAS_PC_BEEP (1<<0) /* force PC Speaker usage */
@@ -425,6 +426,7 @@ struct snd_ac97_build_ops {
425 426
426struct snd_ac97_bus_ops { 427struct snd_ac97_bus_ops {
427 void (*reset) (struct snd_ac97 *ac97); 428 void (*reset) (struct snd_ac97 *ac97);
429 void (*warm_reset)(struct snd_ac97 *ac97);
428 void (*write) (struct snd_ac97 *ac97, unsigned short reg, unsigned short val); 430 void (*write) (struct snd_ac97 *ac97, unsigned short reg, unsigned short val);
429 unsigned short (*read) (struct snd_ac97 *ac97, unsigned short reg); 431 unsigned short (*read) (struct snd_ac97 *ac97, unsigned short reg);
430 void (*wait) (struct snd_ac97 *ac97); 432 void (*wait) (struct snd_ac97 *ac97);
@@ -501,6 +503,7 @@ struct snd_ac97 {
501 unsigned short id[3]; // codec IDs (lower 16-bit word) 503 unsigned short id[3]; // codec IDs (lower 16-bit word)
502 unsigned short pcmreg[3]; // PCM registers 504 unsigned short pcmreg[3]; // PCM registers
503 unsigned short codec_cfg[3]; // CODEC_CFG bits 505 unsigned short codec_cfg[3]; // CODEC_CFG bits
506 unsigned char swap_mic_linein; // AD1986/AD1986A only
504 } ad18xx; 507 } ad18xx;
505 unsigned int dev_flags; /* device specific */ 508 unsigned int dev_flags; /* device specific */
506 } spec; 509 } spec;
@@ -510,7 +513,6 @@ struct snd_ac97 {
510 513
511#ifdef CONFIG_SND_AC97_POWER_SAVE 514#ifdef CONFIG_SND_AC97_POWER_SAVE
512 unsigned int power_up; /* power states */ 515 unsigned int power_up; /* power states */
513 struct workqueue_struct *power_workq;
514 struct delayed_work power_work; 516 struct delayed_work power_work;
515#endif 517#endif
516 struct device dev; 518 struct device dev;
diff --git a/include/sound/ad1848.h b/include/sound/ad1848.h
index c8de6f83338f..b2c3f00a9b35 100644
--- a/include/sound/ad1848.h
+++ b/include/sound/ad1848.h
@@ -185,7 +185,7 @@ struct ad1848_mix_elem {
185 int index; 185 int index;
186 int type; 186 int type;
187 unsigned long private_value; 187 unsigned long private_value;
188 unsigned int *tlv; 188 const unsigned int *tlv;
189}; 189};
190 190
191#define AD1848_SINGLE(xname, xindex, reg, shift, mask, invert) \ 191#define AD1848_SINGLE(xname, xindex, reg, shift, mask, invert) \
diff --git a/include/sound/ak4114.h b/include/sound/ak4114.h
index 2ee061625fd0..c149d3b2558b 100644
--- a/include/sound/ak4114.h
+++ b/include/sound/ak4114.h
@@ -181,7 +181,6 @@ struct ak4114 {
181 unsigned long ccrc_errors; 181 unsigned long ccrc_errors;
182 unsigned char rcs0; 182 unsigned char rcs0;
183 unsigned char rcs1; 183 unsigned char rcs1;
184 struct workqueue_struct *workqueue;
185 struct delayed_work work; 184 struct delayed_work work;
186 void *change_callback_private; 185 void *change_callback_private;
187 void (*change_callback)(struct ak4114 *ak4114, unsigned char c0, unsigned char c1); 186 void (*change_callback)(struct ak4114 *ak4114, unsigned char c0, unsigned char c1);
@@ -189,7 +188,7 @@ struct ak4114 {
189 188
190int snd_ak4114_create(struct snd_card *card, 189int snd_ak4114_create(struct snd_card *card,
191 ak4114_read_t *read, ak4114_write_t *write, 190 ak4114_read_t *read, ak4114_write_t *write,
192 unsigned char pgm[7], unsigned char txcsb[5], 191 const unsigned char pgm[7], const unsigned char txcsb[5],
193 void *private_data, struct ak4114 **r_ak4114); 192 void *private_data, struct ak4114 **r_ak4114);
194void snd_ak4114_reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char mask, unsigned char val); 193void snd_ak4114_reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char mask, unsigned char val);
195void snd_ak4114_reinit(struct ak4114 *ak4114); 194void snd_ak4114_reinit(struct ak4114 *ak4114);
diff --git a/include/sound/ak4117.h b/include/sound/ak4117.h
index 2b96c32f06fd..d650d52e3d29 100644
--- a/include/sound/ak4117.h
+++ b/include/sound/ak4117.h
@@ -178,7 +178,7 @@ struct ak4117 {
178}; 178};
179 179
180int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write, 180int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
181 unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117); 181 const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117);
182void snd_ak4117_reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char mask, unsigned char val); 182void snd_ak4117_reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char mask, unsigned char val);
183void snd_ak4117_reinit(struct ak4117 *ak4117); 183void snd_ak4117_reinit(struct ak4117 *ak4117);
184int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *capture_substream); 184int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *capture_substream);
diff --git a/include/sound/ak4xxx-adda.h b/include/sound/ak4xxx-adda.h
index d0deca669b92..aa49dda4f410 100644
--- a/include/sound/ak4xxx-adda.h
+++ b/include/sound/ak4xxx-adda.h
@@ -50,6 +50,8 @@ struct snd_akm4xxx_adc_channel {
50 char *name; /* capture gain volume label */ 50 char *name; /* capture gain volume label */
51 char *switch_name; /* capture switch */ 51 char *switch_name; /* capture switch */
52 unsigned int num_channels; 52 unsigned int num_channels;
53 char *selector_name; /* capture source select label */
54 const char **input_names; /* capture source names (NULL terminated) */
53}; 55};
54 56
55struct snd_akm4xxx { 57struct snd_akm4xxx {
@@ -69,8 +71,8 @@ struct snd_akm4xxx {
69 } type; 71 } type;
70 72
71 /* (array) information of combined codecs */ 73 /* (array) information of combined codecs */
72 struct snd_akm4xxx_dac_channel *dac_info; 74 const struct snd_akm4xxx_dac_channel *dac_info;
73 struct snd_akm4xxx_adc_channel *adc_info; 75 const struct snd_akm4xxx_adc_channel *adc_info;
74 76
75 struct snd_ak4xxx_ops ops; 77 struct snd_ak4xxx_ops ops;
76}; 78};
diff --git a/include/sound/control.h b/include/sound/control.h
index 1de148b0fd94..72e759f619b1 100644
--- a/include/sound/control.h
+++ b/include/sound/control.h
@@ -49,7 +49,7 @@ struct snd_kcontrol_new {
49 snd_kcontrol_put_t *put; 49 snd_kcontrol_put_t *put;
50 union { 50 union {
51 snd_kcontrol_tlv_rw_t *c; 51 snd_kcontrol_tlv_rw_t *c;
52 unsigned int *p; 52 const unsigned int *p;
53 } tlv; 53 } tlv;
54 unsigned long private_value; 54 unsigned long private_value;
55}; 55};
@@ -69,7 +69,7 @@ struct snd_kcontrol {
69 snd_kcontrol_put_t *put; 69 snd_kcontrol_put_t *put;
70 union { 70 union {
71 snd_kcontrol_tlv_rw_t *c; 71 snd_kcontrol_tlv_rw_t *c;
72 unsigned int *p; 72 const unsigned int *p;
73 } tlv; 73 } tlv;
74 unsigned long private_value; 74 unsigned long private_value;
75 void *private_data; 75 void *private_data;
@@ -108,7 +108,6 @@ typedef int (*snd_kctl_ioctl_func_t) (struct snd_card * card,
108 108
109void snd_ctl_notify(struct snd_card * card, unsigned int mask, struct snd_ctl_elem_id * id); 109void snd_ctl_notify(struct snd_card * card, unsigned int mask, struct snd_ctl_elem_id * id);
110 110
111struct snd_kcontrol *snd_ctl_new(struct snd_kcontrol * kcontrol, unsigned int access);
112struct snd_kcontrol *snd_ctl_new1(const struct snd_kcontrol_new * kcontrolnew, void * private_data); 111struct snd_kcontrol *snd_ctl_new1(const struct snd_kcontrol_new * kcontrolnew, void * private_data);
113void snd_ctl_free_one(struct snd_kcontrol * kcontrol); 112void snd_ctl_free_one(struct snd_kcontrol * kcontrol);
114int snd_ctl_add(struct snd_card * card, struct snd_kcontrol * kcontrol); 113int snd_ctl_add(struct snd_card * card, struct snd_kcontrol * kcontrol);
diff --git a/include/sound/core.h b/include/sound/core.h
index 521f036cce99..4b9e609975ab 100644
--- a/include/sound/core.h
+++ b/include/sound/core.h
@@ -211,9 +211,40 @@ extern struct class *sound_class;
211 211
212void snd_request_card(int card); 212void snd_request_card(int card);
213 213
214int snd_register_device(int type, struct snd_card *card, int dev, 214int snd_register_device_for_dev(int type, struct snd_card *card,
215 const struct file_operations *f_ops, void *private_data, 215 int dev,
216 const char *name); 216 const struct file_operations *f_ops,
217 void *private_data,
218 const char *name,
219 struct device *device);
220
221/**
222 * snd_register_device - Register the ALSA device file for the card
223 * @type: the device type, SNDRV_DEVICE_TYPE_XXX
224 * @card: the card instance
225 * @dev: the device index
226 * @f_ops: the file operations
227 * @private_data: user pointer for f_ops->open()
228 * @name: the device file name
229 *
230 * Registers an ALSA device file for the given card.
231 * The operators have to be set in reg parameter.
232 *
233 * This function uses the card's device pointer to link to the
234 * correct &struct device.
235 *
236 * Returns zero if successful, or a negative error code on failure.
237 */
238static inline int snd_register_device(int type, struct snd_card *card, int dev,
239 const struct file_operations *f_ops,
240 void *private_data,
241 const char *name)
242{
243 return snd_register_device_for_dev(type, card, dev, f_ops,
244 private_data, name,
245 snd_card_get_device_link(card));
246}
247
217int snd_unregister_device(int type, struct snd_card *card, int dev); 248int snd_unregister_device(int type, struct snd_card *card, int dev);
218void *snd_lookup_minor_data(unsigned int minor, int type); 249void *snd_lookup_minor_data(unsigned int minor, int type);
219int snd_add_device_sysfs_file(int type, struct snd_card *card, int dev, 250int snd_add_device_sysfs_file(int type, struct snd_card *card, int dev,
@@ -396,6 +427,29 @@ void snd_verbose_printd(const char *file, int line, const char *format, ...)
396#endif 427#endif
397#endif 428#endif
398 429
399#include "typedefs.h" 430/* PCI quirk list helper */
431struct snd_pci_quirk {
432 unsigned short subvendor; /* PCI subvendor ID */
433 unsigned short subdevice; /* PCI subdevice ID */
434 int value; /* value */
435#ifdef CONFIG_SND_DEBUG_DETECT
436 const char *name; /* name of the device (optional) */
437#endif
438};
439
440#define _SND_PCI_QUIRK_ID(vend,dev) \
441 .subvendor = (vend), .subdevice = (dev)
442#define SND_PCI_QUIRK_ID(vend,dev) {_SND_PCI_QUIRK_ID(vend, dev)}
443#ifdef CONFIG_SND_DEBUG_DETECT
444#define SND_PCI_QUIRK(vend,dev,xname,val) \
445 {_SND_PCI_QUIRK_ID(vend, dev), .value = (val), .name = (xname)}
446#else
447#define SND_PCI_QUIRK(vend,dev,xname,val) \
448 {_SND_PCI_QUIRK_ID(vend, dev), .value = (val)}
449#endif
450
451const struct snd_pci_quirk *
452snd_pci_quirk_lookup(struct pci_dev *pci, const struct snd_pci_quirk *list);
453
400 454
401#endif /* __SOUND_CORE_H */ 455#endif /* __SOUND_CORE_H */
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 3d3c1514cf71..eb7ce96ddf3a 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -188,7 +188,35 @@
188#define HCFG_LEGACYINT 0x00200000 /* 1 = legacy event captured. Write 1 to clear. */ 188#define HCFG_LEGACYINT 0x00200000 /* 1 = legacy event captured. Write 1 to clear. */
189 /* NOTE: The rest of the bits in this register */ 189 /* NOTE: The rest of the bits in this register */
190 /* _are_ relevant under Linux. */ 190 /* _are_ relevant under Linux. */
191#define HCFG_CODECFORMAT_MASK 0x00070000 /* CODEC format */ 191#define HCFG_PUSH_BUTTON_ENABLE 0x00100000 /* Enables Volume Inc/Dec and Mute functions */
192#define HCFG_BAUD_RATE 0x00080000 /* 0 = 48kHz, 1 = 44.1kHz */
193#define HCFG_EXPANDED_MEM 0x00040000 /* 1 = any 16M of 4G addr, 0 = 32M of 2G addr */
194#define HCFG_CODECFORMAT_MASK 0x00030000 /* CODEC format */
195
196/* Specific to Alice2, CA0102 */
197#define HCFG_CODECFORMAT_AC97_1 0x00000000 /* AC97 CODEC format -- Ver 1.03 */
198#define HCFG_CODECFORMAT_AC97_2 0x00010000 /* AC97 CODEC format -- Ver 2.1 */
199#define HCFG_AUTOMUTE_ASYNC 0x00008000 /* When set, the async sample rate convertors */
200 /* will automatically mute their output when */
201 /* they are not rate-locked to the external */
202 /* async audio source */
203#define HCFG_AUTOMUTE_SPDIF 0x00004000 /* When set, the async sample rate convertors */
204 /* will automatically mute their output when */
205 /* the SPDIF V-bit indicates invalid audio */
206#define HCFG_EMU32_SLAVE 0x00002000 /* 0 = Master, 1 = Slave. Slave for EMU1010 */
207#define HCFG_SLOW_RAMP 0x00001000 /* Increases Send Smoothing time constant */
208/* 0x00000800 not used on Alice2 */
209#define HCFG_PHASE_TRACK_MASK 0x00000700 /* When set, forces corresponding input to */
210 /* phase track the previous input. */
211 /* I2S0 can phase track the last S/PDIF input */
212#define HCFG_I2S_ASRC_ENABLE 0x00000070 /* When set, enables asynchronous sample rate */
213 /* conversion for the corresponding */
214 /* I2S format input */
215/* Rest of HCFG 0x0000000f same as below. LOCKSOUNDCACHE etc. */
216
217
218
219/* Older chips */
192#define HCFG_CODECFORMAT_AC97 0x00000000 /* AC97 CODEC format -- Primary Output */ 220#define HCFG_CODECFORMAT_AC97 0x00000000 /* AC97 CODEC format -- Primary Output */
193#define HCFG_CODECFORMAT_I2S 0x00010000 /* I2S CODEC format -- Secondary (Rear) Output */ 221#define HCFG_CODECFORMAT_I2S 0x00010000 /* I2S CODEC format -- Secondary (Rear) Output */
194#define HCFG_GPINPUT0 0x00004000 /* External pin112 */ 222#define HCFG_GPINPUT0 0x00004000 /* External pin112 */
@@ -432,6 +460,7 @@
432#define FXRT_CHANNELC 0x0f000000 /* Effects send bus number for channel's effects send C */ 460#define FXRT_CHANNELC 0x0f000000 /* Effects send bus number for channel's effects send C */
433#define FXRT_CHANNELD 0xf0000000 /* Effects send bus number for channel's effects send D */ 461#define FXRT_CHANNELD 0xf0000000 /* Effects send bus number for channel's effects send D */
434 462
463#define A_HR 0x0b /* High Resolution. 24bit playback from host to DSP. */
435#define MAPA 0x0c /* Cache map A */ 464#define MAPA 0x0c /* Cache map A */
436 465
437#define MAPB 0x0d /* Cache map B */ 466#define MAPB 0x0d /* Cache map B */
@@ -439,6 +468,8 @@
439#define MAP_PTE_MASK 0xffffe000 /* The 19 MSBs of the PTE indexed by the PTI */ 468#define MAP_PTE_MASK 0xffffe000 /* The 19 MSBs of the PTE indexed by the PTI */
440#define MAP_PTI_MASK 0x00001fff /* The 13 bit index to one of the 8192 PTE dwords */ 469#define MAP_PTI_MASK 0x00001fff /* The 13 bit index to one of the 8192 PTE dwords */
441 470
471/* 0x0e, 0x0f: Not used */
472
442#define ENVVOL 0x10 /* Volume envelope register */ 473#define ENVVOL 0x10 /* Volume envelope register */
443#define ENVVOL_MASK 0x0000ffff /* Current value of volume envelope state variable */ 474#define ENVVOL_MASK 0x0000ffff /* Current value of volume envelope state variable */
444 /* 0x8000-n == 666*n usec delay */ 475 /* 0x8000-n == 666*n usec delay */
@@ -527,7 +558,7 @@
527 /* NOTE: All channels contain internal variables; do */ 558 /* NOTE: All channels contain internal variables; do */
528 /* not write to these locations. */ 559 /* not write to these locations. */
529 560
530/* 1f something */ 561/* 0x1f: not used */
531 562
532#define CD0 0x20 /* Cache data 0 register */ 563#define CD0 0x20 /* Cache data 0 register */
533#define CD1 0x21 /* Cache data 1 register */ 564#define CD1 0x21 /* Cache data 1 register */
@@ -597,6 +628,8 @@
597#define FXWC_SPDIFLEFT (1<<22) /* 0x00400000 */ 628#define FXWC_SPDIFLEFT (1<<22) /* 0x00400000 */
598#define FXWC_SPDIFRIGHT (1<<23) /* 0x00800000 */ 629#define FXWC_SPDIFRIGHT (1<<23) /* 0x00800000 */
599 630
631#define A_TBLSZ ` 0x43 /* Effects Tank Internal Table Size. Only low byte or register used */
632
600#define TCBS 0x44 /* Tank cache buffer size register */ 633#define TCBS 0x44 /* Tank cache buffer size register */
601#define TCBS_MASK 0x00000007 /* Tank cache buffer size field */ 634#define TCBS_MASK 0x00000007 /* Tank cache buffer size field */
602#define TCBS_BUFFSIZE_16K 0x00000000 635#define TCBS_BUFFSIZE_16K 0x00000000
@@ -617,7 +650,7 @@
617#define FXBA 0x47 /* FX Buffer Address */ 650#define FXBA 0x47 /* FX Buffer Address */
618#define FXBA_MASK 0xfffff000 /* 20 bit base address */ 651#define FXBA_MASK 0xfffff000 /* 20 bit base address */
619 652
620/* 0x48 something - word access, defaults to 3f */ 653#define A_HWM 0x48 /* High PCI Water Mark - word access, defaults to 3f */
621 654
622#define MICBS 0x49 /* Microphone buffer size register */ 655#define MICBS 0x49 /* Microphone buffer size register */
623 656
@@ -661,6 +694,18 @@
661#define ADCBS_BUFSIZE_57344 0x0000001e 694#define ADCBS_BUFSIZE_57344 0x0000001e
662#define ADCBS_BUFSIZE_65536 0x0000001f 695#define ADCBS_BUFSIZE_65536 0x0000001f
663 696
697/* Current Send B, A Amounts */
698#define A_CSBA 0x4c
699
700/* Current Send D, C Amounts */
701#define A_CSDC 0x4d
702
703/* Current Send F, E Amounts */
704#define A_CSFE 0x4e
705
706/* Current Send H, G Amounts */
707#define A_CSHG 0x4f
708
664 709
665#define CDCS 0x50 /* CD-ROM digital channel status register */ 710#define CDCS 0x50 /* CD-ROM digital channel status register */
666 711
@@ -668,6 +713,9 @@
668 713
669#define DBG 0x52 /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */ 714#define DBG 0x52 /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */
670 715
716/* S/PDIF Input C Channel Status */
717#define A_SPSC 0x52
718
671#define REG53 0x53 /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */ 719#define REG53 0x53 /* DO NOT PROGRAM THIS REGISTER!!! MAY DESTROY CHIP */
672 720
673#define A_DBG 0x53 721#define A_DBG 0x53
@@ -708,6 +756,8 @@
708#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */ 756#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
709#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */ 757#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
710 758
759/* 0x57: Not used */
760
711/* The 32-bit CLIx and SOLx registers all have one bit per channel control/status */ 761/* The 32-bit CLIx and SOLx registers all have one bit per channel control/status */
712#define CLIEL 0x58 /* Channel loop interrupt enable low register */ 762#define CLIEL 0x58 /* Channel loop interrupt enable low register */
713 763
@@ -733,6 +783,9 @@
733#define AC97SLOT_CNTR 0x10 /* Center enable */ 783#define AC97SLOT_CNTR 0x10 /* Center enable */
734#define AC97SLOT_LFE 0x20 /* LFE enable */ 784#define AC97SLOT_LFE 0x20 /* LFE enable */
735 785
786/* PCB Revision */
787#define A_PCB 0x5f
788
736// NOTE: 0x60,61,62: 64-bit 789// NOTE: 0x60,61,62: 64-bit
737#define CDSRCS 0x60 /* CD-ROM Sample Rate Converter status register */ 790#define CDSRCS 0x60 /* CD-ROM Sample Rate Converter status register */
738 791
@@ -780,9 +833,18 @@
780 833
781#define HLIPH 0x69 /* Channel half loop interrupt pending high register */ 834#define HLIPH 0x69 /* Channel half loop interrupt pending high register */
782 835
783// 0x6a,6b,6c used for some recording 836/* S/PDIF Host Record Index (bypasses SRC) */
784// 0x6d unused 837#define A_SPRI 0x6a
785// 0x6e,6f - tanktable base / offset 838/* S/PDIF Host Record Address */
839#define A_SPRA 0x6b
840/* S/PDIF Host Record Control */
841#define A_SPRC 0x6c
842/* Delayed Interrupt Counter & Enable */
843#define A_DICE 0x6d
844/* Tank Table Base */
845#define A_TTB 0x6e
846/* Tank Delay Offset */
847#define A_TDOF 0x6f
786 848
787/* This is the MPU port on the card (via the game port) */ 849/* This is the MPU port on the card (via the game port) */
788#define A_MUDATA1 0x70 850#define A_MUDATA1 0x70
@@ -800,6 +862,7 @@
800#define A_FXWC1 0x74 /* Selects 0x7f-0x60 for FX recording */ 862#define A_FXWC1 0x74 /* Selects 0x7f-0x60 for FX recording */
801#define A_FXWC2 0x75 /* Selects 0x9f-0x80 for FX recording */ 863#define A_FXWC2 0x75 /* Selects 0x9f-0x80 for FX recording */
802 864
865/* Extended Hardware Control */
803#define A_SPDIF_SAMPLERATE 0x76 /* Set the sample rate of SPDIF output */ 866#define A_SPDIF_SAMPLERATE 0x76 /* Set the sample rate of SPDIF output */
804#define A_SAMPLE_RATE 0x76 /* Various sample rate settings. */ 867#define A_SAMPLE_RATE 0x76 /* Various sample rate settings. */
805#define A_SAMPLE_RATE_NOT_USED 0x0ffc111e /* Bits that are not used and cannot be set. */ 868#define A_SAMPLE_RATE_NOT_USED 0x0ffc111e /* Bits that are not used and cannot be set. */
@@ -822,8 +885,20 @@
822#define A_PCM_96000 0x00004000 885#define A_PCM_96000 0x00004000
823#define A_PCM_44100 0x00008000 886#define A_PCM_44100 0x00008000
824 887
825/* 0x77,0x78,0x79 "something i2s-related" - default to 0x01080000 on my audigy 2 ZS --rlrevell */ 888/* I2S0 Sample Rate Tracker Status */
826/* 0x7a, 0x7b - lookup tables */ 889#define A_SRT3 0x77
890
891/* I2S1 Sample Rate Tracker Status */
892#define A_SRT4 0x78
893
894/* I2S2 Sample Rate Tracker Status */
895#define A_SRT5 0x79
896/* - default to 0x01080000 on my audigy 2 ZS --rlrevell */
897
898/* Tank Table DMA Address */
899#define A_TTDA 0x7a
900/* Tank Table DMA Data */
901#define A_TTDD 0x7b
827 902
828#define A_FXRT2 0x7c 903#define A_FXRT2 0x7c
829#define A_FXRT_CHANNELE 0x0000003f /* Effects send bus number for channel's effects send E */ 904#define A_FXRT_CHANNELE 0x0000003f /* Effects send bus number for channel's effects send E */
@@ -845,7 +920,7 @@
845#define A_FXRT_CHANNELC 0x003f0000 920#define A_FXRT_CHANNELC 0x003f0000
846#define A_FXRT_CHANNELD 0x3f000000 921#define A_FXRT_CHANNELD 0x3f000000
847 922
848 923/* 0x7f: Not used */
849/* Each FX general purpose register is 32 bits in length, all bits are used */ 924/* Each FX general purpose register is 32 bits in length, all bits are used */
850#define FXGPREGBASE 0x100 /* FX general purpose registers base */ 925#define FXGPREGBASE 0x100 /* FX general purpose registers base */
851#define A_FXGPREGBASE 0x400 /* Audigy GPRs, 0x400 to 0x5ff */ 926#define A_FXGPREGBASE 0x400 /* Audigy GPRs, 0x400 to 0x5ff */
@@ -886,6 +961,293 @@
886#define A_HIWORD_RESULT_MASK 0x007ff000 961#define A_HIWORD_RESULT_MASK 0x007ff000
887#define A_HIWORD_OPA_MASK 0x000007ff 962#define A_HIWORD_OPA_MASK 0x000007ff
888 963
964/************************************************************************************************/
965/* EMU1010m HANA FPGA registers */
966/************************************************************************************************/
967#define EMU_HANA_DESTHI 0x00 /* 0000xxx 3 bits Link Destination */
968#define EMU_HANA_DESTLO 0x01 /* 00xxxxx 5 bits */
969#define EMU_HANA_SRCHI 0x02 /* 0000xxx 3 bits Link Source */
970#define EMU_HANA_SRCLO 0x03 /* 00xxxxx 5 bits */
971#define EMU_HANA_DOCK_PWR 0x04 /* 000000x 1 bits Audio Dock power */
972#define EMU_HANA_DOCK_PWR_ON 0x01 /* Audio Dock power on */
973#define EMU_HANA_WCLOCK 0x05 /* 0000xxx 3 bits Word Clock source select */
974 /* Must be written after power on to reset DLL */
975 /* One is unable to detect the Audio dock without this */
976#define EMU_HANA_WCLOCK_SRC_MASK 0x07
977#define EMU_HANA_WCLOCK_INT_48K 0x00
978#define EMU_HANA_WCLOCK_INT_44_1K 0x01
979#define EMU_HANA_WCLOCK_HANA_SPDIF_IN 0x02
980#define EMU_HANA_WCLOCK_HANA_ADAT_IN 0x03
981#define EMU_HANA_WCLOCK_SYNC_BNCN 0x04
982#define EMU_HANA_WCLOCK_2ND_HANA 0x05
983#define EMU_HANA_WCLOCK_SRC_RESERVED 0x06
984#define EMU_HANA_WCLOCK_OFF 0x07 /* For testing, forces fallback to DEFCLOCK */
985#define EMU_HANA_WCLOCK_MULT_MASK 0x18
986#define EMU_HANA_WCLOCK_1X 0x00
987#define EMU_HANA_WCLOCK_2X 0x08
988#define EMU_HANA_WCLOCK_4X 0x10
989#define EMU_HANA_WCLOCK_MULT_RESERVED 0x18
990
991#define EMU_HANA_DEFCLOCK 0x06 /* 000000x 1 bits Default Word Clock */
992#define EMU_HANA_DEFCLOCK_48K 0x00
993#define EMU_HANA_DEFCLOCK_44_1K 0x01
994
995#define EMU_HANA_UNMUTE 0x07 /* 000000x 1 bits Mute all audio outputs */
996#define EMU_MUTE 0x00
997#define EMU_UNMUTE 0x01
998
999#define EMU_HANA_FPGA_CONFIG 0x08 /* 00000xx 2 bits Config control of FPGAs */
1000#define EMU_HANA_FPGA_CONFIG_AUDIODOCK 0x01 /* Set in order to program FPGA on Audio Dock */
1001#define EMU_HANA_FPGA_CONFIG_HANA 0x02 /* Set in order to program FPGA on Hana */
1002
1003#define EMU_HANA_IRQ_ENABLE 0x09 /* 000xxxx 4 bits IRQ Enable */
1004#define EMU_HANA_IRQ_WCLK_CHANGED 0x01
1005#define EMU_HANA_IRQ_ADAT 0x02
1006#define EMU_HANA_IRQ_DOCK 0x04
1007#define EMU_HANA_IRQ_DOCK_LOST 0x08
1008
1009#define EMU_HANA_SPDIF_MODE 0x0a /* 00xxxxx 5 bits SPDIF MODE */
1010#define EMU_HANA_SPDIF_MODE_TX_COMSUMER 0x00
1011#define EMU_HANA_SPDIF_MODE_TX_PRO 0x01
1012#define EMU_HANA_SPDIF_MODE_TX_NOCOPY 0x02
1013#define EMU_HANA_SPDIF_MODE_RX_COMSUMER 0x00
1014#define EMU_HANA_SPDIF_MODE_RX_PRO 0x04
1015#define EMU_HANA_SPDIF_MODE_RX_NOCOPY 0x08
1016#define EMU_HANA_SPDIF_MODE_RX_INVALID 0x10
1017
1018#define EMU_HANA_OPTICAL_TYPE 0x0b /* 00000xx 2 bits ADAT or SPDIF in/out */
1019#define EMU_HANA_OPTICAL_IN_SPDIF 0x00
1020#define EMU_HANA_OPTICAL_IN_ADAT 0x01
1021#define EMU_HANA_OPTICAL_OUT_SPDIF 0x00
1022#define EMU_HANA_OPTICAL_OUT_ADAT 0x02
1023
1024#define EMU_HANA_MIDI_IN 0x0c /* 000000x 1 bit Control MIDI */
1025#define EMU_HANA_MIDI_IN_FROM_HAMOA 0x00 /* HAMOA MIDI in to Alice 2 MIDI B */
1026#define EMU_HANA_MIDI_IN_FROM_DOCK 0x01 /* Audio Dock MIDI in to Alice 2 MIDI B */
1027
1028#define EMU_HANA_DOCK_LEDS_1 0x0d /* 000xxxx 4 bit Audio Dock LEDs */
1029#define EMU_HANA_DOCK_LEDS_1_MIDI1 0x01 /* MIDI 1 LED on */
1030#define EMU_HANA_DOCK_LEDS_1_MIDI2 0x02 /* MIDI 2 LED on */
1031#define EMU_HANA_DOCK_LEDS_1_SMPTE_IN 0x04 /* SMPTE IN LED on */
1032#define EMU_HANA_DOCK_LEDS_1_SMPTE_OUT 0x08 /* SMPTE OUT LED on */
1033
1034#define EMU_HANA_DOCK_LEDS_2 0x0e /* 0xxxxxx 6 bit Audio Dock LEDs */
1035#define EMU_HANA_DOCK_LEDS_2_44K 0x01 /* 44.1 kHz LED on */
1036#define EMU_HANA_DOCK_LEDS_2_48K 0x02 /* 48 kHz LED on */
1037#define EMU_HANA_DOCK_LEDS_2_96K 0x04 /* 96 kHz LED on */
1038#define EMU_HANA_DOCK_LEDS_2_192K 0x08 /* 192 kHz LED on */
1039#define EMU_HANA_DOCK_LEDS_2_LOCK 0x10 /* LOCK LED on */
1040#define EMU_HANA_DOCK_LEDS_2_EXT 0x20 /* EXT LED on */
1041
1042#define EMU_HANA_DOCK_LEDS_3 0x0f /* 0xxxxxx 6 bit Audio Dock LEDs */
1043#define EMU_HANA_DOCK_LEDS_3_CLIP_A 0x01 /* Mic A Clip LED on */
1044#define EMU_HANA_DOCK_LEDS_3_CLIP_B 0x02 /* Mic B Clip LED on */
1045#define EMU_HANA_DOCK_LEDS_3_SIGNAL_A 0x04 /* Signal A Clip LED on */
1046#define EMU_HANA_DOCK_LEDS_3_SIGNAL_B 0x08 /* Signal B Clip LED on */
1047#define EMU_HANA_DOCK_LEDS_3_MANUAL_CLIP 0x10 /* Manual Clip detection */
1048#define EMU_HANA_DOCK_LEDS_3_MANUAL_SIGNAL 0x20 /* Manual Signal detection */
1049
1050#define EMU_HANA_ADC_PADS 0x10 /* 0000xxx 3 bit Audio Dock ADC 14dB pads */
1051#define EMU_HANA_DOCK_ADC_PAD1 0x01 /* 14dB Attenuation on Audio Dock ADC 1 */
1052#define EMU_HANA_DOCK_ADC_PAD2 0x02 /* 14dB Attenuation on Audio Dock ADC 2 */
1053#define EMU_HANA_DOCK_ADC_PAD3 0x04 /* 14dB Attenuation on Audio Dock ADC 3 */
1054#define EMU_HANA_0202_ADC_PAD1 0x08 /* 14dB Attenuation on 0202 ADC 1 */
1055
1056#define EMU_HANA_DOCK_MISC 0x11 /* 0xxxxxx 6 bit Audio Dock misc bits */
1057#define EMU_HANA_DOCK_DAC1_MUTE 0x01 /* DAC 1 Mute */
1058#define EMU_HANA_DOCK_DAC2_MUTE 0x02 /* DAC 2 Mute */
1059#define EMU_HANA_DOCK_DAC3_MUTE 0x04 /* DAC 3 Mute */
1060#define EMU_HANA_DOCK_DAC4_MUTE 0x08 /* DAC 4 Mute */
1061#define EMU_HANA_DOCK_PHONES_192_DAC1 0x00 /* DAC 1 Headphones source at 192kHz */
1062#define EMU_HANA_DOCK_PHONES_192_DAC2 0x10 /* DAC 2 Headphones source at 192kHz */
1063#define EMU_HANA_DOCK_PHONES_192_DAC3 0x20 /* DAC 3 Headphones source at 192kHz */
1064#define EMU_HANA_DOCK_PHONES_192_DAC4 0x30 /* DAC 4 Headphones source at 192kHz */
1065
1066#define EMU_HANA_MIDI_OUT 0x12 /* 00xxxxx 5 bit Source for each MIDI out port */
1067#define EMU_HANA_MIDI_OUT_0202 0x01 /* 0202 MIDI from Alice 2. 0 = A, 1 = B */
1068#define EMU_HANA_MIDI_OUT_DOCK1 0x02 /* Audio Dock MIDI1 front, from Alice 2. 0 = A, 1 = B */
1069#define EMU_HANA_MIDI_OUT_DOCK2 0x04 /* Audio Dock MIDI2 rear, from Alice 2. 0 = A, 1 = B */
1070#define EMU_HANA_MIDI_OUT_SYNC2 0x08 /* Sync card. Not the actual MIDI out jack. 0 = A, 1 = B */
1071#define EMU_HANA_MIDI_OUT_LOOP 0x10 /* 0 = bits (3:0) normal. 1 = MIDI loopback enabled. */
1072
1073#define EMU_HANA_DAC_PADS 0x13 /* 00xxxxx 5 bit DAC 14dB attenuation pads */
1074#define EMU_HANA_DOCK_DAC_PAD1 0x01 /* 14dB Attenuation on AudioDock DAC 1. Left and Right */
1075#define EMU_HANA_DOCK_DAC_PAD2 0x02 /* 14dB Attenuation on AudioDock DAC 2. Left and Right */
1076#define EMU_HANA_DOCK_DAC_PAD3 0x04 /* 14dB Attenuation on AudioDock DAC 3. Left and Right */
1077#define EMU_HANA_DOCK_DAC_PAD4 0x08 /* 14dB Attenuation on AudioDock DAC 4. Left and Right */
1078#define EMU_HANA_0202_DAC_PAD1 0x10 /* 14dB Attenuation on 0202 DAC 1. Left and Right */
1079
1080/* 0x14 - 0x1f Unused R/W registers */
1081#define EMU_HANA_IRQ_STATUS 0x20 /* 000xxxx 4 bits IRQ Status */
1082#if 0 /* Already defined for reg 0x09 IRQ_ENABLE */
1083#define EMU_HANA_IRQ_WCLK_CHANGED 0x01
1084#define EMU_HANA_IRQ_ADAT 0x02
1085#define EMU_HANA_IRQ_DOCK 0x04
1086#define EMU_HANA_IRQ_DOCK_LOST 0x08
1087#endif
1088
1089#define EMU_HANA_OPTION_CARDS 0x21 /* 000xxxx 4 bits Presence of option cards */
1090#define EMU_HANA_OPTION_HAMOA 0x01 /* HAMOA card present */
1091#define EMU_HANA_OPTION_SYNC 0x02 /* Sync card present */
1092#define EMU_HANA_OPTION_DOCK_ONLINE 0x04 /* Audio Dock online and FPGA configured */
1093#define EMU_HANA_OPTION_DOCK_OFFLINE 0x08 /* Audio Dock online and FPGA not configured */
1094
1095#define EMU_HANA_ID 0x22 /* 1010101 7 bits ID byte & 0x7f = 0x55 */
1096
1097#define EMU_HANA_MAJOR_REV 0x23 /* 0000xxx 3 bit Hana FPGA Major rev */
1098#define EMU_HANA_MINOR_REV 0x24 /* 0000xxx 3 bit Hana FPGA Minor rev */
1099
1100#define EMU_DOCK_MAJOR_REV 0x25 /* 0000xxx 3 bit Audio Dock FPGA Major rev */
1101#define EMU_DOCK_MINOR_REV 0x26 /* 0000xxx 3 bit Audio Dock FPGA Minor rev */
1102
1103#define EMU_DOCK_BOARD_ID 0x27 /* 00000xx 2 bits Audio Dock ID pins */
1104#define EMU_DOCK_BOARD_ID0 0x00 /* ID bit 0 */
1105#define EMU_DOCK_BOARD_ID1 0x03 /* ID bit 1 */
1106
1107#define EMU_HANA_WC_SPDIF_HI 0x28 /* 0xxxxxx 6 bit SPDIF IN Word clock, upper 6 bits */
1108#define EMU_HANA_WC_SPDIF_LO 0x29 /* 0xxxxxx 6 bit SPDIF IN Word clock, lower 6 bits */
1109
1110#define EMU_HANA_WC_ADAT_HI 0x2a /* 0xxxxxx 6 bit ADAT IN Word clock, upper 6 bits */
1111#define EMU_HANA_WC_ADAT_LO 0x2b /* 0xxxxxx 6 bit ADAT IN Word clock, lower 6 bits */
1112
1113#define EMU_HANA_WC_BNC_LO 0x2c /* 0xxxxxx 6 bit BNC IN Word clock, lower 6 bits */
1114#define EMU_HANA_WC_BNC_HI 0x2d /* 0xxxxxx 6 bit BNC IN Word clock, upper 6 bits */
1115
1116#define EMU_HANA2_WC_SPDIF_HI 0x2e /* 0xxxxxx 6 bit HANA2 SPDIF IN Word clock, upper 6 bits */
1117#define EMU_HANA2_WC_SPDIF_LO 0x2f /* 0xxxxxx 6 bit HANA2 SPDIF IN Word clock, lower 6 bits */
1118/* 0x30 - 0x3f Unused Read only registers */
1119
1120/************************************************************************************************/
1121/* EMU1010m HANA Destinations */
1122/************************************************************************************************/
1123#define EMU_DST_ALICE2_EMU32_0 0x000f /* 16 EMU32 channels to Alice2 +0 to +0xf */
1124#define EMU_DST_ALICE2_EMU32_1 0x0000 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1125#define EMU_DST_ALICE2_EMU32_2 0x0001 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1126#define EMU_DST_ALICE2_EMU32_3 0x0002 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1127#define EMU_DST_ALICE2_EMU32_4 0x0003 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1128#define EMU_DST_ALICE2_EMU32_5 0x0004 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1129#define EMU_DST_ALICE2_EMU32_6 0x0005 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1130#define EMU_DST_ALICE2_EMU32_7 0x0006 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1131#define EMU_DST_ALICE2_EMU32_8 0x0007 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1132#define EMU_DST_ALICE2_EMU32_9 0x0008 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1133#define EMU_DST_ALICE2_EMU32_A 0x0009 /* 16 EMU32 channels to Alice2 +0 to +0xf */
1134#define EMU_DST_ALICE2_EMU32_B 0x000a /* 16 EMU32 channels to Alice2 +0 to +0xf */
1135#define EMU_DST_ALICE2_EMU32_C 0x000b /* 16 EMU32 channels to Alice2 +0 to +0xf */
1136#define EMU_DST_ALICE2_EMU32_D 0x000c /* 16 EMU32 channels to Alice2 +0 to +0xf */
1137#define EMU_DST_ALICE2_EMU32_E 0x000d /* 16 EMU32 channels to Alice2 +0 to +0xf */
1138#define EMU_DST_ALICE2_EMU32_F 0x000e /* 16 EMU32 channels to Alice2 +0 to +0xf */
1139#define EMU_DST_DOCK_DAC1_LEFT1 0x0100 /* Audio Dock DAC1 Left, 1st or 48kHz only */
1140#define EMU_DST_DOCK_DAC1_LEFT2 0x0101 /* Audio Dock DAC1 Left, 2nd or 96kHz */
1141#define EMU_DST_DOCK_DAC1_LEFT3 0x0102 /* Audio Dock DAC1 Left, 3rd or 192kHz */
1142#define EMU_DST_DOCK_DAC1_LEFT4 0x0103 /* Audio Dock DAC1 Left, 4th or 192kHz */
1143#define EMU_DST_DOCK_DAC1_RIGHT1 0x0104 /* Audio Dock DAC1 Right, 1st or 48kHz only */
1144#define EMU_DST_DOCK_DAC1_RIGHT2 0x0105 /* Audio Dock DAC1 Right, 2nd or 96kHz */
1145#define EMU_DST_DOCK_DAC1_RIGHT3 0x0106 /* Audio Dock DAC1 Right, 3rd or 192kHz */
1146#define EMU_DST_DOCK_DAC1_RIGHT4 0x0107 /* Audio Dock DAC1 Right, 4th or 192kHz */
1147#define EMU_DST_DOCK_DAC2_LEFT1 0x0108 /* Audio Dock DAC2 Left, 1st or 48kHz only */
1148#define EMU_DST_DOCK_DAC2_LEFT2 0x0109 /* Audio Dock DAC2 Left, 2nd or 96kHz */
1149#define EMU_DST_DOCK_DAC2_LEFT3 0x010a /* Audio Dock DAC2 Left, 3rd or 192kHz */
1150#define EMU_DST_DOCK_DAC2_LEFT4 0x010b /* Audio Dock DAC2 Left, 4th or 192kHz */
1151#define EMU_DST_DOCK_DAC2_RIGHT1 0x010c /* Audio Dock DAC2 Right, 1st or 48kHz only */
1152#define EMU_DST_DOCK_DAC2_RIGHT2 0x010d /* Audio Dock DAC2 Right, 2nd or 96kHz */
1153#define EMU_DST_DOCK_DAC2_RIGHT3 0x010e /* Audio Dock DAC2 Right, 3rd or 192kHz */
1154#define EMU_DST_DOCK_DAC2_RIGHT4 0x010f /* Audio Dock DAC2 Right, 4th or 192kHz */
1155#define EMU_DST_DOCK_DAC3_LEFT1 0x0110 /* Audio Dock DAC1 Left, 1st or 48kHz only */
1156#define EMU_DST_DOCK_DAC3_LEFT2 0x0111 /* Audio Dock DAC1 Left, 2nd or 96kHz */
1157#define EMU_DST_DOCK_DAC3_LEFT3 0x0112 /* Audio Dock DAC1 Left, 3rd or 192kHz */
1158#define EMU_DST_DOCK_DAC3_LEFT4 0x0113 /* Audio Dock DAC1 Left, 4th or 192kHz */
1159#define EMU_DST_DOCK_PHONES_LEFT1 0x0112 /* Audio Dock PHONES Left, 1st or 48kHz only */
1160#define EMU_DST_DOCK_PHONES_LEFT2 0x0113 /* Audio Dock PHONES Left, 2nd or 96kHz */
1161#define EMU_DST_DOCK_DAC3_RIGHT1 0x0114 /* Audio Dock DAC1 Right, 1st or 48kHz only */
1162#define EMU_DST_DOCK_DAC3_RIGHT2 0x0115 /* Audio Dock DAC1 Right, 2nd or 96kHz */
1163#define EMU_DST_DOCK_DAC3_RIGHT3 0x0116 /* Audio Dock DAC1 Right, 3rd or 192kHz */
1164#define EMU_DST_DOCK_DAC3_RIGHT4 0x0117 /* Audio Dock DAC1 Right, 4th or 192kHz */
1165#define EMU_DST_DOCK_PHONES_RIGHT1 0x0116 /* Audio Dock PHONES Right, 1st or 48kHz only */
1166#define EMU_DST_DOCK_PHONES_RIGHT2 0x0117 /* Audio Dock PHONES Right, 2nd or 96kHz */
1167#define EMU_DST_DOCK_DAC4_LEFT1 0x0118 /* Audio Dock DAC2 Left, 1st or 48kHz only */
1168#define EMU_DST_DOCK_DAC4_LEFT2 0x0119 /* Audio Dock DAC2 Left, 2nd or 96kHz */
1169#define EMU_DST_DOCK_DAC4_LEFT3 0x011a /* Audio Dock DAC2 Left, 3rd or 192kHz */
1170#define EMU_DST_DOCK_DAC4_LEFT4 0x011b /* Audio Dock DAC2 Left, 4th or 192kHz */
1171#define EMU_DST_DOCK_SPDIF_LEFT1 0x011a /* Audio Dock SPDIF Left, 1st or 48kHz only */
1172#define EMU_DST_DOCK_SPDIF_LEFT2 0x011b /* Audio Dock SPDIF Left, 2nd or 96kHz */
1173#define EMU_DST_DOCK_DAC4_RIGHT1 0x011c /* Audio Dock DAC2 Right, 1st or 48kHz only */
1174#define EMU_DST_DOCK_DAC4_RIGHT2 0x011d /* Audio Dock DAC2 Right, 2nd or 96kHz */
1175#define EMU_DST_DOCK_DAC4_RIGHT3 0x011e /* Audio Dock DAC2 Right, 3rd or 192kHz */
1176#define EMU_DST_DOCK_DAC4_RIGHT4 0x011f /* Audio Dock DAC2 Right, 4th or 192kHz */
1177#define EMU_DST_DOCK_SPDIF_RIGHT1 0x011e /* Audio Dock SPDIF Right, 1st or 48kHz only */
1178#define EMU_DST_DOCK_SPDIF_RIGHT2 0x011f /* Audio Dock SPDIF Right, 2nd or 96kHz */
1179#define EMU_DST_HANA_SPDIF_LEFT1 0x0200 /* Hana SPDIF Left, 1st or 48kHz only */
1180#define EMU_DST_HANA_SPDIF_LEFT2 0x0202 /* Hana SPDIF Left, 2nd or 96kHz */
1181#define EMU_DST_HANA_SPDIF_RIGHT1 0x0201 /* Hana SPDIF Right, 1st or 48kHz only */
1182#define EMU_DST_HANA_SPDIF_RIGHT2 0x0203 /* Hana SPDIF Right, 2nd or 96kHz */
1183#define EMU_DST_HAMOA_DAC_LEFT1 0x0300 /* Hamoa DAC Left, 1st or 48kHz only */
1184#define EMU_DST_HAMOA_DAC_LEFT2 0x0302 /* Hamoa DAC Left, 2nd or 96kHz */
1185#define EMU_DST_HAMOA_DAC_LEFT3 0x0304 /* Hamoa DAC Left, 3rd or 192kHz */
1186#define EMU_DST_HAMOA_DAC_LEFT4 0x0306 /* Hamoa DAC Left, 4th or 192kHz */
1187#define EMU_DST_HAMOA_DAC_RIGHT1 0x0301 /* Hamoa DAC Right, 1st or 48kHz only */
1188#define EMU_DST_HAMOA_DAC_RIGHT2 0x0303 /* Hamoa DAC Right, 2nd or 96kHz */
1189#define EMU_DST_HAMOA_DAC_RIGHT3 0x0305 /* Hamoa DAC Right, 3rd or 192kHz */
1190#define EMU_DST_HAMOA_DAC_RIGHT4 0x0307 /* Hamoa DAC Right, 4th or 192kHz */
1191#define EMU_DST_HANA_ADAT 0x0400 /* Hana ADAT 8 channel out +0 to +7 */
1192#define EMU_DST_ALICE_I2S0_LEFT 0x0500 /* Alice2 I2S0 Left */
1193#define EMU_DST_ALICE_I2S0_RIGHT 0x0501 /* Alice2 I2S0 Right */
1194#define EMU_DST_ALICE_I2S1_LEFT 0x0600 /* Alice2 I2S1 Left */
1195#define EMU_DST_ALICE_I2S1_RIGHT 0x0601 /* Alice2 I2S1 Right */
1196#define EMU_DST_ALICE_I2S2_LEFT 0x0700 /* Alice2 I2S2 Left */
1197#define EMU_DST_ALICE_I2S2_RIGHT 0x0701 /* Alice2 I2S2 Right */
1198
1199/************************************************************************************************/
1200/* EMU1010m HANA Sources */
1201/************************************************************************************************/
1202#define EMU_SRC_SILENCE 0x0000 /* Silence */
1203#define EMU_SRC_DOCK_MIC_A1 0x0100 /* Audio Dock Mic A, 1st or 48kHz only */
1204#define EMU_SRC_DOCK_MIC_A2 0x0101 /* Audio Dock Mic A, 2nd or 96kHz */
1205#define EMU_SRC_DOCK_MIC_A3 0x0102 /* Audio Dock Mic A, 3rd or 192kHz */
1206#define EMU_SRC_DOCK_MIC_A4 0x0103 /* Audio Dock Mic A, 4th or 192kHz */
1207#define EMU_SRC_DOCK_MIC_B1 0x0104 /* Audio Dock Mic B, 1st or 48kHz only */
1208#define EMU_SRC_DOCK_MIC_B2 0x0105 /* Audio Dock Mic B, 2nd or 96kHz */
1209#define EMU_SRC_DOCK_MIC_B3 0x0106 /* Audio Dock Mic B, 3rd or 192kHz */
1210#define EMU_SRC_DOCK_MIC_B4 0x0107 /* Audio Dock Mic B, 4th or 192kHz */
1211#define EMU_SRC_DOCK_ADC1_LEFT1 0x0108 /* Audio Dock ADC1 Left, 1st or 48kHz only */
1212#define EMU_SRC_DOCK_ADC1_LEFT2 0x0109 /* Audio Dock ADC1 Left, 2nd or 96kHz */
1213#define EMU_SRC_DOCK_ADC1_LEFT3 0x010a /* Audio Dock ADC1 Left, 3rd or 192kHz */
1214#define EMU_SRC_DOCK_ADC1_LEFT4 0x010b /* Audio Dock ADC1 Left, 4th or 192kHz */
1215#define EMU_SRC_DOCK_ADC1_RIGHT1 0x010c /* Audio Dock ADC1 Right, 1st or 48kHz only */
1216#define EMU_SRC_DOCK_ADC1_RIGHT2 0x010d /* Audio Dock ADC1 Right, 2nd or 96kHz */
1217#define EMU_SRC_DOCK_ADC1_RIGHT3 0x010e /* Audio Dock ADC1 Right, 3rd or 192kHz */
1218#define EMU_SRC_DOCK_ADC1_RIGHT4 0x010f /* Audio Dock ADC1 Right, 4th or 192kHz */
1219#define EMU_SRC_DOCK_ADC2_LEFT1 0x0110 /* Audio Dock ADC2 Left, 1st or 48kHz only */
1220#define EMU_SRC_DOCK_ADC2_LEFT2 0x0111 /* Audio Dock ADC2 Left, 2nd or 96kHz */
1221#define EMU_SRC_DOCK_ADC2_LEFT3 0x0112 /* Audio Dock ADC2 Left, 3rd or 192kHz */
1222#define EMU_SRC_DOCK_ADC2_LEFT4 0x0113 /* Audio Dock ADC2 Left, 4th or 192kHz */
1223#define EMU_SRC_DOCK_ADC2_RIGHT1 0x0114 /* Audio Dock ADC2 Right, 1st or 48kHz only */
1224#define EMU_SRC_DOCK_ADC2_RIGHT2 0x0115 /* Audio Dock ADC2 Right, 2nd or 96kHz */
1225#define EMU_SRC_DOCK_ADC2_RIGHT3 0x0116 /* Audio Dock ADC2 Right, 3rd or 192kHz */
1226#define EMU_SRC_DOCK_ADC2_RIGHT4 0x0117 /* Audio Dock ADC2 Right, 4th or 192kHz */
1227#define EMU_SRC_DOCK_ADC3_LEFT1 0x0118 /* Audio Dock ADC3 Left, 1st or 48kHz only */
1228#define EMU_SRC_DOCK_ADC3_LEFT2 0x0119 /* Audio Dock ADC3 Left, 2nd or 96kHz */
1229#define EMU_SRC_DOCK_ADC3_LEFT3 0x011a /* Audio Dock ADC3 Left, 3rd or 192kHz */
1230#define EMU_SRC_DOCK_ADC3_LEFT4 0x011b /* Audio Dock ADC3 Left, 4th or 192kHz */
1231#define EMU_SRC_DOCK_ADC3_RIGHT1 0x011c /* Audio Dock ADC3 Right, 1st or 48kHz only */
1232#define EMU_SRC_DOCK_ADC3_RIGHT2 0x011d /* Audio Dock ADC3 Right, 2nd or 96kHz */
1233#define EMU_SRC_DOCK_ADC3_RIGHT3 0x011e /* Audio Dock ADC3 Right, 3rd or 192kHz */
1234#define EMU_SRC_DOCK_ADC3_RIGHT4 0x011f /* Audio Dock ADC3 Right, 4th or 192kHz */
1235#define EMU_SRC_HAMOA_ADC_LEFT1 0x0200 /* Hamoa ADC Left, 1st or 48kHz only */
1236#define EMU_SRC_HAMOA_ADC_LEFT2 0x0202 /* Hamoa ADC Left, 2nd or 96kHz */
1237#define EMU_SRC_HAMOA_ADC_LEFT3 0x0204 /* Hamoa ADC Left, 3rd or 192kHz */
1238#define EMU_SRC_HAMOA_ADC_LEFT4 0x0206 /* Hamoa ADC Left, 4th or 192kHz */
1239#define EMU_SRC_HAMOA_ADC_RIGHT1 0x0201 /* Hamoa ADC Right, 1st or 48kHz only */
1240#define EMU_SRC_HAMOA_ADC_RIGHT2 0x0203 /* Hamoa ADC Right, 2nd or 96kHz */
1241#define EMU_SRC_HAMOA_ADC_RIGHT3 0x0205 /* Hamoa ADC Right, 3rd or 192kHz */
1242#define EMU_SRC_HAMOA_ADC_RIGHT4 0x0207 /* Hamoa ADC Right, 4th or 192kHz */
1243#define EMU_SRC_ALICE_EMU32A 0x0300 /* Alice2 EMU32a 16 outputs. +0 to +0xf */
1244#define EMU_SRC_ALICE_EMU32B 0x0310 /* Alice2 EMU32b 16 outputs. +0 to +0xf */
1245#define EMU_SRC_HANA_ADAT 0x0400 /* Hana ADAT 8 channel in +0 to +7 */
1246#define EMU_SRC_HANA_SPDIF_LEFT1 0x0500 /* Hana SPDIF Left, 1st or 48kHz only */
1247#define EMU_SRC_HANA_SPDIF_LEFT2 0x0502 /* Hana SPDIF Left, 2nd or 96kHz */
1248#define EMU_SRC_HANA_SPDIF_RIGHT1 0x0501 /* Hana SPDIF Right, 1st or 48kHz only */
1249#define EMU_SRC_HANA_SPDIF_RIGHT2 0x0503 /* Hana SPDIF Right, 2nd or 96kHz */
1250/* 0x600 and 0x700 no used */
889 1251
890/* ------------------- STRUCTURES -------------------- */ 1252/* ------------------- STRUCTURES -------------------- */
891 1253
@@ -1063,7 +1425,7 @@ struct snd_emu_chip_details {
1063 unsigned char spdif_bug; /* Has Spdif phasing bug */ 1425 unsigned char spdif_bug; /* Has Spdif phasing bug */
1064 unsigned char ac97_chip; /* Has an AC97 chip: 1 = mandatory, 2 = optional */ 1426 unsigned char ac97_chip; /* Has an AC97 chip: 1 = mandatory, 2 = optional */
1065 unsigned char ecard; /* APS EEPROM */ 1427 unsigned char ecard; /* APS EEPROM */
1066 unsigned char emu1212m; /* EMU 1212m card */ 1428 unsigned char emu1010; /* EMU 1010m card */
1067 unsigned char spi_dac; /* SPI interface for DAC */ 1429 unsigned char spi_dac; /* SPI interface for DAC */
1068 unsigned char i2c_adc; /* I2C interface for ADC */ 1430 unsigned char i2c_adc; /* I2C interface for ADC */
1069 unsigned char adc_1361t; /* Use Philips 1361T ADC */ 1431 unsigned char adc_1361t; /* Use Philips 1361T ADC */
@@ -1072,6 +1434,14 @@ struct snd_emu_chip_details {
1072 const char *id; /* for backward compatibility - can be NULL if not needed */ 1434 const char *id; /* for backward compatibility - can be NULL if not needed */
1073}; 1435};
1074 1436
1437struct snd_emu1010 {
1438 unsigned int output_source[64];
1439 unsigned int input_source[64];
1440 unsigned int adc_pads; /* bit mask */
1441 unsigned int dac_pads; /* bit mask */
1442 unsigned int internal_clock; /* 44100 or 48000 */
1443};
1444
1075struct snd_emu10k1 { 1445struct snd_emu10k1 {
1076 int irq; 1446 int irq;
1077 1447
@@ -1079,6 +1449,7 @@ struct snd_emu10k1 {
1079 unsigned int tos_link: 1, /* tos link detected */ 1449 unsigned int tos_link: 1, /* tos link detected */
1080 rear_ac97: 1, /* rear channels are on AC'97 */ 1450 rear_ac97: 1, /* rear channels are on AC'97 */
1081 enable_ir: 1; 1451 enable_ir: 1;
1452 unsigned int support_tlv :1;
1082 /* Contains profile of card capabilities */ 1453 /* Contains profile of card capabilities */
1083 const struct snd_emu_chip_details *card_capabilities; 1454 const struct snd_emu_chip_details *card_capabilities;
1084 unsigned int audigy; /* is Audigy? */ 1455 unsigned int audigy; /* is Audigy? */
@@ -1104,6 +1475,8 @@ struct snd_emu10k1 {
1104 spinlock_t memblk_lock; 1475 spinlock_t memblk_lock;
1105 1476
1106 unsigned int spdif_bits[3]; /* s/pdif out setup */ 1477 unsigned int spdif_bits[3]; /* s/pdif out setup */
1478 unsigned int i2c_capture_source;
1479 u8 i2c_capture_volume[4][2];
1107 1480
1108 struct snd_emu10k1_fx8010 fx8010; /* FX8010 info */ 1481 struct snd_emu10k1_fx8010 fx8010; /* FX8010 info */
1109 int gpr_base; 1482 int gpr_base;
@@ -1132,6 +1505,7 @@ struct snd_emu10k1 {
1132 int p16v_device_offset; 1505 int p16v_device_offset;
1133 u32 p16v_capture_source; 1506 u32 p16v_capture_source;
1134 u32 p16v_capture_channel; 1507 u32 p16v_capture_channel;
1508 struct snd_emu1010 emu1010;
1135 struct snd_emu10k1_pcm_mixer pcm_mixer[32]; 1509 struct snd_emu10k1_pcm_mixer pcm_mixer[32];
1136 struct snd_emu10k1_pcm_mixer efx_pcm_mixer[NUM_EFX_PLAYBACK]; 1510 struct snd_emu10k1_pcm_mixer efx_pcm_mixer[NUM_EFX_PLAYBACK];
1137 struct snd_kcontrol *ctl_send_routing; 1511 struct snd_kcontrol *ctl_send_routing;
@@ -1208,6 +1582,10 @@ void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned i
1208unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn); 1582unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn);
1209void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data); 1583void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data);
1210int snd_emu10k1_spi_write(struct snd_emu10k1 * emu, unsigned int data); 1584int snd_emu10k1_spi_write(struct snd_emu10k1 * emu, unsigned int data);
1585int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
1586int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, int reg, int value);
1587int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, int reg, int *value);
1588int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, int dst, int src);
1211unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc); 1589unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc);
1212void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb); 1590void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb);
1213void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb); 1591void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb);
@@ -1524,11 +1902,20 @@ struct snd_emu10k1_fx8010_control_gpr {
1524 unsigned int value[32]; /* initial values */ 1902 unsigned int value[32]; /* initial values */
1525 unsigned int min; /* minimum range */ 1903 unsigned int min; /* minimum range */
1526 unsigned int max; /* maximum range */ 1904 unsigned int max; /* maximum range */
1527 union {
1528 snd_kcontrol_tlv_rw_t *c;
1529 unsigned int *p;
1530 } tlv;
1531 unsigned int translation; /* translation type (EMU10K1_GPR_TRANSLATION*) */ 1905 unsigned int translation; /* translation type (EMU10K1_GPR_TRANSLATION*) */
1906 const unsigned int *tlv;
1907};
1908
1909/* old ABI without TLV support */
1910struct snd_emu10k1_fx8010_control_old_gpr {
1911 struct snd_ctl_elem_id id;
1912 unsigned int vcount;
1913 unsigned int count;
1914 unsigned short gpr[32];
1915 unsigned int value[32];
1916 unsigned int min;
1917 unsigned int max;
1918 unsigned int translation;
1532}; 1919};
1533 1920
1534struct snd_emu10k1_fx8010_code { 1921struct snd_emu10k1_fx8010_code {
@@ -1579,6 +1966,8 @@ struct snd_emu10k1_fx8010_pcm_rec {
1579 unsigned int res2; /* reserved */ 1966 unsigned int res2; /* reserved */
1580}; 1967};
1581 1968
1969#define SNDRV_EMU10K1_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
1970
1582#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, struct snd_emu10k1_fx8010_info) 1971#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, struct snd_emu10k1_fx8010_info)
1583#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, struct snd_emu10k1_fx8010_code) 1972#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, struct snd_emu10k1_fx8010_code)
1584#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code) 1973#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code)
@@ -1587,6 +1976,7 @@ struct snd_emu10k1_fx8010_pcm_rec {
1587#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram) 1976#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram)
1588#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec) 1977#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec)
1589#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec) 1978#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec)
1979#define SNDRV_EMU10K1_IOCTL_PVERSION _IOR ('H', 0x40, int)
1590#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80) 1980#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80)
1591#define SNDRV_EMU10K1_IOCTL_CONTINUE _IO ('H', 0x81) 1981#define SNDRV_EMU10K1_IOCTL_CONTINUE _IO ('H', 0x81)
1592#define SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER _IO ('H', 0x82) 1982#define SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER _IO ('H', 0x82)
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 2f645dfd7f70..ee6bc2d06803 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -56,6 +56,8 @@ struct snd_pcm_hardware {
56 size_t fifo_size; /* fifo size in bytes */ 56 size_t fifo_size; /* fifo size in bytes */
57}; 57};
58 58
59struct snd_pcm_substream;
60
59struct snd_pcm_ops { 61struct snd_pcm_ops {
60 int (*open)(struct snd_pcm_substream *substream); 62 int (*open)(struct snd_pcm_substream *substream);
61 int (*close)(struct snd_pcm_substream *substream); 63 int (*close)(struct snd_pcm_substream *substream);
@@ -384,6 +386,7 @@ struct snd_pcm_substream {
384 struct snd_info_entry *proc_sw_params_entry; 386 struct snd_info_entry *proc_sw_params_entry;
385 struct snd_info_entry *proc_status_entry; 387 struct snd_info_entry *proc_status_entry;
386 struct snd_info_entry *proc_prealloc_entry; 388 struct snd_info_entry *proc_prealloc_entry;
389 struct snd_info_entry *proc_prealloc_max_entry;
387#endif 390#endif
388 /* misc flags */ 391 /* misc flags */
389 unsigned int hw_opened: 1; 392 unsigned int hw_opened: 1;
@@ -427,6 +430,7 @@ struct snd_pcm {
427 wait_queue_head_t open_wait; 430 wait_queue_head_t open_wait;
428 void *private_data; 431 void *private_data;
429 void (*private_free) (struct snd_pcm *pcm); 432 void (*private_free) (struct snd_pcm *pcm);
433 struct device *dev; /* actual hw device this belongs to */
430#if defined(CONFIG_SND_PCM_OSS) || defined(CONFIG_SND_PCM_OSS_MODULE) 434#if defined(CONFIG_SND_PCM_OSS) || defined(CONFIG_SND_PCM_OSS_MODULE)
431 struct snd_pcm_oss oss; 435 struct snd_pcm_oss oss;
432#endif 436#endif
diff --git a/include/sound/pt2258.h b/include/sound/pt2258.h
new file mode 100644
index 000000000000..160f812faa42
--- /dev/null
+++ b/include/sound/pt2258.h
@@ -0,0 +1,37 @@
1/*
2 * ALSA Driver for the PT2258 volume controller.
3 *
4 * Copyright (c) 2006 Jochen Voss <voss@seehuhn.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#ifndef __SOUND_PT2258_H
23#define __SOUND_PT2258_H
24
25struct snd_pt2258 {
26 struct snd_card *card;
27 struct snd_i2c_bus *i2c_bus;
28 struct snd_i2c_device *i2c_dev;
29
30 unsigned char volume[6];
31 int mute;
32};
33
34extern int snd_pt2258_reset(struct snd_pt2258 *pt);
35extern int snd_pt2258_build_controls(struct snd_pt2258 *pt);
36
37#endif /* __SOUND_PT2258_H */
diff --git a/include/sound/sb16_csp.h b/include/sound/sb16_csp.h
index caf6fe21514d..736eac71d053 100644
--- a/include/sound/sb16_csp.h
+++ b/include/sound/sb16_csp.h
@@ -114,9 +114,21 @@ struct snd_sb_csp_info {
114#ifdef __KERNEL__ 114#ifdef __KERNEL__
115#include "sb.h" 115#include "sb.h"
116#include "hwdep.h" 116#include "hwdep.h"
117#include <linux/firmware.h>
117 118
118struct snd_sb_csp; 119struct snd_sb_csp;
119 120
121/* indices for the known CSP programs */
122enum {
123 CSP_PROGRAM_MULAW,
124 CSP_PROGRAM_ALAW,
125 CSP_PROGRAM_ADPCM_INIT,
126 CSP_PROGRAM_ADPCM_PLAYBACK,
127 CSP_PROGRAM_ADPCM_CAPTURE,
128
129 CSP_PROGRAM_COUNT
130};
131
120/* 132/*
121 * CSP operators 133 * CSP operators
122 */ 134 */
@@ -159,6 +171,8 @@ struct snd_sb_csp {
159 struct snd_kcontrol *qsound_space; 171 struct snd_kcontrol *qsound_space;
160 172
161 struct mutex access_mutex; /* locking */ 173 struct mutex access_mutex; /* locking */
174
175 const struct firmware *csp_programs[CSP_PROGRAM_COUNT];
162}; 176};
163 177
164int snd_sb_csp_new(struct snd_sb *chip, int device, struct snd_hwdep ** rhwdep); 178int snd_sb_csp_new(struct snd_sb *chip, int device, struct snd_hwdep ** rhwdep);
diff --git a/include/sound/snd_wavefront.h b/include/sound/snd_wavefront.h
index 0b9e5de94ff1..9688d4be918e 100644
--- a/include/sound/snd_wavefront.h
+++ b/include/sound/snd_wavefront.h
@@ -85,6 +85,7 @@ struct _snd_wavefront {
85 char hw_version[2]; /* major = [0], minor = [1] */ 85 char hw_version[2]; /* major = [0], minor = [1] */
86 char israw; /* needs Motorola microcode */ 86 char israw; /* needs Motorola microcode */
87 char has_fx; /* has FX processor (Tropez+) */ 87 char has_fx; /* has FX processor (Tropez+) */
88 char fx_initialized; /* FX's register pages initialized */
88 char prog_status[WF_MAX_PROGRAM]; /* WF_SLOT_* */ 89 char prog_status[WF_MAX_PROGRAM]; /* WF_SLOT_* */
89 char patch_status[WF_MAX_PATCH]; /* WF_SLOT_* */ 90 char patch_status[WF_MAX_PATCH]; /* WF_SLOT_* */
90 char sample_status[WF_MAX_SAMPLE]; /* WF_ST_* | WF_SLOT_* */ 91 char sample_status[WF_MAX_SAMPLE]; /* WF_ST_* | WF_SLOT_* */
@@ -94,6 +95,7 @@ struct _snd_wavefront {
94 spinlock_t irq_lock; 95 spinlock_t irq_lock;
95 wait_queue_head_t interrupt_sleeper; 96 wait_queue_head_t interrupt_sleeper;
96 snd_wavefront_midi_t midi; /* ICS2115 MIDI interface */ 97 snd_wavefront_midi_t midi; /* ICS2115 MIDI interface */
98 struct snd_card *card;
97}; 99};
98 100
99struct _snd_wavefront_card { 101struct _snd_wavefront_card {
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
new file mode 100644
index 000000000000..2b1ae8edc43c
--- /dev/null
+++ b/include/sound/soc-dapm.h
@@ -0,0 +1,286 @@
1/*
2 * linux/sound/soc-dapm.h -- ALSA SoC Dynamic Audio Power Management
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_DAPM_H
14#define __LINUX_SND_SOC_DAPM_H
15
16#include <linux/device.h>
17#include <linux/types.h>
18#include <sound/control.h>
19#include <sound/soc.h>
20
21/* widget has no PM register bit */
22#define SND_SOC_NOPM -1
23
24/*
25 * SoC dynamic audio power managment
26 *
27 * We can have upto 4 power domains
28 * 1. Codec domain - VREF, VMID
29 * Usually controlled at codec probe/remove, although can be set
30 * at stream time if power is not needed for sidetone, etc.
31 * 2. Platform/Machine domain - physically connected inputs and outputs
32 * Is platform/machine and user action specific, is set in the machine
33 * driver and by userspace e.g when HP are inserted
34 * 3. Path domain - Internal codec path mixers
35 * Are automatically set when mixer and mux settings are
36 * changed by the user.
37 * 4. Stream domain - DAC's and ADC's.
38 * Enabled when stream playback/capture is started.
39 */
40
41/* codec domain */
42#define SND_SOC_DAPM_VMID(wname) \
43{ .id = snd_soc_dapm_vmid, .name = wname, .kcontrols = NULL, \
44 .num_kcontrols = 0}
45
46/* platform domain */
47#define SND_SOC_DAPM_INPUT(wname) \
48{ .id = snd_soc_dapm_input, .name = wname, .kcontrols = NULL, \
49 .num_kcontrols = 0}
50#define SND_SOC_DAPM_OUTPUT(wname) \
51{ .id = snd_soc_dapm_output, .name = wname, .kcontrols = NULL, \
52 .num_kcontrols = 0}
53#define SND_SOC_DAPM_MIC(wname, wevent) \
54{ .id = snd_soc_dapm_mic, .name = wname, .kcontrols = NULL, \
55 .num_kcontrols = 0, .event = wevent, \
56 .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
57#define SND_SOC_DAPM_HP(wname, wevent) \
58{ .id = snd_soc_dapm_hp, .name = wname, .kcontrols = NULL, \
59 .num_kcontrols = 0, .event = wevent, \
60 .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
61#define SND_SOC_DAPM_SPK(wname, wevent) \
62{ .id = snd_soc_dapm_spk, .name = wname, .kcontrols = NULL, \
63 .num_kcontrols = 0, .event = wevent, \
64 .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
65#define SND_SOC_DAPM_LINE(wname, wevent) \
66{ .id = snd_soc_dapm_line, .name = wname, .kcontrols = NULL, \
67 .num_kcontrols = 0, .event = wevent, \
68 .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
69
70/* path domain */
71#define SND_SOC_DAPM_PGA(wname, wreg, wshift, winvert,\
72 wcontrols, wncontrols) \
73{ .id = snd_soc_dapm_pga, .name = wname, .reg = wreg, .shift = wshift, \
74 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols}
75#define SND_SOC_DAPM_MIXER(wname, wreg, wshift, winvert, \
76 wcontrols, wncontrols)\
77{ .id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \
78 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols}
79#define SND_SOC_DAPM_MICBIAS(wname, wreg, wshift, winvert) \
80{ .id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \
81 .invert = winvert, .kcontrols = NULL, .num_kcontrols = 0}
82#define SND_SOC_DAPM_SWITCH(wname, wreg, wshift, winvert, wcontrols) \
83{ .id = snd_soc_dapm_switch, .name = wname, .reg = wreg, .shift = wshift, \
84 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1}
85#define SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols) \
86{ .id = snd_soc_dapm_mux, .name = wname, .reg = wreg, .shift = wshift, \
87 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1}
88
89/* path domain with event - event handler must return 0 for success */
90#define SND_SOC_DAPM_PGA_E(wname, wreg, wshift, winvert, wcontrols, \
91 wncontrols, wevent, wflags) \
92{ .id = snd_soc_dapm_pga, .name = wname, .reg = wreg, .shift = wshift, \
93 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols, \
94 .event = wevent, .event_flags = wflags}
95#define SND_SOC_DAPM_MIXER_E(wname, wreg, wshift, winvert, wcontrols, \
96 wncontrols, wevent, wflags) \
97{ .id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \
98 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols, \
99 .event = wevent, .event_flags = wflags}
100#define SND_SOC_DAPM_MICBIAS_E(wname, wreg, wshift, winvert, wevent, wflags) \
101{ .id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \
102 .invert = winvert, .kcontrols = NULL, .num_kcontrols = 0, \
103 .event = wevent, .event_flags = wflags}
104#define SND_SOC_DAPM_SWITCH_E(wname, wreg, wshift, winvert, wcontrols, \
105 wevent, wflags) \
106{ .id = snd_soc_dapm_switch, .name = wname, .reg = wreg, .shift = wshift, \
107 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1 \
108 .event = wevent, .event_flags = wflags}
109#define SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, \
110 wevent, wflags) \
111{ .id = snd_soc_dapm_mux, .name = wname, .reg = wreg, .shift = wshift, \
112 .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1, \
113 .event = wevent, .event_flags = wflags}
114
115/* events that are pre and post DAPM */
116#define SND_SOC_DAPM_PRE(wname, wevent) \
117{ .id = snd_soc_dapm_pre, .name = wname, .kcontrols = NULL, \
118 .num_kcontrols = 0, .event = wevent, \
119 .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD}
120#define SND_SOC_DAPM_POST(wname, wevent) \
121{ .id = snd_soc_dapm_post, .name = wname, .kcontrols = NULL, \
122 .num_kcontrols = 0, .event = wevent, \
123 .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD}
124
125/* stream domain */
126#define SND_SOC_DAPM_DAC(wname, stname, wreg, wshift, winvert) \
127{ .id = snd_soc_dapm_dac, .name = wname, .sname = stname, .reg = wreg, \
128 .shift = wshift, .invert = winvert}
129#define SND_SOC_DAPM_ADC(wname, stname, wreg, wshift, winvert) \
130{ .id = snd_soc_dapm_adc, .name = wname, .sname = stname, .reg = wreg, \
131 .shift = wshift, .invert = winvert}
132
133/* dapm kcontrol types */
134#define SOC_DAPM_SINGLE(xname, reg, shift, mask, invert) \
135{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
136 .info = snd_soc_info_volsw, \
137 .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \
138 .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) }
139#define SOC_DAPM_DOUBLE(xname, reg, shift_left, shift_right, mask, invert, \
140 power) \
141{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
142 .info = snd_soc_info_volsw, \
143 .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \
144 .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) |\
145 ((mask) << 16) | ((invert) << 24) }
146#define SOC_DAPM_ENUM(xname, xenum) \
147{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
148 .info = snd_soc_info_enum_double, \
149 .get = snd_soc_dapm_get_enum_double, \
150 .put = snd_soc_dapm_put_enum_double, \
151 .private_value = (unsigned long)&xenum }
152
153/* dapm stream operations */
154#define SND_SOC_DAPM_STREAM_NOP 0x0
155#define SND_SOC_DAPM_STREAM_START 0x1
156#define SND_SOC_DAPM_STREAM_STOP 0x2
157#define SND_SOC_DAPM_STREAM_SUSPEND 0x4
158#define SND_SOC_DAPM_STREAM_RESUME 0x8
159#define SND_SOC_DAPM_STREAM_PAUSE_PUSH 0x10
160#define SND_SOC_DAPM_STREAM_PAUSE_RELEASE 0x20
161
162/* dapm event types */
163#define SND_SOC_DAPM_PRE_PMU 0x1 /* before widget power up */
164#define SND_SOC_DAPM_POST_PMU 0x2 /* after widget power up */
165#define SND_SOC_DAPM_PRE_PMD 0x4 /* before widget power down */
166#define SND_SOC_DAPM_POST_PMD 0x8 /* after widget power down */
167#define SND_SOC_DAPM_PRE_REG 0x10 /* before audio path setup */
168#define SND_SOC_DAPM_POST_REG 0x20 /* after audio path setup */
169
170/* convenience event type detection */
171#define SND_SOC_DAPM_EVENT_ON(e) \
172 (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU))
173#define SND_SOC_DAPM_EVENT_OFF(e) \
174 (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD))
175
176struct snd_soc_dapm_widget;
177enum snd_soc_dapm_type;
178struct snd_soc_dapm_path;
179struct snd_soc_dapm_pin;
180
181/* dapm controls */
182int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol,
183 struct snd_ctl_elem_value *ucontrol);
184int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol,
185 struct snd_ctl_elem_value *ucontrol);
186int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_value *ucontrol);
188int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol);
190int snd_soc_dapm_new_control(struct snd_soc_codec *codec,
191 const struct snd_soc_dapm_widget *widget);
192
193/* dapm path setup */
194int snd_soc_dapm_connect_input(struct snd_soc_codec *codec,
195 const char *sink_name, const char *control_name, const char *src_name);
196int snd_soc_dapm_new_widgets(struct snd_soc_codec *codec);
197void snd_soc_dapm_free(struct snd_soc_device *socdev);
198
199/* dapm events */
200int snd_soc_dapm_stream_event(struct snd_soc_codec *codec, char *stream,
201 int event);
202
203/* dapm sys fs - used by the core */
204int snd_soc_dapm_sys_add(struct device *dev);
205
206/* dapm audio endpoint control */
207int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec,
208 char *pin, int status);
209int snd_soc_dapm_sync_endpoints(struct snd_soc_codec *codec);
210
211/* dapm widget types */
212enum snd_soc_dapm_type {
213 snd_soc_dapm_input = 0, /* input pin */
214 snd_soc_dapm_output, /* output pin */
215 snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */
216 snd_soc_dapm_mixer, /* mixes several analog signals together */
217 snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */
218 snd_soc_dapm_adc, /* analog to digital converter */
219 snd_soc_dapm_dac, /* digital to analog converter */
220 snd_soc_dapm_micbias, /* microphone bias (power) */
221 snd_soc_dapm_mic, /* microphone */
222 snd_soc_dapm_hp, /* headphones */
223 snd_soc_dapm_spk, /* speaker */
224 snd_soc_dapm_line, /* line input/output */
225 snd_soc_dapm_switch, /* analog switch */
226 snd_soc_dapm_vmid, /* codec bias/vmid - to minimise pops */
227 snd_soc_dapm_pre, /* machine specific pre widget - exec first */
228 snd_soc_dapm_post, /* machine specific post widget - exec last */
229};
230
231/* dapm audio path between two widgets */
232struct snd_soc_dapm_path {
233 char *name;
234 char *long_name;
235
236 /* source (input) and sink (output) widgets */
237 struct snd_soc_dapm_widget *source;
238 struct snd_soc_dapm_widget *sink;
239 struct snd_kcontrol *kcontrol;
240
241 /* status */
242 u32 connect:1; /* source and sink widgets are connected */
243 u32 walked:1; /* path has been walked */
244
245 struct list_head list_source;
246 struct list_head list_sink;
247 struct list_head list;
248};
249
250/* dapm widget */
251struct snd_soc_dapm_widget {
252 enum snd_soc_dapm_type id;
253 char *name; /* widget name */
254 char *sname; /* stream name */
255 struct snd_soc_codec *codec;
256 struct list_head list;
257
258 /* dapm control */
259 short reg; /* negative reg = no direct dapm */
260 unsigned char shift; /* bits to shift */
261 unsigned int saved_value; /* widget saved value */
262 unsigned int value; /* widget current value */
263 unsigned char power:1; /* block power status */
264 unsigned char invert:1; /* invert the power bit */
265 unsigned char active:1; /* active stream on DAC, ADC's */
266 unsigned char connected:1; /* connected codec pin */
267 unsigned char new:1; /* cnew complete */
268 unsigned char ext:1; /* has external widgets */
269 unsigned char muted:1; /* muted for pop reduction */
270 unsigned char suspend:1; /* was active before suspend */
271 unsigned char pmdown:1; /* waiting for timeout */
272
273 /* external events */
274 unsigned short event_flags; /* flags to specify event types */
275 int (*event)(struct snd_soc_dapm_widget*, int);
276
277 /* kcontrols that relate to this widget */
278 int num_kcontrols;
279 const struct snd_kcontrol_new *kcontrols;
280
281 /* widget input and outputs */
282 struct list_head sources;
283 struct list_head sinks;
284};
285
286#endif
diff --git a/include/sound/soc.h b/include/sound/soc.h
new file mode 100644
index 000000000000..b1dc364b8f74
--- /dev/null
+++ b/include/sound/soc.h
@@ -0,0 +1,461 @@
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
16#include <linux/platform_device.h>
17#include <linux/types.h>
18#include <linux/workqueue.h>
19#include <sound/driver.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/control.h>
23#include <sound/ac97_codec.h>
24
25#define SND_SOC_VERSION "0.13.0"
26
27/*
28 * Convenience kcontrol builders
29 */
30#define SOC_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) |\
31 ((shift) << 12) | ((mask) << 16) | ((invert) << 24))
32#define SOC_SINGLE_VALUE_EXT(reg,mask,invert) ((reg) | ((mask) << 16) |\
33 ((invert) << 31))
34#define SOC_SINGLE(xname, reg, shift, mask, invert) \
35{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
36 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
37 .put = snd_soc_put_volsw, \
38 .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) }
39#define SOC_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
40{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
41 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
42 .put = snd_soc_put_volsw, \
43 .private_value = (reg) | ((shift_left) << 8) | \
44 ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) }
45#define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, mask, invert) \
46{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
47 .info = snd_soc_info_volsw_2r, \
48 .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
49 .private_value = (reg_left) | ((shift) << 8) | \
50 ((mask) << 12) | ((invert) << 20) | ((reg_right) << 24) }
51#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \
52{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
53 .mask = xmask, .texts = xtexts }
54#define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \
55 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts)
56#define SOC_ENUM_SINGLE_EXT(xmask, xtexts) \
57{ .mask = xmask, .texts = xtexts }
58#define SOC_ENUM(xname, xenum) \
59{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
60 .info = snd_soc_info_enum_double, \
61 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
62 .private_value = (unsigned long)&xenum }
63#define SOC_SINGLE_EXT(xname, xreg, xshift, xmask, xinvert,\
64 xhandler_get, xhandler_put) \
65{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
66 .info = snd_soc_info_volsw, \
67 .get = xhandler_get, .put = xhandler_put, \
68 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) }
69#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
70{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
71 .info = snd_soc_info_bool_ext, \
72 .get = xhandler_get, .put = xhandler_put, \
73 .private_value = xdata }
74#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
75{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
76 .info = snd_soc_info_enum_ext, \
77 .get = xhandler_get, .put = xhandler_put, \
78 .private_value = (unsigned long)&xenum }
79
80/*
81 * Digital Audio Interface (DAI) types
82 */
83#define SND_SOC_DAI_AC97 0x1
84#define SND_SOC_DAI_I2S 0x2
85#define SND_SOC_DAI_PCM 0x4
86
87/*
88 * DAI hardware audio formats
89 */
90#define SND_SOC_DAIFMT_I2S 0 /* I2S mode */
91#define SND_SOC_DAIFMT_RIGHT_J 1 /* Right justified mode */
92#define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */
93#define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM or LRC */
94#define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM or LRC */
95#define SND_SOC_DAIFMT_AC97 5 /* AC97 */
96
97#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J
98#define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J
99
100/*
101 * DAI Gating
102 */
103#define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */
104#define SND_SOC_DAIFMT_GATED (1 << 4) /* clock is gated when not Tx/Rx */
105
106/*
107 * DAI hardware signal inversions
108 */
109#define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */
110#define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */
111#define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */
112#define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */
113
114/*
115 * DAI hardware clock masters
116 * This is wrt the codec, the inverse is true for the interface
117 * i.e. if the codec is clk and frm master then the interface is
118 * clk and frame slave.
119 */
120#define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */
121#define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */
122#define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */
123#define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */
124
125#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
126#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
127#define SND_SOC_DAIFMT_INV_MASK 0x0f00
128#define SND_SOC_DAIFMT_MASTER_MASK 0xf000
129
130
131/*
132 * Master Clock Directions
133 */
134#define SND_SOC_CLOCK_IN 0
135#define SND_SOC_CLOCK_OUT 1
136
137/*
138 * AC97 codec ID's bitmask
139 */
140#define SND_SOC_DAI_AC97_ID0 (1 << 0)
141#define SND_SOC_DAI_AC97_ID1 (1 << 1)
142#define SND_SOC_DAI_AC97_ID2 (1 << 2)
143#define SND_SOC_DAI_AC97_ID3 (1 << 3)
144
145struct snd_soc_device;
146struct snd_soc_pcm_stream;
147struct snd_soc_ops;
148struct snd_soc_dai_mode;
149struct snd_soc_pcm_runtime;
150struct snd_soc_codec_dai;
151struct snd_soc_cpu_dai;
152struct snd_soc_codec;
153struct snd_soc_machine_config;
154struct soc_enum;
155struct snd_soc_ac97_ops;
156struct snd_soc_clock_info;
157
158typedef int (*hw_write_t)(void *,const char* ,int);
159typedef int (*hw_read_t)(void *,char* ,int);
160
161extern struct snd_ac97_bus_ops soc_ac97_ops;
162
163/* pcm <-> DAI connect */
164void snd_soc_free_pcms(struct snd_soc_device *socdev);
165int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid);
166int snd_soc_register_card(struct snd_soc_device *socdev);
167
168/* set runtime hw params */
169int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
170 const struct snd_pcm_hardware *hw);
171
172/* codec IO */
173#define snd_soc_read(codec, reg) codec->read(codec, reg)
174#define snd_soc_write(codec, reg, value) codec->write(codec, reg, value)
175
176/* codec register bit access */
177int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
178 unsigned short mask, unsigned short value);
179int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
180 unsigned short mask, unsigned short value);
181
182int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
183 struct snd_ac97_bus_ops *ops, int num);
184void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
185
186/*
187 *Controls
188 */
189struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
190 void *data, char *long_name);
191int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
192 struct snd_ctl_elem_info *uinfo);
193int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
194 struct snd_ctl_elem_info *uinfo);
195int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
196 struct snd_ctl_elem_value *ucontrol);
197int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
198 struct snd_ctl_elem_value *ucontrol);
199int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_info *uinfo);
201int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
202 struct snd_ctl_elem_info *uinfo);
203int snd_soc_info_bool_ext(struct snd_kcontrol *kcontrol,
204 struct snd_ctl_elem_info *uinfo);
205int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
206 struct snd_ctl_elem_value *ucontrol);
207int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
208 struct snd_ctl_elem_value *ucontrol);
209int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol,
210 struct snd_ctl_elem_info *uinfo);
211int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol,
212 struct snd_ctl_elem_value *ucontrol);
213int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol,
214 struct snd_ctl_elem_value *ucontrol);
215
216/* SoC PCM stream information */
217struct snd_soc_pcm_stream {
218 char *stream_name;
219 u64 formats; /* SNDRV_PCM_FMTBIT_* */
220 unsigned int rates; /* SNDRV_PCM_RATE_* */
221 unsigned int rate_min; /* min rate */
222 unsigned int rate_max; /* max rate */
223 unsigned int channels_min; /* min channels */
224 unsigned int channels_max; /* max channels */
225 unsigned int active:1; /* stream is in use */
226};
227
228/* SoC audio ops */
229struct snd_soc_ops {
230 int (*startup)(struct snd_pcm_substream *);
231 void (*shutdown)(struct snd_pcm_substream *);
232 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
233 int (*hw_free)(struct snd_pcm_substream *);
234 int (*prepare)(struct snd_pcm_substream *);
235 int (*trigger)(struct snd_pcm_substream *, int);
236};
237
238/* ASoC codec DAI ops */
239struct snd_soc_codec_ops {
240 /* codec DAI clocking configuration */
241 int (*set_sysclk)(struct snd_soc_codec_dai *codec_dai,
242 int clk_id, unsigned int freq, int dir);
243 int (*set_pll)(struct snd_soc_codec_dai *codec_dai,
244 int pll_id, unsigned int freq_in, unsigned int freq_out);
245 int (*set_clkdiv)(struct snd_soc_codec_dai *codec_dai,
246 int div_id, int div);
247
248 /* CPU DAI format configuration */
249 int (*set_fmt)(struct snd_soc_codec_dai *codec_dai,
250 unsigned int fmt);
251 int (*set_tdm_slot)(struct snd_soc_codec_dai *codec_dai,
252 unsigned int mask, int slots);
253 int (*set_tristate)(struct snd_soc_codec_dai *, int tristate);
254
255 /* digital mute */
256 int (*digital_mute)(struct snd_soc_codec_dai *, int mute);
257};
258
259/* ASoC cpu DAI ops */
260struct snd_soc_cpu_ops {
261 /* CPU DAI clocking configuration */
262 int (*set_sysclk)(struct snd_soc_cpu_dai *cpu_dai,
263 int clk_id, unsigned int freq, int dir);
264 int (*set_clkdiv)(struct snd_soc_cpu_dai *cpu_dai,
265 int div_id, int div);
266 int (*set_pll)(struct snd_soc_cpu_dai *cpu_dai,
267 int pll_id, unsigned int freq_in, unsigned int freq_out);
268
269 /* CPU DAI format configuration */
270 int (*set_fmt)(struct snd_soc_cpu_dai *cpu_dai,
271 unsigned int fmt);
272 int (*set_tdm_slot)(struct snd_soc_cpu_dai *cpu_dai,
273 unsigned int mask, int slots);
274 int (*set_tristate)(struct snd_soc_cpu_dai *, int tristate);
275};
276
277/* SoC Codec DAI */
278struct snd_soc_codec_dai {
279 char *name;
280 int id;
281
282 /* DAI capabilities */
283 struct snd_soc_pcm_stream playback;
284 struct snd_soc_pcm_stream capture;
285
286 /* DAI runtime info */
287 struct snd_soc_codec *codec;
288 unsigned int active;
289 unsigned char pop_wait:1;
290
291 /* ops */
292 struct snd_soc_ops ops;
293 struct snd_soc_codec_ops dai_ops;
294
295 /* DAI private data */
296 void *private_data;
297};
298
299/* SoC CPU DAI */
300struct snd_soc_cpu_dai {
301
302 /* DAI description */
303 char *name;
304 unsigned int id;
305 unsigned char type;
306
307 /* DAI callbacks */
308 int (*probe)(struct platform_device *pdev);
309 void (*remove)(struct platform_device *pdev);
310 int (*suspend)(struct platform_device *pdev,
311 struct snd_soc_cpu_dai *cpu_dai);
312 int (*resume)(struct platform_device *pdev,
313 struct snd_soc_cpu_dai *cpu_dai);
314
315 /* ops */
316 struct snd_soc_ops ops;
317 struct snd_soc_cpu_ops dai_ops;
318
319 /* DAI capabilities */
320 struct snd_soc_pcm_stream capture;
321 struct snd_soc_pcm_stream playback;
322
323 /* DAI runtime info */
324 struct snd_pcm_runtime *runtime;
325 unsigned char active:1;
326 void *dma_data;
327
328 /* DAI private data */
329 void *private_data;
330};
331
332/* SoC Audio Codec */
333struct snd_soc_codec {
334 char *name;
335 struct module *owner;
336 struct mutex mutex;
337
338 /* callbacks */
339 int (*dapm_event)(struct snd_soc_codec *codec, int event);
340
341 /* runtime */
342 struct snd_card *card;
343 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
344 unsigned int active;
345 unsigned int pcm_devs;
346 void *private_data;
347
348 /* codec IO */
349 void *control_data; /* codec control (i2c/3wire) data */
350 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
351 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
352 hw_write_t hw_write;
353 hw_read_t hw_read;
354 void *reg_cache;
355 short reg_cache_size;
356 short reg_cache_step;
357
358 /* dapm */
359 struct list_head dapm_widgets;
360 struct list_head dapm_paths;
361 unsigned int dapm_state;
362 unsigned int suspend_dapm_state;
363 struct delayed_work delayed_work;
364
365 /* codec DAI's */
366 struct snd_soc_codec_dai *dai;
367 unsigned int num_dai;
368};
369
370/* codec device */
371struct snd_soc_codec_device {
372 int (*probe)(struct platform_device *pdev);
373 int (*remove)(struct platform_device *pdev);
374 int (*suspend)(struct platform_device *pdev, pm_message_t state);
375 int (*resume)(struct platform_device *pdev);
376};
377
378/* SoC platform interface */
379struct snd_soc_platform {
380 char *name;
381
382 int (*probe)(struct platform_device *pdev);
383 int (*remove)(struct platform_device *pdev);
384 int (*suspend)(struct platform_device *pdev,
385 struct snd_soc_cpu_dai *cpu_dai);
386 int (*resume)(struct platform_device *pdev,
387 struct snd_soc_cpu_dai *cpu_dai);
388
389 /* pcm creation and destruction */
390 int (*pcm_new)(struct snd_card *, struct snd_soc_codec_dai *,
391 struct snd_pcm *);
392 void (*pcm_free)(struct snd_pcm *);
393
394 /* platform stream ops */
395 struct snd_pcm_ops *pcm_ops;
396};
397
398/* SoC machine DAI configuration, glues a codec and cpu DAI together */
399struct snd_soc_dai_link {
400 char *name; /* Codec name */
401 char *stream_name; /* Stream name */
402
403 /* DAI */
404 struct snd_soc_codec_dai *codec_dai;
405 struct snd_soc_cpu_dai *cpu_dai;
406
407 /* machine stream operations */
408 struct snd_soc_ops *ops;
409
410 /* codec/machine specific init - e.g. add machine controls */
411 int (*init)(struct snd_soc_codec *codec);
412};
413
414/* SoC machine */
415struct snd_soc_machine {
416 char *name;
417
418 int (*probe)(struct platform_device *pdev);
419 int (*remove)(struct platform_device *pdev);
420
421 /* the pre and post PM functions are used to do any PM work before and
422 * after the codec and DAI's do any PM work. */
423 int (*suspend_pre)(struct platform_device *pdev, pm_message_t state);
424 int (*suspend_post)(struct platform_device *pdev, pm_message_t state);
425 int (*resume_pre)(struct platform_device *pdev);
426 int (*resume_post)(struct platform_device *pdev);
427
428 /* CPU <--> Codec DAI links */
429 struct snd_soc_dai_link *dai_link;
430 int num_links;
431};
432
433/* SoC Device - the audio subsystem */
434struct snd_soc_device {
435 struct device *dev;
436 struct snd_soc_machine *machine;
437 struct snd_soc_platform *platform;
438 struct snd_soc_codec *codec;
439 struct snd_soc_codec_device *codec_dev;
440 struct delayed_work delayed_work;
441 void *codec_data;
442};
443
444/* runtime channel data */
445struct snd_soc_pcm_runtime {
446 struct snd_soc_dai_link *dai;
447 struct snd_soc_device *socdev;
448};
449
450/* enumerated kcontrol */
451struct soc_enum {
452 unsigned short reg;
453 unsigned short reg2;
454 unsigned char shift_l;
455 unsigned char shift_r;
456 unsigned int mask;
457 const char **texts;
458 void *dapm;
459};
460
461#endif
diff --git a/include/sound/typedefs.h b/include/sound/typedefs.h
deleted file mode 100644
index f454b0206b93..000000000000
--- a/include/sound/typedefs.h
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * Typedef's for backward compatibility (for out-of-kernel drivers)
3 *
4 * This file will be removed soon in future
5 */
6
7/* core stuff */
8typedef struct snd_card snd_card_t;
9typedef struct snd_device snd_device_t;
10typedef struct snd_device_ops snd_device_ops_t;
11typedef enum snd_card_type snd_card_type_t;
12typedef struct snd_minor snd_minor_t;
13
14/* info */
15typedef struct snd_info_entry snd_info_entry_t;
16typedef struct snd_info_buffer snd_info_buffer_t;
17
18/* control */
19typedef struct snd_ctl_file snd_ctl_file_t;
20typedef struct snd_kcontrol snd_kcontrol_t;
21typedef struct snd_kcontrol_new snd_kcontrol_new_t;
22typedef struct snd_kcontrol_volatile snd_kcontrol_volatile_t;
23typedef struct snd_kctl_event snd_kctl_event_t;
24typedef struct snd_aes_iec958 snd_aes_iec958_t;
25typedef struct snd_ctl_card_info snd_ctl_card_info_t;
26typedef struct snd_ctl_elem_id snd_ctl_elem_id_t;
27typedef struct snd_ctl_elem_list snd_ctl_elem_list_t;
28typedef struct snd_ctl_elem_info snd_ctl_elem_info_t;
29typedef struct snd_ctl_elem_value snd_ctl_elem_value_t;
30typedef struct snd_ctl_event snd_ctl_event_t;
31#if defined(CONFIG_SND_MIXER_OSS) || defined(CONFIG_SND_MIXER_OSS_MODULE)
32typedef struct snd_mixer_oss snd_mixer_oss_t;
33#endif
34
35/* timer */
36typedef struct snd_timer snd_timer_t;
37typedef struct snd_timer_instance snd_timer_instance_t;
38typedef struct snd_timer_id snd_timer_id_t;
39typedef struct snd_timer_ginfo snd_timer_ginfo_t;
40typedef struct snd_timer_gparams snd_timer_gparams_t;
41typedef struct snd_timer_gstatus snd_timer_gstatus_t;
42typedef struct snd_timer_select snd_timer_select_t;
43typedef struct snd_timer_info snd_timer_info_t;
44typedef struct snd_timer_params snd_timer_params_t;
45typedef struct snd_timer_status snd_timer_status_t;
46typedef struct snd_timer_read snd_timer_read_t;
47typedef struct snd_timer_tread snd_timer_tread_t;
48
49/* PCM */
50typedef struct snd_pcm snd_pcm_t;
51typedef struct snd_pcm_str snd_pcm_str_t;
52typedef struct snd_pcm_substream snd_pcm_substream_t;
53typedef struct snd_pcm_info snd_pcm_info_t;
54typedef struct snd_pcm_hw_params snd_pcm_hw_params_t;
55typedef struct snd_pcm_sw_params snd_pcm_sw_params_t;
56typedef struct snd_pcm_channel_info snd_pcm_channel_info_t;
57typedef struct snd_pcm_status snd_pcm_status_t;
58typedef struct snd_pcm_mmap_status snd_pcm_mmap_status_t;
59typedef struct snd_pcm_mmap_control snd_pcm_mmap_control_t;
60typedef struct snd_mask snd_mask_t;
61typedef struct snd_sg_buf snd_pcm_sgbuf_t;
62
63typedef struct snd_interval snd_interval_t;
64typedef struct snd_xferi snd_xferi_t;
65typedef struct snd_xfern snd_xfern_t;
66typedef struct snd_xferv snd_xferv_t;
67
68typedef struct snd_pcm_file snd_pcm_file_t;
69typedef struct snd_pcm_runtime snd_pcm_runtime_t;
70typedef struct snd_pcm_hardware snd_pcm_hardware_t;
71typedef struct snd_pcm_ops snd_pcm_ops_t;
72typedef struct snd_pcm_hw_rule snd_pcm_hw_rule_t;
73typedef struct snd_pcm_hw_constraints snd_pcm_hw_constraints_t;
74typedef struct snd_ratnum ratnum_t;
75typedef struct snd_ratden ratden_t;
76typedef struct snd_pcm_hw_constraint_ratnums snd_pcm_hw_constraint_ratnums_t;
77typedef struct snd_pcm_hw_constraint_ratdens snd_pcm_hw_constraint_ratdens_t;
78typedef struct snd_pcm_hw_constraint_list snd_pcm_hw_constraint_list_t;
79typedef struct snd_pcm_group snd_pcm_group_t;
80typedef struct snd_pcm_notify snd_pcm_notify_t;
81
82/* rawmidi */
83typedef struct snd_rawmidi snd_rawmidi_t;
84typedef struct snd_rawmidi_info snd_rawmidi_info_t;
85typedef struct snd_rawmidi_params snd_rawmidi_params_t;
86typedef struct snd_rawmidi_status snd_rawmidi_status_t;
87typedef struct snd_rawmidi_runtime snd_rawmidi_runtime_t;
88typedef struct snd_rawmidi_substream snd_rawmidi_substream_t;
89typedef struct snd_rawmidi_str snd_rawmidi_str_t;
90typedef struct snd_rawmidi_ops snd_rawmidi_ops_t;
91typedef struct snd_rawmidi_global_ops snd_rawmidi_global_ops_t;
92typedef struct snd_rawmidi_file snd_rawmidi_file_t;
93
94/* hwdep */
95typedef struct snd_hwdep snd_hwdep_t;
96typedef struct snd_hwdep_info snd_hwdep_info_t;
97typedef struct snd_hwdep_dsp_status snd_hwdep_dsp_status_t;
98typedef struct snd_hwdep_dsp_image snd_hwdep_dsp_image_t;
99typedef struct snd_hwdep_ops snd_hwdep_ops_t;
100
101/* sequencer */
102typedef struct snd_seq_port_info snd_seq_port_info_t;
103typedef struct snd_seq_port_subscribe snd_seq_port_subscribe_t;
104typedef struct snd_seq_event snd_seq_event_t;
105typedef struct snd_seq_addr snd_seq_addr_t;
106typedef struct snd_seq_ev_volume snd_seq_ev_volume_t;
107typedef struct snd_seq_ev_loop snd_seq_ev_loop_t;
108typedef struct snd_seq_remove_events snd_seq_remove_events_t;
109typedef struct snd_seq_query_subs snd_seq_query_subs_t;
110typedef struct snd_seq_system_info snd_seq_system_info_t;
111typedef struct snd_seq_client_info snd_seq_client_info_t;
112typedef struct snd_seq_queue_info snd_seq_queue_info_t;
113typedef struct snd_seq_queue_status snd_seq_queue_status_t;
114typedef struct snd_seq_queue_tempo snd_seq_queue_tempo_t;
115typedef struct snd_seq_queue_owner snd_seq_queue_owner_t;
116typedef struct snd_seq_queue_timer snd_seq_queue_timer_t;
117typedef struct snd_seq_queue_client snd_seq_queue_client_t;
118typedef struct snd_seq_client_pool snd_seq_client_pool_t;
119typedef struct snd_seq_instr snd_seq_instr_t;
120typedef struct snd_seq_instr_data snd_seq_instr_data_t;
121typedef struct snd_seq_instr_header snd_seq_instr_header_t;
122
123typedef struct snd_seq_user_client user_client_t;
124typedef struct snd_seq_kernel_client kernel_client_t;
125typedef struct snd_seq_client client_t;
126typedef struct snd_seq_queue queue_t;
127
128/* seq_device */
129typedef struct snd_seq_device snd_seq_device_t;
130typedef struct snd_seq_dev_ops snd_seq_dev_ops_t;
131
132/* seq_midi */
133typedef struct snd_midi_event snd_midi_event_t;
134
135/* seq_midi_emul */
136typedef struct snd_midi_channel snd_midi_channel_t;
137typedef struct snd_midi_channel_set snd_midi_channel_set_t;
138typedef struct snd_midi_op snd_midi_op_t;
139
140/* seq_oss */
141typedef struct snd_seq_oss_arg snd_seq_oss_arg_t;
142typedef struct snd_seq_oss_callback snd_seq_oss_callback_t;
143typedef struct snd_seq_oss_reg snd_seq_oss_reg_t;
144
145/* virmidi */
146typedef struct snd_virmidi_dev snd_virmidi_dev_t;
147typedef struct snd_virmidi snd_virmidi_t;
148
149/* seq_instr */
150typedef struct snd_seq_kcluster snd_seq_kcluster_t;
151typedef struct snd_seq_kinstr_ops snd_seq_kinstr_ops_t;
152typedef struct snd_seq_kinstr snd_seq_kinstr_t;
153typedef struct snd_seq_kinstr_list snd_seq_kinstr_list_t;
154
155/* ac97 */
156typedef struct snd_ac97_bus ac97_bus_t;
157typedef struct snd_ac97_bus_ops ac97_bus_ops_t;
158typedef struct snd_ac97_template ac97_template_t;
159typedef struct snd_ac97 ac97_t;
160
161/* opl3/4 */
162typedef struct snd_opl3 opl3_t;
163typedef struct snd_opl4 opl4_t;
164
165/* mpu401 */
166typedef struct snd_mpu401 mpu401_t;
167
168/* i2c */
169typedef struct snd_i2c_device snd_i2c_device_t;
170typedef struct snd_i2c_bus snd_i2c_bus_t;
171
172typedef struct snd_ak4531 ak4531_t;
173
diff --git a/include/sound/version.h b/include/sound/version.h
index 20f7babad514..c39b3802cf18 100644
--- a/include/sound/version.h
+++ b/include/sound/version.h
@@ -1,3 +1,3 @@
1/* include/version.h. Generated by alsa/ksync script. */ 1/* include/version.h. Generated by alsa/ksync script. */
2#define CONFIG_SND_VERSION "1.0.14rc1" 2#define CONFIG_SND_VERSION "1.0.14rc2"
3#define CONFIG_SND_DATE " (Tue Jan 09 09:56:17 2007 UTC)" 3#define CONFIG_SND_DATE " (Fri Feb 09 13:50:10 2007 UTC)"
diff --git a/include/sound/vx_core.h b/include/sound/vx_core.h
index 217394652090..4830651cc4cf 100644
--- a/include/sound/vx_core.h
+++ b/include/sound/vx_core.h
@@ -128,7 +128,7 @@ struct snd_vx_hardware {
128 unsigned int num_ins; 128 unsigned int num_ins;
129 unsigned int num_outs; 129 unsigned int num_outs;
130 unsigned int output_level_max; 130 unsigned int output_level_max;
131 unsigned int *output_level_db_scale; 131 const unsigned int *output_level_db_scale;
132}; 132};
133 133
134/* hwdep id string */ 134/* hwdep id string */
diff --git a/include/sound/ymfpci.h b/include/sound/ymfpci.h
index f3514ee96bd9..203d2b45b788 100644
--- a/include/sound/ymfpci.h
+++ b/include/sound/ymfpci.h
@@ -270,6 +270,7 @@ struct snd_ymfpci_pcm {
270 struct snd_pcm_substream *substream; 270 struct snd_pcm_substream *substream;
271 struct snd_ymfpci_voice *voices[2]; /* playback only */ 271 struct snd_ymfpci_voice *voices[2]; /* playback only */
272 unsigned int running: 1, 272 unsigned int running: 1,
273 use_441_slot: 1,
273 output_front: 1, 274 output_front: 1,
274 output_rear: 1, 275 output_rear: 1,
275 swap_rear: 1; 276 swap_rear: 1;
@@ -324,6 +325,7 @@ struct snd_ymfpci {
324 325
325 u32 active_bank; 326 u32 active_bank;
326 struct snd_ymfpci_voice voices[64]; 327 struct snd_ymfpci_voice voices[64];
328 int src441_used;
327 329
328 struct snd_ac97_bus *ac97_bus; 330 struct snd_ac97_bus *ac97_bus;
329 struct snd_ac97 *ac97; 331 struct snd_ac97 *ac97;
@@ -346,7 +348,7 @@ struct snd_ymfpci {
346 int mode_dup4ch; 348 int mode_dup4ch;
347 int rear_opened; 349 int rear_opened;
348 int spdif_opened; 350 int spdif_opened;
349 struct { 351 struct snd_ymfpci_pcm_mixer {
350 u16 left; 352 u16 left;
351 u16 right; 353 u16 right;
352 struct snd_kcontrol *ctl; 354 struct snd_kcontrol *ctl;
@@ -357,6 +359,8 @@ struct snd_ymfpci {
357 wait_queue_head_t interrupt_sleep; 359 wait_queue_head_t interrupt_sleep;
358 atomic_t interrupt_sleep_count; 360 atomic_t interrupt_sleep_count;
359 struct snd_info_entry *proc_entry; 361 struct snd_info_entry *proc_entry;
362 const struct firmware *dsp_microcode;
363 const struct firmware *controller_microcode;
360 364
361#ifdef CONFIG_PM 365#ifdef CONFIG_PM
362 u32 *saved_regs; 366 u32 *saved_regs;