diff options
Diffstat (limited to 'include/sound/wm8904.h')
| -rw-r--r-- | include/sound/wm8904.h | 110 |
1 files changed, 108 insertions, 2 deletions
diff --git a/include/sound/wm8904.h b/include/sound/wm8904.h index d66575a601be..898be3a8db9a 100644 --- a/include/sound/wm8904.h +++ b/include/sound/wm8904.h | |||
| @@ -15,8 +15,111 @@ | |||
| 15 | #ifndef __MFD_WM8994_PDATA_H__ | 15 | #ifndef __MFD_WM8994_PDATA_H__ |
| 16 | #define __MFD_WM8994_PDATA_H__ | 16 | #define __MFD_WM8994_PDATA_H__ |
| 17 | 17 | ||
| 18 | #define WM8904_DRC_REGS 4 | 18 | /* Used to enable configuration of a GPIO to all zeros */ |
| 19 | #define WM8904_EQ_REGS 25 | 19 | #define WM8904_GPIO_NO_CONFIG 0x8000 |
| 20 | |||
| 21 | /* | ||
| 22 | * R6 (0x06) - Mic Bias Control 0 | ||
| 23 | */ | ||
| 24 | #define WM8904_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */ | ||
| 25 | #define WM8904_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */ | ||
| 26 | #define WM8904_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */ | ||
| 27 | #define WM8904_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ | ||
| 28 | #define WM8904_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ | ||
| 29 | #define WM8904_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ | ||
| 30 | #define WM8904_MICDET_ENA 0x0002 /* MICDET_ENA */ | ||
| 31 | #define WM8904_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */ | ||
| 32 | #define WM8904_MICDET_ENA_SHIFT 1 /* MICDET_ENA */ | ||
| 33 | #define WM8904_MICDET_ENA_WIDTH 1 /* MICDET_ENA */ | ||
| 34 | #define WM8904_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */ | ||
| 35 | #define WM8904_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */ | ||
| 36 | #define WM8904_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */ | ||
| 37 | #define WM8904_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */ | ||
| 38 | |||
| 39 | /* | ||
| 40 | * R7 (0x07) - Mic Bias Control 1 | ||
| 41 | */ | ||
| 42 | #define WM8904_MIC_DET_FILTER_ENA 0x8000 /* MIC_DET_FILTER_ENA */ | ||
| 43 | #define WM8904_MIC_DET_FILTER_ENA_MASK 0x8000 /* MIC_DET_FILTER_ENA */ | ||
| 44 | #define WM8904_MIC_DET_FILTER_ENA_SHIFT 15 /* MIC_DET_FILTER_ENA */ | ||
| 45 | #define WM8904_MIC_DET_FILTER_ENA_WIDTH 1 /* MIC_DET_FILTER_ENA */ | ||
| 46 | #define WM8904_MIC_SHORT_FILTER_ENA 0x4000 /* MIC_SHORT_FILTER_ENA */ | ||
| 47 | #define WM8904_MIC_SHORT_FILTER_ENA_MASK 0x4000 /* MIC_SHORT_FILTER_ENA */ | ||
| 48 | #define WM8904_MIC_SHORT_FILTER_ENA_SHIFT 14 /* MIC_SHORT_FILTER_ENA */ | ||
| 49 | #define WM8904_MIC_SHORT_FILTER_ENA_WIDTH 1 /* MIC_SHORT_FILTER_ENA */ | ||
| 50 | #define WM8904_MICBIAS_SEL_MASK 0x0007 /* MICBIAS_SEL - [2:0] */ | ||
| 51 | #define WM8904_MICBIAS_SEL_SHIFT 0 /* MICBIAS_SEL - [2:0] */ | ||
| 52 | #define WM8904_MICBIAS_SEL_WIDTH 3 /* MICBIAS_SEL - [2:0] */ | ||
| 53 | |||
| 54 | |||
| 55 | /* | ||
| 56 | * R121 (0x79) - GPIO Control 1 | ||
| 57 | */ | ||
| 58 | #define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */ | ||
| 59 | #define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */ | ||
| 60 | #define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */ | ||
| 61 | #define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */ | ||
| 62 | #define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */ | ||
| 63 | #define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */ | ||
| 64 | #define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */ | ||
| 65 | #define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */ | ||
| 66 | #define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ | ||
| 67 | #define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */ | ||
| 68 | #define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */ | ||
| 69 | |||
| 70 | /* | ||
| 71 | * R122 (0x7A) - GPIO Control 2 | ||
| 72 | */ | ||
| 73 | #define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */ | ||
| 74 | #define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */ | ||
| 75 | #define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */ | ||
| 76 | #define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */ | ||
| 77 | #define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */ | ||
| 78 | #define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */ | ||
| 79 | #define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */ | ||
| 80 | #define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */ | ||
| 81 | #define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */ | ||
| 82 | #define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */ | ||
| 83 | #define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */ | ||
| 84 | |||
| 85 | /* | ||
| 86 | * R123 (0x7B) - GPIO Control 3 | ||
| 87 | */ | ||
| 88 | #define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */ | ||
| 89 | #define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */ | ||
| 90 | #define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */ | ||
| 91 | #define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */ | ||
| 92 | #define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */ | ||
| 93 | #define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */ | ||
| 94 | #define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */ | ||
| 95 | #define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */ | ||
| 96 | #define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ | ||
| 97 | #define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */ | ||
| 98 | #define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */ | ||
| 99 | |||
| 100 | /* | ||
| 101 | * R124 (0x7C) - GPIO Control 4 | ||
| 102 | */ | ||
| 103 | #define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */ | ||
| 104 | #define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */ | ||
| 105 | #define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */ | ||
| 106 | #define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */ | ||
| 107 | #define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */ | ||
| 108 | #define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */ | ||
| 109 | #define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */ | ||
| 110 | #define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */ | ||
| 111 | #define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */ | ||
| 112 | #define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */ | ||
| 113 | #define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */ | ||
| 114 | #define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */ | ||
| 115 | #define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */ | ||
| 116 | #define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */ | ||
| 117 | #define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */ | ||
| 118 | |||
| 119 | #define WM8904_MIC_REGS 2 | ||
| 120 | #define WM8904_GPIO_REGS 4 | ||
| 121 | #define WM8904_DRC_REGS 4 | ||
| 122 | #define WM8904_EQ_REGS 25 | ||
| 20 | 123 | ||
| 21 | /** | 124 | /** |
| 22 | * DRC configurations are specified with a label and a set of register | 125 | * DRC configurations are specified with a label and a set of register |
| @@ -52,6 +155,9 @@ struct wm8904_pdata { | |||
| 52 | 155 | ||
| 53 | int num_retune_mobile_cfgs; | 156 | int num_retune_mobile_cfgs; |
| 54 | struct wm8904_retune_mobile_cfg *retune_mobile_cfgs; | 157 | struct wm8904_retune_mobile_cfg *retune_mobile_cfgs; |
| 158 | |||
| 159 | u32 gpio_cfg[WM8904_GPIO_REGS]; | ||
| 160 | u32 mic_cfg[WM8904_MIC_REGS]; | ||
| 55 | }; | 161 | }; |
| 56 | 162 | ||
| 57 | #endif | 163 | #endif |
