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-rw-r--r--include/sound/emu10k1.h42
1 files changed, 31 insertions, 11 deletions
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 43b6786abae5..c50b91958ff9 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -83,7 +83,8 @@
83#define IPR 0x08 /* Global interrupt pending register */ 83#define IPR 0x08 /* Global interrupt pending register */
84 /* Clear pending interrupts by writing a 1 to */ 84 /* Clear pending interrupts by writing a 1 to */
85 /* the relevant bits and zero to the other bits */ 85 /* the relevant bits and zero to the other bits */
86 86#define IPR_P16V 0x80000000 /* Bit set when the CA0151 P16V chip wishes
87 to interrupt */
87#define IPR_GPIOMSG 0x20000000 /* GPIO message interrupt (RE'd, still not sure 88#define IPR_GPIOMSG 0x20000000 /* GPIO message interrupt (RE'd, still not sure
88 which INTE bits enable it) */ 89 which INTE bits enable it) */
89 90
@@ -746,6 +747,7 @@
746 /* Assumes sample lock */ 747 /* Assumes sample lock */
747 748
748/* These three bitfields apply to CDSRCS, GPSRCS, and (except as noted) ZVSRCS. */ 749/* These three bitfields apply to CDSRCS, GPSRCS, and (except as noted) ZVSRCS. */
750#define SRCS_SPDIFVALID 0x04000000 /* SPDIF stream valid */
749#define SRCS_SPDIFLOCKED 0x02000000 /* SPDIF stream locked */ 751#define SRCS_SPDIFLOCKED 0x02000000 /* SPDIF stream locked */
750#define SRCS_RATELOCKED 0x01000000 /* Sample rate locked */ 752#define SRCS_RATELOCKED 0x01000000 /* Sample rate locked */
751#define SRCS_ESTSAMPLERATE 0x0007ffff /* Do not modify this field. */ 753#define SRCS_ESTSAMPLERATE 0x0007ffff /* Do not modify this field. */
@@ -803,10 +805,26 @@
803#define A_FXWC2 0x75 /* Selects 0x9f-0x80 for FX recording */ 805#define A_FXWC2 0x75 /* Selects 0x9f-0x80 for FX recording */
804 806
805#define A_SPDIF_SAMPLERATE 0x76 /* Set the sample rate of SPDIF output */ 807#define A_SPDIF_SAMPLERATE 0x76 /* Set the sample rate of SPDIF output */
806#define A_SPDIF_RATE_MASK 0x000000c0 808#define A_SAMPLE_RATE 0x76 /* Various sample rate settings. */
809#define A_SAMPLE_RATE_NOT_USED 0x0ffc111e /* Bits that are not used and cannot be set. */
810#define A_SAMPLE_RATE_UNKNOWN 0xf0030001 /* Bits that can be set, but have unknown use. */
811#define A_SPDIF_RATE_MASK 0x000000e0 /* Any other values for rates, just use 48000 */
807#define A_SPDIF_48000 0x00000000 812#define A_SPDIF_48000 0x00000000
808#define A_SPDIF_44100 0x00000080 813#define A_SPDIF_192000 0x00000020
809#define A_SPDIF_96000 0x00000040 814#define A_SPDIF_96000 0x00000040
815#define A_SPDIF_44100 0x00000080
816
817#define A_I2S_CAPTURE_RATE_MASK 0x00000e00 /* This sets the capture PCM rate, but it is */
818#define A_I2S_CAPTURE_48000 0x00000000 /* unclear if this sets the ADC rate as well. */
819#define A_I2S_CAPTURE_192000 0x00000200
820#define A_I2S_CAPTURE_96000 0x00000400
821#define A_I2S_CAPTURE_44100 0x00000800
822
823#define A_PCM_RATE_MASK 0x0000e000 /* This sets the playback PCM rate on the P16V */
824#define A_PCM_48000 0x00000000
825#define A_PCM_192000 0x00002000
826#define A_PCM_96000 0x00004000
827#define A_PCM_44100 0x00008000
810 828
811/* 0x77,0x78,0x79 "something i2s-related" - default to 0x01080000 on my audigy 2 ZS --rlrevell */ 829/* 0x77,0x78,0x79 "something i2s-related" - default to 0x01080000 on my audigy 2 ZS --rlrevell */
812/* 0x7a, 0x7b - lookup tables */ 830/* 0x7a, 0x7b - lookup tables */
@@ -1039,28 +1057,28 @@ typedef struct {
1039 u32 vendor; 1057 u32 vendor;
1040 u32 device; 1058 u32 device;
1041 u32 subsystem; 1059 u32 subsystem;
1060 unsigned char revision;
1042 unsigned char emu10k1_chip; /* Original SB Live. Not SB Live 24bit. */ 1061 unsigned char emu10k1_chip; /* Original SB Live. Not SB Live 24bit. */
1043 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */ 1062 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */
1044 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */ 1063 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
1045 unsigned char ca0108_chip; /* Audigy 2 Value */ 1064 unsigned char ca0108_chip; /* Audigy 2 Value */
1046 unsigned char ca0151_chip; /* P16V */ 1065 unsigned char ca0151_chip; /* P16V */
1047 unsigned char spk71; /* Has 7.1 speakers */ 1066 unsigned char spk71; /* Has 7.1 speakers */
1067 unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */
1048 unsigned char spdif_bug; /* Has Spdif phasing bug */ 1068 unsigned char spdif_bug; /* Has Spdif phasing bug */
1049 unsigned char ac97_chip; /* Has an AC97 chip */ 1069 unsigned char ac97_chip; /* Has an AC97 chip */
1050 unsigned char ecard; /* APS EEPROM */ 1070 unsigned char ecard; /* APS EEPROM */
1051 char * driver; 1071 const char *driver;
1052 char * name; 1072 const char *name;
1073 const char *id; /* for backward compatibility - can be NULL if not needed */
1053} emu_chip_details_t; 1074} emu_chip_details_t;
1054 1075
1055struct _snd_emu10k1 { 1076struct _snd_emu10k1 {
1056 int irq; 1077 int irq;
1057 1078
1058 unsigned long port; /* I/O port number */ 1079 unsigned long port; /* I/O port number */
1059 unsigned int APS: 1, /* APS flag */ 1080 unsigned int tos_link: 1, /* tos link detected */
1060 no_ac97: 1, /* no AC'97 */ 1081 rear_ac97: 1; /* rear channels are on AC'97 */
1061 tos_link: 1, /* tos link detected */
1062 rear_ac97: 1, /* rear channels are on AC'97 */
1063 spk71:1; /* 7.1 configuration (Audigy 2 ZS) */
1064 const emu_chip_details_t *card_capabilities; /* Contains profile of card capabilities */ 1082 const emu_chip_details_t *card_capabilities; /* Contains profile of card capabilities */
1065 unsigned int audigy; /* is Audigy? */ 1083 unsigned int audigy; /* is Audigy? */
1066 unsigned int revision; /* chip revision */ 1084 unsigned int revision; /* chip revision */
@@ -1109,7 +1127,10 @@ struct _snd_emu10k1 {
1109 1127
1110 emu10k1_voice_t voices[NUM_G]; 1128 emu10k1_voice_t voices[NUM_G];
1111 emu10k1_voice_t p16v_voices[4]; 1129 emu10k1_voice_t p16v_voices[4];
1130 emu10k1_voice_t p16v_capture_voice;
1112 int p16v_device_offset; 1131 int p16v_device_offset;
1132 u32 p16v_capture_source;
1133 u32 p16v_capture_channel;
1113 emu10k1_pcm_mixer_t pcm_mixer[32]; 1134 emu10k1_pcm_mixer_t pcm_mixer[32];
1114 emu10k1_pcm_mixer_t efx_pcm_mixer[NUM_EFX_PLAYBACK]; 1135 emu10k1_pcm_mixer_t efx_pcm_mixer[NUM_EFX_PLAYBACK];
1115 snd_kcontrol_t *ctl_send_routing; 1136 snd_kcontrol_t *ctl_send_routing;
@@ -1453,7 +1474,6 @@ int snd_emu10k1_fx8010_unregister_irq_handler(emu10k1_t *emu,
1453#endif 1474#endif
1454 1475
1455typedef struct { 1476typedef struct {
1456 unsigned int card; /* card type */
1457 unsigned int internal_tram_size; /* in samples */ 1477 unsigned int internal_tram_size; /* in samples */
1458 unsigned int external_tram_size; /* in samples */ 1478 unsigned int external_tram_size; /* in samples */
1459 char fxbus_names[16][32]; /* names of FXBUSes */ 1479 char fxbus_names[16][32]; /* names of FXBUSes */