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Diffstat (limited to 'include/sound/ad1848.h')
-rw-r--r-- | include/sound/ad1848.h | 111 |
1 files changed, 0 insertions, 111 deletions
diff --git a/include/sound/ad1848.h b/include/sound/ad1848.h index 7ff484f55b02..e69de29bb2d1 100644 --- a/include/sound/ad1848.h +++ b/include/sound/ad1848.h | |||
@@ -1,111 +0,0 @@ | |||
1 | #ifndef __SOUND_AD1848_H | ||
2 | #define __SOUND_AD1848_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> | ||
6 | * Definitions for AD1847/AD1848/CS4248 chips | ||
7 | * | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | #include "pcm.h" | ||
26 | #include <linux/interrupt.h> | ||
27 | |||
28 | #include "wss.h" /* temporary till the driver is removed */ | ||
29 | |||
30 | /* codec registers */ | ||
31 | |||
32 | #define AD1848_LEFT_INPUT 0x00 /* left input control */ | ||
33 | #define AD1848_RIGHT_INPUT 0x01 /* right input control */ | ||
34 | #define AD1848_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */ | ||
35 | #define AD1848_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */ | ||
36 | #define AD1848_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */ | ||
37 | #define AD1848_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */ | ||
38 | #define AD1848_LEFT_OUTPUT 0x06 /* left output control register */ | ||
39 | #define AD1848_RIGHT_OUTPUT 0x07 /* right output control register */ | ||
40 | #define AD1848_DATA_FORMAT 0x08 /* clock and data format - playback/capture - bits 7-0 MCE */ | ||
41 | #define AD1848_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ | ||
42 | #define AD1848_PIN_CTRL 0x0a /* pin control */ | ||
43 | #define AD1848_TEST_INIT 0x0b /* test and initialization */ | ||
44 | #define AD1848_MISC_INFO 0x0c /* miscellaneous information */ | ||
45 | #define AD1848_LOOPBACK 0x0d /* loopback control */ | ||
46 | #define AD1848_DATA_UPR_CNT 0x0e /* playback/capture upper base count */ | ||
47 | #define AD1848_DATA_LWR_CNT 0x0f /* playback/capture lower base count */ | ||
48 | |||
49 | /* definitions for codec register select port - CODECP( REGSEL ) */ | ||
50 | |||
51 | #define AD1848_INIT 0x80 /* CODEC is initializing */ | ||
52 | #define AD1848_MCE 0x40 /* mode change enable */ | ||
53 | #define AD1848_TRD 0x20 /* transfer request disable */ | ||
54 | |||
55 | /* definitions for codec status register - CODECP( STATUS ) */ | ||
56 | |||
57 | #define AD1848_GLOBALIRQ 0x01 /* IRQ is active */ | ||
58 | |||
59 | /* definitions for AD1848_LEFT_INPUT and AD1848_RIGHT_INPUT registers */ | ||
60 | |||
61 | #define AD1848_ENABLE_MIC_GAIN 0x20 | ||
62 | |||
63 | #define AD1848_MIXS_LINE1 0x00 | ||
64 | #define AD1848_MIXS_AUX1 0x40 | ||
65 | #define AD1848_MIXS_LINE2 0x80 | ||
66 | #define AD1848_MIXS_ALL 0xc0 | ||
67 | |||
68 | /* definitions for clock and data format register - AD1848_PLAYBK_FORMAT */ | ||
69 | |||
70 | #define AD1848_LINEAR_8 0x00 /* 8-bit unsigned data */ | ||
71 | #define AD1848_ALAW_8 0x60 /* 8-bit A-law companded */ | ||
72 | #define AD1848_ULAW_8 0x20 /* 8-bit U-law companded */ | ||
73 | #define AD1848_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */ | ||
74 | #define AD1848_STEREO 0x10 /* stereo mode */ | ||
75 | /* bits 3-1 define frequency divisor */ | ||
76 | #define AD1848_XTAL1 0x00 /* 24.576 crystal */ | ||
77 | #define AD1848_XTAL2 0x01 /* 16.9344 crystal */ | ||
78 | |||
79 | /* definitions for interface control register - AD1848_IFACE_CTRL */ | ||
80 | |||
81 | #define AD1848_CAPTURE_PIO 0x80 /* capture PIO enable */ | ||
82 | #define AD1848_PLAYBACK_PIO 0x40 /* playback PIO enable */ | ||
83 | #define AD1848_CALIB_MODE 0x18 /* calibration mode bits */ | ||
84 | #define AD1848_AUTOCALIB 0x08 /* auto calibrate */ | ||
85 | #define AD1848_SINGLE_DMA 0x04 /* use single DMA channel */ | ||
86 | #define AD1848_CAPTURE_ENABLE 0x02 /* capture enable */ | ||
87 | #define AD1848_PLAYBACK_ENABLE 0x01 /* playback enable */ | ||
88 | |||
89 | /* definitions for pin control register - AD1848_PIN_CTRL */ | ||
90 | |||
91 | #define AD1848_IRQ_ENABLE 0x02 /* enable IRQ */ | ||
92 | #define AD1848_XCTL1 0x40 /* external control #1 */ | ||
93 | #define AD1848_XCTL0 0x80 /* external control #0 */ | ||
94 | |||
95 | /* definitions for test and init register - AD1848_TEST_INIT */ | ||
96 | |||
97 | #define AD1848_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */ | ||
98 | #define AD1848_DMA_REQUEST 0x10 /* DMA request in progress */ | ||
99 | |||
100 | /* exported functions */ | ||
101 | |||
102 | void snd_ad1848_out(struct snd_wss *chip, unsigned char reg, | ||
103 | unsigned char value); | ||
104 | |||
105 | int snd_ad1848_create(struct snd_card *card, | ||
106 | unsigned long port, | ||
107 | int irq, int dma, | ||
108 | unsigned short hardware, | ||
109 | struct snd_wss **chip); | ||
110 | |||
111 | #endif /* __SOUND_AD1848_H */ | ||