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1/*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26#ifndef _SAS_H_
27#define _SAS_H_
28
29#include <linux/types.h>
30#include <asm/byteorder.h>
31
32#define SAS_ADDR_SIZE 8
33#define HASHED_SAS_ADDR_SIZE 3
34#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36#define SMP_REQUEST 0x40
37#define SMP_RESPONSE 0x41
38
39#define SSP_DATA 0x01
40#define SSP_XFER_RDY 0x05
41#define SSP_COMMAND 0x06
42#define SSP_RESPONSE 0x07
43#define SSP_TASK 0x16
44
45#define SMP_REPORT_GENERAL 0x00
46#define SMP_REPORT_MANUF_INFO 0x01
47#define SMP_READ_GPIO_REG 0x02
48#define SMP_DISCOVER 0x10
49#define SMP_REPORT_PHY_ERR_LOG 0x11
50#define SMP_REPORT_PHY_SATA 0x12
51#define SMP_REPORT_ROUTE_INFO 0x13
52#define SMP_WRITE_GPIO_REG 0x82
53#define SMP_CONF_ROUTE_INFO 0x90
54#define SMP_PHY_CONTROL 0x91
55#define SMP_PHY_TEST_FUNCTION 0x92
56
57#define SMP_RESP_FUNC_ACC 0x00
58#define SMP_RESP_FUNC_UNK 0x01
59#define SMP_RESP_FUNC_FAILED 0x02
60#define SMP_RESP_INV_FRM_LEN 0x03
61#define SMP_RESP_NO_PHY 0x10
62#define SMP_RESP_NO_INDEX 0x11
63#define SMP_RESP_PHY_NO_SATA 0x12
64#define SMP_RESP_PHY_UNK_OP 0x13
65#define SMP_RESP_PHY_UNK_TESTF 0x14
66#define SMP_RESP_PHY_TEST_INPROG 0x15
67#define SMP_RESP_PHY_VACANT 0x16
68
69/* SAM TMFs */
70#define TMF_ABORT_TASK 0x01
71#define TMF_ABORT_TASK_SET 0x02
72#define TMF_CLEAR_TASK_SET 0x04
73#define TMF_LU_RESET 0x08
74#define TMF_CLEAR_ACA 0x40
75#define TMF_QUERY_TASK 0x80
76
77/* SAS TMF responses */
78#define TMF_RESP_FUNC_COMPLETE 0x00
79#define TMF_RESP_INVALID_FRAME 0x02
80#define TMF_RESP_FUNC_ESUPP 0x04
81#define TMF_RESP_FUNC_FAILED 0x05
82#define TMF_RESP_FUNC_SUCC 0x08
83#define TMF_RESP_NO_LUN 0x09
84#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90};
91
92/* See sas_discover.c if you plan on changing these.
93 */
94enum sas_dev_type {
95 NO_DEVICE = 0, /* protocol */
96 SAS_END_DEV = 1, /* protocol */
97 EDGE_DEV = 2, /* protocol */
98 FANOUT_DEV = 3, /* protocol */
99 SAS_HA = 4,
100 SATA_DEV = 5,
101 SATA_PM = 7,
102 SATA_PM_PORT= 8,
103};
104
105enum sas_phy_linkrate {
106 PHY_LINKRATE_NONE = 0,
107 PHY_LINKRATE_UNKNOWN = 0,
108 PHY_DISABLED,
109 PHY_RESET_PROBLEM,
110 PHY_SPINUP_HOLD,
111 PHY_PORT_SELECTOR,
112 PHY_LINKRATE_1_5 = 0x08,
113 PHY_LINKRATE_G1 = PHY_LINKRATE_1_5,
114 PHY_LINKRATE_3 = 0x09,
115 PHY_LINKRATE_G2 = PHY_LINKRATE_3,
116 PHY_LINKRATE_6 = 0x0A,
117};
118
119/* Partly from IDENTIFY address frame. */
120enum sas_proto {
121 SATA_PROTO = 1,
122 SAS_PROTO_SMP = 2, /* protocol */
123 SAS_PROTO_STP = 4, /* protocol */
124 SAS_PROTO_SSP = 8, /* protocol */
125 SAS_PROTO_ALL = 0xE,
126};
127
128/* From the spec; local phys only */
129enum phy_func {
130 PHY_FUNC_NOP,
131 PHY_FUNC_LINK_RESET, /* Enables the phy */
132 PHY_FUNC_HARD_RESET,
133 PHY_FUNC_DISABLE,
134 PHY_FUNC_CLEAR_ERROR_LOG = 5,
135 PHY_FUNC_CLEAR_AFFIL,
136 PHY_FUNC_TX_SATA_PS_SIGNAL,
137 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
138};
139
140/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
141 * Most of those are here for completeness.
142 */
143enum sas_prim {
144 SAS_PRIM_AIP_NORMAL = 1,
145 SAS_PRIM_AIP_R0 = 2,
146 SAS_PRIM_AIP_R1 = 3,
147 SAS_PRIM_AIP_R2 = 4,
148 SAS_PRIM_AIP_WC = 5,
149 SAS_PRIM_AIP_WD = 6,
150 SAS_PRIM_AIP_WP = 7,
151 SAS_PRIM_AIP_RWP = 8,
152
153 SAS_PRIM_BC_CH = 9,
154 SAS_PRIM_BC_RCH0 = 10,
155 SAS_PRIM_BC_RCH1 = 11,
156 SAS_PRIM_BC_R0 = 12,
157 SAS_PRIM_BC_R1 = 13,
158 SAS_PRIM_BC_R2 = 14,
159 SAS_PRIM_BC_R3 = 15,
160 SAS_PRIM_BC_R4 = 16,
161
162 SAS_PRIM_NOTIFY_ENSP= 17,
163 SAS_PRIM_NOTIFY_R0 = 18,
164 SAS_PRIM_NOTIFY_R1 = 19,
165 SAS_PRIM_NOTIFY_R2 = 20,
166
167 SAS_PRIM_CLOSE_CLAF = 21,
168 SAS_PRIM_CLOSE_NORM = 22,
169 SAS_PRIM_CLOSE_R0 = 23,
170 SAS_PRIM_CLOSE_R1 = 24,
171
172 SAS_PRIM_OPEN_RTRY = 25,
173 SAS_PRIM_OPEN_RJCT = 26,
174 SAS_PRIM_OPEN_ACPT = 27,
175
176 SAS_PRIM_DONE = 28,
177 SAS_PRIM_BREAK = 29,
178
179 SATA_PRIM_DMAT = 33,
180 SATA_PRIM_PMNAK = 34,
181 SATA_PRIM_PMACK = 35,
182 SATA_PRIM_PMREQ_S = 36,
183 SATA_PRIM_PMREQ_P = 37,
184 SATA_SATA_R_ERR = 38,
185};
186
187enum sas_open_rej_reason {
188 /* Abandon open */
189 SAS_OREJ_UNKNOWN = 0,
190 SAS_OREJ_BAD_DEST = 1,
191 SAS_OREJ_CONN_RATE = 2,
192 SAS_OREJ_EPROTO = 3,
193 SAS_OREJ_RESV_AB0 = 4,
194 SAS_OREJ_RESV_AB1 = 5,
195 SAS_OREJ_RESV_AB2 = 6,
196 SAS_OREJ_RESV_AB3 = 7,
197 SAS_OREJ_WRONG_DEST= 8,
198 SAS_OREJ_STP_NORES = 9,
199
200 /* Retry open */
201 SAS_OREJ_NO_DEST = 10,
202 SAS_OREJ_PATH_BLOCKED = 11,
203 SAS_OREJ_RSVD_CONT0 = 12,
204 SAS_OREJ_RSVD_CONT1 = 13,
205 SAS_OREJ_RSVD_INIT0 = 14,
206 SAS_OREJ_RSVD_INIT1 = 15,
207 SAS_OREJ_RSVD_STOP0 = 16,
208 SAS_OREJ_RSVD_STOP1 = 17,
209 SAS_OREJ_RSVD_RETRY = 18,
210};
211
212struct dev_to_host_fis {
213 u8 fis_type; /* 0x34 */
214 u8 flags;
215 u8 status;
216 u8 error;
217
218 u8 lbal;
219 union { u8 lbam; u8 byte_count_low; };
220 union { u8 lbah; u8 byte_count_high; };
221 u8 device;
222
223 u8 lbal_exp;
224 u8 lbam_exp;
225 u8 lbah_exp;
226 u8 _r_a;
227
228 union { u8 sector_count; u8 interrupt_reason; };
229 u8 sector_count_exp;
230 u8 _r_b;
231 u8 _r_c;
232
233 u32 _r_d;
234} __attribute__ ((packed));
235
236struct host_to_dev_fis {
237 u8 fis_type; /* 0x27 */
238 u8 flags;
239 u8 command;
240 u8 features;
241
242 u8 lbal;
243 union { u8 lbam; u8 byte_count_low; };
244 union { u8 lbah; u8 byte_count_high; };
245 u8 device;
246
247 u8 lbal_exp;
248 u8 lbam_exp;
249 u8 lbah_exp;
250 u8 features_exp;
251
252 union { u8 sector_count; u8 interrupt_reason; };
253 u8 sector_count_exp;
254 u8 _r_a;
255 u8 control;
256
257 u32 _r_b;
258} __attribute__ ((packed));
259
260/* Prefer to have code clarity over header file clarity.
261 */
262#ifdef __LITTLE_ENDIAN_BITFIELD
263struct sas_identify_frame {
264 /* Byte 0 */
265 u8 frame_type:4;
266 u8 dev_type:3;
267 u8 _un0:1;
268
269 /* Byte 1 */
270 u8 _un1;
271
272 /* Byte 2 */
273 union {
274 struct {
275 u8 _un20:1;
276 u8 smp_iport:1;
277 u8 stp_iport:1;
278 u8 ssp_iport:1;
279 u8 _un247:4;
280 };
281 u8 initiator_bits;
282 };
283
284 /* Byte 3 */
285 union {
286 struct {
287 u8 _un30:1;
288 u8 smp_tport:1;
289 u8 stp_tport:1;
290 u8 ssp_tport:1;
291 u8 _un347:4;
292 };
293 u8 target_bits;
294 };
295
296 /* Byte 4 - 11 */
297 u8 _un4_11[8];
298
299 /* Byte 12 - 19 */
300 u8 sas_addr[SAS_ADDR_SIZE];
301
302 /* Byte 20 */
303 u8 phy_id;
304
305 u8 _un21_27[7];
306
307 __be32 crc;
308} __attribute__ ((packed));
309
310struct ssp_frame_hdr {
311 u8 frame_type;
312 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
313 u8 _r_a;
314 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
315 __be16 _r_b;
316
317 u8 changing_data_ptr:1;
318 u8 retransmit:1;
319 u8 retry_data_frames:1;
320 u8 _r_c:5;
321
322 u8 num_fill_bytes:2;
323 u8 _r_d:6;
324
325 u32 _r_e;
326 __be16 tag;
327 __be16 tptt;
328 __be32 data_offs;
329} __attribute__ ((packed));
330
331struct ssp_response_iu {
332 u8 _r_a[10];
333
334 u8 datapres:2;
335 u8 _r_b:6;
336
337 u8 status;
338
339 u32 _r_c;
340
341 __be32 sense_data_len;
342 __be32 response_data_len;
343
344 u8 resp_data[0];
345 u8 sense_data[0];
346} __attribute__ ((packed));
347
348/* ---------- SMP ---------- */
349
350struct report_general_resp {
351 __be16 change_count;
352 __be16 route_indexes;
353 u8 _r_a;
354 u8 num_phys;
355
356 u8 conf_route_table:1;
357 u8 configuring:1;
358 u8 _r_b:6;
359
360 u8 _r_c;
361
362 u8 enclosure_logical_id[8];
363
364 u8 _r_d[12];
365} __attribute__ ((packed));
366
367struct discover_resp {
368 u8 _r_a[5];
369
370 u8 phy_id;
371 __be16 _r_b;
372
373 u8 _r_c:4;
374 u8 attached_dev_type:3;
375 u8 _r_d:1;
376
377 u8 linkrate:4;
378 u8 _r_e:4;
379
380 u8 attached_sata_host:1;
381 u8 iproto:3;
382 u8 _r_f:4;
383
384 u8 attached_sata_dev:1;
385 u8 tproto:3;
386 u8 _r_g:3;
387 u8 attached_sata_ps:1;
388
389 u8 sas_addr[8];
390 u8 attached_sas_addr[8];
391 u8 attached_phy_id;
392
393 u8 _r_h[7];
394
395 u8 hmin_linkrate:4;
396 u8 pmin_linkrate:4;
397 u8 hmax_linkrate:4;
398 u8 pmax_linkrate:4;
399
400 u8 change_count;
401
402 u8 pptv:4;
403 u8 _r_i:3;
404 u8 virtual:1;
405
406 u8 routing_attr:4;
407 u8 _r_j:4;
408
409 u8 conn_type;
410 u8 conn_el_index;
411 u8 conn_phy_link;
412
413 u8 _r_k[8];
414} __attribute__ ((packed));
415
416struct report_phy_sata_resp {
417 u8 _r_a[5];
418
419 u8 phy_id;
420 u8 _r_b;
421
422 u8 affil_valid:1;
423 u8 affil_supp:1;
424 u8 _r_c:6;
425
426 u32 _r_d;
427
428 u8 stp_sas_addr[8];
429
430 struct dev_to_host_fis fis;
431
432 u32 _r_e;
433
434 u8 affil_stp_ini_addr[8];
435
436 __be32 crc;
437} __attribute__ ((packed));
438
439struct smp_resp {
440 u8 frame_type;
441 u8 function;
442 u8 result;
443 u8 reserved;
444 union {
445 struct report_general_resp rg;
446 struct discover_resp disc;
447 struct report_phy_sata_resp rps;
448 };
449} __attribute__ ((packed));
450
451#elif defined(__BIG_ENDIAN_BITFIELD)
452struct sas_identify_frame {
453 /* Byte 0 */
454 u8 _un0:1;
455 u8 dev_type:3;
456 u8 frame_type:4;
457
458 /* Byte 1 */
459 u8 _un1;
460
461 /* Byte 2 */
462 union {
463 struct {
464 u8 _un247:4;
465 u8 ssp_iport:1;
466 u8 stp_iport:1;
467 u8 smp_iport:1;
468 u8 _un20:1;
469 };
470 u8 initiator_bits;
471 };
472
473 /* Byte 3 */
474 union {
475 struct {
476 u8 _un347:4;
477 u8 ssp_tport:1;
478 u8 stp_tport:1;
479 u8 smp_tport:1;
480 u8 _un30:1;
481 };
482 u8 target_bits;
483 };
484
485 /* Byte 4 - 11 */
486 u8 _un4_11[8];
487
488 /* Byte 12 - 19 */
489 u8 sas_addr[SAS_ADDR_SIZE];
490
491 /* Byte 20 */
492 u8 phy_id;
493
494 u8 _un21_27[7];
495
496 __be32 crc;
497} __attribute__ ((packed));
498
499struct ssp_frame_hdr {
500 u8 frame_type;
501 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
502 u8 _r_a;
503 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
504 __be16 _r_b;
505
506 u8 _r_c:5;
507 u8 retry_data_frames:1;
508 u8 retransmit:1;
509 u8 changing_data_ptr:1;
510
511 u8 _r_d:6;
512 u8 num_fill_bytes:2;
513
514 u32 _r_e;
515 __be16 tag;
516 __be16 tptt;
517 __be32 data_offs;
518} __attribute__ ((packed));
519
520struct ssp_response_iu {
521 u8 _r_a[10];
522
523 u8 _r_b:6;
524 u8 datapres:2;
525
526 u8 status;
527
528 u32 _r_c;
529
530 __be32 sense_data_len;
531 __be32 response_data_len;
532
533 u8 resp_data[0];
534 u8 sense_data[0];
535} __attribute__ ((packed));
536
537/* ---------- SMP ---------- */
538
539struct report_general_resp {
540 __be16 change_count;
541 __be16 route_indexes;
542 u8 _r_a;
543 u8 num_phys;
544
545 u8 _r_b:6;
546 u8 configuring:1;
547 u8 conf_route_table:1;
548
549 u8 _r_c;
550
551 u8 enclosure_logical_id[8];
552
553 u8 _r_d[12];
554} __attribute__ ((packed));
555
556struct discover_resp {
557 u8 _r_a[5];
558
559 u8 phy_id;
560 __be16 _r_b;
561
562 u8 _r_d:1;
563 u8 attached_dev_type:3;
564 u8 _r_c:4;
565
566 u8 _r_e:4;
567 u8 linkrate:4;
568
569 u8 _r_f:4;
570 u8 iproto:3;
571 u8 attached_sata_host:1;
572
573 u8 attached_sata_ps:1;
574 u8 _r_g:3;
575 u8 tproto:3;
576 u8 attached_sata_dev:1;
577
578 u8 sas_addr[8];
579 u8 attached_sas_addr[8];
580 u8 attached_phy_id;
581
582 u8 _r_h[7];
583
584 u8 pmin_linkrate:4;
585 u8 hmin_linkrate:4;
586 u8 pmax_linkrate:4;
587 u8 hmax_linkrate:4;
588
589 u8 change_count;
590
591 u8 virtual:1;
592 u8 _r_i:3;
593 u8 pptv:4;
594
595 u8 _r_j:4;
596 u8 routing_attr:4;
597
598 u8 conn_type;
599 u8 conn_el_index;
600 u8 conn_phy_link;
601
602 u8 _r_k[8];
603} __attribute__ ((packed));
604
605struct report_phy_sata_resp {
606 u8 _r_a[5];
607
608 u8 phy_id;
609 u8 _r_b;
610
611 u8 _r_c:6;
612 u8 affil_supp:1;
613 u8 affil_valid:1;
614
615 u32 _r_d;
616
617 u8 stp_sas_addr[8];
618
619 struct dev_to_host_fis fis;
620
621 u32 _r_e;
622
623 u8 affil_stp_ini_addr[8];
624
625 __be32 crc;
626} __attribute__ ((packed));
627
628struct smp_resp {
629 u8 frame_type;
630 u8 function;
631 u8 result;
632 u8 reserved;
633 union {
634 struct report_general_resp rg;
635 struct discover_resp disc;
636 struct report_phy_sata_resp rps;
637 };
638} __attribute__ ((packed));
639
640#else
641#error "Bitfield order not defined!"
642#endif
643
644#endif /* _SAS_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-08 17:03:19 -0500