diff options
Diffstat (limited to 'include/media')
-rw-r--r-- | include/media/adv7604.h | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/include/media/adv7604.h b/include/media/adv7604.h index 171b957db743..dc004bc926c9 100644 --- a/include/media/adv7604.h +++ b/include/media/adv7604.h | |||
@@ -40,14 +40,6 @@ enum adv7604_op_ch_sel { | |||
40 | ADV7604_OP_CH_SEL_RBG = 5, | 40 | ADV7604_OP_CH_SEL_RBG = 5, |
41 | }; | 41 | }; |
42 | 42 | ||
43 | /* Primary mode (IO register 0x01, [3:0]) */ | ||
44 | enum adv7604_prim_mode { | ||
45 | ADV7604_PRIM_MODE_COMP = 1, | ||
46 | ADV7604_PRIM_MODE_RGB = 2, | ||
47 | ADV7604_PRIM_MODE_HDMI_COMP = 5, | ||
48 | ADV7604_PRIM_MODE_HDMI_GR = 6, | ||
49 | }; | ||
50 | |||
51 | /* Input Color Space (IO register 0x02, [7:4]) */ | 43 | /* Input Color Space (IO register 0x02, [7:4]) */ |
52 | enum adv7604_inp_color_space { | 44 | enum adv7604_inp_color_space { |
53 | ADV7604_INP_COLOR_SPACE_LIM_RGB = 0, | 45 | ADV7604_INP_COLOR_SPACE_LIM_RGB = 0, |
@@ -103,9 +95,6 @@ struct adv7604_platform_data { | |||
103 | /* Bus rotation and reordering */ | 95 | /* Bus rotation and reordering */ |
104 | enum adv7604_op_ch_sel op_ch_sel; | 96 | enum adv7604_op_ch_sel op_ch_sel; |
105 | 97 | ||
106 | /* Primary mode */ | ||
107 | enum adv7604_prim_mode prim_mode; | ||
108 | |||
109 | /* Select output format */ | 98 | /* Select output format */ |
110 | enum adv7604_op_format_sel op_format_sel; | 99 | enum adv7604_op_format_sel op_format_sel; |
111 | 100 | ||
@@ -142,6 +131,16 @@ struct adv7604_platform_data { | |||
142 | u8 i2c_vdp; | 131 | u8 i2c_vdp; |
143 | }; | 132 | }; |
144 | 133 | ||
134 | /* | ||
135 | * Mode of operation. | ||
136 | * This is used as the input argument of the s_routing video op. | ||
137 | */ | ||
138 | enum adv7604_mode { | ||
139 | ADV7604_MODE_COMP, | ||
140 | ADV7604_MODE_GR, | ||
141 | ADV7604_MODE_HDMI, | ||
142 | }; | ||
143 | |||
145 | #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000) | 144 | #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000) |
146 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001) | 145 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001) |
147 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002) | 146 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002) |