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-rw-r--r--include/linux/clk/at91_pmc.h192
-rw-r--r--include/linux/clk/tegra.h7
-rw-r--r--include/linux/cpufreq.h8
-rw-r--r--include/linux/dmaengine.h9
-rw-r--r--include/linux/efi.h4
-rw-r--r--include/linux/ftrace_event.h16
-rw-r--r--include/linux/gpio/driver.h14
-rw-r--r--include/linux/hid-sensor-hub.h3
-rw-r--r--include/linux/irqreturn.h2
-rw-r--r--include/linux/nfs4.h10
-rw-r--r--include/linux/nfs_fs.h18
-rw-r--r--include/linux/padata.h3
-rw-r--r--include/linux/platform_data/clocksource-nomadik-mtu.h9
-rw-r--r--include/linux/platform_data/pinctrl-nomadik.h242
-rw-r--r--include/linux/sched.h2
-rw-r--r--include/linux/slab.h102
-rw-r--r--include/linux/tegra-powergate.h32
-rw-r--r--include/linux/tracepoint.h4
18 files changed, 327 insertions, 350 deletions
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
new file mode 100644
index 000000000000..a6911ebbd02a
--- /dev/null
+++ b/include/linux/clk/at91_pmc.h
@@ -0,0 +1,192 @@
1/*
2 * include/linux/clk/at91_pmc.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Power Management Controller (PMC) - System peripherals registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_PMC_H
17#define AT91_PMC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_pmc_base;
21
22#define at91_pmc_read(field) \
23 __raw_readl(at91_pmc_base + field)
24
25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field)
27#else
28.extern at91_pmc_base
29#endif
30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
32#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
33
34#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */
35#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
36#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
37#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
38#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
39#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
40#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */
41#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
42#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
43#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
44#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
45#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */
46#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
47#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
48
49#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */
50#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */
51#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */
52
53#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */
54#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
55#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
56#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
57#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
58
59#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */
60#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
61#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */
62#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
63#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
64#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */
65#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */
66#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */
67
68#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */
69#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
70#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
71
72#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
73#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
74#define AT91_PMC_DIV (0xff << 0) /* Divider */
75#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
76#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
77#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
78#define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff)
79#define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */
80#define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f)
81#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
82#define AT91_PMC_USBDIV_1 (0 << 28)
83#define AT91_PMC_USBDIV_2 (1 << 28)
84#define AT91_PMC_USBDIV_4 (2 << 28)
85#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
86
87#define AT91_PMC_MCKR 0x30 /* Master Clock Register */
88#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
89#define AT91_PMC_CSS_SLOW (0 << 0)
90#define AT91_PMC_CSS_MAIN (1 << 0)
91#define AT91_PMC_CSS_PLLA (2 << 0)
92#define AT91_PMC_CSS_PLLB (3 << 0)
93#define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */
94#define PMC_PRES_OFFSET 2
95#define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */
96#define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET)
97#define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET)
98#define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET)
99#define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET)
100#define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET)
101#define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET)
102#define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET)
103#define PMC_ALT_PRES_OFFSET 4
104#define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */
105#define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET)
106#define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET)
107#define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET)
108#define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET)
109#define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET)
110#define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET)
111#define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET)
112#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */
113#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */
114#define AT91RM9200_PMC_MDIV_2 (1 << 8)
115#define AT91RM9200_PMC_MDIV_3 (2 << 8)
116#define AT91RM9200_PMC_MDIV_4 (3 << 8)
117#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */
118#define AT91SAM9_PMC_MDIV_2 (1 << 8)
119#define AT91SAM9_PMC_MDIV_4 (2 << 8)
120#define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */
121#define AT91SAM9_PMC_MDIV_3 (3 << 8) /* [some SAM9 only] */
122#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */
123#define AT91_PMC_PDIV_1 (0 << 12)
124#define AT91_PMC_PDIV_2 (1 << 12)
125#define AT91_PMC_PLLADIV2 (1 << 12) /* PLLA divisor by 2 [some SAM9 only] */
126#define AT91_PMC_PLLADIV2_OFF (0 << 12)
127#define AT91_PMC_PLLADIV2_ON (1 << 12)
128
129#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */
130#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
131#define AT91_PMC_USBS_PLLA (0 << 0)
132#define AT91_PMC_USBS_UPLL (1 << 0)
133#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */
134#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
135#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8)
136#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8)
137
138#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
139#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */
140#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */
141#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV)
142
143#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
144#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */
145#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */
146#define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */
147#define AT91_PMC_CSSMCK_CSS (0 << 8)
148#define AT91_PMC_CSSMCK_MCK (1 << 8)
149
150#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */
151#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */
152#define AT91_PMC_SR 0x68 /* Status Register */
153#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
154#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
155#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
156#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
157#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */
158#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
159#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
160#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
161#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
162#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */
163#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
164#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */
165#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */
166
167#define AT91_PMC_PLLICPR 0x80 /* PLL Charge Pump Current Register */
168
169#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
170#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */
171#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */
172#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */
173
174#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */
175#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
176#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
177
178#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/
179#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */
180#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */
181
182#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */
183#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */
184#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
185#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
186#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
187#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
188#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
189#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
190#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
191
192#endif
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 23a0ceee831f..3ca9fca827a2 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -120,13 +120,6 @@ static inline void tegra_cpu_clock_resume(void)
120} 120}
121#endif 121#endif
122 122
123#ifdef CONFIG_ARCH_TEGRA
124void tegra_periph_reset_deassert(struct clk *c);
125void tegra_periph_reset_assert(struct clk *c);
126#else
127static inline void tegra_periph_reset_deassert(struct clk *c) {}
128static inline void tegra_periph_reset_assert(struct clk *c) {}
129#endif
130void tegra_clocks_apply_init_table(void); 123void tegra_clocks_apply_init_table(void);
131 124
132#endif /* __LINUX_CLK_TEGRA_H_ */ 125#endif /* __LINUX_CLK_TEGRA_H_ */
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index dc196bbcf227..ee5fe9d77ae8 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -280,6 +280,14 @@ cpufreq_verify_within_cpu_limits(struct cpufreq_policy *policy)
280 policy->cpuinfo.max_freq); 280 policy->cpuinfo.max_freq);
281} 281}
282 282
283#ifdef CONFIG_CPU_FREQ
284void cpufreq_suspend(void);
285void cpufreq_resume(void);
286#else
287static inline void cpufreq_suspend(void) {}
288static inline void cpufreq_resume(void) {}
289#endif
290
283/********************************************************************* 291/*********************************************************************
284 * CPUFREQ NOTIFIER INTERFACE * 292 * CPUFREQ NOTIFIER INTERFACE *
285 *********************************************************************/ 293 *********************************************************************/
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 41cf0c399288..bae1568416f8 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -22,6 +22,7 @@
22#define LINUX_DMAENGINE_H 22#define LINUX_DMAENGINE_H
23 23
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/err.h>
25#include <linux/uio.h> 26#include <linux/uio.h>
26#include <linux/bug.h> 27#include <linux/bug.h>
27#include <linux/scatterlist.h> 28#include <linux/scatterlist.h>
@@ -1040,6 +1041,8 @@ enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
1040void dma_issue_pending_all(void); 1041void dma_issue_pending_all(void);
1041struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, 1042struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
1042 dma_filter_fn fn, void *fn_param); 1043 dma_filter_fn fn, void *fn_param);
1044struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
1045 const char *name);
1043struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name); 1046struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
1044void dma_release_channel(struct dma_chan *chan); 1047void dma_release_channel(struct dma_chan *chan);
1045#else 1048#else
@@ -1063,6 +1066,11 @@ static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
1063{ 1066{
1064 return NULL; 1067 return NULL;
1065} 1068}
1069static inline struct dma_chan *dma_request_slave_channel_reason(
1070 struct device *dev, const char *name)
1071{
1072 return ERR_PTR(-ENODEV);
1073}
1066static inline struct dma_chan *dma_request_slave_channel(struct device *dev, 1074static inline struct dma_chan *dma_request_slave_channel(struct device *dev,
1067 const char *name) 1075 const char *name)
1068{ 1076{
@@ -1079,6 +1087,7 @@ int dma_async_device_register(struct dma_device *device);
1079void dma_async_device_unregister(struct dma_device *device); 1087void dma_async_device_unregister(struct dma_device *device);
1080void dma_run_dependencies(struct dma_async_tx_descriptor *tx); 1088void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
1081struct dma_chan *dma_get_slave_channel(struct dma_chan *chan); 1089struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
1090struct dma_chan *dma_get_any_slave_channel(struct dma_device *device);
1082struct dma_chan *net_dma_find_channel(void); 1091struct dma_chan *net_dma_find_channel(void);
1083#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y) 1092#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
1084#define dma_request_slave_channel_compat(mask, x, y, dev, name) \ 1093#define dma_request_slave_channel_compat(mask, x, y, dev, name) \
diff --git a/include/linux/efi.h b/include/linux/efi.h
index bc5687d0f315..11ce6784a196 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -801,6 +801,8 @@ struct efivar_entry {
801 struct efi_variable var; 801 struct efi_variable var;
802 struct list_head list; 802 struct list_head list;
803 struct kobject kobj; 803 struct kobject kobj;
804 bool scanning;
805 bool deleting;
804}; 806};
805 807
806 808
@@ -866,6 +868,8 @@ void efivar_run_worker(void);
866#if defined(CONFIG_EFI_VARS) || defined(CONFIG_EFI_VARS_MODULE) 868#if defined(CONFIG_EFI_VARS) || defined(CONFIG_EFI_VARS_MODULE)
867int efivars_sysfs_init(void); 869int efivars_sysfs_init(void);
868 870
871#define EFIVARS_DATA_SIZE_MAX 1024
872
869#endif /* CONFIG_EFI_VARS */ 873#endif /* CONFIG_EFI_VARS */
870 874
871#endif /* _LINUX_EFI_H */ 875#endif /* _LINUX_EFI_H */
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index 9abbe630c456..8c9b7a1c4138 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -248,6 +248,9 @@ struct ftrace_event_call {
248#ifdef CONFIG_PERF_EVENTS 248#ifdef CONFIG_PERF_EVENTS
249 int perf_refcount; 249 int perf_refcount;
250 struct hlist_head __percpu *perf_events; 250 struct hlist_head __percpu *perf_events;
251
252 int (*perf_perm)(struct ftrace_event_call *,
253 struct perf_event *);
251#endif 254#endif
252}; 255};
253 256
@@ -317,6 +320,19 @@ struct ftrace_event_file {
317 } \ 320 } \
318 early_initcall(trace_init_flags_##name); 321 early_initcall(trace_init_flags_##name);
319 322
323#define __TRACE_EVENT_PERF_PERM(name, expr...) \
324 static int perf_perm_##name(struct ftrace_event_call *tp_event, \
325 struct perf_event *p_event) \
326 { \
327 return ({ expr; }); \
328 } \
329 static int __init trace_init_perf_perm_##name(void) \
330 { \
331 event_##name.perf_perm = &perf_perm_##name; \
332 return 0; \
333 } \
334 early_initcall(trace_init_perf_perm_##name);
335
320#define PERF_MAX_TRACE_SIZE 2048 336#define PERF_MAX_TRACE_SIZE 2048
321 337
322#define MAX_FILTER_STR_VAL 256 /* Should handle KSYM_SYMBOL_LEN */ 338#define MAX_FILTER_STR_VAL 256 /* Should handle KSYM_SYMBOL_LEN */
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 656a27efb2c8..3ea2cf6b0e6c 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -2,9 +2,12 @@
2#define __LINUX_GPIO_DRIVER_H 2#define __LINUX_GPIO_DRIVER_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/module.h>
5 6
6struct device; 7struct device;
7struct gpio_desc; 8struct gpio_desc;
9struct of_phandle_args;
10struct device_node;
8struct seq_file; 11struct seq_file;
9 12
10/** 13/**
@@ -125,6 +128,13 @@ extern struct gpio_chip *gpiochip_find(void *data,
125int gpiod_lock_as_irq(struct gpio_desc *desc); 128int gpiod_lock_as_irq(struct gpio_desc *desc);
126void gpiod_unlock_as_irq(struct gpio_desc *desc); 129void gpiod_unlock_as_irq(struct gpio_desc *desc);
127 130
131enum gpio_lookup_flags {
132 GPIO_ACTIVE_HIGH = (0 << 0),
133 GPIO_ACTIVE_LOW = (1 << 0),
134 GPIO_OPEN_DRAIN = (1 << 1),
135 GPIO_OPEN_SOURCE = (1 << 2),
136};
137
128/** 138/**
129 * Lookup table for associating GPIOs to specific devices and functions using 139 * Lookup table for associating GPIOs to specific devices and functions using
130 * platform data. 140 * platform data.
@@ -152,9 +162,9 @@ struct gpiod_lookup {
152 */ 162 */
153 unsigned int idx; 163 unsigned int idx;
154 /* 164 /*
155 * mask of GPIOF_* values 165 * mask of GPIO_* values
156 */ 166 */
157 unsigned long flags; 167 enum gpio_lookup_flags flags;
158}; 168};
159 169
160/* 170/*
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index a265af294ea4..206a2af6b62b 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -21,6 +21,8 @@
21 21
22#include <linux/hid.h> 22#include <linux/hid.h>
23#include <linux/hid-sensor-ids.h> 23#include <linux/hid-sensor-ids.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/trigger.h>
24 26
25/** 27/**
26 * struct hid_sensor_hub_attribute_info - Attribute info 28 * struct hid_sensor_hub_attribute_info - Attribute info
@@ -184,6 +186,7 @@ struct hid_sensor_common {
184 struct platform_device *pdev; 186 struct platform_device *pdev;
185 unsigned usage_id; 187 unsigned usage_id;
186 bool data_ready; 188 bool data_ready;
189 struct iio_trigger *trigger;
187 struct hid_sensor_hub_attribute_info poll; 190 struct hid_sensor_hub_attribute_info poll;
188 struct hid_sensor_hub_attribute_info report_state; 191 struct hid_sensor_hub_attribute_info report_state;
189 struct hid_sensor_hub_attribute_info power_state; 192 struct hid_sensor_hub_attribute_info power_state;
diff --git a/include/linux/irqreturn.h b/include/linux/irqreturn.h
index 714ba08dc092..e374e369fb2f 100644
--- a/include/linux/irqreturn.h
+++ b/include/linux/irqreturn.h
@@ -14,6 +14,6 @@ enum irqreturn {
14}; 14};
15 15
16typedef enum irqreturn irqreturn_t; 16typedef enum irqreturn irqreturn_t;
17#define IRQ_RETVAL(x) ((x) != IRQ_NONE) 17#define IRQ_RETVAL(x) ((x) ? IRQ_HANDLED : IRQ_NONE)
18 18
19#endif 19#endif
diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h
index c1637062c1ce..12c2cb947df5 100644
--- a/include/linux/nfs4.h
+++ b/include/linux/nfs4.h
@@ -413,16 +413,6 @@ enum lock_type4 {
413#define NFS4_VERSION 4 413#define NFS4_VERSION 4
414#define NFS4_MINOR_VERSION 0 414#define NFS4_MINOR_VERSION 0
415 415
416#if defined(CONFIG_NFS_V4_2)
417#define NFS4_MAX_MINOR_VERSION 2
418#else
419#if defined(CONFIG_NFS_V4_1)
420#define NFS4_MAX_MINOR_VERSION 1
421#else
422#define NFS4_MAX_MINOR_VERSION 0
423#endif /* CONFIG_NFS_V4_1 */
424#endif /* CONFIG_NFS_V4_2 */
425
426#define NFS4_DEBUG 1 416#define NFS4_DEBUG 1
427 417
428/* Index of predefined Linux client operations */ 418/* Index of predefined Linux client operations */
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 14a48207a304..48997374eaf0 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -507,24 +507,6 @@ extern int nfs_mountpoint_expiry_timeout;
507extern void nfs_release_automount_timer(void); 507extern void nfs_release_automount_timer(void);
508 508
509/* 509/*
510 * linux/fs/nfs/nfs4proc.c
511 */
512#ifdef CONFIG_NFS_V4_SECURITY_LABEL
513extern struct nfs4_label *nfs4_label_alloc(struct nfs_server *server, gfp_t flags);
514static inline void nfs4_label_free(struct nfs4_label *label)
515{
516 if (label) {
517 kfree(label->label);
518 kfree(label);
519 }
520 return;
521}
522#else
523static inline struct nfs4_label *nfs4_label_alloc(struct nfs_server *server, gfp_t flags) { return NULL; }
524static inline void nfs4_label_free(void *label) {}
525#endif
526
527/*
528 * linux/fs/nfs/unlink.c 510 * linux/fs/nfs/unlink.c
529 */ 511 */
530extern void nfs_complete_unlink(struct dentry *dentry, struct inode *); 512extern void nfs_complete_unlink(struct dentry *dentry, struct inode *);
diff --git a/include/linux/padata.h b/include/linux/padata.h
index 86292beebfe2..438694650471 100644
--- a/include/linux/padata.h
+++ b/include/linux/padata.h
@@ -129,10 +129,9 @@ struct parallel_data {
129 struct padata_serial_queue __percpu *squeue; 129 struct padata_serial_queue __percpu *squeue;
130 atomic_t reorder_objects; 130 atomic_t reorder_objects;
131 atomic_t refcnt; 131 atomic_t refcnt;
132 atomic_t seq_nr;
132 struct padata_cpumask cpumask; 133 struct padata_cpumask cpumask;
133 spinlock_t lock ____cacheline_aligned; 134 spinlock_t lock ____cacheline_aligned;
134 spinlock_t seq_lock;
135 unsigned int seq_nr;
136 unsigned int processed; 135 unsigned int processed;
137 struct timer_list timer; 136 struct timer_list timer;
138}; 137};
diff --git a/include/linux/platform_data/clocksource-nomadik-mtu.h b/include/linux/platform_data/clocksource-nomadik-mtu.h
deleted file mode 100644
index 80088973b734..000000000000
--- a/include/linux/platform_data/clocksource-nomadik-mtu.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __PLAT_MTU_H
2#define __PLAT_MTU_H
3
4void nmdk_timer_init(void __iomem *base, int irq);
5void nmdk_clkevt_reset(void);
6void nmdk_clksrc_reset(void);
7
8#endif /* __PLAT_MTU_H */
9
diff --git a/include/linux/platform_data/pinctrl-nomadik.h b/include/linux/platform_data/pinctrl-nomadik.h
deleted file mode 100644
index abf5bed84df3..000000000000
--- a/include/linux/platform_data/pinctrl-nomadik.h
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_NOMADIK_GPIO
14#define __PLAT_NOMADIK_GPIO
15
16/*
17 * pin configurations are represented by 32-bit integers:
18 *
19 * bit 0.. 8 - Pin Number (512 Pins Maximum)
20 * bit 9..10 - Alternate Function Selection
21 * bit 11..12 - Pull up/down state
22 * bit 13 - Sleep mode behaviour
23 * bit 14 - Direction
24 * bit 15 - Value (if output)
25 * bit 16..18 - SLPM pull up/down state
26 * bit 19..20 - SLPM direction
27 * bit 21..22 - SLPM Value (if output)
28 * bit 23..25 - PDIS value (if input)
29 * bit 26 - Gpio mode
30 * bit 27 - Sleep mode
31 *
32 * to facilitate the definition, the following macros are provided
33 *
34 * PIN_CFG_DEFAULT - default config (0):
35 * pull up/down = disabled
36 * sleep mode = input/wakeup
37 * direction = input
38 * value = low
39 * SLPM direction = same as normal
40 * SLPM pull = same as normal
41 * SLPM value = same as normal
42 *
43 * PIN_CFG - default config with alternate function
44 */
45
46typedef unsigned long pin_cfg_t;
47
48#define PIN_NUM_MASK 0x1ff
49#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
50
51#define PIN_ALT_SHIFT 9
52#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
53#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
54#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
55#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
56#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
57#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
58
59#define PIN_PULL_SHIFT 11
60#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
61#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
62#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
63#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
64#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
65
66#define PIN_SLPM_SHIFT 13
67#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
68#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
69#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
70#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
71/* These two replace the above in DB8500v2+ */
72#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
73#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
74#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
75
76#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
77#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
78
79#define PIN_DIR_SHIFT 14
80#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
81#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
82#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
83#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
84
85#define PIN_VAL_SHIFT 15
86#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
87#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
88#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
89#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
90
91#define PIN_SLPM_PULL_SHIFT 16
92#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
93#define PIN_SLPM_PULL(x) \
94 (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
95#define PIN_SLPM_PULL_NONE \
96 ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
97#define PIN_SLPM_PULL_UP \
98 ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
99#define PIN_SLPM_PULL_DOWN \
100 ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
101
102#define PIN_SLPM_DIR_SHIFT 19
103#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
104#define PIN_SLPM_DIR(x) \
105 (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
106#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
107#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
108
109#define PIN_SLPM_VAL_SHIFT 21
110#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
111#define PIN_SLPM_VAL(x) \
112 (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
113#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
114#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
115
116#define PIN_SLPM_PDIS_SHIFT 23
117#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
118#define PIN_SLPM_PDIS(x) \
119 (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
120#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
121#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
122#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
123
124#define PIN_LOWEMI_SHIFT 25
125#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
126#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
127#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
128#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
129
130#define PIN_GPIOMODE_SHIFT 26
131#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
132#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
133#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
134#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
135
136#define PIN_SLEEPMODE_SHIFT 27
137#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
138#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
139#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
140#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
141
142
143/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
144#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
145#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
146#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
147#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
148#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
149
150#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
151#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
152#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
153#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
154#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
155
156#define PIN_CFG_DEFAULT (0)
157
158#define PIN_CFG(num, alt) \
159 (PIN_CFG_DEFAULT |\
160 (PIN_NUM(num) | PIN_##alt))
161
162#define PIN_CFG_INPUT(num, alt, pull) \
163 (PIN_CFG_DEFAULT |\
164 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
165
166#define PIN_CFG_OUTPUT(num, alt, val) \
167 (PIN_CFG_DEFAULT |\
168 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
169
170/*
171 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
172 * the "gpio" namespace for generic and cross-machine functions
173 */
174
175#define GPIO_BLOCK_SHIFT 5
176#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
177
178/* Register in the logic block */
179#define NMK_GPIO_DAT 0x00
180#define NMK_GPIO_DATS 0x04
181#define NMK_GPIO_DATC 0x08
182#define NMK_GPIO_PDIS 0x0c
183#define NMK_GPIO_DIR 0x10
184#define NMK_GPIO_DIRS 0x14
185#define NMK_GPIO_DIRC 0x18
186#define NMK_GPIO_SLPC 0x1c
187#define NMK_GPIO_AFSLA 0x20
188#define NMK_GPIO_AFSLB 0x24
189#define NMK_GPIO_LOWEMI 0x28
190
191#define NMK_GPIO_RIMSC 0x40
192#define NMK_GPIO_FIMSC 0x44
193#define NMK_GPIO_IS 0x48
194#define NMK_GPIO_IC 0x4c
195#define NMK_GPIO_RWIMSC 0x50
196#define NMK_GPIO_FWIMSC 0x54
197#define NMK_GPIO_WKS 0x58
198/* These appear in DB8540 and later ASICs */
199#define NMK_GPIO_EDGELEVEL 0x5C
200#define NMK_GPIO_LEVEL 0x60
201
202/* Alternate functions: function C is set in hw by setting both A and B */
203#define NMK_GPIO_ALT_GPIO 0
204#define NMK_GPIO_ALT_A 1
205#define NMK_GPIO_ALT_B 2
206#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
207
208#define NMK_GPIO_ALT_CX_SHIFT 2
209#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
210#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
211#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
212#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
213
214/* Pull up/down values */
215enum nmk_gpio_pull {
216 NMK_GPIO_PULL_NONE,
217 NMK_GPIO_PULL_UP,
218 NMK_GPIO_PULL_DOWN,
219};
220
221/* Sleep mode */
222enum nmk_gpio_slpm {
223 NMK_GPIO_SLPM_INPUT,
224 NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
225 NMK_GPIO_SLPM_NOCHANGE,
226 NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
227};
228
229/*
230 * Platform data to register a block: only the initial gpio/irq number.
231 */
232struct nmk_gpio_platform_data {
233 char *name;
234 int first_gpio;
235 int first_irq;
236 int num_gpio;
237 u32 (*get_secondary_status)(unsigned int bank);
238 void (*set_ioforce)(bool enable);
239 bool supports_sleepmode;
240};
241
242#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 7e35d4b9e14a..768b037dfacb 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -831,8 +831,6 @@ struct sched_domain {
831 unsigned int balance_interval; /* initialise to 1. units in ms. */ 831 unsigned int balance_interval; /* initialise to 1. units in ms. */
832 unsigned int nr_balance_failed; /* initialise to 0 */ 832 unsigned int nr_balance_failed; /* initialise to 0 */
833 833
834 u64 last_update;
835
836 /* idle_balance() stats */ 834 /* idle_balance() stats */
837 u64 max_newidle_lb_cost; 835 u64 max_newidle_lb_cost;
838 unsigned long next_decay_max_lb_cost; 836 unsigned long next_decay_max_lb_cost;
diff --git a/include/linux/slab.h b/include/linux/slab.h
index c2bba248fa63..1e2f4fe12773 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -388,10 +388,55 @@ static __always_inline void *kmalloc_large(size_t size, gfp_t flags)
388/** 388/**
389 * kmalloc - allocate memory 389 * kmalloc - allocate memory
390 * @size: how many bytes of memory are required. 390 * @size: how many bytes of memory are required.
391 * @flags: the type of memory to allocate (see kcalloc). 391 * @flags: the type of memory to allocate.
392 * 392 *
393 * kmalloc is the normal method of allocating memory 393 * kmalloc is the normal method of allocating memory
394 * for objects smaller than page size in the kernel. 394 * for objects smaller than page size in the kernel.
395 *
396 * The @flags argument may be one of:
397 *
398 * %GFP_USER - Allocate memory on behalf of user. May sleep.
399 *
400 * %GFP_KERNEL - Allocate normal kernel ram. May sleep.
401 *
402 * %GFP_ATOMIC - Allocation will not sleep. May use emergency pools.
403 * For example, use this inside interrupt handlers.
404 *
405 * %GFP_HIGHUSER - Allocate pages from high memory.
406 *
407 * %GFP_NOIO - Do not do any I/O at all while trying to get memory.
408 *
409 * %GFP_NOFS - Do not make any fs calls while trying to get memory.
410 *
411 * %GFP_NOWAIT - Allocation will not sleep.
412 *
413 * %GFP_THISNODE - Allocate node-local memory only.
414 *
415 * %GFP_DMA - Allocation suitable for DMA.
416 * Should only be used for kmalloc() caches. Otherwise, use a
417 * slab created with SLAB_DMA.
418 *
419 * Also it is possible to set different flags by OR'ing
420 * in one or more of the following additional @flags:
421 *
422 * %__GFP_COLD - Request cache-cold pages instead of
423 * trying to return cache-warm pages.
424 *
425 * %__GFP_HIGH - This allocation has high priority and may use emergency pools.
426 *
427 * %__GFP_NOFAIL - Indicate that this allocation is in no way allowed to fail
428 * (think twice before using).
429 *
430 * %__GFP_NORETRY - If memory is not immediately available,
431 * then give up at once.
432 *
433 * %__GFP_NOWARN - If allocation fails, don't issue any warnings.
434 *
435 * %__GFP_REPEAT - If allocation fails initially, try once more before failing.
436 *
437 * There are other flags available as well, but these are not intended
438 * for general use, and so are not documented here. For a full list of
439 * potential flags, always refer to linux/gfp.h.
395 */ 440 */
396static __always_inline void *kmalloc(size_t size, gfp_t flags) 441static __always_inline void *kmalloc(size_t size, gfp_t flags)
397{ 442{
@@ -502,61 +547,6 @@ int cache_show(struct kmem_cache *s, struct seq_file *m);
502void print_slabinfo_header(struct seq_file *m); 547void print_slabinfo_header(struct seq_file *m);
503 548
504/** 549/**
505 * kmalloc - allocate memory
506 * @size: how many bytes of memory are required.
507 * @flags: the type of memory to allocate.
508 *
509 * The @flags argument may be one of:
510 *
511 * %GFP_USER - Allocate memory on behalf of user. May sleep.
512 *
513 * %GFP_KERNEL - Allocate normal kernel ram. May sleep.
514 *
515 * %GFP_ATOMIC - Allocation will not sleep. May use emergency pools.
516 * For example, use this inside interrupt handlers.
517 *
518 * %GFP_HIGHUSER - Allocate pages from high memory.
519 *
520 * %GFP_NOIO - Do not do any I/O at all while trying to get memory.
521 *
522 * %GFP_NOFS - Do not make any fs calls while trying to get memory.
523 *
524 * %GFP_NOWAIT - Allocation will not sleep.
525 *
526 * %GFP_THISNODE - Allocate node-local memory only.
527 *
528 * %GFP_DMA - Allocation suitable for DMA.
529 * Should only be used for kmalloc() caches. Otherwise, use a
530 * slab created with SLAB_DMA.
531 *
532 * Also it is possible to set different flags by OR'ing
533 * in one or more of the following additional @flags:
534 *
535 * %__GFP_COLD - Request cache-cold pages instead of
536 * trying to return cache-warm pages.
537 *
538 * %__GFP_HIGH - This allocation has high priority and may use emergency pools.
539 *
540 * %__GFP_NOFAIL - Indicate that this allocation is in no way allowed to fail
541 * (think twice before using).
542 *
543 * %__GFP_NORETRY - If memory is not immediately available,
544 * then give up at once.
545 *
546 * %__GFP_NOWARN - If allocation fails, don't issue any warnings.
547 *
548 * %__GFP_REPEAT - If allocation fails initially, try once more before failing.
549 *
550 * There are other flags available as well, but these are not intended
551 * for general use, and so are not documented here. For a full list of
552 * potential flags, always refer to linux/gfp.h.
553 *
554 * kmalloc is the normal method of allocating memory
555 * in the kernel.
556 */
557static __always_inline void *kmalloc(size_t size, gfp_t flags);
558
559/**
560 * kmalloc_array - allocate memory for an array. 550 * kmalloc_array - allocate memory for an array.
561 * @n: number of elements. 551 * @n: number of elements.
562 * @size: element size. 552 * @size: element size.
diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h
index c98cfa406952..afe442d2629a 100644
--- a/include/linux/tegra-powergate.h
+++ b/include/linux/tegra-powergate.h
@@ -19,6 +19,7 @@
19#define _MACH_TEGRA_POWERGATE_H_ 19#define _MACH_TEGRA_POWERGATE_H_
20 20
21struct clk; 21struct clk;
22struct reset_control;
22 23
23#define TEGRA_POWERGATE_CPU 0 24#define TEGRA_POWERGATE_CPU 0
24#define TEGRA_POWERGATE_3D 1 25#define TEGRA_POWERGATE_3D 1
@@ -45,12 +46,41 @@ struct clk;
45 46
46#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D 47#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D
47 48
49#ifdef CONFIG_ARCH_TEGRA
48int tegra_powergate_is_powered(int id); 50int tegra_powergate_is_powered(int id);
49int tegra_powergate_power_on(int id); 51int tegra_powergate_power_on(int id);
50int tegra_powergate_power_off(int id); 52int tegra_powergate_power_off(int id);
51int tegra_powergate_remove_clamping(int id); 53int tegra_powergate_remove_clamping(int id);
52 54
53/* Must be called with clk disabled, and returns with clk enabled */ 55/* Must be called with clk disabled, and returns with clk enabled */
54int tegra_powergate_sequence_power_up(int id, struct clk *clk); 56int tegra_powergate_sequence_power_up(int id, struct clk *clk,
57 struct reset_control *rst);
58#else
59static inline int tegra_powergate_is_powered(int id)
60{
61 return -ENOSYS;
62}
63
64static inline int tegra_powergate_power_on(int id)
65{
66 return -ENOSYS;
67}
68
69static inline int tegra_powergate_power_off(int id)
70{
71 return -ENOSYS;
72}
73
74static inline int tegra_powergate_remove_clamping(int id)
75{
76 return -ENOSYS;
77}
78
79static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
80 struct reset_control *rst);
81{
82 return -ENOSYS;
83}
84#endif
55 85
56#endif /* _MACH_TEGRA_POWERGATE_H_ */ 86#endif /* _MACH_TEGRA_POWERGATE_H_ */
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
index ebeab360d851..f16dc0a40049 100644
--- a/include/linux/tracepoint.h
+++ b/include/linux/tracepoint.h
@@ -267,6 +267,8 @@ static inline void tracepoint_synchronize_unregister(void)
267 267
268#define TRACE_EVENT_FLAGS(event, flag) 268#define TRACE_EVENT_FLAGS(event, flag)
269 269
270#define TRACE_EVENT_PERF_PERM(event, expr...)
271
270#endif /* DECLARE_TRACE */ 272#endif /* DECLARE_TRACE */
271 273
272#ifndef TRACE_EVENT 274#ifndef TRACE_EVENT
@@ -399,4 +401,6 @@ static inline void tracepoint_synchronize_unregister(void)
399 401
400#define TRACE_EVENT_FLAGS(event, flag) 402#define TRACE_EVENT_FLAGS(event, flag)
401 403
404#define TRACE_EVENT_PERF_PERM(event, expr...)
405
402#endif /* ifdef TRACE_EVENT (see note above) */ 406#endif /* ifdef TRACE_EVENT (see note above) */
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-31 13:58:16 -0400