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-rw-r--r--include/linux/clk-provider.h16
-rw-r--r--include/linux/dma/ipu-dma.h177
-rw-r--r--include/linux/irqchip/versatile-fpga.h13
-rw-r--r--include/linux/mfd/db8500-prcmu.h4
-rw-r--r--include/linux/mfd/dbx500-prcmu.h10
-rw-r--r--include/linux/mm.h4
-rw-r--r--include/linux/mmzone.h2
-rw-r--r--include/linux/platform_data/asoc-imx-ssi.h2
-rw-r--r--include/linux/platform_data/dma-imx.h4
-rw-r--r--include/linux/platform_data/omap_ocp2scp.h31
-rw-r--r--include/linux/platform_data/uio_pruss.h3
-rw-r--r--include/linux/rio.h2
-rw-r--r--include/linux/sh_clk.h9
-rw-r--r--include/linux/tegra-ahb.h19
-rw-r--r--include/linux/vexpress.h121
15 files changed, 402 insertions, 15 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index c12731582920..172d5bdaf03d 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -53,9 +53,13 @@ struct clk_hw;
53 * @disable: Disable the clock atomically. Called with enable_lock held. 53 * @disable: Disable the clock atomically. Called with enable_lock held.
54 * This function must not sleep. 54 * This function must not sleep.
55 * 55 *
56 * @recalc_rate Recalculate the rate of this clock, by quering hardware. The 56 * @is_enabled: Queries the hardware to determine if the clock is enabled.
57 * This function must not sleep. Optional, if this op is not
58 * set then the enable count will be used.
59 *
60 * @recalc_rate Recalculate the rate of this clock, by querying hardware. The
57 * parent rate is an input parameter. It is up to the caller to 61 * parent rate is an input parameter. It is up to the caller to
58 * insure that the prepare_mutex is held across this call. 62 * ensure that the prepare_mutex is held across this call.
59 * Returns the calculated rate. Optional, but recommended - if 63 * Returns the calculated rate. Optional, but recommended - if
60 * this op is not set then clock rate will be initialized to 0. 64 * this op is not set then clock rate will be initialized to 0.
61 * 65 *
@@ -89,7 +93,7 @@ struct clk_hw;
89 * implementations to split any work between atomic (enable) and sleepable 93 * implementations to split any work between atomic (enable) and sleepable
90 * (prepare) contexts. If enabling a clock requires code that might sleep, 94 * (prepare) contexts. If enabling a clock requires code that might sleep,
91 * this must be done in clk_prepare. Clock enable code that will never be 95 * this must be done in clk_prepare. Clock enable code that will never be
92 * called in a sleepable context may be implement in clk_enable. 96 * called in a sleepable context may be implemented in clk_enable.
93 * 97 *
94 * Typically, drivers will call clk_prepare when a clock may be needed later 98 * Typically, drivers will call clk_prepare when a clock may be needed later
95 * (eg. when a device is opened), and clk_enable when the clock is actually 99 * (eg. when a device is opened), and clk_enable when the clock is actually
@@ -335,11 +339,11 @@ const char *__clk_get_name(struct clk *clk);
335struct clk_hw *__clk_get_hw(struct clk *clk); 339struct clk_hw *__clk_get_hw(struct clk *clk);
336u8 __clk_get_num_parents(struct clk *clk); 340u8 __clk_get_num_parents(struct clk *clk);
337struct clk *__clk_get_parent(struct clk *clk); 341struct clk *__clk_get_parent(struct clk *clk);
338inline int __clk_get_enable_count(struct clk *clk); 342unsigned int __clk_get_enable_count(struct clk *clk);
339inline int __clk_get_prepare_count(struct clk *clk); 343unsigned int __clk_get_prepare_count(struct clk *clk);
340unsigned long __clk_get_rate(struct clk *clk); 344unsigned long __clk_get_rate(struct clk *clk);
341unsigned long __clk_get_flags(struct clk *clk); 345unsigned long __clk_get_flags(struct clk *clk);
342int __clk_is_enabled(struct clk *clk); 346bool __clk_is_enabled(struct clk *clk);
343struct clk *__clk_lookup(const char *name); 347struct clk *__clk_lookup(const char *name);
344 348
345/* 349/*
diff --git a/include/linux/dma/ipu-dma.h b/include/linux/dma/ipu-dma.h
new file mode 100644
index 000000000000..18031115c668
--- /dev/null
+++ b/include/linux/dma/ipu-dma.h
@@ -0,0 +1,177 @@
1/*
2 * Copyright (C) 2008
3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
4 *
5 * Copyright (C) 2005-2007 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __LINUX_DMA_IPU_DMA_H
13#define __LINUX_DMA_IPU_DMA_H
14
15#include <linux/types.h>
16#include <linux/dmaengine.h>
17
18/* IPU DMA Controller channel definitions. */
19enum ipu_channel {
20 IDMAC_IC_0 = 0, /* IC (encoding task) to memory */
21 IDMAC_IC_1 = 1, /* IC (viewfinder task) to memory */
22 IDMAC_ADC_0 = 1,
23 IDMAC_IC_2 = 2,
24 IDMAC_ADC_1 = 2,
25 IDMAC_IC_3 = 3,
26 IDMAC_IC_4 = 4,
27 IDMAC_IC_5 = 5,
28 IDMAC_IC_6 = 6,
29 IDMAC_IC_7 = 7, /* IC (sensor data) to memory */
30 IDMAC_IC_8 = 8,
31 IDMAC_IC_9 = 9,
32 IDMAC_IC_10 = 10,
33 IDMAC_IC_11 = 11,
34 IDMAC_IC_12 = 12,
35 IDMAC_IC_13 = 13,
36 IDMAC_SDC_0 = 14, /* Background synchronous display data */
37 IDMAC_SDC_1 = 15, /* Foreground data (overlay) */
38 IDMAC_SDC_2 = 16,
39 IDMAC_SDC_3 = 17,
40 IDMAC_ADC_2 = 18,
41 IDMAC_ADC_3 = 19,
42 IDMAC_ADC_4 = 20,
43 IDMAC_ADC_5 = 21,
44 IDMAC_ADC_6 = 22,
45 IDMAC_ADC_7 = 23,
46 IDMAC_PF_0 = 24,
47 IDMAC_PF_1 = 25,
48 IDMAC_PF_2 = 26,
49 IDMAC_PF_3 = 27,
50 IDMAC_PF_4 = 28,
51 IDMAC_PF_5 = 29,
52 IDMAC_PF_6 = 30,
53 IDMAC_PF_7 = 31,
54};
55
56/* Order significant! */
57enum ipu_channel_status {
58 IPU_CHANNEL_FREE,
59 IPU_CHANNEL_INITIALIZED,
60 IPU_CHANNEL_READY,
61 IPU_CHANNEL_ENABLED,
62};
63
64#define IPU_CHANNELS_NUM 32
65
66enum pixel_fmt {
67 /* 1 byte */
68 IPU_PIX_FMT_GENERIC,
69 IPU_PIX_FMT_RGB332,
70 IPU_PIX_FMT_YUV420P,
71 IPU_PIX_FMT_YUV422P,
72 IPU_PIX_FMT_YUV420P2,
73 IPU_PIX_FMT_YVU422P,
74 /* 2 bytes */
75 IPU_PIX_FMT_RGB565,
76 IPU_PIX_FMT_RGB666,
77 IPU_PIX_FMT_BGR666,
78 IPU_PIX_FMT_YUYV,
79 IPU_PIX_FMT_UYVY,
80 /* 3 bytes */
81 IPU_PIX_FMT_RGB24,
82 IPU_PIX_FMT_BGR24,
83 /* 4 bytes */
84 IPU_PIX_FMT_GENERIC_32,
85 IPU_PIX_FMT_RGB32,
86 IPU_PIX_FMT_BGR32,
87 IPU_PIX_FMT_ABGR32,
88 IPU_PIX_FMT_BGRA32,
89 IPU_PIX_FMT_RGBA32,
90};
91
92enum ipu_color_space {
93 IPU_COLORSPACE_RGB,
94 IPU_COLORSPACE_YCBCR,
95 IPU_COLORSPACE_YUV
96};
97
98/*
99 * Enumeration of IPU rotation modes
100 */
101enum ipu_rotate_mode {
102 /* Note the enum values correspond to BAM value */
103 IPU_ROTATE_NONE = 0,
104 IPU_ROTATE_VERT_FLIP = 1,
105 IPU_ROTATE_HORIZ_FLIP = 2,
106 IPU_ROTATE_180 = 3,
107 IPU_ROTATE_90_RIGHT = 4,
108 IPU_ROTATE_90_RIGHT_VFLIP = 5,
109 IPU_ROTATE_90_RIGHT_HFLIP = 6,
110 IPU_ROTATE_90_LEFT = 7,
111};
112
113/*
114 * Enumeration of DI ports for ADC.
115 */
116enum display_port {
117 DISP0,
118 DISP1,
119 DISP2,
120 DISP3
121};
122
123struct idmac_video_param {
124 unsigned short in_width;
125 unsigned short in_height;
126 uint32_t in_pixel_fmt;
127 unsigned short out_width;
128 unsigned short out_height;
129 uint32_t out_pixel_fmt;
130 unsigned short out_stride;
131 bool graphics_combine_en;
132 bool global_alpha_en;
133 bool key_color_en;
134 enum display_port disp;
135 unsigned short out_left;
136 unsigned short out_top;
137};
138
139/*
140 * Union of initialization parameters for a logical channel. So far only video
141 * parameters are used.
142 */
143union ipu_channel_param {
144 struct idmac_video_param video;
145};
146
147struct idmac_tx_desc {
148 struct dma_async_tx_descriptor txd;
149 struct scatterlist *sg; /* scatterlist for this */
150 unsigned int sg_len; /* tx-descriptor. */
151 struct list_head list;
152};
153
154struct idmac_channel {
155 struct dma_chan dma_chan;
156 dma_cookie_t completed; /* last completed cookie */
157 union ipu_channel_param params;
158 enum ipu_channel link; /* input channel, linked to the output */
159 enum ipu_channel_status status;
160 void *client; /* Only one client per channel */
161 unsigned int n_tx_desc;
162 struct idmac_tx_desc *desc; /* allocated tx-descriptors */
163 struct scatterlist *sg[2]; /* scatterlist elements in buffer-0 and -1 */
164 struct list_head free_list; /* free tx-descriptors */
165 struct list_head queue; /* queued tx-descriptors */
166 spinlock_t lock; /* protects sg[0,1], queue */
167 struct mutex chan_mutex; /* protects status, cookie, free_list */
168 bool sec_chan_en;
169 int active_buffer;
170 unsigned int eof_irq;
171 char eof_name[16]; /* EOF IRQ name for request_irq() */
172};
173
174#define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd)
175#define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan)
176
177#endif /* __LINUX_DMA_IPU_DMA_H */
diff --git a/include/linux/irqchip/versatile-fpga.h b/include/linux/irqchip/versatile-fpga.h
new file mode 100644
index 000000000000..1fac9651d3ca
--- /dev/null
+++ b/include/linux/irqchip/versatile-fpga.h
@@ -0,0 +1,13 @@
1#ifndef PLAT_FPGA_IRQ_H
2#define PLAT_FPGA_IRQ_H
3
4struct device_node;
5struct pt_regs;
6
7void fpga_handle_irq(struct pt_regs *regs);
8void fpga_irq_init(void __iomem *, const char *, int, int, u32,
9 struct device_node *node);
10int fpga_irq_of_init(struct device_node *node,
11 struct device_node *parent);
12
13#endif
diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h
index b82f6ee66a0b..6ee4247df11e 100644
--- a/include/linux/mfd/db8500-prcmu.h
+++ b/include/linux/mfd/db8500-prcmu.h
@@ -515,7 +515,6 @@ enum romcode_read prcmu_get_rc_p2a(void);
515enum ap_pwrst prcmu_get_xp70_current_state(void); 515enum ap_pwrst prcmu_get_xp70_current_state(void);
516bool prcmu_has_arm_maxopp(void); 516bool prcmu_has_arm_maxopp(void);
517struct prcmu_fw_version *prcmu_get_fw_version(void); 517struct prcmu_fw_version *prcmu_get_fw_version(void);
518int prcmu_request_ape_opp_100_voltage(bool enable);
519int prcmu_release_usb_wakeup_state(void); 518int prcmu_release_usb_wakeup_state(void);
520void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep, 519void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep,
521 struct prcmu_auto_pm_config *idle); 520 struct prcmu_auto_pm_config *idle);
@@ -564,6 +563,7 @@ int db8500_prcmu_set_arm_opp(u8 opp);
564int db8500_prcmu_get_arm_opp(void); 563int db8500_prcmu_get_arm_opp(void);
565int db8500_prcmu_set_ape_opp(u8 opp); 564int db8500_prcmu_set_ape_opp(u8 opp);
566int db8500_prcmu_get_ape_opp(void); 565int db8500_prcmu_get_ape_opp(void);
566int db8500_prcmu_request_ape_opp_100_voltage(bool enable);
567int db8500_prcmu_set_ddr_opp(u8 opp); 567int db8500_prcmu_set_ddr_opp(u8 opp);
568int db8500_prcmu_get_ddr_opp(void); 568int db8500_prcmu_get_ddr_opp(void);
569 569
@@ -610,7 +610,7 @@ static inline int db8500_prcmu_get_ape_opp(void)
610 return APE_100_OPP; 610 return APE_100_OPP;
611} 611}
612 612
613static inline int prcmu_request_ape_opp_100_voltage(bool enable) 613static inline int db8500_prcmu_request_ape_opp_100_voltage(bool enable)
614{ 614{
615 return 0; 615 return 0;
616} 616}
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index c410d99bd667..c202d6c4d879 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -336,6 +336,11 @@ static inline int prcmu_get_ape_opp(void)
336 return db8500_prcmu_get_ape_opp(); 336 return db8500_prcmu_get_ape_opp();
337} 337}
338 338
339static inline int prcmu_request_ape_opp_100_voltage(bool enable)
340{
341 return db8500_prcmu_request_ape_opp_100_voltage(enable);
342}
343
339static inline void prcmu_system_reset(u16 reset_code) 344static inline void prcmu_system_reset(u16 reset_code)
340{ 345{
341 return db8500_prcmu_system_reset(reset_code); 346 return db8500_prcmu_system_reset(reset_code);
@@ -507,6 +512,11 @@ static inline int prcmu_get_ape_opp(void)
507 return APE_100_OPP; 512 return APE_100_OPP;
508} 513}
509 514
515static inline int prcmu_request_ape_opp_100_voltage(bool enable)
516{
517 return 0;
518}
519
510static inline int prcmu_set_arm_opp(u8 opp) 520static inline int prcmu_set_arm_opp(u8 opp)
511{ 521{
512 return 0; 522 return 0;
diff --git a/include/linux/mm.h b/include/linux/mm.h
index fa0680402738..bcaab4e6fe91 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1684,9 +1684,5 @@ static inline unsigned int debug_guardpage_minorder(void) { return 0; }
1684static inline bool page_is_guard(struct page *page) { return false; } 1684static inline bool page_is_guard(struct page *page) { return false; }
1685#endif /* CONFIG_DEBUG_PAGEALLOC */ 1685#endif /* CONFIG_DEBUG_PAGEALLOC */
1686 1686
1687extern void reset_zone_present_pages(void);
1688extern void fixup_zone_present_pages(int nid, unsigned long start_pfn,
1689 unsigned long end_pfn);
1690
1691#endif /* __KERNEL__ */ 1687#endif /* __KERNEL__ */
1692#endif /* _LINUX_MM_H */ 1688#endif /* _LINUX_MM_H */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 50aaca81f63d..a23923ba8263 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -752,7 +752,7 @@ extern int init_currently_empty_zone(struct zone *zone, unsigned long start_pfn,
752 unsigned long size, 752 unsigned long size,
753 enum memmap_context context); 753 enum memmap_context context);
754 754
755extern void lruvec_init(struct lruvec *lruvec, struct zone *zone); 755extern void lruvec_init(struct lruvec *lruvec);
756 756
757static inline struct zone *lruvec_zone(struct lruvec *lruvec) 757static inline struct zone *lruvec_zone(struct lruvec *lruvec)
758{ 758{
diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h
index 63f3c2804239..92c7fd72f636 100644
--- a/include/linux/platform_data/asoc-imx-ssi.h
+++ b/include/linux/platform_data/asoc-imx-ssi.h
@@ -17,5 +17,7 @@ struct imx_ssi_platform_data {
17 void (*ac97_warm_reset)(struct snd_ac97 *ac97); 17 void (*ac97_warm_reset)(struct snd_ac97 *ac97);
18}; 18};
19 19
20extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
21
20#endif /* __MACH_SSI_H */ 22#endif /* __MACH_SSI_H */
21 23
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 1b9080385b46..f6d30cc1cb77 100644
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
61static inline int imx_dma_is_general_purpose(struct dma_chan *chan) 61static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
62{ 62{
63 return strstr(dev_name(chan->device->dev), "sdma") || 63 return strstr(dev_name(chan->device->dev), "sdma") ||
64 !strcmp(dev_name(chan->device->dev), "imx-dma"); 64 !strcmp(dev_name(chan->device->dev), "imx1-dma") ||
65 !strcmp(dev_name(chan->device->dev), "imx21-dma") ||
66 !strcmp(dev_name(chan->device->dev), "imx27-dma");
65} 67}
66 68
67#endif 69#endif
diff --git a/include/linux/platform_data/omap_ocp2scp.h b/include/linux/platform_data/omap_ocp2scp.h
new file mode 100644
index 000000000000..5c6c3939355f
--- /dev/null
+++ b/include/linux/platform_data/omap_ocp2scp.h
@@ -0,0 +1,31 @@
1/*
2 * omap_ocp2scp.h -- ocp2scp header file
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * Author: Kishon Vijay Abraham I <kishon@ti.com>
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __DRIVERS_OMAP_OCP2SCP_H
20#define __DRIVERS_OMAP_OCP2SCP_H
21
22struct omap_ocp2scp_dev {
23 const char *drv_name;
24 struct resource *res;
25};
26
27struct omap_ocp2scp_platform_data {
28 int dev_cnt;
29 struct omap_ocp2scp_dev **devices;
30};
31#endif /* __DRIVERS_OMAP_OCP2SCP_H */
diff --git a/include/linux/platform_data/uio_pruss.h b/include/linux/platform_data/uio_pruss.h
index f39140aabc6f..3d47d219827f 100644
--- a/include/linux/platform_data/uio_pruss.h
+++ b/include/linux/platform_data/uio_pruss.h
@@ -20,6 +20,7 @@
20 20
21/* To configure the PRUSS INTC base offset for UIO driver */ 21/* To configure the PRUSS INTC base offset for UIO driver */
22struct uio_pruss_pdata { 22struct uio_pruss_pdata {
23 u32 pintc_base; 23 u32 pintc_base;
24 struct gen_pool *sram_pool;
24}; 25};
25#endif /* _UIO_PRUSS_H_ */ 26#endif /* _UIO_PRUSS_H_ */
diff --git a/include/linux/rio.h b/include/linux/rio.h
index 4187da511006..a3e784278667 100644
--- a/include/linux/rio.h
+++ b/include/linux/rio.h
@@ -275,9 +275,11 @@ struct rio_id_table {
275 * struct rio_net - RIO network info 275 * struct rio_net - RIO network info
276 * @node: Node in global list of RIO networks 276 * @node: Node in global list of RIO networks
277 * @devices: List of devices in this network 277 * @devices: List of devices in this network
278 * @switches: List of switches in this netowrk
278 * @mports: List of master ports accessing this network 279 * @mports: List of master ports accessing this network
279 * @hport: Default port for accessing this network 280 * @hport: Default port for accessing this network
280 * @id: RIO network ID 281 * @id: RIO network ID
282 * @destid_table: destID allocation table
281 */ 283 */
282struct rio_net { 284struct rio_net {
283 struct list_head node; /* node in list of networks */ 285 struct list_head node; /* node in list of networks */
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 50910913b268..60c72395ec6b 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -199,4 +199,13 @@ int sh_clk_div6_reparent_register(struct clk *clks, int nr);
199#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } 199#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
200#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } 200#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
201 201
202/* .enable_reg will be updated to .mapping on sh_clk_fsidiv_register() */
203#define SH_CLK_FSIDIV(_reg, _parent) \
204{ \
205 .enable_reg = (void __iomem *)_reg, \
206 .parent = _parent, \
207}
208
209int sh_clk_fsidiv_register(struct clk *clks, int nr);
210
202#endif /* __SH_CLOCK_H */ 211#endif /* __SH_CLOCK_H */
diff --git a/include/linux/tegra-ahb.h b/include/linux/tegra-ahb.h
new file mode 100644
index 000000000000..f1cd075ceee1
--- /dev/null
+++ b/include/linux/tegra-ahb.h
@@ -0,0 +1,19 @@
1/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#ifndef __LINUX_AHB_H__
15#define __LINUX_AHB_H__
16
17extern int tegra_ahb_enable_smmu(struct device_node *ahb);
18
19#endif /* __LINUX_AHB_H__ */
diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h
new file mode 100644
index 000000000000..c52215ff4245
--- /dev/null
+++ b/include/linux/vexpress.h
@@ -0,0 +1,121 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * Copyright (C) 2012 ARM Limited
12 */
13
14#ifndef _LINUX_VEXPRESS_H
15#define _LINUX_VEXPRESS_H
16
17#include <linux/device.h>
18
19#define VEXPRESS_SITE_MB 0
20#define VEXPRESS_SITE_DB1 1
21#define VEXPRESS_SITE_DB2 2
22#define VEXPRESS_SITE_MASTER 0xf
23
24#define VEXPRESS_CONFIG_STATUS_DONE 0
25#define VEXPRESS_CONFIG_STATUS_WAIT 1
26
27#define VEXPRESS_GPIO_MMC_CARDIN 0
28#define VEXPRESS_GPIO_MMC_WPROT 1
29#define VEXPRESS_GPIO_FLASH_WPn 2
30
31#define VEXPRESS_RES_FUNC(_site, _func) \
32{ \
33 .start = (_site), \
34 .end = (_func), \
35 .flags = IORESOURCE_BUS, \
36}
37
38/* Config bridge API */
39
40/**
41 * struct vexpress_config_bridge_info - description of the platform
42 * configuration infrastructure bridge.
43 *
44 * @name: Bridge name
45 *
46 * @func_get: Obtains pointer to a configuration function for a given
47 * device or a Device Tree node, to be used with @func_put
48 * and @func_exec. The node pointer should take precedence
49 * over device pointer when both are passed.
50 *
51 * @func_put: Tells the bridge that the function will not be used any
52 * more, so all allocated resources can be released.
53 *
54 * @func_exec: Executes a configuration function read or write operation.
55 * The offset selects a 32 bit word of the value accessed.
56 * Must return VEXPRESS_CONFIG_STATUS_DONE when operation
57 * is finished immediately, VEXPRESS_CONFIG_STATUS_WAIT when
58 * will be completed in some time or negative value in case
59 * of error.
60 */
61struct vexpress_config_bridge_info {
62 const char *name;
63 void *(*func_get)(struct device *dev, struct device_node *node);
64 void (*func_put)(void *func);
65 int (*func_exec)(void *func, int offset, bool write, u32 *data);
66};
67
68struct vexpress_config_bridge;
69
70struct vexpress_config_bridge *vexpress_config_bridge_register(
71 struct device_node *node,
72 struct vexpress_config_bridge_info *info);
73void vexpress_config_bridge_unregister(struct vexpress_config_bridge *bridge);
74
75void vexpress_config_complete(struct vexpress_config_bridge *bridge,
76 int status);
77
78/* Config function API */
79
80struct vexpress_config_func;
81
82struct vexpress_config_func *__vexpress_config_func_get(struct device *dev,
83 struct device_node *node);
84#define vexpress_config_func_get_by_dev(dev) \
85 __vexpress_config_func_get(dev, NULL)
86#define vexpress_config_func_get_by_node(node) \
87 __vexpress_config_func_get(NULL, node)
88void vexpress_config_func_put(struct vexpress_config_func *func);
89
90/* Both may sleep! */
91int vexpress_config_read(struct vexpress_config_func *func, int offset,
92 u32 *data);
93int vexpress_config_write(struct vexpress_config_func *func, int offset,
94 u32 data);
95
96/* Platform control */
97
98u32 vexpress_get_procid(int site);
99u32 vexpress_get_hbi(int site);
100void *vexpress_get_24mhz_clock_base(void);
101void vexpress_flags_set(u32 data);
102
103#define vexpress_get_site_by_node(node) __vexpress_get_site(NULL, node)
104#define vexpress_get_site_by_dev(dev) __vexpress_get_site(dev, NULL)
105unsigned __vexpress_get_site(struct device *dev, struct device_node *node);
106
107void vexpress_sysreg_early_init(void __iomem *base);
108void vexpress_sysreg_of_early_init(void);
109
110void vexpress_power_off(void);
111void vexpress_restart(char str, const char *cmd);
112
113/* Clocks */
114
115struct clk *vexpress_osc_setup(struct device *dev);
116void vexpress_osc_of_setup(struct device_node *node);
117
118void vexpress_clk_init(void __iomem *sp810_base);
119void vexpress_clk_of_init(void);
120
121#endif
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