128 files changed, 2731 insertions, 1710 deletions

diff --git a/include/linux/aio.h b/include/linux/aio.h
index d9c92daa3944..9eb42dbc5582 100644
--- a/include/linux/aio.h
+++ b/include/linux/aio.h
@@ -1,86 +1,23 @@
 #ifndef __LINUX__AIO_H
 #define __LINUX__AIO_H
 
-#include <linux/list.h>
-#include <linux/workqueue.h>
 #include <linux/aio_abi.h>
-#include <linux/uio.h>
-#include <linux/rcupdate.h>
-
-#include <linux/atomic.h>
 
 struct kioctx;
 struct kiocb;
+struct mm_struct;
 
 #define KIOCB_KEY               0
 
-/*
- * We use ki_cancel == KIOCB_CANCELLED to indicate that a kiocb has been either
- * cancelled or completed (this makes a certain amount of sense because
- * successful cancellation - io_cancel() - does deliver the completion to
- * userspace).
- *
- * And since most things don't implement kiocb cancellation and we'd really like
- * kiocb completion to be lockless when possible, we use ki_cancel to
- * synchronize cancellation and completion - we only set it to KIOCB_CANCELLED
- * with xchg() or cmpxchg(), see batch_complete_aio() and kiocb_cancel().
- */
-#define KIOCB_CANCELLED         ((void *) (~0ULL))
-
 typedef int (kiocb_cancel_fn)(struct kiocb *);
 
-struct kiocb {
-        struct file             *ki_filp;
-        struct kioctx           *ki_ctx;        /* NULL for sync ops */
-        kiocb_cancel_fn         *ki_cancel;
-        void                    *private;
-
-        union {
-                void __user             *user;
-                struct task_struct      *tsk;
-        } ki_obj;
-
-        __u64                   ki_user_data;   /* user's data for completion */
-        loff_t                  ki_pos;
-        size_t                  ki_nbytes;      /* copy of iocb->aio_nbytes */
-
-        struct list_head        ki_list;        /* the aio core uses this
-                                                 * for cancellation */
-
-        /*
-         * If the aio_resfd field of the userspace iocb is not zero,
-         * this is the underlying eventfd context to deliver events to.
-         */
-        struct eventfd_ctx      *ki_eventfd;
-};
-
-static inline bool is_sync_kiocb(struct kiocb *kiocb)
-{
-        return kiocb->ki_ctx == NULL;
-}
-
-static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp)
-{
-        *kiocb = (struct kiocb) {
-                        .ki_ctx = NULL,
-                        .ki_filp = filp,
-                        .ki_obj.tsk = current,
-                };
-}
-
 /* prototypes */
 #ifdef CONFIG_AIO
-extern ssize_t wait_on_sync_kiocb(struct kiocb *iocb);
-extern void aio_complete(struct kiocb *iocb, long res, long res2);
-struct mm_struct;
 extern void exit_aio(struct mm_struct *mm);
 extern long do_io_submit(aio_context_t ctx_id, long nr,
                          struct iocb __user *__user *iocbpp, bool compat);
 void kiocb_set_cancel_fn(struct kiocb *req, kiocb_cancel_fn *cancel);
 #else
-static inline ssize_t wait_on_sync_kiocb(struct kiocb *iocb) { return 0; }
-static inline void aio_complete(struct kiocb *iocb, long res, long res2) { }
-struct mm_struct;
 static inline void exit_aio(struct mm_struct *mm) { }
 static inline long do_io_submit(aio_context_t ctx_id, long nr,
                                 struct iocb __user * __user *iocbpp,
@@ -89,11 +26,6 @@ static inline void kiocb_set_cancel_fn(struct kiocb *req,
                                        kiocb_cancel_fn *cancel) { }
 #endif /* CONFIG_AIO */
 
-static inline struct kiocb *list_kiocb(struct list_head *h)
-{
-        return list_entry(h, struct kiocb, ki_list);
-}
-
 /* for sysctl: */
 extern unsigned long aio_nr;
 extern unsigned long aio_max_nr;
diff --git a/include/linux/ata.h b/include/linux/ata.h
index 1648026e06b4..b666b773e111 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -94,6 +94,8 @@ enum {
         ATA_ID_SECTOR_SIZE      = 106,
         ATA_ID_WWN              = 108,
         ATA_ID_LOGICAL_SECTOR_SIZE      = 117,  /* and 118 */
+        ATA_ID_COMMAND_SET_3    = 119,
+        ATA_ID_COMMAND_SET_4    = 120,
         ATA_ID_LAST_LUN         = 126,
         ATA_ID_DLF              = 128,
         ATA_ID_CSFO             = 129,
@@ -177,7 +179,7 @@ enum {
         ATA_DSC                 = (1 << 4),     /* drive seek complete */
         ATA_DRQ                 = (1 << 3),     /* data request i/o */
         ATA_CORR                = (1 << 2),     /* corrected data error */
-        ATA_IDX                 = (1 << 1),     /* index */
+        ATA_SENSE               = (1 << 1),     /* sense code available */
         ATA_ERR                 = (1 << 0),     /* have an error */
         ATA_SRST                = (1 << 2),     /* software reset */
         ATA_ICRC                = (1 << 7),     /* interface CRC error */
@@ -382,6 +384,8 @@ enum {
         SATA_SSP                = 0x06, /* Software Settings Preservation */
         SATA_DEVSLP             = 0x09, /* Device Sleep */
 
+        SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
+
         /* feature values for SET_MAX */
         ATA_SET_MAX_ADDR        = 0x00,
         ATA_SET_MAX_PASSWD      = 0x01,
@@ -525,6 +529,8 @@ struct ata_bmdma_prd {
 #define ata_id_cdb_intr(id)     (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
 #define ata_id_has_da(id)       ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
 #define ata_id_has_devslp(id)   ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
+#define ata_id_has_ncq_autosense(id) \
+                                ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
 
 static inline bool ata_id_has_hipm(const u16 *id)
 {
@@ -696,6 +702,27 @@ static inline bool ata_id_wcache_enabled(const u16 *id)
         return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
 }
 
+static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
+{
+        if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+                return false;
+        return id[ATA_ID_COMMAND_SET_3] & (1 << 3);
+}
+
+static inline bool ata_id_has_sense_reporting(const u16 *id)
+{
+        if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+                return false;
+        return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
+}
+
+static inline bool ata_id_sense_reporting_enabled(const u16 *id)
+{
+        if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+                return false;
+        return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
+}
+
 /**
  *      ata_id_major_version    -       get ATA level of drive
  *      @id: Identify data
diff --git a/include/linux/bpf.h b/include/linux/bpf.h
index bbfceb756452..c2e21113ecc0 100644
--- a/include/linux/bpf.h
+++ b/include/linux/bpf.h
@@ -113,8 +113,6 @@ struct bpf_prog_type_list {
         enum bpf_prog_type type;
 };
 
-void bpf_register_prog_type(struct bpf_prog_type_list *tl);
-
 struct bpf_prog;
 
 struct bpf_prog_aux {
@@ -129,11 +127,25 @@ struct bpf_prog_aux {
 };
 
 #ifdef CONFIG_BPF_SYSCALL
+void bpf_register_prog_type(struct bpf_prog_type_list *tl);
+
 void bpf_prog_put(struct bpf_prog *prog);
+struct bpf_prog *bpf_prog_get(u32 ufd);
 #else
-static inline void bpf_prog_put(struct bpf_prog *prog) {}
+static inline void bpf_register_prog_type(struct bpf_prog_type_list *tl)
+{
+}
+
+static inline struct bpf_prog *bpf_prog_get(u32 ufd)
+{
+        return ERR_PTR(-EOPNOTSUPP);
+}
+
+static inline void bpf_prog_put(struct bpf_prog *prog)
+{
+}
 #endif
-struct bpf_prog *bpf_prog_get(u32 ufd);
+
 /* verify correctness of eBPF program */
 int bpf_check(struct bpf_prog *fp, union bpf_attr *attr);
 
diff --git a/include/linux/cleancache.h b/include/linux/cleancache.h
index 4ce9056b31a8..bda5ec0b4b4d 100644
--- a/include/linux/cleancache.h
+++ b/include/linux/cleancache.h
@@ -5,6 +5,10 @@
 #include <linux/exportfs.h>
 #include <linux/mm.h>
 
+#define CLEANCACHE_NO_POOL              -1
+#define CLEANCACHE_NO_BACKEND           -2
+#define CLEANCACHE_NO_BACKEND_SHARED    -3
+
 #define CLEANCACHE_KEY_MAX 6
 
 /*
@@ -33,10 +37,9 @@ struct cleancache_ops {
         void (*invalidate_fs)(int);
 };
 
-extern struct cleancache_ops *
-        cleancache_register_ops(struct cleancache_ops *ops);
+extern int cleancache_register_ops(struct cleancache_ops *ops);
 extern void __cleancache_init_fs(struct super_block *);
-extern void __cleancache_init_shared_fs(char *, struct super_block *);
+extern void __cleancache_init_shared_fs(struct super_block *);
 extern int  __cleancache_get_page(struct page *);
 extern void __cleancache_put_page(struct page *);
 extern void __cleancache_invalidate_page(struct address_space *, struct page *);
@@ -78,10 +81,10 @@ static inline void cleancache_init_fs(struct super_block *sb)
                 __cleancache_init_fs(sb);
 }
 
-static inline void cleancache_init_shared_fs(char *uuid, struct super_block *sb)
+static inline void cleancache_init_shared_fs(struct super_block *sb)
 {
         if (cleancache_enabled)
-                __cleancache_init_shared_fs(uuid, sb);
+                __cleancache_init_shared_fs(sb);
 }
 
 static inline int cleancache_get_page(struct page *page)
diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h
index 2e4cb67f6e56..96c280b2c263 100644
--- a/include/linux/clockchips.h
+++ b/include/linux/clockchips.h
@@ -8,33 +8,19 @@
 #ifndef _LINUX_CLOCKCHIPS_H
 #define _LINUX_CLOCKCHIPS_H
 
-/* Clock event notification values */
-enum clock_event_nofitiers {
-        CLOCK_EVT_NOTIFY_ADD,
-        CLOCK_EVT_NOTIFY_BROADCAST_ON,
-        CLOCK_EVT_NOTIFY_BROADCAST_OFF,
-        CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
-        CLOCK_EVT_NOTIFY_BROADCAST_ENTER,
-        CLOCK_EVT_NOTIFY_BROADCAST_EXIT,
-        CLOCK_EVT_NOTIFY_SUSPEND,
-        CLOCK_EVT_NOTIFY_RESUME,
-        CLOCK_EVT_NOTIFY_CPU_DYING,
-        CLOCK_EVT_NOTIFY_CPU_DEAD,
-};
-
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BUILD
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
 
-#include <linux/clocksource.h>
-#include <linux/cpumask.h>
-#include <linux/ktime.h>
-#include <linux/notifier.h>
+# include <linux/clocksource.h>
+# include <linux/cpumask.h>
+# include <linux/ktime.h>
+# include <linux/notifier.h>
 
 struct clock_event_device;
 struct module;
 
-/* Clock event mode commands */
+/* Clock event mode commands for legacy ->set_mode(): OBSOLETE */
 enum clock_event_mode {
-        CLOCK_EVT_MODE_UNUSED = 0,
+        CLOCK_EVT_MODE_UNUSED,
         CLOCK_EVT_MODE_SHUTDOWN,
         CLOCK_EVT_MODE_PERIODIC,
         CLOCK_EVT_MODE_ONESHOT,
@@ -42,30 +28,49 @@ enum clock_event_mode {
 };
 
 /*
+ * Possible states of a clock event device.
+ *
+ * DETACHED:    Device is not used by clockevents core. Initial state or can be
+ *              reached from SHUTDOWN.
+ * SHUTDOWN:    Device is powered-off. Can be reached from PERIODIC or ONESHOT.
+ * PERIODIC:    Device is programmed to generate events periodically. Can be
+ *              reached from DETACHED or SHUTDOWN.
+ * ONESHOT:     Device is programmed to generate event only once. Can be reached
+ *              from DETACHED or SHUTDOWN.
+ */
+enum clock_event_state {
+        CLOCK_EVT_STATE_DETACHED,
+        CLOCK_EVT_STATE_SHUTDOWN,
+        CLOCK_EVT_STATE_PERIODIC,
+        CLOCK_EVT_STATE_ONESHOT,
+};
+
+/*
  * Clock event features
  */
-#define CLOCK_EVT_FEAT_PERIODIC         0x000001
-#define CLOCK_EVT_FEAT_ONESHOT          0x000002
-#define CLOCK_EVT_FEAT_KTIME            0x000004
+# define CLOCK_EVT_FEAT_PERIODIC        0x000001
+# define CLOCK_EVT_FEAT_ONESHOT         0x000002
+# define CLOCK_EVT_FEAT_KTIME           0x000004
+
 /*
- * x86(64) specific misfeatures:
+ * x86(64) specific (mis)features:
  *
  * - Clockevent source stops in C3 State and needs broadcast support.
  * - Local APIC timer is used as a dummy device.
  */
-#define CLOCK_EVT_FEAT_C3STOP           0x000008
-#define CLOCK_EVT_FEAT_DUMMY            0x000010
+# define CLOCK_EVT_FEAT_C3STOP          0x000008
+# define CLOCK_EVT_FEAT_DUMMY           0x000010
 
 /*
  * Core shall set the interrupt affinity dynamically in broadcast mode
  */
-#define CLOCK_EVT_FEAT_DYNIRQ           0x000020
-#define CLOCK_EVT_FEAT_PERCPU           0x000040
+# define CLOCK_EVT_FEAT_DYNIRQ          0x000020
+# define CLOCK_EVT_FEAT_PERCPU          0x000040
 
 /*
  * Clockevent device is based on a hrtimer for broadcast
  */
-#define CLOCK_EVT_FEAT_HRTIMER          0x000080
+# define CLOCK_EVT_FEAT_HRTIMER         0x000080
 
 /**
  * struct clock_event_device - clock event device descriptor
@@ -78,10 +83,15 @@ enum clock_event_mode {
  * @min_delta_ns:       minimum delta value in ns
  * @mult:               nanosecond to cycles multiplier
  * @shift:              nanoseconds to cycles divisor (power of two)
- * @mode:               operating mode assigned by the management code
+ * @mode:               operating mode, relevant only to ->set_mode(), OBSOLETE
+ * @state:              current state of the device, assigned by the core code
  * @features:           features
  * @retries:            number of forced programming retries
- * @set_mode:           set mode function
+ * @set_mode:           legacy set mode function, only for modes <= CLOCK_EVT_MODE_RESUME.
+ * @set_state_periodic: switch state to periodic, if !set_mode
+ * @set_state_oneshot:  switch state to oneshot, if !set_mode
+ * @set_state_shutdown: switch state to shutdown, if !set_mode
+ * @tick_resume:        resume clkevt device, if !set_mode
  * @broadcast:          function to broadcast events
  * @min_delta_ticks:    minimum delta value in ticks stored for reconfiguration
  * @max_delta_ticks:    maximum delta value in ticks stored for reconfiguration
@@ -95,22 +105,31 @@ enum clock_event_mode {
  */
 struct clock_event_device {
         void                    (*event_handler)(struct clock_event_device *);
-        int                     (*set_next_event)(unsigned long evt,
-                                                  struct clock_event_device *);
-        int                     (*set_next_ktime)(ktime_t expires,
-                                                  struct clock_event_device *);
+        int                     (*set_next_event)(unsigned long evt, struct clock_event_device *);
+        int                     (*set_next_ktime)(ktime_t expires, struct clock_event_device *);
         ktime_t                 next_event;
         u64                     max_delta_ns;
         u64                     min_delta_ns;
         u32                     mult;
         u32                     shift;
         enum clock_event_mode   mode;
+        enum clock_event_state  state;
         unsigned int            features;
         unsigned long           retries;
 
+        /*
+         * State transition callback(s): Only one of the two groups should be
+         * defined:
+         * - set_mode(), only for modes <= CLOCK_EVT_MODE_RESUME.
+         * - set_state_{shutdown|periodic|oneshot}(), tick_resume().
+         */
+        void                    (*set_mode)(enum clock_event_mode mode, struct clock_event_device *);
+        int                     (*set_state_periodic)(struct clock_event_device *);
+        int                     (*set_state_oneshot)(struct clock_event_device *);
+        int                     (*set_state_shutdown)(struct clock_event_device *);
+        int                     (*tick_resume)(struct clock_event_device *);
+
         void                    (*broadcast)(const struct cpumask *mask);
-        void                    (*set_mode)(enum clock_event_mode mode,
-                                            struct clock_event_device *);
         void                    (*suspend)(struct clock_event_device *);
         void                    (*resume)(struct clock_event_device *);
         unsigned long           min_delta_ticks;
@@ -136,18 +155,18 @@ struct clock_event_device {
  *
  * factor = (clock_ticks << shift) / nanoseconds
  */
-static inline unsigned long div_sc(unsigned long ticks, unsigned long nsec,
-                                   int shift)
+static inline unsigned long
+div_sc(unsigned long ticks, unsigned long nsec, int shift)
 {
-        uint64_t tmp = ((uint64_t)ticks) << shift;
+        u64 tmp = ((u64)ticks) << shift;
 
         do_div(tmp, nsec);
+
         return (unsigned long) tmp;
 }
 
 /* Clock event layer functions */
-extern u64 clockevent_delta2ns(unsigned long latch,
-                               struct clock_event_device *evt);
+extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt);
 extern void clockevents_register_device(struct clock_event_device *dev);
 extern int clockevents_unbind_device(struct clock_event_device *ced, int cpu);
 
@@ -158,57 +177,42 @@ extern void clockevents_config_and_register(struct clock_event_device *dev,
 
 extern int clockevents_update_freq(struct clock_event_device *ce, u32 freq);
 
-extern void clockevents_exchange_device(struct clock_event_device *old,
-                                        struct clock_event_device *new);
-extern void clockevents_set_mode(struct clock_event_device *dev,
-                                 enum clock_event_mode mode);
-extern int clockevents_program_event(struct clock_event_device *dev,
-                                     ktime_t expires, bool force);
-
-extern void clockevents_handle_noop(struct clock_event_device *dev);
-
 static inline void
 clockevents_calc_mult_shift(struct clock_event_device *ce, u32 freq, u32 minsec)
 {
-        return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC,
-                                      freq, minsec);
+        return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC, freq, minsec);
 }
 
 extern void clockevents_suspend(void);
 extern void clockevents_resume(void);
 
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-#ifdef CONFIG_ARCH_HAS_TICK_BROADCAST
+# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+#  ifdef CONFIG_ARCH_HAS_TICK_BROADCAST
 extern void tick_broadcast(const struct cpumask *mask);
-#else
-#define tick_broadcast  NULL
-#endif
+#  else
+#   define tick_broadcast       NULL
+#  endif
 extern int tick_receive_broadcast(void);
-#endif
+# endif
 
-#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+# if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
 extern void tick_setup_hrtimer_broadcast(void);
 extern int tick_check_broadcast_expired(void);
-#else
+# else
 static inline int tick_check_broadcast_expired(void) { return 0; }
-static inline void tick_setup_hrtimer_broadcast(void) {};
-#endif
+static inline void tick_setup_hrtimer_broadcast(void) { }
+# endif
 
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
 extern int clockevents_notify(unsigned long reason, void *arg);
-#else
-static inline int clockevents_notify(unsigned long reason, void *arg) { return 0; }
-#endif
-
-#else /* CONFIG_GENERIC_CLOCKEVENTS_BUILD */
 
-static inline void clockevents_suspend(void) {}
-static inline void clockevents_resume(void) {}
+#else /* !CONFIG_GENERIC_CLOCKEVENTS: */
 
+static inline void clockevents_suspend(void) { }
+static inline void clockevents_resume(void) { }
 static inline int clockevents_notify(unsigned long reason, void *arg) { return 0; }
 static inline int tick_check_broadcast_expired(void) { return 0; }
-static inline void tick_setup_hrtimer_broadcast(void) {};
+static inline void tick_setup_hrtimer_broadcast(void) { }
 
-#endif
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
 
-#endif
+#endif /* _LINUX_CLOCKCHIPS_H */
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 9c78d15d33e4..135509821c39 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -56,6 +56,7 @@ struct module;
  * @shift:              cycle to nanosecond divisor (power of two)
  * @max_idle_ns:        max idle time permitted by the clocksource (nsecs)
  * @maxadj:             maximum adjustment value to mult (~11%)
+ * @max_cycles:         maximum safe cycle value which won't overflow on multiplication
  * @flags:              flags describing special properties
  * @archdata:           arch-specific data
  * @suspend:            suspend function for the clocksource, if necessary
@@ -76,7 +77,7 @@ struct clocksource {
 #ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
         struct arch_clocksource_data archdata;
 #endif
-
+        u64 max_cycles;
         const char *name;
         struct list_head list;
         int rating;
@@ -178,7 +179,6 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
 }
 
 
-extern int clocksource_register(struct clocksource*);
 extern int clocksource_unregister(struct clocksource*);
 extern void clocksource_touch_watchdog(void);
 extern struct clocksource* clocksource_get_next(void);
@@ -189,7 +189,7 @@ extern struct clocksource * __init clocksource_default_clock(void);
 extern void clocksource_mark_unstable(struct clocksource *cs);
 
 extern u64
-clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask);
+clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles);
 extern void
 clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
 
@@ -200,7 +200,16 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
 extern int
 __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
 extern void
-__clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
+__clocksource_update_freq_scale(struct clocksource *cs, u32 scale, u32 freq);
+
+/*
+ * Don't call this unless you are a default clocksource
+ * (AKA: jiffies) and absolutely have to.
+ */
+static inline int __clocksource_register(struct clocksource *cs)
+{
+        return __clocksource_register_scale(cs, 1, 0);
+}
 
 static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
 {
@@ -212,14 +221,14 @@ static inline int clocksource_register_khz(struct clocksource *cs, u32 khz)
         return __clocksource_register_scale(cs, 1000, khz);
 }
 
-static inline void __clocksource_updatefreq_hz(struct clocksource *cs, u32 hz)
+static inline void __clocksource_update_freq_hz(struct clocksource *cs, u32 hz)
 {
-        __clocksource_updatefreq_scale(cs, 1, hz);
+        __clocksource_update_freq_scale(cs, 1, hz);
 }
 
-static inline void __clocksource_updatefreq_khz(struct clocksource *cs, u32 khz)
+static inline void __clocksource_update_freq_khz(struct clocksource *cs, u32 khz)
 {
-        __clocksource_updatefreq_scale(cs, 1000, khz);
+        __clocksource_update_freq_scale(cs, 1000, khz);
 }
 
 
diff --git a/include/linux/cma.h b/include/linux/cma.h
index 9384ba66e975..f7ef093ec49a 100644
--- a/include/linux/cma.h
+++ b/include/linux/cma.h
@@ -16,16 +16,16 @@
 struct cma;
 
 extern unsigned long totalcma_pages;
-extern phys_addr_t cma_get_base(struct cma *cma);
-extern unsigned long cma_get_size(struct cma *cma);
+extern phys_addr_t cma_get_base(const struct cma *cma);
+extern unsigned long cma_get_size(const struct cma *cma);
 
 extern int __init cma_declare_contiguous(phys_addr_t base,
                         phys_addr_t size, phys_addr_t limit,
                         phys_addr_t alignment, unsigned int order_per_bit,
                         bool fixed, struct cma **res_cma);
-extern int cma_init_reserved_mem(phys_addr_t base,
-                                        phys_addr_t size, int order_per_bit,
+extern int cma_init_reserved_mem(phys_addr_t base, phys_addr_t size,
+                                        unsigned int order_per_bit,
                                         struct cma **res_cma);
-extern struct page *cma_alloc(struct cma *cma, int count, unsigned int align);
-extern bool cma_release(struct cma *cma, struct page *pages, int count);
+extern struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align);
+extern bool cma_release(struct cma *cma, const struct page *pages, unsigned int count);
 #endif
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 1b45e4a0519b..0e41ca0e5927 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -192,29 +192,16 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
 
 #include <uapi/linux/types.h>
 
-static __always_inline void data_access_exceeds_word_size(void)
-#ifdef __compiletime_warning
-__compiletime_warning("data access exceeds word size and won't be atomic")
-#endif
-;
-
-static __always_inline void data_access_exceeds_word_size(void)
-{
-}
-
 static __always_inline void __read_once_size(const volatile void *p, void *res, int size)
 {
         switch (size) {
         case 1: *(__u8 *)res = *(volatile __u8 *)p; break;
         case 2: *(__u16 *)res = *(volatile __u16 *)p; break;
         case 4: *(__u32 *)res = *(volatile __u32 *)p; break;
-#ifdef CONFIG_64BIT
         case 8: *(__u64 *)res = *(volatile __u64 *)p; break;
-#endif
         default:
                 barrier();
                 __builtin_memcpy((void *)res, (const void *)p, size);
-                data_access_exceeds_word_size();
                 barrier();
         }
 }
@@ -225,13 +212,10 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
         case 1: *(volatile __u8 *)p = *(__u8 *)res; break;
         case 2: *(volatile __u16 *)p = *(__u16 *)res; break;
         case 4: *(volatile __u32 *)p = *(__u32 *)res; break;
-#ifdef CONFIG_64BIT
         case 8: *(volatile __u64 *)p = *(__u64 *)res; break;
-#endif
         default:
                 barrier();
                 __builtin_memcpy((void *)p, (const void *)res, size);
-                data_access_exceeds_word_size();
                 barrier();
         }
 }
diff --git a/include/linux/context_tracking.h b/include/linux/context_tracking.h
index 37b81bd51ec0..2821838256b4 100644
--- a/include/linux/context_tracking.h
+++ b/include/linux/context_tracking.h
@@ -10,6 +10,8 @@
 #ifdef CONFIG_CONTEXT_TRACKING
 extern void context_tracking_cpu_set(int cpu);
 
+extern void context_tracking_enter(enum ctx_state state);
+extern void context_tracking_exit(enum ctx_state state);
 extern void context_tracking_user_enter(void);
 extern void context_tracking_user_exit(void);
 extern void __context_tracking_task_switch(struct task_struct *prev,
@@ -35,7 +37,8 @@ static inline enum ctx_state exception_enter(void)
                 return 0;
 
         prev_ctx = this_cpu_read(context_tracking.state);
-        context_tracking_user_exit();
+        if (prev_ctx != CONTEXT_KERNEL)
+                context_tracking_exit(prev_ctx);
 
         return prev_ctx;
 }
@@ -43,8 +46,8 @@ static inline enum ctx_state exception_enter(void)
 static inline void exception_exit(enum ctx_state prev_ctx)
 {
         if (context_tracking_is_enabled()) {
-                if (prev_ctx == IN_USER)
-                        context_tracking_user_enter();
+                if (prev_ctx != CONTEXT_KERNEL)
+                        context_tracking_enter(prev_ctx);
         }
 }
 
@@ -78,10 +81,16 @@ static inline void guest_enter(void)
                 vtime_guest_enter(current);
         else
                 current->flags |= PF_VCPU;
+
+        if (context_tracking_is_enabled())
+                context_tracking_enter(CONTEXT_GUEST);
 }
 
 static inline void guest_exit(void)
 {
+        if (context_tracking_is_enabled())
+                context_tracking_exit(CONTEXT_GUEST);
+
         if (vtime_accounting_enabled())
                 vtime_guest_exit(current);
         else
diff --git a/include/linux/context_tracking_state.h b/include/linux/context_tracking_state.h
index 97a81225d037..6b7b96a32b75 100644
--- a/include/linux/context_tracking_state.h
+++ b/include/linux/context_tracking_state.h
@@ -13,8 +13,9 @@ struct context_tracking {
          */
         bool active;
         enum ctx_state {
-                IN_KERNEL = 0,
-                IN_USER,
+                CONTEXT_KERNEL = 0,
+                CONTEXT_USER,
+                CONTEXT_GUEST,
         } state;
 };
 
@@ -34,11 +35,13 @@ static inline bool context_tracking_cpu_is_enabled(void)
 
 static inline bool context_tracking_in_user(void)
 {
-        return __this_cpu_read(context_tracking.state) == IN_USER;
+        return __this_cpu_read(context_tracking.state) == CONTEXT_USER;
 }
 #else
 static inline bool context_tracking_in_user(void) { return false; }
 static inline bool context_tracking_active(void) { return false; }
+static inline bool context_tracking_is_enabled(void) { return false; }
+static inline bool context_tracking_cpu_is_enabled(void) { return false; }
 #endif /* CONFIG_CONTEXT_TRACKING */
 
 #endif
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 4260e8594bd7..c0fb6b1b4712 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -73,6 +73,7 @@ enum {
         /* migration should happen before other stuff but after perf */
         CPU_PRI_PERF            = 20,
         CPU_PRI_MIGRATION       = 10,
+        CPU_PRI_SMPBOOT         = 9,
         /* bring up workqueues before normal notifiers and down after */
         CPU_PRI_WORKQUEUE_UP    = 5,
         CPU_PRI_WORKQUEUE_DOWN  = -5,
@@ -95,6 +96,10 @@ enum {
                                         * Called on the new cpu, just before
                                         * enabling interrupts. Must not sleep,
                                         * must not fail */
+#define CPU_DYING_IDLE          0x000B /* CPU (unsigned)v dying, reached
+                                        * idle loop. */
+#define CPU_BROKEN              0x000C /* CPU (unsigned)v did not die properly,
+                                        * perhaps due to preemption. */
 
 /* Used for CPU hotplug events occurring while tasks are frozen due to a suspend
  * operation in progress
@@ -161,6 +166,7 @@ static inline void __unregister_cpu_notifier(struct notifier_block *nb)
 }
 #endif
 
+void smpboot_thread_init(void);
 int cpu_up(unsigned int cpu);
 void notify_cpu_starting(unsigned int cpu);
 extern void cpu_maps_update_begin(void);
@@ -208,6 +214,10 @@ static inline void cpu_notifier_register_done(void)
 {
 }
 
+static inline void smpboot_thread_init(void)
+{
+}
+
 #endif /* CONFIG_SMP */
 extern struct bus_type cpu_subsys;
 
@@ -271,4 +281,14 @@ void arch_cpu_idle_enter(void);
 void arch_cpu_idle_exit(void);
 void arch_cpu_idle_dead(void);
 
+DECLARE_PER_CPU(bool, cpu_dead_idle);
+
+int cpu_report_state(int cpu);
+int cpu_check_up_prepare(int cpu);
+void cpu_set_state_online(int cpu);
+#ifdef CONFIG_HOTPLUG_CPU
+bool cpu_wait_death(unsigned int cpu, int seconds);
+bool cpu_report_death(void);
+#endif /* #ifdef CONFIG_HOTPLUG_CPU */
+
 #endif /* _LINUX_CPU_H_ */
diff --git a/include/linux/device.h b/include/linux/device.h
index 324d02add7b4..6558af90c8fe 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -909,6 +909,13 @@ static inline void device_lock_assert(struct device *dev)
         lockdep_assert_held(&dev->mutex);
 }
 
+static inline struct device_node *dev_of_node(struct device *dev)
+{
+        if (!IS_ENABLED(CONFIG_OF))
+                return NULL;
+        return dev->of_node;
+}
+
 void driver_init(void);
 
 /*
diff --git a/include/linux/efi.h b/include/linux/efi.h
index cf7e431cbc73..af5be0368dec 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -942,6 +942,7 @@ extern int __init efi_setup_pcdp_console(char *);
 #define EFI_64BIT               5       /* Is the firmware 64-bit? */
 #define EFI_PARAVIRT            6       /* Access is via a paravirt interface */
 #define EFI_ARCH_1              7       /* First arch-specific bit */
+#define EFI_DBG                 8       /* Print additional debug info at runtime */
 
 #ifdef CONFIG_EFI
 /*
diff --git a/include/linux/elf-randomize.h b/include/linux/elf-randomize.h
new file mode 100644
index 000000000000..b5f0bda9472e
--- /dev/null
+++ b/include/linux/elf-randomize.h
@@ -0,0 +1,22 @@
+#ifndef _ELF_RANDOMIZE_H
+#define _ELF_RANDOMIZE_H
+
+struct mm_struct;
+
+#ifndef CONFIG_ARCH_HAS_ELF_RANDOMIZE
+static inline unsigned long arch_mmap_rnd(void) { return 0; }
+# if defined(arch_randomize_brk) && defined(CONFIG_COMPAT_BRK)
+#  define compat_brk_randomized
+# endif
+# ifndef arch_randomize_brk
+#  define arch_randomize_brk(mm)        (mm->brk)
+# endif
+#else
+extern unsigned long arch_mmap_rnd(void);
+extern unsigned long arch_randomize_brk(struct mm_struct *mm);
+# ifdef CONFIG_COMPAT_BRK
+#  define compat_brk_randomized
+# endif
+#endif
+
+#endif
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 52cc4492cb3a..d502e5436c84 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -314,6 +314,28 @@ struct page;
 struct address_space;
 struct writeback_control;
 
+#define IOCB_EVENTFD            (1 << 0)
+
+struct kiocb {
+        struct file             *ki_filp;
+        loff_t                  ki_pos;
+        void (*ki_complete)(struct kiocb *iocb, long ret, long ret2);
+        void                    *private;
+        int                     ki_flags;
+};
+
+static inline bool is_sync_kiocb(struct kiocb *kiocb)
+{
+        return kiocb->ki_complete == NULL;
+}
+
+static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp)
+{
+        *kiocb = (struct kiocb) {
+                .ki_filp = filp,
+        };
+}
+
 /*
  * "descriptor" for what we're up to with a read.
  * This allows us to use the same read code yet
@@ -2145,7 +2167,7 @@ struct filename {
         const __user char       *uptr;  /* original userland pointer */
         struct audit_names      *aname;
         int                     refcnt;
-        bool                    separate; /* should "name" be freed? */
+        const char              iname[];
 };
 
 extern long vfs_truncate(struct path *, loff_t);
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index c674ee8f7fca..46e83c2156c6 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -13,6 +13,7 @@ struct trace_array;
 struct trace_buffer;
 struct tracer;
 struct dentry;
+struct bpf_prog;
 
 struct trace_print_flags {
         unsigned long           mask;
@@ -202,7 +203,7 @@ enum trace_reg {
 struct ftrace_event_call;
 
 struct ftrace_event_class {
-        char                    *system;
+        const char              *system;
         void                    *probe;
 #ifdef CONFIG_PERF_EVENTS
         void                    *perf_probe;
@@ -252,6 +253,7 @@ enum {
         TRACE_EVENT_FL_WAS_ENABLED_BIT,
         TRACE_EVENT_FL_USE_CALL_FILTER_BIT,
         TRACE_EVENT_FL_TRACEPOINT_BIT,
+        TRACE_EVENT_FL_KPROBE_BIT,
 };
 
 /*
@@ -265,6 +267,7 @@ enum {
  *                     it is best to clear the buffers that used it).
  *  USE_CALL_FILTER - For ftrace internal events, don't use file filter
  *  TRACEPOINT    - Event is a tracepoint
+ *  KPROBE        - Event is a kprobe
  */
 enum {
         TRACE_EVENT_FL_FILTERED         = (1 << TRACE_EVENT_FL_FILTERED_BIT),
@@ -274,6 +277,7 @@ enum {
         TRACE_EVENT_FL_WAS_ENABLED      = (1 << TRACE_EVENT_FL_WAS_ENABLED_BIT),
         TRACE_EVENT_FL_USE_CALL_FILTER  = (1 << TRACE_EVENT_FL_USE_CALL_FILTER_BIT),
         TRACE_EVENT_FL_TRACEPOINT       = (1 << TRACE_EVENT_FL_TRACEPOINT_BIT),
+        TRACE_EVENT_FL_KPROBE           = (1 << TRACE_EVENT_FL_KPROBE_BIT),
 };
 
 struct ftrace_event_call {
@@ -285,7 +289,7 @@ struct ftrace_event_call {
                 struct tracepoint       *tp;
         };
         struct trace_event      event;
-        const char              *print_fmt;
+        char                    *print_fmt;
         struct event_filter     *filter;
         void                    *mod;
         void                    *data;
@@ -303,6 +307,7 @@ struct ftrace_event_call {
 #ifdef CONFIG_PERF_EVENTS
         int                             perf_refcount;
         struct hlist_head __percpu      *perf_events;
+        struct bpf_prog                 *prog;
 
         int     (*perf_perm)(struct ftrace_event_call *,
                              struct perf_event *);
@@ -548,6 +553,15 @@ event_trigger_unlock_commit_regs(struct ftrace_event_file *file,
                 event_triggers_post_call(file, tt);
 }
 
+#ifdef CONFIG_BPF_SYSCALL
+unsigned int trace_call_bpf(struct bpf_prog *prog, void *ctx);
+#else
+static inline unsigned int trace_call_bpf(struct bpf_prog *prog, void *ctx)
+{
+        return 1;
+}
+#endif
+
 enum {
         FILTER_OTHER = 0,
         FILTER_STATIC_STRING,
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 51bd1e72a917..97a9373e61e8 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -57,8 +57,10 @@ struct vm_area_struct;
  * _might_ fail.  This depends upon the particular VM implementation.
  *
  * __GFP_NOFAIL: The VM implementation _must_ retry infinitely: the caller
- * cannot handle allocation failures.  This modifier is deprecated and no new
- * users should be added.
+ * cannot handle allocation failures. New users should be evaluated carefully
+ * (and the flag should be used only when there is no reasonable failure policy)
+ * but it is definitely preferable to use the flag rather than opencode endless
+ * loop around allocator.
  *
  * __GFP_NORETRY: The VM implementation must not retry indefinitely.
  *
@@ -117,16 +119,6 @@ struct vm_area_struct;
                          __GFP_NOMEMALLOC | __GFP_NORETRY | __GFP_NOWARN | \
                          __GFP_NO_KSWAPD)
 
-/*
- * GFP_THISNODE does not perform any reclaim, you most likely want to
- * use __GFP_THISNODE to allocate from a given node without fallback!
- */
-#ifdef CONFIG_NUMA
-#define GFP_THISNODE    (__GFP_THISNODE | __GFP_NOWARN | __GFP_NORETRY)
-#else
-#define GFP_THISNODE    ((__force gfp_t)0)
-#endif
-
 /* This mask makes up all the page movable related flags */
 #define GFP_MOVABLE_MASK (__GFP_RECLAIMABLE|__GFP_MOVABLE)
 
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index cba442ec3c66..f4af03404b97 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -9,7 +9,7 @@
 
 
 extern void synchronize_irq(unsigned int irq);
-extern void synchronize_hardirq(unsigned int irq);
+extern bool synchronize_hardirq(unsigned int irq);
 
 #if defined(CONFIG_TINY_RCU)
 
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index 4173a8fdad9e..0408421d885f 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -49,19 +49,43 @@ struct hid_sensor_hub_attribute_info {
 };
 
 /**
+ * struct sensor_hub_pending - Synchronous read pending information
+ * @status:             Pending status true/false.
+ * @ready:              Completion synchronization data.
+ * @usage_id:           Usage id for physical device, E.g. Gyro usage id.
+ * @attr_usage_id:      Usage Id of a field, E.g. X-AXIS for a gyro.
+ * @raw_size:           Response size for a read request.
+ * @raw_data:           Place holder for received response.
+ */
+struct sensor_hub_pending {
+        bool status;
+        struct completion ready;
+        u32 usage_id;
+        u32 attr_usage_id;
+        int raw_size;
+        u8  *raw_data;
+};
+
+/**
  * struct hid_sensor_hub_device - Stores the hub instance data
  * @hdev:               Stores the hid instance.
  * @vendor_id:          Vendor id of hub device.
  * @product_id:         Product id of hub device.
+ * @usage:              Usage id for this hub device instance.
  * @start_collection_index: Starting index for a phy type collection
  * @end_collection_index: Last index for a phy type collection
+ * @mutex:              synchronizing mutex.
+ * @pending:            Holds information of pending sync read request.
  */
 struct hid_sensor_hub_device {
         struct hid_device *hdev;
         u32 vendor_id;
         u32 product_id;
+        u32 usage;
         int start_collection_index;
         int end_collection_index;
+        struct mutex mutex;
+        struct sensor_hub_pending pending;
 };
 
 /**
@@ -152,40 +176,51 @@ int sensor_hub_input_get_attribute_info(struct hid_sensor_hub_device *hsdev,
 * @usage_id:    Attribute usage id of parent physical device as per spec
 * @attr_usage_id:       Attribute usage id as per spec
 * @report_id:   Report id to look for
+* @flag:      Synchronous or asynchronous read
 *
-* Issues a synchronous read request for an input attribute. Returns
-* data upto 32 bits. Since client can get events, so this call should
-* not be used for data paths, this will impact performance.
+* Issues a synchronous or asynchronous read request for an input attribute.
+* Returns data upto 32 bits.
 */
 
+enum sensor_hub_read_flags {
+        SENSOR_HUB_SYNC,
+        SENSOR_HUB_ASYNC,
+};
+
 int sensor_hub_input_attr_get_raw_value(struct hid_sensor_hub_device *hsdev,
-                        u32 usage_id,
-                        u32 attr_usage_id, u32 report_id);
+                                        u32 usage_id,
+                                        u32 attr_usage_id, u32 report_id,
+                                        enum sensor_hub_read_flags flag
+);
+
 /**
 * sensor_hub_set_feature() - Feature set request
 * @hsdev:       Hub device instance.
 * @report_id:   Report id to look for
 * @field_index: Field index inside a report
-* @value:       Value to set
+* @buffer_size: size of the buffer
+* @buffer:      buffer to use in the feature set
 *
 * Used to set a field in feature report. For example this can set polling
 * interval, sensitivity, activate/deactivate state.
 */
 int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
-                        u32 field_index, s32 value);
+                           u32 field_index, int buffer_size, void *buffer);
 
 /**
 * sensor_hub_get_feature() - Feature get request
 * @hsdev:       Hub device instance.
 * @report_id:   Report id to look for
 * @field_index: Field index inside a report
-* @value:       Place holder for return value
+* @buffer_size: size of the buffer
+* @buffer:      buffer to copy output
 *
 * Used to get a field in feature report. For example this can get polling
-* interval, sensitivity, activate/deactivate state.
+* interval, sensitivity, activate/deactivate state. On success it returns
+* number of bytes copied to buffer. On failure, it returns value < 0.
 */
 int sensor_hub_get_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
-                        u32 field_index, s32 *value);
+                           u32 field_index, int buffer_size, void *buffer);
 
 /* hid-sensor-attributes */
 
diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h
index 109f0e633e01..f2ee90aed0c2 100644
--- a/include/linux/hid-sensor-ids.h
+++ b/include/linux/hid-sensor-ids.h
@@ -21,6 +21,8 @@
 
 #define HID_MAX_PHY_DEVICES                                     0xFF
 
+#define HID_USAGE_SENSOR_COLLECTION                             0x200001
+
 /* Accel 3D (200073) */
 #define HID_USAGE_SENSOR_ACCEL_3D                               0x200073
 #define HID_USAGE_SENSOR_DATA_ACCELERATION                      0x200452
diff --git a/include/linux/hid.h b/include/linux/hid.h
index efc7787a41a8..176b43670e5d 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -159,6 +159,7 @@ struct hid_item {
 #define HID_UP_LED              0x00080000
 #define HID_UP_BUTTON           0x00090000
 #define HID_UP_ORDINAL          0x000a0000
+#define HID_UP_TELEPHONY        0x000b0000
 #define HID_UP_CONSUMER         0x000c0000
 #define HID_UP_DIGITIZER        0x000d0000
 #define HID_UP_PID              0x000f0000
@@ -269,6 +270,7 @@ struct hid_item {
 #define HID_DG_DEVICEINDEX      0x000d0053
 #define HID_DG_CONTACTCOUNT     0x000d0054
 #define HID_DG_CONTACTMAX       0x000d0055
+#define HID_DG_BUTTONTYPE       0x000d0059
 #define HID_DG_BARRELSWITCH2    0x000d005a
 #define HID_DG_TOOLSERIALNUMBER 0x000d005b
 
@@ -514,10 +516,10 @@ struct hid_device {							/* device report descriptor */
 #ifdef CONFIG_HID_BATTERY_STRENGTH
         /*
          * Power supply information for HID devices which report
-         * battery strength. power_supply is registered iff
-         * battery.name is non-NULL.
+         * battery strength. power_supply was successfully registered if
+         * battery is non-NULL.
          */
-        struct power_supply battery;
+        struct power_supply *battery;
         __s32 battery_min;
         __s32 battery_max;
         __s32 battery_report_type;
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 6d89575361a8..e83a738a3b87 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -253,10 +253,10 @@ static inline void i2c_set_clientdata(struct i2c_client *dev, void *data)
 
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 enum i2c_slave_event {
-        I2C_SLAVE_REQ_READ_START,
-        I2C_SLAVE_REQ_READ_END,
-        I2C_SLAVE_REQ_WRITE_START,
-        I2C_SLAVE_REQ_WRITE_END,
+        I2C_SLAVE_READ_REQUESTED,
+        I2C_SLAVE_WRITE_REQUESTED,
+        I2C_SLAVE_READ_PROCESSED,
+        I2C_SLAVE_WRITE_RECEIVED,
         I2C_SLAVE_STOP,
 };
 
@@ -435,8 +435,8 @@ struct i2c_bus_recovery_info {
         void (*set_scl)(struct i2c_adapter *, int val);
         int (*get_sda)(struct i2c_adapter *);
 
-        void (*prepare_recovery)(struct i2c_bus_recovery_info *bri);
-        void (*unprepare_recovery)(struct i2c_bus_recovery_info *bri);
+        void (*prepare_recovery)(struct i2c_adapter *);
+        void (*unprepare_recovery)(struct i2c_adapter *);
 
         /* gpio recovery */
         int scl_gpio;
@@ -449,6 +449,48 @@ int i2c_recover_bus(struct i2c_adapter *adap);
 int i2c_generic_gpio_recovery(struct i2c_adapter *adap);
 int i2c_generic_scl_recovery(struct i2c_adapter *adap);
 
+/**
+ * struct i2c_adapter_quirks - describe flaws of an i2c adapter
+ * @flags: see I2C_AQ_* for possible flags and read below
+ * @max_num_msgs: maximum number of messages per transfer
+ * @max_write_len: maximum length of a write message
+ * @max_read_len: maximum length of a read message
+ * @max_comb_1st_msg_len: maximum length of the first msg in a combined message
+ * @max_comb_2nd_msg_len: maximum length of the second msg in a combined message
+ *
+ * Note about combined messages: Some I2C controllers can only send one message
+ * per transfer, plus something called combined message or write-then-read.
+ * This is (usually) a small write message followed by a read message and
+ * barely enough to access register based devices like EEPROMs. There is a flag
+ * to support this mode. It implies max_num_msg = 2 and does the length checks
+ * with max_comb_*_len because combined message mode usually has its own
+ * limitations. Because of HW implementations, some controllers can actually do
+ * write-then-anything or other variants. To support that, write-then-read has
+ * been broken out into smaller bits like write-first and read-second which can
+ * be combined as needed.
+ */
+
+struct i2c_adapter_quirks {
+        u64 flags;
+        int max_num_msgs;
+        u16 max_write_len;
+        u16 max_read_len;
+        u16 max_comb_1st_msg_len;
+        u16 max_comb_2nd_msg_len;
+};
+
+/* enforce max_num_msgs = 2 and use max_comb_*_len for length checks */
+#define I2C_AQ_COMB                     BIT(0)
+/* first combined message must be write */
+#define I2C_AQ_COMB_WRITE_FIRST         BIT(1)
+/* second combined message must be read */
+#define I2C_AQ_COMB_READ_SECOND         BIT(2)
+/* both combined messages must have the same target address */
+#define I2C_AQ_COMB_SAME_ADDR           BIT(3)
+/* convenience macro for typical write-then read case */
+#define I2C_AQ_COMB_WRITE_THEN_READ     (I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | \
+                                         I2C_AQ_COMB_READ_SECOND | I2C_AQ_COMB_SAME_ADDR)
+
 /*
  * i2c_adapter is the structure used to identify a physical i2c bus along
  * with the access algorithms necessary to access it.
@@ -474,6 +516,7 @@ struct i2c_adapter {
         struct list_head userspace_clients;
 
         struct i2c_bus_recovery_info *bus_recovery_info;
+        const struct i2c_adapter_quirks *quirks;
 };
 #define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
 
diff --git a/include/linux/iio/buffer.h b/include/linux/iio/buffer.h
index b65850a41127..eb8622b78ec9 100644
--- a/include/linux/iio/buffer.h
+++ b/include/linux/iio/buffer.h
@@ -21,8 +21,8 @@ struct iio_buffer;
  * struct iio_buffer_access_funcs - access functions for buffers.
  * @store_to:           actually store stuff to the buffer
  * @read_first_n:       try to get a specified number of bytes (must exist)
- * @data_available:     indicates whether data for reading from the buffer is
- *                      available.
+ * @data_available:     indicates how much data is available for reading from
+ *                      the buffer.
  * @request_update:     if a parameter change has been marked, update underlying
  *                      storage.
  * @set_bytes_per_datum:set number of bytes per datum
@@ -43,7 +43,7 @@ struct iio_buffer_access_funcs {
         int (*read_first_n)(struct iio_buffer *buffer,
                             size_t n,
                             char __user *buf);
-        bool (*data_available)(struct iio_buffer *buffer);
+        size_t (*data_available)(struct iio_buffer *buffer);
 
         int (*request_update)(struct iio_buffer *buffer);
 
@@ -72,6 +72,7 @@ struct iio_buffer_access_funcs {
  * @demux_bounce:       [INTERN] buffer for doing gather from incoming scan.
  * @buffer_list:        [INTERN] entry in the devices list of current buffers.
  * @ref:                [INTERN] reference count of the buffer.
+ * @watermark:          [INTERN] number of datums to wait for poll/read.
  */
 struct iio_buffer {
         int                                     length;
@@ -90,6 +91,7 @@ struct iio_buffer {
         void                                    *demux_bounce;
         struct list_head                        buffer_list;
         struct kref                             ref;
+        unsigned int                            watermark;
 };
 
 /**
diff --git a/include/linux/iio/dac/max517.h b/include/linux/iio/dac/max517.h
index f6d1d252f08d..7668716cd73c 100644
--- a/include/linux/iio/dac/max517.h
+++ b/include/linux/iio/dac/max517.h
@@ -9,7 +9,7 @@
 #define IIO_DAC_MAX517_H_
 
 struct max517_platform_data {
-        u16                             vref_mv[2];
+        u16                             vref_mv[8];
 };
 
 #endif /* IIO_DAC_MAX517_H_ */
diff --git a/include/linux/iio/events.h b/include/linux/iio/events.h
index 03fa332ad2a8..8ad87d1c5340 100644
--- a/include/linux/iio/events.h
+++ b/include/linux/iio/events.h
@@ -9,22 +9,8 @@
 #ifndef _IIO_EVENTS_H_
 #define _IIO_EVENTS_H_
 
-#include <linux/ioctl.h>
-#include <linux/types.h>
 #include <linux/iio/types.h>
-
-/**
- * struct iio_event_data - The actual event being pushed to userspace
- * @id:         event identifier
- * @timestamp:  best estimate of time of event occurrence (often from
- *              the interrupt handler)
- */
-struct iio_event_data {
-        __u64   id;
-        __s64   timestamp;
-};
-
-#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+#include <uapi/linux/iio/events.h>
 
 /**
  * IIO_EVENT_CODE() - create event identifier
@@ -70,18 +56,4 @@ struct iio_event_data {
 #define IIO_UNMOD_EVENT_CODE(chan_type, number, type, direction)        \
         IIO_EVENT_CODE(chan_type, 0, 0, direction, type, number, 0, 0)
 
-#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
-
-#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
-
-#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
-
-/* Event code number extraction depends on which type of event we have.
- * Perhaps review this function in the future*/
-#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((__s16)(mask & 0xFFFF))
-#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((__s16)(((mask) >> 16) & 0xFFFF))
-
-#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
-#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)
-
 #endif
diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
index 80d855061064..d86b753e9b30 100644
--- a/include/linux/iio/iio.h
+++ b/include/linux/iio/iio.h
@@ -338,6 +338,16 @@ struct iio_dev;
  *                      provide a custom of_xlate function that reads the
  *                      *args* and returns the appropriate index in registered
  *                      IIO channels array.
+ * @hwfifo_set_watermark: function pointer to set the current hardware
+ *                      fifo watermark level; see hwfifo_* entries in
+ *                      Documentation/ABI/testing/sysfs-bus-iio for details on
+ *                      how the hardware fifo operates
+ * @hwfifo_flush_to_buffer: function pointer to flush the samples stored
+ *                      in the hardware fifo to the device buffer. The driver
+ *                      should not flush more than count samples. The function
+ *                      must return the number of samples flushed, 0 if no
+ *                      samples were flushed or a negative integer if no samples
+ *                      were flushed and there was an error.
  **/
 struct iio_info {
         struct module                   *driver_module;
@@ -399,6 +409,9 @@ struct iio_info {
                                   unsigned *readval);
         int (*of_xlate)(struct iio_dev *indio_dev,
                         const struct of_phandle_args *iiospec);
+        int (*hwfifo_set_watermark)(struct iio_dev *indio_dev, unsigned val);
+        int (*hwfifo_flush_to_buffer)(struct iio_dev *indio_dev,
+                                      unsigned count);
 };
 
 /**
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 580ed5bdb3fa..942b6de68e2f 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -10,76 +10,7 @@
 #ifndef _IIO_TYPES_H_
 #define _IIO_TYPES_H_
 
-enum iio_chan_type {
-        IIO_VOLTAGE,
-        IIO_CURRENT,
-        IIO_POWER,
-        IIO_ACCEL,
-        IIO_ANGL_VEL,
-        IIO_MAGN,
-        IIO_LIGHT,
-        IIO_INTENSITY,
-        IIO_PROXIMITY,
-        IIO_TEMP,
-        IIO_INCLI,
-        IIO_ROT,
-        IIO_ANGL,
-        IIO_TIMESTAMP,
-        IIO_CAPACITANCE,
-        IIO_ALTVOLTAGE,
-        IIO_CCT,
-        IIO_PRESSURE,
-        IIO_HUMIDITYRELATIVE,
-        IIO_ACTIVITY,
-        IIO_STEPS,
-        IIO_ENERGY,
-        IIO_DISTANCE,
-        IIO_VELOCITY,
-};
-
-enum iio_modifier {
-        IIO_NO_MOD,
-        IIO_MOD_X,
-        IIO_MOD_Y,
-        IIO_MOD_Z,
-        IIO_MOD_X_AND_Y,
-        IIO_MOD_X_AND_Z,
-        IIO_MOD_Y_AND_Z,
-        IIO_MOD_X_AND_Y_AND_Z,
-        IIO_MOD_X_OR_Y,
-        IIO_MOD_X_OR_Z,
-        IIO_MOD_Y_OR_Z,
-        IIO_MOD_X_OR_Y_OR_Z,
-        IIO_MOD_LIGHT_BOTH,
-        IIO_MOD_LIGHT_IR,
-        IIO_MOD_ROOT_SUM_SQUARED_X_Y,
-        IIO_MOD_SUM_SQUARED_X_Y_Z,
-        IIO_MOD_LIGHT_CLEAR,
-        IIO_MOD_LIGHT_RED,
-        IIO_MOD_LIGHT_GREEN,
-        IIO_MOD_LIGHT_BLUE,
-        IIO_MOD_QUATERNION,
-        IIO_MOD_TEMP_AMBIENT,
-        IIO_MOD_TEMP_OBJECT,
-        IIO_MOD_NORTH_MAGN,
-        IIO_MOD_NORTH_TRUE,
-        IIO_MOD_NORTH_MAGN_TILT_COMP,
-        IIO_MOD_NORTH_TRUE_TILT_COMP,
-        IIO_MOD_RUNNING,
-        IIO_MOD_JOGGING,
-        IIO_MOD_WALKING,
-        IIO_MOD_STILL,
-        IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
-};
-
-enum iio_event_type {
-        IIO_EV_TYPE_THRESH,
-        IIO_EV_TYPE_MAG,
-        IIO_EV_TYPE_ROC,
-        IIO_EV_TYPE_THRESH_ADAPTIVE,
-        IIO_EV_TYPE_MAG_ADAPTIVE,
-        IIO_EV_TYPE_CHANGE,
-};
+#include <uapi/linux/iio/types.h>
 
 enum iio_event_info {
         IIO_EV_INFO_ENABLE,
@@ -88,13 +19,6 @@ enum iio_event_info {
         IIO_EV_INFO_PERIOD,
 };
 
-enum iio_event_direction {
-        IIO_EV_DIR_EITHER,
-        IIO_EV_DIR_RISING,
-        IIO_EV_DIR_FALLING,
-        IIO_EV_DIR_NONE,
-};
-
 #define IIO_VAL_INT 1
 #define IIO_VAL_INT_PLUS_MICRO 2
 #define IIO_VAL_INT_PLUS_NANO 3
diff --git a/include/linux/init.h b/include/linux/init.h
index 2df8e8dd10a4..21b6d768edd7 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -253,21 +253,41 @@ struct obs_kernel_param {
  * obs_kernel_param "array" too far apart in .init.setup.
  */
 #define __setup_param(str, unique_id, fn, early)                        \
-        static const char __setup_str_##unique_id[] __initconst \
-                __aligned(1) = str; \
-        static struct obs_kernel_param __setup_##unique_id      \
-                __used __section(.init.setup)                   \
-                __attribute__((aligned((sizeof(long)))))        \
+        static const char __setup_str_##unique_id[] __initconst         \
+                __aligned(1) = str;                                     \
+        static struct obs_kernel_param __setup_##unique_id              \
+                __used __section(.init.setup)                           \
+                __attribute__((aligned((sizeof(long)))))                \
                 = { __setup_str_##unique_id, fn, early }
 
-#define __setup(str, fn)                                        \
+#define __setup(str, fn)                                                \
         __setup_param(str, fn, fn, 0)
 
-/* NOTE: fn is as per module_param, not __setup!  Emits warning if fn
- * returns non-zero. */
-#define early_param(str, fn)                                    \
+/*
+ * NOTE: fn is as per module_param, not __setup!
+ * Emits warning if fn returns non-zero.
+ */
+#define early_param(str, fn)                                            \
         __setup_param(str, fn, fn, 1)
 
+#define early_param_on_off(str_on, str_off, var, config)                \
+                                                                        \
+        int var = IS_ENABLED(config);                                   \
+                                                                        \
+        static int __init parse_##var##_on(char *arg)                   \
+        {                                                               \
+                var = 1;                                                \
+                return 0;                                               \
+        }                                                               \
+        __setup_param(str_on, parse_##var##_on, parse_##var##_on, 1);   \
+                                                                        \
+        static int __init parse_##var##_off(char *arg)                  \
+        {                                                               \
+                var = 0;                                                \
+                return 0;                                               \
+        }                                                               \
+        __setup_param(str_off, parse_##var##_off, parse_##var##_off, 1)
+
 /* Relies on boot_command_line being set */
 void __init parse_early_param(void);
 void __init parse_early_options(char *cmdline);
diff --git a/include/linux/intel_mid_dma.h b/include/linux/intel_mid_dma.h
deleted file mode 100644
index 10496bd24c5c..000000000000
--- a/include/linux/intel_mid_dma.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- *  intel_mid_dma.h - Intel MID DMA Drivers
- *
- *  Copyright (C) 2008-10 Intel Corp
- *  Author: Vinod Koul <vinod.koul@intel.com>
- *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
- *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *
- */
-#ifndef __INTEL_MID_DMA_H__
-#define __INTEL_MID_DMA_H__
-
-#include <linux/dmaengine.h>
-
-#define DMA_PREP_CIRCULAR_LIST          (1 << 10)
-
-/*DMA mode configurations*/
-enum intel_mid_dma_mode {
-        LNW_DMA_PER_TO_MEM = 0, /*periphral to memory configuration*/
-        LNW_DMA_MEM_TO_PER,     /*memory to periphral configuration*/
-        LNW_DMA_MEM_TO_MEM,     /*mem to mem confg (testing only)*/
-};
-
-/*DMA handshaking*/
-enum intel_mid_dma_hs_mode {
-        LNW_DMA_HW_HS = 0,      /*HW Handshaking only*/
-        LNW_DMA_SW_HS = 1,      /*SW Handshaking not recommended*/
-};
-
-/*Burst size configuration*/
-enum intel_mid_dma_msize {
-        LNW_DMA_MSIZE_1 = 0x0,
-        LNW_DMA_MSIZE_4 = 0x1,
-        LNW_DMA_MSIZE_8 = 0x2,
-        LNW_DMA_MSIZE_16 = 0x3,
-        LNW_DMA_MSIZE_32 = 0x4,
-        LNW_DMA_MSIZE_64 = 0x5,
-};
-
-/**
- * struct intel_mid_dma_slave - DMA slave structure
- *
- * @dirn: DMA trf direction
- * @src_width: tx register width
- * @dst_width: rx register width
- * @hs_mode: HW/SW handshaking mode
- * @cfg_mode: DMA data transfer mode (per-per/mem-per/mem-mem)
- * @src_msize: Source DMA burst size
- * @dst_msize: Dst DMA burst size
- * @per_addr: Periphral address
- * @device_instance: DMA peripheral device instance, we can have multiple
- *              peripheral device connected to single DMAC
- */
-struct intel_mid_dma_slave {
-        enum intel_mid_dma_hs_mode      hs_mode;  /*handshaking*/
-        enum intel_mid_dma_mode         cfg_mode; /*mode configuration*/
-        unsigned int            device_instance; /*0, 1 for periphral instance*/
-        struct dma_slave_config         dma_slave;
-};
-
-#endif /*__INTEL_MID_DMA_H__*/
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 2e88580194f0..950ae4501826 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -39,8 +39,6 @@
  * These flags used only by the kernel as part of the
  * irq handling routines.
  *
- * IRQF_DISABLED - keep irqs disabled when calling the action handler.
- *                 DEPRECATED. This flag is a NOOP and scheduled to be removed
  * IRQF_SHARED - allow sharing the irq among several devices
  * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
  * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
@@ -64,7 +62,6 @@
  *                wakeup devices users need to implement wakeup detection in
  *                their interrupt handlers.
  */
-#define IRQF_DISABLED           0x00000020
 #define IRQF_SHARED             0x00000080
 #define IRQF_PROBE_SHARED       0x00000100
 #define __IRQF_TIMER            0x00000200
@@ -191,6 +188,7 @@ extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id);
 #endif
 
 extern void disable_irq_nosync(unsigned int irq);
+extern bool disable_hardirq(unsigned int irq);
 extern void disable_irq(unsigned int irq);
 extern void disable_percpu_irq(unsigned int irq);
 extern void enable_irq(unsigned int irq);
@@ -363,6 +361,20 @@ static inline int disable_irq_wake(unsigned int irq)
         return irq_set_irq_wake(irq, 0);
 }
 
+/*
+ * irq_get_irqchip_state/irq_set_irqchip_state specific flags
+ */
+enum irqchip_irq_state {
+        IRQCHIP_STATE_PENDING,          /* Is interrupt pending? */
+        IRQCHIP_STATE_ACTIVE,           /* Is interrupt in progress? */
+        IRQCHIP_STATE_MASKED,           /* Is interrupt masked? */
+        IRQCHIP_STATE_LINE_LEVEL,       /* Is IRQ line high? */
+};
+
+extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+                                 bool *state);
+extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+                                 bool state);
 
 #ifdef CONFIG_IRQ_FORCED_THREADING
 extern bool force_irqthreads;
diff --git a/include/linux/io.h b/include/linux/io.h
index fa02e55e5a2e..4cc299c598e0 100644
--- a/include/linux/io.h
+++ b/include/linux/io.h
@@ -38,6 +38,14 @@ static inline int ioremap_page_range(unsigned long addr, unsigned long end,
 }
 #endif
 
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+void __init ioremap_huge_init(void);
+int arch_ioremap_pud_supported(void);
+int arch_ioremap_pmd_supported(void);
+#else
+static inline void ioremap_huge_init(void) { }
+#endif
+
 /*
  * Managed iomap interface
  */
diff --git a/include/linux/irq.h b/include/linux/irq.h
index d09ec7a1243e..62c6901cab55 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -30,6 +30,7 @@
 struct seq_file;
 struct module;
 struct msi_msg;
+enum irqchip_irq_state;
 
 /*
  * IRQ line status.
@@ -324,6 +325,8 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
  *                              irq_request_resources
  * @irq_compose_msi_msg:        optional to compose message content for MSI
  * @irq_write_msi_msg:  optional to write message content for MSI
+ * @irq_get_irqchip_state:      return the internal state of an interrupt
+ * @irq_set_irqchip_state:      set the internal state of a interrupt
  * @flags:              chip specific flags
  */
 struct irq_chip {
@@ -363,6 +366,9 @@ struct irq_chip {
         void            (*irq_compose_msi_msg)(struct irq_data *data, struct msi_msg *msg);
         void            (*irq_write_msi_msg)(struct irq_data *data, struct msi_msg *msg);
 
+        int             (*irq_get_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool *state);
+        int             (*irq_set_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool state);
+
         unsigned long   flags;
 };
 
@@ -460,6 +466,7 @@ extern void irq_chip_eoi_parent(struct irq_data *data);
 extern int irq_chip_set_affinity_parent(struct irq_data *data,
                                         const struct cpumask *dest,
                                         bool force);
+extern int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on);
 #endif
 
 /* Handling of unhandled and spurious interrupts: */
diff --git a/include/linux/irq_work.h b/include/linux/irq_work.h
index bf3fe719c7ce..47b9ebd4a74f 100644
--- a/include/linux/irq_work.h
+++ b/include/linux/irq_work.h
@@ -38,16 +38,17 @@ bool irq_work_queue(struct irq_work *work);
 bool irq_work_queue_on(struct irq_work *work, int cpu);
 #endif
 
-void irq_work_run(void);
 void irq_work_tick(void);
 void irq_work_sync(struct irq_work *work);
 
 #ifdef CONFIG_IRQ_WORK
 #include <asm/irq_work.h>
 
+void irq_work_run(void);
 bool irq_work_needs_cpu(void);
 #else
 static inline bool irq_work_needs_cpu(void) { return false; }
+static inline void irq_work_run(void) { }
 #endif
 
 #endif /* _LINUX_IRQ_WORK_H */
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 71d706d5f169..36ec4ae74634 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -97,6 +97,7 @@ struct device_node;
 
 extern struct irq_chip gic_arch_extn;
 
+void gic_set_irqchip_flags(unsigned long flags);
 void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
                     u32 offset, struct device_node *);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
@@ -115,11 +116,5 @@ int gic_get_cpu_id(unsigned int cpu);
 void gic_migrate_target(unsigned int new_cpu_id);
 unsigned long gic_get_sgir_physaddr(void);
 
-extern const struct irq_domain_ops *gic_routable_irq_domain_ops;
-static inline void __init register_routable_domain_ops
-                                        (const struct irq_domain_ops *ops)
-{
-        gic_routable_irq_domain_ops = ops;
-}
 #endif /* __ASSEMBLY */
 #endif
diff --git a/include/linux/irqchip/irq-crossbar.h b/include/linux/irqchip/irq-crossbar.h
deleted file mode 100644
index e5537b81df8d..000000000000
--- a/include/linux/irqchip/irq-crossbar.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- *  drivers/irqchip/irq-crossbar.h
- *
- *  Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-int irqcrossbar_init(void);
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index e6a6aac451db..3ea2e4754c40 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -240,6 +240,8 @@ extern unsigned int gic_get_count_width(void);
 extern cycle_t gic_read_compare(void);
 extern void gic_write_compare(cycle_t cnt);
 extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
+extern void gic_start_count(void);
+extern void gic_stop_count(void);
 extern void gic_send_ipi(unsigned int intr);
 extern unsigned int plat_ipi_call_int_xlate(unsigned int);
 extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
diff --git a/include/linux/irqflags.h b/include/linux/irqflags.h
index d176d658fe25..5dd1272d1ab2 100644
--- a/include/linux/irqflags.h
+++ b/include/linux/irqflags.h
@@ -85,7 +85,7 @@
  * The local_irq_*() APIs are equal to the raw_local_irq*()
  * if !TRACE_IRQFLAGS.
  */
-#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT
+#ifdef CONFIG_TRACE_IRQFLAGS
 #define local_irq_enable() \
         do { trace_hardirqs_on(); raw_local_irq_enable(); } while (0)
 #define local_irq_disable() \
@@ -107,22 +107,6 @@
                         raw_local_irq_restore(flags);   \
                 }                                       \
         } while (0)
-#define local_save_flags(flags)                         \
-        do {                                            \
-                raw_local_save_flags(flags);            \
-        } while (0)
-
-#define irqs_disabled_flags(flags)                      \
-        ({                                              \
-                raw_irqs_disabled_flags(flags);         \
-        })
-
-#define irqs_disabled()                                 \
-        ({                                              \
-                unsigned long _flags;                   \
-                raw_local_save_flags(_flags);           \
-                raw_irqs_disabled_flags(_flags);        \
-        })
 
 #define safe_halt()                             \
         do {                                    \
@@ -131,7 +115,7 @@
         } while (0)
 
 
-#else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */
+#else /* !CONFIG_TRACE_IRQFLAGS */
 
 #define local_irq_enable()      do { raw_local_irq_enable(); } while (0)
 #define local_irq_disable()     do { raw_local_irq_disable(); } while (0)
@@ -140,11 +124,28 @@
                 raw_local_irq_save(flags);                      \
         } while (0)
 #define local_irq_restore(flags) do { raw_local_irq_restore(flags); } while (0)
-#define local_save_flags(flags) do { raw_local_save_flags(flags); } while (0)
-#define irqs_disabled()         (raw_irqs_disabled())
-#define irqs_disabled_flags(flags) (raw_irqs_disabled_flags(flags))
 #define safe_halt()             do { raw_safe_halt(); } while (0)
 
+#endif /* CONFIG_TRACE_IRQFLAGS */
+
+#define local_save_flags(flags) raw_local_save_flags(flags)
+
+/*
+ * Some architectures don't define arch_irqs_disabled(), so even if either
+ * definition would be fine we need to use different ones for the time being
+ * to avoid build issues.
+ */
+#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT
+#define irqs_disabled()                                 \
+        ({                                              \
+                unsigned long _flags;                   \
+                raw_local_save_flags(_flags);           \
+                raw_irqs_disabled_flags(_flags);        \
+        })
+#else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */
+#define irqs_disabled() raw_irqs_disabled()
 #endif /* CONFIG_TRACE_IRQFLAGS_SUPPORT */
 
+#define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags)
+
 #endif
diff --git a/include/linux/jump_label.h b/include/linux/jump_label.h
index 98f923b6a0ea..f4de473f226b 100644
--- a/include/linux/jump_label.h
+++ b/include/linux/jump_label.h
@@ -45,6 +45,12 @@
  * same as using STATIC_KEY_INIT_FALSE.
  */
 
+#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_JUMP_LABEL)
+# define HAVE_JUMP_LABEL
+#endif
+
+#ifndef __ASSEMBLY__
+
 #include <linux/types.h>
 #include <linux/compiler.h>
 #include <linux/bug.h>
@@ -55,7 +61,7 @@ extern bool static_key_initialized;
                                     "%s used before call to jump_label_init", \
                                     __func__)
 
-#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_JUMP_LABEL)
+#ifdef HAVE_JUMP_LABEL
 
 struct static_key {
         atomic_t enabled;
@@ -66,13 +72,18 @@ struct static_key {
 #endif
 };
 
-# include <asm/jump_label.h>
-# define HAVE_JUMP_LABEL
 #else
 struct static_key {
         atomic_t enabled;
 };
-#endif  /* CC_HAVE_ASM_GOTO && CONFIG_JUMP_LABEL */
+#endif  /* HAVE_JUMP_LABEL */
+#endif /* __ASSEMBLY__ */
+
+#ifdef HAVE_JUMP_LABEL
+#include <asm/jump_label.h>
+#endif
+
+#ifndef __ASSEMBLY__
 
 enum jump_label_type {
         JUMP_LABEL_DISABLE = 0,
@@ -203,3 +214,5 @@ static inline bool static_key_enabled(struct static_key *key)
 }
 
 #endif  /* _LINUX_JUMP_LABEL_H */
+
+#endif /* __ASSEMBLY__ */
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index d12b2104d19b..ad45054309a0 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -165,12 +165,12 @@ enum kvm_bus {
         KVM_NR_BUSES
 };
 
-int kvm_io_bus_write(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
+int kvm_io_bus_write(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
                      int len, const void *val);
-int kvm_io_bus_write_cookie(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
-                            int len, const void *val, long cookie);
-int kvm_io_bus_read(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr, int len,
-                    void *val);
+int kvm_io_bus_write_cookie(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx,
+                            gpa_t addr, int len, const void *val, long cookie);
+int kvm_io_bus_read(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
+                    int len, void *val);
 int kvm_io_bus_register_dev(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
                             int len, struct kvm_io_device *dev);
 int kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx,
@@ -658,7 +658,6 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu);
 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu);
 
 void *kvm_kvzalloc(unsigned long size);
-void kvm_kvfree(const void *addr);
 
 #ifndef __KVM_HAVE_ARCH_VM_ALLOC
 static inline struct kvm *kvm_arch_alloc_vm(void)
@@ -700,6 +699,20 @@ static inline wait_queue_head_t *kvm_arch_vcpu_wq(struct kvm_vcpu *vcpu)
 #endif
 }
 
+#ifdef __KVM_HAVE_ARCH_INTC_INITIALIZED
+/*
+ * returns true if the virtual interrupt controller is initialized and
+ * ready to accept virtual IRQ. On some architectures the virtual interrupt
+ * controller is dynamically instantiated and this is not always true.
+ */
+bool kvm_arch_intc_initialized(struct kvm *kvm);
+#else
+static inline bool kvm_arch_intc_initialized(struct kvm *kvm)
+{
+        return true;
+}
+#endif
+
 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type);
 void kvm_arch_destroy_vm(struct kvm *kvm);
 void kvm_arch_sync_events(struct kvm *kvm);
@@ -766,7 +779,8 @@ static inline void kvm_guest_enter(void)
          * one time slice). Lets treat guest mode as quiescent state, just like
          * we do with user-mode execution.
          */
-        rcu_virt_note_context_switch(smp_processor_id());
+        if (!context_tracking_cpu_is_enabled())
+                rcu_virt_note_context_switch(smp_processor_id());
 }
 
 static inline void kvm_guest_exit(void)
@@ -969,11 +983,16 @@ static inline int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
 #endif /* CONFIG_HAVE_KVM_EVENTFD */
 
 #ifdef CONFIG_KVM_APIC_ARCHITECTURE
-static inline bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
+static inline bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
 {
         return vcpu->kvm->bsp_vcpu_id == vcpu->vcpu_id;
 }
 
+static inline bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
+{
+        return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
+}
+
 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu);
 
 #else
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 6b08cc106c21..8dad4a307bb8 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -231,8 +231,7 @@ enum {
         ATA_FLAG_SW_ACTIVITY    = (1 << 22), /* driver supports sw activity
                                               * led */
         ATA_FLAG_NO_DIPM        = (1 << 23), /* host not happy with DIPM */
-        ATA_FLAG_LOWTAG         = (1 << 24), /* host wants lowest available tag */
-        ATA_FLAG_SAS_HOST       = (1 << 25), /* SAS host */
+        ATA_FLAG_SAS_HOST       = (1 << 24), /* SAS host */
 
         /* bits 24:31 of ap->flags are reserved for LLD specific flags */
 
diff --git a/include/linux/livepatch.h b/include/linux/livepatch.h
index 95023fd8b00d..ee6dbb39a809 100644
--- a/include/linux/livepatch.h
+++ b/include/linux/livepatch.h
@@ -123,10 +123,10 @@ struct klp_patch {
         enum klp_state state;
 };
 
-extern int klp_register_patch(struct klp_patch *);
-extern int klp_unregister_patch(struct klp_patch *);
-extern int klp_enable_patch(struct klp_patch *);
-extern int klp_disable_patch(struct klp_patch *);
+int klp_register_patch(struct klp_patch *);
+int klp_unregister_patch(struct klp_patch *);
+int klp_enable_patch(struct klp_patch *);
+int klp_disable_patch(struct klp_patch *);
 
 #endif /* CONFIG_LIVEPATCH */
 
diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h
index 74ab23176e9b..066ba4157541 100644
--- a/include/linux/lockdep.h
+++ b/include/linux/lockdep.h
@@ -531,8 +531,13 @@ do {									\
 # define might_lock_read(lock) do { } while (0)
 #endif
 
-#ifdef CONFIG_PROVE_RCU
+#ifdef CONFIG_LOCKDEP
 void lockdep_rcu_suspicious(const char *file, const int line, const char *s);
+#else
+static inline void
+lockdep_rcu_suspicious(const char *file, const int line, const char *s)
+{
+}
 #endif
 
 #endif /* __LINUX_LOCKDEP_H */
diff --git a/include/linux/memblock.h b/include/linux/memblock.h
index e8cc45307f8f..9497ec7c77ea 100644
--- a/include/linux/memblock.h
+++ b/include/linux/memblock.h
@@ -365,6 +365,14 @@ static inline unsigned long memblock_region_reserved_end_pfn(const struct memblo
 #define __initdata_memblock
 #endif
 
+#ifdef CONFIG_MEMTEST
+extern void early_memtest(phys_addr_t start, phys_addr_t end);
+#else
+static inline void early_memtest(phys_addr_t start, phys_addr_t end)
+{
+}
+#endif
+
 #else
 static inline phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align)
 {
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 8f1a41951df9..6ffa0ac7f7d6 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -192,6 +192,9 @@ extern void get_page_bootmem(unsigned long ingo, struct page *page,
 void get_online_mems(void);
 void put_online_mems(void);
 
+void mem_hotplug_begin(void);
+void mem_hotplug_done(void);
+
 #else /* ! CONFIG_MEMORY_HOTPLUG */
 /*
  * Stub functions for when hotplug is off
@@ -231,6 +234,9 @@ static inline int try_online_node(int nid)
 static inline void get_online_mems(void) {}
 static inline void put_online_mems(void) {}
 
+static inline void mem_hotplug_begin(void) {}
+static inline void mem_hotplug_done(void) {}
+
 #endif /* ! CONFIG_MEMORY_HOTPLUG */
 
 #ifdef CONFIG_MEMORY_HOTREMOVE
diff --git a/include/linux/mempool.h b/include/linux/mempool.h
index 39ed62ab5b8a..b19b3023c880 100644
--- a/include/linux/mempool.h
+++ b/include/linux/mempool.h
@@ -29,7 +29,7 @@ extern mempool_t *mempool_create_node(int min_nr, mempool_alloc_t *alloc_fn,
                         mempool_free_t *free_fn, void *pool_data,
                         gfp_t gfp_mask, int nid);
 
-extern int mempool_resize(mempool_t *pool, int new_min_nr, gfp_t gfp_mask);
+extern int mempool_resize(mempool_t *pool, int new_min_nr);
 extern void mempool_destroy(mempool_t *pool);
 extern void * mempool_alloc(mempool_t *pool, gfp_t gfp_mask);
 extern void mempool_free(void *element, mempool_t *pool);
diff --git a/include/linux/mfd/abx500/ux500_chargalg.h b/include/linux/mfd/abx500/ux500_chargalg.h
index 234c99143bf7..67703f23e7ba 100644
--- a/include/linux/mfd/abx500/ux500_chargalg.h
+++ b/include/linux/mfd/abx500/ux500_chargalg.h
@@ -9,8 +9,13 @@
 
 #include <linux/power_supply.h>
 
-#define psy_to_ux500_charger(x) container_of((x), \
-                struct ux500_charger, psy)
+/*
+ * Valid only for supplies of type:
+ * - POWER_SUPPLY_TYPE_MAINS,
+ * - POWER_SUPPLY_TYPE_USB,
+ * because only them store as drv_data pointer to struct ux500_charger.
+ */
+#define psy_to_ux500_charger(x) power_supply_get_drvdata(psy)
 
 /* Forward declaration */
 struct ux500_charger;
@@ -35,7 +40,7 @@ struct ux500_charger_ops {
  * @power_path          USB power path support
  */
 struct ux500_charger {
-        struct power_supply psy;
+        struct power_supply *psy;
         struct ux500_charger_ops ops;
         int max_out_volt;
         int max_out_curr;
diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h
index 910e3aa1e965..f97010576f56 100644
--- a/include/linux/mfd/arizona/core.h
+++ b/include/linux/mfd/arizona/core.h
@@ -24,6 +24,7 @@ enum arizona_type {
         WM5102 = 1,
         WM5110 = 2,
         WM8997 = 3,
+        WM8280 = 4,
 };
 
 #define ARIZONA_IRQ_GP1                    0
diff --git a/include/linux/mfd/arizona/gpio.h b/include/linux/mfd/arizona/gpio.h
deleted file mode 100644
index d2146bb74f89..000000000000
--- a/include/linux/mfd/arizona/gpio.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * GPIO configuration for Arizona devices
- *
- * Copyright 2013 Wolfson Microelectronics. PLC.
- *
- * Author: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _ARIZONA_GPIO_H
-#define _ARIZONA_GPIO_H
-
-#define ARIZONA_GP_FN_TXLRCLK                    0x00
-#define ARIZONA_GP_FN_GPIO                       0x01
-#define ARIZONA_GP_FN_IRQ1                       0x02
-#define ARIZONA_GP_FN_IRQ2                       0x03
-#define ARIZONA_GP_FN_OPCLK                      0x04
-#define ARIZONA_GP_FN_FLL1_OUT                   0x05
-#define ARIZONA_GP_FN_FLL2_OUT                   0x06
-#define ARIZONA_GP_FN_PWM1                       0x08
-#define ARIZONA_GP_FN_PWM2                       0x09
-#define ARIZONA_GP_FN_SYSCLK_UNDERCLOCKED        0x0A
-#define ARIZONA_GP_FN_ASYNCCLK_UNDERCLOCKED      0x0B
-#define ARIZONA_GP_FN_FLL1_LOCK                  0x0C
-#define ARIZONA_GP_FN_FLL2_LOCK                  0x0D
-#define ARIZONA_GP_FN_FLL1_CLOCK_OK              0x0F
-#define ARIZONA_GP_FN_FLL2_CLOCK_OK              0x10
-#define ARIZONA_GP_FN_HEADPHONE_DET              0x12
-#define ARIZONA_GP_FN_MIC_DET                    0x13
-#define ARIZONA_GP_FN_WSEQ_STATUS                0x15
-#define ARIZONA_GP_FN_CIF_ADDRESS_ERROR          0x16
-#define ARIZONA_GP_FN_ASRC1_LOCK                 0x1A
-#define ARIZONA_GP_FN_ASRC2_LOCK                 0x1B
-#define ARIZONA_GP_FN_ASRC_CONFIG_ERROR          0x1C
-#define ARIZONA_GP_FN_DRC1_SIGNAL_DETECT         0x1D
-#define ARIZONA_GP_FN_DRC1_ANTICLIP              0x1E
-#define ARIZONA_GP_FN_DRC1_DECAY                 0x1F
-#define ARIZONA_GP_FN_DRC1_NOISE                 0x20
-#define ARIZONA_GP_FN_DRC1_QUICK_RELEASE         0x21
-#define ARIZONA_GP_FN_DRC2_SIGNAL_DETECT         0x22
-#define ARIZONA_GP_FN_DRC2_ANTICLIP              0x23
-#define ARIZONA_GP_FN_DRC2_DECAY                 0x24
-#define ARIZONA_GP_FN_DRC2_NOISE                 0x25
-#define ARIZONA_GP_FN_DRC2_QUICK_RELEASE         0x26
-#define ARIZONA_GP_FN_MIXER_DROPPED_SAMPLE       0x27
-#define ARIZONA_GP_FN_AIF1_CONFIG_ERROR          0x28
-#define ARIZONA_GP_FN_AIF2_CONFIG_ERROR          0x29
-#define ARIZONA_GP_FN_AIF3_CONFIG_ERROR          0x2A
-#define ARIZONA_GP_FN_SPK_TEMP_SHUTDOWN          0x2B
-#define ARIZONA_GP_FN_SPK_TEMP_WARNING           0x2C
-#define ARIZONA_GP_FN_UNDERCLOCKED               0x2D
-#define ARIZONA_GP_FN_OVERCLOCKED                0x2E
-#define ARIZONA_GP_FN_DSP_IRQ1                   0x35
-#define ARIZONA_GP_FN_DSP_IRQ2                   0x36
-#define ARIZONA_GP_FN_ASYNC_OPCLK                0x3D
-#define ARIZONA_GP_FN_BOOT_DONE                  0x44
-#define ARIZONA_GP_FN_DSP1_RAM_READY             0x45
-#define ARIZONA_GP_FN_SYSCLK_ENA_STATUS          0x4B
-#define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS        0x4C
-
-#define ARIZONA_GPN_DIR                          0x8000  /* GPN_DIR */
-#define ARIZONA_GPN_DIR_MASK                     0x8000  /* GPN_DIR */
-#define ARIZONA_GPN_DIR_SHIFT                        15  /* GPN_DIR */
-#define ARIZONA_GPN_DIR_WIDTH                         1  /* GPN_DIR */
-#define ARIZONA_GPN_PU                           0x4000  /* GPN_PU */
-#define ARIZONA_GPN_PU_MASK                      0x4000  /* GPN_PU */
-#define ARIZONA_GPN_PU_SHIFT                         14  /* GPN_PU */
-#define ARIZONA_GPN_PU_WIDTH                          1  /* GPN_PU */
-#define ARIZONA_GPN_PD                           0x2000  /* GPN_PD */
-#define ARIZONA_GPN_PD_MASK                      0x2000  /* GPN_PD */
-#define ARIZONA_GPN_PD_SHIFT                         13  /* GPN_PD */
-#define ARIZONA_GPN_PD_WIDTH                          1  /* GPN_PD */
-#define ARIZONA_GPN_LVL                          0x0800  /* GPN_LVL */
-#define ARIZONA_GPN_LVL_MASK                     0x0800  /* GPN_LVL */
-#define ARIZONA_GPN_LVL_SHIFT                        11  /* GPN_LVL */
-#define ARIZONA_GPN_LVL_WIDTH                         1  /* GPN_LVL */
-#define ARIZONA_GPN_POL                          0x0400  /* GPN_POL */
-#define ARIZONA_GPN_POL_MASK                     0x0400  /* GPN_POL */
-#define ARIZONA_GPN_POL_SHIFT                        10  /* GPN_POL */
-#define ARIZONA_GPN_POL_WIDTH                         1  /* GPN_POL */
-#define ARIZONA_GPN_OP_CFG                       0x0200  /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_MASK                  0x0200  /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_SHIFT                      9  /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_WIDTH                      1  /* GPN_OP_CFG */
-#define ARIZONA_GPN_DB                           0x0100  /* GPN_DB */
-#define ARIZONA_GPN_DB_MASK                      0x0100  /* GPN_DB */
-#define ARIZONA_GPN_DB_SHIFT                          8  /* GPN_DB */
-#define ARIZONA_GPN_DB_WIDTH                          1  /* GPN_DB */
-#define ARIZONA_GPN_FN_MASK                      0x007F  /* GPN_DB */
-#define ARIZONA_GPN_FN_SHIFT                          0  /* GPN_DB */
-#define ARIZONA_GPN_FN_WIDTH                          7  /* GPN_DB */
-
-#endif
diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h
index 4578c72c9b86..1789cb0f4f17 100644
--- a/include/linux/mfd/arizona/pdata.h
+++ b/include/linux/mfd/arizona/pdata.h
@@ -11,31 +11,26 @@
 #ifndef _ARIZONA_PDATA_H
 #define _ARIZONA_PDATA_H
 
-#define ARIZONA_GPN_DIR                          0x8000  /* GPN_DIR */
+#include <dt-bindings/mfd/arizona.h>
+
 #define ARIZONA_GPN_DIR_MASK                     0x8000  /* GPN_DIR */
 #define ARIZONA_GPN_DIR_SHIFT                        15  /* GPN_DIR */
 #define ARIZONA_GPN_DIR_WIDTH                         1  /* GPN_DIR */
-#define ARIZONA_GPN_PU                           0x4000  /* GPN_PU */
 #define ARIZONA_GPN_PU_MASK                      0x4000  /* GPN_PU */
 #define ARIZONA_GPN_PU_SHIFT                         14  /* GPN_PU */
 #define ARIZONA_GPN_PU_WIDTH                          1  /* GPN_PU */
-#define ARIZONA_GPN_PD                           0x2000  /* GPN_PD */
 #define ARIZONA_GPN_PD_MASK                      0x2000  /* GPN_PD */
 #define ARIZONA_GPN_PD_SHIFT                         13  /* GPN_PD */
 #define ARIZONA_GPN_PD_WIDTH                          1  /* GPN_PD */
-#define ARIZONA_GPN_LVL                          0x0800  /* GPN_LVL */
 #define ARIZONA_GPN_LVL_MASK                     0x0800  /* GPN_LVL */
 #define ARIZONA_GPN_LVL_SHIFT                        11  /* GPN_LVL */
 #define ARIZONA_GPN_LVL_WIDTH                         1  /* GPN_LVL */
-#define ARIZONA_GPN_POL                          0x0400  /* GPN_POL */
 #define ARIZONA_GPN_POL_MASK                     0x0400  /* GPN_POL */
 #define ARIZONA_GPN_POL_SHIFT                        10  /* GPN_POL */
 #define ARIZONA_GPN_POL_WIDTH                         1  /* GPN_POL */
-#define ARIZONA_GPN_OP_CFG                       0x0200  /* GPN_OP_CFG */
 #define ARIZONA_GPN_OP_CFG_MASK                  0x0200  /* GPN_OP_CFG */
 #define ARIZONA_GPN_OP_CFG_SHIFT                      9  /* GPN_OP_CFG */
 #define ARIZONA_GPN_OP_CFG_WIDTH                      1  /* GPN_OP_CFG */
-#define ARIZONA_GPN_DB                           0x0100  /* GPN_DB */
 #define ARIZONA_GPN_DB_MASK                      0x0100  /* GPN_DB */
 #define ARIZONA_GPN_DB_SHIFT                          8  /* GPN_DB */
 #define ARIZONA_GPN_DB_WIDTH                          1  /* GPN_DB */
@@ -45,23 +40,10 @@
 
 #define ARIZONA_MAX_GPIO 5
 
-#define ARIZONA_32KZ_MCLK1 1
-#define ARIZONA_32KZ_MCLK2 2
-#define ARIZONA_32KZ_NONE  3
-
 #define ARIZONA_MAX_INPUT 4
 
-#define ARIZONA_DMIC_MICVDD   0
-#define ARIZONA_DMIC_MICBIAS1 1
-#define ARIZONA_DMIC_MICBIAS2 2
-#define ARIZONA_DMIC_MICBIAS3 3
-
 #define ARIZONA_MAX_MICBIAS 3
 
-#define ARIZONA_INMODE_DIFF 0
-#define ARIZONA_INMODE_SE   1
-#define ARIZONA_INMODE_DMIC 2
-
 #define ARIZONA_MAX_OUTPUT 6
 
 #define ARIZONA_MAX_AIF 3
@@ -112,7 +94,7 @@ struct arizona_pdata {
         int gpio_base;
 
         /** Pin state for GPIO pins */
-        int gpio_defaults[ARIZONA_MAX_GPIO];
+        unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
 
         /**
          * Maximum number of channels clocks will be generated for,
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h
index 955dd990beaf..51633ea6f910 100644
--- a/include/linux/mfd/max77693-private.h
+++ b/include/linux/mfd/max77693-private.h
@@ -87,6 +87,7 @@ enum max77693_pmic_reg {
 /* MAX77693 ITORCH register */
 #define TORCH_IOUT1_SHIFT       0
 #define TORCH_IOUT2_SHIFT       4
+#define TORCH_IOUT_MASK(x)      (0xf << (x))
 #define TORCH_IOUT_MIN          15625
 #define TORCH_IOUT_MAX          250000
 #define TORCH_IOUT_STEP         15625
@@ -113,8 +114,8 @@ enum max77693_pmic_reg {
 #define FLASH_EN_FLASH          0x1
 #define FLASH_EN_TORCH          0x2
 #define FLASH_EN_ON             0x3
-#define FLASH_EN_SHIFT(x)       (6 - ((x) - 1) * 2)
-#define TORCH_EN_SHIFT(x)       (2 - ((x) - 1) * 2)
+#define FLASH_EN_SHIFT(x)       (6 - (x) * 2)
+#define TORCH_EN_SHIFT(x)       (2 - (x) * 2)
 
 /* MAX77693 MAX_FLASH1 register */
 #define MAX_FLASH1_MAX_FL_EN    0x80
diff --git a/include/linux/mfd/max77693.h b/include/linux/mfd/max77693.h
index f0b6585cd874..d450f687301b 100644
--- a/include/linux/mfd/max77693.h
+++ b/include/linux/mfd/max77693.h
@@ -30,7 +30,7 @@
 #ifndef __LINUX_MFD_MAX77693_H
 #define __LINUX_MFD_MAX77693_H
 
-/* MAX77686 regulator IDs */
+/* MAX77693 regulator IDs */
 enum max77693_regulators {
         MAX77693_ESAFEOUT1 = 0,
         MAX77693_ESAFEOUT2,
@@ -38,12 +38,6 @@ enum max77693_regulators {
         MAX77693_REG_MAX,
 };
 
-struct max77693_regulator_data {
-        int id;
-        struct regulator_init_data *initdata;
-        struct device_node *of_node;
-};
-
 struct max77693_reg_data {
         u8 addr;
         u8 data;
@@ -87,26 +81,9 @@ enum max77693_led_boost_mode {
         MAX77693_LED_BOOST_FIXED,
 };
 
-struct max77693_led_platform_data {
-        u32 fleds[2];
-        u32 iout_torch[2];
-        u32 iout_flash[2];
-        u32 trigger[2];
-        u32 trigger_type[2];
-        u32 num_leds;
-        u32 boost_mode;
-        u32 flash_timeout;
-        u32 boost_vout;
-        u32 low_vsys;
-};
-
 /* MAX77693 */
 
 struct max77693_platform_data {
-        /* regulator data */
-        struct max77693_regulator_data *regulators;
-        int num_regulators;
-
         /* muic data */
         struct max77693_muic_platform_data *muic_data;
         struct max77693_led_platform_data *led_data;
diff --git a/include/linux/mfd/max77843-private.h b/include/linux/mfd/max77843-private.h
new file mode 100644
index 000000000000..7178ace8379e
--- /dev/null
+++ b/include/linux/mfd/max77843-private.h
@@ -0,0 +1,454 @@
+/*
+ * Common variables for the Maxim MAX77843 driver
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Jaewon Kim <jaewon02.kim@samsung.com>
+ * Author: Beomho Seo <beomho.seo@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __MAX77843_PRIVATE_H_
+#define __MAX77843_PRIVATE_H_
+
+#include <linux/i2c.h>
+#include <linux/regmap.h>
+
+#define I2C_ADDR_TOPSYS (0xCC >> 1)
+#define I2C_ADDR_CHG    (0xD2 >> 1)
+#define I2C_ADDR_FG     (0x6C >> 1)
+#define I2C_ADDR_MUIC   (0x4A >> 1)
+
+/* Topsys, Haptic and LED registers */
+enum max77843_sys_reg {
+        MAX77843_SYS_REG_PMICID         = 0x00,
+        MAX77843_SYS_REG_PMICREV        = 0x01,
+        MAX77843_SYS_REG_MAINCTRL1      = 0x02,
+        MAX77843_SYS_REG_INTSRC         = 0x22,
+        MAX77843_SYS_REG_INTSRCMASK     = 0x23,
+        MAX77843_SYS_REG_SYSINTSRC      = 0x24,
+        MAX77843_SYS_REG_SYSINTMASK     = 0x26,
+        MAX77843_SYS_REG_TOPSYS_STAT    = 0x28,
+        MAX77843_SYS_REG_SAFEOUTCTRL    = 0xC6,
+
+        MAX77843_SYS_REG_END,
+};
+
+enum max77843_haptic_reg {
+        MAX77843_HAP_REG_MCONFIG        = 0x10,
+
+        MAX77843_HAP_REG_END,
+};
+
+enum max77843_led_reg {
+        MAX77843_LED_REG_LEDEN          = 0x30,
+        MAX77843_LED_REG_LED0BRT        = 0x31,
+        MAX77843_LED_REG_LED1BRT        = 0x32,
+        MAX77843_LED_REG_LED2BRT        = 0x33,
+        MAX77843_LED_REG_LED3BRT        = 0x34,
+        MAX77843_LED_REG_LEDBLNK        = 0x38,
+        MAX77843_LED_REG_LEDRAMP        = 0x36,
+
+        MAX77843_LED_REG_END,
+};
+
+/* Charger registers */
+enum max77843_charger_reg {
+        MAX77843_CHG_REG_CHG_INT        = 0xB0,
+        MAX77843_CHG_REG_CHG_INT_MASK   = 0xB1,
+        MAX77843_CHG_REG_CHG_INT_OK     = 0xB2,
+        MAX77843_CHG_REG_CHG_DTLS_00    = 0xB3,
+        MAX77843_CHG_REG_CHG_DTLS_01    = 0xB4,
+        MAX77843_CHG_REG_CHG_DTLS_02    = 0xB5,
+        MAX77843_CHG_REG_CHG_CNFG_00    = 0xB7,
+        MAX77843_CHG_REG_CHG_CNFG_01    = 0xB8,
+        MAX77843_CHG_REG_CHG_CNFG_02    = 0xB9,
+        MAX77843_CHG_REG_CHG_CNFG_03    = 0xBA,
+        MAX77843_CHG_REG_CHG_CNFG_04    = 0xBB,
+        MAX77843_CHG_REG_CHG_CNFG_06    = 0xBD,
+        MAX77843_CHG_REG_CHG_CNFG_07    = 0xBE,
+        MAX77843_CHG_REG_CHG_CNFG_09    = 0xC0,
+        MAX77843_CHG_REG_CHG_CNFG_10    = 0xC1,
+        MAX77843_CHG_REG_CHG_CNFG_11    = 0xC2,
+        MAX77843_CHG_REG_CHG_CNFG_12    = 0xC3,
+
+        MAX77843_CHG_REG_END,
+};
+
+/* Fuel gauge registers */
+enum max77843_fuelgauge {
+        MAX77843_FG_REG_STATUS          = 0x00,
+        MAX77843_FG_REG_VALRT_TH        = 0x01,
+        MAX77843_FG_REG_TALRT_TH        = 0x02,
+        MAX77843_FG_REG_SALRT_TH        = 0x03,
+        MAX77843_FG_RATE_AT_RATE        = 0x04,
+        MAX77843_FG_REG_REMCAP_REP      = 0x05,
+        MAX77843_FG_REG_SOCREP          = 0x06,
+        MAX77843_FG_REG_AGE             = 0x07,
+        MAX77843_FG_REG_TEMP            = 0x08,
+        MAX77843_FG_REG_VCELL           = 0x09,
+        MAX77843_FG_REG_CURRENT         = 0x0A,
+        MAX77843_FG_REG_AVG_CURRENT     = 0x0B,
+        MAX77843_FG_REG_SOCMIX          = 0x0D,
+        MAX77843_FG_REG_SOCAV           = 0x0E,
+        MAX77843_FG_REG_REMCAP_MIX      = 0x0F,
+        MAX77843_FG_REG_FULLCAP         = 0x10,
+        MAX77843_FG_REG_AVG_TEMP        = 0x16,
+        MAX77843_FG_REG_CYCLES          = 0x17,
+        MAX77843_FG_REG_AVG_VCELL       = 0x19,
+        MAX77843_FG_REG_CONFIG          = 0x1D,
+        MAX77843_FG_REG_REMCAP_AV       = 0x1F,
+        MAX77843_FG_REG_FULLCAP_NOM     = 0x23,
+        MAX77843_FG_REG_MISCCFG         = 0x2B,
+        MAX77843_FG_REG_RCOMP           = 0x38,
+        MAX77843_FG_REG_FSTAT           = 0x3D,
+        MAX77843_FG_REG_DQACC           = 0x45,
+        MAX77843_FG_REG_DPACC           = 0x46,
+        MAX77843_FG_REG_OCV             = 0xEE,
+        MAX77843_FG_REG_VFOCV           = 0xFB,
+        MAX77843_FG_SOCVF               = 0xFF,
+
+        MAX77843_FG_END,
+};
+
+/* MUIC registers */
+enum max77843_muic_reg {
+        MAX77843_MUIC_REG_ID            = 0x00,
+        MAX77843_MUIC_REG_INT1          = 0x01,
+        MAX77843_MUIC_REG_INT2          = 0x02,
+        MAX77843_MUIC_REG_INT3          = 0x03,
+        MAX77843_MUIC_REG_STATUS1       = 0x04,
+        MAX77843_MUIC_REG_STATUS2       = 0x05,
+        MAX77843_MUIC_REG_STATUS3       = 0x06,
+        MAX77843_MUIC_REG_INTMASK1      = 0x07,
+        MAX77843_MUIC_REG_INTMASK2      = 0x08,
+        MAX77843_MUIC_REG_INTMASK3      = 0x09,
+        MAX77843_MUIC_REG_CDETCTRL1     = 0x0A,
+        MAX77843_MUIC_REG_CDETCTRL2     = 0x0B,
+        MAX77843_MUIC_REG_CONTROL1      = 0x0C,
+        MAX77843_MUIC_REG_CONTROL2      = 0x0D,
+        MAX77843_MUIC_REG_CONTROL3      = 0x0E,
+        MAX77843_MUIC_REG_CONTROL4      = 0x16,
+        MAX77843_MUIC_REG_HVCONTROL1    = 0x17,
+        MAX77843_MUIC_REG_HVCONTROL2    = 0x18,
+
+        MAX77843_MUIC_REG_END,
+};
+
+enum max77843_irq {
+        /* Topsys: SYSTEM */
+        MAX77843_SYS_IRQ_SYSINTSRC_SYSUVLO_INT,
+        MAX77843_SYS_IRQ_SYSINTSRC_SYSOVLO_INT,
+        MAX77843_SYS_IRQ_SYSINTSRC_TSHDN_INT,
+        MAX77843_SYS_IRQ_SYSINTSRC_TM_INT,
+
+        /* Charger: CHG_INT */
+        MAX77843_CHG_IRQ_CHG_INT_BYP_I,
+        MAX77843_CHG_IRQ_CHG_INT_BATP_I,
+        MAX77843_CHG_IRQ_CHG_INT_BAT_I,
+        MAX77843_CHG_IRQ_CHG_INT_CHG_I,
+        MAX77843_CHG_IRQ_CHG_INT_WCIN_I,
+        MAX77843_CHG_IRQ_CHG_INT_CHGIN_I,
+        MAX77843_CHG_IRQ_CHG_INT_AICL_I,
+
+        MAX77843_IRQ_NUM,
+};
+
+enum max77843_irq_muic {
+        /* MUIC: INT1 */
+        MAX77843_MUIC_IRQ_INT1_ADC,
+        MAX77843_MUIC_IRQ_INT1_ADCERROR,
+        MAX77843_MUIC_IRQ_INT1_ADC1K,
+
+        /* MUIC: INT2 */
+        MAX77843_MUIC_IRQ_INT2_CHGTYP,
+        MAX77843_MUIC_IRQ_INT2_CHGDETRUN,
+        MAX77843_MUIC_IRQ_INT2_DCDTMR,
+        MAX77843_MUIC_IRQ_INT2_DXOVP,
+        MAX77843_MUIC_IRQ_INT2_VBVOLT,
+
+        /* MUIC: INT3 */
+        MAX77843_MUIC_IRQ_INT3_VBADC,
+        MAX77843_MUIC_IRQ_INT3_VDNMON,
+        MAX77843_MUIC_IRQ_INT3_DNRES,
+        MAX77843_MUIC_IRQ_INT3_MPNACK,
+        MAX77843_MUIC_IRQ_INT3_MRXBUFOW,
+        MAX77843_MUIC_IRQ_INT3_MRXTRF,
+        MAX77843_MUIC_IRQ_INT3_MRXPERR,
+        MAX77843_MUIC_IRQ_INT3_MRXRDY,
+
+        MAX77843_MUIC_IRQ_NUM,
+};
+
+/* MAX77843 interrupts */
+#define MAX77843_SYS_IRQ_SYSUVLO_INT            BIT(0)
+#define MAX77843_SYS_IRQ_SYSOVLO_INT            BIT(1)
+#define MAX77843_SYS_IRQ_TSHDN_INT              BIT(2)
+#define MAX77843_SYS_IRQ_TM_INT                 BIT(3)
+
+/* MAX77843 MAINCTRL1 register */
+#define MAINCTRL1_BIASEN_SHIFT                  7
+#define MAX77843_MAINCTRL1_BIASEN_MASK          BIT(MAINCTRL1_BIASEN_SHIFT)
+
+/* MAX77843 MCONFIG register */
+#define MCONFIG_MODE_SHIFT                      7
+#define MCONFIG_MEN_SHIFT                       6
+#define MCONFIG_PDIV_SHIFT                      0
+
+#define MAX77843_MCONFIG_MODE_MASK              BIT(MCONFIG_MODE_SHIFT)
+#define MAX77843_MCONFIG_MEN_MASK               BIT(MCONFIG_MEN_SHIFT)
+#define MAX77843_MCONFIG_PDIV_MASK              (0x3 << MCONFIG_PDIV_SHIFT)
+
+/* Max77843 charger insterrupts */
+#define MAX77843_CHG_BYP_I                      BIT(0)
+#define MAX77843_CHG_BATP_I                     BIT(2)
+#define MAX77843_CHG_BAT_I                      BIT(3)
+#define MAX77843_CHG_CHG_I                      BIT(4)
+#define MAX77843_CHG_WCIN_I                     BIT(5)
+#define MAX77843_CHG_CHGIN_I                    BIT(6)
+#define MAX77843_CHG_AICL_I                     BIT(7)
+
+/* MAX77843 CHG_INT_OK register */
+#define MAX77843_CHG_BYP_OK                     BIT(0)
+#define MAX77843_CHG_BATP_OK                    BIT(2)
+#define MAX77843_CHG_BAT_OK                     BIT(3)
+#define MAX77843_CHG_CHG_OK                     BIT(4)
+#define MAX77843_CHG_WCIN_OK                    BIT(5)
+#define MAX77843_CHG_CHGIN_OK                   BIT(6)
+#define MAX77843_CHG_AICL_OK                    BIT(7)
+
+/* MAX77843 CHG_DETAILS_00 register */
+#define MAX77843_CHG_BAT_DTLS                   BIT(0)
+
+/* MAX77843 CHG_DETAILS_01 register */
+#define MAX77843_CHG_DTLS_MASK                  0x0f
+#define MAX77843_CHG_PQ_MODE                    0x00
+#define MAX77843_CHG_CC_MODE                    0x01
+#define MAX77843_CHG_CV_MODE                    0x02
+#define MAX77843_CHG_TO_MODE                    0x03
+#define MAX77843_CHG_DO_MODE                    0x04
+#define MAX77843_CHG_HT_MODE                    0x05
+#define MAX77843_CHG_TF_MODE                    0x06
+#define MAX77843_CHG_TS_MODE                    0x07
+#define MAX77843_CHG_OFF_MODE                   0x08
+
+#define MAX77843_CHG_BAT_DTLS_MASK              0xf0
+#define MAX77843_CHG_NO_BAT                     (0x00 << 4)
+#define MAX77843_CHG_LOW_VOLT_BAT               (0x01 << 4)
+#define MAX77843_CHG_LONG_BAT_TIME              (0x02 << 4)
+#define MAX77843_CHG_OK_BAT                     (0x03 << 4)
+#define MAX77843_CHG_OK_LOW_VOLT_BAT            (0x04 << 4)
+#define MAX77843_CHG_OVER_VOLT_BAT              (0x05 << 4)
+#define MAX77843_CHG_OVER_CURRENT_BAT           (0x06 << 4)
+
+/* MAX77843 CHG_CNFG_00 register */
+#define MAX77843_CHG_DISABLE                    0x00
+#define MAX77843_CHG_ENABLE                     0x05
+#define MAX77843_CHG_MASK                       0x01
+#define MAX77843_CHG_BUCK_MASK                  0x04
+
+/* MAX77843 CHG_CNFG_01 register */
+#define MAX77843_CHG_RESTART_THRESHOLD_100      0x00
+#define MAX77843_CHG_RESTART_THRESHOLD_150      0x10
+#define MAX77843_CHG_RESTART_THRESHOLD_200      0x20
+#define MAX77843_CHG_RESTART_THRESHOLD_DISABLE  0x30
+
+/* MAX77843 CHG_CNFG_02 register */
+#define MAX77843_CHG_FAST_CHG_CURRENT_MIN       100000
+#define MAX77843_CHG_FAST_CHG_CURRENT_MAX       3150000
+#define MAX77843_CHG_FAST_CHG_CURRENT_STEP      50000
+#define MAX77843_CHG_FAST_CHG_CURRENT_MASK      0x3f
+#define MAX77843_CHG_OTG_ILIMIT_500             (0x00 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_900             (0x01 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_1200            (0x02 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_1500            (0x03 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_MASK            0xc0
+
+/* MAX77843 CHG_CNFG_03 register */
+#define MAX77843_CHG_TOP_OFF_CURRENT_MIN        125000
+#define MAX77843_CHG_TOP_OFF_CURRENT_MAX        650000
+#define MAX77843_CHG_TOP_OFF_CURRENT_STEP       75000
+#define MAX77843_CHG_TOP_OFF_CURRENT_MASK       0x07
+
+/* MAX77843 CHG_CNFG_06 register */
+#define MAX77843_CHG_WRITE_CAP_BLOCK            0x10
+#define MAX77843_CHG_WRITE_CAP_UNBLOCK          0x0C
+
+/* MAX77843_CHG_CNFG_09_register */
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_MIN    100000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_MAX    4000000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_REF    3367000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_STEP   33000
+
+#define MAX77843_MUIC_ADC                       BIT(0)
+#define MAX77843_MUIC_ADCERROR                  BIT(2)
+#define MAX77843_MUIC_ADC1K                     BIT(3)
+
+#define MAX77843_MUIC_CHGTYP                    BIT(0)
+#define MAX77843_MUIC_CHGDETRUN                 BIT(1)
+#define MAX77843_MUIC_DCDTMR                    BIT(2)
+#define MAX77843_MUIC_DXOVP                     BIT(3)
+#define MAX77843_MUIC_VBVOLT                    BIT(4)
+
+#define MAX77843_MUIC_VBADC                     BIT(0)
+#define MAX77843_MUIC_VDNMON                    BIT(1)
+#define MAX77843_MUIC_DNRES                     BIT(2)
+#define MAX77843_MUIC_MPNACK                    BIT(3)
+#define MAX77843_MUIC_MRXBUFOW                  BIT(4)
+#define MAX77843_MUIC_MRXTRF                    BIT(5)
+#define MAX77843_MUIC_MRXPERR                   BIT(6)
+#define MAX77843_MUIC_MRXRDY                    BIT(7)
+
+/* MAX77843 INTSRCMASK register */
+#define MAX77843_INTSRCMASK_CHGR                0
+#define MAX77843_INTSRCMASK_SYS                 1
+#define MAX77843_INTSRCMASK_FG                  2
+#define MAX77843_INTSRCMASK_MUIC                3
+
+#define MAX77843_INTSRCMASK_CHGR_MASK          BIT(MAX77843_INTSRCMASK_CHGR)
+#define MAX77843_INTSRCMASK_SYS_MASK           BIT(MAX77843_INTSRCMASK_SYS)
+#define MAX77843_INTSRCMASK_FG_MASK            BIT(MAX77843_INTSRCMASK_FG)
+#define MAX77843_INTSRCMASK_MUIC_MASK          BIT(MAX77843_INTSRCMASK_MUIC)
+
+#define MAX77843_INTSRC_MASK_MASK \
+        (MAX77843_INTSRCMASK_MUIC_MASK | MAX77843_INTSRCMASK_FG_MASK | \
+        MAX77843_INTSRCMASK_SYS_MASK | MAX77843_INTSRCMASK_CHGR_MASK)
+
+/* MAX77843 STATUS register*/
+#define STATUS1_ADC_SHIFT                       0
+#define STATUS1_ADCERROR_SHIFT                  6
+#define STATUS1_ADC1K_SHIFT                     7
+#define STATUS2_CHGTYP_SHIFT                    0
+#define STATUS2_CHGDETRUN_SHIFT                 3
+#define STATUS2_DCDTMR_SHIFT                    4
+#define STATUS2_DXOVP_SHIFT                     5
+#define STATUS2_VBVOLT_SHIFT                    6
+#define STATUS3_VBADC_SHIFT                     0
+#define STATUS3_VDNMON_SHIFT                    4
+#define STATUS3_DNRES_SHIFT                     5
+#define STATUS3_MPNACK_SHIFT                    6
+
+#define MAX77843_MUIC_STATUS1_ADC_MASK          (0x1f << STATUS1_ADC_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADCERROR_MASK     BIT(STATUS1_ADCERROR_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADC1K_MASK        BIT(STATUS1_ADC1K_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGTYP_MASK       (0x7 << STATUS2_CHGTYP_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGDETRUN_MASK    BIT(STATUS2_CHGDETRUN_SHIFT)
+#define MAX77843_MUIC_STATUS2_DCDTMR_MASK       BIT(STATUS2_DCDTMR_SHIFT)
+#define MAX77843_MUIC_STATUS2_DXOVP_MASK        BIT(STATUS2_DXOVP_SHIFT)
+#define MAX77843_MUIC_STATUS2_VBVOLT_MASK       BIT(STATUS2_VBVOLT_SHIFT)
+#define MAX77843_MUIC_STATUS3_VBADC_MASK        (0xf << STATUS3_VBADC_SHIFT)
+#define MAX77843_MUIC_STATUS3_VDNMON_MASK       BIT(STATUS3_VDNMON_SHIFT)
+#define MAX77843_MUIC_STATUS3_DNRES_MASK        BIT(STATUS3_DNRES_SHIFT)
+#define MAX77843_MUIC_STATUS3_MPNACK_MASK       BIT(STATUS3_MPNACK_SHIFT)
+
+/* MAX77843 CONTROL register */
+#define CONTROL1_COMP1SW_SHIFT                  0
+#define CONTROL1_COMP2SW_SHIFT                  3
+#define CONTROL1_IDBEN_SHIFT                    7
+#define CONTROL2_LOWPWR_SHIFT                   0
+#define CONTROL2_ADCEN_SHIFT                    1
+#define CONTROL2_CPEN_SHIFT                     2
+#define CONTROL2_ACC_DET_SHIFT                  5
+#define CONTROL2_USBCPINT_SHIFT                 6
+#define CONTROL2_RCPS_SHIFT                     7
+#define CONTROL3_JIGSET_SHIFT                   0
+#define CONTROL4_ADCDBSET_SHIFT                 0
+#define CONTROL4_USBAUTO_SHIFT                  4
+#define CONTROL4_FCTAUTO_SHIFT                  5
+#define CONTROL4_ADCMODE_SHIFT                  6
+
+#define MAX77843_MUIC_CONTROL1_COMP1SW_MASK     (0x7 << CONTROL1_COMP1SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_COMP2SW_MASK     (0x7 << CONTROL1_COMP2SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_IDBEN_MASK       BIT(CONTROL1_IDBEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_LOWPWR_MASK      BIT(CONTROL2_LOWPWR_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ADCEN_MASK       BIT(CONTROL2_ADCEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_CPEN_MASK        BIT(CONTROL2_CPEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ACC_DET_MASK     BIT(CONTROL2_ACC_DET_SHIFT)
+#define MAX77843_MUIC_CONTROL2_USBCPINT_MASK    BIT(CONTROL2_USBCPINT_SHIFT)
+#define MAX77843_MUIC_CONTROL2_RCPS_MASK        BIT(CONTROL2_RCPS_SHIFT)
+#define MAX77843_MUIC_CONTROL3_JIGSET_MASK      (0x3 << CONTROL3_JIGSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCDBSET_MASK    (0x3 << CONTROL4_ADCDBSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_USBAUTO_MASK     BIT(CONTROL4_USBAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_FCTAUTO_MASK     BIT(CONTROL4_FCTAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCMODE_MASK     (0x3 << CONTROL4_ADCMODE_SHIFT)
+
+/* MAX77843 switch port */
+#define COM_OPEN                                0
+#define COM_USB                                 1
+#define COM_AUDIO                               2
+#define COM_UART                                3
+#define COM_AUX_USB                             4
+#define COM_AUX_UART                            5
+
+#define CONTROL1_COM_SW \
+        ((MAX77843_MUIC_CONTROL1_COMP1SW_MASK | \
+         MAX77843_MUIC_CONTROL1_COMP2SW_MASK))
+
+#define CONTROL1_SW_OPEN \
+        ((COM_OPEN << CONTROL1_COMP1SW_SHIFT | \
+         COM_OPEN << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_USB \
+        ((COM_USB << CONTROL1_COMP1SW_SHIFT | \
+         COM_USB << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUDIO \
+        ((COM_AUDIO << CONTROL1_COMP1SW_SHIFT | \
+         COM_AUDIO << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_UART \
+        ((COM_UART << CONTROL1_COMP1SW_SHIFT | \
+         COM_UART << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUX_USB \
+        ((COM_AUX_USB << CONTROL1_COMP1SW_SHIFT | \
+         COM_AUX_USB << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUX_UART \
+        ((COM_AUX_UART << CONTROL1_COMP1SW_SHIFT | \
+         COM_AUX_UART << CONTROL1_COMP2SW_SHIFT))
+
+#define MAX77843_DISABLE                        0
+#define MAX77843_ENABLE                         1
+
+#define CONTROL4_AUTO_DISABLE \
+        ((MAX77843_DISABLE << CONTROL4_USBAUTO_SHIFT) | \
+        (MAX77843_DISABLE << CONTROL4_FCTAUTO_SHIFT))
+#define CONTROL4_AUTO_ENABLE \
+        ((MAX77843_ENABLE << CONTROL4_USBAUTO_SHIFT) | \
+        (MAX77843_ENABLE << CONTROL4_FCTAUTO_SHIFT))
+
+/* MAX77843 SAFEOUT LDO Control register */
+#define SAFEOUTCTRL_SAFEOUT1_SHIFT              0
+#define SAFEOUTCTRL_SAFEOUT2_SHIFT              2
+#define SAFEOUTCTRL_ENSAFEOUT1_SHIFT            6
+#define SAFEOUTCTRL_ENSAFEOUT2_SHIFT            7
+
+#define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT1 \
+                BIT(SAFEOUTCTRL_ENSAFEOUT1_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT2 \
+                BIT(SAFEOUTCTRL_ENSAFEOUT2_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_SAFEOUT1_MASK \
+                (0x3 << SAFEOUTCTRL_SAFEOUT1_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_SAFEOUT2_MASK \
+                (0x3 << SAFEOUTCTRL_SAFEOUT2_SHIFT)
+
+struct max77843 {
+        struct device *dev;
+
+        struct i2c_client *i2c;
+        struct i2c_client *i2c_chg;
+        struct i2c_client *i2c_fuel;
+        struct i2c_client *i2c_muic;
+
+        struct regmap *regmap;
+        struct regmap *regmap_chg;
+        struct regmap *regmap_fuel;
+        struct regmap *regmap_muic;
+
+        struct regmap_irq_chip_data *irq_data;
+        struct regmap_irq_chip_data *irq_data_chg;
+        struct regmap_irq_chip_data *irq_data_fuel;
+        struct regmap_irq_chip_data *irq_data_muic;
+
+        int irq;
+};
+#endif /* __MAX77843_H__ */
diff --git a/include/linux/mfd/menelaus.h b/include/linux/mfd/menelaus.h
index f097e89134cb..9e85ac06da89 100644
--- a/include/linux/mfd/menelaus.h
+++ b/include/linux/mfd/menelaus.h
@@ -24,7 +24,6 @@ extern int menelaus_set_vaux(unsigned int mV);
 extern int menelaus_set_vdcdc(int dcdc, unsigned int mV);
 extern int menelaus_set_slot_sel(int enable);
 extern int menelaus_get_slot_pin_states(void);
-extern int menelaus_set_vcore_sw(unsigned int mV);
 extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV);
 
 #define EN_VPLL_SLEEP   (1 << 7)
@@ -38,10 +37,4 @@ extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV);
 
 extern int menelaus_set_regulator_sleep(int enable, u32 val);
 
-#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_MENELAUS)
-#define omap_has_menelaus()     1
-#else
-#define omap_has_menelaus()     0
-#endif
-
 #endif
diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
new file mode 100644
index 000000000000..cf5265b0d1c1
--- /dev/null
+++ b/include/linux/mfd/mt6397/core.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Flora Fu, MediaTek
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MFD_MT6397_CORE_H__
+#define __MFD_MT6397_CORE_H__
+
+enum mt6397_irq_numbers {
+        MT6397_IRQ_SPKL_AB = 0,
+        MT6397_IRQ_SPKR_AB,
+        MT6397_IRQ_SPKL,
+        MT6397_IRQ_SPKR,
+        MT6397_IRQ_BAT_L,
+        MT6397_IRQ_BAT_H,
+        MT6397_IRQ_FG_BAT_L,
+        MT6397_IRQ_FG_BAT_H,
+        MT6397_IRQ_WATCHDOG,
+        MT6397_IRQ_PWRKEY,
+        MT6397_IRQ_THR_L,
+        MT6397_IRQ_THR_H,
+        MT6397_IRQ_VBATON_UNDET,
+        MT6397_IRQ_BVALID_DET,
+        MT6397_IRQ_CHRDET,
+        MT6397_IRQ_OV,
+        MT6397_IRQ_LDO,
+        MT6397_IRQ_HOMEKEY,
+        MT6397_IRQ_ACCDET,
+        MT6397_IRQ_AUDIO,
+        MT6397_IRQ_RTC,
+        MT6397_IRQ_PWRKEY_RSTB,
+        MT6397_IRQ_HDMI_SIFM,
+        MT6397_IRQ_HDMI_CEC,
+        MT6397_IRQ_VCA15,
+        MT6397_IRQ_VSRMCA15,
+        MT6397_IRQ_VCORE,
+        MT6397_IRQ_VGPU,
+        MT6397_IRQ_VIO18,
+        MT6397_IRQ_VPCA7,
+        MT6397_IRQ_VSRMCA7,
+        MT6397_IRQ_VDRM,
+        MT6397_IRQ_NR,
+};
+
+struct mt6397_chip {
+        struct device *dev;
+        struct regmap *regmap;
+        int irq;
+        struct irq_domain *irq_domain;
+        struct mutex irqlock;
+        u16 irq_masks_cur[2];
+        u16 irq_masks_cache[2];
+};
+
+#endif /* __MFD_MT6397_CORE_H__ */
diff --git a/include/linux/mfd/mt6397/registers.h b/include/linux/mfd/mt6397/registers.h
new file mode 100644
index 000000000000..f23a0a60a877
--- /dev/null
+++ b/include/linux/mfd/mt6397/registers.h
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Flora Fu, MediaTek
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MFD_MT6397_REGISTERS_H__
+#define __MFD_MT6397_REGISTERS_H__
+
+/* PMIC Registers */
+#define MT6397_CID                      0x0100
+#define MT6397_TOP_CKPDN                0x0102
+#define MT6397_TOP_CKPDN_SET            0x0104
+#define MT6397_TOP_CKPDN_CLR            0x0106
+#define MT6397_TOP_CKPDN2               0x0108
+#define MT6397_TOP_CKPDN2_SET           0x010A
+#define MT6397_TOP_CKPDN2_CLR           0x010C
+#define MT6397_TOP_GPIO_CKPDN           0x010E
+#define MT6397_TOP_RST_CON              0x0114
+#define MT6397_WRP_CKPDN                0x011A
+#define MT6397_WRP_RST_CON              0x0120
+#define MT6397_TOP_RST_MISC             0x0126
+#define MT6397_TOP_CKCON1               0x0128
+#define MT6397_TOP_CKCON2               0x012A
+#define MT6397_TOP_CKTST1               0x012C
+#define MT6397_TOP_CKTST2               0x012E
+#define MT6397_OC_DEG_EN                0x0130
+#define MT6397_OC_CTL0                  0x0132
+#define MT6397_OC_CTL1                  0x0134
+#define MT6397_OC_CTL2                  0x0136
+#define MT6397_INT_RSV                  0x0138
+#define MT6397_TEST_CON0                0x013A
+#define MT6397_TEST_CON1                0x013C
+#define MT6397_STATUS0                  0x013E
+#define MT6397_STATUS1                  0x0140
+#define MT6397_PGSTATUS                 0x0142
+#define MT6397_CHRSTATUS                0x0144
+#define MT6397_OCSTATUS0                0x0146
+#define MT6397_OCSTATUS1                0x0148
+#define MT6397_OCSTATUS2                0x014A
+#define MT6397_HDMI_PAD_IE              0x014C
+#define MT6397_TEST_OUT_L               0x014E
+#define MT6397_TEST_OUT_H               0x0150
+#define MT6397_TDSEL_CON                0x0152
+#define MT6397_RDSEL_CON                0x0154
+#define MT6397_GPIO_SMT_CON0            0x0156
+#define MT6397_GPIO_SMT_CON1            0x0158
+#define MT6397_GPIO_SMT_CON2            0x015A
+#define MT6397_GPIO_SMT_CON3            0x015C
+#define MT6397_DRV_CON0                 0x015E
+#define MT6397_DRV_CON1                 0x0160
+#define MT6397_DRV_CON2                 0x0162
+#define MT6397_DRV_CON3                 0x0164
+#define MT6397_DRV_CON4                 0x0166
+#define MT6397_DRV_CON5                 0x0168
+#define MT6397_DRV_CON6                 0x016A
+#define MT6397_DRV_CON7                 0x016C
+#define MT6397_DRV_CON8                 0x016E
+#define MT6397_DRV_CON9                 0x0170
+#define MT6397_DRV_CON10                0x0172
+#define MT6397_DRV_CON11                0x0174
+#define MT6397_DRV_CON12                0x0176
+#define MT6397_INT_CON0                 0x0178
+#define MT6397_INT_CON1                 0x017E
+#define MT6397_INT_STATUS0              0x0184
+#define MT6397_INT_STATUS1              0x0186
+#define MT6397_FQMTR_CON0               0x0188
+#define MT6397_FQMTR_CON1               0x018A
+#define MT6397_FQMTR_CON2               0x018C
+#define MT6397_EFUSE_DOUT_0_15          0x01C4
+#define MT6397_EFUSE_DOUT_16_31         0x01C6
+#define MT6397_EFUSE_DOUT_32_47         0x01C8
+#define MT6397_EFUSE_DOUT_48_63         0x01CA
+#define MT6397_SPI_CON                  0x01CC
+#define MT6397_TOP_CKPDN3               0x01CE
+#define MT6397_TOP_CKCON3               0x01D4
+#define MT6397_EFUSE_DOUT_64_79         0x01D6
+#define MT6397_EFUSE_DOUT_80_95         0x01D8
+#define MT6397_EFUSE_DOUT_96_111        0x01DA
+#define MT6397_EFUSE_DOUT_112_127       0x01DC
+#define MT6397_EFUSE_DOUT_128_143       0x01DE
+#define MT6397_EFUSE_DOUT_144_159       0x01E0
+#define MT6397_EFUSE_DOUT_160_175       0x01E2
+#define MT6397_EFUSE_DOUT_176_191       0x01E4
+#define MT6397_EFUSE_DOUT_192_207       0x01E6
+#define MT6397_EFUSE_DOUT_208_223       0x01E8
+#define MT6397_EFUSE_DOUT_224_239       0x01EA
+#define MT6397_EFUSE_DOUT_240_255       0x01EC
+#define MT6397_EFUSE_DOUT_256_271       0x01EE
+#define MT6397_EFUSE_DOUT_272_287       0x01F0
+#define MT6397_EFUSE_DOUT_288_300       0x01F2
+#define MT6397_EFUSE_DOUT_304_319       0x01F4
+#define MT6397_BUCK_CON0                0x0200
+#define MT6397_BUCK_CON1                0x0202
+#define MT6397_BUCK_CON2                0x0204
+#define MT6397_BUCK_CON3                0x0206
+#define MT6397_BUCK_CON4                0x0208
+#define MT6397_BUCK_CON5                0x020A
+#define MT6397_BUCK_CON6                0x020C
+#define MT6397_BUCK_CON7                0x020E
+#define MT6397_BUCK_CON8                0x0210
+#define MT6397_BUCK_CON9                0x0212
+#define MT6397_VCA15_CON0               0x0214
+#define MT6397_VCA15_CON1               0x0216
+#define MT6397_VCA15_CON2               0x0218
+#define MT6397_VCA15_CON3               0x021A
+#define MT6397_VCA15_CON4               0x021C
+#define MT6397_VCA15_CON5               0x021E
+#define MT6397_VCA15_CON6               0x0220
+#define MT6397_VCA15_CON7               0x0222
+#define MT6397_VCA15_CON8               0x0224
+#define MT6397_VCA15_CON9               0x0226
+#define MT6397_VCA15_CON10              0x0228
+#define MT6397_VCA15_CON11              0x022A
+#define MT6397_VCA15_CON12              0x022C
+#define MT6397_VCA15_CON13              0x022E
+#define MT6397_VCA15_CON14              0x0230
+#define MT6397_VCA15_CON15              0x0232
+#define MT6397_VCA15_CON16              0x0234
+#define MT6397_VCA15_CON17              0x0236
+#define MT6397_VCA15_CON18              0x0238
+#define MT6397_VSRMCA15_CON0            0x023A
+#define MT6397_VSRMCA15_CON1            0x023C
+#define MT6397_VSRMCA15_CON2            0x023E
+#define MT6397_VSRMCA15_CON3            0x0240
+#define MT6397_VSRMCA15_CON4            0x0242
+#define MT6397_VSRMCA15_CON5            0x0244
+#define MT6397_VSRMCA15_CON6            0x0246
+#define MT6397_VSRMCA15_CON7            0x0248
+#define MT6397_VSRMCA15_CON8            0x024A
+#define MT6397_VSRMCA15_CON9            0x024C
+#define MT6397_VSRMCA15_CON10           0x024E
+#define MT6397_VSRMCA15_CON11           0x0250
+#define MT6397_VSRMCA15_CON12           0x0252
+#define MT6397_VSRMCA15_CON13           0x0254
+#define MT6397_VSRMCA15_CON14           0x0256
+#define MT6397_VSRMCA15_CON15           0x0258
+#define MT6397_VSRMCA15_CON16           0x025A
+#define MT6397_VSRMCA15_CON17           0x025C
+#define MT6397_VSRMCA15_CON18           0x025E
+#define MT6397_VSRMCA15_CON19           0x0260
+#define MT6397_VSRMCA15_CON20           0x0262
+#define MT6397_VSRMCA15_CON21           0x0264
+#define MT6397_VCORE_CON0               0x0266
+#define MT6397_VCORE_CON1               0x0268
+#define MT6397_VCORE_CON2               0x026A
+#define MT6397_VCORE_CON3               0x026C
+#define MT6397_VCORE_CON4               0x026E
+#define MT6397_VCORE_CON5               0x0270
+#define MT6397_VCORE_CON6               0x0272
+#define MT6397_VCORE_CON7               0x0274
+#define MT6397_VCORE_CON8               0x0276
+#define MT6397_VCORE_CON9               0x0278
+#define MT6397_VCORE_CON10              0x027A
+#define MT6397_VCORE_CON11              0x027C
+#define MT6397_VCORE_CON12              0x027E
+#define MT6397_VCORE_CON13              0x0280
+#define MT6397_VCORE_CON14              0x0282
+#define MT6397_VCORE_CON15              0x0284
+#define MT6397_VCORE_CON16              0x0286
+#define MT6397_VCORE_CON17              0x0288
+#define MT6397_VCORE_CON18              0x028A
+#define MT6397_VGPU_CON0                0x028C
+#define MT6397_VGPU_CON1                0x028E
+#define MT6397_VGPU_CON2                0x0290
+#define MT6397_VGPU_CON3                0x0292
+#define MT6397_VGPU_CON4                0x0294
+#define MT6397_VGPU_CON5                0x0296
+#define MT6397_VGPU_CON6                0x0298
+#define MT6397_VGPU_CON7                0x029A
+#define MT6397_VGPU_CON8                0x029C
+#define MT6397_VGPU_CON9                0x029E
+#define MT6397_VGPU_CON10               0x02A0
+#define MT6397_VGPU_CON11               0x02A2
+#define MT6397_VGPU_CON12               0x02A4
+#define MT6397_VGPU_CON13               0x02A6
+#define MT6397_VGPU_CON14               0x02A8
+#define MT6397_VGPU_CON15               0x02AA
+#define MT6397_VGPU_CON16               0x02AC
+#define MT6397_VGPU_CON17               0x02AE
+#define MT6397_VGPU_CON18               0x02B0
+#define MT6397_VIO18_CON0               0x0300
+#define MT6397_VIO18_CON1               0x0302
+#define MT6397_VIO18_CON2               0x0304
+#define MT6397_VIO18_CON3               0x0306
+#define MT6397_VIO18_CON4               0x0308
+#define MT6397_VIO18_CON5               0x030A
+#define MT6397_VIO18_CON6               0x030C
+#define MT6397_VIO18_CON7               0x030E
+#define MT6397_VIO18_CON8               0x0310
+#define MT6397_VIO18_CON9               0x0312
+#define MT6397_VIO18_CON10              0x0314
+#define MT6397_VIO18_CON11              0x0316
+#define MT6397_VIO18_CON12              0x0318
+#define MT6397_VIO18_CON13              0x031A
+#define MT6397_VIO18_CON14              0x031C
+#define MT6397_VIO18_CON15              0x031E
+#define MT6397_VIO18_CON16              0x0320
+#define MT6397_VIO18_CON17              0x0322
+#define MT6397_VIO18_CON18              0x0324
+#define MT6397_VPCA7_CON0               0x0326
+#define MT6397_VPCA7_CON1               0x0328
+#define MT6397_VPCA7_CON2               0x032A
+#define MT6397_VPCA7_CON3               0x032C
+#define MT6397_VPCA7_CON4               0x032E
+#define MT6397_VPCA7_CON5               0x0330
+#define MT6397_VPCA7_CON6               0x0332
+#define MT6397_VPCA7_CON7               0x0334
+#define MT6397_VPCA7_CON8               0x0336
+#define MT6397_VPCA7_CON9               0x0338
+#define MT6397_VPCA7_CON10              0x033A
+#define MT6397_VPCA7_CON11              0x033C
+#define MT6397_VPCA7_CON12              0x033E
+#define MT6397_VPCA7_CON13              0x0340
+#define MT6397_VPCA7_CON14              0x0342
+#define MT6397_VPCA7_CON15              0x0344
+#define MT6397_VPCA7_CON16              0x0346
+#define MT6397_VPCA7_CON17              0x0348
+#define MT6397_VPCA7_CON18              0x034A
+#define MT6397_VSRMCA7_CON0             0x034C
+#define MT6397_VSRMCA7_CON1             0x034E
+#define MT6397_VSRMCA7_CON2             0x0350
+#define MT6397_VSRMCA7_CON3             0x0352
+#define MT6397_VSRMCA7_CON4             0x0354
+#define MT6397_VSRMCA7_CON5             0x0356
+#define MT6397_VSRMCA7_CON6             0x0358
+#define MT6397_VSRMCA7_CON7             0x035A
+#define MT6397_VSRMCA7_CON8             0x035C
+#define MT6397_VSRMCA7_CON9             0x035E
+#define MT6397_VSRMCA7_CON10            0x0360
+#define MT6397_VSRMCA7_CON11            0x0362
+#define MT6397_VSRMCA7_CON12            0x0364
+#define MT6397_VSRMCA7_CON13            0x0366
+#define MT6397_VSRMCA7_CON14            0x0368
+#define MT6397_VSRMCA7_CON15            0x036A
+#define MT6397_VSRMCA7_CON16            0x036C
+#define MT6397_VSRMCA7_CON17            0x036E
+#define MT6397_VSRMCA7_CON18            0x0370
+#define MT6397_VSRMCA7_CON19            0x0372
+#define MT6397_VSRMCA7_CON20            0x0374
+#define MT6397_VSRMCA7_CON21            0x0376
+#define MT6397_VDRM_CON0                0x0378
+#define MT6397_VDRM_CON1                0x037A
+#define MT6397_VDRM_CON2                0x037C
+#define MT6397_VDRM_CON3                0x037E
+#define MT6397_VDRM_CON4                0x0380
+#define MT6397_VDRM_CON5                0x0382
+#define MT6397_VDRM_CON6                0x0384
+#define MT6397_VDRM_CON7                0x0386
+#define MT6397_VDRM_CON8                0x0388
+#define MT6397_VDRM_CON9                0x038A
+#define MT6397_VDRM_CON10               0x038C
+#define MT6397_VDRM_CON11               0x038E
+#define MT6397_VDRM_CON12               0x0390
+#define MT6397_VDRM_CON13               0x0392
+#define MT6397_VDRM_CON14               0x0394
+#define MT6397_VDRM_CON15               0x0396
+#define MT6397_VDRM_CON16               0x0398
+#define MT6397_VDRM_CON17               0x039A
+#define MT6397_VDRM_CON18               0x039C
+#define MT6397_BUCK_K_CON0              0x039E
+#define MT6397_BUCK_K_CON1              0x03A0
+#define MT6397_ANALDO_CON0              0x0400
+#define MT6397_ANALDO_CON1              0x0402
+#define MT6397_ANALDO_CON2              0x0404
+#define MT6397_ANALDO_CON3              0x0406
+#define MT6397_ANALDO_CON4              0x0408
+#define MT6397_ANALDO_CON5              0x040A
+#define MT6397_ANALDO_CON6              0x040C
+#define MT6397_ANALDO_CON7              0x040E
+#define MT6397_DIGLDO_CON0              0x0410
+#define MT6397_DIGLDO_CON1              0x0412
+#define MT6397_DIGLDO_CON2              0x0414
+#define MT6397_DIGLDO_CON3              0x0416
+#define MT6397_DIGLDO_CON4              0x0418
+#define MT6397_DIGLDO_CON5              0x041A
+#define MT6397_DIGLDO_CON6              0x041C
+#define MT6397_DIGLDO_CON7              0x041E
+#define MT6397_DIGLDO_CON8              0x0420
+#define MT6397_DIGLDO_CON9              0x0422
+#define MT6397_DIGLDO_CON10             0x0424
+#define MT6397_DIGLDO_CON11             0x0426
+#define MT6397_DIGLDO_CON12             0x0428
+#define MT6397_DIGLDO_CON13             0x042A
+#define MT6397_DIGLDO_CON14             0x042C
+#define MT6397_DIGLDO_CON15             0x042E
+#define MT6397_DIGLDO_CON16             0x0430
+#define MT6397_DIGLDO_CON17             0x0432
+#define MT6397_DIGLDO_CON18             0x0434
+#define MT6397_DIGLDO_CON19             0x0436
+#define MT6397_DIGLDO_CON20             0x0438
+#define MT6397_DIGLDO_CON21             0x043A
+#define MT6397_DIGLDO_CON22             0x043C
+#define MT6397_DIGLDO_CON23             0x043E
+#define MT6397_DIGLDO_CON24             0x0440
+#define MT6397_DIGLDO_CON25             0x0442
+#define MT6397_DIGLDO_CON26             0x0444
+#define MT6397_DIGLDO_CON27             0x0446
+#define MT6397_DIGLDO_CON28             0x0448
+#define MT6397_DIGLDO_CON29             0x044A
+#define MT6397_DIGLDO_CON30             0x044C
+#define MT6397_DIGLDO_CON31             0x044E
+#define MT6397_DIGLDO_CON32             0x0450
+#define MT6397_DIGLDO_CON33             0x045A
+#define MT6397_SPK_CON0                 0x0600
+#define MT6397_SPK_CON1                 0x0602
+#define MT6397_SPK_CON2                 0x0604
+#define MT6397_SPK_CON3                 0x0606
+#define MT6397_SPK_CON4                 0x0608
+#define MT6397_SPK_CON5                 0x060A
+#define MT6397_SPK_CON6                 0x060C
+#define MT6397_SPK_CON7                 0x060E
+#define MT6397_SPK_CON8                 0x0610
+#define MT6397_SPK_CON9                 0x0612
+#define MT6397_SPK_CON10                0x0614
+#define MT6397_SPK_CON11                0x0616
+#define MT6397_AUDDAC_CON0              0x0700
+#define MT6397_AUDBUF_CFG0              0x0702
+#define MT6397_AUDBUF_CFG1              0x0704
+#define MT6397_AUDBUF_CFG2              0x0706
+#define MT6397_AUDBUF_CFG3              0x0708
+#define MT6397_AUDBUF_CFG4              0x070A
+#define MT6397_IBIASDIST_CFG0           0x070C
+#define MT6397_AUDACCDEPOP_CFG0         0x070E
+#define MT6397_AUD_IV_CFG0              0x0710
+#define MT6397_AUDCLKGEN_CFG0           0x0712
+#define MT6397_AUDLDO_CFG0              0x0714
+#define MT6397_AUDLDO_CFG1              0x0716
+#define MT6397_AUDNVREGGLB_CFG0         0x0718
+#define MT6397_AUD_NCP0                 0x071A
+#define MT6397_AUDPREAMP_CON0           0x071C
+#define MT6397_AUDADC_CON0              0x071E
+#define MT6397_AUDADC_CON1              0x0720
+#define MT6397_AUDADC_CON2              0x0722
+#define MT6397_AUDADC_CON3              0x0724
+#define MT6397_AUDADC_CON4              0x0726
+#define MT6397_AUDADC_CON5              0x0728
+#define MT6397_AUDADC_CON6              0x072A
+#define MT6397_AUDDIGMI_CON0            0x072C
+#define MT6397_AUDLSBUF_CON0            0x072E
+#define MT6397_AUDLSBUF_CON1            0x0730
+#define MT6397_AUDENCSPARE_CON0         0x0732
+#define MT6397_AUDENCCLKSQ_CON0         0x0734
+#define MT6397_AUDPREAMPGAIN_CON0       0x0736
+#define MT6397_ZCD_CON0                 0x0738
+#define MT6397_ZCD_CON1                 0x073A
+#define MT6397_ZCD_CON2                 0x073C
+#define MT6397_ZCD_CON3                 0x073E
+#define MT6397_ZCD_CON4                 0x0740
+#define MT6397_ZCD_CON5                 0x0742
+#define MT6397_NCP_CLKDIV_CON0          0x0744
+#define MT6397_NCP_CLKDIV_CON1          0x0746
+
+#endif /* __MFD_MT6397_REGISTERS_H__ */
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index ee7b1ce7a6f8..bb270bd03eed 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -117,6 +117,7 @@ struct palmas_pmic_driver_data {
         int ldo_begin;
         int ldo_end;
         int max_reg;
+        bool has_regen3;
         struct palmas_regs_info *palmas_regs_info;
         struct of_regulator_match *palmas_matches;
         struct palmas_sleep_requestor_info *sleep_req_info;
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index fb09312d854b..441b6ee72691 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -156,6 +156,9 @@ enum rk808_reg {
 #define BUCK2_RATE_MASK         (3 << 3)
 #define MASK_ALL        0xff
 
+#define BUCK_UV_ACT_MASK        0x0f
+#define BUCK_UV_ACT_DISABLE     0
+
 #define SWITCH2_EN      BIT(6)
 #define SWITCH1_EN      BIT(5)
 #define DEV_OFF_RST     BIT(3)
diff --git a/include/linux/mfd/rt5033.h b/include/linux/mfd/rt5033.h
index 010cff49a98e..6cff5cf458d2 100644
--- a/include/linux/mfd/rt5033.h
+++ b/include/linux/mfd/rt5033.h
@@ -39,7 +39,7 @@ struct rt5033_battery {
         struct i2c_client       *client;
         struct rt5033_dev       *rt5033;
         struct regmap           *regmap;
-        struct power_supply     psy;
+        struct power_supply     *psy;
 };
 
 /* RT5033 charger platform data */
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 0c12628e91c6..ff843e7ca23d 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -28,74 +28,72 @@
 
 #define MAX_RW_REG_CNT                  1024
 
-/* PCI Operation Register Address */
 #define RTSX_HCBAR                      0x00
 #define RTSX_HCBCTLR                    0x04
+#define   STOP_CMD                      (0x01 << 28)
+#define   READ_REG_CMD                  0
+#define   WRITE_REG_CMD                 1
+#define   CHECK_REG_CMD                 2
+
 #define RTSX_HDBAR                      0x08
+#define   SG_INT                        0x04
+#define   SG_END                        0x02
+#define   SG_VALID                      0x01
+#define   SG_NO_OP                      0x00
+#define   SG_TRANS_DATA                 (0x02 << 4)
+#define   SG_LINK_DESC                  (0x03 << 4)
 #define RTSX_HDBCTLR                    0x0C
+#define   SDMA_MODE                     0x00
+#define   ADMA_MODE                     (0x02 << 26)
+#define   STOP_DMA                      (0x01 << 28)
+#define   TRIG_DMA                      (0x01 << 31)
+
 #define RTSX_HAIMR                      0x10
-#define RTSX_BIPR                       0x14
-#define RTSX_BIER                       0x18
+#define   HAIMR_TRANS_START             (0x01 << 31)
+#define   HAIMR_READ                    0x00
+#define   HAIMR_WRITE                   (0x01 << 30)
+#define   HAIMR_READ_START              (HAIMR_TRANS_START | HAIMR_READ)
+#define   HAIMR_WRITE_START             (HAIMR_TRANS_START | HAIMR_WRITE)
+#define   HAIMR_TRANS_END                       (HAIMR_TRANS_START)
 
-/* Host command buffer control register */
-#define STOP_CMD                        (0x01 << 28)
-
-/* Host data buffer control register */
-#define SDMA_MODE                       0x00
-#define ADMA_MODE                       (0x02 << 26)
-#define STOP_DMA                        (0x01 << 28)
-#define TRIG_DMA                        (0x01 << 31)
-
-/* Host access internal memory register */
-#define HAIMR_TRANS_START               (0x01 << 31)
-#define HAIMR_READ                      0x00
-#define HAIMR_WRITE                     (0x01 << 30)
-#define HAIMR_READ_START                (HAIMR_TRANS_START | HAIMR_READ)
-#define HAIMR_WRITE_START               (HAIMR_TRANS_START | HAIMR_WRITE)
-#define HAIMR_TRANS_END                 (HAIMR_TRANS_START)
-
-/* Bus interrupt pending register */
-#define CMD_DONE_INT                    (1 << 31)
-#define DATA_DONE_INT                   (1 << 30)
-#define TRANS_OK_INT                    (1 << 29)
-#define TRANS_FAIL_INT                  (1 << 28)
-#define XD_INT                          (1 << 27)
-#define MS_INT                          (1 << 26)
-#define SD_INT                          (1 << 25)
-#define GPIO0_INT                       (1 << 24)
-#define OC_INT                          (1 << 23)
-#define SD_WRITE_PROTECT                (1 << 19)
-#define XD_EXIST                        (1 << 18)
-#define MS_EXIST                        (1 << 17)
-#define SD_EXIST                        (1 << 16)
-#define DELINK_INT                      GPIO0_INT
-#define MS_OC_INT                       (1 << 23)
-#define SD_OC_INT                       (1 << 22)
+#define RTSX_BIPR                       0x14
+#define   CMD_DONE_INT                  (1 << 31)
+#define   DATA_DONE_INT                 (1 << 30)
+#define   TRANS_OK_INT                  (1 << 29)
+#define   TRANS_FAIL_INT                (1 << 28)
+#define   XD_INT                        (1 << 27)
+#define   MS_INT                        (1 << 26)
+#define   SD_INT                        (1 << 25)
+#define   GPIO0_INT                     (1 << 24)
+#define   OC_INT                        (1 << 23)
+#define   SD_WRITE_PROTECT              (1 << 19)
+#define   XD_EXIST                      (1 << 18)
+#define   MS_EXIST                      (1 << 17)
+#define   SD_EXIST                      (1 << 16)
+#define   DELINK_INT                    GPIO0_INT
+#define   MS_OC_INT                     (1 << 23)
+#define   SD_OC_INT                     (1 << 22)
 
 #define CARD_INT                (XD_INT | MS_INT | SD_INT)
 #define NEED_COMPLETE_INT       (DATA_DONE_INT | TRANS_OK_INT | TRANS_FAIL_INT)
 #define RTSX_INT                (CMD_DONE_INT | NEED_COMPLETE_INT | \
                                         CARD_INT | GPIO0_INT | OC_INT)
-
 #define CARD_EXIST              (XD_EXIST | MS_EXIST | SD_EXIST)
 
-/* Bus interrupt enable register */
-#define CMD_DONE_INT_EN         (1 << 31)
-#define DATA_DONE_INT_EN        (1 << 30)
-#define TRANS_OK_INT_EN         (1 << 29)
-#define TRANS_FAIL_INT_EN       (1 << 28)
-#define XD_INT_EN               (1 << 27)
-#define MS_INT_EN               (1 << 26)
-#define SD_INT_EN               (1 << 25)
-#define GPIO0_INT_EN            (1 << 24)
-#define OC_INT_EN               (1 << 23)
-#define DELINK_INT_EN           GPIO0_INT_EN
-#define MS_OC_INT_EN            (1 << 23)
-#define SD_OC_INT_EN            (1 << 22)
-
-#define READ_REG_CMD            0
-#define WRITE_REG_CMD           1
-#define CHECK_REG_CMD           2
+#define RTSX_BIER                       0x18
+#define   CMD_DONE_INT_EN               (1 << 31)
+#define   DATA_DONE_INT_EN              (1 << 30)
+#define   TRANS_OK_INT_EN               (1 << 29)
+#define   TRANS_FAIL_INT_EN             (1 << 28)
+#define   XD_INT_EN                     (1 << 27)
+#define   MS_INT_EN                     (1 << 26)
+#define   SD_INT_EN                     (1 << 25)
+#define   GPIO0_INT_EN                  (1 << 24)
+#define   OC_INT_EN                     (1 << 23)
+#define   DELINK_INT_EN                 GPIO0_INT_EN
+#define   MS_OC_INT_EN                  (1 << 23)
+#define   SD_OC_INT_EN                  (1 << 22)
+
 
 /*
  * macros for easy use
@@ -125,423 +123,68 @@
 #define rtsx_pci_write_config_dword(pcr, where, val) \
         pci_write_config_dword((pcr)->pci, where, val)
 
-#define STATE_TRANS_NONE        0
-#define STATE_TRANS_CMD         1
-#define STATE_TRANS_BUF         2
-#define STATE_TRANS_SG          3
-
-#define TRANS_NOT_READY         0
-#define TRANS_RESULT_OK         1
-#define TRANS_RESULT_FAIL       2
-#define TRANS_NO_DEVICE         3
-
-#define RTSX_RESV_BUF_LEN       4096
-#define HOST_CMDS_BUF_LEN       1024
-#define HOST_SG_TBL_BUF_LEN     (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN)
-#define HOST_SG_TBL_ITEMS       (HOST_SG_TBL_BUF_LEN / 8)
-#define MAX_SG_ITEM_LEN         0x80000
-
-#define HOST_TO_DEVICE          0
-#define DEVICE_TO_HOST          1
-
-#define RTSX_PHASE_MAX          32
-#define RX_TUNING_CNT           3
-
-/* SG descriptor */
-#define SG_INT                  0x04
-#define SG_END                  0x02
-#define SG_VALID                0x01
-
-#define SG_NO_OP                0x00
-#define SG_TRANS_DATA           (0x02 << 4)
-#define SG_LINK_DESC            (0x03 << 4)
-
-/* Output voltage */
-#define OUTPUT_3V3              0
-#define OUTPUT_1V8              1
-
-/* Card Clock Enable Register */
-#define SD_CLK_EN                       0x04
-#define MS_CLK_EN                       0x08
-
-/* Card Select Register */
-#define SD_MOD_SEL                      2
-#define MS_MOD_SEL                      3
-
-/* Card Output Enable Register */
-#define SD_OUTPUT_EN                    0x04
-#define MS_OUTPUT_EN                    0x08
-
-/* CARD_SHARE_MODE */
-#define CARD_SHARE_MASK                 0x0F
-#define CARD_SHARE_MULTI_LUN            0x00
-#define CARD_SHARE_NORMAL               0x00
-#define CARD_SHARE_48_SD                0x04
-#define CARD_SHARE_48_MS                0x08
-/* CARD_SHARE_MODE for barossa */
-#define CARD_SHARE_BAROSSA_SD           0x01
-#define CARD_SHARE_BAROSSA_MS           0x02
-
-/* CARD_DRIVE_SEL */
-#define MS_DRIVE_8mA                    (0x01 << 6)
-#define MMC_DRIVE_8mA                   (0x01 << 4)
-#define XD_DRIVE_8mA                    (0x01 << 2)
-#define GPIO_DRIVE_8mA                  0x01
-#define RTS5209_CARD_DRIVE_DEFAULT      (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
-                                                XD_DRIVE_8mA | GPIO_DRIVE_8mA)
-#define RTL8411_CARD_DRIVE_DEFAULT      (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
-                                                XD_DRIVE_8mA)
-#define RTSX_CARD_DRIVE_DEFAULT         (MS_DRIVE_8mA | GPIO_DRIVE_8mA)
+#define STATE_TRANS_NONE                0
+#define STATE_TRANS_CMD                 1
+#define STATE_TRANS_BUF                 2
+#define STATE_TRANS_SG                  3
 
-/* SD30_DRIVE_SEL */
-#define DRIVER_TYPE_A                   0x05
-#define DRIVER_TYPE_B                   0x03
-#define DRIVER_TYPE_C                   0x02
-#define DRIVER_TYPE_D                   0x01
-#define CFG_DRIVER_TYPE_A               0x02
-#define CFG_DRIVER_TYPE_B               0x03
-#define CFG_DRIVER_TYPE_C               0x01
-#define CFG_DRIVER_TYPE_D               0x00
-
-/* FPDCTL */
-#define SSC_POWER_DOWN                  0x01
-#define SD_OC_POWER_DOWN                0x02
-#define ALL_POWER_DOWN                  0x07
-#define OC_POWER_DOWN                   0x06
-
-/* CLK_CTL */
-#define CHANGE_CLK                      0x01
-
-/* LDO_CTL */
-#define BPP_ASIC_1V7                    0x00
-#define BPP_ASIC_1V8                    0x01
-#define BPP_ASIC_1V9                    0x02
-#define BPP_ASIC_2V0                    0x03
-#define BPP_ASIC_2V7                    0x04
-#define BPP_ASIC_2V8                    0x05
-#define BPP_ASIC_3V2                    0x06
-#define BPP_ASIC_3V3                    0x07
-#define BPP_REG_TUNED18                 0x07
-#define BPP_TUNED18_SHIFT_8402          5
-#define BPP_TUNED18_SHIFT_8411          4
-#define BPP_PAD_MASK                    0x04
-#define BPP_PAD_3V3                     0x04
-#define BPP_PAD_1V8                     0x00
-#define BPP_LDO_POWB                    0x03
-#define BPP_LDO_ON                      0x00
-#define BPP_LDO_SUSPEND                 0x02
-#define BPP_LDO_OFF                     0x03
-
-/* CD_PAD_CTL */
-#define CD_DISABLE_MASK                 0x07
-#define MS_CD_DISABLE                   0x04
-#define SD_CD_DISABLE                   0x02
-#define XD_CD_DISABLE                   0x01
-#define CD_DISABLE                      0x07
-#define CD_ENABLE                       0x00
-#define MS_CD_EN_ONLY                   0x03
-#define SD_CD_EN_ONLY                   0x05
-#define XD_CD_EN_ONLY                   0x06
-#define FORCE_CD_LOW_MASK               0x38
-#define FORCE_CD_XD_LOW                 0x08
-#define FORCE_CD_SD_LOW                 0x10
-#define FORCE_CD_MS_LOW                 0x20
-#define CD_AUTO_DISABLE                 0x40
-
-/* SD_STAT1 */
-#define SD_CRC7_ERR                     0x80
-#define SD_CRC16_ERR                    0x40
-#define SD_CRC_WRITE_ERR                0x20
-#define SD_CRC_WRITE_ERR_MASK           0x1C
-#define GET_CRC_TIME_OUT                0x02
-#define SD_TUNING_COMPARE_ERR           0x01
-
-/* SD_STAT2 */
-#define SD_RSP_80CLK_TIMEOUT            0x01
-
-/* SD_BUS_STAT */
-#define SD_CLK_TOGGLE_EN                0x80
-#define SD_CLK_FORCE_STOP               0x40
-#define SD_DAT3_STATUS                  0x10
-#define SD_DAT2_STATUS                  0x08
-#define SD_DAT1_STATUS                  0x04
-#define SD_DAT0_STATUS                  0x02
-#define SD_CMD_STATUS                   0x01
-
-/* SD_PAD_CTL */
-#define SD_IO_USING_1V8                 0x80
-#define SD_IO_USING_3V3                 0x7F
-#define TYPE_A_DRIVING                  0x00
-#define TYPE_B_DRIVING                  0x01
-#define TYPE_C_DRIVING                  0x02
-#define TYPE_D_DRIVING                  0x03
-
-/* SD_SAMPLE_POINT_CTL */
-#define DDR_FIX_RX_DAT                  0x00
-#define DDR_VAR_RX_DAT                  0x80
-#define DDR_FIX_RX_DAT_EDGE             0x00
-#define DDR_FIX_RX_DAT_14_DELAY         0x40
-#define DDR_FIX_RX_CMD                  0x00
-#define DDR_VAR_RX_CMD                  0x20
-#define DDR_FIX_RX_CMD_POS_EDGE         0x00
-#define DDR_FIX_RX_CMD_14_DELAY         0x10
-#define SD20_RX_POS_EDGE                0x00
-#define SD20_RX_14_DELAY                0x08
-#define SD20_RX_SEL_MASK                0x08
+#define TRANS_NOT_READY                 0
+#define TRANS_RESULT_OK                 1
+#define TRANS_RESULT_FAIL               2
+#define TRANS_NO_DEVICE                 3
 
-/* SD_PUSH_POINT_CTL */
-#define DDR_FIX_TX_CMD_DAT              0x00
-#define DDR_VAR_TX_CMD_DAT              0x80
-#define DDR_FIX_TX_DAT_14_TSU           0x00
-#define DDR_FIX_TX_DAT_12_TSU           0x40
-#define DDR_FIX_TX_CMD_NEG_EDGE         0x00
-#define DDR_FIX_TX_CMD_14_AHEAD         0x20
-#define SD20_TX_NEG_EDGE                0x00
-#define SD20_TX_14_AHEAD                0x10
-#define SD20_TX_SEL_MASK                0x10
-#define DDR_VAR_SDCLK_POL_SWAP          0x01
-
-/* SD_TRANSFER */
-#define SD_TRANSFER_START               0x80
-#define SD_TRANSFER_END                 0x40
-#define SD_STAT_IDLE                    0x20
-#define SD_TRANSFER_ERR                 0x10
-/* SD Transfer Mode definition */
-#define SD_TM_NORMAL_WRITE              0x00
-#define SD_TM_AUTO_WRITE_3              0x01
-#define SD_TM_AUTO_WRITE_4              0x02
-#define SD_TM_AUTO_READ_3               0x05
-#define SD_TM_AUTO_READ_4               0x06
-#define SD_TM_CMD_RSP                   0x08
-#define SD_TM_AUTO_WRITE_1              0x09
-#define SD_TM_AUTO_WRITE_2              0x0A
-#define SD_TM_NORMAL_READ               0x0C
-#define SD_TM_AUTO_READ_1               0x0D
-#define SD_TM_AUTO_READ_2               0x0E
-#define SD_TM_AUTO_TUNING               0x0F
-
-/* SD_VPTX_CTL / SD_VPRX_CTL */
-#define PHASE_CHANGE                    0x80
-#define PHASE_NOT_RESET                 0x40
-
-/* SD_DCMPS_TX_CTL / SD_DCMPS_RX_CTL */
-#define DCMPS_CHANGE                    0x80
-#define DCMPS_CHANGE_DONE               0x40
-#define DCMPS_ERROR                     0x20
-#define DCMPS_CURRENT_PHASE             0x1F
-
-/* SD Configure 1 Register */
-#define SD_CLK_DIVIDE_0                 0x00
-#define SD_CLK_DIVIDE_256               0xC0
-#define SD_CLK_DIVIDE_128               0x80
-#define SD_BUS_WIDTH_1BIT               0x00
-#define SD_BUS_WIDTH_4BIT               0x01
-#define SD_BUS_WIDTH_8BIT               0x02
-#define SD_ASYNC_FIFO_NOT_RST           0x10
-#define SD_20_MODE                      0x00
-#define SD_DDR_MODE                     0x04
-#define SD_30_MODE                      0x08
-
-#define SD_CLK_DIVIDE_MASK              0xC0
-
-/* SD_CMD_STATE */
-#define SD_CMD_IDLE                     0x80
-
-/* SD_DATA_STATE */
-#define SD_DATA_IDLE                    0x80
-
-/* DCM_DRP_CTL */
-#define DCM_RESET                       0x08
-#define DCM_LOCKED                      0x04
-#define DCM_208M                        0x00
-#define DCM_TX                          0x01
-#define DCM_RX                          0x02
-
-/* DCM_DRP_TRIG */
-#define DRP_START                       0x80
-#define DRP_DONE                        0x40
-
-/* DCM_DRP_CFG */
-#define DRP_WRITE                       0x80
-#define DRP_READ                        0x00
-#define DCM_WRITE_ADDRESS_50            0x50
-#define DCM_WRITE_ADDRESS_51            0x51
-#define DCM_READ_ADDRESS_00             0x00
-#define DCM_READ_ADDRESS_51             0x51
-
-/* IRQSTAT0 */
-#define DMA_DONE_INT                    0x80
-#define SUSPEND_INT                     0x40
-#define LINK_RDY_INT                    0x20
-#define LINK_DOWN_INT                   0x10
-
-/* DMACTL */
-#define DMA_RST                         0x80
-#define DMA_BUSY                        0x04
-#define DMA_DIR_TO_CARD                 0x00
-#define DMA_DIR_FROM_CARD               0x02
-#define DMA_EN                          0x01
-#define DMA_128                         (0 << 4)
-#define DMA_256                         (1 << 4)
-#define DMA_512                         (2 << 4)
-#define DMA_1024                        (3 << 4)
-#define DMA_PACK_SIZE_MASK              0x30
-
-/* SSC_CTL1 */
-#define SSC_RSTB                        0x80
-#define SSC_8X_EN                       0x40
-#define SSC_FIX_FRAC                    0x20
-#define SSC_SEL_1M                      0x00
-#define SSC_SEL_2M                      0x08
-#define SSC_SEL_4M                      0x10
-#define SSC_SEL_8M                      0x18
-
-/* SSC_CTL2 */
-#define SSC_DEPTH_MASK                  0x07
-#define SSC_DEPTH_DISALBE               0x00
-#define SSC_DEPTH_4M                    0x01
-#define SSC_DEPTH_2M                    0x02
-#define SSC_DEPTH_1M                    0x03
-#define SSC_DEPTH_500K                  0x04
-#define SSC_DEPTH_250K                  0x05
-
-/* System Clock Control Register */
-#define CLK_LOW_FREQ                    0x01
-
-/* System Clock Divider Register */
-#define CLK_DIV_1                       0x01
-#define CLK_DIV_2                       0x02
-#define CLK_DIV_4                       0x03
-#define CLK_DIV_8                       0x04
-
-/* MS_CFG */
-#define SAMPLE_TIME_RISING              0x00
-#define SAMPLE_TIME_FALLING             0x80
-#define PUSH_TIME_DEFAULT               0x00
-#define PUSH_TIME_ODD                   0x40
-#define NO_EXTEND_TOGGLE                0x00
-#define EXTEND_TOGGLE_CHK               0x20
-#define MS_BUS_WIDTH_1                  0x00
-#define MS_BUS_WIDTH_4                  0x10
-#define MS_BUS_WIDTH_8                  0x18
-#define MS_2K_SECTOR_MODE               0x04
-#define MS_512_SECTOR_MODE              0x00
-#define MS_TOGGLE_TIMEOUT_EN            0x00
-#define MS_TOGGLE_TIMEOUT_DISEN         0x01
-#define MS_NO_CHECK_INT                 0x02
+#define RTSX_RESV_BUF_LEN               4096
+#define HOST_CMDS_BUF_LEN               1024
+#define HOST_SG_TBL_BUF_LEN             (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN)
+#define HOST_SG_TBL_ITEMS               (HOST_SG_TBL_BUF_LEN / 8)
+#define MAX_SG_ITEM_LEN                 0x80000
+#define HOST_TO_DEVICE                  0
+#define DEVICE_TO_HOST                  1
 
-/* MS_TRANS_CFG */
-#define WAIT_INT                        0x80
-#define NO_WAIT_INT                     0x00
-#define NO_AUTO_READ_INT_REG            0x00
-#define AUTO_READ_INT_REG               0x40
-#define MS_CRC16_ERR                    0x20
-#define MS_RDY_TIMEOUT                  0x10
-#define MS_INT_CMDNK                    0x08
-#define MS_INT_BREQ                     0x04
-#define MS_INT_ERR                      0x02
-#define MS_INT_CED                      0x01
-
-/* MS_TRANSFER */
-#define MS_TRANSFER_START               0x80
-#define MS_TRANSFER_END                 0x40
-#define MS_TRANSFER_ERR                 0x20
-#define MS_BS_STATE                     0x10
-#define MS_TM_READ_BYTES                0x00
-#define MS_TM_NORMAL_READ               0x01
-#define MS_TM_WRITE_BYTES               0x04
-#define MS_TM_NORMAL_WRITE              0x05
-#define MS_TM_AUTO_READ                 0x08
-#define MS_TM_AUTO_WRITE                0x0C
-
-/* SD Configure 2 Register */
-#define SD_CALCULATE_CRC7               0x00
-#define SD_NO_CALCULATE_CRC7            0x80
-#define SD_CHECK_CRC16                  0x00
-#define SD_NO_CHECK_CRC16               0x40
-#define SD_NO_CHECK_WAIT_CRC_TO         0x20
-#define SD_WAIT_BUSY_END                0x08
-#define SD_NO_WAIT_BUSY_END             0x00
-#define SD_CHECK_CRC7                   0x00
-#define SD_NO_CHECK_CRC7                0x04
-#define SD_RSP_LEN_0                    0x00
-#define SD_RSP_LEN_6                    0x01
-#define SD_RSP_LEN_17                   0x02
-/* SD/MMC Response Type Definition */
-#define SD_RSP_TYPE_R0                  0x04
-#define SD_RSP_TYPE_R1                  0x01
-#define SD_RSP_TYPE_R1b                 0x09
-#define SD_RSP_TYPE_R2                  0x02
-#define SD_RSP_TYPE_R3                  0x05
-#define SD_RSP_TYPE_R4                  0x05
-#define SD_RSP_TYPE_R5                  0x01
-#define SD_RSP_TYPE_R6                  0x01
-#define SD_RSP_TYPE_R7                  0x01
-
-/* SD_CONFIGURE3 */
-#define SD_RSP_80CLK_TIMEOUT_EN         0x01
-
-/* Card Transfer Reset Register */
-#define SPI_STOP                        0x01
-#define XD_STOP                         0x02
-#define SD_STOP                         0x04
-#define MS_STOP                         0x08
-#define SPI_CLR_ERR                     0x10
-#define XD_CLR_ERR                      0x20
-#define SD_CLR_ERR                      0x40
-#define MS_CLR_ERR                      0x80
-
-/* Card Data Source Register */
-#define PINGPONG_BUFFER                 0x01
-#define RING_BUFFER                     0x00
-
-/* Card Power Control Register */
-#define PMOS_STRG_MASK                  0x10
-#define PMOS_STRG_800mA                 0x10
-#define PMOS_STRG_400mA                 0x00
-#define SD_POWER_OFF                    0x03
-#define SD_PARTIAL_POWER_ON             0x01
-#define SD_POWER_ON                     0x00
-#define SD_POWER_MASK                   0x03
-#define MS_POWER_OFF                    0x0C
-#define MS_PARTIAL_POWER_ON             0x04
-#define MS_POWER_ON                     0x00
-#define MS_POWER_MASK                   0x0C
-#define BPP_POWER_OFF                   0x0F
-#define BPP_POWER_5_PERCENT_ON          0x0E
-#define BPP_POWER_10_PERCENT_ON         0x0C
-#define BPP_POWER_15_PERCENT_ON         0x08
-#define BPP_POWER_ON                    0x00
-#define BPP_POWER_MASK                  0x0F
-#define SD_VCC_PARTIAL_POWER_ON         0x02
-#define SD_VCC_POWER_ON                 0x00
-
-/* PWR_GATE_CTRL */
-#define PWR_GATE_EN                     0x01
-#define LDO3318_PWR_MASK                0x06
-#define LDO_ON                          0x00
-#define LDO_SUSPEND                     0x04
-#define LDO_OFF                         0x06
-
-/* CARD_CLK_SOURCE */
-#define CRC_FIX_CLK                     (0x00 << 0)
-#define CRC_VAR_CLK0                    (0x01 << 0)
-#define CRC_VAR_CLK1                    (0x02 << 0)
-#define SD30_FIX_CLK                    (0x00 << 2)
-#define SD30_VAR_CLK0                   (0x01 << 2)
-#define SD30_VAR_CLK1                   (0x02 << 2)
-#define SAMPLE_FIX_CLK                  (0x00 << 4)
-#define SAMPLE_VAR_CLK0                 (0x01 << 4)
-#define SAMPLE_VAR_CLK1                 (0x02 << 4)
-
-/* HOST_SLEEP_STATE */
-#define HOST_ENTER_S1                   1
-#define HOST_ENTER_S3                   2
+#define OUTPUT_3V3                      0
+#define OUTPUT_1V8                      1
+
+#define RTSX_PHASE_MAX                  32
+#define RX_TUNING_CNT                   3
 
 #define MS_CFG                          0xFD40
+#define   SAMPLE_TIME_RISING            0x00
+#define   SAMPLE_TIME_FALLING           0x80
+#define   PUSH_TIME_DEFAULT             0x00
+#define   PUSH_TIME_ODD                 0x40
+#define   NO_EXTEND_TOGGLE              0x00
+#define   EXTEND_TOGGLE_CHK             0x20
+#define   MS_BUS_WIDTH_1                0x00
+#define   MS_BUS_WIDTH_4                0x10
+#define   MS_BUS_WIDTH_8                0x18
+#define   MS_2K_SECTOR_MODE             0x04
+#define   MS_512_SECTOR_MODE            0x00
+#define   MS_TOGGLE_TIMEOUT_EN          0x00
+#define   MS_TOGGLE_TIMEOUT_DISEN       0x01
+#define MS_NO_CHECK_INT                 0x02
 #define MS_TPC                          0xFD41
 #define MS_TRANS_CFG                    0xFD42
+#define   WAIT_INT                      0x80
+#define   NO_WAIT_INT                   0x00
+#define   NO_AUTO_READ_INT_REG          0x00
+#define   AUTO_READ_INT_REG             0x40
+#define   MS_CRC16_ERR                  0x20
+#define   MS_RDY_TIMEOUT                0x10
+#define   MS_INT_CMDNK                  0x08
+#define   MS_INT_BREQ                   0x04
+#define   MS_INT_ERR                    0x02
+#define   MS_INT_CED                    0x01
 #define MS_TRANSFER                     0xFD43
+#define   MS_TRANSFER_START             0x80
+#define   MS_TRANSFER_END               0x40
+#define   MS_TRANSFER_ERR               0x20
+#define   MS_BS_STATE                   0x10
+#define   MS_TM_READ_BYTES              0x00
+#define   MS_TM_NORMAL_READ             0x01
+#define   MS_TM_WRITE_BYTES             0x04
+#define   MS_TM_NORMAL_WRITE            0x05
+#define   MS_TM_AUTO_READ               0x08
+#define   MS_TM_AUTO_WRITE              0x0C
 #define MS_INT_REG                      0xFD44
 #define MS_BYTE_CNT                     0xFD45
 #define MS_SECTOR_CNT_L                 0xFD46
@@ -549,14 +192,90 @@
 #define MS_DBUS_H                       0xFD48
 
 #define SD_CFG1                         0xFDA0
+#define   SD_CLK_DIVIDE_0               0x00
+#define   SD_CLK_DIVIDE_256             0xC0
+#define   SD_CLK_DIVIDE_128             0x80
+#define   SD_BUS_WIDTH_1BIT             0x00
+#define   SD_BUS_WIDTH_4BIT             0x01
+#define   SD_BUS_WIDTH_8BIT             0x02
+#define   SD_ASYNC_FIFO_NOT_RST         0x10
+#define   SD_20_MODE                    0x00
+#define   SD_DDR_MODE                   0x04
+#define   SD_30_MODE                    0x08
+#define   SD_CLK_DIVIDE_MASK            0xC0
 #define SD_CFG2                         0xFDA1
+#define   SD_CALCULATE_CRC7             0x00
+#define   SD_NO_CALCULATE_CRC7          0x80
+#define   SD_CHECK_CRC16                0x00
+#define   SD_NO_CHECK_CRC16             0x40
+#define   SD_NO_CHECK_WAIT_CRC_TO       0x20
+#define   SD_WAIT_BUSY_END              0x08
+#define   SD_NO_WAIT_BUSY_END           0x00
+#define   SD_CHECK_CRC7                 0x00
+#define   SD_NO_CHECK_CRC7              0x04
+#define   SD_RSP_LEN_0                  0x00
+#define   SD_RSP_LEN_6                  0x01
+#define   SD_RSP_LEN_17                 0x02
+#define   SD_RSP_TYPE_R0                0x04
+#define   SD_RSP_TYPE_R1                0x01
+#define   SD_RSP_TYPE_R1b               0x09
+#define   SD_RSP_TYPE_R2                0x02
+#define   SD_RSP_TYPE_R3                0x05
+#define   SD_RSP_TYPE_R4                0x05
+#define   SD_RSP_TYPE_R5                0x01
+#define   SD_RSP_TYPE_R6                0x01
+#define   SD_RSP_TYPE_R7                0x01
 #define SD_CFG3                         0xFDA2
+#define   SD_RSP_80CLK_TIMEOUT_EN       0x01
+
 #define SD_STAT1                        0xFDA3
+#define   SD_CRC7_ERR                   0x80
+#define   SD_CRC16_ERR                  0x40
+#define   SD_CRC_WRITE_ERR              0x20
+#define   SD_CRC_WRITE_ERR_MASK         0x1C
+#define   GET_CRC_TIME_OUT              0x02
+#define   SD_TUNING_COMPARE_ERR         0x01
 #define SD_STAT2                        0xFDA4
+#define   SD_RSP_80CLK_TIMEOUT          0x01
+
 #define SD_BUS_STAT                     0xFDA5
+#define   SD_CLK_TOGGLE_EN              0x80
+#define   SD_CLK_FORCE_STOP             0x40
+#define   SD_DAT3_STATUS                0x10
+#define   SD_DAT2_STATUS                0x08
+#define   SD_DAT1_STATUS                0x04
+#define   SD_DAT0_STATUS                0x02
+#define   SD_CMD_STATUS                 0x01
 #define SD_PAD_CTL                      0xFDA6
+#define   SD_IO_USING_1V8               0x80
+#define   SD_IO_USING_3V3               0x7F
+#define   TYPE_A_DRIVING                0x00
+#define   TYPE_B_DRIVING                0x01
+#define   TYPE_C_DRIVING                0x02
+#define   TYPE_D_DRIVING                0x03
 #define SD_SAMPLE_POINT_CTL             0xFDA7
+#define   DDR_FIX_RX_DAT                0x00
+#define   DDR_VAR_RX_DAT                0x80
+#define   DDR_FIX_RX_DAT_EDGE           0x00
+#define   DDR_FIX_RX_DAT_14_DELAY       0x40
+#define   DDR_FIX_RX_CMD                0x00
+#define   DDR_VAR_RX_CMD                0x20
+#define   DDR_FIX_RX_CMD_POS_EDGE       0x00
+#define   DDR_FIX_RX_CMD_14_DELAY       0x10
+#define   SD20_RX_POS_EDGE              0x00
+#define   SD20_RX_14_DELAY              0x08
+#define SD20_RX_SEL_MASK                0x08
 #define SD_PUSH_POINT_CTL               0xFDA8
+#define   DDR_FIX_TX_CMD_DAT            0x00
+#define   DDR_VAR_TX_CMD_DAT            0x80
+#define   DDR_FIX_TX_DAT_14_TSU         0x00
+#define   DDR_FIX_TX_DAT_12_TSU         0x40
+#define   DDR_FIX_TX_CMD_NEG_EDGE       0x00
+#define   DDR_FIX_TX_CMD_14_AHEAD       0x20
+#define   SD20_TX_NEG_EDGE              0x00
+#define   SD20_TX_14_AHEAD              0x10
+#define   SD20_TX_SEL_MASK              0x10
+#define   DDR_VAR_SDCLK_POL_SWAP        0x01
 #define SD_CMD0                         0xFDA9
 #define   SD_CMD_START                  0x40
 #define SD_CMD1                         0xFDAA
@@ -569,60 +288,203 @@
 #define SD_BLOCK_CNT_L                  0xFDB1
 #define SD_BLOCK_CNT_H                  0xFDB2
 #define SD_TRANSFER                     0xFDB3
+#define   SD_TRANSFER_START             0x80
+#define   SD_TRANSFER_END               0x40
+#define   SD_STAT_IDLE                  0x20
+#define   SD_TRANSFER_ERR               0x10
+#define   SD_TM_NORMAL_WRITE            0x00
+#define   SD_TM_AUTO_WRITE_3            0x01
+#define   SD_TM_AUTO_WRITE_4            0x02
+#define   SD_TM_AUTO_READ_3             0x05
+#define   SD_TM_AUTO_READ_4             0x06
+#define   SD_TM_CMD_RSP                 0x08
+#define   SD_TM_AUTO_WRITE_1            0x09
+#define   SD_TM_AUTO_WRITE_2            0x0A
+#define   SD_TM_NORMAL_READ             0x0C
+#define   SD_TM_AUTO_READ_1             0x0D
+#define   SD_TM_AUTO_READ_2             0x0E
+#define   SD_TM_AUTO_TUNING             0x0F
 #define SD_CMD_STATE                    0xFDB5
+#define   SD_CMD_IDLE                   0x80
+
 #define SD_DATA_STATE                   0xFDB6
+#define   SD_DATA_IDLE                  0x80
 
 #define SRCTL                           0xFC13
 
-#define DCM_DRP_CTL                     0xFC23
-#define DCM_DRP_TRIG                    0xFC24
-#define DCM_DRP_CFG                     0xFC25
-#define DCM_DRP_WR_DATA_L               0xFC26
-#define DCM_DRP_WR_DATA_H               0xFC27
-#define DCM_DRP_RD_DATA_L               0xFC28
-#define DCM_DRP_RD_DATA_H               0xFC29
+#define DCM_DRP_CTL                     0xFC23
+#define   DCM_RESET                     0x08
+#define   DCM_LOCKED                    0x04
+#define   DCM_208M                      0x00
+#define   DCM_TX                        0x01
+#define   DCM_RX                        0x02
+#define DCM_DRP_TRIG                    0xFC24
+#define   DRP_START                     0x80
+#define   DRP_DONE                      0x40
+#define DCM_DRP_CFG                     0xFC25
+#define   DRP_WRITE                     0x80
+#define   DRP_READ                      0x00
+#define   DCM_WRITE_ADDRESS_50          0x50
+#define   DCM_WRITE_ADDRESS_51          0x51
+#define   DCM_READ_ADDRESS_00           0x00
+#define   DCM_READ_ADDRESS_51           0x51
+#define DCM_DRP_WR_DATA_L               0xFC26
+#define DCM_DRP_WR_DATA_H               0xFC27
+#define DCM_DRP_RD_DATA_L               0xFC28
+#define DCM_DRP_RD_DATA_H               0xFC29
 #define SD_VPCLK0_CTL                   0xFC2A
 #define SD_VPCLK1_CTL                   0xFC2B
 #define SD_DCMPS0_CTL                   0xFC2C
 #define SD_DCMPS1_CTL                   0xFC2D
 #define SD_VPTX_CTL                     SD_VPCLK0_CTL
 #define SD_VPRX_CTL                     SD_VPCLK1_CTL
+#define   PHASE_CHANGE                  0x80
+#define   PHASE_NOT_RESET               0x40
 #define SD_DCMPS_TX_CTL                 SD_DCMPS0_CTL
 #define SD_DCMPS_RX_CTL                 SD_DCMPS1_CTL
+#define   DCMPS_CHANGE                  0x80
+#define   DCMPS_CHANGE_DONE             0x40
+#define   DCMPS_ERROR                   0x20
+#define   DCMPS_CURRENT_PHASE           0x1F
 #define CARD_CLK_SOURCE                 0xFC2E
-
+#define   CRC_FIX_CLK                   (0x00 << 0)
+#define   CRC_VAR_CLK0                  (0x01 << 0)
+#define   CRC_VAR_CLK1                  (0x02 << 0)
+#define   SD30_FIX_CLK                  (0x00 << 2)
+#define   SD30_VAR_CLK0                 (0x01 << 2)
+#define   SD30_VAR_CLK1                 (0x02 << 2)
+#define   SAMPLE_FIX_CLK                (0x00 << 4)
+#define   SAMPLE_VAR_CLK0               (0x01 << 4)
+#define   SAMPLE_VAR_CLK1               (0x02 << 4)
 #define CARD_PWR_CTL                    0xFD50
+#define   PMOS_STRG_MASK                0x10
+#define   PMOS_STRG_800mA               0x10
+#define   PMOS_STRG_400mA               0x00
+#define   SD_POWER_OFF                  0x03
+#define   SD_PARTIAL_POWER_ON           0x01
+#define   SD_POWER_ON                   0x00
+#define   SD_POWER_MASK                 0x03
+#define   MS_POWER_OFF                  0x0C
+#define   MS_PARTIAL_POWER_ON           0x04
+#define   MS_POWER_ON                   0x00
+#define   MS_POWER_MASK                 0x0C
+#define   BPP_POWER_OFF                 0x0F
+#define   BPP_POWER_5_PERCENT_ON        0x0E
+#define   BPP_POWER_10_PERCENT_ON       0x0C
+#define   BPP_POWER_15_PERCENT_ON       0x08
+#define   BPP_POWER_ON                  0x00
+#define   BPP_POWER_MASK                0x0F
+#define   SD_VCC_PARTIAL_POWER_ON       0x02
+#define   SD_VCC_POWER_ON               0x00
 #define CARD_CLK_SWITCH                 0xFD51
 #define RTL8411B_PACKAGE_MODE           0xFD51
 #define CARD_SHARE_MODE                 0xFD52
+#define   CARD_SHARE_MASK               0x0F
+#define   CARD_SHARE_MULTI_LUN          0x00
+#define   CARD_SHARE_NORMAL             0x00
+#define   CARD_SHARE_48_SD              0x04
+#define   CARD_SHARE_48_MS              0x08
+#define   CARD_SHARE_BAROSSA_SD         0x01
+#define   CARD_SHARE_BAROSSA_MS         0x02
 #define CARD_DRIVE_SEL                  0xFD53
+#define   MS_DRIVE_8mA                  (0x01 << 6)
+#define   MMC_DRIVE_8mA                 (0x01 << 4)
+#define   XD_DRIVE_8mA                  (0x01 << 2)
+#define   GPIO_DRIVE_8mA                0x01
+#define RTS5209_CARD_DRIVE_DEFAULT      (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
+                                        XD_DRIVE_8mA | GPIO_DRIVE_8mA)
+#define RTL8411_CARD_DRIVE_DEFAULT      (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
+                                        XD_DRIVE_8mA)
+#define RTSX_CARD_DRIVE_DEFAULT         (MS_DRIVE_8mA | GPIO_DRIVE_8mA)
+
 #define CARD_STOP                       0xFD54
+#define   SPI_STOP                      0x01
+#define   XD_STOP                       0x02
+#define   SD_STOP                       0x04
+#define   MS_STOP                       0x08
+#define   SPI_CLR_ERR                   0x10
+#define   XD_CLR_ERR                    0x20
+#define   SD_CLR_ERR                    0x40
+#define   MS_CLR_ERR                    0x80
 #define CARD_OE                         0xFD55
+#define   SD_OUTPUT_EN                  0x04
+#define   MS_OUTPUT_EN                  0x08
 #define CARD_AUTO_BLINK                 0xFD56
 #define CARD_GPIO_DIR                   0xFD57
 #define CARD_GPIO                       0xFD58
 #define CARD_DATA_SOURCE                0xFD5B
+#define   PINGPONG_BUFFER               0x01
+#define   RING_BUFFER                   0x00
 #define SD30_CLK_DRIVE_SEL              0xFD5A
+#define   DRIVER_TYPE_A                 0x05
+#define   DRIVER_TYPE_B                 0x03
+#define   DRIVER_TYPE_C                 0x02
+#define   DRIVER_TYPE_D                 0x01
 #define CARD_SELECT                     0xFD5C
+#define   SD_MOD_SEL                    2
+#define   MS_MOD_SEL                    3
 #define SD30_DRIVE_SEL                  0xFD5E
+#define   CFG_DRIVER_TYPE_A             0x02
+#define   CFG_DRIVER_TYPE_B             0x03
+#define   CFG_DRIVER_TYPE_C             0x01
+#define   CFG_DRIVER_TYPE_D             0x00
 #define SD30_CMD_DRIVE_SEL              0xFD5E
 #define SD30_DAT_DRIVE_SEL              0xFD5F
 #define CARD_CLK_EN                     0xFD69
+#define   SD_CLK_EN                     0x04
+#define   MS_CLK_EN                     0x08
 #define SDIO_CTRL                       0xFD6B
 #define CD_PAD_CTL                      0xFD73
-
+#define   CD_DISABLE_MASK               0x07
+#define   MS_CD_DISABLE                 0x04
+#define   SD_CD_DISABLE                 0x02
+#define   XD_CD_DISABLE                 0x01
+#define   CD_DISABLE                    0x07
+#define   CD_ENABLE                     0x00
+#define   MS_CD_EN_ONLY                 0x03
+#define   SD_CD_EN_ONLY                 0x05
+#define   XD_CD_EN_ONLY                 0x06
+#define   FORCE_CD_LOW_MASK             0x38
+#define   FORCE_CD_XD_LOW               0x08
+#define   FORCE_CD_SD_LOW               0x10
+#define   FORCE_CD_MS_LOW               0x20
+#define   CD_AUTO_DISABLE               0x40
 #define FPDCTL                          0xFC00
+#define   SSC_POWER_DOWN                0x01
+#define   SD_OC_POWER_DOWN              0x02
+#define   ALL_POWER_DOWN                0x07
+#define   OC_POWER_DOWN                 0x06
 #define PDINFO                          0xFC01
 
 #define CLK_CTL                         0xFC02
+#define   CHANGE_CLK                    0x01
+#define   CLK_LOW_FREQ                  0x01
+
 #define CLK_DIV                         0xFC03
+#define   CLK_DIV_1                     0x01
+#define   CLK_DIV_2                     0x02
+#define   CLK_DIV_4                     0x03
+#define   CLK_DIV_8                     0x04
 #define CLK_SEL                         0xFC04
 
 #define SSC_DIV_N_0                     0xFC0F
 #define SSC_DIV_N_1                     0xFC10
 #define SSC_CTL1                        0xFC11
+#define    SSC_RSTB                     0x80
+#define    SSC_8X_EN                    0x40
+#define    SSC_FIX_FRAC                 0x20
+#define    SSC_SEL_1M                   0x00
+#define    SSC_SEL_2M                   0x08
+#define    SSC_SEL_4M                   0x10
+#define    SSC_SEL_8M                   0x18
 #define SSC_CTL2                        0xFC12
-
+#define    SSC_DEPTH_MASK               0x07
+#define    SSC_DEPTH_DISALBE            0x00
+#define    SSC_DEPTH_4M                 0x01
+#define    SSC_DEPTH_2M                 0x02
+#define    SSC_DEPTH_1M                 0x03
+#define    SSC_DEPTH_500K               0x04
+#define    SSC_DEPTH_250K               0x05
 #define RCCTL                           0xFC14
 
 #define FPGA_PULL_CTL                   0xFC1D
@@ -630,6 +492,24 @@
 #define GPIO_CTL                        0xFC1F
 
 #define LDO_CTL                         0xFC1E
+#define   BPP_ASIC_1V7                  0x00
+#define   BPP_ASIC_1V8                  0x01
+#define   BPP_ASIC_1V9                  0x02
+#define   BPP_ASIC_2V0                  0x03
+#define   BPP_ASIC_2V7                  0x04
+#define   BPP_ASIC_2V8                  0x05
+#define   BPP_ASIC_3V2                  0x06
+#define   BPP_ASIC_3V3                  0x07
+#define   BPP_REG_TUNED18               0x07
+#define   BPP_TUNED18_SHIFT_8402        5
+#define   BPP_TUNED18_SHIFT_8411        4
+#define   BPP_PAD_MASK                  0x04
+#define   BPP_PAD_3V3                   0x04
+#define   BPP_PAD_1V8                   0x00
+#define   BPP_LDO_POWB                  0x03
+#define   BPP_LDO_ON                    0x00
+#define   BPP_LDO_SUSPEND               0x02
+#define   BPP_LDO_OFF                   0x03
 #define SYS_VER                         0xFC32
 
 #define CARD_PULL_CTL1                  0xFD60
@@ -642,6 +522,10 @@
 /* PCI Express Related Registers */
 #define IRQEN0                          0xFE20
 #define IRQSTAT0                        0xFE21
+#define    DMA_DONE_INT                 0x80
+#define    SUSPEND_INT                  0x40
+#define    LINK_RDY_INT                 0x20
+#define    LINK_DOWN_INT                0x10
 #define IRQEN1                          0xFE22
 #define IRQSTAT1                        0xFE23
 #define TLPRIEN                         0xFE24
@@ -653,6 +537,16 @@
 #define DMATC2                          0xFE2A
 #define DMATC3                          0xFE2B
 #define DMACTL                          0xFE2C
+#define   DMA_RST                       0x80
+#define   DMA_BUSY                      0x04
+#define   DMA_DIR_TO_CARD               0x00
+#define   DMA_DIR_FROM_CARD             0x02
+#define   DMA_EN                        0x01
+#define   DMA_128                       (0 << 4)
+#define   DMA_256                       (1 << 4)
+#define   DMA_512                       (2 << 4)
+#define   DMA_1024                      (3 << 4)
+#define   DMA_PACK_SIZE_MASK            0x30
 #define BCTL                            0xFE2D
 #define RBBC0                           0xFE2E
 #define RBBC1                           0xFE2F
@@ -678,14 +572,21 @@
 #define MSGTXDATA2                      0xFE46
 #define MSGTXDATA3                      0xFE47
 #define MSGTXCTL                        0xFE48
-#define PETXCFG                         0xFE49
 #define LTR_CTL                         0xFE4A
 #define OBFF_CFG                        0xFE4C
 
 #define CDRESUMECTL                     0xFE52
 #define WAKE_SEL_CTL                    0xFE54
+#define PCLK_CTL                        0xFE55
+#define   PCLK_MODE_SEL                 0x20
 #define PME_FORCE_CTL                   0xFE56
+
 #define ASPM_FORCE_CTL                  0xFE57
+#define   FORCE_ASPM_CTL0               0x10
+#define   FORCE_ASPM_VAL_MASK           0x03
+#define   FORCE_ASPM_L1_EN              0x02
+#define   FORCE_ASPM_L0_EN              0x01
+#define   FORCE_ASPM_NO_ASPM            0x00
 #define PM_CLK_FORCE_CTL                0xFE58
 #define FUNC_FORCE_CTL                  0xFE59
 #define PERST_GLITCH_WIDTH              0xFE5C
@@ -693,19 +594,36 @@
 #define RESET_LOAD_REG                  0xFE5E
 #define EFUSE_CONTENT                   0xFE5F
 #define HOST_SLEEP_STATE                0xFE60
-#define SDIO_CFG                        0xFE70
+#define   HOST_ENTER_S1                 1
+#define   HOST_ENTER_S3                 2
 
+#define SDIO_CFG                        0xFE70
+#define PM_EVENT_DEBUG                  0xFE71
+#define   PME_DEBUG_0                   0x08
 #define NFTS_TX_CTRL                    0xFE72
 
 #define PWR_GATE_CTRL                   0xFE75
+#define   PWR_GATE_EN                   0x01
+#define   LDO3318_PWR_MASK              0x06
+#define   LDO_ON                        0x00
+#define   LDO_SUSPEND                   0x04
+#define   LDO_OFF                       0x06
 #define PWD_SUSPEND_EN                  0xFE76
 #define LDO_PWR_SEL                     0xFE78
 
+#define L1SUB_CONFIG1                   0xFE8D
+#define L1SUB_CONFIG2                   0xFE8E
+#define   L1SUB_AUTO_CFG                0x02
+#define L1SUB_CONFIG3                   0xFE8F
+
 #define DUMMY_REG_RESET_0               0xFE90
 
 #define AUTOLOAD_CFG_BASE               0xFF00
+#define PETXCFG                         0xFF03
 
 #define PM_CTRL1                        0xFF44
+#define   CD_RESUME_EN_MASK             0xF0
+
 #define PM_CTRL2                        0xFF45
 #define PM_CTRL3                        0xFF46
 #define   SDIO_SEND_PME_EN              0x80
@@ -726,18 +644,125 @@
 #define IMAGE_FLAG_ADDR0                0xCE80
 #define IMAGE_FLAG_ADDR1                0xCE81
 
+#define RREF_CFG                        0xFF6C
+#define   RREF_VBGSEL_MASK              0x38
+#define   RREF_VBGSEL_1V25              0x28
+
+#define OOBS_CONFIG                     0xFF6E
+#define   OOBS_AUTOK_DIS                0x80
+#define   OOBS_VAL_MASK                 0x1F
+
+#define LDO_DV18_CFG                    0xFF70
+#define   LDO_DV18_SR_MASK              0xC0
+#define   LDO_DV18_SR_DF                0x40
+
+#define LDO_CONFIG2                     0xFF71
+#define   LDO_D3318_MASK                0x07
+#define   LDO_D3318_33V                 0x07
+#define   LDO_D3318_18V                 0x02
+
+#define LDO_VCC_CFG0                    0xFF72
+#define   LDO_VCC_LMTVTH_MASK           0x30
+#define   LDO_VCC_LMTVTH_2A             0x10
+
+#define LDO_VCC_CFG1                    0xFF73
+#define   LDO_VCC_REF_TUNE_MASK         0x30
+#define   LDO_VCC_REF_1V2               0x20
+#define   LDO_VCC_TUNE_MASK             0x07
+#define   LDO_VCC_1V8                   0x04
+#define   LDO_VCC_3V3                   0x07
+#define   LDO_VCC_LMT_EN                0x08
+
+#define LDO_VIO_CFG                     0xFF75
+#define   LDO_VIO_SR_MASK               0xC0
+#define   LDO_VIO_SR_DF                 0x40
+#define   LDO_VIO_REF_TUNE_MASK         0x30
+#define   LDO_VIO_REF_1V2               0x20
+#define   LDO_VIO_TUNE_MASK             0x07
+#define   LDO_VIO_1V7                   0x03
+#define   LDO_VIO_1V8                   0x04
+#define   LDO_VIO_3V3                   0x07
+
+#define LDO_DV12S_CFG                   0xFF76
+#define   LDO_REF12_TUNE_MASK           0x18
+#define   LDO_REF12_TUNE_DF             0x10
+#define   LDO_D12_TUNE_MASK             0x07
+#define   LDO_D12_TUNE_DF               0x04
+
+#define LDO_AV12S_CFG                   0xFF77
+#define   LDO_AV12S_TUNE_MASK           0x07
+#define   LDO_AV12S_TUNE_DF             0x04
+
+#define SD40_LDO_CTL1                   0xFE7D
+#define   SD40_VIO_TUNE_MASK            0x70
+#define   SD40_VIO_TUNE_1V7             0x30
+#define   SD_VIO_LDO_1V8                0x40
+#define   SD_VIO_LDO_3V3                0x70
+
 /* Phy register */
 #define PHY_PCR                         0x00
+#define   PHY_PCR_FORCE_CODE            0xB000
+#define   PHY_PCR_OOBS_CALI_50          0x0800
+#define   PHY_PCR_OOBS_VCM_08           0x0200
+#define   PHY_PCR_OOBS_SEN_90           0x0040
+#define   PHY_PCR_RSSI_EN               0x0002
+#define   PHY_PCR_RX10K                 0x0001
+
 #define PHY_RCR0                        0x01
 #define PHY_RCR1                        0x02
+#define   PHY_RCR1_ADP_TIME_4           0x0400
+#define   PHY_RCR1_VCO_COARSE           0x001F
+#define PHY_SSCCR2                      0x02
+#define   PHY_SSCCR2_PLL_NCODE          0x0A00
+#define   PHY_SSCCR2_TIME0              0x001C
+#define   PHY_SSCCR2_TIME2_WIDTH        0x0003
+
 #define PHY_RCR2                        0x03
+#define   PHY_RCR2_EMPHASE_EN           0x8000
+#define   PHY_RCR2_NADJR                0x4000
+#define   PHY_RCR2_CDR_SR_2             0x0100
+#define   PHY_RCR2_FREQSEL_12           0x0040
+#define   PHY_RCR2_CDR_SC_12P           0x0010
+#define   PHY_RCR2_CALIB_LATE           0x0002
+#define PHY_SSCCR3                      0x03
+#define   PHY_SSCCR3_STEP_IN            0x2740
+#define   PHY_SSCCR3_CHECK_DELAY        0x0008
+#define _PHY_ANA03                      0x03
+#define   _PHY_ANA03_TIMER_MAX          0x2700
+#define   _PHY_ANA03_OOBS_DEB_EN        0x0040
+#define   _PHY_CMU_DEBUG_EN             0x0008
+
 #define PHY_RTCR                        0x04
 #define PHY_RDR                         0x05
+#define   PHY_RDR_RXDSEL_1_9            0x4000
+#define   PHY_SSC_AUTO_PWD              0x0600
 #define PHY_TCR0                        0x06
 #define PHY_TCR1                        0x07
 #define PHY_TUNE                        0x08
+#define   PHY_TUNE_TUNEREF_1_0          0x4000
+#define   PHY_TUNE_VBGSEL_1252          0x0C00
+#define   PHY_TUNE_SDBUS_33             0x0200
+#define   PHY_TUNE_TUNED18              0x01C0
+#define   PHY_TUNE_TUNED12              0X0020
+#define   PHY_TUNE_TUNEA12              0x0004
+#define   PHY_TUNE_VOLTAGE_MASK         0xFC3F
+#define   PHY_TUNE_VOLTAGE_3V3          0x03C0
+#define   PHY_TUNE_D18_1V8              0x0100
+#define   PHY_TUNE_D18_1V7              0x0080
+#define PHY_ANA08                       0x08
+#define   PHY_ANA08_RX_EQ_DCGAIN        0x5000
+#define   PHY_ANA08_SEL_RX_EN           0x0400
+#define   PHY_ANA08_RX_EQ_VAL           0x03C0
+#define   PHY_ANA08_SCP                 0x0020
+#define   PHY_ANA08_SEL_IPI             0x0004
+
 #define PHY_IMR                         0x09
 #define PHY_BPCR                        0x0A
+#define   PHY_BPCR_IBRXSEL              0x0400
+#define   PHY_BPCR_IBTXSEL              0x0100
+#define   PHY_BPCR_IB_FILTER            0x0080
+#define   PHY_BPCR_CMIRROR_EN           0x0040
+
 #define PHY_BIST                        0x0B
 #define PHY_RAW_L                       0x0C
 #define PHY_RAW_H                       0x0D
@@ -745,6 +770,7 @@
 #define PHY_HOST_CLK_CTRL               0x0F
 #define PHY_DMR                         0x10
 #define PHY_BACR                        0x11
+#define   PHY_BACR_BASIC_MASK           0xFFF3
 #define PHY_IER                         0x12
 #define PHY_BCSR                        0x13
 #define PHY_BPR                         0x14
@@ -752,80 +778,70 @@
 #define PHY_BPNR                        0x16
 #define PHY_BRNR2                       0x17
 #define PHY_BENR                        0x18
-#define PHY_REG_REV                     0x19
+#define PHY_REV                         0x19
+#define   PHY_REV_RESV                  0xE000
+#define   PHY_REV_RXIDLE_LATCHED        0x1000
+#define   PHY_REV_P1_EN                 0x0800
+#define   PHY_REV_RXIDLE_EN             0x0400
+#define   PHY_REV_CLKREQ_TX_EN          0x0200
+#define   PHY_REV_CLKREQ_RX_EN          0x0100
+#define   PHY_REV_CLKREQ_DT_1_0         0x0040
+#define   PHY_REV_STOP_CLKRD            0x0020
+#define   PHY_REV_RX_PWST               0x0008
+#define   PHY_REV_STOP_CLKWR            0x0004
+#define _PHY_REV0                       0x19
+#define   _PHY_REV0_FILTER_OUT          0x3800
+#define   _PHY_REV0_CDR_BYPASS_PFD      0x0100
+#define   _PHY_REV0_CDR_RX_IDLE_BYPASS  0x0002
+
 #define PHY_FLD0                        0x1A
+#define PHY_ANA1A                       0x1A
+#define   PHY_ANA1A_TXR_LOOPBACK        0x2000
+#define   PHY_ANA1A_RXT_BIST            0x0500
+#define   PHY_ANA1A_TXR_BIST            0x0040
+#define   PHY_ANA1A_REV                 0x0006
 #define PHY_FLD1                        0x1B
 #define PHY_FLD2                        0x1C
 #define PHY_FLD3                        0x1D
+#define   PHY_FLD3_TIMER_4              0x0800
+#define   PHY_FLD3_TIMER_6              0x0020
+#define   PHY_FLD3_RXDELINK             0x0004
+#define PHY_ANA1D                       0x1D
+#define   PHY_ANA1D_DEBUG_ADDR          0x0004
+#define _PHY_FLD0                       0x1D
+#define   _PHY_FLD0_CLK_REQ_20C         0x8000
+#define   _PHY_FLD0_RX_IDLE_EN          0x1000
+#define   _PHY_FLD0_BIT_ERR_RSTN        0x0800
+#define   _PHY_FLD0_BER_COUNT           0x01E0
+#define   _PHY_FLD0_BER_TIMER           0x001E
+#define   _PHY_FLD0_CHECK_EN            0x0001
+
 #define PHY_FLD4                        0x1E
+#define   PHY_FLD4_FLDEN_SEL            0x4000
+#define   PHY_FLD4_REQ_REF              0x2000
+#define   PHY_FLD4_RXAMP_OFF            0x1000
+#define   PHY_FLD4_REQ_ADDA             0x0800
+#define   PHY_FLD4_BER_COUNT            0x00E0
+#define   PHY_FLD4_BER_TIMER            0x000A
+#define   PHY_FLD4_BER_CHK_EN           0x0001
+#define PHY_DIG1E                       0x1E
+#define   PHY_DIG1E_REV                 0x4000
+#define   PHY_DIG1E_D0_X_D1             0x1000
+#define   PHY_DIG1E_RX_ON_HOST          0x0800
+#define   PHY_DIG1E_RCLK_REF_HOST       0x0400
+#define   PHY_DIG1E_RCLK_TX_EN_KEEP     0x0040
+#define   PHY_DIG1E_RCLK_TX_TERM_KEEP   0x0020
+#define   PHY_DIG1E_RCLK_RX_EIDLE_ON    0x0010
+#define   PHY_DIG1E_TX_TERM_KEEP        0x0008
+#define   PHY_DIG1E_RX_TERM_KEEP        0x0004
+#define   PHY_DIG1E_TX_EN_KEEP          0x0002
+#define   PHY_DIG1E_RX_EN_KEEP          0x0001
 #define PHY_DUM_REG                     0x1F
 
-#define LCTLR                           0x80
-#define   LCTLR_EXT_SYNC                0x80
-#define   LCTLR_COMMON_CLOCK_CFG        0x40
-#define   LCTLR_RETRAIN_LINK            0x20
-#define   LCTLR_LINK_DISABLE            0x10
-#define   LCTLR_RCB                     0x08
-#define   LCTLR_RESERVED                0x04
-#define   LCTLR_ASPM_CTL_MASK           0x03
-
 #define PCR_SETTING_REG1                0x724
 #define PCR_SETTING_REG2                0x814
 #define PCR_SETTING_REG3                0x747
 
-/* Phy bits */
-#define PHY_PCR_FORCE_CODE                      0xB000
-#define PHY_PCR_OOBS_CALI_50                    0x0800
-#define PHY_PCR_OOBS_VCM_08                     0x0200
-#define PHY_PCR_OOBS_SEN_90                     0x0040
-#define PHY_PCR_RSSI_EN                         0x0002
-
-#define PHY_RCR1_ADP_TIME                       0x0100
-#define PHY_RCR1_VCO_COARSE                     0x001F
-
-#define PHY_RCR2_EMPHASE_EN                     0x8000
-#define PHY_RCR2_NADJR                          0x4000
-#define PHY_RCR2_CDR_CP_10                      0x0400
-#define PHY_RCR2_CDR_SR_2                       0x0100
-#define PHY_RCR2_FREQSEL_12                     0x0040
-#define PHY_RCR2_CPADJEN                        0x0020
-#define PHY_RCR2_CDR_SC_8                       0x0008
-#define PHY_RCR2_CALIB_LATE                     0x0002
-
-#define PHY_RDR_RXDSEL_1_9                      0x4000
-
-#define PHY_TUNE_TUNEREF_1_0                    0x4000
-#define PHY_TUNE_VBGSEL_1252                    0x0C00
-#define PHY_TUNE_SDBUS_33                       0x0200
-#define PHY_TUNE_TUNED18                        0x01C0
-#define PHY_TUNE_TUNED12                        0X0020
-
-#define PHY_BPCR_IBRXSEL                        0x0400
-#define PHY_BPCR_IBTXSEL                        0x0100
-#define PHY_BPCR_IB_FILTER                      0x0080
-#define PHY_BPCR_CMIRROR_EN                     0x0040
-
-#define PHY_REG_REV_RESV                        0xE000
-#define PHY_REG_REV_RXIDLE_LATCHED              0x1000
-#define PHY_REG_REV_P1_EN                       0x0800
-#define PHY_REG_REV_RXIDLE_EN                   0x0400
-#define PHY_REG_REV_CLKREQ_DLY_TIMER_1_0        0x0040
-#define PHY_REG_REV_STOP_CLKRD                  0x0020
-#define PHY_REG_REV_RX_PWST                     0x0008
-#define PHY_REG_REV_STOP_CLKWR                  0x0004
-
-#define PHY_FLD3_TIMER_4                        0x7800
-#define PHY_FLD3_TIMER_6                        0x00E0
-#define PHY_FLD3_RXDELINK                       0x0004
-
-#define PHY_FLD4_FLDEN_SEL                      0x4000
-#define PHY_FLD4_REQ_REF                        0x2000
-#define PHY_FLD4_RXAMP_OFF                      0x1000
-#define PHY_FLD4_REQ_ADDA                       0x0800
-#define PHY_FLD4_BER_COUNT                      0x00E0
-#define PHY_FLD4_BER_TIMER                      0x000A
-#define PHY_FLD4_BER_CHK_EN                     0x0001
-
 #define rtsx_pci_init_cmd(pcr)          ((pcr)->ci = 0)
 
 struct rtsx_pcr;
@@ -835,6 +851,8 @@ struct pcr_handle {
 };
 
 struct pcr_ops {
+        int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val);
+        int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val);
         int             (*extra_init_hw)(struct rtsx_pcr *pcr);
         int             (*optimize_phy)(struct rtsx_pcr *pcr);
         int             (*turn_on_led)(struct rtsx_pcr *pcr);
@@ -856,6 +874,7 @@ enum PDEV_STAT  {PDEV_STAT_IDLE, PDEV_STAT_RUN};
 struct rtsx_pcr {
         struct pci_dev                  *pci;
         unsigned int                    id;
+        int                             pcie_cap;
 
         /* pci resources */
         unsigned long                   addr;
@@ -928,6 +947,8 @@ struct rtsx_pcr {
         const struct pcr_ops            *ops;
         enum PDEV_STAT                  state;
 
+        u16                             reg_pm_ctrl3;
+
         int                             num_slots;
         struct rtsx_slot                *slots;
 };
@@ -935,6 +956,10 @@ struct rtsx_pcr {
 #define CHK_PCI_PID(pcr, pid)           ((pcr)->pci->device == (pid))
 #define PCI_VID(pcr)                    ((pcr)->pci->vendor)
 #define PCI_PID(pcr)                    ((pcr)->pci->device)
+#define is_version(pcr, pid, ver)                               \
+        (CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver))
+#define pcr_dbg(pcr, fmt, arg...)                               \
+        dev_dbg(&(pcr)->pci->dev, fmt, ##arg)
 
 #define SDR104_PHASE(val)               ((val) & 0xFF)
 #define SDR50_PHASE(val)                (((val) >> 8) & 0xFF)
@@ -1004,4 +1029,17 @@ static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
 }
 
+static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr,
+        u16 mask, u16 append)
+{
+        int err;
+        u16 val;
+
+        err = rtsx_pci_read_phy_register(pcr, addr, &val);
+        if (err < 0)
+                return err;
+
+        return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append);
+}
+
 #endif
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 3fdb7cfbffb3..75115384f3fc 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -58,13 +58,7 @@ enum sec_device_type {
  * @irq_base:           Base IRQ number for device, required for IRQs
  * @irq:                Generic IRQ number for device
  * @irq_data:           Runtime data structure for IRQ controller
- * @ono:                Power onoff IRQ number for s5m87xx
  * @wakeup:             Whether or not this is a wakeup device
- * @wtsr_smpl:          Whether or not to enable in RTC driver the Watchdog
- *                      Timer Software Reset (registers set to default value
- *                      after PWRHOLD falling) and Sudden Momentary Power Loss
- *                      (PMIC will enter power on sequence after short drop in
- *                      VBATT voltage).
  */
 struct sec_pmic_dev {
         struct device *dev;
@@ -77,9 +71,7 @@ struct sec_pmic_dev {
         int irq;
         struct regmap_irq_chip_data *irq_data;
 
-        int ono;
         bool wakeup;
-        bool wtsr_smpl;
 };
 
 int sec_irq_init(struct sec_pmic_dev *sec_pmic);
@@ -95,7 +87,6 @@ struct sec_platform_data {
         int                             irq_base;
         int                             (*cfg_pmic_irq)(void);
 
-        int                             ono;
         bool                            wakeup;
         bool                            buck_voltage_lock;
 
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index f35af7361b60..667aa40486dd 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -74,8 +74,8 @@ enum s2mps11_irq {
         S2MPS11_IRQ_MRB,
 
         S2MPS11_IRQ_RTC60S,
-        S2MPS11_IRQ_RTCA0,
         S2MPS11_IRQ_RTCA1,
+        S2MPS11_IRQ_RTCA0,
         S2MPS11_IRQ_SMPL,
         S2MPS11_IRQ_RTC1S,
         S2MPS11_IRQ_WTSR,
diff --git a/include/linux/mfd/sky81452.h b/include/linux/mfd/sky81452.h
new file mode 100644
index 000000000000..b0925fa3e9ef
--- /dev/null
+++ b/include/linux/mfd/sky81452.h
@@ -0,0 +1,31 @@
+/*
+ * sky81452.h   SKY81452 MFD driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SKY81452_H
+#define _SKY81452_H
+
+#include <linux/platform_data/sky81452-backlight.h>
+#include <linux/regulator/machine.h>
+
+struct sky81452_platform_data {
+        struct sky81452_bl_platform_data *bl_pdata;
+        struct regulator_init_data *regulator_init_data;
+};
+
+#endif
diff --git a/include/linux/mfd/stw481x.h b/include/linux/mfd/stw481x.h
index eda121556e5d..833074b766bd 100644
--- a/include/linux/mfd/stw481x.h
+++ b/include/linux/mfd/stw481x.h
@@ -41,15 +41,11 @@
 
 /**
  * struct stw481x - state holder for the Stw481x drivers
- * @mutex: mutex to serialize I2C accesses
  * @i2c_client: corresponding I2C client
- * @regulator: regulator device for regulator children
  * @map: regmap handle to access device registers
  */
 struct stw481x {
-        struct mutex            lock;
         struct i2c_client       *client;
-        struct regulator_dev    *vmmc_regulator;
         struct regmap           *map;
 };
 
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h
index 00ef24bf6ede..9352adc95de6 100644
--- a/include/linux/mfd/syscon/exynos5-pmu.h
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -36,6 +36,9 @@
 #define EXYNOS5420_MTCADC_PHY_CONTROL           (0x724)
 #define EXYNOS5420_DPTX_PHY_CONTROL             (0x728)
 
+/* Exynos5433 specific register definitions */
+#define EXYNOS5433_USBHOST30_PHY_CONTROL        (0x728)
+
 #define EXYNOS5_PHY_ENABLE                      BIT(0)
 
 #define EXYNOS5_MIPI_PHY_S_RESETN               BIT(1)
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
index c203c9c56776..468c31a27fcf 100644
--- a/include/linux/mfd/tc3589x.h
+++ b/include/linux/mfd/tc3589x.h
@@ -140,36 +140,13 @@ extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val);
 #define TC_KPD_DEBOUNCE_PERIOD  0xA3
 #define TC_KPD_SETTLE_TIME      0xA3
 
-/**
- * struct tc35893_platform_data - data structure for platform specific data
- * @keymap_data:        matrix scan code table for keycodes
- * @krow:               mask for available rows, value is 0xFF
- * @kcol:               mask for available columns, value is 0xFF
- * @debounce_period:    platform specific debounce time
- * @settle_time:        platform specific settle down time
- * @irqtype:            type of interrupt, falling or rising edge
- * @enable_wakeup:      specifies if keypad event can wake up system from sleep
- * @no_autorepeat:      flag for auto repetition
- */
-struct tc3589x_keypad_platform_data {
-        const struct matrix_keymap_data *keymap_data;
-        u8                      krow;
-        u8                      kcol;
-        u8                      debounce_period;
-        u8                      settle_time;
-        unsigned long           irqtype;
-        bool                    enable_wakeup;
-        bool                    no_autorepeat;
-};
 
 /**
  * struct tc3589x_platform_data - TC3589x platform data
  * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*)
- * @keypad: keypad-specific platform data
  */
 struct tc3589x_platform_data {
         unsigned int block;
-        const struct tc3589x_keypad_platform_data *keypad;
 };
 
 #endif
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
index 3f4e994ace2b..1fd50dcfe47c 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -128,6 +128,7 @@
 
 /* Sequencer Status */
 #define SEQ_STATUS BIT(5)
+#define CHARGE_STEP             0x11
 
 #define ADC_CLK                 3000000
 #define TOTAL_STEPS             16
diff --git a/include/linux/mfd/wm8350/supply.h b/include/linux/mfd/wm8350/supply.h
index 2b9479310bbd..8dc93673e34a 100644
--- a/include/linux/mfd/wm8350/supply.h
+++ b/include/linux/mfd/wm8350/supply.h
@@ -123,9 +123,9 @@ struct wm8350_charger_policy {
 
 struct wm8350_power {
         struct platform_device *pdev;
-        struct power_supply battery;
-        struct power_supply usb;
-        struct power_supply ac;
+        struct power_supply *battery;
+        struct power_supply *usb;
+        struct power_supply *ac;
         struct wm8350_charger_policy *policy;
 
         int rev_g_coeff;
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 78baed5f2952..cac1c0904d5f 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -69,7 +69,6 @@ static inline int migrate_huge_page_move_mapping(struct address_space *mapping,
 extern bool pmd_trans_migrating(pmd_t pmd);
 extern int migrate_misplaced_page(struct page *page,
                                   struct vm_area_struct *vma, int node);
-extern bool migrate_ratelimited(int node);
 #else
 static inline bool pmd_trans_migrating(pmd_t pmd)
 {
@@ -80,10 +79,6 @@ static inline int migrate_misplaced_page(struct page *page,
 {
         return -EAGAIN; /* can't migrate now */
 }
-static inline bool migrate_ratelimited(int node)
-{
-        return false;
-}
 #endif /* CONFIG_NUMA_BALANCING */
 
 #if defined(CONFIG_NUMA_BALANCING) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 47a93928b90f..6571dd78e984 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1294,9 +1294,11 @@ int __set_page_dirty_no_writeback(struct page *page);
 int redirty_page_for_writepage(struct writeback_control *wbc,
                                 struct page *page);
 void account_page_dirtied(struct page *page, struct address_space *mapping);
+void account_page_cleaned(struct page *page, struct address_space *mapping);
 int set_page_dirty(struct page *page);
 int set_page_dirty_lock(struct page *page);
 int clear_page_dirty_for_io(struct page *page);
+
 int get_cmdline(struct task_struct *task, char *buffer, int buflen);
 
 /* Is the vma a continuation of the stack vma above it? */
@@ -2109,7 +2111,7 @@ static inline struct page *follow_page(struct vm_area_struct *vma,
 #define FOLL_FORCE      0x10    /* get_user_pages read/write w/o permission */
 #define FOLL_NOWAIT     0x20    /* if a disk transfer is needed, start the IO
                                  * and return without waiting upon it */
-#define FOLL_MLOCK      0x40    /* mark page as mlocked */
+#define FOLL_POPULATE   0x40    /* fault in page */
 #define FOLL_SPLIT      0x80    /* don't return transhuge pages, split them */
 #define FOLL_HWPOISON   0x100   /* check page is hwpoisoned */
 #define FOLL_NUMA       0x200   /* force NUMA hinting page fault */
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 199a03aab8dc..590630eb59ba 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -364,7 +364,9 @@ struct mm_struct {
         atomic_t mm_users;                      /* How many users with user space? */
         atomic_t mm_count;                      /* How many references to "struct mm_struct" (users count as 1) */
         atomic_long_t nr_ptes;                  /* PTE page table pages */
+#if CONFIG_PGTABLE_LEVELS > 2
         atomic_long_t nr_pmds;                  /* PMD page table pages */
+#endif
         int map_count;                          /* number of VMAs */
 
         spinlock_t page_table_lock;             /* Protects page tables and some counters */
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 160448f920ac..de722d4e9d61 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -79,7 +79,7 @@ struct mmc_command {
 #define mmc_cmd_type(cmd)       ((cmd)->flags & MMC_CMD_MASK)
 
         unsigned int            retries;        /* max number of retries */
-        unsigned int            error;          /* command error */
+        int                     error;          /* command error */
 
 /*
  * Standard errno values are used for errors, but some have specific
@@ -108,7 +108,7 @@ struct mmc_data {
         unsigned int            timeout_clks;   /* data timeout (in clocks) */
         unsigned int            blksz;          /* data block size */
         unsigned int            blocks;         /* number of blocks */
-        unsigned int            error;          /* data error */
+        int                     error;          /* data error */
         unsigned int            flags;
 
 #define MMC_DATA_WRITE  (1 << 8)
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 471fb3116dbe..12111993a317 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -44,6 +44,7 @@ struct mmc_data;
  * struct dw_mci - MMC controller state shared between all slots
  * @lock: Spinlock protecting the queue and associated data.
  * @regs: Pointer to MMIO registers.
+ * @fifo_reg: Pointer to MMIO registers for data FIFO
  * @sg: Scatterlist entry currently being processed by PIO code, if any.
  * @sg_miter: PIO mapping scatterlist iterator.
  * @cur_slot: The slot which is currently using the controller.
@@ -79,7 +80,6 @@ struct mmc_data;
  * @current_speed: Configured rate of the controller.
  * @num_slots: Number of slots available.
  * @verid: Denote Version ID.
- * @data_offset: Set the offset of DATA register according to VERID.
  * @dev: Device associated with the MMC controller.
  * @pdata: Platform data associated with the MMC controller.
  * @drv_data: Driver specific data for identified variant of the controller
@@ -132,6 +132,7 @@ struct dw_mci {
         spinlock_t              lock;
         spinlock_t              irq_lock;
         void __iomem            *regs;
+        void __iomem            *fifo_reg;
 
         struct scatterlist      *sg;
         struct sg_mapping_iter  sg_miter;
@@ -172,7 +173,6 @@ struct dw_mci {
         u32                     num_slots;
         u32                     fifoth_val;
         u16                     verid;
-        u16                     data_offset;
         struct device           *dev;
         struct dw_mci_board     *pdata;
         const struct dw_mci_drv_data    *drv_data;
@@ -202,6 +202,8 @@ struct dw_mci {
         int                     irq;
 
         int                     sdio_id0;
+
+        struct timer_list       cmd11_timer;
 };
 
 /* DMA ops for Internal/External DMAC interface */
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 0c8cbe5d1550..b5bedaec6223 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -80,12 +80,6 @@ struct mmc_ios {
 
 struct mmc_host_ops {
         /*
-         * 'enable' is called when the host is claimed and 'disable' is called
-         * when the host is released. 'enable' and 'disable' are deprecated.
-         */
-        int (*enable)(struct mmc_host *host);
-        int (*disable)(struct mmc_host *host);
-        /*
          * It is optional for the host to implement pre_req and post_req in
          * order to support double buffering of requests (prepare one
          * request while another request is active).
diff --git a/include/linux/mmc/sdhci-spear.h b/include/linux/mmc/sdhci-spear.h
deleted file mode 100644
index 8cc095a76cf8..000000000000
--- a/include/linux/mmc/sdhci-spear.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * include/linux/mmc/sdhci-spear.h
- *
- * SDHCI declarations specific to ST SPEAr platform
- *
- * Copyright (C) 2010 ST Microelectronics
- * Viresh Kumar <viresh.linux@gmail.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef LINUX_MMC_SDHCI_SPEAR_H
-#define LINUX_MMC_SDHCI_SPEAR_H
-
-#include <linux/platform_device.h>
-/*
- * struct sdhci_plat_data: spear sdhci platform data structure
- *
- * card_int_gpio: gpio pin used for card detection
- */
-struct sdhci_plat_data {
-        int card_int_gpio;
-};
-
-/* This function is used to set platform_data field of pdev->dev */
-static inline void
-sdhci_set_plat_data(struct platform_device *pdev, struct sdhci_plat_data *data)
-{
-        pdev->dev.platform_data = data;
-}
-
-#endif /* LINUX_MMC_SDHCI_SPEAR_H */
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
deleted file mode 100644
index c3e3db196738..000000000000
--- a/include/linux/mmc/sdhci.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- *  linux/include/linux/mmc/sdhci.h - Secure Digital Host Controller Interface
- *
- *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-#ifndef LINUX_MMC_SDHCI_H
-#define LINUX_MMC_SDHCI_H
-
-#include <linux/scatterlist.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-
-struct sdhci_host_next {
-        unsigned int    sg_count;
-        s32             cookie;
-};
-
-struct sdhci_host {
-        /* Data set by hardware interface driver */
-        const char *hw_name;    /* Hardware bus name */
-
-        unsigned int quirks;    /* Deviations from spec. */
-
-/* Controller doesn't honor resets unless we touch the clock register */
-#define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
-/* Controller has bad caps bits, but really supports DMA */
-#define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
-/* Controller doesn't like to be reset when there is no card inserted. */
-#define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
-/* Controller doesn't like clearing the power reg before a change */
-#define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
-/* Controller has flaky internal state so reset it on each ios change */
-#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS               (1<<4)
-/* Controller has an unusable DMA engine */
-#define SDHCI_QUIRK_BROKEN_DMA                          (1<<5)
-/* Controller has an unusable ADMA engine */
-#define SDHCI_QUIRK_BROKEN_ADMA                         (1<<6)
-/* Controller can only DMA from 32-bit aligned addresses */
-#define SDHCI_QUIRK_32BIT_DMA_ADDR                      (1<<7)
-/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_DMA_SIZE                      (1<<8)
-/* Controller can only ADMA chunks that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_ADMA_SIZE                     (1<<9)
-/* Controller needs to be reset after each request to stay stable */
-#define SDHCI_QUIRK_RESET_AFTER_REQUEST                 (1<<10)
-/* Controller needs voltage and power writes to happen separately */
-#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER             (1<<11)
-/* Controller provides an incorrect timeout value for transfers */
-#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL                  (1<<12)
-/* Controller has an issue with buffer bits for small transfers */
-#define SDHCI_QUIRK_BROKEN_SMALL_PIO                    (1<<13)
-/* Controller does not provide transfer-complete interrupt when not busy */
-#define SDHCI_QUIRK_NO_BUSY_IRQ                         (1<<14)
-/* Controller has unreliable card detection */
-#define SDHCI_QUIRK_BROKEN_CARD_DETECTION               (1<<15)
-/* Controller reports inverted write-protect state */
-#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT              (1<<16)
-/* Controller does not like fast PIO transfers */
-#define SDHCI_QUIRK_PIO_NEEDS_DELAY                     (1<<18)
-/* Controller has to be forced to use block size of 2048 bytes */
-#define SDHCI_QUIRK_FORCE_BLK_SZ_2048                   (1<<20)
-/* Controller cannot do multi-block transfers */
-#define SDHCI_QUIRK_NO_MULTIBLOCK                       (1<<21)
-/* Controller can only handle 1-bit data transfers */
-#define SDHCI_QUIRK_FORCE_1_BIT_DATA                    (1<<22)
-/* Controller needs 10ms delay between applying power and clock */
-#define SDHCI_QUIRK_DELAY_AFTER_POWER                   (1<<23)
-/* Controller uses SDCLK instead of TMCLK for data timeouts */
-#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK             (1<<24)
-/* Controller reports wrong base clock capability */
-#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN               (1<<25)
-/* Controller cannot support End Attribute in NOP ADMA descriptor */
-#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC               (1<<26)
-/* Controller is missing device caps. Use caps provided by host */
-#define SDHCI_QUIRK_MISSING_CAPS                        (1<<27)
-/* Controller uses Auto CMD12 command to stop the transfer */
-#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12              (1<<28)
-/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
-#define SDHCI_QUIRK_NO_HISPD_BIT                        (1<<29)
-/* Controller treats ADMA descriptors with length 0000h incorrectly */
-#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC            (1<<30)
-/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
-#define SDHCI_QUIRK_UNSTABLE_RO_DETECT                  (1<<31)
-
-        unsigned int quirks2;   /* More deviations from spec. */
-
-#define SDHCI_QUIRK2_HOST_OFF_CARD_ON                   (1<<0)
-#define SDHCI_QUIRK2_HOST_NO_CMD23                      (1<<1)
-/* The system physically doesn't support 1.8v, even if the host does */
-#define SDHCI_QUIRK2_NO_1_8_V                           (1<<2)
-#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN                (1<<3)
-#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON               (1<<4)
-/* Controller has a non-standard host control register */
-#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL                (1<<5)
-/* Controller does not support HS200 */
-#define SDHCI_QUIRK2_BROKEN_HS200                       (1<<6)
-/* Controller does not support DDR50 */
-#define SDHCI_QUIRK2_BROKEN_DDR50                       (1<<7)
-/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
-#define SDHCI_QUIRK2_STOP_WITH_TC                       (1<<8)
-/* Controller does not support 64-bit DMA */
-#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA                  (1<<9)
-/* need clear transfer mode register before send cmd */
-#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD  (1<<10)
-/* Capability register bit-63 indicates HS400 support */
-#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400               (1<<11)
-/* forced tuned clock */
-#define SDHCI_QUIRK2_TUNING_WORK_AROUND                 (1<<12)
-/* disable the block count for single block transactions */
-#define SDHCI_QUIRK2_SUPPORT_SINGLE                     (1<<13)
-
-        int irq;                /* Device IRQ */
-        void __iomem *ioaddr;   /* Mapped address */
-
-        const struct sdhci_ops *ops;    /* Low level hw interface */
-
-        /* Internal data */
-        struct mmc_host *mmc;   /* MMC structure */
-        u64 dma_mask;           /* custom DMA mask */
-
-#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
-        struct led_classdev led;        /* LED control */
-        char led_name[32];
-#endif
-
-        spinlock_t lock;        /* Mutex */
-
-        int flags;              /* Host attributes */
-#define SDHCI_USE_SDMA          (1<<0)  /* Host is SDMA capable */
-#define SDHCI_USE_ADMA          (1<<1)  /* Host is ADMA capable */
-#define SDHCI_REQ_USE_DMA       (1<<2)  /* Use DMA for this req. */
-#define SDHCI_DEVICE_DEAD       (1<<3)  /* Device unresponsive */
-#define SDHCI_SDR50_NEEDS_TUNING (1<<4) /* SDR50 needs tuning */
-#define SDHCI_NEEDS_RETUNING    (1<<5)  /* Host needs retuning */
-#define SDHCI_AUTO_CMD12        (1<<6)  /* Auto CMD12 support */
-#define SDHCI_AUTO_CMD23        (1<<7)  /* Auto CMD23 support */
-#define SDHCI_PV_ENABLED        (1<<8)  /* Preset value enabled */
-#define SDHCI_SDIO_IRQ_ENABLED  (1<<9)  /* SDIO irq enabled */
-#define SDHCI_SDR104_NEEDS_TUNING (1<<10)       /* SDR104/HS200 needs tuning */
-#define SDHCI_USING_RETUNING_TIMER (1<<11)      /* Host is using a retuning timer for the card */
-#define SDHCI_USE_64_BIT_DMA    (1<<12) /* Use 64-bit DMA */
-#define SDHCI_HS400_TUNING      (1<<13) /* Tuning for HS400 */
-
-        unsigned int version;   /* SDHCI spec. version */
-
-        unsigned int max_clk;   /* Max possible freq (MHz) */
-        unsigned int timeout_clk;       /* Timeout freq (KHz) */
-        unsigned int clk_mul;   /* Clock Muliplier value */
-
-        unsigned int clock;     /* Current clock (MHz) */
-        u8 pwr;                 /* Current voltage */
-
-        bool runtime_suspended; /* Host is runtime suspended */
-        bool bus_on;            /* Bus power prevents runtime suspend */
-        bool preset_enabled;    /* Preset is enabled */
-
-        struct mmc_request *mrq;        /* Current request */
-        struct mmc_command *cmd;        /* Current command */
-        struct mmc_data *data;  /* Current data request */
-        unsigned int data_early:1;      /* Data finished before cmd */
-        unsigned int busy_handle:1;     /* Handling the order of Busy-end */
-
-        struct sg_mapping_iter sg_miter;        /* SG state for PIO */
-        unsigned int blocks;    /* remaining PIO blocks */
-
-        int sg_count;           /* Mapped sg entries */
-
-        void *adma_table;       /* ADMA descriptor table */
-        void *align_buffer;     /* Bounce buffer */
-
-        size_t adma_table_sz;   /* ADMA descriptor table size */
-        size_t align_buffer_sz; /* Bounce buffer size */
-
-        dma_addr_t adma_addr;   /* Mapped ADMA descr. table */
-        dma_addr_t align_addr;  /* Mapped bounce buffer */
-
-        unsigned int desc_sz;   /* ADMA descriptor size */
-        unsigned int align_sz;  /* ADMA alignment */
-        unsigned int align_mask;        /* ADMA alignment mask */
-
-        struct tasklet_struct finish_tasklet;   /* Tasklet structures */
-
-        struct timer_list timer;        /* Timer for timeouts */
-
-        u32 caps;               /* Alternative CAPABILITY_0 */
-        u32 caps1;              /* Alternative CAPABILITY_1 */
-
-        unsigned int            ocr_avail_sdio; /* OCR bit masks */
-        unsigned int            ocr_avail_sd;
-        unsigned int            ocr_avail_mmc;
-        u32 ocr_mask;           /* available voltages */
-
-        unsigned                timing;         /* Current timing */
-
-        u32                     thread_isr;
-
-        /* cached registers */
-        u32                     ier;
-
-        wait_queue_head_t       buf_ready_int;  /* Waitqueue for Buffer Read Ready interrupt */
-        unsigned int            tuning_done;    /* Condition flag set when CMD19 succeeds */
-
-        unsigned int            tuning_count;   /* Timer count for re-tuning */
-        unsigned int            tuning_mode;    /* Re-tuning mode supported by host */
-#define SDHCI_TUNING_MODE_1     0
-        struct timer_list       tuning_timer;   /* Timer for tuning */
-
-        struct sdhci_host_next  next_data;
-        unsigned long private[0] ____cacheline_aligned;
-};
-#endif /* LINUX_MMC_SDHCI_H */
diff --git a/include/linux/module.h b/include/linux/module.h
index b03485bcb82a..c883b86ea964 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -338,6 +338,8 @@ struct module {
 #ifdef CONFIG_EVENT_TRACING
         struct ftrace_event_call **trace_events;
         unsigned int num_trace_events;
+        struct trace_enum_map **trace_enums;
+        unsigned int num_trace_enums;
 #endif
 #ifdef CONFIG_FTRACE_MCOUNT_RECORD
         unsigned int num_ftrace_callsites;
diff --git a/include/linux/nmi.h b/include/linux/nmi.h
index 9b2022ab4d85..3d46fb4708e0 100644
--- a/include/linux/nmi.h
+++ b/include/linux/nmi.h
@@ -25,16 +25,11 @@ static inline void touch_nmi_watchdog(void)
 #endif
 
 #if defined(CONFIG_HARDLOCKUP_DETECTOR)
-extern void watchdog_enable_hardlockup_detector(bool val);
-extern bool watchdog_hardlockup_detector_is_enabled(void);
+extern void hardlockup_detector_disable(void);
 #else
-static inline void watchdog_enable_hardlockup_detector(bool val)
+static inline void hardlockup_detector_disable(void)
 {
 }
-static inline bool watchdog_hardlockup_detector_is_enabled(void)
-{
-        return true;
-}
 #endif
 
 /*
@@ -68,12 +63,20 @@ static inline bool trigger_allbutself_cpu_backtrace(void)
 #ifdef CONFIG_LOCKUP_DETECTOR
 int hw_nmi_is_cpu_stuck(struct pt_regs *);
 u64 hw_nmi_get_sample_period(int watchdog_thresh);
+extern int nmi_watchdog_enabled;
+extern int soft_watchdog_enabled;
 extern int watchdog_user_enabled;
 extern int watchdog_thresh;
 extern int sysctl_softlockup_all_cpu_backtrace;
 struct ctl_table;
-extern int proc_dowatchdog(struct ctl_table *, int ,
-                           void __user *, size_t *, loff_t *);
+extern int proc_watchdog(struct ctl_table *, int ,
+                         void __user *, size_t *, loff_t *);
+extern int proc_nmi_watchdog(struct ctl_table *, int ,
+                             void __user *, size_t *, loff_t *);
+extern int proc_soft_watchdog(struct ctl_table *, int ,
+                              void __user *, size_t *, loff_t *);
+extern int proc_watchdog_thresh(struct ctl_table *, int ,
+                                void __user *, size_t *, loff_t *);
 #endif
 
 #ifdef CONFIG_HAVE_ACPI_APEI_NMI
diff --git a/include/linux/of.h b/include/linux/of.h
index dfde07e77a63..9bfcc18ceab3 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -332,6 +332,7 @@ extern int of_count_phandle_with_args(const struct device_node *np,
 
 extern void of_alias_scan(void * (*dt_alloc)(u64 size, u64 align));
 extern int of_alias_get_id(struct device_node *np, const char *stem);
+extern int of_alias_get_highest_id(const char *stem);
 
 extern int of_machine_is_compatible(const char *compat);
 
@@ -594,6 +595,11 @@ static inline int of_alias_get_id(struct device_node *np, const char *stem)
         return -ENOSYS;
 }
 
+static inline int of_alias_get_highest_id(const char *stem)
+{
+        return -ENOSYS;
+}
+
 static inline int of_machine_is_compatible(const char *compat)
 {
         return 0;
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index ef370210ffb2..22801b10cef5 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -53,6 +53,7 @@ static inline struct device_node *of_cpu_device_node_get(int cpu)
         return of_node_get(cpu_dev->of_node);
 }
 
+void of_dma_configure(struct device *dev, struct device_node *np);
 #else /* CONFIG_OF */
 
 static inline int of_driver_match_device(struct device *dev,
@@ -90,6 +91,8 @@ static inline struct device_node *of_cpu_device_node_get(int cpu)
 {
         return NULL;
 }
+static inline void of_dma_configure(struct device *dev, struct device_node *np)
+{}
 #endif /* CONFIG_OF */
 
 #endif /* _LINUX_OF_DEVICE_H */
diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h
index 16c75547d725..ffbe4707d4aa 100644
--- a/include/linux/of_iommu.h
+++ b/include/linux/of_iommu.h
@@ -12,7 +12,8 @@ extern int of_get_dma_window(struct device_node *dn, const char *prefix,
                              size_t *size);
 
 extern void of_iommu_init(void);
-extern struct iommu_ops *of_iommu_configure(struct device *dev);
+extern struct iommu_ops *of_iommu_configure(struct device *dev,
+                                        struct device_node *master_np);
 
 #else
 
@@ -24,7 +25,8 @@ static inline int of_get_dma_window(struct device_node *dn, const char *prefix,
 }
 
 static inline void of_iommu_init(void) { }
-static inline struct iommu_ops *of_iommu_configure(struct device *dev)
+static inline struct iommu_ops *of_iommu_configure(struct device *dev,
+                                         struct device_node *master_np)
 {
         return NULL;
 }
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index ce0e5abeb454..29fd3fe1c035 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -16,6 +16,7 @@ int of_pci_get_devfn(struct device_node *np);
 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
 int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
 int of_get_pci_domain_nr(struct device_node *node);
+void of_pci_dma_configure(struct pci_dev *pci_dev);
 #else
 static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
 {
@@ -50,6 +51,8 @@ of_get_pci_domain_nr(struct device_node *node)
 {
         return -1;
 }
+
+static inline void of_pci_dma_configure(struct pci_dev *pci_dev) { }
 #endif
 
 #if defined(CONFIG_OF_ADDRESS)
diff --git a/include/linux/oom.h b/include/linux/oom.h
index d5771bed59c9..44b2f6f7bbd8 100644
--- a/include/linux/oom.h
+++ b/include/linux/oom.h
@@ -66,7 +66,8 @@ extern bool oom_zonelist_trylock(struct zonelist *zonelist, gfp_t gfp_flags);
 extern void oom_zonelist_unlock(struct zonelist *zonelist, gfp_t gfp_flags);
 
 extern void check_panic_on_oom(enum oom_constraint constraint, gfp_t gfp_mask,
-                               int order, const nodemask_t *nodemask);
+                               int order, const nodemask_t *nodemask,
+                               struct mem_cgroup *memcg);
 
 extern enum oom_scan_t oom_scan_process_thread(struct task_struct *task,
                 unsigned long totalpages, const nodemask_t *nodemask,
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index 5ed7bdaf22d5..c851ff92d5b3 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -328,8 +328,6 @@ static inline void SetPageUptodate(struct page *page)
 
 CLEARPAGEFLAG(Uptodate, uptodate)
 
-extern void cancel_dirty_page(struct page *page, unsigned int account_size);
-
 int test_clear_page_writeback(struct page *page);
 int __test_set_page_writeback(struct page *page, bool keep_write);
 
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 24c7728ca681..a965efa52152 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -77,6 +77,11 @@ static inline void acpiphp_remove_slots(struct pci_bus *bus) { }
 static inline void acpiphp_check_host_bridge(struct acpi_device *adev) { }
 #endif
 
+extern const u8 pci_acpi_dsm_uuid[];
+#define DEVICE_LABEL_DSM        0x07
+#define RESET_DELAY_DSM         0x08
+#define FUNCTION_DELAY_DSM      0x09
+
 #else   /* CONFIG_ACPI */
 static inline void acpi_pci_add_bus(struct pci_bus *bus) { }
 static inline void acpi_pci_remove_bus(struct pci_bus *bus) { }
diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h
index 8af4610c2e41..207c561fb40e 100644
--- a/include/linux/pci-aspm.h
+++ b/include/linux/pci-aspm.h
@@ -29,7 +29,6 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev);
 void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
 void pci_disable_link_state(struct pci_dev *pdev, int state);
 void pci_disable_link_state_locked(struct pci_dev *pdev, int state);
-void pcie_clear_aspm(struct pci_bus *bus);
 void pcie_no_aspm(void);
 #else
 static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
@@ -47,9 +46,6 @@ static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
 static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
 {
 }
-static inline void pcie_clear_aspm(struct pci_bus *bus)
-{
-}
 static inline void pcie_no_aspm(void)
 {
 }
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 211e9da8a7d7..e63112fb55be 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -406,6 +406,7 @@ struct pci_host_bridge {
         struct list_head windows;       /* resource_entry */
         void (*release_fn)(struct pci_host_bridge *);
         void *release_data;
+        unsigned int ignore_reset_delay:1;      /* for entire hierarchy */
 };
 
 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
@@ -510,6 +511,9 @@ static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
         return dev->bus->self;
 }
 
+struct device *pci_get_host_bridge_device(struct pci_dev *dev);
+void pci_put_host_bridge_device(struct device *dev);
+
 #ifdef CONFIG_PCI_MSI
 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
 {
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index e63c02a93f6b..38cff8f6716d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2315,6 +2315,8 @@
 #define PCI_VENDOR_ID_CENATEK           0x16CA
 #define PCI_DEVICE_ID_CENATEK_IDE       0x0001
 
+#define PCI_VENDOR_ID_SYNOPSYS          0x16c3
+
 #define PCI_VENDOR_ID_VITESSE           0x1725
 #define PCI_DEVICE_ID_VITESSE_VSC7174   0x7174
 
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 2b621982938d..61992cf2e977 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -53,6 +53,7 @@ struct perf_guest_info_callbacks {
 #include <linux/sysfs.h>
 #include <linux/perf_regs.h>
 #include <linux/workqueue.h>
+#include <linux/cgroup.h>
 #include <asm/local.h>
 
 struct perf_callchain_entry {
@@ -118,10 +119,19 @@ struct hw_perf_event {
                         struct hrtimer  hrtimer;
                 };
                 struct { /* tracepoint */
-                        struct task_struct      *tp_target;
                         /* for tp_event->class */
                         struct list_head        tp_list;
                 };
+                struct { /* intel_cqm */
+                        int                     cqm_state;
+                        int                     cqm_rmid;
+                        struct list_head        cqm_events_entry;
+                        struct list_head        cqm_groups_entry;
+                        struct list_head        cqm_group_entry;
+                };
+                struct { /* itrace */
+                        int                     itrace_started;
+                };
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
                 struct { /* breakpoint */
                         /*
@@ -129,12 +139,12 @@ struct hw_perf_event {
                          * problem hw_breakpoint has with context
                          * creation and event initalization.
                          */
-                        struct task_struct              *bp_target;
                         struct arch_hw_breakpoint       info;
                         struct list_head                bp_list;
                 };
 #endif
         };
+        struct task_struct              *target;
         int                             state;
         local64_t                       prev_count;
         u64                             sample_period;
@@ -166,6 +176,11 @@ struct perf_event;
  * pmu::capabilities flags
  */
 #define PERF_PMU_CAP_NO_INTERRUPT               0x01
+#define PERF_PMU_CAP_NO_NMI                     0x02
+#define PERF_PMU_CAP_AUX_NO_SG                  0x04
+#define PERF_PMU_CAP_AUX_SW_DOUBLEBUF           0x08
+#define PERF_PMU_CAP_EXCLUSIVE                  0x10
+#define PERF_PMU_CAP_ITRACE                     0x20
 
 /**
  * struct pmu - generic performance monitoring unit
@@ -186,6 +201,7 @@ struct pmu {
 
         int * __percpu                  pmu_disable_count;
         struct perf_cpu_context * __percpu pmu_cpu_context;
+        atomic_t                        exclusive_cnt; /* < 0: cpu; > 0: tsk */
         int                             task_ctx_nr;
         int                             hrtimer_interval_ms;
 
@@ -262,9 +278,32 @@ struct pmu {
         int (*event_idx)                (struct perf_event *event); /*optional */
 
         /*
-         * flush branch stack on context-switches (needed in cpu-wide mode)
+         * context-switches callback
+         */
+        void (*sched_task)              (struct perf_event_context *ctx,
+                                        bool sched_in);
+        /*
+         * PMU specific data size
+         */
+        size_t                          task_ctx_size;
+
+
+        /*
+         * Return the count value for a counter.
+         */
+        u64 (*count)                    (struct perf_event *event); /*optional*/
+
+        /*
+         * Set up pmu-private data structures for an AUX area
          */
-        void (*flush_branch_stack)      (void);
+        void *(*setup_aux)              (int cpu, void **pages,
+                                         int nr_pages, bool overwrite);
+                                        /* optional */
+
+        /*
+         * Free pmu-private AUX data structures
+         */
+        void (*free_aux)                (void *aux); /* optional */
 };
 
 /**
@@ -300,6 +339,7 @@ struct swevent_hlist {
 #define PERF_ATTACH_CONTEXT     0x01
 #define PERF_ATTACH_GROUP       0x02
 #define PERF_ATTACH_TASK        0x04
+#define PERF_ATTACH_TASK_DATA   0x08
 
 struct perf_cgroup;
 struct ring_buffer;
@@ -438,6 +478,7 @@ struct perf_event {
         struct pid_namespace            *ns;
         u64                             id;
 
+        u64                             (*clock)(void);
         perf_overflow_handler_t         overflow_handler;
         void                            *overflow_handler_context;
 
@@ -504,7 +545,7 @@ struct perf_event_context {
         u64                             generation;
         int                             pin_count;
         int                             nr_cgroups;      /* cgroup evts */
-        int                             nr_branch_stack; /* branch_stack evt */
+        void                            *task_ctx_data; /* pmu specific data */
         struct rcu_head                 rcu_head;
 
         struct delayed_work             orphans_remove;
@@ -536,12 +577,52 @@ struct perf_output_handle {
         struct ring_buffer              *rb;
         unsigned long                   wakeup;
         unsigned long                   size;
-        void                            *addr;
+        union {
+                void                    *addr;
+                unsigned long           head;
+        };
         int                             page;
 };
 
+#ifdef CONFIG_CGROUP_PERF
+
+/*
+ * perf_cgroup_info keeps track of time_enabled for a cgroup.
+ * This is a per-cpu dynamically allocated data structure.
+ */
+struct perf_cgroup_info {
+        u64                             time;
+        u64                             timestamp;
+};
+
+struct perf_cgroup {
+        struct cgroup_subsys_state      css;
+        struct perf_cgroup_info __percpu *info;
+};
+
+/*
+ * Must ensure cgroup is pinned (css_get) before calling
+ * this function. In other words, we cannot call this function
+ * if there is no cgroup event for the current CPU context.
+ */
+static inline struct perf_cgroup *
+perf_cgroup_from_task(struct task_struct *task)
+{
+        return container_of(task_css(task, perf_event_cgrp_id),
+                            struct perf_cgroup, css);
+}
+#endif /* CONFIG_CGROUP_PERF */
+
 #ifdef CONFIG_PERF_EVENTS
 
+extern void *perf_aux_output_begin(struct perf_output_handle *handle,
+                                   struct perf_event *event);
+extern void perf_aux_output_end(struct perf_output_handle *handle,
+                                unsigned long size, bool truncated);
+extern int perf_aux_output_skip(struct perf_output_handle *handle,
+                                unsigned long size);
+extern void *perf_get_aux(struct perf_output_handle *handle);
+
 extern int perf_pmu_register(struct pmu *pmu, const char *name, int type);
 extern void perf_pmu_unregister(struct pmu *pmu);
 
@@ -558,6 +639,8 @@ extern void perf_event_delayed_put(struct task_struct *task);
 extern void perf_event_print_debug(void);
 extern void perf_pmu_disable(struct pmu *pmu);
 extern void perf_pmu_enable(struct pmu *pmu);
+extern void perf_sched_cb_dec(struct pmu *pmu);
+extern void perf_sched_cb_inc(struct pmu *pmu);
 extern int perf_event_task_disable(void);
 extern int perf_event_task_enable(void);
 extern int perf_event_refresh(struct perf_event *event, int refresh);
@@ -731,6 +814,11 @@ static inline void perf_event_task_sched_out(struct task_struct *prev,
                 __perf_event_task_sched_out(prev, next);
 }
 
+static inline u64 __perf_event_count(struct perf_event *event)
+{
+        return local64_read(&event->count) + atomic64_read(&event->child_count);
+}
+
 extern void perf_event_mmap(struct vm_area_struct *vma);
 extern struct perf_guest_info_callbacks *perf_guest_cbs;
 extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
@@ -800,6 +888,16 @@ static inline bool has_branch_stack(struct perf_event *event)
         return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK;
 }
 
+static inline bool needs_branch_stack(struct perf_event *event)
+{
+        return event->attr.branch_sample_type != 0;
+}
+
+static inline bool has_aux(struct perf_event *event)
+{
+        return event->pmu->setup_aux;
+}
+
 extern int perf_output_begin(struct perf_output_handle *handle,
                              struct perf_event *event, unsigned int size);
 extern void perf_output_end(struct perf_output_handle *handle);
@@ -815,6 +913,17 @@ extern void perf_event_disable(struct perf_event *event);
 extern int __perf_event_disable(void *info);
 extern void perf_event_task_tick(void);
 #else /* !CONFIG_PERF_EVENTS: */
+static inline void *
+perf_aux_output_begin(struct perf_output_handle *handle,
+                      struct perf_event *event)                         { return NULL; }
+static inline void
+perf_aux_output_end(struct perf_output_handle *handle, unsigned long size,
+                    bool truncated)                                     { }
+static inline int
+perf_aux_output_skip(struct perf_output_handle *handle,
+                     unsigned long size)                                { return -EINVAL; }
+static inline void *
+perf_get_aux(struct perf_output_handle *handle)                         { return NULL; }
 static inline void
 perf_event_task_sched_in(struct task_struct *prev,
                          struct task_struct *task)                      { }
diff --git a/include/linux/platform_data/hsmmc-omap.h b/include/linux/platform_data/hsmmc-omap.h
index 67bbcf0785f6..8e981be2e2c2 100644
--- a/include/linux/platform_data/hsmmc-omap.h
+++ b/include/linux/platform_data/hsmmc-omap.h
@@ -55,9 +55,6 @@ struct omap_hsmmc_platform_data {
         u32 caps;       /* Used for the MMC driver on 2430 and later */
         u32 pm_caps;    /* PM capabilities of the mmc */
 
-        /* switch pin can be for card detect (default) or card cover */
-        unsigned cover:1;
-
         /* use the internal clock */
         unsigned internal_clock:1;
 
@@ -73,7 +70,8 @@ struct omap_hsmmc_platform_data {
 #define HSMMC_HAS_HSPE_SUPPORT  (1 << 2)
         unsigned features;
 
-        int switch_pin;                 /* gpio (card detect) */
+        int gpio_cd;                    /* gpio (card detect) */
+        int gpio_cod;                   /* gpio (cover detect) */
         int gpio_wp;                    /* gpio (write protect) */
 
         int (*set_power)(struct device *dev, int power_on, int vdd);
diff --git a/include/linux/platform_data/i2c-davinci.h b/include/linux/platform_data/i2c-davinci.h
index 2312d197dfb7..89fd34727a24 100644
--- a/include/linux/platform_data/i2c-davinci.h
+++ b/include/linux/platform_data/i2c-davinci.h
@@ -18,6 +18,7 @@ struct davinci_i2c_platform_data {
         unsigned int    bus_delay;      /* post-transaction delay (usec) */
         unsigned int    sda_pin;        /* GPIO pin ID to use for SDA */
         unsigned int    scl_pin;        /* GPIO pin ID to use for SCL */
+        bool            has_pfunc;      /*chip has a ICPFUNC register */
 };
 
 /* for board setup code */
diff --git a/include/linux/platform_data/sky81452-backlight.h b/include/linux/platform_data/sky81452-backlight.h
new file mode 100644
index 000000000000..1231e9bb00f1
--- /dev/null
+++ b/include/linux/platform_data/sky81452-backlight.h
@@ -0,0 +1,46 @@
+/*
+ * sky81452.h   SKY81452 backlight driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SKY81452_BACKLIGHT_H
+#define _SKY81452_BACKLIGHT_H
+
+/**
+ * struct sky81452_platform_data
+ * @name:       backlight driver name.
+                If it is not defined, default name is lcd-backlight.
+ * @gpio_enable:GPIO number which control EN pin
+ * @enable:     Enable mask for current sink channel 1, 2, 3, 4, 5 and 6.
+ * @ignore_pwm: true if DPWMI should be ignored.
+ * @dpwm_mode:  true is DPWM dimming mode, otherwise Analog dimming mode.
+ * @phase_shift:true is phase shift mode.
+ * @short_detecion_threshold:   It should be one of 4, 5, 6 and 7V.
+ * @boost_current_limit:        It should be one of 2300, 2750mA.
+ */
+struct sky81452_bl_platform_data {
+        const char *name;
+        int gpio_enable;
+        unsigned int enable;
+        bool ignore_pwm;
+        bool dpwm_mode;
+        bool phase_shift;
+        unsigned int short_detection_threshold;
+        unsigned int boost_current_limit;
+};
+
+#endif
diff --git a/include/linux/power/charger-manager.h b/include/linux/power/charger-manager.h
index 416ebeb6ee1e..eadf28cb2fc9 100644
--- a/include/linux/power/charger-manager.h
+++ b/include/linux/power/charger-manager.h
@@ -242,7 +242,8 @@ struct charger_manager {
         int emergency_stop;
 
         char psy_name_buf[PSY_NAME_MAX + 1];
-        struct power_supply charger_psy;
+        struct power_supply_desc charger_psy_desc;
+        struct power_supply *charger_psy;
 
         u64 charging_start_time;
         u64 charging_end_time;
diff --git a/include/linux/power/max17042_battery.h b/include/linux/power/max17042_battery.h
index 89dd84f47c6e..cf112b4075c8 100644
--- a/include/linux/power/max17042_battery.h
+++ b/include/linux/power/max17042_battery.h
@@ -126,7 +126,14 @@ enum max17047_register {
         MAX17047_QRTbl30        = 0x42,
 };
 
-enum max170xx_chip_type {MAX17042, MAX17047};
+enum max170xx_chip_type {
+        MAXIM_DEVICE_TYPE_UNKNOWN       = 0,
+        MAXIM_DEVICE_TYPE_MAX17042,
+        MAXIM_DEVICE_TYPE_MAX17047,
+        MAXIM_DEVICE_TYPE_MAX17050,
+
+        MAXIM_DEVICE_TYPE_NUM
+};
 
 /*
  * used for setting a register to a desired value
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index 096dbced02ac..75a1dd8dc56e 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -13,6 +13,7 @@
 #ifndef __LINUX_POWER_SUPPLY_H__
 #define __LINUX_POWER_SUPPLY_H__
 
+#include <linux/device.h>
 #include <linux/workqueue.h>
 #include <linux/leds.h>
 #include <linux/spinlock.h>
@@ -173,22 +174,32 @@ union power_supply_propval {
         const char *strval;
 };
 
-struct device;
 struct device_node;
+struct power_supply;
 
-struct power_supply {
-        const char *name;
-        enum power_supply_type type;
-        enum power_supply_property *properties;
-        size_t num_properties;
+/* Run-time specific power supply configuration */
+struct power_supply_config {
+        struct device_node *of_node;
+        /* Driver private data */
+        void *drv_data;
 
         char **supplied_to;
         size_t num_supplicants;
+};
 
-        char **supplied_from;
-        size_t num_supplies;
-        struct device_node *of_node;
+/* Description of power supply */
+struct power_supply_desc {
+        const char *name;
+        enum power_supply_type type;
+        enum power_supply_property *properties;
+        size_t num_properties;
 
+        /*
+         * Functions for drivers implementing power supply class.
+         * These shouldn't be called directly by other drivers for accessing
+         * this power supply. Instead use power_supply_*() functions (for
+         * example power_supply_get_property()).
+         */
         int (*get_property)(struct power_supply *psy,
                             enum power_supply_property psp,
                             union power_supply_propval *val);
@@ -208,12 +219,27 @@ struct power_supply {
         bool no_thermal;
         /* For APM emulation, think legacy userspace. */
         int use_for_apm;
+};
+
+struct power_supply {
+        const struct power_supply_desc *desc;
+
+        char **supplied_to;
+        size_t num_supplicants;
+
+        char **supplied_from;
+        size_t num_supplies;
+        struct device_node *of_node;
+
+        /* Driver private data */
+        void *drv_data;
 
         /* private */
-        struct device *dev;
+        struct device dev;
         struct work_struct changed_work;
         spinlock_t changed_lock;
         bool changed;
+        atomic_t use_cnt;
 #ifdef CONFIG_THERMAL
         struct thermal_zone_device *tzd;
         struct thermal_cooling_device *tcd;
@@ -256,6 +282,7 @@ extern struct atomic_notifier_head power_supply_notifier;
 extern int power_supply_reg_notifier(struct notifier_block *nb);
 extern void power_supply_unreg_notifier(struct notifier_block *nb);
 extern struct power_supply *power_supply_get_by_name(const char *name);
+extern void power_supply_put(struct power_supply *psy);
 #ifdef CONFIG_OF
 extern struct power_supply *power_supply_get_by_phandle(struct device_node *np,
                                                         const char *property);
@@ -274,13 +301,36 @@ extern int power_supply_is_system_supplied(void);
 static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
 #endif
 
-extern int power_supply_register(struct device *parent,
-                                 struct power_supply *psy);
-extern int power_supply_register_no_ws(struct device *parent,
-                                 struct power_supply *psy);
+extern int power_supply_get_property(struct power_supply *psy,
+                            enum power_supply_property psp,
+                            union power_supply_propval *val);
+extern int power_supply_set_property(struct power_supply *psy,
+                            enum power_supply_property psp,
+                            const union power_supply_propval *val);
+extern int power_supply_property_is_writeable(struct power_supply *psy,
+                                        enum power_supply_property psp);
+extern void power_supply_external_power_changed(struct power_supply *psy);
+
+extern struct power_supply *__must_check
+power_supply_register(struct device *parent,
+                                 const struct power_supply_desc *desc,
+                                 const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+power_supply_register_no_ws(struct device *parent,
+                                 const struct power_supply_desc *desc,
+                                 const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+devm_power_supply_register(struct device *parent,
+                                 const struct power_supply_desc *desc,
+                                 const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+devm_power_supply_register_no_ws(struct device *parent,
+                                 const struct power_supply_desc *desc,
+                                 const struct power_supply_config *cfg);
 extern void power_supply_unregister(struct power_supply *psy);
 extern int power_supply_powers(struct power_supply *psy, struct device *dev);
 
+extern void *power_supply_get_drvdata(struct power_supply *psy);
 /* For APM emulation, think legacy userspace. */
 extern struct class *power_supply_class;
 
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 78097491cd99..573a5afd5ed8 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -48,6 +48,26 @@
 
 extern int rcu_expedited; /* for sysctl */
 
+#ifdef CONFIG_TINY_RCU
+/* Tiny RCU doesn't expedite, as its purpose in life is instead to be tiny. */
+static inline bool rcu_gp_is_expedited(void)  /* Internal RCU use. */
+{
+        return false;
+}
+
+static inline void rcu_expedite_gp(void)
+{
+}
+
+static inline void rcu_unexpedite_gp(void)
+{
+}
+#else /* #ifdef CONFIG_TINY_RCU */
+bool rcu_gp_is_expedited(void);  /* Internal RCU use. */
+void rcu_expedite_gp(void);
+void rcu_unexpedite_gp(void);
+#endif /* #else #ifdef CONFIG_TINY_RCU */
+
 enum rcutorture_type {
         RCU_FLAVOR,
         RCU_BH_FLAVOR,
@@ -195,6 +215,15 @@ void call_rcu_sched(struct rcu_head *head,
 
 void synchronize_sched(void);
 
+/*
+ * Structure allowing asynchronous waiting on RCU.
+ */
+struct rcu_synchronize {
+        struct rcu_head head;
+        struct completion completion;
+};
+void wakeme_after_rcu(struct rcu_head *head);
+
 /**
  * call_rcu_tasks() - Queue an RCU for invocation task-based grace period
  * @head: structure to be used for queueing the RCU updates.
@@ -258,6 +287,7 @@ static inline int rcu_preempt_depth(void)
 
 /* Internal to kernel */
 void rcu_init(void);
+void rcu_end_inkernel_boot(void);
 void rcu_sched_qs(void);
 void rcu_bh_qs(void);
 void rcu_check_callbacks(int user);
@@ -266,6 +296,8 @@ void rcu_idle_enter(void);
 void rcu_idle_exit(void);
 void rcu_irq_enter(void);
 void rcu_irq_exit(void);
+int rcu_cpu_notify(struct notifier_block *self,
+                   unsigned long action, void *hcpu);
 
 #ifdef CONFIG_RCU_STALL_COMMON
 void rcu_sysrq_start(void);
@@ -720,7 +752,7 @@ static inline void rcu_preempt_sleep_check(void)
  * annotated as __rcu.
  */
 #define rcu_dereference_check(p, c) \
-        __rcu_dereference_check((p), rcu_read_lock_held() || (c), __rcu)
+        __rcu_dereference_check((p), (c) || rcu_read_lock_held(), __rcu)
 
 /**
  * rcu_dereference_bh_check() - rcu_dereference_bh with debug checking
@@ -730,7 +762,7 @@ static inline void rcu_preempt_sleep_check(void)
  * This is the RCU-bh counterpart to rcu_dereference_check().
  */
 #define rcu_dereference_bh_check(p, c) \
-        __rcu_dereference_check((p), rcu_read_lock_bh_held() || (c), __rcu)
+        __rcu_dereference_check((p), (c) || rcu_read_lock_bh_held(), __rcu)
 
 /**
  * rcu_dereference_sched_check() - rcu_dereference_sched with debug checking
@@ -740,7 +772,7 @@ static inline void rcu_preempt_sleep_check(void)
  * This is the RCU-sched counterpart to rcu_dereference_check().
  */
 #define rcu_dereference_sched_check(p, c) \
-        __rcu_dereference_check((p), rcu_read_lock_sched_held() || (c), \
+        __rcu_dereference_check((p), (c) || rcu_read_lock_sched_held(), \
                                 __rcu)
 
 #define rcu_dereference_raw(p) rcu_dereference_check(p, 1) /*@@@ needed? @@@*/
@@ -933,9 +965,9 @@ static inline void rcu_read_unlock(void)
 {
         rcu_lockdep_assert(rcu_is_watching(),
                            "rcu_read_unlock() used illegally while idle");
-        rcu_lock_release(&rcu_lock_map);
         __release(RCU);
         __rcu_read_unlock();
+        rcu_lock_release(&rcu_lock_map); /* Keep acq info for rls diags. */
 }
 
 /**
diff --git a/include/linux/regulator/act8865.h b/include/linux/regulator/act8865.h
index b6c4909b33af..15fa8f2d35c9 100644
--- a/include/linux/regulator/act8865.h
+++ b/include/linux/regulator/act8865.h
@@ -19,6 +19,19 @@
 #include <linux/regulator/machine.h>
 
 enum {
+        ACT8600_ID_DCDC1,
+        ACT8600_ID_DCDC2,
+        ACT8600_ID_DCDC3,
+        ACT8600_ID_SUDCDC4,
+        ACT8600_ID_LDO5,
+        ACT8600_ID_LDO6,
+        ACT8600_ID_LDO7,
+        ACT8600_ID_LDO8,
+        ACT8600_ID_LDO9,
+        ACT8600_ID_LDO10,
+};
+
+enum {
         ACT8865_ID_DCDC1,
         ACT8865_ID_DCDC2,
         ACT8865_ID_DCDC3,
@@ -46,6 +59,7 @@ enum {
 };
 
 enum {
+        ACT8600,
         ACT8865,
         ACT8846,
 };
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h
index d17e1ff7ad01..f8a689ed62a5 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -114,7 +114,7 @@ struct regmap;
 #define REGULATOR_EVENT_OVER_TEMP               0x10
 #define REGULATOR_EVENT_FORCE_DISABLE           0x20
 #define REGULATOR_EVENT_VOLTAGE_CHANGE          0x40
-#define REGULATOR_EVENT_DISABLE                 0x80
+#define REGULATOR_EVENT_DISABLE                 0x80
 #define REGULATOR_EVENT_PRE_VOLTAGE_CHANGE      0x100
 #define REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE    0x200
 #define REGULATOR_EVENT_PRE_DISABLE             0x400
@@ -238,7 +238,7 @@ int regulator_get_current_limit(struct regulator *regulator);
 
 int regulator_set_mode(struct regulator *regulator, unsigned int mode);
 unsigned int regulator_get_mode(struct regulator *regulator);
-int regulator_set_optimum_mode(struct regulator *regulator, int load_uA);
+int regulator_set_load(struct regulator *regulator, int load_uA);
 
 int regulator_allow_bypass(struct regulator *regulator, bool allow);
 
@@ -252,8 +252,12 @@ int regulator_list_hardware_vsel(struct regulator *regulator,
 /* regulator notifier block */
 int regulator_register_notifier(struct regulator *regulator,
                               struct notifier_block *nb);
+int devm_regulator_register_notifier(struct regulator *regulator,
+                                     struct notifier_block *nb);
 int regulator_unregister_notifier(struct regulator *regulator,
                                 struct notifier_block *nb);
+void devm_regulator_unregister_notifier(struct regulator *regulator,
+                                        struct notifier_block *nb);
 
 /* driver data - core doesn't touch */
 void *regulator_get_drvdata(struct regulator *regulator);
@@ -479,8 +483,7 @@ static inline unsigned int regulator_get_mode(struct regulator *regulator)
         return REGULATOR_MODE_NORMAL;
 }
 
-static inline int regulator_set_optimum_mode(struct regulator *regulator,
-                                        int load_uA)
+static inline int regulator_set_load(struct regulator *regulator, int load_uA)
 {
         return REGULATOR_MODE_NORMAL;
 }
@@ -515,12 +518,24 @@ static inline int regulator_register_notifier(struct regulator *regulator,
         return 0;
 }
 
+static inline int devm_regulator_register_notifier(struct regulator *regulator,
+                                                   struct notifier_block *nb)
+{
+        return 0;
+}
+
 static inline int regulator_unregister_notifier(struct regulator *regulator,
                                 struct notifier_block *nb)
 {
         return 0;
 }
 
+static inline int devm_regulator_unregister_notifier(struct regulator *regulator,
+                                                     struct notifier_block *nb)
+{
+        return 0;
+}
+
 static inline void *regulator_get_drvdata(struct regulator *regulator)
 {
         return NULL;
diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h
index 045f709cb89b..fffa688ac3a7 100644
--- a/include/linux/regulator/driver.h
+++ b/include/linux/regulator/driver.h
@@ -98,6 +98,7 @@ struct regulator_linear_range {
  *      REGULATOR_STATUS value (or negative errno)
  * @get_optimum_mode: Get the most efficient operating mode for the regulator
  *                    when running with the specified parameters.
+ * @set_load: Set the load for the regulator.
  *
  * @set_bypass: Set the regulator in bypass mode.
  * @get_bypass: Get the regulator bypass mode state.
@@ -167,6 +168,8 @@ struct regulator_ops {
         /* get most efficient regulator operating mode for load */
         unsigned int (*get_optimum_mode) (struct regulator_dev *, int input_uV,
                                           int output_uV, int load_uA);
+        /* set the load on the regulator */
+        int (*set_load)(struct regulator_dev *, int load_uA);
 
         /* control and report on bypass mode */
         int (*set_bypass)(struct regulator_dev *dev, bool enable);
@@ -367,6 +370,7 @@ struct regulator_dev {
         struct device dev;
         struct regulation_constraints *constraints;
         struct regulator *supply;       /* for tree */
+        const char *supply_name;
         struct regmap *regmap;
 
         struct delayed_work disable_work;
diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index dcad7ee0d746..8dcf6825fa88 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -77,6 +77,7 @@ struct rtc_class_ops {
         int (*read_alarm)(struct device *, struct rtc_wkalrm *);
         int (*set_alarm)(struct device *, struct rtc_wkalrm *);
         int (*proc)(struct device *, struct seq_file *);
+        int (*set_mmss64)(struct device *, time64_t secs);
         int (*set_mmss)(struct device *, unsigned long secs);
         int (*read_callback)(struct device *, int data);
         int (*alarm_irq_enable)(struct device *, unsigned int enabled);
diff --git a/include/linux/sched.h b/include/linux/sched.h
index a419b65770d6..f74d4cc3a3e5 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -176,6 +176,14 @@ extern void get_iowait_load(unsigned long *nr_waiters, unsigned long *load);
 extern void calc_global_load(unsigned long ticks);
 extern void update_cpu_load_nohz(void);
 
+/* Notifier for when a task gets migrated to a new CPU */
+struct task_migration_notifier {
+        struct task_struct *task;
+        int from_cpu;
+        int to_cpu;
+};
+extern void register_task_migration_notifier(struct notifier_block *n);
+
 extern unsigned long get_parent_ip(unsigned long addr);
 
 extern void dump_cpu_task(int cpu);
@@ -329,6 +337,8 @@ extern asmlinkage void schedule_tail(struct task_struct *prev);
 extern void init_idle(struct task_struct *idle, int cpu);
 extern void init_idle_bootup_task(struct task_struct *idle);
 
+extern cpumask_var_t cpu_isolated_map;
+
 extern int runqueue_is_locked(int cpu);
 
 #if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ_COMMON)
@@ -1115,15 +1125,28 @@ struct load_weight {
 };
 
 struct sched_avg {
+        u64 last_runnable_update;
+        s64 decay_count;
+        /*
+         * utilization_avg_contrib describes the amount of time that a
+         * sched_entity is running on a CPU. It is based on running_avg_sum
+         * and is scaled in the range [0..SCHED_LOAD_SCALE].
+         * load_avg_contrib described the amount of time that a sched_entity
+         * is runnable on a rq. It is based on both runnable_avg_sum and the
+         * weight of the task.
+         */
+        unsigned long load_avg_contrib, utilization_avg_contrib;
         /*
          * These sums represent an infinite geometric series and so are bound
          * above by 1024/(1-y).  Thus we only need a u32 to store them for all
          * choices of y < 1-2^(-32)*1024.
+         * running_avg_sum reflects the time that the sched_entity is
+         * effectively running on the CPU.
+         * runnable_avg_sum represents the amount of time a sched_entity is on
+         * a runqueue which includes the running time that is monitored by
+         * running_avg_sum.
          */
-        u32 runnable_avg_sum, runnable_avg_period;
-        u64 last_runnable_update;
-        s64 decay_count;
-        unsigned long load_avg_contrib;
+        u32 runnable_avg_sum, avg_period, running_avg_sum;
 };
 
 #ifdef CONFIG_SCHEDSTATS
diff --git a/include/linux/security.h b/include/linux/security.h
index a1b7dbd127ff..4e14e3d6309f 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -1556,7 +1556,7 @@ struct security_operations {
         int (*inode_follow_link) (struct dentry *dentry, struct nameidata *nd);
         int (*inode_permission) (struct inode *inode, int mask);
         int (*inode_setattr)    (struct dentry *dentry, struct iattr *attr);
-        int (*inode_getattr) (struct vfsmount *mnt, struct dentry *dentry);
+        int (*inode_getattr) (const struct path *path);
         int (*inode_setxattr) (struct dentry *dentry, const char *name,
                                const void *value, size_t size, int flags);
         void (*inode_post_setxattr) (struct dentry *dentry, const char *name,
@@ -1843,7 +1843,7 @@ int security_inode_readlink(struct dentry *dentry);
 int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd);
 int security_inode_permission(struct inode *inode, int mask);
 int security_inode_setattr(struct dentry *dentry, struct iattr *attr);
-int security_inode_getattr(struct vfsmount *mnt, struct dentry *dentry);
+int security_inode_getattr(const struct path *path);
 int security_inode_setxattr(struct dentry *dentry, const char *name,
                             const void *value, size_t size, int flags);
 void security_inode_post_setxattr(struct dentry *dentry, const char *name,
@@ -2259,8 +2259,7 @@ static inline int security_inode_setattr(struct dentry *dentry,
         return 0;
 }
 
-static inline int security_inode_getattr(struct vfsmount *mnt,
-                                          struct dentry *dentry)
+static inline int security_inode_getattr(const struct path *path)
 {
         return 0;
 }
diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h
index f5df8f687b4d..5f68d0a391ce 100644
--- a/include/linux/seqlock.h
+++ b/include/linux/seqlock.h
@@ -108,7 +108,7 @@ static inline unsigned __read_seqcount_begin(const seqcount_t *s)
         unsigned ret;
 
 repeat:
-        ret = ACCESS_ONCE(s->sequence);
+        ret = READ_ONCE(s->sequence);
         if (unlikely(ret & 1)) {
                 cpu_relax();
                 goto repeat;
@@ -127,7 +127,7 @@ repeat:
  */
 static inline unsigned raw_read_seqcount(const seqcount_t *s)
 {
-        unsigned ret = ACCESS_ONCE(s->sequence);
+        unsigned ret = READ_ONCE(s->sequence);
         smp_rmb();
         return ret;
 }
@@ -179,7 +179,7 @@ static inline unsigned read_seqcount_begin(const seqcount_t *s)
  */
 static inline unsigned raw_seqcount_begin(const seqcount_t *s)
 {
-        unsigned ret = ACCESS_ONCE(s->sequence);
+        unsigned ret = READ_ONCE(s->sequence);
         smp_rmb();
         return ret & ~1;
 }
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 76f1feeabd38..ffd24c830151 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -18,7 +18,7 @@
 
 /*
  * Flags to pass to kmem_cache_create().
- * The ones marked DEBUG are only valid if CONFIG_SLAB_DEBUG is set.
+ * The ones marked DEBUG are only valid if CONFIG_DEBUG_SLAB is set.
  */
 #define SLAB_DEBUG_FREE         0x00000100UL    /* DEBUG: Perform (expensive) checks on free */
 #define SLAB_RED_ZONE           0x00000400UL    /* DEBUG: Red zone objs in a cache */
diff --git a/include/linux/smpboot.h b/include/linux/smpboot.h
index 13e929679550..d600afb21926 100644
--- a/include/linux/smpboot.h
+++ b/include/linux/smpboot.h
@@ -47,6 +47,5 @@ struct smp_hotplug_thread {
 
 int smpboot_register_percpu_thread(struct smp_hotplug_thread *plug_thread);
 void smpboot_unregister_percpu_thread(struct smp_hotplug_thread *plug_thread);
-int smpboot_thread_schedule(void);
 
 #endif
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 856d34dde79b..d673072346f2 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -162,8 +162,6 @@ struct spi_transfer;
  * @remove: Unbinds this driver from the spi device
  * @shutdown: Standard shutdown callback used during system state
  *      transitions such as powerdown/halt and kexec
- * @suspend: Standard suspend callback used during system state transitions
- * @resume: Standard resume callback used during system state transitions
  * @driver: SPI device drivers should initialize the name and owner
  *      field of this structure.
  *
@@ -184,8 +182,6 @@ struct spi_driver {
         int                     (*probe)(struct spi_device *spi);
         int                     (*remove)(struct spi_device *spi);
         void                    (*shutdown)(struct spi_device *spi);
-        int                     (*suspend)(struct spi_device *spi, pm_message_t mesg);
-        int                     (*resume)(struct spi_device *spi);
         struct device_driver    driver;
 };
 
@@ -294,6 +290,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
  *                    transfer_one_message are mutually exclusive; when both
  *                    are set, the generic subsystem does not call your
  *                    transfer_one callback.
+ * @handle_err: the subsystem calls the driver to handle an error that occurs
+ *              in the generic implementation of transfer_one_message().
  * @unprepare_message: undo any work done by prepare_message().
  * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
  *      number. Any individual value may be -ENOENT for CS lines that
@@ -448,6 +446,8 @@ struct spi_master {
         void (*set_cs)(struct spi_device *spi, bool enable);
         int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
                             struct spi_transfer *transfer);
+        void (*handle_err)(struct spi_master *master,
+                           struct spi_message *message);
 
         /* gpio chip select */
         int                     *cs_gpios;
diff --git a/include/linux/srcu.h b/include/linux/srcu.h
index 9cfd9623fb03..bdeb4567b71e 100644
--- a/include/linux/srcu.h
+++ b/include/linux/srcu.h
@@ -182,7 +182,7 @@ static inline int srcu_read_lock_held(struct srcu_struct *sp)
  * lockdep_is_held() calls.
  */
 #define srcu_dereference_check(p, sp, c) \
-        __rcu_dereference_check((p), srcu_read_lock_held(sp) || (c), __rcu)
+        __rcu_dereference_check((p), (c) || srcu_read_lock_held(sp), __rcu)
 
 /**
  * srcu_dereference - fetch SRCU-protected pointer for later dereferencing
diff --git a/include/linux/stacktrace.h b/include/linux/stacktrace.h
index 669045ab73f3..0a34489a46b6 100644
--- a/include/linux/stacktrace.h
+++ b/include/linux/stacktrace.h
@@ -7,8 +7,6 @@ struct task_struct;
 struct pt_regs;
 
 #ifdef CONFIG_STACKTRACE
-struct task_struct;
-
 struct stack_trace {
         unsigned int nr_entries, max_entries;
         unsigned long *entries;
diff --git a/include/linux/stddef.h b/include/linux/stddef.h
index f4aec0e75c3a..076af437284d 100644
--- a/include/linux/stddef.h
+++ b/include/linux/stddef.h
@@ -19,3 +19,12 @@ enum {
 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
 #endif
 #endif
+
+/**
+ * offsetofend(TYPE, MEMBER)
+ *
+ * @TYPE: The type of the structure
+ * @MEMBER: The member within the structure to get the end offset of
+ */
+#define offsetofend(TYPE, MEMBER) \
+        (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index ddad16148bd6..99382c0df17e 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -57,6 +57,21 @@ do {							\
 #define sysfs_attr_init(attr) do {} while (0)
 #endif
 
+/**
+ * struct attribute_group - data structure used to declare an attribute group.
+ * @name:       Optional: Attribute group name
+ *              If specified, the attribute group will be created in
+ *              a new subdirectory with this name.
+ * @is_visible: Optional: Function to return permissions associated with an
+ *              attribute of the group. Will be called repeatedly for each
+ *              attribute in the group. Only read/write permissions as well as
+ *              SYSFS_PREALLOC are accepted. Must return 0 if an attribute is
+ *              not visible. The returned value will replace static permissions
+ *              defined in struct attribute or struct bin_attribute.
+ * @attrs:      Pointer to NULL terminated list of attributes.
+ * @bin_attrs:  Pointer to NULL terminated list of binary attributes.
+ *              Either attrs or bin_attrs or both must be provided.
+ */
 struct attribute_group {
         const char              *name;
         umode_t                 (*is_visible)(struct kobject *,
diff --git a/include/linux/tick.h b/include/linux/tick.h
index 9c085dc12ae9..f8492da57ad3 100644
--- a/include/linux/tick.h
+++ b/include/linux/tick.h
@@ -1,7 +1,5 @@
-/*  linux/include/linux/tick.h
- *
- *  This file contains the structure definitions for tick related functions
- *
+/*
+ * Tick related global functions
  */
 #ifndef _LINUX_TICK_H
 #define _LINUX_TICK_H
@@ -9,149 +7,99 @@
 #include <linux/clockchips.h>
 #include <linux/irqflags.h>
 #include <linux/percpu.h>
-#include <linux/hrtimer.h>
 #include <linux/context_tracking_state.h>
 #include <linux/cpumask.h>
 #include <linux/sched.h>
 
 #ifdef CONFIG_GENERIC_CLOCKEVENTS
-
-enum tick_device_mode {
-        TICKDEV_MODE_PERIODIC,
-        TICKDEV_MODE_ONESHOT,
-};
-
-struct tick_device {
-        struct clock_event_device *evtdev;
-        enum tick_device_mode mode;
-};
-
-enum tick_nohz_mode {
-        NOHZ_MODE_INACTIVE,
-        NOHZ_MODE_LOWRES,
-        NOHZ_MODE_HIGHRES,
-};
-
-/**
- * struct tick_sched - sched tick emulation and no idle tick control/stats
- * @sched_timer:        hrtimer to schedule the periodic tick in high
- *                      resolution mode
- * @last_tick:          Store the last tick expiry time when the tick
- *                      timer is modified for nohz sleeps. This is necessary
- *                      to resume the tick timer operation in the timeline
- *                      when the CPU returns from nohz sleep.
- * @tick_stopped:       Indicator that the idle tick has been stopped
- * @idle_jiffies:       jiffies at the entry to idle for idle time accounting
- * @idle_calls:         Total number of idle calls
- * @idle_sleeps:        Number of idle calls, where the sched tick was stopped
- * @idle_entrytime:     Time when the idle call was entered
- * @idle_waketime:      Time when the idle was interrupted
- * @idle_exittime:      Time when the idle state was left
- * @idle_sleeptime:     Sum of the time slept in idle with sched tick stopped
- * @iowait_sleeptime:   Sum of the time slept in idle with sched tick stopped, with IO outstanding
- * @sleep_length:       Duration of the current idle sleep
- * @do_timer_lst:       CPU was the last one doing do_timer before going idle
- */
-struct tick_sched {
-        struct hrtimer                  sched_timer;
-        unsigned long                   check_clocks;
-        enum tick_nohz_mode             nohz_mode;
-        ktime_t                         last_tick;
-        int                             inidle;
-        int                             tick_stopped;
-        unsigned long                   idle_jiffies;
-        unsigned long                   idle_calls;
-        unsigned long                   idle_sleeps;
-        int                             idle_active;
-        ktime_t                         idle_entrytime;
-        ktime_t                         idle_waketime;
-        ktime_t                         idle_exittime;
-        ktime_t                         idle_sleeptime;
-        ktime_t                         iowait_sleeptime;
-        ktime_t                         sleep_length;
-        unsigned long                   last_jiffies;
-        unsigned long                   next_jiffies;
-        ktime_t                         idle_expires;
-        int                             do_timer_last;
-};
-
 extern void __init tick_init(void);
-extern int tick_is_oneshot_available(void);
-extern struct tick_device *tick_get_device(int cpu);
-
 extern void tick_freeze(void);
 extern void tick_unfreeze(void);
+/* Should be core only, but ARM BL switcher requires it */
+extern void tick_suspend_local(void);
+/* Should be core only, but XEN resume magic and ARM BL switcher require it */
+extern void tick_resume_local(void);
+extern void tick_handover_do_timer(void);
+extern void tick_cleanup_dead_cpu(int cpu);
+#else /* CONFIG_GENERIC_CLOCKEVENTS */
+static inline void tick_init(void) { }
+static inline void tick_freeze(void) { }
+static inline void tick_unfreeze(void) { }
+static inline void tick_suspend_local(void) { }
+static inline void tick_resume_local(void) { }
+static inline void tick_handover_do_timer(void) { }
+static inline void tick_cleanup_dead_cpu(int cpu) { }
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
 
-# ifdef CONFIG_HIGH_RES_TIMERS
-extern int tick_init_highres(void);
-extern int tick_program_event(ktime_t expires, int force);
-extern void tick_setup_sched_timer(void);
-# endif
-
-# if defined CONFIG_NO_HZ_COMMON || defined CONFIG_HIGH_RES_TIMERS
-extern void tick_cancel_sched_timer(int cpu);
-# else
-static inline void tick_cancel_sched_timer(int cpu) { }
-# endif
-
-# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-extern struct tick_device *tick_get_broadcast_device(void);
-extern struct cpumask *tick_get_broadcast_mask(void);
-
-#  ifdef CONFIG_TICK_ONESHOT
-extern struct cpumask *tick_get_broadcast_oneshot_mask(void);
-#  endif
-
-# endif /* BROADCAST */
-
-# ifdef CONFIG_TICK_ONESHOT
-extern void tick_clock_notify(void);
-extern int tick_check_oneshot_change(int allow_nohz);
-extern struct tick_sched *tick_get_tick_sched(int cpu);
+#ifdef CONFIG_TICK_ONESHOT
 extern void tick_irq_enter(void);
-extern int tick_oneshot_mode_active(void);
 #  ifndef arch_needs_cpu
 #   define arch_needs_cpu() (0)
 #  endif
 # else
-static inline void tick_clock_notify(void) { }
-static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
 static inline void tick_irq_enter(void) { }
-static inline int tick_oneshot_mode_active(void) { return 0; }
-# endif
+#endif
 
-#else /* CONFIG_GENERIC_CLOCKEVENTS */
-static inline void tick_init(void) { }
-static inline void tick_freeze(void) { }
-static inline void tick_unfreeze(void) { }
-static inline void tick_cancel_sched_timer(int cpu) { }
-static inline void tick_clock_notify(void) { }
-static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
-static inline void tick_irq_enter(void) { }
-static inline int tick_oneshot_mode_active(void) { return 0; }
-#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
+#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+extern void hotplug_cpu__broadcast_tick_pull(int dead_cpu);
+#else
+static inline void hotplug_cpu__broadcast_tick_pull(int dead_cpu) { }
+#endif
 
-# ifdef CONFIG_NO_HZ_COMMON
-DECLARE_PER_CPU(struct tick_sched, tick_cpu_sched);
+enum tick_broadcast_mode {
+        TICK_BROADCAST_OFF,
+        TICK_BROADCAST_ON,
+        TICK_BROADCAST_FORCE,
+};
+
+enum tick_broadcast_state {
+        TICK_BROADCAST_EXIT,
+        TICK_BROADCAST_ENTER,
+};
+
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+extern void tick_broadcast_control(enum tick_broadcast_mode mode);
+#else
+static inline void tick_broadcast_control(enum tick_broadcast_mode mode) { }
+#endif /* BROADCAST */
+
+#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+extern int tick_broadcast_oneshot_control(enum tick_broadcast_state state);
+#else
+static inline int tick_broadcast_oneshot_control(enum tick_broadcast_state state) { return 0; }
+#endif
 
-static inline int tick_nohz_tick_stopped(void)
+static inline void tick_broadcast_enable(void)
+{
+        tick_broadcast_control(TICK_BROADCAST_ON);
+}
+static inline void tick_broadcast_disable(void)
+{
+        tick_broadcast_control(TICK_BROADCAST_OFF);
+}
+static inline void tick_broadcast_force(void)
+{
+        tick_broadcast_control(TICK_BROADCAST_FORCE);
+}
+static inline int tick_broadcast_enter(void)
 {
-        return __this_cpu_read(tick_cpu_sched.tick_stopped);
+        return tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER);
+}
+static inline void tick_broadcast_exit(void)
+{
+        tick_broadcast_oneshot_control(TICK_BROADCAST_EXIT);
 }
 
+#ifdef CONFIG_NO_HZ_COMMON
+extern int tick_nohz_tick_stopped(void);
 extern void tick_nohz_idle_enter(void);
 extern void tick_nohz_idle_exit(void);
 extern void tick_nohz_irq_exit(void);
 extern ktime_t tick_nohz_get_sleep_length(void);
 extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time);
 extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time);
-
-# else /* !CONFIG_NO_HZ_COMMON */
-static inline int tick_nohz_tick_stopped(void)
-{
-        return 0;
-}
-
+#else /* !CONFIG_NO_HZ_COMMON */
+static inline int tick_nohz_tick_stopped(void) { return 0; }
 static inline void tick_nohz_idle_enter(void) { }
 static inline void tick_nohz_idle_exit(void) { }
 
@@ -163,7 +111,7 @@ static inline ktime_t tick_nohz_get_sleep_length(void)
 }
 static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; }
 static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; }
-# endif /* !CONFIG_NO_HZ_COMMON */
+#endif /* !CONFIG_NO_HZ_COMMON */
 
 #ifdef CONFIG_NO_HZ_FULL
 extern bool tick_nohz_full_running;
diff --git a/include/linux/timekeeper_internal.h b/include/linux/timekeeper_internal.h
index 05af9a334893..fb86963859c7 100644
--- a/include/linux/timekeeper_internal.h
+++ b/include/linux/timekeeper_internal.h
@@ -16,16 +16,16 @@
  * @read:       Read function of @clock
  * @mask:       Bitmask for two's complement subtraction of non 64bit clocks
  * @cycle_last: @clock cycle value at last update
- * @mult:       NTP adjusted multiplier for scaled math conversion
+ * @mult:       (NTP adjusted) multiplier for scaled math conversion
  * @shift:      Shift value for scaled math conversion
  * @xtime_nsec: Shifted (fractional) nano seconds offset for readout
- * @base_mono:  ktime_t (nanoseconds) base time for readout
+ * @base:       ktime_t (nanoseconds) base time for readout
  *
  * This struct has size 56 byte on 64 bit. Together with a seqcount it
  * occupies a single 64byte cache line.
  *
  * The struct is separate from struct timekeeper as it is also used
- * for a fast NMI safe accessor to clock monotonic.
+ * for a fast NMI safe accessors.
  */
 struct tk_read_base {
         struct clocksource      *clock;
@@ -35,12 +35,13 @@ struct tk_read_base {
         u32                     mult;
         u32                     shift;
         u64                     xtime_nsec;
-        ktime_t                 base_mono;
+        ktime_t                 base;
 };
 
 /**
  * struct timekeeper - Structure holding internal timekeeping values.
- * @tkr:                The readout base structure
+ * @tkr_mono:           The readout base structure for CLOCK_MONOTONIC
+ * @tkr_raw:            The readout base structure for CLOCK_MONOTONIC_RAW
  * @xtime_sec:          Current CLOCK_REALTIME time in seconds
  * @ktime_sec:          Current CLOCK_MONOTONIC time in seconds
  * @wall_to_monotonic:  CLOCK_REALTIME to CLOCK_MONOTONIC offset
@@ -48,7 +49,6 @@ struct tk_read_base {
  * @offs_boot:          Offset clock monotonic -> clock boottime
  * @offs_tai:           Offset clock monotonic -> clock tai
  * @tai_offset:         The current UTC to TAI offset in seconds
- * @base_raw:           Monotonic raw base time in ktime_t format
  * @raw_time:           Monotonic raw base time in timespec64 format
  * @cycle_interval:     Number of clock cycles in one NTP interval
  * @xtime_interval:     Number of clock shifted nano seconds in one NTP
@@ -76,7 +76,8 @@ struct tk_read_base {
  * used instead.
  */
 struct timekeeper {
-        struct tk_read_base     tkr;
+        struct tk_read_base     tkr_mono;
+        struct tk_read_base     tkr_raw;
         u64                     xtime_sec;
         unsigned long           ktime_sec;
         struct timespec64       wall_to_monotonic;
@@ -84,7 +85,6 @@ struct timekeeper {
         ktime_t                 offs_boot;
         ktime_t                 offs_tai;
         s32                     tai_offset;
-        ktime_t                 base_raw;
         struct timespec64       raw_time;
 
         /* The following members are for timekeeping internal use */
diff --git a/include/linux/timekeeping.h b/include/linux/timekeeping.h
index 3eaae4754275..99176af216af 100644
--- a/include/linux/timekeeping.h
+++ b/include/linux/timekeeping.h
@@ -214,12 +214,18 @@ static inline u64 ktime_get_boot_ns(void)
         return ktime_to_ns(ktime_get_boottime());
 }
 
+static inline u64 ktime_get_tai_ns(void)
+{
+        return ktime_to_ns(ktime_get_clocktai());
+}
+
 static inline u64 ktime_get_raw_ns(void)
 {
         return ktime_to_ns(ktime_get_raw());
 }
 
 extern u64 ktime_get_mono_fast_ns(void);
+extern u64 ktime_get_raw_fast_ns(void);
 
 /*
  * Timespec interfaces utilizing the ktime based ones
@@ -242,6 +248,9 @@ static inline void timekeeping_clocktai(struct timespec *ts)
 /*
  * RTC specific
  */
+extern bool timekeeping_rtc_skipsuspend(void);
+extern bool timekeeping_rtc_skipresume(void);
+
 extern void timekeeping_inject_sleeptime64(struct timespec64 *delta);
 
 /*
@@ -253,17 +262,14 @@ extern void getnstime_raw_and_real(struct timespec *ts_raw,
 /*
  * Persistent clock related interfaces
  */
-extern bool persistent_clock_exist;
 extern int persistent_clock_is_local;
 
-static inline bool has_persistent_clock(void)
-{
-        return persistent_clock_exist;
-}
-
 extern void read_persistent_clock(struct timespec *ts);
+extern void read_persistent_clock64(struct timespec64 *ts);
 extern void read_boot_clock(struct timespec *ts);
+extern void read_boot_clock64(struct timespec64 *ts);
 extern int update_persistent_clock(struct timespec now);
+extern int update_persistent_clock64(struct timespec64 now);
 
 
 #endif
diff --git a/include/linux/tracefs.h b/include/linux/tracefs.h
new file mode 100644
index 000000000000..5b727a17beee
--- /dev/null
+++ b/include/linux/tracefs.h
@@ -0,0 +1,45 @@
+/*
+ *  tracefs.h - a pseudo file system for activating tracing
+ *
+ * Based on debugfs by: 2004 Greg Kroah-Hartman <greg@kroah.com>
+ *
+ *  Copyright (C) 2014 Red Hat Inc, author: Steven Rostedt <srostedt@redhat.com>
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License version
+ *      2 as published by the Free Software Foundation.
+ *
+ * tracefs is the file system that is used by the tracing infrastructure.
+ *
+ */
+
+#ifndef _TRACEFS_H_
+#define _TRACEFS_H_
+
+#include <linux/fs.h>
+#include <linux/seq_file.h>
+
+#include <linux/types.h>
+
+struct file_operations;
+
+#ifdef CONFIG_TRACING
+
+struct dentry *tracefs_create_file(const char *name, umode_t mode,
+                                   struct dentry *parent, void *data,
+                                   const struct file_operations *fops);
+
+struct dentry *tracefs_create_dir(const char *name, struct dentry *parent);
+
+void tracefs_remove(struct dentry *dentry);
+void tracefs_remove_recursive(struct dentry *dentry);
+
+struct dentry *tracefs_create_instance_dir(const char *name, struct dentry *parent,
+                                           int (*mkdir)(const char *name),
+                                           int (*rmdir)(const char *name));
+
+bool tracefs_initialized(void);
+
+#endif /* CONFIG_TRACING */
+
+#endif
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
index c72851328ca9..a5f7f3ecafa3 100644
--- a/include/linux/tracepoint.h
+++ b/include/linux/tracepoint.h
@@ -36,6 +36,12 @@ struct tracepoint {
         struct tracepoint_func __rcu *funcs;
 };
 
+struct trace_enum_map {
+        const char              *system;
+        const char              *enum_string;
+        unsigned long           enum_value;
+};
+
 extern int
 tracepoint_probe_register(struct tracepoint *tp, void *probe, void *data);
 extern int
@@ -87,6 +93,8 @@ extern void syscall_unregfunc(void);
 
 #define PARAMS(args...) args
 
+#define TRACE_DEFINE_ENUM(x)
+
 #endif /* _LINUX_TRACEPOINT_H */
 
 /*
diff --git a/include/linux/uio.h b/include/linux/uio.h
index 71880299ed48..15f11fb9fff6 100644
--- a/include/linux/uio.h
+++ b/include/linux/uio.h
@@ -76,6 +76,7 @@ size_t iov_iter_copy_from_user_atomic(struct page *page,
                 struct iov_iter *i, unsigned long offset, size_t bytes);
 void iov_iter_advance(struct iov_iter *i, size_t bytes);
 int iov_iter_fault_in_readable(struct iov_iter *i, size_t bytes);
+int iov_iter_fault_in_multipages_readable(struct iov_iter *i, size_t bytes);
 size_t iov_iter_single_seg_count(const struct iov_iter *i);
 size_t copy_page_to_iter(struct page *page, size_t offset, size_t bytes,
                          struct iov_iter *i);
@@ -139,4 +140,18 @@ static inline void iov_iter_reexpand(struct iov_iter *i, size_t count)
 size_t csum_and_copy_to_iter(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i);
 size_t csum_and_copy_from_iter(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i);
 
+int import_iovec(int type, const struct iovec __user * uvector,
+                 unsigned nr_segs, unsigned fast_segs,
+                 struct iovec **iov, struct iov_iter *i);
+
+#ifdef CONFIG_COMPAT
+struct compat_iovec;
+int compat_import_iovec(int type, const struct compat_iovec __user * uvector,
+                 unsigned nr_segs, unsigned fast_segs,
+                 struct iovec **iov, struct iov_iter *i);
+#endif
+
+int import_single_range(int type, void __user *buf, size_t len,
+                 struct iovec *iov, struct iov_iter *i);
+
 #endif
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 7ee1b5c3b4cb..447fe29b55b4 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -205,6 +205,32 @@ void usb_put_intf(struct usb_interface *intf);
 #define USB_MAXINTERFACES       32
 #define USB_MAXIADS             (USB_MAXINTERFACES/2)
 
+/*
+ * USB Resume Timer: Every Host controller driver should drive the resume
+ * signalling on the bus for the amount of time defined by this macro.
+ *
+ * That way we will have a 'stable' behavior among all HCDs supported by Linux.
+ *
+ * Note that the USB Specification states we should drive resume for *at least*
+ * 20 ms, but it doesn't give an upper bound. This creates two possible
+ * situations which we want to avoid:
+ *
+ * (a) sometimes an msleep(20) might expire slightly before 20 ms, which causes
+ * us to fail USB Electrical Tests, thus failing Certification
+ *
+ * (b) Some (many) devices actually need more than 20 ms of resume signalling,
+ * and while we can argue that's against the USB Specification, we don't have
+ * control over which devices a certification laboratory will be using for
+ * certification. If CertLab uses a device which was tested against Windows and
+ * that happens to have relaxed resume signalling rules, we might fall into
+ * situations where we fail interoperability and electrical tests.
+ *
+ * In order to avoid both conditions, we're using a 40 ms resume timeout, which
+ * should cope with both LPJ calibration errors and devices not following every
+ * detail of the USB Specification.
+ */
+#define USB_RESUME_TIMEOUT      40 /* ms */
+
 /**
  * struct usb_interface_cache - long-term representation of a device interface
  * @num_altsetting: number of altsettings defined.
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 535997a6681b..ab94f78c4dd1 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -19,6 +19,7 @@ struct ci_hdrc_platform_data {
         enum usb_phy_interface phy_mode;
         unsigned long    flags;
 #define CI_HDRC_REGS_SHARED             BIT(0)
+#define CI_HDRC_SUPPORTS_RUNTIME_PM     BIT(2)
 #define CI_HDRC_DISABLE_STREAMING       BIT(3)
         /*
          * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
@@ -27,6 +28,7 @@ struct ci_hdrc_platform_data {
 #define CI_HDRC_DUAL_ROLE_NOT_OTG       BIT(4)
 #define CI_HDRC_IMX28_WRITE_FIX         BIT(5)
 #define CI_HDRC_FORCE_FULLSPEED         BIT(6)
+#define CI_HDRC_TURN_VBUS_EARLY_ON      BIT(7)
         enum usb_dr_mode        dr_mode;
 #define CI_HDRC_CONTROLLER_RESET_EVENT          0
 #define CI_HDRC_CONTROLLER_STOPPED_EVENT        1
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 3d87defcc527..2511469a9904 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -148,6 +148,7 @@ struct usb_os_desc_table {
  * @disable: (REQUIRED) Indicates the function should be disabled.  Reasons
  *      include host resetting or reconfiguring the gadget, and disconnection.
  * @setup: Used for interface-specific control requests.
+ * @req_match: Tests if a given class request can be handled by this function.
  * @suspend: Notifies functions when the host stops sending USB traffic.
  * @resume: Notifies functions when the host restarts USB traffic.
  * @get_status: Returns function status as a reply to
@@ -213,6 +214,8 @@ struct usb_function {
         void                    (*disable)(struct usb_function *);
         int                     (*setup)(struct usb_function *,
                                         const struct usb_ctrlrequest *);
+        bool                    (*req_match)(struct usb_function *,
+                                        const struct usb_ctrlrequest *);
         void                    (*suspend)(struct usb_function *);
         void                    (*resume)(struct usb_function *);
 
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index e2f00fd8cd47..4f3dfb7d0654 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -190,7 +190,7 @@ struct usb_ep {
  * @ep:the endpoint being configured
  * @maxpacket_limit:value of maximum packet size limit
  *
- * This function shoud be used only in UDC drivers to initialize endpoint
+ * This function should be used only in UDC drivers to initialize endpoint
  * (usually in probe function).
  */
 static inline void usb_ep_set_maxpacket_limit(struct usb_ep *ep,
@@ -474,6 +474,7 @@ struct usb_dcd_config_params {
 
 struct usb_gadget;
 struct usb_gadget_driver;
+struct usb_udc;
 
 /* the rest of the api to the controller hardware: device operations,
  * which don't involve endpoints (or i/o).
@@ -496,6 +497,7 @@ struct usb_gadget_ops {
 /**
  * struct usb_gadget - represents a usb slave device
  * @work: (internal use) Workqueue to be used for sysfs_notify()
+ * @udc: struct usb_udc pointer for this gadget
  * @ops: Function pointers used to access hardware-specific operations.
  * @ep0: Endpoint zero, used when reading or writing responses to
  *      driver setup() requests
@@ -545,6 +547,7 @@ struct usb_gadget_ops {
  */
 struct usb_gadget {
         struct work_struct              work;
+        struct usb_udc                  *udc;
         /* readonly to gadget driver */
         const struct usb_gadget_ops     *ops;
         struct usb_ep                   *ep0;
@@ -1029,6 +1032,10 @@ extern void usb_gadget_udc_reset(struct usb_gadget *gadget,
 extern void usb_gadget_giveback_request(struct usb_ep *ep,
                 struct usb_request *req);
 
+/*-------------------------------------------------------------------------*/
+
+/* utility to update vbus status for udc core, it may be scheduled */
+extern void usb_udc_vbus_handler(struct usb_gadget *gadget, bool status);
 
 /*-------------------------------------------------------------------------*/
 
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index b0a39243295a..7dbecf9a4656 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -117,8 +117,6 @@ struct msm_otg_platform_data {
         enum otg_control_type otg_control;
         enum msm_usb_phy_type phy_type;
         void (*setup_gpio)(enum usb_otg_state state);
-        int (*link_clk_reset)(struct clk *link_clk, bool assert);
-        int (*phy_clk_reset)(struct clk *phy_clk);
 };
 
 /**
@@ -128,7 +126,6 @@ struct msm_otg_platform_data {
  * @irq: IRQ number assigned for HSUSB controller.
  * @clk: clock struct of usb_hs_clk.
  * @pclk: clock struct of usb_hs_pclk.
- * @phy_reset_clk: clock struct of usb_phy_clk.
  * @core_clk: clock struct of usb_hs_core_clk.
  * @regs: ioremapped register base address.
  * @inputs: OTG state machine inputs(Id, SessValid etc).
@@ -148,7 +145,6 @@ struct msm_otg {
         int irq;
         struct clk *clk;
         struct clk *pclk;
-        struct clk *phy_reset_clk;
         struct clk *core_clk;
         void __iomem *regs;
 #define ID              0
diff --git a/include/linux/usb/otg-fsm.h b/include/linux/usb/otg-fsm.h
index b6ba1bfb86f2..f728f1854829 100644
--- a/include/linux/usb/otg-fsm.h
+++ b/include/linux/usb/otg-fsm.h
@@ -53,6 +53,8 @@ enum otg_fsm_timer {
         B_SE0_SRP,
         B_SRP_FAIL,
         A_WAIT_ENUM,
+        B_DATA_PLS,
+        B_SSEND_SRP,
 
         NUM_OTG_FSM_TIMERS,
 };
diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h
index 9fd9e481ea98..f06529c14141 100644
--- a/include/linux/usb/renesas_usbhs.h
+++ b/include/linux/usb/renesas_usbhs.h
@@ -165,6 +165,8 @@ struct renesas_usbhs_driver_param {
          */
         u32 has_otg:1; /* for controlling PWEN/EXTLP */
         u32 has_sudmac:1; /* for SUDMAC */
+        u32 has_usb_dmac:1; /* for USB-DMAC */
+#define USBHS_USB_DMAC_XFER_SIZE        32      /* hardcode the xfer size */
 };
 
 #define USBHS_TYPE_R8A7790 1
diff --git a/include/linux/uwb/umc.h b/include/linux/uwb/umc.h
index ba82f03d8287..02112299a1d3 100644
--- a/include/linux/uwb/umc.h
+++ b/include/linux/uwb/umc.h
@@ -87,8 +87,6 @@ struct umc_driver {
 
         int  (*probe)(struct umc_dev *);
         void (*remove)(struct umc_dev *);
-        int  (*suspend)(struct umc_dev *, pm_message_t state);
-        int  (*resume)(struct umc_dev *);
         int  (*pre_reset)(struct umc_dev *);
         int  (*post_reset)(struct umc_dev *);
 
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 2d67b8998fd8..ddb440975382 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -14,6 +14,8 @@
 
 #include <linux/iommu.h>
 #include <linux/mm.h>
+#include <linux/workqueue.h>
+#include <linux/poll.h>
 #include <uapi/linux/vfio.h>
 
 /**
@@ -78,19 +80,6 @@ extern int vfio_register_iommu_driver(const struct vfio_iommu_driver_ops *ops);
 extern void vfio_unregister_iommu_driver(
                                 const struct vfio_iommu_driver_ops *ops);
 
-/**
- * offsetofend(TYPE, MEMBER)
- *
- * @TYPE: The type of the structure
- * @MEMBER: The member within the structure to get the end offset of
- *
- * Simple helper macro for dealing with variable sized structures passed
- * from user space.  This allows us to easily determine if the provided
- * structure is sized to include various fields.
- */
-#define offsetofend(TYPE, MEMBER) \
-        (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
-
 /*
  * External user API
  */
@@ -123,4 +112,27 @@ static inline long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
         return -ENOTTY;
 }
 #endif /* CONFIG_EEH */
+
+/*
+ * IRQfd - generic
+ */
+struct virqfd {
+        void                    *opaque;
+        struct eventfd_ctx      *eventfd;
+        int                     (*handler)(void *, void *);
+        void                    (*thread)(void *, void *);
+        void                    *data;
+        struct work_struct      inject;
+        wait_queue_t            wait;
+        poll_table              pt;
+        struct work_struct      shutdown;
+        struct virqfd           **pvirqfd;
+};
+
+extern int vfio_virqfd_enable(void *opaque,
+                              int (*handler)(void *, void *),
+                              void (*thread)(void *, void *),
+                              void *data, struct virqfd **pvirqfd, int fd);
+extern void vfio_virqfd_disable(struct virqfd **pvirqfd);
+
 #endif /* VFIO_H */
diff --git a/include/linux/vgaarb.h b/include/linux/vgaarb.h
index c37bd4d06739..8c3b412d84df 100644
--- a/include/linux/vgaarb.h
+++ b/include/linux/vgaarb.h
@@ -65,8 +65,13 @@ struct pci_dev;
  *     out of the arbitration process (and can be safe to take
  *     interrupts at any time.
  */
+#if defined(CONFIG_VGA_ARB)
 extern void vga_set_legacy_decoding(struct pci_dev *pdev,
                                     unsigned int decodes);
+#else
+static inline void vga_set_legacy_decoding(struct pci_dev *pdev,
+                                           unsigned int decodes) { };
+#endif
 
 /**
  *     vga_get         - acquire & locks VGA resources
diff --git a/include/linux/vme.h b/include/linux/vme.h
index 8cd6f19ca518..79242e9c06b8 100644
--- a/include/linux/vme.h
+++ b/include/linux/vme.h
@@ -137,6 +137,7 @@ ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t);
 ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t);
 unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int,
         unsigned int, loff_t);
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct *vma);
 void vme_master_free(struct vme_resource *);
 
 struct vme_resource *vme_dma_request(struct vme_dev *, u32);
diff --git a/include/linux/watchdog.h b/include/linux/watchdog.h
index 395b70e0eccf..a746bf5216f8 100644
--- a/include/linux/watchdog.h
+++ b/include/linux/watchdog.h
@@ -137,4 +137,12 @@ extern int watchdog_init_timeout(struct watchdog_device *wdd,
 extern int watchdog_register_device(struct watchdog_device *);
 extern void watchdog_unregister_device(struct watchdog_device *);
 
+#ifdef CONFIG_HARDLOCKUP_DETECTOR
+void watchdog_nmi_disable_all(void);
+void watchdog_nmi_enable_all(void);
+#else
+static inline void watchdog_nmi_disable_all(void) {}
+static inline void watchdog_nmi_enable_all(void) {}
+#endif
+
 #endif  /* ifndef _LINUX_WATCHDOG_H */
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h
index f597846ff605..deee212af8e0 100644
--- a/include/linux/workqueue.h
+++ b/include/linux/workqueue.h
@@ -454,6 +454,7 @@ extern bool workqueue_congested(int cpu, struct workqueue_struct *wq);
 extern unsigned int work_busy(struct work_struct *work);
 extern __printf(1, 2) void set_worker_desc(const char *fmt, ...);
 extern void print_worker_info(const char *log_lvl, struct task_struct *task);
+extern void show_workqueue_state(void);
 
 /**
  * queue_work - queue work on a workqueue