4 files changed, 76 insertions, 2 deletions

diff --git a/include/linux/i2c-ocores.h b/include/linux/i2c-ocores.h
new file mode 100644
index 000000000000..8ed591b0887e
--- /dev/null
+++ b/include/linux/i2c-ocores.h
@@ -0,0 +1,19 @@
+/*
+ * i2c-ocores.h - definitions for the i2c-ocores interface
+ *
+ * Peter Korsgaard <jacmet@sunsite.dk>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef _LINUX_I2C_OCORES_H
+#define _LINUX_I2C_OCORES_H
+
+struct ocores_i2c_platform_data {
+        u32 regstep;   /* distance between registers */
+        u32 clock_khz; /* input clock in kHz */
+};
+
+#endif /* _LINUX_I2C_OCORES_H */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 0510430e00db..526ddc8eecfb 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -97,13 +97,13 @@ extern s32 i2c_smbus_write_word_data(struct i2c_client * client,
                                      u8 command, u16 value);
 extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
                                       u8 command, u8 length,
-                                      u8 *values);
+                                      const u8 *values);
 /* Returns the number of read bytes */
 extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
                                          u8 command, u8 *values);
 extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client,
                                           u8 command, u8 length,
-                                          u8 *values);
+                                          const u8 *values);
 
 /*
  * A driver is capable of handling one or more physical devices present on
diff --git a/include/linux/m41t00.h b/include/linux/m41t00.h
new file mode 100644
index 000000000000..b423360ca38e
--- /dev/null
+++ b/include/linux/m41t00.h
@@ -0,0 +1,50 @@
+/*
+ * Definitions for the ST M41T00 family of i2c rtc chips.
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2005, 2006 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef _M41T00_H
+#define _M41T00_H
+
+#define M41T00_DRV_NAME         "m41t00"
+#define M41T00_I2C_ADDR         0x68
+
+#define M41T00_TYPE_M41T00      0
+#define M41T00_TYPE_M41T81      81
+#define M41T00_TYPE_M41T85      85
+
+struct m41t00_platform_data {
+        u8      type;
+        u8      i2c_addr;
+        u8      sqw_freq;
+};
+
+/* SQW output disabled, this is default value by power on */
+#define M41T00_SQW_DISABLE      (0)
+
+#define M41T00_SQW_32KHZ        (1<<4)          /* 32.768 KHz */
+#define M41T00_SQW_8KHZ         (2<<4)          /* 8.192 KHz */
+#define M41T00_SQW_4KHZ         (3<<4)          /* 4.096 KHz */
+#define M41T00_SQW_2KHZ         (4<<4)          /* 2.048 KHz */
+#define M41T00_SQW_1KHZ         (5<<4)          /* 1.024 KHz */
+#define M41T00_SQW_512HZ        (6<<4)          /* 512 Hz */
+#define M41T00_SQW_256HZ        (7<<4)          /* 256 Hz */
+#define M41T00_SQW_128HZ        (8<<4)          /* 128 Hz */
+#define M41T00_SQW_64HZ         (9<<4)          /* 64 Hz */
+#define M41T00_SQW_32HZ         (10<<4)         /* 32 Hz */
+#define M41T00_SQW_16HZ         (11<<4)         /* 16 Hz */
+#define M41T00_SQW_8HZ          (12<<4)         /* 8 Hz */
+#define M41T00_SQW_4HZ          (13<<4)         /* 4 Hz */
+#define M41T00_SQW_2HZ          (14<<4)         /* 2 Hz */
+#define M41T00_SQW_1HZ          (15<<4)         /* 1 Hz */
+
+extern ulong m41t00_get_rtc_time(void);
+extern int m41t00_set_rtc_time(ulong nowtime);
+
+#endif /* _M41T00_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index fd54a9d4c3d4..cde701c13c77 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -352,8 +352,11 @@
 #define PCI_DEVICE_ID_ATI_RS480         0x5950
 /* ATI IXP Chipset */
 #define PCI_DEVICE_ID_ATI_IXP200_IDE    0x4349
+#define PCI_DEVICE_ID_ATI_IXP200_SMBUS  0x4353
+#define PCI_DEVICE_ID_ATI_IXP300_SMBUS  0x4363
 #define PCI_DEVICE_ID_ATI_IXP300_IDE    0x4369
 #define PCI_DEVICE_ID_ATI_IXP300_SATA   0x436e
+#define PCI_DEVICE_ID_ATI_IXP400_SMBUS  0x4372
 #define PCI_DEVICE_ID_ATI_IXP400_IDE    0x4376
 #define PCI_DEVICE_ID_ATI_IXP400_SATA   0x4379
 #define PCI_DEVICE_ID_ATI_IXP400_SATA2  0x437a
@@ -1133,9 +1136,11 @@
 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL     0x0258
 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL     0x0259
 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL     0x025B
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS 0x0264
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE   0x0265
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA  0x0266
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS 0x0368
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE   0x036E
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA  0x037E
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F